Commit | Line | Data |
---|---|---|
3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
59db9691 | 14 | #include <linux/err.h> |
3cc72986 MB |
15 | #include <linux/gpio.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mfd/core.h> | |
18 | #include <linux/module.h> | |
d781009c MB |
19 | #include <linux/of.h> |
20 | #include <linux/of_device.h> | |
21 | #include <linux/of_gpio.h> | |
3cc72986 MB |
22 | #include <linux/pm_runtime.h> |
23 | #include <linux/regmap.h> | |
24 | #include <linux/regulator/consumer.h> | |
5927467d | 25 | #include <linux/regulator/machine.h> |
3cc72986 MB |
26 | #include <linux/slab.h> |
27 | ||
28 | #include <linux/mfd/arizona/core.h> | |
29 | #include <linux/mfd/arizona/registers.h> | |
30 | ||
31 | #include "arizona.h" | |
32 | ||
33 | static const char *wm5102_core_supplies[] = { | |
34 | "AVDD", | |
35 | "DBVDD1", | |
3cc72986 MB |
36 | }; |
37 | ||
38 | int arizona_clk32k_enable(struct arizona *arizona) | |
39 | { | |
40 | int ret = 0; | |
41 | ||
42 | mutex_lock(&arizona->clk_lock); | |
43 | ||
44 | arizona->clk32k_ref++; | |
45 | ||
247fa192 MB |
46 | if (arizona->clk32k_ref == 1) { |
47 | switch (arizona->pdata.clk32k_src) { | |
48 | case ARIZONA_32KZ_MCLK1: | |
49 | ret = pm_runtime_get_sync(arizona->dev); | |
50 | if (ret != 0) | |
51 | goto out; | |
52 | break; | |
53 | } | |
54 | ||
3cc72986 MB |
55 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
56 | ARIZONA_CLK_32K_ENA, | |
57 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 58 | } |
3cc72986 | 59 | |
247fa192 | 60 | out: |
3cc72986 MB |
61 | if (ret != 0) |
62 | arizona->clk32k_ref--; | |
63 | ||
64 | mutex_unlock(&arizona->clk_lock); | |
65 | ||
66 | return ret; | |
67 | } | |
68 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
69 | ||
70 | int arizona_clk32k_disable(struct arizona *arizona) | |
71 | { | |
72 | int ret = 0; | |
73 | ||
74 | mutex_lock(&arizona->clk_lock); | |
75 | ||
76 | BUG_ON(arizona->clk32k_ref <= 0); | |
77 | ||
78 | arizona->clk32k_ref--; | |
79 | ||
247fa192 | 80 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
81 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
82 | ARIZONA_CLK_32K_ENA, 0); | |
83 | ||
247fa192 MB |
84 | switch (arizona->pdata.clk32k_src) { |
85 | case ARIZONA_32KZ_MCLK1: | |
86 | pm_runtime_put_sync(arizona->dev); | |
87 | break; | |
88 | } | |
89 | } | |
90 | ||
3cc72986 MB |
91 | mutex_unlock(&arizona->clk_lock); |
92 | ||
93 | return ret; | |
94 | } | |
95 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
96 | ||
97 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
98 | { | |
99 | struct arizona *arizona = data; | |
100 | ||
101 | dev_err(arizona->dev, "CLKGEN error\n"); | |
102 | ||
103 | return IRQ_HANDLED; | |
104 | } | |
105 | ||
106 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
107 | { | |
108 | struct arizona *arizona = data; | |
109 | unsigned int val; | |
110 | int ret; | |
111 | ||
112 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
113 | &val); | |
114 | if (ret != 0) { | |
115 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
116 | ret); | |
117 | return IRQ_NONE; | |
118 | } | |
119 | ||
3cc72986 MB |
120 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
121 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
122 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
123 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
124 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 | 125 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
6e440d27 CK |
126 | if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) |
127 | dev_err(arizona->dev, "ISRC3 underclocked\n"); | |
3cc72986 MB |
128 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) |
129 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
130 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
131 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
132 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
133 | dev_err(arizona->dev, "FX underclocked\n"); | |
134 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
135 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
136 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
137 | dev_err(arizona->dev, "DAC underclocked\n"); | |
138 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
139 | dev_err(arizona->dev, "ADC underclocked\n"); | |
140 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 141 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
142 | |
143 | return IRQ_HANDLED; | |
144 | } | |
145 | ||
146 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
147 | { | |
148 | struct arizona *arizona = data; | |
149 | unsigned int val[2]; | |
150 | int ret; | |
151 | ||
152 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, | |
153 | &val[0], 2); | |
154 | if (ret != 0) { | |
155 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
156 | ret); | |
157 | return IRQ_NONE; | |
158 | } | |
159 | ||
160 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) | |
161 | dev_err(arizona->dev, "PWM overclocked\n"); | |
162 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
163 | dev_err(arizona->dev, "FX core overclocked\n"); | |
164 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
165 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
166 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
167 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
168 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
169 | dev_err(arizona->dev, "ADC overclocked\n"); | |
170 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
171 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
172 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
173 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
174 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
175 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
176 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
177 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
178 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
179 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
180 | ||
181 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
182 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
183 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
184 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
185 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
186 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
187 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
188 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
189 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
190 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
191 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
192 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
193 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
194 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
195 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
196 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
6e440d27 CK |
197 | if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) |
198 | dev_err(arizona->dev, "ISRC3 overclocked\n"); | |
3cc72986 MB |
199 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) |
200 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
201 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
202 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
203 | ||
204 | return IRQ_HANDLED; | |
205 | } | |
206 | ||
9d53dfdc CK |
207 | static int arizona_poll_reg(struct arizona *arizona, |
208 | int timeout, unsigned int reg, | |
209 | unsigned int mask, unsigned int target) | |
3cc72986 | 210 | { |
9d53dfdc | 211 | unsigned int val = 0; |
3cc72986 MB |
212 | int ret, i; |
213 | ||
9d53dfdc CK |
214 | for (i = 0; i < timeout; i++) { |
215 | ret = regmap_read(arizona->regmap, reg, &val); | |
3cc72986 | 216 | if (ret != 0) { |
9d53dfdc CK |
217 | dev_err(arizona->dev, "Failed to read reg %u: %d\n", |
218 | reg, ret); | |
cfe775ce | 219 | continue; |
3cc72986 MB |
220 | } |
221 | ||
9d53dfdc CK |
222 | if ((val & mask) == target) |
223 | return 0; | |
224 | ||
225 | msleep(1); | |
3cc72986 MB |
226 | } |
227 | ||
9d53dfdc CK |
228 | dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); |
229 | return -ETIMEDOUT; | |
230 | } | |
231 | ||
232 | static int arizona_wait_for_boot(struct arizona *arizona) | |
233 | { | |
234 | int ret; | |
235 | ||
236 | /* | |
237 | * We can't use an interrupt as we need to runtime resume to do so, | |
238 | * we won't race with the interrupt handler as it'll be blocked on | |
239 | * runtime resume. | |
240 | */ | |
241 | ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
242 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); | |
243 | ||
244 | if (!ret) | |
3cc72986 MB |
245 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
246 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
247 | |
248 | pm_runtime_mark_last_busy(arizona->dev); | |
249 | ||
9d53dfdc | 250 | return ret; |
3cc72986 MB |
251 | } |
252 | ||
e80436bb CK |
253 | static int arizona_apply_hardware_patch(struct arizona* arizona) |
254 | { | |
255 | unsigned int fll, sysclk; | |
256 | int ret, err; | |
257 | ||
e80436bb CK |
258 | /* Cache existing FLL and SYSCLK settings */ |
259 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll); | |
260 | if (ret != 0) { | |
261 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", | |
262 | ret); | |
263 | return ret; | |
264 | } | |
265 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk); | |
266 | if (ret != 0) { | |
267 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", | |
268 | ret); | |
269 | return ret; | |
270 | } | |
271 | ||
272 | /* Start up SYSCLK using the FLL in free running mode */ | |
273 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
274 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
275 | if (ret != 0) { | |
276 | dev_err(arizona->dev, | |
277 | "Failed to start FLL in freerunning mode: %d\n", | |
278 | ret); | |
279 | return ret; | |
280 | } | |
281 | ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
282 | ARIZONA_FLL1_CLOCK_OK_STS, | |
283 | ARIZONA_FLL1_CLOCK_OK_STS); | |
284 | if (ret != 0) { | |
285 | ret = -ETIMEDOUT; | |
286 | goto err_fll; | |
287 | } | |
288 | ||
289 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
290 | if (ret != 0) { | |
291 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); | |
292 | goto err_fll; | |
293 | } | |
294 | ||
295 | /* Start the write sequencer and wait for it to finish */ | |
296 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
297 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); | |
298 | if (ret != 0) { | |
299 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", | |
300 | ret); | |
301 | goto err_sysclk; | |
302 | } | |
303 | ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, | |
304 | ARIZONA_WSEQ_BUSY, 0); | |
305 | if (ret != 0) { | |
306 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
307 | ARIZONA_WSEQ_ABORT); | |
308 | ret = -ETIMEDOUT; | |
309 | } | |
310 | ||
311 | err_sysclk: | |
312 | err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk); | |
313 | if (err != 0) { | |
314 | dev_err(arizona->dev, | |
315 | "Failed to re-apply old SYSCLK settings: %d\n", | |
316 | err); | |
317 | } | |
318 | ||
319 | err_fll: | |
320 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll); | |
321 | if (err != 0) { | |
322 | dev_err(arizona->dev, | |
323 | "Failed to re-apply old FLL settings: %d\n", | |
324 | err); | |
325 | } | |
326 | ||
e80436bb CK |
327 | if (ret != 0) |
328 | return ret; | |
329 | else | |
330 | return err; | |
331 | } | |
332 | ||
3cc72986 MB |
333 | #ifdef CONFIG_PM_RUNTIME |
334 | static int arizona_runtime_resume(struct device *dev) | |
335 | { | |
336 | struct arizona *arizona = dev_get_drvdata(dev); | |
337 | int ret; | |
338 | ||
508c8299 MB |
339 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
340 | ||
59db9691 MB |
341 | ret = regulator_enable(arizona->dcvdd); |
342 | if (ret != 0) { | |
343 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
344 | return ret; | |
345 | } | |
3cc72986 MB |
346 | |
347 | regcache_cache_only(arizona->regmap, false); | |
348 | ||
4c9bb8bc CK |
349 | switch (arizona->type) { |
350 | case WM5102: | |
5927467d MB |
351 | if (arizona->external_dcvdd) { |
352 | ret = regmap_update_bits(arizona->regmap, | |
353 | ARIZONA_ISOLATION_CONTROL, | |
354 | ARIZONA_ISOLATE_DCVDD1, 0); | |
355 | if (ret != 0) { | |
356 | dev_err(arizona->dev, | |
357 | "Failed to connect DCVDD: %d\n", ret); | |
358 | goto err; | |
359 | } | |
360 | } | |
361 | ||
4c9bb8bc CK |
362 | ret = wm5102_patch(arizona); |
363 | if (ret != 0) { | |
364 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
365 | ret); | |
366 | goto err; | |
367 | } | |
e80436bb CK |
368 | |
369 | ret = arizona_apply_hardware_patch(arizona); | |
370 | if (ret != 0) { | |
371 | dev_err(arizona->dev, | |
372 | "Failed to apply hardware patch: %d\n", | |
373 | ret); | |
374 | goto err; | |
375 | } | |
376 | break; | |
377 | default: | |
12bb68ed CK |
378 | ret = arizona_wait_for_boot(arizona); |
379 | if (ret != 0) { | |
380 | goto err; | |
381 | } | |
382 | ||
5927467d MB |
383 | if (arizona->external_dcvdd) { |
384 | ret = regmap_update_bits(arizona->regmap, | |
385 | ARIZONA_ISOLATION_CONTROL, | |
386 | ARIZONA_ISOLATE_DCVDD1, 0); | |
387 | if (ret != 0) { | |
388 | dev_err(arizona->dev, | |
389 | "Failed to connect DCVDD: %d\n", ret); | |
390 | goto err; | |
391 | } | |
392 | } | |
e80436bb | 393 | break; |
4c9bb8bc CK |
394 | } |
395 | ||
d9d03496 CK |
396 | switch (arizona->type) { |
397 | case WM5102: | |
398 | ret = wm5102_patch(arizona); | |
399 | if (ret != 0) { | |
400 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
401 | ret); | |
402 | goto err; | |
403 | } | |
404 | default: | |
405 | break; | |
406 | } | |
407 | ||
9270bdf5 MB |
408 | ret = regcache_sync(arizona->regmap); |
409 | if (ret != 0) { | |
410 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 411 | goto err; |
9270bdf5 | 412 | } |
3cc72986 MB |
413 | |
414 | return 0; | |
4816bd1c MB |
415 | |
416 | err: | |
417 | regcache_cache_only(arizona->regmap, true); | |
418 | regulator_disable(arizona->dcvdd); | |
419 | return ret; | |
3cc72986 MB |
420 | } |
421 | ||
422 | static int arizona_runtime_suspend(struct device *dev) | |
423 | { | |
424 | struct arizona *arizona = dev_get_drvdata(dev); | |
5927467d | 425 | int ret; |
3cc72986 | 426 | |
508c8299 MB |
427 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
428 | ||
5927467d MB |
429 | if (arizona->external_dcvdd) { |
430 | ret = regmap_update_bits(arizona->regmap, | |
431 | ARIZONA_ISOLATION_CONTROL, | |
432 | ARIZONA_ISOLATE_DCVDD1, | |
433 | ARIZONA_ISOLATE_DCVDD1); | |
434 | if (ret != 0) { | |
435 | dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", | |
436 | ret); | |
437 | return ret; | |
438 | } | |
439 | } | |
440 | ||
59db9691 MB |
441 | regcache_cache_only(arizona->regmap, true); |
442 | regcache_mark_dirty(arizona->regmap); | |
e293e847 | 443 | regulator_disable(arizona->dcvdd); |
3cc72986 MB |
444 | |
445 | return 0; | |
446 | } | |
447 | #endif | |
448 | ||
dc781d0e | 449 | #ifdef CONFIG_PM_SLEEP |
67c99296 MB |
450 | static int arizona_suspend(struct device *dev) |
451 | { | |
452 | struct arizona *arizona = dev_get_drvdata(dev); | |
453 | ||
454 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
455 | disable_irq(arizona->irq); | |
456 | ||
457 | return 0; | |
458 | } | |
459 | ||
460 | static int arizona_suspend_late(struct device *dev) | |
461 | { | |
462 | struct arizona *arizona = dev_get_drvdata(dev); | |
463 | ||
464 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
465 | enable_irq(arizona->irq); | |
466 | ||
467 | return 0; | |
468 | } | |
469 | ||
dc781d0e MB |
470 | static int arizona_resume_noirq(struct device *dev) |
471 | { | |
472 | struct arizona *arizona = dev_get_drvdata(dev); | |
473 | ||
474 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
475 | disable_irq(arizona->irq); | |
476 | ||
477 | return 0; | |
478 | } | |
479 | ||
480 | static int arizona_resume(struct device *dev) | |
481 | { | |
482 | struct arizona *arizona = dev_get_drvdata(dev); | |
483 | ||
484 | dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); | |
485 | enable_irq(arizona->irq); | |
486 | ||
487 | return 0; | |
488 | } | |
489 | #endif | |
490 | ||
3cc72986 MB |
491 | const struct dev_pm_ops arizona_pm_ops = { |
492 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
493 | arizona_runtime_resume, | |
494 | NULL) | |
67c99296 | 495 | SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) |
dc781d0e | 496 | #ifdef CONFIG_PM_SLEEP |
67c99296 | 497 | .suspend_late = arizona_suspend_late, |
dc781d0e MB |
498 | .resume_noirq = arizona_resume_noirq, |
499 | #endif | |
3cc72986 MB |
500 | }; |
501 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
502 | ||
d781009c | 503 | #ifdef CONFIG_OF |
942786e6 | 504 | unsigned long arizona_of_get_type(struct device *dev) |
d781009c MB |
505 | { |
506 | const struct of_device_id *id = of_match_device(arizona_of_match, dev); | |
507 | ||
508 | if (id) | |
942786e6 | 509 | return (unsigned long)id->data; |
d781009c MB |
510 | else |
511 | return 0; | |
512 | } | |
513 | EXPORT_SYMBOL_GPL(arizona_of_get_type); | |
514 | ||
e4fcb1d6 CK |
515 | int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, |
516 | bool mandatory) | |
517 | { | |
518 | int gpio; | |
519 | ||
520 | gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0); | |
521 | if (gpio < 0) { | |
522 | if (mandatory) | |
523 | dev_err(arizona->dev, | |
524 | "Mandatory DT gpio %s missing/malformed: %d\n", | |
525 | prop, gpio); | |
526 | ||
527 | gpio = 0; | |
528 | } | |
529 | ||
530 | return gpio; | |
531 | } | |
532 | EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio); | |
533 | ||
d781009c MB |
534 | static int arizona_of_get_core_pdata(struct arizona *arizona) |
535 | { | |
e4fcb1d6 | 536 | struct arizona_pdata *pdata = &arizona->pdata; |
d781009c MB |
537 | int ret, i; |
538 | ||
e4fcb1d6 | 539 | pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); |
d781009c MB |
540 | |
541 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
542 | "wlf,gpio-defaults", | |
543 | arizona->pdata.gpio_defaults, | |
544 | ARRAY_SIZE(arizona->pdata.gpio_defaults)); | |
545 | if (ret >= 0) { | |
546 | /* | |
547 | * All values are literal except out of range values | |
548 | * which are chip default, translate into platform | |
549 | * data which uses 0 as chip default and out of range | |
550 | * as zero. | |
551 | */ | |
552 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { | |
553 | if (arizona->pdata.gpio_defaults[i] > 0xffff) | |
554 | arizona->pdata.gpio_defaults[i] = 0; | |
91c73935 | 555 | else if (arizona->pdata.gpio_defaults[i] == 0) |
d781009c MB |
556 | arizona->pdata.gpio_defaults[i] = 0x10000; |
557 | } | |
558 | } else { | |
559 | dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", | |
560 | ret); | |
561 | } | |
562 | ||
563 | return 0; | |
564 | } | |
565 | ||
566 | const struct of_device_id arizona_of_match[] = { | |
567 | { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, | |
568 | { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, | |
dc7d4863 | 569 | { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, |
d781009c MB |
570 | {}, |
571 | }; | |
572 | EXPORT_SYMBOL_GPL(arizona_of_match); | |
573 | #else | |
574 | static inline int arizona_of_get_core_pdata(struct arizona *arizona) | |
575 | { | |
576 | return 0; | |
577 | } | |
578 | #endif | |
579 | ||
5ac98553 | 580 | static const struct mfd_cell early_devs[] = { |
3cc72986 MB |
581 | { .name = "arizona-ldo1" }, |
582 | }; | |
583 | ||
32dadef2 | 584 | static const char *wm5102_supplies[] = { |
5fc6c396 | 585 | "MICVDD", |
32dadef2 CK |
586 | "DBVDD2", |
587 | "DBVDD3", | |
588 | "CPVDD", | |
589 | "SPKVDDL", | |
590 | "SPKVDDR", | |
591 | }; | |
592 | ||
5ac98553 | 593 | static const struct mfd_cell wm5102_devs[] = { |
d7768111 | 594 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
595 | { |
596 | .name = "arizona-extcon", | |
597 | .parent_supplies = wm5102_supplies, | |
598 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
599 | }, | |
3cc72986 | 600 | { .name = "arizona-gpio" }, |
503b1cac | 601 | { .name = "arizona-haptics" }, |
3cc72986 | 602 | { .name = "arizona-pwm" }, |
32dadef2 CK |
603 | { |
604 | .name = "wm5102-codec", | |
605 | .parent_supplies = wm5102_supplies, | |
606 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
607 | }, | |
3cc72986 MB |
608 | }; |
609 | ||
5ac98553 | 610 | static const struct mfd_cell wm5110_devs[] = { |
d7768111 | 611 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
612 | { |
613 | .name = "arizona-extcon", | |
614 | .parent_supplies = wm5102_supplies, | |
615 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
616 | }, | |
e102befe | 617 | { .name = "arizona-gpio" }, |
503b1cac | 618 | { .name = "arizona-haptics" }, |
e102befe | 619 | { .name = "arizona-pwm" }, |
32dadef2 CK |
620 | { |
621 | .name = "wm5110-codec", | |
622 | .parent_supplies = wm5102_supplies, | |
623 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
624 | }, | |
625 | }; | |
626 | ||
627 | static const char *wm8997_supplies[] = { | |
996c2d4f | 628 | "MICVDD", |
32dadef2 CK |
629 | "DBVDD2", |
630 | "CPVDD", | |
631 | "SPKVDD", | |
e102befe MB |
632 | }; |
633 | ||
5ac98553 | 634 | static const struct mfd_cell wm8997_devs[] = { |
dc7d4863 | 635 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
636 | { |
637 | .name = "arizona-extcon", | |
638 | .parent_supplies = wm8997_supplies, | |
639 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
640 | }, | |
dc7d4863 CK |
641 | { .name = "arizona-gpio" }, |
642 | { .name = "arizona-haptics" }, | |
643 | { .name = "arizona-pwm" }, | |
32dadef2 CK |
644 | { |
645 | .name = "wm8997-codec", | |
646 | .parent_supplies = wm8997_supplies, | |
647 | .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), | |
648 | }, | |
dc7d4863 CK |
649 | }; |
650 | ||
f791be49 | 651 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 MB |
652 | { |
653 | struct device *dev = arizona->dev; | |
654 | const char *type_name; | |
655 | unsigned int reg, val; | |
62d62b59 | 656 | int (*apply_patch)(struct arizona *) = NULL; |
3cc72986 MB |
657 | int ret, i; |
658 | ||
659 | dev_set_drvdata(arizona->dev, arizona); | |
660 | mutex_init(&arizona->clk_lock); | |
661 | ||
662 | if (dev_get_platdata(arizona->dev)) | |
663 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), | |
664 | sizeof(arizona->pdata)); | |
22d7dc8a LJ |
665 | else |
666 | arizona_of_get_core_pdata(arizona); | |
3cc72986 MB |
667 | |
668 | regcache_cache_only(arizona->regmap, true); | |
669 | ||
670 | switch (arizona->type) { | |
671 | case WM5102: | |
e102befe | 672 | case WM5110: |
dc7d4863 | 673 | case WM8997: |
3cc72986 MB |
674 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
675 | arizona->core_supplies[i].supply | |
676 | = wm5102_core_supplies[i]; | |
677 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
678 | break; | |
679 | default: | |
680 | dev_err(arizona->dev, "Unknown device type %d\n", | |
681 | arizona->type); | |
682 | return -EINVAL; | |
683 | } | |
684 | ||
4a8c475f CK |
685 | /* Mark DCVDD as external, LDO1 driver will clear if internal */ |
686 | arizona->external_dcvdd = true; | |
687 | ||
3cc72986 | 688 | ret = mfd_add_devices(arizona->dev, -1, early_devs, |
0848c94f | 689 | ARRAY_SIZE(early_devs), NULL, 0, NULL); |
3cc72986 MB |
690 | if (ret != 0) { |
691 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
692 | return ret; | |
693 | } | |
694 | ||
695 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
696 | arizona->core_supplies); | |
697 | if (ret != 0) { | |
698 | dev_err(dev, "Failed to request core supplies: %d\n", | |
699 | ret); | |
700 | goto err_early; | |
701 | } | |
702 | ||
0c2d0ffb CK |
703 | /** |
704 | * Don't use devres here because the only device we have to get | |
705 | * against is the MFD device and DCVDD will likely be supplied by | |
706 | * one of its children. Meaning that the regulator will be | |
707 | * destroyed by the time devres calls regulator put. | |
708 | */ | |
e6021511 | 709 | arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); |
59db9691 MB |
710 | if (IS_ERR(arizona->dcvdd)) { |
711 | ret = PTR_ERR(arizona->dcvdd); | |
712 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
713 | goto err_early; | |
714 | } | |
715 | ||
87d3af4a MB |
716 | if (arizona->pdata.reset) { |
717 | /* Start out with /RESET low to put the chip into reset */ | |
718 | ret = gpio_request_one(arizona->pdata.reset, | |
719 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
720 | "arizona /RESET"); | |
721 | if (ret != 0) { | |
722 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
e6021511 | 723 | goto err_dcvdd; |
87d3af4a MB |
724 | } |
725 | } | |
726 | ||
3cc72986 MB |
727 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
728 | arizona->core_supplies); | |
729 | if (ret != 0) { | |
730 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
731 | ret); | |
e6021511 | 732 | goto err_dcvdd; |
3cc72986 MB |
733 | } |
734 | ||
59db9691 MB |
735 | ret = regulator_enable(arizona->dcvdd); |
736 | if (ret != 0) { | |
737 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
738 | goto err_enable; | |
739 | } | |
740 | ||
c25feaa5 | 741 | if (arizona->pdata.reset) { |
3cc72986 | 742 | gpio_set_value_cansleep(arizona->pdata.reset, 1); |
c25feaa5 CK |
743 | msleep(1); |
744 | } | |
3cc72986 | 745 | |
3cc72986 MB |
746 | regcache_cache_only(arizona->regmap, false); |
747 | ||
ca76ceb8 | 748 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
749 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
750 | if (ret != 0) { | |
751 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 752 | goto err_reset; |
3cc72986 MB |
753 | } |
754 | ||
3cc72986 MB |
755 | switch (reg) { |
756 | case 0x5102: | |
e102befe | 757 | case 0x5110: |
dc7d4863 | 758 | case 0x8997: |
e102befe | 759 | break; |
3cc72986 | 760 | default: |
ca76ceb8 | 761 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
59db9691 | 762 | goto err_reset; |
3cc72986 MB |
763 | } |
764 | ||
3cc72986 MB |
765 | /* If we have a /RESET GPIO we'll already be reset */ |
766 | if (!arizona->pdata.reset) { | |
46b9d13a CK |
767 | regcache_mark_dirty(arizona->regmap); |
768 | ||
3cc72986 MB |
769 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); |
770 | if (ret != 0) { | |
771 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 772 | goto err_reset; |
3cc72986 | 773 | } |
46b9d13a | 774 | |
c25feaa5 CK |
775 | msleep(1); |
776 | ||
46b9d13a CK |
777 | ret = regcache_sync(arizona->regmap); |
778 | if (ret != 0) { | |
779 | dev_err(dev, "Failed to sync device: %d\n", ret); | |
780 | goto err_reset; | |
781 | } | |
3cc72986 MB |
782 | } |
783 | ||
ca76ceb8 | 784 | /* Ensure device startup is complete */ |
d955cba8 CK |
785 | switch (arizona->type) { |
786 | case WM5102: | |
787 | ret = regmap_read(arizona->regmap, 0x19, &val); | |
788 | if (ret != 0) | |
789 | dev_err(dev, | |
790 | "Failed to check write sequencer state: %d\n", | |
791 | ret); | |
792 | else if (val & 0x01) | |
793 | break; | |
794 | /* Fall through */ | |
795 | default: | |
796 | ret = arizona_wait_for_boot(arizona); | |
797 | if (ret != 0) { | |
798 | dev_err(arizona->dev, | |
799 | "Device failed initial boot: %d\n", ret); | |
800 | goto err_reset; | |
801 | } | |
802 | break; | |
af65a361 | 803 | } |
3cc72986 | 804 | |
ca76ceb8 MB |
805 | /* Read the device ID information & do device specific stuff */ |
806 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
807 | if (ret != 0) { | |
808 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
809 | goto err_reset; | |
810 | } | |
811 | ||
812 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
813 | &arizona->rev); | |
814 | if (ret != 0) { | |
815 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
816 | goto err_reset; | |
817 | } | |
818 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
819 | ||
820 | switch (reg) { | |
821 | #ifdef CONFIG_MFD_WM5102 | |
822 | case 0x5102: | |
823 | type_name = "WM5102"; | |
824 | if (arizona->type != WM5102) { | |
825 | dev_err(arizona->dev, "WM5102 registered as %d\n", | |
826 | arizona->type); | |
827 | arizona->type = WM5102; | |
828 | } | |
829 | apply_patch = wm5102_patch; | |
830 | arizona->rev &= 0x7; | |
831 | break; | |
832 | #endif | |
833 | #ifdef CONFIG_MFD_WM5110 | |
834 | case 0x5110: | |
835 | type_name = "WM5110"; | |
836 | if (arizona->type != WM5110) { | |
837 | dev_err(arizona->dev, "WM5110 registered as %d\n", | |
838 | arizona->type); | |
839 | arizona->type = WM5110; | |
840 | } | |
841 | apply_patch = wm5110_patch; | |
842 | break; | |
dc7d4863 CK |
843 | #endif |
844 | #ifdef CONFIG_MFD_WM8997 | |
845 | case 0x8997: | |
846 | type_name = "WM8997"; | |
847 | if (arizona->type != WM8997) { | |
848 | dev_err(arizona->dev, "WM8997 registered as %d\n", | |
849 | arizona->type); | |
850 | arizona->type = WM8997; | |
851 | } | |
852 | apply_patch = wm8997_patch; | |
853 | break; | |
ca76ceb8 MB |
854 | #endif |
855 | default: | |
856 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
857 | goto err_reset; | |
858 | } | |
859 | ||
860 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); | |
861 | ||
62d62b59 MB |
862 | if (apply_patch) { |
863 | ret = apply_patch(arizona); | |
864 | if (ret != 0) { | |
865 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
866 | ret); | |
867 | goto err_reset; | |
868 | } | |
e80436bb CK |
869 | |
870 | switch (arizona->type) { | |
871 | case WM5102: | |
872 | ret = arizona_apply_hardware_patch(arizona); | |
873 | if (ret != 0) { | |
874 | dev_err(arizona->dev, | |
875 | "Failed to apply hardware patch: %d\n", | |
876 | ret); | |
877 | goto err_reset; | |
878 | } | |
879 | break; | |
880 | default: | |
881 | break; | |
882 | } | |
62d62b59 MB |
883 | } |
884 | ||
3cc72986 MB |
885 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
886 | if (!arizona->pdata.gpio_defaults[i]) | |
887 | continue; | |
888 | ||
889 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
890 | arizona->pdata.gpio_defaults[i]); | |
891 | } | |
892 | ||
893 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); | |
894 | pm_runtime_use_autosuspend(arizona->dev); | |
895 | pm_runtime_enable(arizona->dev); | |
896 | ||
897 | /* Chip default */ | |
898 | if (!arizona->pdata.clk32k_src) | |
899 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
900 | ||
901 | switch (arizona->pdata.clk32k_src) { | |
902 | case ARIZONA_32KZ_MCLK1: | |
903 | case ARIZONA_32KZ_MCLK2: | |
904 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
905 | ARIZONA_CLK_32K_SRC_MASK, | |
906 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 907 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
908 | break; |
909 | case ARIZONA_32KZ_NONE: | |
910 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
911 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
912 | break; | |
913 | default: | |
914 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
915 | arizona->pdata.clk32k_src); | |
916 | ret = -EINVAL; | |
59db9691 | 917 | goto err_reset; |
3cc72986 MB |
918 | } |
919 | ||
3d91f828 | 920 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
921 | if (!arizona->pdata.micbias[i].mV && |
922 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
923 | continue; |
924 | ||
544c7aad MB |
925 | /* Apply default for bypass mode */ |
926 | if (!arizona->pdata.micbias[i].mV) | |
927 | arizona->pdata.micbias[i].mV = 2800; | |
928 | ||
3d91f828 | 929 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 930 | |
3d91f828 MB |
931 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
932 | ||
933 | if (arizona->pdata.micbias[i].ext_cap) | |
934 | val |= ARIZONA_MICB1_EXT_CAP; | |
935 | ||
936 | if (arizona->pdata.micbias[i].discharge) | |
937 | val |= ARIZONA_MICB1_DISCH; | |
938 | ||
f773fc6d | 939 | if (arizona->pdata.micbias[i].soft_start) |
3d91f828 MB |
940 | val |= ARIZONA_MICB1_RATE; |
941 | ||
544c7aad MB |
942 | if (arizona->pdata.micbias[i].bypass) |
943 | val |= ARIZONA_MICB1_BYPASS; | |
944 | ||
3d91f828 MB |
945 | regmap_update_bits(arizona->regmap, |
946 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
947 | ARIZONA_MICB1_LVL_MASK | | |
948 | ARIZONA_MICB1_DISCH | | |
544c7aad | 949 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
950 | ARIZONA_MICB1_RATE, val); |
951 | } | |
952 | ||
3cc72986 MB |
953 | for (i = 0; i < ARIZONA_MAX_INPUT; i++) { |
954 | /* Default for both is 0 so noop with defaults */ | |
955 | val = arizona->pdata.dmic_ref[i] | |
956 | << ARIZONA_IN1_DMIC_SUP_SHIFT; | |
957 | val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; | |
958 | ||
959 | regmap_update_bits(arizona->regmap, | |
960 | ARIZONA_IN1L_CONTROL + (i * 8), | |
961 | ARIZONA_IN1_DMIC_SUP_MASK | | |
962 | ARIZONA_IN1_MODE_MASK, val); | |
963 | } | |
964 | ||
965 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { | |
966 | /* Default is 0 so noop with defaults */ | |
967 | if (arizona->pdata.out_mono[i]) | |
968 | val = ARIZONA_OUT1_MONO; | |
969 | else | |
970 | val = 0; | |
971 | ||
972 | regmap_update_bits(arizona->regmap, | |
973 | ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), | |
974 | ARIZONA_OUT1_MONO, val); | |
975 | } | |
976 | ||
3cc72986 MB |
977 | for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { |
978 | if (arizona->pdata.spk_mute[i]) | |
979 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 980 | ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), |
3cc72986 MB |
981 | ARIZONA_SPK1_MUTE_ENDIAN_MASK | |
982 | ARIZONA_SPK1_MUTE_SEQ1_MASK, | |
983 | arizona->pdata.spk_mute[i]); | |
984 | ||
985 | if (arizona->pdata.spk_fmt[i]) | |
986 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 987 | ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), |
3cc72986 MB |
988 | ARIZONA_SPK1_FMT_MASK, |
989 | arizona->pdata.spk_fmt[i]); | |
990 | } | |
991 | ||
992 | /* Set up for interrupts */ | |
993 | ret = arizona_irq_init(arizona); | |
994 | if (ret != 0) | |
59db9691 | 995 | goto err_reset; |
3cc72986 MB |
996 | |
997 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", | |
998 | arizona_clkgen_err, arizona); | |
999 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
1000 | arizona_overclocked, arizona); | |
1001 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
1002 | arizona_underclocked, arizona); | |
1003 | ||
1004 | switch (arizona->type) { | |
1005 | case WM5102: | |
1006 | ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, | |
0848c94f | 1007 | ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); |
e102befe MB |
1008 | break; |
1009 | case WM5110: | |
1010 | ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, | |
78566afd | 1011 | ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); |
3cc72986 | 1012 | break; |
dc7d4863 CK |
1013 | case WM8997: |
1014 | ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, | |
1015 | ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); | |
1016 | break; | |
3cc72986 MB |
1017 | } |
1018 | ||
1019 | if (ret != 0) { | |
1020 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); | |
1021 | goto err_irq; | |
1022 | } | |
1023 | ||
59db9691 MB |
1024 | #ifdef CONFIG_PM_RUNTIME |
1025 | regulator_disable(arizona->dcvdd); | |
1026 | #endif | |
1027 | ||
3cc72986 MB |
1028 | return 0; |
1029 | ||
1030 | err_irq: | |
1031 | arizona_irq_exit(arizona); | |
3cc72986 MB |
1032 | err_reset: |
1033 | if (arizona->pdata.reset) { | |
87d3af4a | 1034 | gpio_set_value_cansleep(arizona->pdata.reset, 0); |
3cc72986 MB |
1035 | gpio_free(arizona->pdata.reset); |
1036 | } | |
59db9691 | 1037 | regulator_disable(arizona->dcvdd); |
3cc72986 | 1038 | err_enable: |
3a36a0db | 1039 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 | 1040 | arizona->core_supplies); |
e6021511 CK |
1041 | err_dcvdd: |
1042 | regulator_put(arizona->dcvdd); | |
3cc72986 MB |
1043 | err_early: |
1044 | mfd_remove_devices(dev); | |
1045 | return ret; | |
1046 | } | |
1047 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
1048 | ||
4740f73f | 1049 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 | 1050 | { |
b804020a CK |
1051 | pm_runtime_disable(arizona->dev); |
1052 | ||
df6b3352 | 1053 | regulator_disable(arizona->dcvdd); |
e6021511 | 1054 | regulator_put(arizona->dcvdd); |
df6b3352 | 1055 | |
3cc72986 MB |
1056 | mfd_remove_devices(arizona->dev); |
1057 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
1058 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
1059 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
3cc72986 | 1060 | arizona_irq_exit(arizona); |
1d017b6b MB |
1061 | if (arizona->pdata.reset) |
1062 | gpio_set_value_cansleep(arizona->pdata.reset, 0); | |
df6b3352 | 1063 | |
4420286e | 1064 | regulator_bulk_disable(arizona->num_core_supplies, |
1d017b6b | 1065 | arizona->core_supplies); |
3cc72986 MB |
1066 | return 0; |
1067 | } | |
1068 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |