Commit | Line | Data |
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a17d94f0 SG |
1 | /* |
2 | * ChromeOS EC multi-function device (SPI) | |
3 | * | |
4 | * Copyright (C) 2012 Google, Inc | |
5 | * | |
6 | * This software is licensed under the terms of the GNU General Public | |
7 | * License version 2, as published by the Free Software Foundation, and | |
8 | * may be copied, distributed, and modified under those terms. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #include <linux/delay.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/mfd/cros_ec.h> | |
20 | #include <linux/mfd/cros_ec_commands.h> | |
01e73c89 | 21 | #include <linux/of.h> |
a17d94f0 SG |
22 | #include <linux/platform_device.h> |
23 | #include <linux/slab.h> | |
24 | #include <linux/spi/spi.h> | |
25 | ||
26 | ||
27 | /* The header byte, which follows the preamble */ | |
28 | #define EC_MSG_HEADER 0xec | |
29 | ||
30 | /* | |
31 | * Number of EC preamble bytes we read at a time. Since it takes | |
32 | * about 400-500us for the EC to respond there is not a lot of | |
33 | * point in tuning this. If the EC could respond faster then | |
34 | * we could increase this so that might expect the preamble and | |
35 | * message to occur in a single transaction. However, the maximum | |
36 | * SPI transfer size is 256 bytes, so at 5MHz we need a response | |
37 | * time of perhaps <320us (200 bytes / 1600 bits). | |
38 | */ | |
39 | #define EC_MSG_PREAMBLE_COUNT 32 | |
40 | ||
41 | /* | |
9c0b54a1 DA |
42 | * Allow for a long time for the EC to respond. We support i2c |
43 | * tunneling and support fairly long messages for the tunnel (249 | |
44 | * bytes long at the moment). If we're talking to a 100 kHz device | |
45 | * on the other end and need to transfer ~256 bytes, then we need: | |
46 | * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms | |
47 | * | |
48 | * We'll wait 4 times that to handle clock stretching and other | |
49 | * paranoia. | |
50 | * | |
51 | * It's pretty unlikely that we'll really see a 249 byte tunnel in | |
52 | * anything other than testing. If this was more common we might | |
53 | * consider having slow commands like this require a GET_STATUS | |
54 | * wait loop. The 'flash write' command would be another candidate | |
55 | * for this, clocking in at 2-3ms. | |
56 | */ | |
57 | #define EC_MSG_DEADLINE_MS 100 | |
a17d94f0 SG |
58 | |
59 | /* | |
60 | * Time between raising the SPI chip select (for the end of a | |
61 | * transaction) and dropping it again (for the next transaction). | |
49f91ac3 DB |
62 | * If we go too fast, the EC will miss the transaction. We know that we |
63 | * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be | |
64 | * safe. | |
a17d94f0 | 65 | */ |
49f91ac3 | 66 | #define EC_SPI_RECOVERY_TIME_NS (200 * 1000) |
a17d94f0 | 67 | |
659e142b DA |
68 | /* |
69 | * The EC is unresponsive for a time after a reboot command. Add a | |
70 | * simple delay to make sure that the bus stays locked. | |
71 | */ | |
72 | #define EC_REBOOT_DELAY_MS 50 | |
73 | ||
a17d94f0 SG |
74 | /** |
75 | * struct cros_ec_spi - information about a SPI-connected EC | |
76 | * | |
77 | * @spi: SPI device we are connected to | |
78 | * @last_transfer_ns: time that we last finished a transfer, or 0 if there | |
79 | * if no record | |
01e73c89 RK |
80 | * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that |
81 | * is sent when we want to turn off CS at the end of a transaction. | |
a17d94f0 SG |
82 | */ |
83 | struct cros_ec_spi { | |
84 | struct spi_device *spi; | |
85 | s64 last_transfer_ns; | |
01e73c89 | 86 | unsigned int end_of_msg_delay; |
a17d94f0 SG |
87 | }; |
88 | ||
89 | static void debug_packet(struct device *dev, const char *name, u8 *ptr, | |
90 | int len) | |
91 | { | |
92 | #ifdef DEBUG | |
93 | int i; | |
94 | ||
95 | dev_dbg(dev, "%s: ", name); | |
96 | for (i = 0; i < len; i++) | |
9e146f43 TR |
97 | pr_cont(" %02x", ptr[i]); |
98 | ||
99 | pr_cont("\n"); | |
a17d94f0 SG |
100 | #endif |
101 | } | |
102 | ||
103 | /** | |
104 | * cros_ec_spi_receive_response - Receive a response from the EC. | |
105 | * | |
106 | * This function has two phases: reading the preamble bytes (since if we read | |
107 | * data from the EC before it is ready to send, we just get preamble) and | |
108 | * reading the actual message. | |
109 | * | |
110 | * The received data is placed into ec_dev->din. | |
111 | * | |
112 | * @ec_dev: ChromeOS EC device | |
113 | * @need_len: Number of message bytes we need to read | |
114 | */ | |
115 | static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, | |
116 | int need_len) | |
117 | { | |
118 | struct cros_ec_spi *ec_spi = ec_dev->priv; | |
119 | struct spi_transfer trans; | |
120 | struct spi_message msg; | |
121 | u8 *ptr, *end; | |
122 | int ret; | |
123 | unsigned long deadline; | |
124 | int todo; | |
125 | ||
126 | /* Receive data until we see the header byte */ | |
127 | deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); | |
c9a81d67 DA |
128 | while (true) { |
129 | unsigned long start_jiffies = jiffies; | |
130 | ||
daf93d22 | 131 | memset(&trans, 0, sizeof(trans)); |
a17d94f0 SG |
132 | trans.cs_change = 1; |
133 | trans.rx_buf = ptr = ec_dev->din; | |
134 | trans.len = EC_MSG_PREAMBLE_COUNT; | |
135 | ||
136 | spi_message_init(&msg); | |
137 | spi_message_add_tail(&trans, &msg); | |
138 | ret = spi_sync(ec_spi->spi, &msg); | |
139 | if (ret < 0) { | |
140 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
141 | return ret; | |
142 | } | |
143 | ||
144 | for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { | |
145 | if (*ptr == EC_MSG_HEADER) { | |
c34924b9 | 146 | dev_dbg(ec_dev->dev, "msg found at %zd\n", |
a17d94f0 SG |
147 | ptr - ec_dev->din); |
148 | break; | |
149 | } | |
150 | } | |
c9a81d67 DA |
151 | if (ptr != end) |
152 | break; | |
a17d94f0 | 153 | |
c9a81d67 DA |
154 | /* |
155 | * Use the time at the start of the loop as a timeout. This | |
156 | * gives us one last shot at getting the transfer and is useful | |
157 | * in case we got context switched out for a while. | |
158 | */ | |
159 | if (time_after(start_jiffies, deadline)) { | |
a17d94f0 SG |
160 | dev_warn(ec_dev->dev, "EC failed to respond in time\n"); |
161 | return -ETIMEDOUT; | |
162 | } | |
c9a81d67 | 163 | } |
a17d94f0 SG |
164 | |
165 | /* | |
166 | * ptr now points to the header byte. Copy any valid data to the | |
167 | * start of our buffer | |
168 | */ | |
169 | todo = end - ++ptr; | |
170 | BUG_ON(todo < 0 || todo > ec_dev->din_size); | |
171 | todo = min(todo, need_len); | |
172 | memmove(ec_dev->din, ptr, todo); | |
173 | ptr = ec_dev->din + todo; | |
174 | dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", | |
175 | need_len, todo); | |
176 | need_len -= todo; | |
177 | ||
178 | /* Receive data until we have it all */ | |
179 | while (need_len > 0) { | |
180 | /* | |
181 | * We can't support transfers larger than the SPI FIFO size | |
182 | * unless we have DMA. We don't have DMA on the ISP SPI ports | |
183 | * for Exynos. We need a way of asking SPI driver for | |
184 | * maximum-supported transfer size. | |
185 | */ | |
186 | todo = min(need_len, 256); | |
c34924b9 | 187 | dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", |
a17d94f0 SG |
188 | todo, need_len, ptr - ec_dev->din); |
189 | ||
daf93d22 | 190 | memset(&trans, 0, sizeof(trans)); |
a17d94f0 SG |
191 | trans.cs_change = 1; |
192 | trans.rx_buf = ptr; | |
193 | trans.len = todo; | |
194 | spi_message_init(&msg); | |
195 | spi_message_add_tail(&trans, &msg); | |
196 | ||
197 | /* send command to EC and read answer */ | |
198 | BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo > | |
199 | ec_dev->din_size); | |
200 | ret = spi_sync(ec_spi->spi, &msg); | |
201 | if (ret < 0) { | |
202 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
203 | return ret; | |
204 | } | |
205 | ||
206 | debug_packet(ec_dev->dev, "interim", ptr, todo); | |
207 | ptr += todo; | |
208 | need_len -= todo; | |
209 | } | |
210 | ||
c34924b9 | 211 | dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); |
a17d94f0 SG |
212 | |
213 | return 0; | |
214 | } | |
215 | ||
216 | /** | |
7e6cb5b4 | 217 | * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply |
a17d94f0 SG |
218 | * |
219 | * @ec_dev: ChromeOS EC device | |
220 | * @ec_msg: Message to transfer | |
221 | */ | |
7e6cb5b4 | 222 | static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, |
5d4773e2 | 223 | struct cros_ec_command *ec_msg) |
a17d94f0 SG |
224 | { |
225 | struct cros_ec_spi *ec_spi = ec_dev->priv; | |
226 | struct spi_transfer trans; | |
227 | struct spi_message msg; | |
228 | int i, len; | |
229 | u8 *ptr; | |
230 | int sum; | |
231 | int ret = 0, final_ret; | |
a17d94f0 SG |
232 | |
233 | len = cros_ec_prepare_tx(ec_dev, ec_msg); | |
234 | dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); | |
235 | ||
236 | /* If it's too soon to do another transaction, wait */ | |
237 | if (ec_spi->last_transfer_ns) { | |
a17d94f0 SG |
238 | unsigned long delay; /* The delay completed so far */ |
239 | ||
154adc14 | 240 | delay = ktime_get_ns() - ec_spi->last_transfer_ns; |
a17d94f0 | 241 | if (delay < EC_SPI_RECOVERY_TIME_NS) |
1fe36866 | 242 | ndelay(EC_SPI_RECOVERY_TIME_NS - delay); |
a17d94f0 SG |
243 | } |
244 | ||
245 | /* Transmit phase - send our message */ | |
246 | debug_packet(ec_dev->dev, "out", ec_dev->dout, len); | |
daf93d22 | 247 | memset(&trans, 0, sizeof(trans)); |
a17d94f0 SG |
248 | trans.tx_buf = ec_dev->dout; |
249 | trans.len = len; | |
250 | trans.cs_change = 1; | |
251 | spi_message_init(&msg); | |
252 | spi_message_add_tail(&trans, &msg); | |
253 | ret = spi_sync(ec_spi->spi, &msg); | |
254 | ||
255 | /* Get the response */ | |
256 | if (!ret) { | |
257 | ret = cros_ec_spi_receive_response(ec_dev, | |
5d4773e2 | 258 | ec_msg->insize + EC_MSG_TX_PROTO_BYTES); |
a17d94f0 SG |
259 | } else { |
260 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
261 | } | |
262 | ||
96758059 DA |
263 | /* |
264 | * Turn off CS, possibly adding a delay to ensure the rising edge | |
265 | * doesn't come too soon after the end of the data. | |
266 | */ | |
a17d94f0 | 267 | spi_message_init(&msg); |
96758059 DA |
268 | memset(&trans, 0, sizeof(trans)); |
269 | trans.delay_usecs = ec_spi->end_of_msg_delay; | |
270 | spi_message_add_tail(&trans, &msg); | |
01e73c89 | 271 | |
a17d94f0 | 272 | final_ret = spi_sync(ec_spi->spi, &msg); |
154adc14 | 273 | ec_spi->last_transfer_ns = ktime_get_ns(); |
a17d94f0 SG |
274 | if (!ret) |
275 | ret = final_ret; | |
276 | if (ret < 0) { | |
277 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
362196e5 | 278 | goto exit; |
a17d94f0 SG |
279 | } |
280 | ||
a17d94f0 | 281 | ptr = ec_dev->din; |
6db07b63 BR |
282 | |
283 | /* check response error code */ | |
284 | ec_msg->result = ptr[0]; | |
285 | ret = cros_ec_check_result(ec_dev, ec_msg); | |
286 | if (ret) | |
362196e5 | 287 | goto exit; |
6db07b63 | 288 | |
a17d94f0 SG |
289 | len = ptr[1]; |
290 | sum = ptr[0] + ptr[1]; | |
5d4773e2 | 291 | if (len > ec_msg->insize) { |
a17d94f0 | 292 | dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", |
5d4773e2 | 293 | len, ec_msg->insize); |
362196e5 DA |
294 | ret = -ENOSPC; |
295 | goto exit; | |
a17d94f0 SG |
296 | } |
297 | ||
298 | /* copy response packet payload and compute checksum */ | |
299 | for (i = 0; i < len; i++) { | |
300 | sum += ptr[i + 2]; | |
5d4773e2 BR |
301 | if (ec_msg->insize) |
302 | ec_msg->indata[i] = ptr[i + 2]; | |
a17d94f0 SG |
303 | } |
304 | sum &= 0xff; | |
305 | ||
306 | debug_packet(ec_dev->dev, "in", ptr, len + 3); | |
307 | ||
308 | if (sum != ptr[len + 2]) { | |
309 | dev_err(ec_dev->dev, | |
310 | "bad packet checksum, expected %02x, got %02x\n", | |
311 | sum, ptr[len + 2]); | |
362196e5 DA |
312 | ret = -EBADMSG; |
313 | goto exit; | |
a17d94f0 SG |
314 | } |
315 | ||
12ebc8a5 | 316 | ret = len; |
362196e5 | 317 | exit: |
659e142b DA |
318 | if (ec_msg->command == EC_CMD_REBOOT_EC) |
319 | msleep(EC_REBOOT_DELAY_MS); | |
320 | ||
362196e5 | 321 | return ret; |
a17d94f0 SG |
322 | } |
323 | ||
01e73c89 RK |
324 | static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev) |
325 | { | |
326 | struct device_node *np = dev->of_node; | |
327 | u32 val; | |
328 | int ret; | |
329 | ||
330 | ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); | |
331 | if (!ret) | |
332 | ec_spi->end_of_msg_delay = val; | |
333 | } | |
334 | ||
9922b412 | 335 | static int cros_ec_spi_probe(struct spi_device *spi) |
a17d94f0 SG |
336 | { |
337 | struct device *dev = &spi->dev; | |
338 | struct cros_ec_device *ec_dev; | |
339 | struct cros_ec_spi *ec_spi; | |
340 | int err; | |
341 | ||
342 | spi->bits_per_word = 8; | |
343 | spi->mode = SPI_MODE_0; | |
344 | err = spi_setup(spi); | |
345 | if (err < 0) | |
346 | return err; | |
347 | ||
348 | ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL); | |
349 | if (ec_spi == NULL) | |
350 | return -ENOMEM; | |
351 | ec_spi->spi = spi; | |
352 | ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); | |
353 | if (!ec_dev) | |
354 | return -ENOMEM; | |
355 | ||
01e73c89 RK |
356 | /* Check for any DT properties */ |
357 | cros_ec_spi_dt_probe(ec_spi, dev); | |
358 | ||
a17d94f0 | 359 | spi_set_drvdata(spi, ec_dev); |
a17d94f0 SG |
360 | ec_dev->dev = dev; |
361 | ec_dev->priv = ec_spi; | |
362 | ec_dev->irq = spi->irq; | |
7e6cb5b4 | 363 | ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi; |
a17d94f0 SG |
364 | ec_dev->ec_name = ec_spi->spi->modalias; |
365 | ec_dev->phys_name = dev_name(&ec_spi->spi->dev); | |
366 | ec_dev->parent = &ec_spi->spi->dev; | |
367 | ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT; | |
368 | ec_dev->dout_size = EC_MSG_BYTES; | |
369 | ||
370 | err = cros_ec_register(ec_dev); | |
371 | if (err) { | |
372 | dev_err(dev, "cannot register EC\n"); | |
373 | return err; | |
374 | } | |
375 | ||
fb50497c P |
376 | device_init_wakeup(&spi->dev, true); |
377 | ||
a17d94f0 SG |
378 | return 0; |
379 | } | |
380 | ||
9922b412 | 381 | static int cros_ec_spi_remove(struct spi_device *spi) |
a17d94f0 SG |
382 | { |
383 | struct cros_ec_device *ec_dev; | |
384 | ||
385 | ec_dev = spi_get_drvdata(spi); | |
386 | cros_ec_remove(ec_dev); | |
387 | ||
388 | return 0; | |
389 | } | |
390 | ||
391 | #ifdef CONFIG_PM_SLEEP | |
392 | static int cros_ec_spi_suspend(struct device *dev) | |
393 | { | |
394 | struct cros_ec_device *ec_dev = dev_get_drvdata(dev); | |
395 | ||
396 | return cros_ec_suspend(ec_dev); | |
397 | } | |
398 | ||
399 | static int cros_ec_spi_resume(struct device *dev) | |
400 | { | |
401 | struct cros_ec_device *ec_dev = dev_get_drvdata(dev); | |
402 | ||
403 | return cros_ec_resume(ec_dev); | |
404 | } | |
405 | #endif | |
406 | ||
407 | static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend, | |
408 | cros_ec_spi_resume); | |
409 | ||
410 | static const struct spi_device_id cros_ec_spi_id[] = { | |
411 | { "cros-ec-spi", 0 }, | |
412 | { } | |
413 | }; | |
414 | MODULE_DEVICE_TABLE(spi, cros_ec_spi_id); | |
415 | ||
416 | static struct spi_driver cros_ec_driver_spi = { | |
417 | .driver = { | |
418 | .name = "cros-ec-spi", | |
419 | .owner = THIS_MODULE, | |
420 | .pm = &cros_ec_spi_pm_ops, | |
421 | }, | |
9922b412 TR |
422 | .probe = cros_ec_spi_probe, |
423 | .remove = cros_ec_spi_remove, | |
a17d94f0 SG |
424 | .id_table = cros_ec_spi_id, |
425 | }; | |
426 | ||
427 | module_spi_driver(cros_ec_driver_spi); | |
428 | ||
ea0f8b0b | 429 | MODULE_LICENSE("GPL v2"); |
a17d94f0 | 430 | MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)"); |