[deliverable/linux.git] / drivers / mfd / da9052-core.c

/*
 * Device access for Dialog DA9052 PMICs.
 *
 * Copyright(c) 2011 Dialog Semiconductor Ltd.
 *
 * Author: David Dajun Chen <dchen@diasemi.com>
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 */

#include <linux/device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/slab.h>
#include <linux/module.h>

#include <linux/mfd/da9052/da9052.h>
#include <linux/mfd/da9052/pdata.h>
#include <linux/mfd/da9052/reg.h>

static bool da9052_reg_readable(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case DA9052_PAGE0_CON_REG:
	case DA9052_STATUS_A_REG:
	case DA9052_STATUS_B_REG:
	case DA9052_STATUS_C_REG:
	case DA9052_STATUS_D_REG:
	case DA9052_EVENT_A_REG:
	case DA9052_EVENT_B_REG:
	case DA9052_EVENT_C_REG:
	case DA9052_EVENT_D_REG:
	case DA9052_FAULTLOG_REG:
	case DA9052_IRQ_MASK_A_REG:
	case DA9052_IRQ_MASK_B_REG:
	case DA9052_IRQ_MASK_C_REG:
	case DA9052_IRQ_MASK_D_REG:
	case DA9052_CONTROL_A_REG:
	case DA9052_CONTROL_B_REG:
	case DA9052_CONTROL_C_REG:
	case DA9052_CONTROL_D_REG:
	case DA9052_PDDIS_REG:
	case DA9052_INTERFACE_REG:
	case DA9052_RESET_REG:
	case DA9052_GPIO_0_1_REG:
	case DA9052_GPIO_2_3_REG:
	case DA9052_GPIO_4_5_REG:
	case DA9052_GPIO_6_7_REG:
	case DA9052_GPIO_14_15_REG:
	case DA9052_ID_0_1_REG:
	case DA9052_ID_2_3_REG:
	case DA9052_ID_4_5_REG:
	case DA9052_ID_6_7_REG:
	case DA9052_ID_8_9_REG:
	case DA9052_ID_10_11_REG:
	case DA9052_ID_12_13_REG:
	case DA9052_ID_14_15_REG:
	case DA9052_ID_16_17_REG:
	case DA9052_ID_18_19_REG:
	case DA9052_ID_20_21_REG:
	case DA9052_SEQ_STATUS_REG:
	case DA9052_SEQ_A_REG:
	case DA9052_SEQ_B_REG:
	case DA9052_SEQ_TIMER_REG:
	case DA9052_BUCKA_REG:
	case DA9052_BUCKB_REG:
	case DA9052_BUCKCORE_REG:
	case DA9052_BUCKPRO_REG:
	case DA9052_BUCKMEM_REG:
	case DA9052_BUCKPERI_REG:
	case DA9052_LDO1_REG:
	case DA9052_LDO2_REG:
	case DA9052_LDO3_REG:
	case DA9052_LDO4_REG:
	case DA9052_LDO5_REG:
	case DA9052_LDO6_REG:
	case DA9052_LDO7_REG:
	case DA9052_LDO8_REG:
	case DA9052_LDO9_REG:
	case DA9052_LDO10_REG:
	case DA9052_SUPPLY_REG:
	case DA9052_PULLDOWN_REG:
	case DA9052_CHGBUCK_REG:
	case DA9052_WAITCONT_REG:
	case DA9052_ISET_REG:
	case DA9052_BATCHG_REG:
	case DA9052_CHG_CONT_REG:
	case DA9052_INPUT_CONT_REG:
	case DA9052_CHG_TIME_REG:
	case DA9052_BBAT_CONT_REG:
	case DA9052_BOOST_REG:
	case DA9052_LED_CONT_REG:
	case DA9052_LEDMIN123_REG:
	case DA9052_LED1_CONF_REG:
	case DA9052_LED2_CONF_REG:
	case DA9052_LED3_CONF_REG:
	case DA9052_LED1CONT_REG:
	case DA9052_LED2CONT_REG:
	case DA9052_LED3CONT_REG:
	case DA9052_LED_CONT_4_REG:
	case DA9052_LED_CONT_5_REG:
	case DA9052_ADC_MAN_REG:
	case DA9052_ADC_CONT_REG:
	case DA9052_ADC_RES_L_REG:
	case DA9052_ADC_RES_H_REG:
	case DA9052_VDD_RES_REG:
	case DA9052_VDD_MON_REG:
	case DA9052_ICHG_AV_REG:
	case DA9052_ICHG_THD_REG:
	case DA9052_ICHG_END_REG:
	case DA9052_TBAT_RES_REG:
	case DA9052_TBAT_HIGHP_REG:
	case DA9052_TBAT_HIGHN_REG:
	case DA9052_TBAT_LOW_REG:
	case DA9052_T_OFFSET_REG:
	case DA9052_ADCIN4_RES_REG:
	case DA9052_AUTO4_HIGH_REG:
	case DA9052_AUTO4_LOW_REG:
	case DA9052_ADCIN5_RES_REG:
	case DA9052_AUTO5_HIGH_REG:
	case DA9052_AUTO5_LOW_REG:
	case DA9052_ADCIN6_RES_REG:
	case DA9052_AUTO6_HIGH_REG:
	case DA9052_AUTO6_LOW_REG:
	case DA9052_TJUNC_RES_REG:
	case DA9052_TSI_CONT_A_REG:
	case DA9052_TSI_CONT_B_REG:
	case DA9052_TSI_X_MSB_REG:
	case DA9052_TSI_Y_MSB_REG:
	case DA9052_TSI_LSB_REG:
	case DA9052_TSI_Z_MSB_REG:
	case DA9052_COUNT_S_REG:
	case DA9052_COUNT_MI_REG:
	case DA9052_COUNT_H_REG:
	case DA9052_COUNT_D_REG:
	case DA9052_COUNT_MO_REG:
	case DA9052_COUNT_Y_REG:
	case DA9052_ALARM_MI_REG:
	case DA9052_ALARM_H_REG:
	case DA9052_ALARM_D_REG:
	case DA9052_ALARM_MO_REG:
	case DA9052_ALARM_Y_REG:
	case DA9052_SECOND_A_REG:
	case DA9052_SECOND_B_REG:
	case DA9052_SECOND_C_REG:
	case DA9052_SECOND_D_REG:
	case DA9052_PAGE1_CON_REG:
		return true;
	default:
		return false;
	}
}

static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case DA9052_PAGE0_CON_REG:
	case DA9052_EVENT_A_REG:
	case DA9052_EVENT_B_REG:
	case DA9052_EVENT_C_REG:
	case DA9052_EVENT_D_REG:
	case DA9052_IRQ_MASK_A_REG:
	case DA9052_IRQ_MASK_B_REG:
	case DA9052_IRQ_MASK_C_REG:
	case DA9052_IRQ_MASK_D_REG:
	case DA9052_CONTROL_A_REG:
	case DA9052_CONTROL_B_REG:
	case DA9052_CONTROL_C_REG:
	case DA9052_CONTROL_D_REG:
	case DA9052_PDDIS_REG:
	case DA9052_RESET_REG:
	case DA9052_GPIO_0_1_REG:
	case DA9052_GPIO_2_3_REG:
	case DA9052_GPIO_4_5_REG:
	case DA9052_GPIO_6_7_REG:
	case DA9052_GPIO_14_15_REG:
	case DA9052_ID_0_1_REG:
	case DA9052_ID_2_3_REG:
	case DA9052_ID_4_5_REG:
	case DA9052_ID_6_7_REG:
	case DA9052_ID_8_9_REG:
	case DA9052_ID_10_11_REG:
	case DA9052_ID_12_13_REG:
	case DA9052_ID_14_15_REG:
	case DA9052_ID_16_17_REG:
	case DA9052_ID_18_19_REG:
	case DA9052_ID_20_21_REG:
	case DA9052_SEQ_STATUS_REG:
	case DA9052_SEQ_A_REG:
	case DA9052_SEQ_B_REG:
	case DA9052_SEQ_TIMER_REG:
	case DA9052_BUCKA_REG:
	case DA9052_BUCKB_REG:
	case DA9052_BUCKCORE_REG:
	case DA9052_BUCKPRO_REG:
	case DA9052_BUCKMEM_REG:
	case DA9052_BUCKPERI_REG:
	case DA9052_LDO1_REG:
	case DA9052_LDO2_REG:
	case DA9052_LDO3_REG:
	case DA9052_LDO4_REG:
	case DA9052_LDO5_REG:
	case DA9052_LDO6_REG:
	case DA9052_LDO7_REG:
	case DA9052_LDO8_REG:
	case DA9052_LDO9_REG:
	case DA9052_LDO10_REG:
	case DA9052_SUPPLY_REG:
	case DA9052_PULLDOWN_REG:
	case DA9052_CHGBUCK_REG:
	case DA9052_WAITCONT_REG:
	case DA9052_ISET_REG:
	case DA9052_BATCHG_REG:
	case DA9052_CHG_CONT_REG:
	case DA9052_INPUT_CONT_REG:
	case DA9052_BBAT_CONT_REG:
	case DA9052_BOOST_REG:
	case DA9052_LED_CONT_REG:
	case DA9052_LEDMIN123_REG:
	case DA9052_LED1_CONF_REG:
	case DA9052_LED2_CONF_REG:
	case DA9052_LED3_CONF_REG:
	case DA9052_LED1CONT_REG:
	case DA9052_LED2CONT_REG:
	case DA9052_LED3CONT_REG:
	case DA9052_LED_CONT_4_REG:
	case DA9052_LED_CONT_5_REG:
	case DA9052_ADC_MAN_REG:
	case DA9052_ADC_CONT_REG:
	case DA9052_ADC_RES_L_REG:
	case DA9052_ADC_RES_H_REG:
	case DA9052_VDD_RES_REG:
	case DA9052_VDD_MON_REG:
	case DA9052_ICHG_THD_REG:
	case DA9052_ICHG_END_REG:
	case DA9052_TBAT_HIGHP_REG:
	case DA9052_TBAT_HIGHN_REG:
	case DA9052_TBAT_LOW_REG:
	case DA9052_T_OFFSET_REG:
	case DA9052_AUTO4_HIGH_REG:
	case DA9052_AUTO4_LOW_REG:
	case DA9052_AUTO5_HIGH_REG:
	case DA9052_AUTO5_LOW_REG:
	case DA9052_AUTO6_HIGH_REG:
	case DA9052_AUTO6_LOW_REG:
	case DA9052_TSI_CONT_A_REG:
	case DA9052_TSI_CONT_B_REG:
	case DA9052_COUNT_S_REG:
	case DA9052_COUNT_MI_REG:
	case DA9052_COUNT_H_REG:
	case DA9052_COUNT_D_REG:
	case DA9052_COUNT_MO_REG:
	case DA9052_COUNT_Y_REG:
	case DA9052_ALARM_MI_REG:
	case DA9052_ALARM_H_REG:
	case DA9052_ALARM_D_REG:
	case DA9052_ALARM_MO_REG:
	case DA9052_ALARM_Y_REG:
	case DA9052_PAGE1_CON_REG:
		return true;
	default:
		return false;
	}
}

static bool da9052_reg_volatile(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case DA9052_STATUS_A_REG:
	case DA9052_STATUS_B_REG:
	case DA9052_STATUS_C_REG:
	case DA9052_STATUS_D_REG:
	case DA9052_EVENT_A_REG:
	case DA9052_EVENT_B_REG:
	case DA9052_EVENT_C_REG:
	case DA9052_EVENT_D_REG:
	case DA9052_CONTROL_B_REG:
	case DA9052_CONTROL_D_REG:
	case DA9052_SUPPLY_REG:
	case DA9052_FAULTLOG_REG:
	case DA9052_CHG_TIME_REG:
	case DA9052_ADC_RES_L_REG:
	case DA9052_ADC_RES_H_REG:
	case DA9052_VDD_RES_REG:
	case DA9052_ICHG_AV_REG:
	case DA9052_TBAT_RES_REG:
	case DA9052_ADCIN4_RES_REG:
	case DA9052_ADCIN5_RES_REG:
	case DA9052_ADCIN6_RES_REG:
	case DA9052_TJUNC_RES_REG:
	case DA9052_TSI_X_MSB_REG:
	case DA9052_TSI_Y_MSB_REG:
	case DA9052_TSI_LSB_REG:
	case DA9052_TSI_Z_MSB_REG:
	case DA9052_COUNT_S_REG:
	case DA9052_COUNT_MI_REG:
	case DA9052_COUNT_H_REG:
	case DA9052_COUNT_D_REG:
	case DA9052_COUNT_MO_REG:
	case DA9052_COUNT_Y_REG:
	case DA9052_ALARM_MI_REG:
		return true;
	default:
		return false;
	}
}

/*
 * TBAT look-up table is computed from the R90 reg (8 bit register)
 * reading as below. The battery temperature is in milliCentigrade
 * TBAT = (1/(t1+1/298) - 273) * 1000 mC
 * where t1 = (1/B)* ln(( ADCval * 2.5)/(R25*ITBAT*255))
 * Default values are R25 = 10e3, B = 3380, ITBAT = 50e-6
 * Example:
 * R25=10E3, B=3380, ITBAT=50e-6, ADCVAL=62d calculates
 * TBAT = 20015 mili degrees Centrigrade
 *
*/
static const int32_t tbat_lookup[255] = {
	183258, 144221, 124334, 111336, 101826, 94397, 88343, 83257,
	78889, 75071, 71688, 68656, 65914, 63414, 61120, 59001,
	570366, 55204, 53490, 51881, 50364, 48931, 47574, 46285,
	45059, 43889, 42772, 41703, 40678, 39694, 38748, 37838,
	36961, 36115, 35297, 34507, 33743, 33002, 32284, 31588,
	30911, 30254, 29615, 28994, 28389, 27799, 27225, 26664,
	26117, 25584, 25062, 24553, 24054, 23567, 23091, 22624,
	22167, 21719, 21281, 20851, 20429, 20015, 19610, 19211,
	18820, 18436, 18058, 17688, 17323, 16965, 16612, 16266,
	15925, 15589, 15259, 14933, 14613, 14298, 13987, 13681,
	13379, 13082, 12788, 12499, 12214, 11933, 11655, 11382,
	11112, 10845, 10582, 10322, 10066, 9812, 9562, 9315,
	9071, 8830, 8591, 8356, 8123, 7893, 7665, 7440,
	7218, 6998, 6780, 6565, 6352, 6141, 5933, 5726,
	5522, 5320, 5120, 4922, 4726, 4532, 4340, 4149,
	3961, 3774, 3589, 3406, 3225, 3045, 2867, 2690,
	2516, 2342, 2170, 2000, 1831, 1664, 1498, 1334,
	1171, 1009, 849, 690, 532, 376, 221, 67,
	-84, -236, -386, -535, -683, -830, -975, -1119,
	-1263, -1405, -1546, -1686, -1825, -1964, -2101, -2237,
	-2372, -2506, -2639, -2771, -2902, -3033, -3162, -3291,
	-3418, -3545, -3671, -3796, -3920, -4044, -4166, -4288,
	-4409, -4529, -4649, -4767, -4885, -5002, -5119, -5235,
	-5349, -5464, -5577, -5690, -5802, -5913, -6024, -6134,
	-6244, -6352, -6461, -6568, -6675, -6781, -6887, -6992,
	-7096, -7200, -7303, -7406, -7508, -7609, -7710, -7810,
	-7910, -8009, -8108, -8206, -8304, -8401, -8497, -8593,
	-8689, -8784, -8878, -8972, -9066, -9159, -9251, -9343,
	-9435, -9526, -9617, -9707, -9796, -9886, -9975, -10063,
	-10151, -10238, -10325, -10412, -10839, -10923, -11007, -11090,
	-11173, -11256, -11338, -11420, -11501, -11583, -11663, -11744,
	-11823, -11903, -11982
};

static const u8 chan_mux[DA9052_ADC_VBBAT + 1] = {
	[DA9052_ADC_VDDOUT]	= DA9052_ADC_MAN_MUXSEL_VDDOUT,
	[DA9052_ADC_ICH]	= DA9052_ADC_MAN_MUXSEL_ICH,
	[DA9052_ADC_TBAT]	= DA9052_ADC_MAN_MUXSEL_TBAT,
	[DA9052_ADC_VBAT]	= DA9052_ADC_MAN_MUXSEL_VBAT,
	[DA9052_ADC_IN4]	= DA9052_ADC_MAN_MUXSEL_AD4,
	[DA9052_ADC_IN5]	= DA9052_ADC_MAN_MUXSEL_AD5,
	[DA9052_ADC_IN6]	= DA9052_ADC_MAN_MUXSEL_AD6,
	[DA9052_ADC_VBBAT]	= DA9052_ADC_MAN_MUXSEL_VBBAT
};

int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel)
{
	int ret;
	unsigned short calc_data;
	unsigned short data;
	unsigned char mux_sel;

	if (channel > DA9052_ADC_VBBAT)
		return -EINVAL;

	mutex_lock(&da9052->auxadc_lock);

	/* Channel gets activated on enabling the Conversion bit */
	mux_sel = chan_mux[channel] | DA9052_ADC_MAN_MAN_CONV;

	ret = da9052_reg_write(da9052, DA9052_ADC_MAN_REG, mux_sel);
	if (ret < 0)
		goto err;

	/* Wait for an interrupt */
	if (!wait_for_completion_timeout(&da9052->done,
					 msecs_to_jiffies(500))) {
		dev_err(da9052->dev,
			"timeout waiting for ADC conversion interrupt\n");
		ret = -ETIMEDOUT;
		goto err;
	}

	ret = da9052_reg_read(da9052, DA9052_ADC_RES_H_REG);
	if (ret < 0)
		goto err;

	calc_data = (unsigned short)ret;
	data = calc_data << 2;

	ret = da9052_reg_read(da9052, DA9052_ADC_RES_L_REG);
	if (ret < 0)
		goto err;

	calc_data = (unsigned short)(ret & DA9052_ADC_RES_LSB);
	data |= calc_data;

	ret = data;

err:
	mutex_unlock(&da9052->auxadc_lock);
	return ret;
}
EXPORT_SYMBOL_GPL(da9052_adc_manual_read);

int da9052_adc_read_temp(struct da9052 *da9052)
{
	int tbat;

	tbat = da9052_reg_read(da9052, DA9052_TBAT_RES_REG);
	if (tbat <= 0)
		return tbat;

	/* ARRAY_SIZE check is not needed since TBAT is a 8-bit register */
	return tbat_lookup[tbat - 1];
}
EXPORT_SYMBOL_GPL(da9052_adc_read_temp);

static const struct mfd_cell da9052_subdev_info[] = {
	{
		.name = "da9052-regulator",
		.id = 1,
	},
	{
		.name = "da9052-regulator",
		.id = 2,
	},
	{
		.name = "da9052-regulator",
		.id = 3,
	},
	{
		.name = "da9052-regulator",
		.id = 4,
	},
	{
		.name = "da9052-regulator",
		.id = 5,
	},
	{
		.name = "da9052-regulator",
		.id = 6,
	},
	{
		.name = "da9052-regulator",
		.id = 7,
	},
	{
		.name = "da9052-regulator",
		.id = 8,
	},
	{
		.name = "da9052-regulator",
		.id = 9,
	},
	{
		.name = "da9052-regulator",
		.id = 10,
	},
	{
		.name = "da9052-regulator",
		.id = 11,
	},
	{
		.name = "da9052-regulator",
		.id = 12,
	},
	{
		.name = "da9052-regulator",
		.id = 13,
	},
	{
		.name = "da9052-regulator",
		.id = 14,
	},
	{
		.name = "da9052-onkey",
	},
	{
		.name = "da9052-rtc",
	},
	{
		.name = "da9052-gpio",
	},
	{
		.name = "da9052-hwmon",
	},
	{
		.name = "da9052-leds",
	},
	{
		.name = "da9052-wled1",
	},
	{
		.name = "da9052-wled2",
	},
	{
		.name = "da9052-wled3",
	},
	{
		.name = "da9052-tsi",
	},
	{
		.name = "da9052-bat",
	},
	{
		.name = "da9052-watchdog",
	},
};

const struct regmap_config da9052_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,

	.cache_type = REGCACHE_RBTREE,

	.max_register = DA9052_PAGE1_CON_REG,
	.readable_reg = da9052_reg_readable,
	.writeable_reg = da9052_reg_writeable,
	.volatile_reg = da9052_reg_volatile,
};
EXPORT_SYMBOL_GPL(da9052_regmap_config);

int da9052_device_init(struct da9052 *da9052, u8 chip_id)
{
	struct da9052_pdata *pdata = dev_get_platdata(da9052->dev);
	int ret;

	mutex_init(&da9052->auxadc_lock);
	init_completion(&da9052->done);

	if (pdata && pdata->init != NULL)
		pdata->init(da9052);

	da9052->chip_id = chip_id;

	ret = da9052_irq_init(da9052);
	if (ret != 0) {
		dev_err(da9052->dev, "da9052_irq_init failed: %d\n", ret);
		return ret;
	}

	ret = mfd_add_devices(da9052->dev, PLATFORM_DEVID_AUTO,
			      da9052_subdev_info,
			      ARRAY_SIZE(da9052_subdev_info), NULL, 0, NULL);
	if (ret) {
		dev_err(da9052->dev, "mfd_add_devices failed: %d\n", ret);
		goto err;
	}

	return 0;

err:
	da9052_irq_exit(da9052);

	return ret;
}

void da9052_device_exit(struct da9052 *da9052)
{
	mfd_remove_devices(da9052->dev);
	da9052_irq_exit(da9052);
}

MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
MODULE_DESCRIPTION("DA9052 MFD Core");
MODULE_LICENSE("GPL");
Commit	Line	Data
84c99db8 AJ	1	/*
	2	* Device access for Dialog DA9052 PMICs.
	3	*
	4	* Copyright(c) 2011 Dialog Semiconductor Ltd.
	5	*
	6	* Author: David Dajun Chen <dchen@diasemi.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*/
	13
	14	#include <linux/device.h>
	15	#include <linux/delay.h>
	16	#include <linux/input.h>
	17	#include <linux/interrupt.h>
84c99db8 AJ	18	#include <linux/mfd/core.h>
	19	#include <linux/slab.h>
	20	#include <linux/module.h>
	21
	22	#include <linux/mfd/da9052/da9052.h>
	23	#include <linux/mfd/da9052/pdata.h>
	24	#include <linux/mfd/da9052/reg.h>
	25
84c99db8 AJ	26	static bool da9052_reg_readable(struct device *dev, unsigned int reg)
	27	{
	28	switch (reg) {
	29	case DA9052_PAGE0_CON_REG:
	30	case DA9052_STATUS_A_REG:
	31	case DA9052_STATUS_B_REG:
	32	case DA9052_STATUS_C_REG:
	33	case DA9052_STATUS_D_REG:
	34	case DA9052_EVENT_A_REG:
	35	case DA9052_EVENT_B_REG:
	36	case DA9052_EVENT_C_REG:
	37	case DA9052_EVENT_D_REG:
	38	case DA9052_FAULTLOG_REG:
	39	case DA9052_IRQ_MASK_A_REG:
	40	case DA9052_IRQ_MASK_B_REG:
	41	case DA9052_IRQ_MASK_C_REG:
	42	case DA9052_IRQ_MASK_D_REG:
	43	case DA9052_CONTROL_A_REG:
	44	case DA9052_CONTROL_B_REG:
	45	case DA9052_CONTROL_C_REG:
	46	case DA9052_CONTROL_D_REG:
	47	case DA9052_PDDIS_REG:
	48	case DA9052_INTERFACE_REG:
	49	case DA9052_RESET_REG:
	50	case DA9052_GPIO_0_1_REG:
	51	case DA9052_GPIO_2_3_REG:
	52	case DA9052_GPIO_4_5_REG:
	53	case DA9052_GPIO_6_7_REG:
	54	case DA9052_GPIO_14_15_REG:
	55	case DA9052_ID_0_1_REG:
	56	case DA9052_ID_2_3_REG:
	57	case DA9052_ID_4_5_REG:
	58	case DA9052_ID_6_7_REG:
	59	case DA9052_ID_8_9_REG:
	60	case DA9052_ID_10_11_REG:
	61	case DA9052_ID_12_13_REG:
	62	case DA9052_ID_14_15_REG:
	63	case DA9052_ID_16_17_REG:
	64	case DA9052_ID_18_19_REG:
	65	case DA9052_ID_20_21_REG:
	66	case DA9052_SEQ_STATUS_REG:
	67	case DA9052_SEQ_A_REG:
	68	case DA9052_SEQ_B_REG:
	69	case DA9052_SEQ_TIMER_REG:
	70	case DA9052_BUCKA_REG:
	71	case DA9052_BUCKB_REG:
	72	case DA9052_BUCKCORE_REG:
	73	case DA9052_BUCKPRO_REG:
	74	case DA9052_BUCKMEM_REG:
	75	case DA9052_BUCKPERI_REG:
	76	case DA9052_LDO1_REG:
	77	case DA9052_LDO2_REG:
	78	case DA9052_LDO3_REG:
	79	case DA9052_LDO4_REG:
	80	case DA9052_LDO5_REG:
	81	case DA9052_LDO6_REG:
	82	case DA9052_LDO7_REG:
	83	case DA9052_LDO8_REG:
	84	case DA9052_LDO9_REG:
	85	case DA9052_LDO10_REG:
	86	case DA9052_SUPPLY_REG:
	87	case DA9052_PULLDOWN_REG:
	88	case DA9052_CHGBUCK_REG:
	89	case DA9052_WAITCONT_REG:
90	case DA9052_ISET_REG:
91	case DA9052_BATCHG_REG:
92	case DA9052_CHG_CONT_REG:
93	case DA9052_INPUT_CONT_REG:
94	case DA9052_CHG_TIME_REG:
95	case DA9052_BBAT_CONT_REG:
96	case DA9052_BOOST_REG:
97	case DA9052_LED_CONT_REG:
98	case DA9052_LEDMIN123_REG:
99	case DA9052_LED1_CONF_REG:
100	case DA9052_LED2_CONF_REG:
101	case DA9052_LED3_CONF_REG:
102	case DA9052_LED1CONT_REG:
103	case DA9052_LED2CONT_REG:
104	case DA9052_LED3CONT_REG:
105	case DA9052_LED_CONT_4_REG:
106	case DA9052_LED_CONT_5_REG:
107	case DA9052_ADC_MAN_REG:
108	case DA9052_ADC_CONT_REG:
109	case DA9052_ADC_RES_L_REG:
110	case DA9052_ADC_RES_H_REG:
111	case DA9052_VDD_RES_REG:
112	case DA9052_VDD_MON_REG:
113	case DA9052_ICHG_AV_REG:
114	case DA9052_ICHG_THD_REG:
115	case DA9052_ICHG_END_REG:
116	case DA9052_TBAT_RES_REG:
117	case DA9052_TBAT_HIGHP_REG:
118	case DA9052_TBAT_HIGHN_REG:
119	case DA9052_TBAT_LOW_REG:
120	case DA9052_T_OFFSET_REG:
121	case DA9052_ADCIN4_RES_REG:
122	case DA9052_AUTO4_HIGH_REG:
123	case DA9052_AUTO4_LOW_REG:
124	case DA9052_ADCIN5_RES_REG:
125	case DA9052_AUTO5_HIGH_REG:
126	case DA9052_AUTO5_LOW_REG:
127	case DA9052_ADCIN6_RES_REG:
128	case DA9052_AUTO6_HIGH_REG:
129	case DA9052_AUTO6_LOW_REG:
130	case DA9052_TJUNC_RES_REG:
131	case DA9052_TSI_CONT_A_REG:
132	case DA9052_TSI_CONT_B_REG:
133	case DA9052_TSI_X_MSB_REG:
134	case DA9052_TSI_Y_MSB_REG:
135	case DA9052_TSI_LSB_REG:
136	case DA9052_TSI_Z_MSB_REG:
137	case DA9052_COUNT_S_REG:
138	case DA9052_COUNT_MI_REG:
139	case DA9052_COUNT_H_REG:
140	case DA9052_COUNT_D_REG:
141	case DA9052_COUNT_MO_REG:
142	case DA9052_COUNT_Y_REG:
143	case DA9052_ALARM_MI_REG:
144	case DA9052_ALARM_H_REG:
145	case DA9052_ALARM_D_REG:
146	case DA9052_ALARM_MO_REG:
147	case DA9052_ALARM_Y_REG:
148	case DA9052_SECOND_A_REG:
149	case DA9052_SECOND_B_REG:
150	case DA9052_SECOND_C_REG:
151	case DA9052_SECOND_D_REG:
152	case DA9052_PAGE1_CON_REG:
153	return true;
154	default:
155	return false;
156	}
157	}
158
159	static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
160	{
161	switch (reg) {
162	case DA9052_PAGE0_CON_REG:
0a92815d AJ	163	case DA9052_EVENT_A_REG:
	164	case DA9052_EVENT_B_REG:
	165	case DA9052_EVENT_C_REG:
	166	case DA9052_EVENT_D_REG:
84c99db8 AJ	167	case DA9052_IRQ_MASK_A_REG:
	168	case DA9052_IRQ_MASK_B_REG:
	169	case DA9052_IRQ_MASK_C_REG:
	170	case DA9052_IRQ_MASK_D_REG:
	171	case DA9052_CONTROL_A_REG:
	172	case DA9052_CONTROL_B_REG:
	173	case DA9052_CONTROL_C_REG:
	174	case DA9052_CONTROL_D_REG:
	175	case DA9052_PDDIS_REG:
	176	case DA9052_RESET_REG:
	177	case DA9052_GPIO_0_1_REG:
	178	case DA9052_GPIO_2_3_REG:
	179	case DA9052_GPIO_4_5_REG:
	180	case DA9052_GPIO_6_7_REG:
	181	case DA9052_GPIO_14_15_REG:
	182	case DA9052_ID_0_1_REG:
	183	case DA9052_ID_2_3_REG:
	184	case DA9052_ID_4_5_REG:
	185	case DA9052_ID_6_7_REG:
	186	case DA9052_ID_8_9_REG:
	187	case DA9052_ID_10_11_REG:
	188	case DA9052_ID_12_13_REG:
	189	case DA9052_ID_14_15_REG:
	190	case DA9052_ID_16_17_REG:
	191	case DA9052_ID_18_19_REG:
	192	case DA9052_ID_20_21_REG:
	193	case DA9052_SEQ_STATUS_REG:
	194	case DA9052_SEQ_A_REG:
	195	case DA9052_SEQ_B_REG:
	196	case DA9052_SEQ_TIMER_REG:
	197	case DA9052_BUCKA_REG:
	198	case DA9052_BUCKB_REG:
	199	case DA9052_BUCKCORE_REG:
	200	case DA9052_BUCKPRO_REG:
	201	case DA9052_BUCKMEM_REG:
	202	case DA9052_BUCKPERI_REG:
	203	case DA9052_LDO1_REG:
	204	case DA9052_LDO2_REG:
	205	case DA9052_LDO3_REG:
	206	case DA9052_LDO4_REG:
	207	case DA9052_LDO5_REG:
	208	case DA9052_LDO6_REG:
	209	case DA9052_LDO7_REG:
	210	case DA9052_LDO8_REG:
	211	case DA9052_LDO9_REG:
	212	case DA9052_LDO10_REG:
	213	case DA9052_SUPPLY_REG:
	214	case DA9052_PULLDOWN_REG:
	215	case DA9052_CHGBUCK_REG:
	216	case DA9052_WAITCONT_REG:
	217	case DA9052_ISET_REG:
	218	case DA9052_BATCHG_REG:
	219	case DA9052_CHG_CONT_REG:
	220	case DA9052_INPUT_CONT_REG:
	221	case DA9052_BBAT_CONT_REG:
	222	case DA9052_BOOST_REG:
	223	case DA9052_LED_CONT_REG:
	224	case DA9052_LEDMIN123_REG:
	225	case DA9052_LED1_CONF_REG:
	226	case DA9052_LED2_CONF_REG:
	227	case DA9052_LED3_CONF_REG:
	228	case DA9052_LED1CONT_REG:
	229	case DA9052_LED2CONT_REG:
	230	case DA9052_LED3CONT_REG:
231	case DA9052_LED_CONT_4_REG:
232	case DA9052_LED_CONT_5_REG:
233	case DA9052_ADC_MAN_REG:
234	case DA9052_ADC_CONT_REG:
235	case DA9052_ADC_RES_L_REG:
236	case DA9052_ADC_RES_H_REG:
237	case DA9052_VDD_RES_REG:
238	case DA9052_VDD_MON_REG:
239	case DA9052_ICHG_THD_REG:
240	case DA9052_ICHG_END_REG:
241	case DA9052_TBAT_HIGHP_REG:
242	case DA9052_TBAT_HIGHN_REG:
243	case DA9052_TBAT_LOW_REG:
244	case DA9052_T_OFFSET_REG:
245	case DA9052_AUTO4_HIGH_REG:
246	case DA9052_AUTO4_LOW_REG:
247	case DA9052_AUTO5_HIGH_REG:
248	case DA9052_AUTO5_LOW_REG:
249	case DA9052_AUTO6_HIGH_REG:
250	case DA9052_AUTO6_LOW_REG:
251	case DA9052_TSI_CONT_A_REG:
252	case DA9052_TSI_CONT_B_REG:
253	case DA9052_COUNT_S_REG:
254	case DA9052_COUNT_MI_REG:
255	case DA9052_COUNT_H_REG:
256	case DA9052_COUNT_D_REG:
257	case DA9052_COUNT_MO_REG:
258	case DA9052_COUNT_Y_REG:
259	case DA9052_ALARM_MI_REG:
260	case DA9052_ALARM_H_REG:
261	case DA9052_ALARM_D_REG:
262	case DA9052_ALARM_MO_REG:
263	case DA9052_ALARM_Y_REG:
264	case DA9052_PAGE1_CON_REG:
265	return true;
266	default:
267	return false;
268	}
269	}
270
271	static bool da9052_reg_volatile(struct device *dev, unsigned int reg)
272	{
273	switch (reg) {
274	case DA9052_STATUS_A_REG:
275	case DA9052_STATUS_B_REG:
276	case DA9052_STATUS_C_REG:
277	case DA9052_STATUS_D_REG:
278	case DA9052_EVENT_A_REG:
279	case DA9052_EVENT_B_REG:
280	case DA9052_EVENT_C_REG:
281	case DA9052_EVENT_D_REG:
bcb5a7d3	282	case DA9052_CONTROL_B_REG:
	283	case DA9052_CONTROL_D_REG:
	284	case DA9052_SUPPLY_REG:
84c99db8 AJ	285	case DA9052_FAULTLOG_REG:
	286	case DA9052_CHG_TIME_REG:
	287	case DA9052_ADC_RES_L_REG:
	288	case DA9052_ADC_RES_H_REG:
	289	case DA9052_VDD_RES_REG:
	290	case DA9052_ICHG_AV_REG:
	291	case DA9052_TBAT_RES_REG:
	292	case DA9052_ADCIN4_RES_REG:
	293	case DA9052_ADCIN5_RES_REG:
	294	case DA9052_ADCIN6_RES_REG:
	295	case DA9052_TJUNC_RES_REG:
	296	case DA9052_TSI_X_MSB_REG:
	297	case DA9052_TSI_Y_MSB_REG:
	298	case DA9052_TSI_LSB_REG:
	299	case DA9052_TSI_Z_MSB_REG:
	300	case DA9052_COUNT_S_REG:
	301	case DA9052_COUNT_MI_REG:
	302	case DA9052_COUNT_H_REG:
	303	case DA9052_COUNT_D_REG:
	304	case DA9052_COUNT_MO_REG:
	305	case DA9052_COUNT_Y_REG:
	306	case DA9052_ALARM_MI_REG:
	307	return true;
	308	default:
	309	return false;
	310	}
	311	}
	312
16e5e204 AJ	313	/*
	314	* TBAT look-up table is computed from the R90 reg (8 bit register)
	315	* reading as below. The battery temperature is in milliCentigrade
	316	* TBAT = (1/(t1+1/298) - 273) * 1000 mC
	317	* where t1 = (1/B)* ln(( ADCval * 2.5)/(R25ITBAT255))
	318	* Default values are R25 = 10e3, B = 3380, ITBAT = 50e-6
	319	* Example:
	320	* R25=10E3, B=3380, ITBAT=50e-6, ADCVAL=62d calculates
	321	* TBAT = 20015 mili degrees Centrigrade
	322	*
	323	*/
	324	static const int32_t tbat_lookup[255] = {
	325	183258, 144221, 124334, 111336, 101826, 94397, 88343, 83257,
	326	78889, 75071, 71688, 68656, 65914, 63414, 61120, 59001,
	327	570366, 55204, 53490, 51881, 50364, 48931, 47574, 46285,
	328	45059, 43889, 42772, 41703, 40678, 39694, 38748, 37838,
	329	36961, 36115, 35297, 34507, 33743, 33002, 32284, 31588,
	330	30911, 30254, 29615, 28994, 28389, 27799, 27225, 26664,
	331	26117, 25584, 25062, 24553, 24054, 23567, 23091, 22624,
	332	22167, 21719, 21281, 20851, 20429, 20015, 19610, 19211,
	333	18820, 18436, 18058, 17688, 17323, 16965, 16612, 16266,
	334	15925, 15589, 15259, 14933, 14613, 14298, 13987, 13681,
	335	13379, 13082, 12788, 12499, 12214, 11933, 11655, 11382,
	336	11112, 10845, 10582, 10322, 10066, 9812, 9562, 9315,
	337	9071, 8830, 8591, 8356, 8123, 7893, 7665, 7440,
	338	7218, 6998, 6780, 6565, 6352, 6141, 5933, 5726,
	339	5522, 5320, 5120, 4922, 4726, 4532, 4340, 4149,
	340	3961, 3774, 3589, 3406, 3225, 3045, 2867, 2690,
	341	2516, 2342, 2170, 2000, 1831, 1664, 1498, 1334,
	342	1171, 1009, 849, 690, 532, 376, 221, 67,
	343	-84, -236, -386, -535, -683, -830, -975, -1119,
	344	-1263, -1405, -1546, -1686, -1825, -1964, -2101, -2237,
	345	-2372, -2506, -2639, -2771, -2902, -3033, -3162, -3291,
	346	-3418, -3545, -3671, -3796, -3920, -4044, -4166, -4288,
	347	-4409, -4529, -4649, -4767, -4885, -5002, -5119, -5235,
	348	-5349, -5464, -5577, -5690, -5802, -5913, -6024, -6134,
	349	-6244, -6352, -6461, -6568, -6675, -6781, -6887, -6992,
	350	-7096, -7200, -7303, -7406, -7508, -7609, -7710, -7810,
	351	-7910, -8009, -8108, -8206, -8304, -8401, -8497, -8593,
	352	-8689, -8784, -8878, -8972, -9066, -9159, -9251, -9343,
	353	-9435, -9526, -9617, -9707, -9796, -9886, -9975, -10063,
	354	-10151, -10238, -10325, -10412, -10839, -10923, -11007, -11090,
	355	-11173, -11256, -11338, -11420, -11501, -11583, -11663, -11744,
	356	-11823, -11903, -11982
	357	};
	358
	359	static const u8 chan_mux[DA9052_ADC_VBBAT + 1] = {
	360	[DA9052_ADC_VDDOUT] = DA9052_ADC_MAN_MUXSEL_VDDOUT,
	361	[DA9052_ADC_ICH] = DA9052_ADC_MAN_MUXSEL_ICH,
	362	[DA9052_ADC_TBAT] = DA9052_ADC_MAN_MUXSEL_TBAT,
	363	[DA9052_ADC_VBAT] = DA9052_ADC_MAN_MUXSEL_VBAT,
	364	[DA9052_ADC_IN4] = DA9052_ADC_MAN_MUXSEL_AD4,
	365	[DA9052_ADC_IN5] = DA9052_ADC_MAN_MUXSEL_AD5,
	366	[DA9052_ADC_IN6] = DA9052_ADC_MAN_MUXSEL_AD6,
	367	[DA9052_ADC_VBBAT] = DA9052_ADC_MAN_MUXSEL_VBBAT
	368	};
	369
	370	int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel)
	371	{
	372	int ret;
	373	unsigned short calc_data;
	374	unsigned short data;
	375	unsigned char mux_sel;
	376
377	if (channel > DA9052_ADC_VBBAT)
378	return -EINVAL;
379
380	mutex_lock(&da9052->auxadc_lock);
381
382	/* Channel gets activated on enabling the Conversion bit */
383	mux_sel = chan_mux[channel] \| DA9052_ADC_MAN_MAN_CONV;
384
385	ret = da9052_reg_write(da9052, DA9052_ADC_MAN_REG, mux_sel);
386	if (ret < 0)
387	goto err;
388
389	/* Wait for an interrupt */
390	if (!wait_for_completion_timeout(&da9052->done,
391	msecs_to_jiffies(500))) {
392	dev_err(da9052->dev,
393	"timeout waiting for ADC conversion interrupt\n");
394	ret = -ETIMEDOUT;
395	goto err;
396	}
397
398	ret = da9052_reg_read(da9052, DA9052_ADC_RES_H_REG);
399	if (ret < 0)
400	goto err;
401
402	calc_data = (unsigned short)ret;
403	data = calc_data << 2;
404
405	ret = da9052_reg_read(da9052, DA9052_ADC_RES_L_REG);
406	if (ret < 0)
407	goto err;
408
409	calc_data = (unsigned short)(ret & DA9052_ADC_RES_LSB);
410	data \|= calc_data;
411
412	ret = data;
413
414	err:
415	mutex_unlock(&da9052->auxadc_lock);
416	return ret;
417	}
418	EXPORT_SYMBOL_GPL(da9052_adc_manual_read);
419
16e5e204 AJ	420	int da9052_adc_read_temp(struct da9052 *da9052)
	421	{
	422	int tbat;
	423
	424	tbat = da9052_reg_read(da9052, DA9052_TBAT_RES_REG);
	425	if (tbat <= 0)
	426	return tbat;
	427
	428	/* ARRAY_SIZE check is not needed since TBAT is a 8-bit register */
	429	return tbat_lookup[tbat - 1];
	430	}
	431	EXPORT_SYMBOL_GPL(da9052_adc_read_temp);
	432
c8f675ff	433	static const struct mfd_cell da9052_subdev_info[] = {
84c99db8 AJ	434	{
	435	.name = "da9052-regulator",
	436	.id = 1,
	437	},
	438	{
	439	.name = "da9052-regulator",
	440	.id = 2,
	441	},
	442	{
	443	.name = "da9052-regulator",
	444	.id = 3,
	445	},
	446	{
	447	.name = "da9052-regulator",
	448	.id = 4,
	449	},
	450	{
	451	.name = "da9052-regulator",
	452	.id = 5,
	453	},
	454	{
	455	.name = "da9052-regulator",
	456	.id = 6,
	457	},
	458	{
	459	.name = "da9052-regulator",
	460	.id = 7,
	461	},
	462	{
	463	.name = "da9052-regulator",
	464	.id = 8,
	465	},
	466	{
	467	.name = "da9052-regulator",
	468	.id = 9,
	469	},
	470	{
	471	.name = "da9052-regulator",
	472	.id = 10,
	473	},
	474	{
	475	.name = "da9052-regulator",
	476	.id = 11,
	477	},
	478	{
	479	.name = "da9052-regulator",
	480	.id = 12,
	481	},
	482	{
	483	.name = "da9052-regulator",
	484	.id = 13,
	485	},
	486	{
	487	.name = "da9052-regulator",
	488	.id = 14,
	489	},
	490	{
	491	.name = "da9052-onkey",
84c99db8 AJ	492	},
	493	{
	494	.name = "da9052-rtc",
84c99db8 AJ	495	},
	496	{
	497	.name = "da9052-gpio",
	498	},
	499	{
	500	.name = "da9052-hwmon",
	501	},
	502	{
	503	.name = "da9052-leds",
	504	},
	505	{
	506	.name = "da9052-wled1",
	507	},
	508	{
	509	.name = "da9052-wled2",
	510	},
	511	{
	512	.name = "da9052-wled3",
	513	},
	514	{
	515	.name = "da9052-tsi",
84c99db8 AJ	516	},
	517	{
	518	.name = "da9052-bat",
84c99db8 AJ	519	},
	520	{
	521	.name = "da9052-watchdog",
	522	},
	523	};
	524
e9e9d397	525	const struct regmap_config da9052_regmap_config = {
84c99db8 AJ	526	.reg_bits = 8,
	527	.val_bits = 8,
	528
	529	.cache_type = REGCACHE_RBTREE,
	530
	531	.max_register = DA9052_PAGE1_CON_REG,
	532	.readable_reg = da9052_reg_readable,
	533	.writeable_reg = da9052_reg_writeable,
	534	.volatile_reg = da9052_reg_volatile,
	535	};
	536	EXPORT_SYMBOL_GPL(da9052_regmap_config);
	537
f791be49	538	int da9052_device_init(struct da9052 *da9052, u8 chip_id)
84c99db8	539	{
334a41ce	540	struct da9052_pdata *pdata = dev_get_platdata(da9052->dev);
84c99db8 AJ	541	int ret;
84c99db8 AJ	542
16e5e204 AJ	543	mutex_init(&da9052->auxadc_lock);
	544	init_completion(&da9052->done);
	545
84c99db8 AJ	546	if (pdata && pdata->init != NULL)
	547	pdata->init(da9052);
	548
	549	da9052->chip_id = chip_id;
	550
8bad1abd FE	551	ret = da9052_irq_init(da9052);
	552	if (ret != 0) {
	553	dev_err(da9052->dev, "da9052_irq_init failed: %d\n", ret);
	554	return ret;
ffe20b68	555	}
16e5e204	556
b3f6c73d FE	557	ret = mfd_add_devices(da9052->dev, PLATFORM_DEVID_AUTO,
b3f6c73d FE	558	da9052_subdev_info,
0848c94f	559	ARRAY_SIZE(da9052_subdev_info), NULL, 0, NULL);
ffe20b68 FE	560	if (ret) {
ffe20b68 FE	561	dev_err(da9052->dev, "mfd_add_devices failed: %d\n", ret);
84c99db8	562	goto err;
ffe20b68	563	}
84c99db8 AJ	564
	565	return 0;
	566
	567	err:
8bad1abd FE	568	da9052_irq_exit(da9052);
8bad1abd FE	569
84c99db8 AJ	570	return ret;
	571	}
	572
	573	void da9052_device_exit(struct da9052 *da9052)
	574	{
84c99db8	575	mfd_remove_devices(da9052->dev);
8bad1abd	576	da9052_irq_exit(da9052);
84c99db8 AJ	577	}
	578
	579	MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
	580	MODULE_DESCRIPTION("DA9052 MFD Core");
	581	MODULE_LICENSE("GPL");