Commit | Line | Data |
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a1635b8f PZ |
1 | /* |
2 | * Support for the GPIO/IRQ expander chips present on several HTC phones. | |
3 | * These are implemented in CPLD chips present on the board. | |
4 | * | |
5 | * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net> | |
6 | * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com> | |
7 | * | |
8 | * This file may be distributed under the terms of the GNU GPL license. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/irq.h> | |
15 | #include <linux/io.h> | |
16 | #include <linux/spinlock.h> | |
17 | #include <linux/platform_device.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
a1635b8f PZ |
19 | #include <linux/module.h> |
20 | #include <linux/mfd/htc-egpio.h> | |
21 | ||
22 | struct egpio_chip { | |
23 | int reg_start; | |
24 | int cached_values; | |
25 | unsigned long is_out; | |
26 | struct device *dev; | |
27 | struct gpio_chip chip; | |
28 | }; | |
29 | ||
30 | struct egpio_info { | |
31 | spinlock_t lock; | |
32 | ||
33 | /* iomem info */ | |
34 | void __iomem *base_addr; | |
35 | int bus_shift; /* byte shift */ | |
36 | int reg_shift; /* bit shift */ | |
37 | int reg_mask; | |
38 | ||
39 | /* irq info */ | |
40 | int ack_register; | |
41 | int ack_write; | |
42 | u16 irqs_enabled; | |
43 | uint irq_start; | |
44 | int nirqs; | |
45 | uint chained_irq; | |
46 | ||
47 | /* egpio info */ | |
48 | struct egpio_chip *chip; | |
49 | int nchips; | |
50 | }; | |
51 | ||
52 | static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg) | |
53 | { | |
54 | writew(value, ei->base_addr + (reg << ei->bus_shift)); | |
55 | } | |
56 | ||
57 | static inline u16 egpio_readw(struct egpio_info *ei, int reg) | |
58 | { | |
59 | return readw(ei->base_addr + (reg << ei->bus_shift)); | |
60 | } | |
61 | ||
62 | /* | |
63 | * IRQs | |
64 | */ | |
65 | ||
66 | static inline void ack_irqs(struct egpio_info *ei) | |
67 | { | |
68 | egpio_writew(ei->ack_write, ei, ei->ack_register); | |
69 | pr_debug("EGPIO ack - write %x to base+%x\n", | |
70 | ei->ack_write, ei->ack_register << ei->bus_shift); | |
71 | } | |
72 | ||
73 | static void egpio_ack(unsigned int irq) | |
74 | { | |
75 | } | |
76 | ||
77 | /* There does not appear to be a way to proactively mask interrupts | |
78 | * on the egpio chip itself. So, we simply ignore interrupts that | |
79 | * aren't desired. */ | |
80 | static void egpio_mask(unsigned int irq) | |
81 | { | |
82 | struct egpio_info *ei = get_irq_chip_data(irq); | |
83 | ei->irqs_enabled &= ~(1 << (irq - ei->irq_start)); | |
84 | pr_debug("EGPIO mask %d %04x\n", irq, ei->irqs_enabled); | |
85 | } | |
86 | static void egpio_unmask(unsigned int irq) | |
87 | { | |
88 | struct egpio_info *ei = get_irq_chip_data(irq); | |
89 | ei->irqs_enabled |= 1 << (irq - ei->irq_start); | |
90 | pr_debug("EGPIO unmask %d %04x\n", irq, ei->irqs_enabled); | |
91 | } | |
92 | ||
93 | static struct irq_chip egpio_muxed_chip = { | |
94 | .name = "htc-egpio", | |
95 | .ack = egpio_ack, | |
96 | .mask = egpio_mask, | |
97 | .unmask = egpio_unmask, | |
98 | }; | |
99 | ||
100 | static void egpio_handler(unsigned int irq, struct irq_desc *desc) | |
101 | { | |
102 | struct egpio_info *ei = get_irq_data(irq); | |
103 | int irqpin; | |
104 | ||
105 | /* Read current pins. */ | |
106 | unsigned long readval = egpio_readw(ei, ei->ack_register); | |
107 | pr_debug("IRQ reg: %x\n", (unsigned int)readval); | |
108 | /* Ack/unmask interrupts. */ | |
109 | ack_irqs(ei); | |
110 | /* Process all set pins. */ | |
111 | readval &= ei->irqs_enabled; | |
984b3f57 | 112 | for_each_set_bit(irqpin, &readval, ei->nirqs) { |
a1635b8f PZ |
113 | /* Run irq handler */ |
114 | pr_debug("got IRQ %d\n", irqpin); | |
115 | irq = ei->irq_start + irqpin; | |
08678b08 | 116 | desc = irq_to_desc(irq); |
a1635b8f PZ |
117 | desc->handle_irq(irq, desc); |
118 | } | |
119 | } | |
120 | ||
121 | int htc_egpio_get_wakeup_irq(struct device *dev) | |
122 | { | |
123 | struct egpio_info *ei = dev_get_drvdata(dev); | |
124 | ||
125 | /* Read current pins. */ | |
126 | u16 readval = egpio_readw(ei, ei->ack_register); | |
127 | /* Ack/unmask interrupts. */ | |
128 | ack_irqs(ei); | |
129 | /* Return first set pin. */ | |
130 | readval &= ei->irqs_enabled; | |
131 | return ei->irq_start + ffs(readval) - 1; | |
132 | } | |
133 | EXPORT_SYMBOL(htc_egpio_get_wakeup_irq); | |
134 | ||
135 | static inline int egpio_pos(struct egpio_info *ei, int bit) | |
136 | { | |
137 | return bit >> ei->reg_shift; | |
138 | } | |
139 | ||
140 | static inline int egpio_bit(struct egpio_info *ei, int bit) | |
141 | { | |
142 | return 1 << (bit & ((1 << ei->reg_shift)-1)); | |
143 | } | |
144 | ||
145 | /* | |
146 | * Input pins | |
147 | */ | |
148 | ||
149 | static int egpio_get(struct gpio_chip *chip, unsigned offset) | |
150 | { | |
151 | struct egpio_chip *egpio; | |
152 | struct egpio_info *ei; | |
153 | unsigned bit; | |
154 | int reg; | |
155 | int value; | |
156 | ||
157 | pr_debug("egpio_get_value(%d)\n", chip->base + offset); | |
158 | ||
159 | egpio = container_of(chip, struct egpio_chip, chip); | |
160 | ei = dev_get_drvdata(egpio->dev); | |
161 | bit = egpio_bit(ei, offset); | |
162 | reg = egpio->reg_start + egpio_pos(ei, offset); | |
163 | ||
164 | value = egpio_readw(ei, reg); | |
165 | pr_debug("readw(%p + %x) = %x\n", | |
166 | ei->base_addr, reg << ei->bus_shift, value); | |
167 | return value & bit; | |
168 | } | |
169 | ||
170 | static int egpio_direction_input(struct gpio_chip *chip, unsigned offset) | |
171 | { | |
172 | struct egpio_chip *egpio; | |
173 | ||
174 | egpio = container_of(chip, struct egpio_chip, chip); | |
175 | return test_bit(offset, &egpio->is_out) ? -EINVAL : 0; | |
176 | } | |
177 | ||
178 | ||
179 | /* | |
180 | * Output pins | |
181 | */ | |
182 | ||
183 | static void egpio_set(struct gpio_chip *chip, unsigned offset, int value) | |
184 | { | |
185 | unsigned long flag; | |
186 | struct egpio_chip *egpio; | |
187 | struct egpio_info *ei; | |
188 | unsigned bit; | |
189 | int pos; | |
190 | int reg; | |
191 | int shift; | |
192 | ||
193 | pr_debug("egpio_set(%s, %d(%d), %d)\n", | |
194 | chip->label, offset, offset+chip->base, value); | |
195 | ||
196 | egpio = container_of(chip, struct egpio_chip, chip); | |
197 | ei = dev_get_drvdata(egpio->dev); | |
198 | bit = egpio_bit(ei, offset); | |
199 | pos = egpio_pos(ei, offset); | |
200 | reg = egpio->reg_start + pos; | |
201 | shift = pos << ei->reg_shift; | |
202 | ||
203 | pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear", | |
204 | reg, (egpio->cached_values >> shift) & ei->reg_mask); | |
205 | ||
206 | spin_lock_irqsave(&ei->lock, flag); | |
207 | if (value) | |
208 | egpio->cached_values |= (1 << offset); | |
209 | else | |
210 | egpio->cached_values &= ~(1 << offset); | |
211 | egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg); | |
212 | spin_unlock_irqrestore(&ei->lock, flag); | |
213 | } | |
214 | ||
215 | static int egpio_direction_output(struct gpio_chip *chip, | |
216 | unsigned offset, int value) | |
217 | { | |
218 | struct egpio_chip *egpio; | |
219 | ||
220 | egpio = container_of(chip, struct egpio_chip, chip); | |
221 | if (test_bit(offset, &egpio->is_out)) { | |
222 | egpio_set(chip, offset, value); | |
223 | return 0; | |
224 | } else { | |
225 | return -EINVAL; | |
226 | } | |
227 | } | |
228 | ||
229 | static void egpio_write_cache(struct egpio_info *ei) | |
230 | { | |
231 | int i; | |
232 | struct egpio_chip *egpio; | |
233 | int shift; | |
234 | ||
235 | for (i = 0; i < ei->nchips; i++) { | |
236 | egpio = &(ei->chip[i]); | |
237 | if (!egpio->is_out) | |
238 | continue; | |
239 | ||
240 | for (shift = 0; shift < egpio->chip.ngpio; | |
241 | shift += (1<<ei->reg_shift)) { | |
242 | ||
243 | int reg = egpio->reg_start + egpio_pos(ei, shift); | |
244 | ||
245 | if (!((egpio->is_out >> shift) & ei->reg_mask)) | |
246 | continue; | |
247 | ||
248 | pr_debug("EGPIO: setting %x to %x, was %x\n", reg, | |
249 | (egpio->cached_values >> shift) & ei->reg_mask, | |
250 | egpio_readw(ei, reg)); | |
251 | ||
252 | egpio_writew((egpio->cached_values >> shift) | |
253 | & ei->reg_mask, ei, reg); | |
254 | } | |
255 | } | |
256 | } | |
257 | ||
258 | ||
259 | /* | |
260 | * Setup | |
261 | */ | |
262 | ||
263 | static int __init egpio_probe(struct platform_device *pdev) | |
264 | { | |
265 | struct htc_egpio_platform_data *pdata = pdev->dev.platform_data; | |
266 | struct resource *res; | |
267 | struct egpio_info *ei; | |
268 | struct gpio_chip *chip; | |
269 | unsigned int irq, irq_end; | |
270 | int i; | |
271 | int ret; | |
272 | ||
273 | /* Initialize ei data structure. */ | |
274 | ei = kzalloc(sizeof(*ei), GFP_KERNEL); | |
275 | if (!ei) | |
276 | return -ENOMEM; | |
277 | ||
278 | spin_lock_init(&ei->lock); | |
279 | ||
280 | /* Find chained irq */ | |
281 | ret = -EINVAL; | |
282 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
283 | if (res) | |
284 | ei->chained_irq = res->start; | |
285 | ||
286 | /* Map egpio chip into virtual address space. */ | |
287 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
288 | if (!res) | |
289 | goto fail; | |
9427c34b | 290 | ei->base_addr = ioremap_nocache(res->start, resource_size(res)); |
a1635b8f PZ |
291 | if (!ei->base_addr) |
292 | goto fail; | |
504f97f8 | 293 | pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr); |
a1635b8f PZ |
294 | |
295 | if ((pdata->bus_width != 16) && (pdata->bus_width != 32)) | |
296 | goto fail; | |
297 | ei->bus_shift = fls(pdata->bus_width - 1) - 3; | |
298 | pr_debug("bus_shift = %d\n", ei->bus_shift); | |
299 | ||
300 | if ((pdata->reg_width != 8) && (pdata->reg_width != 16)) | |
301 | goto fail; | |
302 | ei->reg_shift = fls(pdata->reg_width - 1); | |
303 | pr_debug("reg_shift = %d\n", ei->reg_shift); | |
304 | ||
305 | ei->reg_mask = (1 << pdata->reg_width) - 1; | |
306 | ||
307 | platform_set_drvdata(pdev, ei); | |
308 | ||
309 | ei->nchips = pdata->num_chips; | |
310 | ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL); | |
720fd66d | 311 | if (!ei->chip) { |
a1635b8f PZ |
312 | ret = -ENOMEM; |
313 | goto fail; | |
314 | } | |
315 | for (i = 0; i < ei->nchips; i++) { | |
316 | ei->chip[i].reg_start = pdata->chip[i].reg_start; | |
317 | ei->chip[i].cached_values = pdata->chip[i].initial_values; | |
318 | ei->chip[i].is_out = pdata->chip[i].direction; | |
319 | ei->chip[i].dev = &(pdev->dev); | |
320 | chip = &(ei->chip[i].chip); | |
321 | chip->label = "htc-egpio"; | |
d8f388d8 DB |
322 | chip->dev = &pdev->dev; |
323 | chip->owner = THIS_MODULE; | |
a1635b8f PZ |
324 | chip->get = egpio_get; |
325 | chip->set = egpio_set; | |
326 | chip->direction_input = egpio_direction_input; | |
327 | chip->direction_output = egpio_direction_output; | |
328 | chip->base = pdata->chip[i].gpio_base; | |
329 | chip->ngpio = pdata->chip[i].num_gpios; | |
330 | ||
331 | gpiochip_add(chip); | |
332 | } | |
333 | ||
334 | /* Set initial pin values */ | |
335 | egpio_write_cache(ei); | |
336 | ||
337 | ei->irq_start = pdata->irq_base; | |
338 | ei->nirqs = pdata->num_irqs; | |
339 | ei->ack_register = pdata->ack_register; | |
340 | ||
341 | if (ei->chained_irq) { | |
342 | /* Setup irq handlers */ | |
343 | ei->ack_write = 0xFFFF; | |
344 | if (pdata->invert_acks) | |
345 | ei->ack_write = 0; | |
346 | irq_end = ei->irq_start + ei->nirqs; | |
347 | for (irq = ei->irq_start; irq < irq_end; irq++) { | |
348 | set_irq_chip(irq, &egpio_muxed_chip); | |
349 | set_irq_chip_data(irq, ei); | |
350 | set_irq_handler(irq, handle_simple_irq); | |
351 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
352 | } | |
353 | set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING); | |
354 | set_irq_data(ei->chained_irq, ei); | |
355 | set_irq_chained_handler(ei->chained_irq, egpio_handler); | |
356 | ack_irqs(ei); | |
357 | ||
358 | device_init_wakeup(&pdev->dev, 1); | |
359 | } | |
360 | ||
361 | return 0; | |
362 | ||
363 | fail: | |
364 | printk(KERN_ERR "EGPIO failed to setup\n"); | |
365 | kfree(ei); | |
366 | return ret; | |
367 | } | |
368 | ||
369 | static int __exit egpio_remove(struct platform_device *pdev) | |
370 | { | |
371 | struct egpio_info *ei = platform_get_drvdata(pdev); | |
372 | unsigned int irq, irq_end; | |
373 | ||
374 | if (ei->chained_irq) { | |
375 | irq_end = ei->irq_start + ei->nirqs; | |
376 | for (irq = ei->irq_start; irq < irq_end; irq++) { | |
377 | set_irq_chip(irq, NULL); | |
378 | set_irq_handler(irq, NULL); | |
379 | set_irq_flags(irq, 0); | |
380 | } | |
381 | set_irq_chained_handler(ei->chained_irq, NULL); | |
382 | device_init_wakeup(&pdev->dev, 0); | |
383 | } | |
384 | iounmap(ei->base_addr); | |
385 | kfree(ei->chip); | |
386 | kfree(ei); | |
387 | ||
388 | return 0; | |
389 | } | |
390 | ||
391 | #ifdef CONFIG_PM | |
392 | static int egpio_suspend(struct platform_device *pdev, pm_message_t state) | |
393 | { | |
394 | struct egpio_info *ei = platform_get_drvdata(pdev); | |
395 | ||
396 | if (ei->chained_irq && device_may_wakeup(&pdev->dev)) | |
397 | enable_irq_wake(ei->chained_irq); | |
398 | return 0; | |
399 | } | |
400 | ||
401 | static int egpio_resume(struct platform_device *pdev) | |
402 | { | |
403 | struct egpio_info *ei = platform_get_drvdata(pdev); | |
404 | ||
405 | if (ei->chained_irq && device_may_wakeup(&pdev->dev)) | |
406 | disable_irq_wake(ei->chained_irq); | |
407 | ||
408 | /* Update registers from the cache, in case | |
409 | the CPLD was powered off during suspend */ | |
410 | egpio_write_cache(ei); | |
411 | return 0; | |
412 | } | |
413 | #else | |
414 | #define egpio_suspend NULL | |
415 | #define egpio_resume NULL | |
416 | #endif | |
417 | ||
418 | ||
419 | static struct platform_driver egpio_driver = { | |
420 | .driver = { | |
421 | .name = "htc-egpio", | |
422 | }, | |
423 | .remove = __exit_p(egpio_remove), | |
424 | .suspend = egpio_suspend, | |
425 | .resume = egpio_resume, | |
426 | }; | |
427 | ||
428 | static int __init egpio_init(void) | |
429 | { | |
430 | return platform_driver_probe(&egpio_driver, egpio_probe); | |
431 | } | |
432 | ||
433 | static void __exit egpio_exit(void) | |
434 | { | |
435 | platform_driver_unregister(&egpio_driver); | |
436 | } | |
437 | ||
438 | /* start early for dependencies */ | |
439 | subsys_initcall(egpio_init); | |
440 | module_exit(egpio_exit) | |
441 | ||
442 | MODULE_LICENSE("GPL"); | |
443 | MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>"); |