[deliverable/linux.git] / drivers / mfd / mc13xxx-core.c

/*
 * Copyright 2009-2010 Pengutronix
 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
 *
 * loosely based on an earlier driver that has
 * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
 *
 * This program is free software; you can redistribute it and/or modify it under
 * the terms of the GNU General Public License version 2 as published by the
 * Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/mfd/core.h>

#include "mc13xxx.h"

#define MC13XXX_IRQSTAT0	0
#define MC13XXX_IRQMASK0	1
#define MC13XXX_IRQSTAT1	3
#define MC13XXX_IRQMASK1	4

#define MC13XXX_REVISION	7
#define MC13XXX_REVISION_REVMETAL	(0x07 <<  0)
#define MC13XXX_REVISION_REVFULL	(0x03 <<  3)
#define MC13XXX_REVISION_ICID		(0x07 <<  6)
#define MC13XXX_REVISION_FIN		(0x03 <<  9)
#define MC13XXX_REVISION_FAB		(0x03 << 11)
#define MC13XXX_REVISION_ICIDCODE	(0x3f << 13)

#define MC34708_REVISION_REVMETAL	(0x07 <<  0)
#define MC34708_REVISION_REVFULL	(0x07 <<  3)
#define MC34708_REVISION_FIN		(0x07 <<  6)
#define MC34708_REVISION_FAB		(0x07 <<  9)

#define MC13XXX_ADC1		44
#define MC13XXX_ADC1_ADEN		(1 << 0)
#define MC13XXX_ADC1_RAND		(1 << 1)
#define MC13XXX_ADC1_ADSEL		(1 << 3)
#define MC13XXX_ADC1_ASC		(1 << 20)
#define MC13XXX_ADC1_ADTRIGIGN		(1 << 21)

#define MC13XXX_ADC2		45

void mc13xxx_lock(struct mc13xxx *mc13xxx)
{
	if (!mutex_trylock(&mc13xxx->lock)) {
		dev_dbg(mc13xxx->dev, "wait for %s from %pf\n",
				__func__, __builtin_return_address(0));

		mutex_lock(&mc13xxx->lock);
	}
	dev_dbg(mc13xxx->dev, "%s from %pf\n",
			__func__, __builtin_return_address(0));
}
EXPORT_SYMBOL(mc13xxx_lock);

void mc13xxx_unlock(struct mc13xxx *mc13xxx)
{
	dev_dbg(mc13xxx->dev, "%s from %pf\n",
			__func__, __builtin_return_address(0));
	mutex_unlock(&mc13xxx->lock);
}
EXPORT_SYMBOL(mc13xxx_unlock);

int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val)
{
	int ret;

	ret = regmap_read(mc13xxx->regmap, offset, val);
	dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val);

	return ret;
}
EXPORT_SYMBOL(mc13xxx_reg_read);

int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val)
{
	dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val);

	if (val >= BIT(24))
		return -EINVAL;

	return regmap_write(mc13xxx->regmap, offset, val);
}
EXPORT_SYMBOL(mc13xxx_reg_write);

int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
		u32 mask, u32 val)
{
	BUG_ON(val & ~mask);
	dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n",
			offset, val, mask);

	return regmap_update_bits(mc13xxx->regmap, offset, mask, val);
}
EXPORT_SYMBOL(mc13xxx_reg_rmw);

int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq)
{
	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);

	disable_irq_nosync(virq);

	return 0;
}
EXPORT_SYMBOL(mc13xxx_irq_mask);

int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq)
{
	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);

	enable_irq(virq);

	return 0;
}
EXPORT_SYMBOL(mc13xxx_irq_unmask);

int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
		int *enabled, int *pending)
{
	int ret;
	unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1;
	unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1;
	u32 irqbit = 1 << (irq < 24 ? irq : irq - 24);

	if (irq < 0 || irq >= ARRAY_SIZE(mc13xxx->irqs))
		return -EINVAL;

	if (enabled) {
		u32 mask;

		ret = mc13xxx_reg_read(mc13xxx, offmask, &mask);
		if (ret)
			return ret;

		*enabled = mask & irqbit;
	}

	if (pending) {
		u32 stat;

		ret = mc13xxx_reg_read(mc13xxx, offstat, &stat);
		if (ret)
			return ret;

		*pending = stat & irqbit;
	}

	return 0;
}
EXPORT_SYMBOL(mc13xxx_irq_status);

int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
		irq_handler_t handler, const char *name, void *dev)
{
	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);

	return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler,
					 0, name, dev);
}
EXPORT_SYMBOL(mc13xxx_irq_request);

int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev)
{
	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);

	devm_free_irq(mc13xxx->dev, virq, dev);

	return 0;
}
EXPORT_SYMBOL(mc13xxx_irq_free);

#define maskval(reg, mask)	(((reg) & (mask)) >> __ffs(mask))
static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision)
{
	dev_info(mc13xxx->dev, "%s: rev: %d.%d, "
			"fin: %d, fab: %d, icid: %d/%d\n",
			mc13xxx->variant->name,
			maskval(revision, MC13XXX_REVISION_REVFULL),
			maskval(revision, MC13XXX_REVISION_REVMETAL),
			maskval(revision, MC13XXX_REVISION_FIN),
			maskval(revision, MC13XXX_REVISION_FAB),
			maskval(revision, MC13XXX_REVISION_ICID),
			maskval(revision, MC13XXX_REVISION_ICIDCODE));
}

static void mc34708_print_revision(struct mc13xxx *mc13xxx, u32 revision)
{
	dev_info(mc13xxx->dev, "%s: rev %d.%d, fin: %d, fab: %d\n",
			mc13xxx->variant->name,
			maskval(revision, MC34708_REVISION_REVFULL),
			maskval(revision, MC34708_REVISION_REVMETAL),
			maskval(revision, MC34708_REVISION_FIN),
			maskval(revision, MC34708_REVISION_FAB));
}

/* These are only exported for mc13xxx-i2c and mc13xxx-spi */
struct mc13xxx_variant mc13xxx_variant_mc13783 = {
	.name = "mc13783",
	.print_revision = mc13xxx_print_revision,
};
EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13783);

struct mc13xxx_variant mc13xxx_variant_mc13892 = {
	.name = "mc13892",
	.print_revision = mc13xxx_print_revision,
};
EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13892);

struct mc13xxx_variant mc13xxx_variant_mc34708 = {
	.name = "mc34708",
	.print_revision = mc34708_print_revision,
};
EXPORT_SYMBOL_GPL(mc13xxx_variant_mc34708);

static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx)
{
	return mc13xxx->variant->name;
}

int mc13xxx_get_flags(struct mc13xxx *mc13xxx)
{
	return mc13xxx->flags;
}
EXPORT_SYMBOL(mc13xxx_get_flags);

#define MC13XXX_ADC1_CHAN0_SHIFT	5
#define MC13XXX_ADC1_CHAN1_SHIFT	8
#define MC13783_ADC1_ATO_SHIFT		11
#define MC13783_ADC1_ATOX		(1 << 19)

struct mc13xxx_adcdone_data {
	struct mc13xxx *mc13xxx;
	struct completion done;
};

static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data)
{
	struct mc13xxx_adcdone_data *adcdone_data = data;

	complete_all(&adcdone_data->done);

	return IRQ_HANDLED;
}

#define MC13XXX_ADC_WORKING (1 << 0)

int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,
		unsigned int channel, u8 ato, bool atox,
		unsigned int *sample)
{
	u32 adc0, adc1, old_adc0;
	int i, ret;
	struct mc13xxx_adcdone_data adcdone_data = {
		.mc13xxx = mc13xxx,
	};
	init_completion(&adcdone_data.done);

	dev_dbg(mc13xxx->dev, "%s\n", __func__);

	mc13xxx_lock(mc13xxx);

	if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) {
		ret = -EBUSY;
		goto out;
	}

	mc13xxx->adcflags |= MC13XXX_ADC_WORKING;

	mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0);

	adc0 = MC13XXX_ADC0_ADINC1 | MC13XXX_ADC0_ADINC2;
	adc1 = MC13XXX_ADC1_ADEN | MC13XXX_ADC1_ADTRIGIGN | MC13XXX_ADC1_ASC;

	if (channel > 7)
		adc1 |= MC13XXX_ADC1_ADSEL;

	switch (mode) {
	case MC13XXX_ADC_MODE_TS:
		adc0 |= MC13XXX_ADC0_ADREFEN | MC13XXX_ADC0_TSMOD0 |
			MC13XXX_ADC0_TSMOD1;
		adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
		break;

	case MC13XXX_ADC_MODE_SINGLE_CHAN:
		adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
		adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT;
		adc1 |= MC13XXX_ADC1_RAND;
		break;

	case MC13XXX_ADC_MODE_MULT_CHAN:
		adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
		adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
		break;

	default:
		mc13xxx_unlock(mc13xxx);
		return -EINVAL;
	}

	adc1 |= ato << MC13783_ADC1_ATO_SHIFT;
	if (atox)
		adc1 |= MC13783_ADC1_ATOX;

	dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__);
	mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE,
			mc13xxx_handler_adcdone, __func__, &adcdone_data);

	mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0);
	mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1);

	mc13xxx_unlock(mc13xxx);

	ret = wait_for_completion_interruptible_timeout(&adcdone_data.done, HZ);

	if (!ret)
		ret = -ETIMEDOUT;

	mc13xxx_lock(mc13xxx);

	mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data);

	if (ret > 0)
		for (i = 0; i < 4; ++i) {
			ret = mc13xxx_reg_read(mc13xxx,
					MC13XXX_ADC2, &sample[i]);
			if (ret)
				break;
		}

	if (mode == MC13XXX_ADC_MODE_TS)
		/* restore TSMOD */
		mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0);

	mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING;
out:
	mc13xxx_unlock(mc13xxx);

	return ret;
}
EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion);

static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
		const char *format, void *pdata, size_t pdata_size)
{
	char buf[30];
	const char *name = mc13xxx_get_chipname(mc13xxx);

	struct mfd_cell cell = {
		.platform_data = pdata,
		.pdata_size = pdata_size,
	};

	/* there is no asnprintf in the kernel :-( */
	if (snprintf(buf, sizeof(buf), format, name) > sizeof(buf))
		return -E2BIG;

	cell.name = kmemdup(buf, strlen(buf) + 1, GFP_KERNEL);
	if (!cell.name)
		return -ENOMEM;

	return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0,
			       regmap_irq_get_domain(mc13xxx->irq_data));
}

static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format)
{
	return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL, 0);
}

#ifdef CONFIG_OF
static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
{
	struct device_node *np = mc13xxx->dev->of_node;

	if (!np)
		return -ENODEV;

	if (of_get_property(np, "fsl,mc13xxx-uses-adc", NULL))
		mc13xxx->flags |= MC13XXX_USE_ADC;

	if (of_get_property(np, "fsl,mc13xxx-uses-codec", NULL))
		mc13xxx->flags |= MC13XXX_USE_CODEC;

	if (of_get_property(np, "fsl,mc13xxx-uses-rtc", NULL))
		mc13xxx->flags |= MC13XXX_USE_RTC;

	if (of_get_property(np, "fsl,mc13xxx-uses-touch", NULL))
		mc13xxx->flags |= MC13XXX_USE_TOUCHSCREEN;

	return 0;
}
#else
static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
{
	return -ENODEV;
}
#endif

int mc13xxx_common_init(struct device *dev)
{
	struct mc13xxx_platform_data *pdata = dev_get_platdata(dev);
	struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
	u32 revision;
	int i, ret;

	mc13xxx->dev = dev;

	ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision);
	if (ret)
		return ret;

	mc13xxx->variant->print_revision(mc13xxx, revision);

	for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) {
		mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG;
		mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG);
	}

	mc13xxx->irq_chip.name = dev_name(dev);
	mc13xxx->irq_chip.status_base = MC13XXX_IRQSTAT0;
	mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0;
	mc13xxx->irq_chip.ack_base = MC13XXX_IRQSTAT0;
	mc13xxx->irq_chip.irq_reg_stride = MC13XXX_IRQSTAT1 - MC13XXX_IRQSTAT0;
	mc13xxx->irq_chip.init_ack_masked = true;
	mc13xxx->irq_chip.use_ack = true;
	mc13xxx->irq_chip.num_regs = MC13XXX_IRQ_REG_CNT;
	mc13xxx->irq_chip.irqs = mc13xxx->irqs;
	mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs);

	ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT,
				  0, &mc13xxx->irq_chip, &mc13xxx->irq_data);
	if (ret)
		return ret;

	mutex_init(&mc13xxx->lock);

	if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata)
		mc13xxx->flags = pdata->flags;

	if (pdata) {
		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator",
			&pdata->regulators, sizeof(pdata->regulators));
		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led",
				pdata->leds, sizeof(*pdata->leds));
		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-pwrbutton",
				pdata->buttons, sizeof(*pdata->buttons));
		if (mc13xxx->flags & MC13XXX_USE_CODEC)
			mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec",
				pdata->codec, sizeof(*pdata->codec));
		if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
			mc13xxx_add_subdevice_pdata(mc13xxx, "%s-ts",
				&pdata->touch, sizeof(pdata->touch));
	} else {
		mc13xxx_add_subdevice(mc13xxx, "%s-regulator");
		mc13xxx_add_subdevice(mc13xxx, "%s-led");
		mc13xxx_add_subdevice(mc13xxx, "%s-pwrbutton");
		if (mc13xxx->flags & MC13XXX_USE_CODEC)
			mc13xxx_add_subdevice(mc13xxx, "%s-codec");
		if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
			mc13xxx_add_subdevice(mc13xxx, "%s-ts");
	}

	if (mc13xxx->flags & MC13XXX_USE_ADC)
		mc13xxx_add_subdevice(mc13xxx, "%s-adc");

	if (mc13xxx->flags & MC13XXX_USE_RTC)
		mc13xxx_add_subdevice(mc13xxx, "%s-rtc");

	return 0;
}
EXPORT_SYMBOL_GPL(mc13xxx_common_init);

int mc13xxx_common_exit(struct device *dev)
{
	struct mc13xxx *mc13xxx = dev_get_drvdata(dev);

	mfd_remove_devices(dev);
	regmap_del_irq_chip(mc13xxx->irq, mc13xxx->irq_data);
	mutex_destroy(&mc13xxx->lock);

	return 0;
}
EXPORT_SYMBOL_GPL(mc13xxx_common_exit);

MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC");
MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
8e005935 UKK	1	/*
	2	* Copyright 2009-2010 Pengutronix
	3	* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
	4	*
	5	* loosely based on an earlier driver that has
	6	* Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
	7	*
	8	* This program is free software; you can redistribute it and/or modify it under
	9	* the terms of the GNU General Public License version 2 as published by the
	10	* Free Software Foundation.
	11	*/
8e005935	12
8e005935	13	#include <linux/module.h>
876989d5 SG	14	#include <linux/of.h>
876989d5 SG	15	#include <linux/of_device.h>
10f9edae AS	16	#include <linux/platform_device.h>
10f9edae AS	17	#include <linux/mfd/core.h>
8e005935	18
a0c7c1d4	19	#include "mc13xxx.h"
8e005935	20
8e005935	21	#define MC13XXX_IRQSTAT0 0
8e005935	22	#define MC13XXX_IRQMASK0 1
8e005935	23	#define MC13XXX_IRQSTAT1 3
8e005935	24	#define MC13XXX_IRQMASK1 4
8e005935 UKK	25
	26	#define MC13XXX_REVISION 7
	27	#define MC13XXX_REVISION_REVMETAL (0x07 << 0)
	28	#define MC13XXX_REVISION_REVFULL (0x03 << 3)
	29	#define MC13XXX_REVISION_ICID (0x07 << 6)
	30	#define MC13XXX_REVISION_FIN (0x03 << 9)
	31	#define MC13XXX_REVISION_FAB (0x03 << 11)
	32	#define MC13XXX_REVISION_ICIDCODE (0x3f << 13)
	33
0312e024 UKK	34	#define MC34708_REVISION_REVMETAL (0x07 << 0)
	35	#define MC34708_REVISION_REVFULL (0x07 << 3)
	36	#define MC34708_REVISION_FIN (0x07 << 6)
	37	#define MC34708_REVISION_FAB (0x07 << 9)
	38
fec316d6 UKK	39	#define MC13XXX_ADC1 44
	40	#define MC13XXX_ADC1_ADEN (1 << 0)
	41	#define MC13XXX_ADC1_RAND (1 << 1)
	42	#define MC13XXX_ADC1_ADSEL (1 << 3)
	43	#define MC13XXX_ADC1_ASC (1 << 20)
	44	#define MC13XXX_ADC1_ADTRIGIGN (1 << 21)
8e005935	45
fec316d6	46	#define MC13XXX_ADC2 45
8e005935	47
8e005935 UKK	48	void mc13xxx_lock(struct mc13xxx *mc13xxx)
	49	{
	50	if (!mutex_trylock(&mc13xxx->lock)) {
5006fe54	51	dev_dbg(mc13xxx->dev, "wait for %s from %pf\n",
8e005935 UKK	52	__func__, __builtin_return_address(0));
	53
	54	mutex_lock(&mc13xxx->lock);
	55	}
5006fe54	56	dev_dbg(mc13xxx->dev, "%s from %pf\n",
8e005935 UKK	57	__func__, __builtin_return_address(0));
	58	}
	59	EXPORT_SYMBOL(mc13xxx_lock);
	60
	61	void mc13xxx_unlock(struct mc13xxx *mc13xxx)
	62	{
5006fe54	63	dev_dbg(mc13xxx->dev, "%s from %pf\n",
8e005935 UKK	64	__func__, __builtin_return_address(0));
	65	mutex_unlock(&mc13xxx->lock);
	66	}
	67	EXPORT_SYMBOL(mc13xxx_unlock);
	68
8e005935 UKK	69	int mc13xxx_reg_read(struct mc13xxx mc13xxx, unsigned int offset, u32 val)
8e005935 UKK	70	{
8e005935 UKK	71	int ret;
8e005935 UKK	72
91b5e741	73	ret = regmap_read(mc13xxx->regmap, offset, val);
5006fe54	74	dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val);
8e005935	75
5006fe54	76	return ret;
8e005935 UKK	77	}
	78	EXPORT_SYMBOL(mc13xxx_reg_read);
	79
	80	int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val)
	81	{
5006fe54	82	dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val);
8e005935	83
328fe79c	84	if (val >= BIT(24))
8e005935 UKK	85	return -EINVAL;
8e005935 UKK	86
91b5e741	87	return regmap_write(mc13xxx->regmap, offset, val);
8e005935 UKK	88	}
	89	EXPORT_SYMBOL(mc13xxx_reg_write);
	90
	91	int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
	92	u32 mask, u32 val)
	93	{
8e005935	94	BUG_ON(val & ~mask);
91b5e741 MR	95	dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n",
91b5e741 MR	96	offset, val, mask);
8e005935	97
91b5e741	98	return regmap_update_bits(mc13xxx->regmap, offset, mask, val);
8e005935 UKK	99	}
	100	EXPORT_SYMBOL(mc13xxx_reg_rmw);
	101
	102	int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq)
	103	{
10f9edae	104	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
8e005935	105
10f9edae	106	disable_irq_nosync(virq);
8e005935	107
10f9edae	108	return 0;
8e005935 UKK	109	}
	110	EXPORT_SYMBOL(mc13xxx_irq_mask);
	111
	112	int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq)
	113	{
10f9edae	114	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
8e005935	115
10f9edae	116	enable_irq(virq);
8e005935	117
10f9edae	118	return 0;
8e005935 UKK	119	}
	120	EXPORT_SYMBOL(mc13xxx_irq_unmask);
	121
	122	int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
	123	int enabled, int pending)
	124	{
	125	int ret;
	126	unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1;
	127	unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1;
	128	u32 irqbit = 1 << (irq < 24 ? irq : irq - 24);
	129
10f9edae	130	if (irq < 0 \|\| irq >= ARRAY_SIZE(mc13xxx->irqs))
8e005935 UKK	131	return -EINVAL;
	132
	133	if (enabled) {
	134	u32 mask;
	135
	136	ret = mc13xxx_reg_read(mc13xxx, offmask, &mask);
	137	if (ret)
	138	return ret;
	139
	140	*enabled = mask & irqbit;
	141	}
	142
	143	if (pending) {
	144	u32 stat;
	145
	146	ret = mc13xxx_reg_read(mc13xxx, offstat, &stat);
	147	if (ret)
	148	return ret;
	149
	150	*pending = stat & irqbit;
	151	}
	152
	153	return 0;
	154	}
	155	EXPORT_SYMBOL(mc13xxx_irq_status);
	156
8e005935 UKK	157	int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
	158	irq_handler_t handler, const char name, void dev)
	159	{
10f9edae	160	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
8e005935	161
10f9edae AS	162	return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler,
10f9edae AS	163	0, name, dev);
8e005935 UKK	164	}
	165	EXPORT_SYMBOL(mc13xxx_irq_request);
	166
	167	int mc13xxx_irq_free(struct mc13xxx mc13xxx, int irq, void dev)
	168	{
10f9edae	169	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
8e005935	170
10f9edae	171	devm_free_irq(mc13xxx->dev, virq, dev);
8e005935 UKK	172
	173	return 0;
	174	}
	175	EXPORT_SYMBOL(mc13xxx_irq_free);
	176
8e005935	177	#define maskval(reg, mask) (((reg) & (mask)) >> __ffs(mask))
cd0f34b0	178	static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision)
8e005935	179	{
cd0f34b0 UKK	180	dev_info(mc13xxx->dev, "%s: rev: %d.%d, "
	181	"fin: %d, fab: %d, icid: %d/%d\n",
	182	mc13xxx->variant->name,
	183	maskval(revision, MC13XXX_REVISION_REVFULL),
	184	maskval(revision, MC13XXX_REVISION_REVMETAL),
	185	maskval(revision, MC13XXX_REVISION_FIN),
	186	maskval(revision, MC13XXX_REVISION_FAB),
	187	maskval(revision, MC13XXX_REVISION_ICID),
	188	maskval(revision, MC13XXX_REVISION_ICIDCODE));
	189	}
8e005935	190
0312e024 UKK	191	static void mc34708_print_revision(struct mc13xxx *mc13xxx, u32 revision)
	192	{
	193	dev_info(mc13xxx->dev, "%s: rev %d.%d, fin: %d, fab: %d\n",
	194	mc13xxx->variant->name,
	195	maskval(revision, MC34708_REVISION_REVFULL),
	196	maskval(revision, MC34708_REVISION_REVMETAL),
	197	maskval(revision, MC34708_REVISION_FIN),
	198	maskval(revision, MC34708_REVISION_FAB));
	199	}
	200
cd0f34b0 UKK	201	/* These are only exported for mc13xxx-i2c and mc13xxx-spi */
	202	struct mc13xxx_variant mc13xxx_variant_mc13783 = {
	203	.name = "mc13783",
	204	.print_revision = mc13xxx_print_revision,
	205	};
	206	EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13783);
8e005935	207
cd0f34b0 UKK	208	struct mc13xxx_variant mc13xxx_variant_mc13892 = {
	209	.name = "mc13892",
	210	.print_revision = mc13xxx_print_revision,
	211	};
	212	EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13892);
8e005935	213
0312e024 UKK	214	struct mc13xxx_variant mc13xxx_variant_mc34708 = {
	215	.name = "mc34708",
	216	.print_revision = mc34708_print_revision,
	217	};
	218	EXPORT_SYMBOL_GPL(mc13xxx_variant_mc34708);
	219
8e005935 UKK	220	static const char mc13xxx_get_chipname(struct mc13xxx mc13xxx)
8e005935 UKK	221	{
cd0f34b0	222	return mc13xxx->variant->name;
8e005935 UKK	223	}
8e005935 UKK	224
8e005935 UKK	225	int mc13xxx_get_flags(struct mc13xxx *mc13xxx)
8e005935 UKK	226	{
876989d5	227	return mc13xxx->flags;
8e005935 UKK	228	}
	229	EXPORT_SYMBOL(mc13xxx_get_flags);
	230
fec316d6 UKK	231	#define MC13XXX_ADC1_CHAN0_SHIFT 5
fec316d6 UKK	232	#define MC13XXX_ADC1_CHAN1_SHIFT 8
1039d762 MT	233	#define MC13783_ADC1_ATO_SHIFT 11
1039d762 MT	234	#define MC13783_ADC1_ATOX (1 << 19)
8e005935 UKK	235
	236	struct mc13xxx_adcdone_data {
	237	struct mc13xxx *mc13xxx;
	238	struct completion done;
	239	};
	240
fec316d6	241	static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data)
8e005935 UKK	242	{
	243	struct mc13xxx_adcdone_data *adcdone_data = data;
	244
8e005935 UKK	245	complete_all(&adcdone_data->done);
	246
	247	return IRQ_HANDLED;
	248	}
	249
fec316d6	250	#define MC13XXX_ADC_WORKING (1 << 0)
8e005935	251
fec316d6	252	int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,
1039d762 MT	253	unsigned int channel, u8 ato, bool atox,
1039d762 MT	254	unsigned int *sample)
8e005935	255	{
8e005935 UKK	256	u32 adc0, adc1, old_adc0;
	257	int i, ret;
	258	struct mc13xxx_adcdone_data adcdone_data = {
	259	.mc13xxx = mc13xxx,
	260	};
	261	init_completion(&adcdone_data.done);
	262
5006fe54	263	dev_dbg(mc13xxx->dev, "%s\n", __func__);
8e005935 UKK	264
	265	mc13xxx_lock(mc13xxx);
	266
fec316d6	267	if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) {
8e005935 UKK	268	ret = -EBUSY;
	269	goto out;
	270	}
	271
fec316d6	272	mc13xxx->adcflags \|= MC13XXX_ADC_WORKING;
8e005935	273
fec316d6	274	mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0);
8e005935	275
fec316d6 UKK	276	adc0 = MC13XXX_ADC0_ADINC1 \| MC13XXX_ADC0_ADINC2;
fec316d6 UKK	277	adc1 = MC13XXX_ADC1_ADEN \| MC13XXX_ADC1_ADTRIGIGN \| MC13XXX_ADC1_ASC;
8e005935 UKK	278
8e005935 UKK	279	if (channel > 7)
fec316d6	280	adc1 \|= MC13XXX_ADC1_ADSEL;
8e005935 UKK	281
8e005935 UKK	282	switch (mode) {
fec316d6 UKK	283	case MC13XXX_ADC_MODE_TS:
	284	adc0 \|= MC13XXX_ADC0_ADREFEN \| MC13XXX_ADC0_TSMOD0 \|
	285	MC13XXX_ADC0_TSMOD1;
	286	adc1 \|= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
8e005935 UKK	287	break;
8e005935 UKK	288
fec316d6	289	case MC13XXX_ADC_MODE_SINGLE_CHAN:
2161891a	290	adc0 \|= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
fec316d6 UKK	291	adc1 \|= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT;
fec316d6 UKK	292	adc1 \|= MC13XXX_ADC1_RAND;
8e005935 UKK	293	break;
8e005935 UKK	294
fec316d6	295	case MC13XXX_ADC_MODE_MULT_CHAN:
2161891a	296	adc0 \|= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
fec316d6	297	adc1 \|= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
8e005935 UKK	298	break;
	299
	300	default:
fec316d6	301	mc13xxx_unlock(mc13xxx);
8e005935 UKK	302	return -EINVAL;
	303	}
	304
1039d762 MT	305	adc1 \|= ato << MC13783_ADC1_ATO_SHIFT;
	306	if (atox)
	307	adc1 \|= MC13783_ADC1_ATOX;
5006fe54 MR	308
5006fe54 MR	309	dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__);
fec316d6 UKK	310	mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE,
fec316d6 UKK	311	mc13xxx_handler_adcdone, __func__, &adcdone_data);
8e005935	312
fec316d6 UKK	313	mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0);
fec316d6 UKK	314	mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1);
8e005935 UKK	315
	316	mc13xxx_unlock(mc13xxx);
	317
	318	ret = wait_for_completion_interruptible_timeout(&adcdone_data.done, HZ);
	319
	320	if (!ret)
	321	ret = -ETIMEDOUT;
	322
	323	mc13xxx_lock(mc13xxx);
	324
fec316d6	325	mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data);
8e005935 UKK	326
	327	if (ret > 0)
	328	for (i = 0; i < 4; ++i) {
	329	ret = mc13xxx_reg_read(mc13xxx,
fec316d6	330	MC13XXX_ADC2, &sample[i]);
8e005935 UKK	331	if (ret)
	332	break;
	333	}
	334
fec316d6	335	if (mode == MC13XXX_ADC_MODE_TS)
8e005935	336	/* restore TSMOD */
fec316d6	337	mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0);
8e005935	338
fec316d6	339	mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING;
8e005935 UKK	340	out:
	341	mc13xxx_unlock(mc13xxx);
	342
	343	return ret;
	344	}
fec316d6	345	EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion);
8e005935 UKK	346
8e005935 UKK	347	static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
c8a03c96	348	const char format, void pdata, size_t pdata_size)
8e005935 UKK	349	{
	350	char buf[30];
	351	const char *name = mc13xxx_get_chipname(mc13xxx);
	352
	353	struct mfd_cell cell = {
c8a03c96 SO	354	.platform_data = pdata,
c8a03c96 SO	355	.pdata_size = pdata_size,
8e005935 UKK	356	};
	357
	358	/* there is no asnprintf in the kernel :-( */
	359	if (snprintf(buf, sizeof(buf), format, name) > sizeof(buf))
	360	return -E2BIG;
	361
	362	cell.name = kmemdup(buf, strlen(buf) + 1, GFP_KERNEL);
	363	if (!cell.name)
	364	return -ENOMEM;
	365
10f9edae AS	366	return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0,
10f9edae AS	367	regmap_irq_get_domain(mc13xxx->irq_data));
8e005935 UKK	368	}
	369
	370	static int mc13xxx_add_subdevice(struct mc13xxx mc13xxx, const char format)
	371	{
c8a03c96	372	return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL, 0);
8e005935 UKK	373	}
8e005935 UKK	374
876989d5 SG	375	#ifdef CONFIG_OF
	376	static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
	377	{
91b5e741	378	struct device_node *np = mc13xxx->dev->of_node;
876989d5 SG	379
	380	if (!np)
	381	return -ENODEV;
	382
	383	if (of_get_property(np, "fsl,mc13xxx-uses-adc", NULL))
	384	mc13xxx->flags \|= MC13XXX_USE_ADC;
	385
	386	if (of_get_property(np, "fsl,mc13xxx-uses-codec", NULL))
	387	mc13xxx->flags \|= MC13XXX_USE_CODEC;
	388
	389	if (of_get_property(np, "fsl,mc13xxx-uses-rtc", NULL))
	390	mc13xxx->flags \|= MC13XXX_USE_RTC;
	391
	392	if (of_get_property(np, "fsl,mc13xxx-uses-touch", NULL))
	393	mc13xxx->flags \|= MC13XXX_USE_TOUCHSCREEN;
	394
	395	return 0;
	396	}
	397	#else
	398	static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
	399	{
	400	return -ENODEV;
	401	}
	402	#endif
	403
db9ef449	404	int mc13xxx_common_init(struct device *dev)
8e005935	405	{
db9ef449 AS	406	struct mc13xxx_platform_data *pdata = dev_get_platdata(dev);
db9ef449 AS	407	struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
cd0f34b0	408	u32 revision;
10f9edae	409	int i, ret;
8e005935	410
db9ef449	411	mc13xxx->dev = dev;
8e005935	412
cd0f34b0	413	ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision);
5006fe54	414	if (ret)
db9ef449	415	return ret;
8e005935	416
cd0f34b0 UKK	417	mc13xxx->variant->print_revision(mc13xxx, revision);
cd0f34b0 UKK	418
10f9edae AS	419	for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) {
	420	mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG;
	421	mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG);
	422	}
8e005935	423
10f9edae AS	424	mc13xxx->irq_chip.name = dev_name(dev);
	425	mc13xxx->irq_chip.status_base = MC13XXX_IRQSTAT0;
	426	mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0;
	427	mc13xxx->irq_chip.ack_base = MC13XXX_IRQSTAT0;
	428	mc13xxx->irq_chip.irq_reg_stride = MC13XXX_IRQSTAT1 - MC13XXX_IRQSTAT0;
	429	mc13xxx->irq_chip.init_ack_masked = true;
	430	mc13xxx->irq_chip.use_ack = true;
	431	mc13xxx->irq_chip.num_regs = MC13XXX_IRQ_REG_CNT;
	432	mc13xxx->irq_chip.irqs = mc13xxx->irqs;
	433	mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs);
	434
	435	ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT,
	436	0, &mc13xxx->irq_chip, &mc13xxx->irq_data);
8e005935	437	if (ret)
db9ef449	438	return ret;
8e005935	439
48ca9a52 FE	440	mutex_init(&mc13xxx->lock);
48ca9a52 FE	441
876989d5 SG	442	if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata)
	443	mc13xxx->flags = pdata->flags;
	444
876989d5 SG	445	if (pdata) {
	446	mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator",
	447	&pdata->regulators, sizeof(pdata->regulators));
c8a03c96 SO	448	mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led",
c8a03c96 SO	449	pdata->leds, sizeof(*pdata->leds));
30fc7ac3 PR	450	mc13xxx_add_subdevice_pdata(mc13xxx, "%s-pwrbutton",
30fc7ac3 PR	451	pdata->buttons, sizeof(*pdata->buttons));
a2ff8459 AS	452	if (mc13xxx->flags & MC13XXX_USE_CODEC)
	453	mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec",
	454	pdata->codec, sizeof(*pdata->codec));
	455	if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
	456	mc13xxx_add_subdevice_pdata(mc13xxx, "%s-ts",
	457	&pdata->touch, sizeof(pdata->touch));
876989d5 SG	458	} else {
	459	mc13xxx_add_subdevice(mc13xxx, "%s-regulator");
	460	mc13xxx_add_subdevice(mc13xxx, "%s-led");
	461	mc13xxx_add_subdevice(mc13xxx, "%s-pwrbutton");
a2ff8459 AS	462	if (mc13xxx->flags & MC13XXX_USE_CODEC)
	463	mc13xxx_add_subdevice(mc13xxx, "%s-codec");
	464	if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
	465	mc13xxx_add_subdevice(mc13xxx, "%s-ts");
876989d5	466	}
30fc7ac3	467
10f9edae AS	468	if (mc13xxx->flags & MC13XXX_USE_ADC)
	469	mc13xxx_add_subdevice(mc13xxx, "%s-adc");
	470
	471	if (mc13xxx->flags & MC13XXX_USE_RTC)
	472	mc13xxx_add_subdevice(mc13xxx, "%s-rtc");
	473
8e005935 UKK	474	return 0;
8e005935 UKK	475	}
a0c7c1d4	476	EXPORT_SYMBOL_GPL(mc13xxx_common_init);
8e005935	477
db9ef449	478	int mc13xxx_common_exit(struct device *dev)
8e005935	479	{
db9ef449 AS	480	struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
db9ef449 AS	481
db9ef449	482	mfd_remove_devices(dev);
10f9edae	483	regmap_del_irq_chip(mc13xxx->irq, mc13xxx->irq_data);
db9ef449	484	mutex_destroy(&mc13xxx->lock);
8e005935	485
db9ef449	486	return 0;
8e005935	487	}
db9ef449	488	EXPORT_SYMBOL_GPL(mc13xxx_common_exit);
8e005935 UKK	489
	490	MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC");
	491	MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
	492	MODULE_LICENSE("GPL v2");