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67d16a46 WW |
1 | /* Driver for Realtek PCI-Express card reader |
2 | * | |
3 | * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2, or (at your option) any | |
8 | * later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along | |
16 | * with this program; if not, see <http://www.gnu.org/licenses/>. | |
17 | * | |
18 | * Author: | |
19 | * Wei WANG <wei_wang@realsil.com.cn> | |
20 | * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/mfd/rtsx_pci.h> | |
26 | ||
27 | #include "rtsx_pcr.h" | |
28 | ||
29 | static u8 rts5209_get_ic_version(struct rtsx_pcr *pcr) | |
30 | { | |
31 | u8 val; | |
32 | ||
33 | val = rtsx_pci_readb(pcr, 0x1C); | |
34 | return val & 0x0F; | |
35 | } | |
36 | ||
773ccdfd | 37 | static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr) |
67d16a46 | 38 | { |
773ccdfd | 39 | u32 reg; |
67d16a46 | 40 | |
773ccdfd WW |
41 | rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®); |
42 | dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); | |
67d16a46 | 43 | |
773ccdfd WW |
44 | if (rts5209_vendor_setting1_valid(reg)) { |
45 | if (rts5209_reg_check_ms_pmos(reg)) | |
46 | pcr->flags |= PCR_MS_PMOS; | |
47 | pcr->aspm_en = rts5209_reg_to_aspm(reg); | |
48 | } | |
49 | ||
50 | rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®); | |
51 | dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); | |
52 | ||
53 | if (rts5209_vendor_setting2_valid(reg)) { | |
54 | pcr->sd30_drive_sel_1v8 = | |
55 | rts5209_reg_to_sd30_drive_sel_1v8(reg); | |
56 | pcr->sd30_drive_sel_3v3 = | |
57 | rts5209_reg_to_sd30_drive_sel_3v3(reg); | |
58 | pcr->card_drive_sel = rts5209_reg_to_card_drive_sel(reg); | |
67d16a46 WW |
59 | } |
60 | } | |
61 | ||
eb891c65 | 62 | static void rts5209_force_power_down(struct rtsx_pcr *pcr, u8 pm_state) |
5947c167 WW |
63 | { |
64 | rtsx_pci_write_register(pcr, FPDCTL, 0x07, 0x07); | |
65 | } | |
66 | ||
67d16a46 WW |
67 | static int rts5209_extra_init_hw(struct rtsx_pcr *pcr) |
68 | { | |
69 | rtsx_pci_init_cmd(pcr); | |
70 | ||
71 | /* Turn off LED */ | |
72 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03); | |
7140812c WW |
73 | /* Reset ASPM state to default value */ |
74 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); | |
75 | /* Force CLKREQ# PIN to drive 0 to request clock */ | |
76 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08); | |
67d16a46 WW |
77 | /* Configure GPIO as output */ |
78 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO_DIR, 0xFF, 0x03); | |
773ccdfd WW |
79 | /* Configure driving */ |
80 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL, | |
81 | 0xFF, pcr->sd30_drive_sel_3v3); | |
67d16a46 WW |
82 | |
83 | return rtsx_pci_send_cmd(pcr, 100); | |
84 | } | |
85 | ||
86 | static int rts5209_optimize_phy(struct rtsx_pcr *pcr) | |
87 | { | |
88 | return rtsx_pci_write_phy_register(pcr, 0x00, 0xB966); | |
89 | } | |
90 | ||
91 | static int rts5209_turn_on_led(struct rtsx_pcr *pcr) | |
92 | { | |
93 | return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x00); | |
94 | } | |
95 | ||
96 | static int rts5209_turn_off_led(struct rtsx_pcr *pcr) | |
97 | { | |
98 | return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x01); | |
99 | } | |
100 | ||
101 | static int rts5209_enable_auto_blink(struct rtsx_pcr *pcr) | |
102 | { | |
103 | return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0xFF, 0x0D); | |
104 | } | |
105 | ||
106 | static int rts5209_disable_auto_blink(struct rtsx_pcr *pcr) | |
107 | { | |
108 | return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0x08, 0x00); | |
109 | } | |
110 | ||
111 | static int rts5209_card_power_on(struct rtsx_pcr *pcr, int card) | |
112 | { | |
113 | int err; | |
114 | u8 pwr_mask, partial_pwr_on, pwr_on; | |
115 | ||
116 | pwr_mask = SD_POWER_MASK; | |
117 | partial_pwr_on = SD_PARTIAL_POWER_ON; | |
118 | pwr_on = SD_POWER_ON; | |
119 | ||
773ccdfd | 120 | if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) { |
67d16a46 WW |
121 | pwr_mask = MS_POWER_MASK; |
122 | partial_pwr_on = MS_PARTIAL_POWER_ON; | |
123 | pwr_on = MS_POWER_ON; | |
124 | } | |
125 | ||
126 | rtsx_pci_init_cmd(pcr); | |
127 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, | |
128 | pwr_mask, partial_pwr_on); | |
129 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, | |
130 | LDO3318_PWR_MASK, 0x04); | |
131 | err = rtsx_pci_send_cmd(pcr, 100); | |
132 | if (err < 0) | |
133 | return err; | |
134 | ||
135 | /* To avoid too large in-rush current */ | |
136 | udelay(150); | |
137 | ||
138 | rtsx_pci_init_cmd(pcr); | |
139 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, pwr_mask, pwr_on); | |
140 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, | |
141 | LDO3318_PWR_MASK, 0x00); | |
142 | err = rtsx_pci_send_cmd(pcr, 100); | |
143 | if (err < 0) | |
144 | return err; | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
149 | static int rts5209_card_power_off(struct rtsx_pcr *pcr, int card) | |
150 | { | |
151 | u8 pwr_mask, pwr_off; | |
152 | ||
153 | pwr_mask = SD_POWER_MASK; | |
154 | pwr_off = SD_POWER_OFF; | |
155 | ||
773ccdfd | 156 | if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) { |
67d16a46 WW |
157 | pwr_mask = MS_POWER_MASK; |
158 | pwr_off = MS_POWER_OFF; | |
159 | } | |
160 | ||
161 | rtsx_pci_init_cmd(pcr); | |
162 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, | |
163 | pwr_mask | PMOS_STRG_MASK, pwr_off | PMOS_STRG_400mA); | |
164 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, | |
773ccdfd | 165 | LDO3318_PWR_MASK, 0x06); |
67d16a46 WW |
166 | return rtsx_pci_send_cmd(pcr, 100); |
167 | } | |
168 | ||
d817ac4e WW |
169 | static int rts5209_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) |
170 | { | |
171 | int err; | |
172 | ||
173 | if (voltage == OUTPUT_3V3) { | |
88a7ee37 | 174 | err = rtsx_pci_write_register(pcr, |
773ccdfd | 175 | SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3); |
88a7ee37 RT |
176 | if (err < 0) |
177 | return err; | |
d817ac4e WW |
178 | err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24); |
179 | if (err < 0) | |
180 | return err; | |
181 | } else if (voltage == OUTPUT_1V8) { | |
88a7ee37 | 182 | err = rtsx_pci_write_register(pcr, |
773ccdfd | 183 | SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8); |
88a7ee37 RT |
184 | if (err < 0) |
185 | return err; | |
d817ac4e WW |
186 | err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24); |
187 | if (err < 0) | |
188 | return err; | |
189 | } else { | |
190 | return -EINVAL; | |
191 | } | |
192 | ||
193 | return 0; | |
194 | } | |
195 | ||
67d16a46 | 196 | static const struct pcr_ops rts5209_pcr_ops = { |
773ccdfd | 197 | .fetch_vendor_settings = rts5209_fetch_vendor_settings, |
67d16a46 WW |
198 | .extra_init_hw = rts5209_extra_init_hw, |
199 | .optimize_phy = rts5209_optimize_phy, | |
200 | .turn_on_led = rts5209_turn_on_led, | |
201 | .turn_off_led = rts5209_turn_off_led, | |
202 | .enable_auto_blink = rts5209_enable_auto_blink, | |
203 | .disable_auto_blink = rts5209_disable_auto_blink, | |
204 | .card_power_on = rts5209_card_power_on, | |
205 | .card_power_off = rts5209_card_power_off, | |
d817ac4e | 206 | .switch_output_voltage = rts5209_switch_output_voltage, |
67d16a46 | 207 | .cd_deglitch = NULL, |
ab4e8f8b | 208 | .conv_clk_and_div_n = NULL, |
5947c167 | 209 | .force_power_down = rts5209_force_power_down, |
67d16a46 WW |
210 | }; |
211 | ||
212 | /* SD Pull Control Enable: | |
213 | * SD_DAT[3:0] ==> pull up | |
214 | * SD_CD ==> pull up | |
215 | * SD_WP ==> pull up | |
216 | * SD_CMD ==> pull up | |
217 | * SD_CLK ==> pull down | |
218 | */ | |
219 | static const u32 rts5209_sd_pull_ctl_enable_tbl[] = { | |
220 | RTSX_REG_PAIR(CARD_PULL_CTL1, 0xAA), | |
221 | RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA), | |
222 | RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9), | |
223 | 0, | |
224 | }; | |
225 | ||
226 | /* SD Pull Control Disable: | |
227 | * SD_DAT[3:0] ==> pull down | |
228 | * SD_CD ==> pull up | |
229 | * SD_WP ==> pull down | |
230 | * SD_CMD ==> pull down | |
231 | * SD_CLK ==> pull down | |
232 | */ | |
233 | static const u32 rts5209_sd_pull_ctl_disable_tbl[] = { | |
234 | RTSX_REG_PAIR(CARD_PULL_CTL1, 0x55), | |
235 | RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55), | |
236 | RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5), | |
237 | 0, | |
238 | }; | |
239 | ||
240 | /* MS Pull Control Enable: | |
241 | * MS CD ==> pull up | |
242 | * others ==> pull down | |
243 | */ | |
244 | static const u32 rts5209_ms_pull_ctl_enable_tbl[] = { | |
245 | RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55), | |
246 | RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55), | |
247 | RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15), | |
248 | 0, | |
249 | }; | |
250 | ||
251 | /* MS Pull Control Disable: | |
252 | * MS CD ==> pull up | |
253 | * others ==> pull down | |
254 | */ | |
255 | static const u32 rts5209_ms_pull_ctl_disable_tbl[] = { | |
256 | RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55), | |
257 | RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55), | |
258 | RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15), | |
259 | 0, | |
260 | }; | |
261 | ||
262 | void rts5209_init_params(struct rtsx_pcr *pcr) | |
263 | { | |
264 | pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | | |
265 | EXTRA_CAPS_SD_SDR104 | EXTRA_CAPS_MMC_8BIT; | |
266 | pcr->num_slots = 2; | |
267 | pcr->ops = &rts5209_pcr_ops; | |
268 | ||
773ccdfd WW |
269 | pcr->flags = 0; |
270 | pcr->card_drive_sel = RTS5209_CARD_DRIVE_DEFAULT; | |
271 | pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B; | |
272 | pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D; | |
273 | pcr->aspm_en = ASPM_L1_EN; | |
67d16a46 WW |
274 | |
275 | pcr->ic_version = rts5209_get_ic_version(pcr); | |
276 | pcr->sd_pull_ctl_enable_tbl = rts5209_sd_pull_ctl_enable_tbl; | |
277 | pcr->sd_pull_ctl_disable_tbl = rts5209_sd_pull_ctl_disable_tbl; | |
278 | pcr->ms_pull_ctl_enable_tbl = rts5209_ms_pull_ctl_enable_tbl; | |
279 | pcr->ms_pull_ctl_disable_tbl = rts5209_ms_pull_ctl_disable_tbl; | |
280 | } |