Commit | Line | Data |
---|---|---|
27e34995 | 1 | /* |
1a6e4b74 VK |
2 | * ST Microelectronics MFD: stmpe's driver |
3 | * | |
27e34995 RV |
4 | * Copyright (C) ST-Ericsson SA 2010 |
5 | * | |
6 | * License Terms: GNU General Public License, version 2 | |
7 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson | |
8 | */ | |
9 | ||
73de16db | 10 | #include <linux/gpio.h> |
dba61c8f | 11 | #include <linux/export.h> |
27e34995 | 12 | #include <linux/kernel.h> |
27e34995 RV |
13 | #include <linux/interrupt.h> |
14 | #include <linux/irq.h> | |
1a6e4b74 | 15 | #include <linux/pm.h> |
27e34995 | 16 | #include <linux/slab.h> |
27e34995 | 17 | #include <linux/mfd/core.h> |
27e34995 RV |
18 | #include "stmpe.h" |
19 | ||
20 | static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks) | |
21 | { | |
22 | return stmpe->variant->enable(stmpe, blocks, true); | |
23 | } | |
24 | ||
25 | static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks) | |
26 | { | |
27 | return stmpe->variant->enable(stmpe, blocks, false); | |
28 | } | |
29 | ||
30 | static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg) | |
31 | { | |
32 | int ret; | |
33 | ||
1a6e4b74 | 34 | ret = stmpe->ci->read_byte(stmpe, reg); |
27e34995 | 35 | if (ret < 0) |
1a6e4b74 | 36 | dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret); |
27e34995 RV |
37 | |
38 | dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret); | |
39 | ||
40 | return ret; | |
41 | } | |
42 | ||
43 | static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) | |
44 | { | |
45 | int ret; | |
46 | ||
47 | dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val); | |
48 | ||
1a6e4b74 | 49 | ret = stmpe->ci->write_byte(stmpe, reg, val); |
27e34995 | 50 | if (ret < 0) |
1a6e4b74 | 51 | dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret); |
27e34995 RV |
52 | |
53 | return ret; | |
54 | } | |
55 | ||
56 | static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) | |
57 | { | |
58 | int ret; | |
59 | ||
60 | ret = __stmpe_reg_read(stmpe, reg); | |
61 | if (ret < 0) | |
62 | return ret; | |
63 | ||
64 | ret &= ~mask; | |
65 | ret |= val; | |
66 | ||
67 | return __stmpe_reg_write(stmpe, reg, ret); | |
68 | } | |
69 | ||
70 | static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, | |
71 | u8 *values) | |
72 | { | |
73 | int ret; | |
74 | ||
1a6e4b74 | 75 | ret = stmpe->ci->read_block(stmpe, reg, length, values); |
27e34995 | 76 | if (ret < 0) |
1a6e4b74 | 77 | dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret); |
27e34995 RV |
78 | |
79 | dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret); | |
80 | stmpe_dump_bytes("stmpe rd: ", values, length); | |
81 | ||
82 | return ret; | |
83 | } | |
84 | ||
85 | static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, | |
86 | const u8 *values) | |
87 | { | |
88 | int ret; | |
89 | ||
90 | dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length); | |
91 | stmpe_dump_bytes("stmpe wr: ", values, length); | |
92 | ||
1a6e4b74 | 93 | ret = stmpe->ci->write_block(stmpe, reg, length, values); |
27e34995 | 94 | if (ret < 0) |
1a6e4b74 | 95 | dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret); |
27e34995 RV |
96 | |
97 | return ret; | |
98 | } | |
99 | ||
100 | /** | |
101 | * stmpe_enable - enable blocks on an STMPE device | |
102 | * @stmpe: Device to work on | |
103 | * @blocks: Mask of blocks (enum stmpe_block values) to enable | |
104 | */ | |
105 | int stmpe_enable(struct stmpe *stmpe, unsigned int blocks) | |
106 | { | |
107 | int ret; | |
108 | ||
109 | mutex_lock(&stmpe->lock); | |
110 | ret = __stmpe_enable(stmpe, blocks); | |
111 | mutex_unlock(&stmpe->lock); | |
112 | ||
113 | return ret; | |
114 | } | |
115 | EXPORT_SYMBOL_GPL(stmpe_enable); | |
116 | ||
117 | /** | |
118 | * stmpe_disable - disable blocks on an STMPE device | |
119 | * @stmpe: Device to work on | |
120 | * @blocks: Mask of blocks (enum stmpe_block values) to enable | |
121 | */ | |
122 | int stmpe_disable(struct stmpe *stmpe, unsigned int blocks) | |
123 | { | |
124 | int ret; | |
125 | ||
126 | mutex_lock(&stmpe->lock); | |
127 | ret = __stmpe_disable(stmpe, blocks); | |
128 | mutex_unlock(&stmpe->lock); | |
129 | ||
130 | return ret; | |
131 | } | |
132 | EXPORT_SYMBOL_GPL(stmpe_disable); | |
133 | ||
134 | /** | |
135 | * stmpe_reg_read() - read a single STMPE register | |
136 | * @stmpe: Device to read from | |
137 | * @reg: Register to read | |
138 | */ | |
139 | int stmpe_reg_read(struct stmpe *stmpe, u8 reg) | |
140 | { | |
141 | int ret; | |
142 | ||
143 | mutex_lock(&stmpe->lock); | |
144 | ret = __stmpe_reg_read(stmpe, reg); | |
145 | mutex_unlock(&stmpe->lock); | |
146 | ||
147 | return ret; | |
148 | } | |
149 | EXPORT_SYMBOL_GPL(stmpe_reg_read); | |
150 | ||
151 | /** | |
152 | * stmpe_reg_write() - write a single STMPE register | |
153 | * @stmpe: Device to write to | |
154 | * @reg: Register to write | |
155 | * @val: Value to write | |
156 | */ | |
157 | int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) | |
158 | { | |
159 | int ret; | |
160 | ||
161 | mutex_lock(&stmpe->lock); | |
162 | ret = __stmpe_reg_write(stmpe, reg, val); | |
163 | mutex_unlock(&stmpe->lock); | |
164 | ||
165 | return ret; | |
166 | } | |
167 | EXPORT_SYMBOL_GPL(stmpe_reg_write); | |
168 | ||
169 | /** | |
170 | * stmpe_set_bits() - set the value of a bitfield in a STMPE register | |
171 | * @stmpe: Device to write to | |
172 | * @reg: Register to write | |
173 | * @mask: Mask of bits to set | |
174 | * @val: Value to set | |
175 | */ | |
176 | int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) | |
177 | { | |
178 | int ret; | |
179 | ||
180 | mutex_lock(&stmpe->lock); | |
181 | ret = __stmpe_set_bits(stmpe, reg, mask, val); | |
182 | mutex_unlock(&stmpe->lock); | |
183 | ||
184 | return ret; | |
185 | } | |
186 | EXPORT_SYMBOL_GPL(stmpe_set_bits); | |
187 | ||
188 | /** | |
189 | * stmpe_block_read() - read multiple STMPE registers | |
190 | * @stmpe: Device to read from | |
191 | * @reg: First register | |
192 | * @length: Number of registers | |
193 | * @values: Buffer to write to | |
194 | */ | |
195 | int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values) | |
196 | { | |
197 | int ret; | |
198 | ||
199 | mutex_lock(&stmpe->lock); | |
200 | ret = __stmpe_block_read(stmpe, reg, length, values); | |
201 | mutex_unlock(&stmpe->lock); | |
202 | ||
203 | return ret; | |
204 | } | |
205 | EXPORT_SYMBOL_GPL(stmpe_block_read); | |
206 | ||
207 | /** | |
208 | * stmpe_block_write() - write multiple STMPE registers | |
209 | * @stmpe: Device to write to | |
210 | * @reg: First register | |
211 | * @length: Number of registers | |
212 | * @values: Values to write | |
213 | */ | |
214 | int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, | |
215 | const u8 *values) | |
216 | { | |
217 | int ret; | |
218 | ||
219 | mutex_lock(&stmpe->lock); | |
220 | ret = __stmpe_block_write(stmpe, reg, length, values); | |
221 | mutex_unlock(&stmpe->lock); | |
222 | ||
223 | return ret; | |
224 | } | |
225 | EXPORT_SYMBOL_GPL(stmpe_block_write); | |
226 | ||
227 | /** | |
4dcaa6b6 | 228 | * stmpe_set_altfunc()- set the alternate function for STMPE pins |
27e34995 RV |
229 | * @stmpe: Device to configure |
230 | * @pins: Bitmask of pins to affect | |
231 | * @block: block to enable alternate functions for | |
232 | * | |
233 | * @pins is assumed to have a bit set for each of the bits whose alternate | |
234 | * function is to be changed, numbered according to the GPIOXY numbers. | |
235 | * | |
236 | * If the GPIO module is not enabled, this function automatically enables it in | |
237 | * order to perform the change. | |
238 | */ | |
239 | int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block) | |
240 | { | |
241 | struct stmpe_variant_info *variant = stmpe->variant; | |
242 | u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB]; | |
243 | int af_bits = variant->af_bits; | |
244 | int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8); | |
27e34995 RV |
245 | int mask = (1 << af_bits) - 1; |
246 | u8 regs[numregs]; | |
7f7f4ea1 VK |
247 | int af, afperreg, ret; |
248 | ||
249 | if (!variant->get_altfunc) | |
250 | return 0; | |
27e34995 | 251 | |
7f7f4ea1 | 252 | afperreg = 8 / af_bits; |
27e34995 RV |
253 | mutex_lock(&stmpe->lock); |
254 | ||
255 | ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO); | |
256 | if (ret < 0) | |
257 | goto out; | |
258 | ||
259 | ret = __stmpe_block_read(stmpe, regaddr, numregs, regs); | |
260 | if (ret < 0) | |
261 | goto out; | |
262 | ||
263 | af = variant->get_altfunc(stmpe, block); | |
264 | ||
265 | while (pins) { | |
266 | int pin = __ffs(pins); | |
267 | int regoffset = numregs - (pin / afperreg) - 1; | |
268 | int pos = (pin % afperreg) * (8 / afperreg); | |
269 | ||
270 | regs[regoffset] &= ~(mask << pos); | |
271 | regs[regoffset] |= af << pos; | |
272 | ||
273 | pins &= ~(1 << pin); | |
274 | } | |
275 | ||
276 | ret = __stmpe_block_write(stmpe, regaddr, numregs, regs); | |
277 | ||
278 | out: | |
279 | mutex_unlock(&stmpe->lock); | |
280 | return ret; | |
281 | } | |
282 | EXPORT_SYMBOL_GPL(stmpe_set_altfunc); | |
283 | ||
284 | /* | |
285 | * GPIO (all variants) | |
286 | */ | |
287 | ||
288 | static struct resource stmpe_gpio_resources[] = { | |
289 | /* Start and end filled dynamically */ | |
290 | { | |
291 | .flags = IORESOURCE_IRQ, | |
292 | }, | |
293 | }; | |
294 | ||
295 | static struct mfd_cell stmpe_gpio_cell = { | |
296 | .name = "stmpe-gpio", | |
297 | .resources = stmpe_gpio_resources, | |
298 | .num_resources = ARRAY_SIZE(stmpe_gpio_resources), | |
299 | }; | |
300 | ||
e31f9b82 CB |
301 | static struct mfd_cell stmpe_gpio_cell_noirq = { |
302 | .name = "stmpe-gpio", | |
303 | /* gpio cell resources consist of an irq only so no resources here */ | |
304 | }; | |
305 | ||
27e34995 RV |
306 | /* |
307 | * Keypad (1601, 2401, 2403) | |
308 | */ | |
309 | ||
310 | static struct resource stmpe_keypad_resources[] = { | |
311 | { | |
312 | .name = "KEYPAD", | |
313 | .start = 0, | |
314 | .end = 0, | |
315 | .flags = IORESOURCE_IRQ, | |
316 | }, | |
317 | { | |
318 | .name = "KEYPAD_OVER", | |
319 | .start = 1, | |
320 | .end = 1, | |
321 | .flags = IORESOURCE_IRQ, | |
322 | }, | |
323 | }; | |
324 | ||
325 | static struct mfd_cell stmpe_keypad_cell = { | |
326 | .name = "stmpe-keypad", | |
327 | .resources = stmpe_keypad_resources, | |
328 | .num_resources = ARRAY_SIZE(stmpe_keypad_resources), | |
329 | }; | |
330 | ||
7f7f4ea1 VK |
331 | /* |
332 | * STMPE801 | |
333 | */ | |
334 | static const u8 stmpe801_regs[] = { | |
335 | [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID, | |
336 | [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL, | |
337 | [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA, | |
338 | [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN, | |
339 | [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN, | |
340 | [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR, | |
341 | [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN, | |
342 | [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA, | |
343 | ||
344 | }; | |
345 | ||
346 | static struct stmpe_variant_block stmpe801_blocks[] = { | |
347 | { | |
348 | .cell = &stmpe_gpio_cell, | |
349 | .irq = 0, | |
350 | .block = STMPE_BLOCK_GPIO, | |
351 | }, | |
352 | }; | |
353 | ||
e31f9b82 CB |
354 | static struct stmpe_variant_block stmpe801_blocks_noirq[] = { |
355 | { | |
356 | .cell = &stmpe_gpio_cell_noirq, | |
357 | .block = STMPE_BLOCK_GPIO, | |
358 | }, | |
359 | }; | |
360 | ||
7f7f4ea1 VK |
361 | static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks, |
362 | bool enable) | |
363 | { | |
364 | if (blocks & STMPE_BLOCK_GPIO) | |
365 | return 0; | |
366 | else | |
367 | return -EINVAL; | |
368 | } | |
369 | ||
370 | static struct stmpe_variant_info stmpe801 = { | |
371 | .name = "stmpe801", | |
372 | .id_val = STMPE801_ID, | |
373 | .id_mask = 0xffff, | |
374 | .num_gpios = 8, | |
375 | .regs = stmpe801_regs, | |
376 | .blocks = stmpe801_blocks, | |
377 | .num_blocks = ARRAY_SIZE(stmpe801_blocks), | |
378 | .num_irqs = STMPE801_NR_INTERNAL_IRQS, | |
379 | .enable = stmpe801_enable, | |
380 | }; | |
381 | ||
e31f9b82 CB |
382 | static struct stmpe_variant_info stmpe801_noirq = { |
383 | .name = "stmpe801", | |
384 | .id_val = STMPE801_ID, | |
385 | .id_mask = 0xffff, | |
386 | .num_gpios = 8, | |
387 | .regs = stmpe801_regs, | |
388 | .blocks = stmpe801_blocks_noirq, | |
389 | .num_blocks = ARRAY_SIZE(stmpe801_blocks_noirq), | |
390 | .enable = stmpe801_enable, | |
391 | }; | |
392 | ||
27e34995 | 393 | /* |
1cda2394 | 394 | * Touchscreen (STMPE811 or STMPE610) |
27e34995 RV |
395 | */ |
396 | ||
397 | static struct resource stmpe_ts_resources[] = { | |
398 | { | |
399 | .name = "TOUCH_DET", | |
400 | .start = 0, | |
401 | .end = 0, | |
402 | .flags = IORESOURCE_IRQ, | |
403 | }, | |
404 | { | |
405 | .name = "FIFO_TH", | |
406 | .start = 1, | |
407 | .end = 1, | |
408 | .flags = IORESOURCE_IRQ, | |
409 | }, | |
410 | }; | |
411 | ||
412 | static struct mfd_cell stmpe_ts_cell = { | |
413 | .name = "stmpe-ts", | |
414 | .resources = stmpe_ts_resources, | |
415 | .num_resources = ARRAY_SIZE(stmpe_ts_resources), | |
416 | }; | |
417 | ||
418 | /* | |
1cda2394 | 419 | * STMPE811 or STMPE610 |
27e34995 RV |
420 | */ |
421 | ||
422 | static const u8 stmpe811_regs[] = { | |
423 | [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID, | |
424 | [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL, | |
425 | [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN, | |
426 | [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA, | |
427 | [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA, | |
428 | [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN, | |
429 | [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN, | |
430 | [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR, | |
431 | [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE, | |
432 | [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE, | |
433 | [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF, | |
434 | [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN, | |
435 | [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA, | |
436 | [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED, | |
437 | }; | |
438 | ||
439 | static struct stmpe_variant_block stmpe811_blocks[] = { | |
440 | { | |
441 | .cell = &stmpe_gpio_cell, | |
442 | .irq = STMPE811_IRQ_GPIOC, | |
443 | .block = STMPE_BLOCK_GPIO, | |
444 | }, | |
445 | { | |
446 | .cell = &stmpe_ts_cell, | |
447 | .irq = STMPE811_IRQ_TOUCH_DET, | |
448 | .block = STMPE_BLOCK_TOUCHSCREEN, | |
449 | }, | |
450 | }; | |
451 | ||
452 | static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks, | |
453 | bool enable) | |
454 | { | |
455 | unsigned int mask = 0; | |
456 | ||
457 | if (blocks & STMPE_BLOCK_GPIO) | |
458 | mask |= STMPE811_SYS_CTRL2_GPIO_OFF; | |
459 | ||
460 | if (blocks & STMPE_BLOCK_ADC) | |
461 | mask |= STMPE811_SYS_CTRL2_ADC_OFF; | |
462 | ||
463 | if (blocks & STMPE_BLOCK_TOUCHSCREEN) | |
464 | mask |= STMPE811_SYS_CTRL2_TSC_OFF; | |
465 | ||
466 | return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask, | |
467 | enable ? 0 : mask); | |
468 | } | |
469 | ||
470 | static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) | |
471 | { | |
472 | /* 0 for touchscreen, 1 for GPIO */ | |
473 | return block != STMPE_BLOCK_TOUCHSCREEN; | |
474 | } | |
475 | ||
476 | static struct stmpe_variant_info stmpe811 = { | |
477 | .name = "stmpe811", | |
478 | .id_val = 0x0811, | |
479 | .id_mask = 0xffff, | |
480 | .num_gpios = 8, | |
481 | .af_bits = 1, | |
482 | .regs = stmpe811_regs, | |
483 | .blocks = stmpe811_blocks, | |
484 | .num_blocks = ARRAY_SIZE(stmpe811_blocks), | |
485 | .num_irqs = STMPE811_NR_INTERNAL_IRQS, | |
486 | .enable = stmpe811_enable, | |
487 | .get_altfunc = stmpe811_get_altfunc, | |
488 | }; | |
489 | ||
1cda2394 VK |
490 | /* Similar to 811, except number of gpios */ |
491 | static struct stmpe_variant_info stmpe610 = { | |
492 | .name = "stmpe610", | |
493 | .id_val = 0x0811, | |
494 | .id_mask = 0xffff, | |
495 | .num_gpios = 6, | |
496 | .af_bits = 1, | |
497 | .regs = stmpe811_regs, | |
498 | .blocks = stmpe811_blocks, | |
499 | .num_blocks = ARRAY_SIZE(stmpe811_blocks), | |
500 | .num_irqs = STMPE811_NR_INTERNAL_IRQS, | |
501 | .enable = stmpe811_enable, | |
502 | .get_altfunc = stmpe811_get_altfunc, | |
503 | }; | |
504 | ||
27e34995 RV |
505 | /* |
506 | * STMPE1601 | |
507 | */ | |
508 | ||
509 | static const u8 stmpe1601_regs[] = { | |
510 | [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID, | |
511 | [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB, | |
512 | [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB, | |
513 | [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB, | |
514 | [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB, | |
515 | [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB, | |
516 | [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB, | |
517 | [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB, | |
518 | [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB, | |
519 | [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB, | |
520 | [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB, | |
521 | [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB, | |
522 | [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB, | |
523 | [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB, | |
524 | }; | |
525 | ||
526 | static struct stmpe_variant_block stmpe1601_blocks[] = { | |
527 | { | |
528 | .cell = &stmpe_gpio_cell, | |
529 | .irq = STMPE24XX_IRQ_GPIOC, | |
530 | .block = STMPE_BLOCK_GPIO, | |
531 | }, | |
532 | { | |
533 | .cell = &stmpe_keypad_cell, | |
534 | .irq = STMPE24XX_IRQ_KEYPAD, | |
535 | .block = STMPE_BLOCK_KEYPAD, | |
536 | }, | |
537 | }; | |
538 | ||
5981f4e6 SI |
539 | /* supported autosleep timeout delay (in msecs) */ |
540 | static const int stmpe_autosleep_delay[] = { | |
541 | 4, 16, 32, 64, 128, 256, 512, 1024, | |
542 | }; | |
543 | ||
544 | static int stmpe_round_timeout(int timeout) | |
545 | { | |
546 | int i; | |
547 | ||
548 | for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) { | |
549 | if (stmpe_autosleep_delay[i] >= timeout) | |
550 | return i; | |
551 | } | |
552 | ||
553 | /* | |
554 | * requests for delays longer than supported should not return the | |
555 | * longest supported delay | |
556 | */ | |
557 | return -EINVAL; | |
558 | } | |
559 | ||
560 | static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout) | |
561 | { | |
562 | int ret; | |
563 | ||
564 | if (!stmpe->variant->enable_autosleep) | |
565 | return -ENOSYS; | |
566 | ||
567 | mutex_lock(&stmpe->lock); | |
568 | ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout); | |
569 | mutex_unlock(&stmpe->lock); | |
570 | ||
571 | return ret; | |
572 | } | |
573 | ||
574 | /* | |
575 | * Both stmpe 1601/2403 support same layout for autosleep | |
576 | */ | |
577 | static int stmpe1601_autosleep(struct stmpe *stmpe, | |
578 | int autosleep_timeout) | |
579 | { | |
580 | int ret, timeout; | |
581 | ||
582 | /* choose the best available timeout */ | |
583 | timeout = stmpe_round_timeout(autosleep_timeout); | |
584 | if (timeout < 0) { | |
585 | dev_err(stmpe->dev, "invalid timeout\n"); | |
586 | return timeout; | |
587 | } | |
588 | ||
589 | ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, | |
590 | STMPE1601_AUTOSLEEP_TIMEOUT_MASK, | |
591 | timeout); | |
592 | if (ret < 0) | |
593 | return ret; | |
594 | ||
595 | return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, | |
596 | STPME1601_AUTOSLEEP_ENABLE, | |
597 | STPME1601_AUTOSLEEP_ENABLE); | |
598 | } | |
599 | ||
27e34995 RV |
600 | static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks, |
601 | bool enable) | |
602 | { | |
603 | unsigned int mask = 0; | |
604 | ||
605 | if (blocks & STMPE_BLOCK_GPIO) | |
606 | mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO; | |
607 | ||
608 | if (blocks & STMPE_BLOCK_KEYPAD) | |
609 | mask |= STMPE1601_SYS_CTRL_ENABLE_KPC; | |
610 | ||
611 | return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask, | |
612 | enable ? mask : 0); | |
613 | } | |
614 | ||
615 | static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) | |
616 | { | |
617 | switch (block) { | |
618 | case STMPE_BLOCK_PWM: | |
619 | return 2; | |
620 | ||
621 | case STMPE_BLOCK_KEYPAD: | |
622 | return 1; | |
623 | ||
624 | case STMPE_BLOCK_GPIO: | |
625 | default: | |
626 | return 0; | |
627 | } | |
628 | } | |
629 | ||
630 | static struct stmpe_variant_info stmpe1601 = { | |
631 | .name = "stmpe1601", | |
632 | .id_val = 0x0210, | |
633 | .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */ | |
634 | .num_gpios = 16, | |
635 | .af_bits = 2, | |
636 | .regs = stmpe1601_regs, | |
637 | .blocks = stmpe1601_blocks, | |
638 | .num_blocks = ARRAY_SIZE(stmpe1601_blocks), | |
639 | .num_irqs = STMPE1601_NR_INTERNAL_IRQS, | |
640 | .enable = stmpe1601_enable, | |
641 | .get_altfunc = stmpe1601_get_altfunc, | |
5981f4e6 | 642 | .enable_autosleep = stmpe1601_autosleep, |
27e34995 RV |
643 | }; |
644 | ||
645 | /* | |
646 | * STMPE24XX | |
647 | */ | |
648 | ||
649 | static const u8 stmpe24xx_regs[] = { | |
650 | [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID, | |
651 | [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB, | |
652 | [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB, | |
653 | [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB, | |
654 | [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB, | |
655 | [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB, | |
656 | [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB, | |
657 | [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB, | |
658 | [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB, | |
659 | [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB, | |
660 | [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB, | |
661 | [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB, | |
662 | [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB, | |
663 | [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB, | |
664 | }; | |
665 | ||
666 | static struct stmpe_variant_block stmpe24xx_blocks[] = { | |
667 | { | |
668 | .cell = &stmpe_gpio_cell, | |
669 | .irq = STMPE24XX_IRQ_GPIOC, | |
670 | .block = STMPE_BLOCK_GPIO, | |
671 | }, | |
672 | { | |
673 | .cell = &stmpe_keypad_cell, | |
674 | .irq = STMPE24XX_IRQ_KEYPAD, | |
675 | .block = STMPE_BLOCK_KEYPAD, | |
676 | }, | |
677 | }; | |
678 | ||
679 | static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks, | |
680 | bool enable) | |
681 | { | |
682 | unsigned int mask = 0; | |
683 | ||
684 | if (blocks & STMPE_BLOCK_GPIO) | |
685 | mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO; | |
686 | ||
687 | if (blocks & STMPE_BLOCK_KEYPAD) | |
688 | mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC; | |
689 | ||
690 | return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask, | |
691 | enable ? mask : 0); | |
692 | } | |
693 | ||
694 | static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) | |
695 | { | |
696 | switch (block) { | |
697 | case STMPE_BLOCK_ROTATOR: | |
698 | return 2; | |
699 | ||
700 | case STMPE_BLOCK_KEYPAD: | |
701 | return 1; | |
702 | ||
703 | case STMPE_BLOCK_GPIO: | |
704 | default: | |
705 | return 0; | |
706 | } | |
707 | } | |
708 | ||
709 | static struct stmpe_variant_info stmpe2401 = { | |
710 | .name = "stmpe2401", | |
711 | .id_val = 0x0101, | |
712 | .id_mask = 0xffff, | |
713 | .num_gpios = 24, | |
714 | .af_bits = 2, | |
715 | .regs = stmpe24xx_regs, | |
716 | .blocks = stmpe24xx_blocks, | |
717 | .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), | |
718 | .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, | |
719 | .enable = stmpe24xx_enable, | |
720 | .get_altfunc = stmpe24xx_get_altfunc, | |
721 | }; | |
722 | ||
723 | static struct stmpe_variant_info stmpe2403 = { | |
724 | .name = "stmpe2403", | |
725 | .id_val = 0x0120, | |
726 | .id_mask = 0xffff, | |
727 | .num_gpios = 24, | |
728 | .af_bits = 2, | |
729 | .regs = stmpe24xx_regs, | |
730 | .blocks = stmpe24xx_blocks, | |
731 | .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), | |
732 | .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, | |
733 | .enable = stmpe24xx_enable, | |
734 | .get_altfunc = stmpe24xx_get_altfunc, | |
5981f4e6 | 735 | .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */ |
27e34995 RV |
736 | }; |
737 | ||
e31f9b82 | 738 | static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = { |
1cda2394 | 739 | [STMPE610] = &stmpe610, |
7f7f4ea1 | 740 | [STMPE801] = &stmpe801, |
27e34995 RV |
741 | [STMPE811] = &stmpe811, |
742 | [STMPE1601] = &stmpe1601, | |
743 | [STMPE2401] = &stmpe2401, | |
744 | [STMPE2403] = &stmpe2403, | |
745 | }; | |
746 | ||
e31f9b82 CB |
747 | /* |
748 | * These devices can be connected in a 'no-irq' configuration - the irq pin | |
749 | * is not used and the device cannot interrupt the CPU. Here we only list | |
750 | * devices which support this configuration - the driver will fail probing | |
751 | * for any devices not listed here which are configured in this way. | |
752 | */ | |
753 | static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = { | |
754 | [STMPE801] = &stmpe801_noirq, | |
755 | }; | |
756 | ||
27e34995 RV |
757 | static irqreturn_t stmpe_irq(int irq, void *data) |
758 | { | |
759 | struct stmpe *stmpe = data; | |
760 | struct stmpe_variant_info *variant = stmpe->variant; | |
761 | int num = DIV_ROUND_UP(variant->num_irqs, 8); | |
762 | u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB]; | |
763 | u8 isr[num]; | |
764 | int ret; | |
765 | int i; | |
766 | ||
7f7f4ea1 VK |
767 | if (variant->id_val == STMPE801_ID) { |
768 | handle_nested_irq(stmpe->irq_base); | |
769 | return IRQ_HANDLED; | |
770 | } | |
771 | ||
27e34995 RV |
772 | ret = stmpe_block_read(stmpe, israddr, num, isr); |
773 | if (ret < 0) | |
774 | return IRQ_NONE; | |
775 | ||
776 | for (i = 0; i < num; i++) { | |
777 | int bank = num - i - 1; | |
778 | u8 status = isr[i]; | |
779 | u8 clear; | |
780 | ||
781 | status &= stmpe->ier[bank]; | |
782 | if (!status) | |
783 | continue; | |
784 | ||
785 | clear = status; | |
786 | while (status) { | |
787 | int bit = __ffs(status); | |
788 | int line = bank * 8 + bit; | |
789 | ||
790 | handle_nested_irq(stmpe->irq_base + line); | |
791 | status &= ~(1 << bit); | |
792 | } | |
793 | ||
794 | stmpe_reg_write(stmpe, israddr + i, clear); | |
795 | } | |
796 | ||
797 | return IRQ_HANDLED; | |
798 | } | |
799 | ||
43b8c084 | 800 | static void stmpe_irq_lock(struct irq_data *data) |
27e34995 | 801 | { |
43b8c084 | 802 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
27e34995 RV |
803 | |
804 | mutex_lock(&stmpe->irq_lock); | |
805 | } | |
806 | ||
43b8c084 | 807 | static void stmpe_irq_sync_unlock(struct irq_data *data) |
27e34995 | 808 | { |
43b8c084 | 809 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
27e34995 RV |
810 | struct stmpe_variant_info *variant = stmpe->variant; |
811 | int num = DIV_ROUND_UP(variant->num_irqs, 8); | |
812 | int i; | |
813 | ||
814 | for (i = 0; i < num; i++) { | |
815 | u8 new = stmpe->ier[i]; | |
816 | u8 old = stmpe->oldier[i]; | |
817 | ||
818 | if (new == old) | |
819 | continue; | |
820 | ||
821 | stmpe->oldier[i] = new; | |
822 | stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new); | |
823 | } | |
824 | ||
825 | mutex_unlock(&stmpe->irq_lock); | |
826 | } | |
827 | ||
43b8c084 | 828 | static void stmpe_irq_mask(struct irq_data *data) |
27e34995 | 829 | { |
43b8c084 MB |
830 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
831 | int offset = data->irq - stmpe->irq_base; | |
27e34995 RV |
832 | int regoffset = offset / 8; |
833 | int mask = 1 << (offset % 8); | |
834 | ||
835 | stmpe->ier[regoffset] &= ~mask; | |
836 | } | |
837 | ||
43b8c084 | 838 | static void stmpe_irq_unmask(struct irq_data *data) |
27e34995 | 839 | { |
43b8c084 MB |
840 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
841 | int offset = data->irq - stmpe->irq_base; | |
27e34995 RV |
842 | int regoffset = offset / 8; |
843 | int mask = 1 << (offset % 8); | |
844 | ||
845 | stmpe->ier[regoffset] |= mask; | |
846 | } | |
847 | ||
848 | static struct irq_chip stmpe_irq_chip = { | |
849 | .name = "stmpe", | |
43b8c084 MB |
850 | .irq_bus_lock = stmpe_irq_lock, |
851 | .irq_bus_sync_unlock = stmpe_irq_sync_unlock, | |
852 | .irq_mask = stmpe_irq_mask, | |
853 | .irq_unmask = stmpe_irq_unmask, | |
27e34995 RV |
854 | }; |
855 | ||
856 | static int __devinit stmpe_irq_init(struct stmpe *stmpe) | |
857 | { | |
7f7f4ea1 | 858 | struct irq_chip *chip = NULL; |
27e34995 RV |
859 | int num_irqs = stmpe->variant->num_irqs; |
860 | int base = stmpe->irq_base; | |
861 | int irq; | |
862 | ||
7f7f4ea1 VK |
863 | if (stmpe->variant->id_val != STMPE801_ID) |
864 | chip = &stmpe_irq_chip; | |
865 | ||
27e34995 | 866 | for (irq = base; irq < base + num_irqs; irq++) { |
d5bb1221 | 867 | irq_set_chip_data(irq, stmpe); |
7f7f4ea1 | 868 | irq_set_chip_and_handler(irq, chip, handle_edge_irq); |
d5bb1221 | 869 | irq_set_nested_thread(irq, 1); |
27e34995 RV |
870 | #ifdef CONFIG_ARM |
871 | set_irq_flags(irq, IRQF_VALID); | |
872 | #else | |
d5bb1221 | 873 | irq_set_noprobe(irq); |
27e34995 RV |
874 | #endif |
875 | } | |
876 | ||
877 | return 0; | |
878 | } | |
879 | ||
880 | static void stmpe_irq_remove(struct stmpe *stmpe) | |
881 | { | |
882 | int num_irqs = stmpe->variant->num_irqs; | |
883 | int base = stmpe->irq_base; | |
884 | int irq; | |
885 | ||
886 | for (irq = base; irq < base + num_irqs; irq++) { | |
887 | #ifdef CONFIG_ARM | |
888 | set_irq_flags(irq, 0); | |
889 | #endif | |
d5bb1221 TG |
890 | irq_set_chip_and_handler(irq, NULL, NULL); |
891 | irq_set_chip_data(irq, NULL); | |
27e34995 RV |
892 | } |
893 | } | |
894 | ||
895 | static int __devinit stmpe_chip_init(struct stmpe *stmpe) | |
896 | { | |
897 | unsigned int irq_trigger = stmpe->pdata->irq_trigger; | |
5981f4e6 | 898 | int autosleep_timeout = stmpe->pdata->autosleep_timeout; |
27e34995 | 899 | struct stmpe_variant_info *variant = stmpe->variant; |
e31f9b82 | 900 | u8 icr = 0; |
27e34995 RV |
901 | unsigned int id; |
902 | u8 data[2]; | |
903 | int ret; | |
904 | ||
905 | ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID], | |
906 | ARRAY_SIZE(data), data); | |
907 | if (ret < 0) | |
908 | return ret; | |
909 | ||
910 | id = (data[0] << 8) | data[1]; | |
911 | if ((id & variant->id_mask) != variant->id_val) { | |
912 | dev_err(stmpe->dev, "unknown chip id: %#x\n", id); | |
913 | return -EINVAL; | |
914 | } | |
915 | ||
916 | dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id); | |
917 | ||
918 | /* Disable all modules -- subdrivers should enable what they need. */ | |
919 | ret = stmpe_disable(stmpe, ~0); | |
920 | if (ret) | |
921 | return ret; | |
922 | ||
e31f9b82 | 923 | if (stmpe->irq >= 0) { |
7f7f4ea1 | 924 | if (id == STMPE801_ID) |
e31f9b82 | 925 | icr = STMPE801_REG_SYS_CTRL_INT_EN; |
7f7f4ea1 | 926 | else |
e31f9b82 | 927 | icr = STMPE_ICR_LSB_GIM; |
27e34995 | 928 | |
e31f9b82 CB |
929 | /* STMPE801 doesn't support Edge interrupts */ |
930 | if (id != STMPE801_ID) { | |
931 | if (irq_trigger == IRQF_TRIGGER_FALLING || | |
932 | irq_trigger == IRQF_TRIGGER_RISING) | |
933 | icr |= STMPE_ICR_LSB_EDGE; | |
934 | } | |
935 | ||
936 | if (irq_trigger == IRQF_TRIGGER_RISING || | |
937 | irq_trigger == IRQF_TRIGGER_HIGH) { | |
938 | if (id == STMPE801_ID) | |
939 | icr |= STMPE801_REG_SYS_CTRL_INT_HI; | |
940 | else | |
941 | icr |= STMPE_ICR_LSB_HIGH; | |
942 | } | |
943 | ||
944 | if (stmpe->pdata->irq_invert_polarity) { | |
945 | if (id == STMPE801_ID) | |
946 | icr ^= STMPE801_REG_SYS_CTRL_INT_HI; | |
947 | else | |
948 | icr ^= STMPE_ICR_LSB_HIGH; | |
949 | } | |
7f7f4ea1 | 950 | } |
27e34995 | 951 | |
5981f4e6 SI |
952 | if (stmpe->pdata->autosleep) { |
953 | ret = stmpe_autosleep(stmpe, autosleep_timeout); | |
954 | if (ret) | |
955 | return ret; | |
956 | } | |
957 | ||
27e34995 RV |
958 | return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); |
959 | } | |
960 | ||
961 | static int __devinit stmpe_add_device(struct stmpe *stmpe, | |
962 | struct mfd_cell *cell, int irq) | |
963 | { | |
964 | return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1, | |
965 | NULL, stmpe->irq_base + irq); | |
966 | } | |
967 | ||
968 | static int __devinit stmpe_devices_init(struct stmpe *stmpe) | |
969 | { | |
970 | struct stmpe_variant_info *variant = stmpe->variant; | |
971 | unsigned int platform_blocks = stmpe->pdata->blocks; | |
972 | int ret = -EINVAL; | |
973 | int i; | |
974 | ||
975 | for (i = 0; i < variant->num_blocks; i++) { | |
976 | struct stmpe_variant_block *block = &variant->blocks[i]; | |
977 | ||
978 | if (!(platform_blocks & block->block)) | |
979 | continue; | |
980 | ||
981 | platform_blocks &= ~block->block; | |
982 | ret = stmpe_add_device(stmpe, block->cell, block->irq); | |
983 | if (ret) | |
984 | return ret; | |
985 | } | |
986 | ||
987 | if (platform_blocks) | |
988 | dev_warn(stmpe->dev, | |
989 | "platform wants blocks (%#x) not present on variant", | |
990 | platform_blocks); | |
991 | ||
992 | return ret; | |
993 | } | |
994 | ||
1a6e4b74 | 995 | /* Called from client specific probe routines */ |
8ad1a973 | 996 | int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum) |
208c4343 | 997 | { |
1a6e4b74 | 998 | struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev); |
27e34995 RV |
999 | struct stmpe *stmpe; |
1000 | int ret; | |
1001 | ||
1002 | if (!pdata) | |
1003 | return -EINVAL; | |
1004 | ||
1005 | stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL); | |
1006 | if (!stmpe) | |
1007 | return -ENOMEM; | |
1008 | ||
1009 | mutex_init(&stmpe->irq_lock); | |
1010 | mutex_init(&stmpe->lock); | |
1011 | ||
1a6e4b74 VK |
1012 | stmpe->dev = ci->dev; |
1013 | stmpe->client = ci->client; | |
27e34995 RV |
1014 | stmpe->pdata = pdata; |
1015 | stmpe->irq_base = pdata->irq_base; | |
1a6e4b74 VK |
1016 | stmpe->ci = ci; |
1017 | stmpe->partnum = partnum; | |
1018 | stmpe->variant = stmpe_variant_info[partnum]; | |
27e34995 RV |
1019 | stmpe->regs = stmpe->variant->regs; |
1020 | stmpe->num_gpios = stmpe->variant->num_gpios; | |
1a6e4b74 | 1021 | dev_set_drvdata(stmpe->dev, stmpe); |
27e34995 | 1022 | |
1a6e4b74 VK |
1023 | if (ci->init) |
1024 | ci->init(stmpe); | |
27e34995 | 1025 | |
73de16db VK |
1026 | if (pdata->irq_over_gpio) { |
1027 | ret = gpio_request_one(pdata->irq_gpio, GPIOF_DIR_IN, "stmpe"); | |
1028 | if (ret) { | |
1029 | dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n", | |
1030 | ret); | |
1031 | goto out_free; | |
1032 | } | |
1033 | ||
1034 | stmpe->irq = gpio_to_irq(pdata->irq_gpio); | |
1035 | } else { | |
1a6e4b74 | 1036 | stmpe->irq = ci->irq; |
73de16db VK |
1037 | } |
1038 | ||
e31f9b82 CB |
1039 | if (stmpe->irq < 0) { |
1040 | /* use alternate variant info for no-irq mode, if supported */ | |
1041 | dev_info(stmpe->dev, | |
1042 | "%s configured in no-irq mode by platform data\n", | |
1043 | stmpe->variant->name); | |
1044 | if (!stmpe_noirq_variant_info[stmpe->partnum]) { | |
1045 | dev_err(stmpe->dev, | |
1046 | "%s does not support no-irq mode!\n", | |
1047 | stmpe->variant->name); | |
1048 | ret = -ENODEV; | |
1049 | goto free_gpio; | |
1050 | } | |
1051 | stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum]; | |
1052 | } | |
1053 | ||
27e34995 RV |
1054 | ret = stmpe_chip_init(stmpe); |
1055 | if (ret) | |
73de16db | 1056 | goto free_gpio; |
27e34995 | 1057 | |
e31f9b82 CB |
1058 | if (stmpe->irq >= 0) { |
1059 | ret = stmpe_irq_init(stmpe); | |
1060 | if (ret) | |
1061 | goto free_gpio; | |
27e34995 | 1062 | |
e31f9b82 CB |
1063 | ret = request_threaded_irq(stmpe->irq, NULL, stmpe_irq, |
1064 | pdata->irq_trigger | IRQF_ONESHOT, | |
1065 | "stmpe", stmpe); | |
1066 | if (ret) { | |
1067 | dev_err(stmpe->dev, "failed to request IRQ: %d\n", | |
1068 | ret); | |
1069 | goto out_removeirq; | |
1070 | } | |
27e34995 RV |
1071 | } |
1072 | ||
1073 | ret = stmpe_devices_init(stmpe); | |
1074 | if (ret) { | |
1075 | dev_err(stmpe->dev, "failed to add children\n"); | |
1076 | goto out_removedevs; | |
1077 | } | |
1078 | ||
1079 | return 0; | |
1080 | ||
1081 | out_removedevs: | |
1082 | mfd_remove_devices(stmpe->dev); | |
e31f9b82 CB |
1083 | if (stmpe->irq >= 0) |
1084 | free_irq(stmpe->irq, stmpe); | |
27e34995 | 1085 | out_removeirq: |
e31f9b82 CB |
1086 | if (stmpe->irq >= 0) |
1087 | stmpe_irq_remove(stmpe); | |
73de16db VK |
1088 | free_gpio: |
1089 | if (pdata->irq_over_gpio) | |
1090 | gpio_free(pdata->irq_gpio); | |
27e34995 RV |
1091 | out_free: |
1092 | kfree(stmpe); | |
1093 | return ret; | |
1094 | } | |
1095 | ||
1a6e4b74 | 1096 | int stmpe_remove(struct stmpe *stmpe) |
27e34995 | 1097 | { |
27e34995 RV |
1098 | mfd_remove_devices(stmpe->dev); |
1099 | ||
e31f9b82 CB |
1100 | if (stmpe->irq >= 0) { |
1101 | free_irq(stmpe->irq, stmpe); | |
1102 | stmpe_irq_remove(stmpe); | |
1103 | } | |
27e34995 | 1104 | |
73de16db VK |
1105 | if (stmpe->pdata->irq_over_gpio) |
1106 | gpio_free(stmpe->pdata->irq_gpio); | |
1107 | ||
27e34995 RV |
1108 | kfree(stmpe); |
1109 | ||
1110 | return 0; | |
1111 | } | |
1112 | ||
208c4343 | 1113 | #ifdef CONFIG_PM |
1a6e4b74 VK |
1114 | static int stmpe_suspend(struct device *dev) |
1115 | { | |
1116 | struct stmpe *stmpe = dev_get_drvdata(dev); | |
208c4343 | 1117 | |
e31f9b82 | 1118 | if (stmpe->irq >= 0 && device_may_wakeup(dev)) |
1a6e4b74 | 1119 | enable_irq_wake(stmpe->irq); |
27e34995 | 1120 | |
1a6e4b74 | 1121 | return 0; |
27e34995 | 1122 | } |
27e34995 | 1123 | |
1a6e4b74 | 1124 | static int stmpe_resume(struct device *dev) |
27e34995 | 1125 | { |
1a6e4b74 VK |
1126 | struct stmpe *stmpe = dev_get_drvdata(dev); |
1127 | ||
e31f9b82 | 1128 | if (stmpe->irq >= 0 && device_may_wakeup(dev)) |
1a6e4b74 VK |
1129 | disable_irq_wake(stmpe->irq); |
1130 | ||
1131 | return 0; | |
27e34995 | 1132 | } |
27e34995 | 1133 | |
1a6e4b74 VK |
1134 | const struct dev_pm_ops stmpe_dev_pm_ops = { |
1135 | .suspend = stmpe_suspend, | |
1136 | .resume = stmpe_resume, | |
1137 | }; | |
1138 | #endif |