Commit | Line | Data |
---|---|---|
27e34995 | 1 | /* |
1a6e4b74 VK |
2 | * ST Microelectronics MFD: stmpe's driver |
3 | * | |
27e34995 RV |
4 | * Copyright (C) ST-Ericsson SA 2010 |
5 | * | |
6 | * License Terms: GNU General Public License, version 2 | |
7 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson | |
8 | */ | |
9 | ||
73de16db | 10 | #include <linux/gpio.h> |
dba61c8f | 11 | #include <linux/export.h> |
27e34995 | 12 | #include <linux/kernel.h> |
27e34995 RV |
13 | #include <linux/interrupt.h> |
14 | #include <linux/irq.h> | |
1a6e4b74 | 15 | #include <linux/pm.h> |
27e34995 | 16 | #include <linux/slab.h> |
27e34995 | 17 | #include <linux/mfd/core.h> |
27e34995 RV |
18 | #include "stmpe.h" |
19 | ||
20 | static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks) | |
21 | { | |
22 | return stmpe->variant->enable(stmpe, blocks, true); | |
23 | } | |
24 | ||
25 | static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks) | |
26 | { | |
27 | return stmpe->variant->enable(stmpe, blocks, false); | |
28 | } | |
29 | ||
30 | static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg) | |
31 | { | |
32 | int ret; | |
33 | ||
1a6e4b74 | 34 | ret = stmpe->ci->read_byte(stmpe, reg); |
27e34995 | 35 | if (ret < 0) |
1a6e4b74 | 36 | dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret); |
27e34995 RV |
37 | |
38 | dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret); | |
39 | ||
40 | return ret; | |
41 | } | |
42 | ||
43 | static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) | |
44 | { | |
45 | int ret; | |
46 | ||
47 | dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val); | |
48 | ||
1a6e4b74 | 49 | ret = stmpe->ci->write_byte(stmpe, reg, val); |
27e34995 | 50 | if (ret < 0) |
1a6e4b74 | 51 | dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret); |
27e34995 RV |
52 | |
53 | return ret; | |
54 | } | |
55 | ||
56 | static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) | |
57 | { | |
58 | int ret; | |
59 | ||
60 | ret = __stmpe_reg_read(stmpe, reg); | |
61 | if (ret < 0) | |
62 | return ret; | |
63 | ||
64 | ret &= ~mask; | |
65 | ret |= val; | |
66 | ||
67 | return __stmpe_reg_write(stmpe, reg, ret); | |
68 | } | |
69 | ||
70 | static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, | |
71 | u8 *values) | |
72 | { | |
73 | int ret; | |
74 | ||
1a6e4b74 | 75 | ret = stmpe->ci->read_block(stmpe, reg, length, values); |
27e34995 | 76 | if (ret < 0) |
1a6e4b74 | 77 | dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret); |
27e34995 RV |
78 | |
79 | dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret); | |
80 | stmpe_dump_bytes("stmpe rd: ", values, length); | |
81 | ||
82 | return ret; | |
83 | } | |
84 | ||
85 | static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, | |
86 | const u8 *values) | |
87 | { | |
88 | int ret; | |
89 | ||
90 | dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length); | |
91 | stmpe_dump_bytes("stmpe wr: ", values, length); | |
92 | ||
1a6e4b74 | 93 | ret = stmpe->ci->write_block(stmpe, reg, length, values); |
27e34995 | 94 | if (ret < 0) |
1a6e4b74 | 95 | dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret); |
27e34995 RV |
96 | |
97 | return ret; | |
98 | } | |
99 | ||
100 | /** | |
101 | * stmpe_enable - enable blocks on an STMPE device | |
102 | * @stmpe: Device to work on | |
103 | * @blocks: Mask of blocks (enum stmpe_block values) to enable | |
104 | */ | |
105 | int stmpe_enable(struct stmpe *stmpe, unsigned int blocks) | |
106 | { | |
107 | int ret; | |
108 | ||
109 | mutex_lock(&stmpe->lock); | |
110 | ret = __stmpe_enable(stmpe, blocks); | |
111 | mutex_unlock(&stmpe->lock); | |
112 | ||
113 | return ret; | |
114 | } | |
115 | EXPORT_SYMBOL_GPL(stmpe_enable); | |
116 | ||
117 | /** | |
118 | * stmpe_disable - disable blocks on an STMPE device | |
119 | * @stmpe: Device to work on | |
120 | * @blocks: Mask of blocks (enum stmpe_block values) to enable | |
121 | */ | |
122 | int stmpe_disable(struct stmpe *stmpe, unsigned int blocks) | |
123 | { | |
124 | int ret; | |
125 | ||
126 | mutex_lock(&stmpe->lock); | |
127 | ret = __stmpe_disable(stmpe, blocks); | |
128 | mutex_unlock(&stmpe->lock); | |
129 | ||
130 | return ret; | |
131 | } | |
132 | EXPORT_SYMBOL_GPL(stmpe_disable); | |
133 | ||
134 | /** | |
135 | * stmpe_reg_read() - read a single STMPE register | |
136 | * @stmpe: Device to read from | |
137 | * @reg: Register to read | |
138 | */ | |
139 | int stmpe_reg_read(struct stmpe *stmpe, u8 reg) | |
140 | { | |
141 | int ret; | |
142 | ||
143 | mutex_lock(&stmpe->lock); | |
144 | ret = __stmpe_reg_read(stmpe, reg); | |
145 | mutex_unlock(&stmpe->lock); | |
146 | ||
147 | return ret; | |
148 | } | |
149 | EXPORT_SYMBOL_GPL(stmpe_reg_read); | |
150 | ||
151 | /** | |
152 | * stmpe_reg_write() - write a single STMPE register | |
153 | * @stmpe: Device to write to | |
154 | * @reg: Register to write | |
155 | * @val: Value to write | |
156 | */ | |
157 | int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) | |
158 | { | |
159 | int ret; | |
160 | ||
161 | mutex_lock(&stmpe->lock); | |
162 | ret = __stmpe_reg_write(stmpe, reg, val); | |
163 | mutex_unlock(&stmpe->lock); | |
164 | ||
165 | return ret; | |
166 | } | |
167 | EXPORT_SYMBOL_GPL(stmpe_reg_write); | |
168 | ||
169 | /** | |
170 | * stmpe_set_bits() - set the value of a bitfield in a STMPE register | |
171 | * @stmpe: Device to write to | |
172 | * @reg: Register to write | |
173 | * @mask: Mask of bits to set | |
174 | * @val: Value to set | |
175 | */ | |
176 | int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) | |
177 | { | |
178 | int ret; | |
179 | ||
180 | mutex_lock(&stmpe->lock); | |
181 | ret = __stmpe_set_bits(stmpe, reg, mask, val); | |
182 | mutex_unlock(&stmpe->lock); | |
183 | ||
184 | return ret; | |
185 | } | |
186 | EXPORT_SYMBOL_GPL(stmpe_set_bits); | |
187 | ||
188 | /** | |
189 | * stmpe_block_read() - read multiple STMPE registers | |
190 | * @stmpe: Device to read from | |
191 | * @reg: First register | |
192 | * @length: Number of registers | |
193 | * @values: Buffer to write to | |
194 | */ | |
195 | int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values) | |
196 | { | |
197 | int ret; | |
198 | ||
199 | mutex_lock(&stmpe->lock); | |
200 | ret = __stmpe_block_read(stmpe, reg, length, values); | |
201 | mutex_unlock(&stmpe->lock); | |
202 | ||
203 | return ret; | |
204 | } | |
205 | EXPORT_SYMBOL_GPL(stmpe_block_read); | |
206 | ||
207 | /** | |
208 | * stmpe_block_write() - write multiple STMPE registers | |
209 | * @stmpe: Device to write to | |
210 | * @reg: First register | |
211 | * @length: Number of registers | |
212 | * @values: Values to write | |
213 | */ | |
214 | int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, | |
215 | const u8 *values) | |
216 | { | |
217 | int ret; | |
218 | ||
219 | mutex_lock(&stmpe->lock); | |
220 | ret = __stmpe_block_write(stmpe, reg, length, values); | |
221 | mutex_unlock(&stmpe->lock); | |
222 | ||
223 | return ret; | |
224 | } | |
225 | EXPORT_SYMBOL_GPL(stmpe_block_write); | |
226 | ||
227 | /** | |
4dcaa6b6 | 228 | * stmpe_set_altfunc()- set the alternate function for STMPE pins |
27e34995 RV |
229 | * @stmpe: Device to configure |
230 | * @pins: Bitmask of pins to affect | |
231 | * @block: block to enable alternate functions for | |
232 | * | |
233 | * @pins is assumed to have a bit set for each of the bits whose alternate | |
234 | * function is to be changed, numbered according to the GPIOXY numbers. | |
235 | * | |
236 | * If the GPIO module is not enabled, this function automatically enables it in | |
237 | * order to perform the change. | |
238 | */ | |
239 | int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block) | |
240 | { | |
241 | struct stmpe_variant_info *variant = stmpe->variant; | |
242 | u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB]; | |
243 | int af_bits = variant->af_bits; | |
244 | int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8); | |
27e34995 RV |
245 | int mask = (1 << af_bits) - 1; |
246 | u8 regs[numregs]; | |
7f7f4ea1 VK |
247 | int af, afperreg, ret; |
248 | ||
249 | if (!variant->get_altfunc) | |
250 | return 0; | |
27e34995 | 251 | |
7f7f4ea1 | 252 | afperreg = 8 / af_bits; |
27e34995 RV |
253 | mutex_lock(&stmpe->lock); |
254 | ||
255 | ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO); | |
256 | if (ret < 0) | |
257 | goto out; | |
258 | ||
259 | ret = __stmpe_block_read(stmpe, regaddr, numregs, regs); | |
260 | if (ret < 0) | |
261 | goto out; | |
262 | ||
263 | af = variant->get_altfunc(stmpe, block); | |
264 | ||
265 | while (pins) { | |
266 | int pin = __ffs(pins); | |
267 | int regoffset = numregs - (pin / afperreg) - 1; | |
268 | int pos = (pin % afperreg) * (8 / afperreg); | |
269 | ||
270 | regs[regoffset] &= ~(mask << pos); | |
271 | regs[regoffset] |= af << pos; | |
272 | ||
273 | pins &= ~(1 << pin); | |
274 | } | |
275 | ||
276 | ret = __stmpe_block_write(stmpe, regaddr, numregs, regs); | |
277 | ||
278 | out: | |
279 | mutex_unlock(&stmpe->lock); | |
280 | return ret; | |
281 | } | |
282 | EXPORT_SYMBOL_GPL(stmpe_set_altfunc); | |
283 | ||
284 | /* | |
285 | * GPIO (all variants) | |
286 | */ | |
287 | ||
288 | static struct resource stmpe_gpio_resources[] = { | |
289 | /* Start and end filled dynamically */ | |
290 | { | |
291 | .flags = IORESOURCE_IRQ, | |
292 | }, | |
293 | }; | |
294 | ||
295 | static struct mfd_cell stmpe_gpio_cell = { | |
296 | .name = "stmpe-gpio", | |
297 | .resources = stmpe_gpio_resources, | |
298 | .num_resources = ARRAY_SIZE(stmpe_gpio_resources), | |
299 | }; | |
300 | ||
301 | /* | |
302 | * Keypad (1601, 2401, 2403) | |
303 | */ | |
304 | ||
305 | static struct resource stmpe_keypad_resources[] = { | |
306 | { | |
307 | .name = "KEYPAD", | |
308 | .start = 0, | |
309 | .end = 0, | |
310 | .flags = IORESOURCE_IRQ, | |
311 | }, | |
312 | { | |
313 | .name = "KEYPAD_OVER", | |
314 | .start = 1, | |
315 | .end = 1, | |
316 | .flags = IORESOURCE_IRQ, | |
317 | }, | |
318 | }; | |
319 | ||
320 | static struct mfd_cell stmpe_keypad_cell = { | |
321 | .name = "stmpe-keypad", | |
322 | .resources = stmpe_keypad_resources, | |
323 | .num_resources = ARRAY_SIZE(stmpe_keypad_resources), | |
324 | }; | |
325 | ||
7f7f4ea1 VK |
326 | /* |
327 | * STMPE801 | |
328 | */ | |
329 | static const u8 stmpe801_regs[] = { | |
330 | [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID, | |
331 | [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL, | |
332 | [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA, | |
333 | [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN, | |
334 | [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN, | |
335 | [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR, | |
336 | [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN, | |
337 | [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA, | |
338 | ||
339 | }; | |
340 | ||
341 | static struct stmpe_variant_block stmpe801_blocks[] = { | |
342 | { | |
343 | .cell = &stmpe_gpio_cell, | |
344 | .irq = 0, | |
345 | .block = STMPE_BLOCK_GPIO, | |
346 | }, | |
347 | }; | |
348 | ||
349 | static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks, | |
350 | bool enable) | |
351 | { | |
352 | if (blocks & STMPE_BLOCK_GPIO) | |
353 | return 0; | |
354 | else | |
355 | return -EINVAL; | |
356 | } | |
357 | ||
358 | static struct stmpe_variant_info stmpe801 = { | |
359 | .name = "stmpe801", | |
360 | .id_val = STMPE801_ID, | |
361 | .id_mask = 0xffff, | |
362 | .num_gpios = 8, | |
363 | .regs = stmpe801_regs, | |
364 | .blocks = stmpe801_blocks, | |
365 | .num_blocks = ARRAY_SIZE(stmpe801_blocks), | |
366 | .num_irqs = STMPE801_NR_INTERNAL_IRQS, | |
367 | .enable = stmpe801_enable, | |
368 | }; | |
369 | ||
27e34995 | 370 | /* |
1cda2394 | 371 | * Touchscreen (STMPE811 or STMPE610) |
27e34995 RV |
372 | */ |
373 | ||
374 | static struct resource stmpe_ts_resources[] = { | |
375 | { | |
376 | .name = "TOUCH_DET", | |
377 | .start = 0, | |
378 | .end = 0, | |
379 | .flags = IORESOURCE_IRQ, | |
380 | }, | |
381 | { | |
382 | .name = "FIFO_TH", | |
383 | .start = 1, | |
384 | .end = 1, | |
385 | .flags = IORESOURCE_IRQ, | |
386 | }, | |
387 | }; | |
388 | ||
389 | static struct mfd_cell stmpe_ts_cell = { | |
390 | .name = "stmpe-ts", | |
391 | .resources = stmpe_ts_resources, | |
392 | .num_resources = ARRAY_SIZE(stmpe_ts_resources), | |
393 | }; | |
394 | ||
395 | /* | |
1cda2394 | 396 | * STMPE811 or STMPE610 |
27e34995 RV |
397 | */ |
398 | ||
399 | static const u8 stmpe811_regs[] = { | |
400 | [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID, | |
401 | [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL, | |
402 | [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN, | |
403 | [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA, | |
404 | [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA, | |
405 | [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN, | |
406 | [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN, | |
407 | [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR, | |
408 | [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE, | |
409 | [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE, | |
410 | [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF, | |
411 | [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN, | |
412 | [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA, | |
413 | [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED, | |
414 | }; | |
415 | ||
416 | static struct stmpe_variant_block stmpe811_blocks[] = { | |
417 | { | |
418 | .cell = &stmpe_gpio_cell, | |
419 | .irq = STMPE811_IRQ_GPIOC, | |
420 | .block = STMPE_BLOCK_GPIO, | |
421 | }, | |
422 | { | |
423 | .cell = &stmpe_ts_cell, | |
424 | .irq = STMPE811_IRQ_TOUCH_DET, | |
425 | .block = STMPE_BLOCK_TOUCHSCREEN, | |
426 | }, | |
427 | }; | |
428 | ||
429 | static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks, | |
430 | bool enable) | |
431 | { | |
432 | unsigned int mask = 0; | |
433 | ||
434 | if (blocks & STMPE_BLOCK_GPIO) | |
435 | mask |= STMPE811_SYS_CTRL2_GPIO_OFF; | |
436 | ||
437 | if (blocks & STMPE_BLOCK_ADC) | |
438 | mask |= STMPE811_SYS_CTRL2_ADC_OFF; | |
439 | ||
440 | if (blocks & STMPE_BLOCK_TOUCHSCREEN) | |
441 | mask |= STMPE811_SYS_CTRL2_TSC_OFF; | |
442 | ||
443 | return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask, | |
444 | enable ? 0 : mask); | |
445 | } | |
446 | ||
447 | static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) | |
448 | { | |
449 | /* 0 for touchscreen, 1 for GPIO */ | |
450 | return block != STMPE_BLOCK_TOUCHSCREEN; | |
451 | } | |
452 | ||
453 | static struct stmpe_variant_info stmpe811 = { | |
454 | .name = "stmpe811", | |
455 | .id_val = 0x0811, | |
456 | .id_mask = 0xffff, | |
457 | .num_gpios = 8, | |
458 | .af_bits = 1, | |
459 | .regs = stmpe811_regs, | |
460 | .blocks = stmpe811_blocks, | |
461 | .num_blocks = ARRAY_SIZE(stmpe811_blocks), | |
462 | .num_irqs = STMPE811_NR_INTERNAL_IRQS, | |
463 | .enable = stmpe811_enable, | |
464 | .get_altfunc = stmpe811_get_altfunc, | |
465 | }; | |
466 | ||
1cda2394 VK |
467 | /* Similar to 811, except number of gpios */ |
468 | static struct stmpe_variant_info stmpe610 = { | |
469 | .name = "stmpe610", | |
470 | .id_val = 0x0811, | |
471 | .id_mask = 0xffff, | |
472 | .num_gpios = 6, | |
473 | .af_bits = 1, | |
474 | .regs = stmpe811_regs, | |
475 | .blocks = stmpe811_blocks, | |
476 | .num_blocks = ARRAY_SIZE(stmpe811_blocks), | |
477 | .num_irqs = STMPE811_NR_INTERNAL_IRQS, | |
478 | .enable = stmpe811_enable, | |
479 | .get_altfunc = stmpe811_get_altfunc, | |
480 | }; | |
481 | ||
27e34995 RV |
482 | /* |
483 | * STMPE1601 | |
484 | */ | |
485 | ||
486 | static const u8 stmpe1601_regs[] = { | |
487 | [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID, | |
488 | [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB, | |
489 | [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB, | |
490 | [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB, | |
491 | [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB, | |
492 | [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB, | |
493 | [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB, | |
494 | [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB, | |
495 | [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB, | |
496 | [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB, | |
497 | [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB, | |
498 | [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB, | |
499 | [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB, | |
500 | [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB, | |
501 | }; | |
502 | ||
503 | static struct stmpe_variant_block stmpe1601_blocks[] = { | |
504 | { | |
505 | .cell = &stmpe_gpio_cell, | |
506 | .irq = STMPE24XX_IRQ_GPIOC, | |
507 | .block = STMPE_BLOCK_GPIO, | |
508 | }, | |
509 | { | |
510 | .cell = &stmpe_keypad_cell, | |
511 | .irq = STMPE24XX_IRQ_KEYPAD, | |
512 | .block = STMPE_BLOCK_KEYPAD, | |
513 | }, | |
514 | }; | |
515 | ||
5981f4e6 SI |
516 | /* supported autosleep timeout delay (in msecs) */ |
517 | static const int stmpe_autosleep_delay[] = { | |
518 | 4, 16, 32, 64, 128, 256, 512, 1024, | |
519 | }; | |
520 | ||
521 | static int stmpe_round_timeout(int timeout) | |
522 | { | |
523 | int i; | |
524 | ||
525 | for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) { | |
526 | if (stmpe_autosleep_delay[i] >= timeout) | |
527 | return i; | |
528 | } | |
529 | ||
530 | /* | |
531 | * requests for delays longer than supported should not return the | |
532 | * longest supported delay | |
533 | */ | |
534 | return -EINVAL; | |
535 | } | |
536 | ||
537 | static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout) | |
538 | { | |
539 | int ret; | |
540 | ||
541 | if (!stmpe->variant->enable_autosleep) | |
542 | return -ENOSYS; | |
543 | ||
544 | mutex_lock(&stmpe->lock); | |
545 | ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout); | |
546 | mutex_unlock(&stmpe->lock); | |
547 | ||
548 | return ret; | |
549 | } | |
550 | ||
551 | /* | |
552 | * Both stmpe 1601/2403 support same layout for autosleep | |
553 | */ | |
554 | static int stmpe1601_autosleep(struct stmpe *stmpe, | |
555 | int autosleep_timeout) | |
556 | { | |
557 | int ret, timeout; | |
558 | ||
559 | /* choose the best available timeout */ | |
560 | timeout = stmpe_round_timeout(autosleep_timeout); | |
561 | if (timeout < 0) { | |
562 | dev_err(stmpe->dev, "invalid timeout\n"); | |
563 | return timeout; | |
564 | } | |
565 | ||
566 | ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, | |
567 | STMPE1601_AUTOSLEEP_TIMEOUT_MASK, | |
568 | timeout); | |
569 | if (ret < 0) | |
570 | return ret; | |
571 | ||
572 | return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, | |
573 | STPME1601_AUTOSLEEP_ENABLE, | |
574 | STPME1601_AUTOSLEEP_ENABLE); | |
575 | } | |
576 | ||
27e34995 RV |
577 | static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks, |
578 | bool enable) | |
579 | { | |
580 | unsigned int mask = 0; | |
581 | ||
582 | if (blocks & STMPE_BLOCK_GPIO) | |
583 | mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO; | |
584 | ||
585 | if (blocks & STMPE_BLOCK_KEYPAD) | |
586 | mask |= STMPE1601_SYS_CTRL_ENABLE_KPC; | |
587 | ||
588 | return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask, | |
589 | enable ? mask : 0); | |
590 | } | |
591 | ||
592 | static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) | |
593 | { | |
594 | switch (block) { | |
595 | case STMPE_BLOCK_PWM: | |
596 | return 2; | |
597 | ||
598 | case STMPE_BLOCK_KEYPAD: | |
599 | return 1; | |
600 | ||
601 | case STMPE_BLOCK_GPIO: | |
602 | default: | |
603 | return 0; | |
604 | } | |
605 | } | |
606 | ||
607 | static struct stmpe_variant_info stmpe1601 = { | |
608 | .name = "stmpe1601", | |
609 | .id_val = 0x0210, | |
610 | .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */ | |
611 | .num_gpios = 16, | |
612 | .af_bits = 2, | |
613 | .regs = stmpe1601_regs, | |
614 | .blocks = stmpe1601_blocks, | |
615 | .num_blocks = ARRAY_SIZE(stmpe1601_blocks), | |
616 | .num_irqs = STMPE1601_NR_INTERNAL_IRQS, | |
617 | .enable = stmpe1601_enable, | |
618 | .get_altfunc = stmpe1601_get_altfunc, | |
5981f4e6 | 619 | .enable_autosleep = stmpe1601_autosleep, |
27e34995 RV |
620 | }; |
621 | ||
622 | /* | |
623 | * STMPE24XX | |
624 | */ | |
625 | ||
626 | static const u8 stmpe24xx_regs[] = { | |
627 | [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID, | |
628 | [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB, | |
629 | [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB, | |
630 | [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB, | |
631 | [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB, | |
632 | [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB, | |
633 | [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB, | |
634 | [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB, | |
635 | [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB, | |
636 | [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB, | |
637 | [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB, | |
638 | [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB, | |
639 | [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB, | |
640 | [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB, | |
641 | }; | |
642 | ||
643 | static struct stmpe_variant_block stmpe24xx_blocks[] = { | |
644 | { | |
645 | .cell = &stmpe_gpio_cell, | |
646 | .irq = STMPE24XX_IRQ_GPIOC, | |
647 | .block = STMPE_BLOCK_GPIO, | |
648 | }, | |
649 | { | |
650 | .cell = &stmpe_keypad_cell, | |
651 | .irq = STMPE24XX_IRQ_KEYPAD, | |
652 | .block = STMPE_BLOCK_KEYPAD, | |
653 | }, | |
654 | }; | |
655 | ||
656 | static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks, | |
657 | bool enable) | |
658 | { | |
659 | unsigned int mask = 0; | |
660 | ||
661 | if (blocks & STMPE_BLOCK_GPIO) | |
662 | mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO; | |
663 | ||
664 | if (blocks & STMPE_BLOCK_KEYPAD) | |
665 | mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC; | |
666 | ||
667 | return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask, | |
668 | enable ? mask : 0); | |
669 | } | |
670 | ||
671 | static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) | |
672 | { | |
673 | switch (block) { | |
674 | case STMPE_BLOCK_ROTATOR: | |
675 | return 2; | |
676 | ||
677 | case STMPE_BLOCK_KEYPAD: | |
678 | return 1; | |
679 | ||
680 | case STMPE_BLOCK_GPIO: | |
681 | default: | |
682 | return 0; | |
683 | } | |
684 | } | |
685 | ||
686 | static struct stmpe_variant_info stmpe2401 = { | |
687 | .name = "stmpe2401", | |
688 | .id_val = 0x0101, | |
689 | .id_mask = 0xffff, | |
690 | .num_gpios = 24, | |
691 | .af_bits = 2, | |
692 | .regs = stmpe24xx_regs, | |
693 | .blocks = stmpe24xx_blocks, | |
694 | .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), | |
695 | .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, | |
696 | .enable = stmpe24xx_enable, | |
697 | .get_altfunc = stmpe24xx_get_altfunc, | |
698 | }; | |
699 | ||
700 | static struct stmpe_variant_info stmpe2403 = { | |
701 | .name = "stmpe2403", | |
702 | .id_val = 0x0120, | |
703 | .id_mask = 0xffff, | |
704 | .num_gpios = 24, | |
705 | .af_bits = 2, | |
706 | .regs = stmpe24xx_regs, | |
707 | .blocks = stmpe24xx_blocks, | |
708 | .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), | |
709 | .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, | |
710 | .enable = stmpe24xx_enable, | |
711 | .get_altfunc = stmpe24xx_get_altfunc, | |
5981f4e6 | 712 | .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */ |
27e34995 RV |
713 | }; |
714 | ||
715 | static struct stmpe_variant_info *stmpe_variant_info[] = { | |
1cda2394 | 716 | [STMPE610] = &stmpe610, |
7f7f4ea1 | 717 | [STMPE801] = &stmpe801, |
27e34995 RV |
718 | [STMPE811] = &stmpe811, |
719 | [STMPE1601] = &stmpe1601, | |
720 | [STMPE2401] = &stmpe2401, | |
721 | [STMPE2403] = &stmpe2403, | |
722 | }; | |
723 | ||
724 | static irqreturn_t stmpe_irq(int irq, void *data) | |
725 | { | |
726 | struct stmpe *stmpe = data; | |
727 | struct stmpe_variant_info *variant = stmpe->variant; | |
728 | int num = DIV_ROUND_UP(variant->num_irqs, 8); | |
729 | u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB]; | |
730 | u8 isr[num]; | |
731 | int ret; | |
732 | int i; | |
733 | ||
7f7f4ea1 VK |
734 | if (variant->id_val == STMPE801_ID) { |
735 | handle_nested_irq(stmpe->irq_base); | |
736 | return IRQ_HANDLED; | |
737 | } | |
738 | ||
27e34995 RV |
739 | ret = stmpe_block_read(stmpe, israddr, num, isr); |
740 | if (ret < 0) | |
741 | return IRQ_NONE; | |
742 | ||
743 | for (i = 0; i < num; i++) { | |
744 | int bank = num - i - 1; | |
745 | u8 status = isr[i]; | |
746 | u8 clear; | |
747 | ||
748 | status &= stmpe->ier[bank]; | |
749 | if (!status) | |
750 | continue; | |
751 | ||
752 | clear = status; | |
753 | while (status) { | |
754 | int bit = __ffs(status); | |
755 | int line = bank * 8 + bit; | |
756 | ||
757 | handle_nested_irq(stmpe->irq_base + line); | |
758 | status &= ~(1 << bit); | |
759 | } | |
760 | ||
761 | stmpe_reg_write(stmpe, israddr + i, clear); | |
762 | } | |
763 | ||
764 | return IRQ_HANDLED; | |
765 | } | |
766 | ||
43b8c084 | 767 | static void stmpe_irq_lock(struct irq_data *data) |
27e34995 | 768 | { |
43b8c084 | 769 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
27e34995 RV |
770 | |
771 | mutex_lock(&stmpe->irq_lock); | |
772 | } | |
773 | ||
43b8c084 | 774 | static void stmpe_irq_sync_unlock(struct irq_data *data) |
27e34995 | 775 | { |
43b8c084 | 776 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
27e34995 RV |
777 | struct stmpe_variant_info *variant = stmpe->variant; |
778 | int num = DIV_ROUND_UP(variant->num_irqs, 8); | |
779 | int i; | |
780 | ||
781 | for (i = 0; i < num; i++) { | |
782 | u8 new = stmpe->ier[i]; | |
783 | u8 old = stmpe->oldier[i]; | |
784 | ||
785 | if (new == old) | |
786 | continue; | |
787 | ||
788 | stmpe->oldier[i] = new; | |
789 | stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new); | |
790 | } | |
791 | ||
792 | mutex_unlock(&stmpe->irq_lock); | |
793 | } | |
794 | ||
43b8c084 | 795 | static void stmpe_irq_mask(struct irq_data *data) |
27e34995 | 796 | { |
43b8c084 MB |
797 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
798 | int offset = data->irq - stmpe->irq_base; | |
27e34995 RV |
799 | int regoffset = offset / 8; |
800 | int mask = 1 << (offset % 8); | |
801 | ||
802 | stmpe->ier[regoffset] &= ~mask; | |
803 | } | |
804 | ||
43b8c084 | 805 | static void stmpe_irq_unmask(struct irq_data *data) |
27e34995 | 806 | { |
43b8c084 MB |
807 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
808 | int offset = data->irq - stmpe->irq_base; | |
27e34995 RV |
809 | int regoffset = offset / 8; |
810 | int mask = 1 << (offset % 8); | |
811 | ||
812 | stmpe->ier[regoffset] |= mask; | |
813 | } | |
814 | ||
815 | static struct irq_chip stmpe_irq_chip = { | |
816 | .name = "stmpe", | |
43b8c084 MB |
817 | .irq_bus_lock = stmpe_irq_lock, |
818 | .irq_bus_sync_unlock = stmpe_irq_sync_unlock, | |
819 | .irq_mask = stmpe_irq_mask, | |
820 | .irq_unmask = stmpe_irq_unmask, | |
27e34995 RV |
821 | }; |
822 | ||
823 | static int __devinit stmpe_irq_init(struct stmpe *stmpe) | |
824 | { | |
7f7f4ea1 | 825 | struct irq_chip *chip = NULL; |
27e34995 RV |
826 | int num_irqs = stmpe->variant->num_irqs; |
827 | int base = stmpe->irq_base; | |
828 | int irq; | |
829 | ||
7f7f4ea1 VK |
830 | if (stmpe->variant->id_val != STMPE801_ID) |
831 | chip = &stmpe_irq_chip; | |
832 | ||
27e34995 | 833 | for (irq = base; irq < base + num_irqs; irq++) { |
d5bb1221 | 834 | irq_set_chip_data(irq, stmpe); |
7f7f4ea1 | 835 | irq_set_chip_and_handler(irq, chip, handle_edge_irq); |
d5bb1221 | 836 | irq_set_nested_thread(irq, 1); |
27e34995 RV |
837 | #ifdef CONFIG_ARM |
838 | set_irq_flags(irq, IRQF_VALID); | |
839 | #else | |
d5bb1221 | 840 | irq_set_noprobe(irq); |
27e34995 RV |
841 | #endif |
842 | } | |
843 | ||
844 | return 0; | |
845 | } | |
846 | ||
847 | static void stmpe_irq_remove(struct stmpe *stmpe) | |
848 | { | |
849 | int num_irqs = stmpe->variant->num_irqs; | |
850 | int base = stmpe->irq_base; | |
851 | int irq; | |
852 | ||
853 | for (irq = base; irq < base + num_irqs; irq++) { | |
854 | #ifdef CONFIG_ARM | |
855 | set_irq_flags(irq, 0); | |
856 | #endif | |
d5bb1221 TG |
857 | irq_set_chip_and_handler(irq, NULL, NULL); |
858 | irq_set_chip_data(irq, NULL); | |
27e34995 RV |
859 | } |
860 | } | |
861 | ||
862 | static int __devinit stmpe_chip_init(struct stmpe *stmpe) | |
863 | { | |
864 | unsigned int irq_trigger = stmpe->pdata->irq_trigger; | |
5981f4e6 | 865 | int autosleep_timeout = stmpe->pdata->autosleep_timeout; |
27e34995 | 866 | struct stmpe_variant_info *variant = stmpe->variant; |
7f7f4ea1 | 867 | u8 icr; |
27e34995 RV |
868 | unsigned int id; |
869 | u8 data[2]; | |
870 | int ret; | |
871 | ||
872 | ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID], | |
873 | ARRAY_SIZE(data), data); | |
874 | if (ret < 0) | |
875 | return ret; | |
876 | ||
877 | id = (data[0] << 8) | data[1]; | |
878 | if ((id & variant->id_mask) != variant->id_val) { | |
879 | dev_err(stmpe->dev, "unknown chip id: %#x\n", id); | |
880 | return -EINVAL; | |
881 | } | |
882 | ||
883 | dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id); | |
884 | ||
885 | /* Disable all modules -- subdrivers should enable what they need. */ | |
886 | ret = stmpe_disable(stmpe, ~0); | |
887 | if (ret) | |
888 | return ret; | |
889 | ||
7f7f4ea1 VK |
890 | if (id == STMPE801_ID) |
891 | icr = STMPE801_REG_SYS_CTRL_INT_EN; | |
892 | else | |
893 | icr = STMPE_ICR_LSB_GIM; | |
894 | ||
895 | /* STMPE801 doesn't support Edge interrupts */ | |
896 | if (id != STMPE801_ID) { | |
897 | if (irq_trigger == IRQF_TRIGGER_FALLING || | |
898 | irq_trigger == IRQF_TRIGGER_RISING) | |
899 | icr |= STMPE_ICR_LSB_EDGE; | |
900 | } | |
27e34995 RV |
901 | |
902 | if (irq_trigger == IRQF_TRIGGER_RISING || | |
7f7f4ea1 VK |
903 | irq_trigger == IRQF_TRIGGER_HIGH) { |
904 | if (id == STMPE801_ID) | |
905 | icr |= STMPE801_REG_SYS_CTRL_INT_HI; | |
906 | else | |
907 | icr |= STMPE_ICR_LSB_HIGH; | |
908 | } | |
27e34995 | 909 | |
7f7f4ea1 VK |
910 | if (stmpe->pdata->irq_invert_polarity) { |
911 | if (id == STMPE801_ID) | |
912 | icr ^= STMPE801_REG_SYS_CTRL_INT_HI; | |
913 | else | |
914 | icr ^= STMPE_ICR_LSB_HIGH; | |
915 | } | |
27e34995 | 916 | |
5981f4e6 SI |
917 | if (stmpe->pdata->autosleep) { |
918 | ret = stmpe_autosleep(stmpe, autosleep_timeout); | |
919 | if (ret) | |
920 | return ret; | |
921 | } | |
922 | ||
27e34995 RV |
923 | return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); |
924 | } | |
925 | ||
926 | static int __devinit stmpe_add_device(struct stmpe *stmpe, | |
927 | struct mfd_cell *cell, int irq) | |
928 | { | |
929 | return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1, | |
930 | NULL, stmpe->irq_base + irq); | |
931 | } | |
932 | ||
933 | static int __devinit stmpe_devices_init(struct stmpe *stmpe) | |
934 | { | |
935 | struct stmpe_variant_info *variant = stmpe->variant; | |
936 | unsigned int platform_blocks = stmpe->pdata->blocks; | |
937 | int ret = -EINVAL; | |
938 | int i; | |
939 | ||
940 | for (i = 0; i < variant->num_blocks; i++) { | |
941 | struct stmpe_variant_block *block = &variant->blocks[i]; | |
942 | ||
943 | if (!(platform_blocks & block->block)) | |
944 | continue; | |
945 | ||
946 | platform_blocks &= ~block->block; | |
947 | ret = stmpe_add_device(stmpe, block->cell, block->irq); | |
948 | if (ret) | |
949 | return ret; | |
950 | } | |
951 | ||
952 | if (platform_blocks) | |
953 | dev_warn(stmpe->dev, | |
954 | "platform wants blocks (%#x) not present on variant", | |
955 | platform_blocks); | |
956 | ||
957 | return ret; | |
958 | } | |
959 | ||
1a6e4b74 | 960 | /* Called from client specific probe routines */ |
8ad1a973 | 961 | int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum) |
208c4343 | 962 | { |
1a6e4b74 | 963 | struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev); |
27e34995 RV |
964 | struct stmpe *stmpe; |
965 | int ret; | |
966 | ||
967 | if (!pdata) | |
968 | return -EINVAL; | |
969 | ||
970 | stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL); | |
971 | if (!stmpe) | |
972 | return -ENOMEM; | |
973 | ||
974 | mutex_init(&stmpe->irq_lock); | |
975 | mutex_init(&stmpe->lock); | |
976 | ||
1a6e4b74 VK |
977 | stmpe->dev = ci->dev; |
978 | stmpe->client = ci->client; | |
27e34995 RV |
979 | stmpe->pdata = pdata; |
980 | stmpe->irq_base = pdata->irq_base; | |
1a6e4b74 VK |
981 | stmpe->ci = ci; |
982 | stmpe->partnum = partnum; | |
983 | stmpe->variant = stmpe_variant_info[partnum]; | |
27e34995 RV |
984 | stmpe->regs = stmpe->variant->regs; |
985 | stmpe->num_gpios = stmpe->variant->num_gpios; | |
1a6e4b74 | 986 | dev_set_drvdata(stmpe->dev, stmpe); |
27e34995 | 987 | |
1a6e4b74 VK |
988 | if (ci->init) |
989 | ci->init(stmpe); | |
27e34995 | 990 | |
73de16db VK |
991 | if (pdata->irq_over_gpio) { |
992 | ret = gpio_request_one(pdata->irq_gpio, GPIOF_DIR_IN, "stmpe"); | |
993 | if (ret) { | |
994 | dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n", | |
995 | ret); | |
996 | goto out_free; | |
997 | } | |
998 | ||
999 | stmpe->irq = gpio_to_irq(pdata->irq_gpio); | |
1000 | } else { | |
1a6e4b74 | 1001 | stmpe->irq = ci->irq; |
73de16db VK |
1002 | } |
1003 | ||
27e34995 RV |
1004 | ret = stmpe_chip_init(stmpe); |
1005 | if (ret) | |
73de16db | 1006 | goto free_gpio; |
27e34995 RV |
1007 | |
1008 | ret = stmpe_irq_init(stmpe); | |
1009 | if (ret) | |
73de16db | 1010 | goto free_gpio; |
27e34995 | 1011 | |
73de16db | 1012 | ret = request_threaded_irq(stmpe->irq, NULL, stmpe_irq, |
1a6e4b74 | 1013 | pdata->irq_trigger | IRQF_ONESHOT, "stmpe", stmpe); |
27e34995 RV |
1014 | if (ret) { |
1015 | dev_err(stmpe->dev, "failed to request IRQ: %d\n", ret); | |
1016 | goto out_removeirq; | |
1017 | } | |
1018 | ||
1019 | ret = stmpe_devices_init(stmpe); | |
1020 | if (ret) { | |
1021 | dev_err(stmpe->dev, "failed to add children\n"); | |
1022 | goto out_removedevs; | |
1023 | } | |
1024 | ||
1025 | return 0; | |
1026 | ||
1027 | out_removedevs: | |
1028 | mfd_remove_devices(stmpe->dev); | |
73de16db | 1029 | free_irq(stmpe->irq, stmpe); |
27e34995 RV |
1030 | out_removeirq: |
1031 | stmpe_irq_remove(stmpe); | |
73de16db VK |
1032 | free_gpio: |
1033 | if (pdata->irq_over_gpio) | |
1034 | gpio_free(pdata->irq_gpio); | |
27e34995 RV |
1035 | out_free: |
1036 | kfree(stmpe); | |
1037 | return ret; | |
1038 | } | |
1039 | ||
1a6e4b74 | 1040 | int stmpe_remove(struct stmpe *stmpe) |
27e34995 | 1041 | { |
27e34995 RV |
1042 | mfd_remove_devices(stmpe->dev); |
1043 | ||
73de16db | 1044 | free_irq(stmpe->irq, stmpe); |
27e34995 RV |
1045 | stmpe_irq_remove(stmpe); |
1046 | ||
73de16db VK |
1047 | if (stmpe->pdata->irq_over_gpio) |
1048 | gpio_free(stmpe->pdata->irq_gpio); | |
1049 | ||
27e34995 RV |
1050 | kfree(stmpe); |
1051 | ||
1052 | return 0; | |
1053 | } | |
1054 | ||
208c4343 | 1055 | #ifdef CONFIG_PM |
1a6e4b74 VK |
1056 | static int stmpe_suspend(struct device *dev) |
1057 | { | |
1058 | struct stmpe *stmpe = dev_get_drvdata(dev); | |
208c4343 | 1059 | |
1a6e4b74 VK |
1060 | if (device_may_wakeup(dev)) |
1061 | enable_irq_wake(stmpe->irq); | |
27e34995 | 1062 | |
1a6e4b74 | 1063 | return 0; |
27e34995 | 1064 | } |
27e34995 | 1065 | |
1a6e4b74 | 1066 | static int stmpe_resume(struct device *dev) |
27e34995 | 1067 | { |
1a6e4b74 VK |
1068 | struct stmpe *stmpe = dev_get_drvdata(dev); |
1069 | ||
1070 | if (device_may_wakeup(dev)) | |
1071 | disable_irq_wake(stmpe->irq); | |
1072 | ||
1073 | return 0; | |
27e34995 | 1074 | } |
27e34995 | 1075 | |
1a6e4b74 VK |
1076 | const struct dev_pm_ops stmpe_dev_pm_ops = { |
1077 | .suspend = stmpe_suspend, | |
1078 | .resume = stmpe_resume, | |
1079 | }; | |
1080 | #endif |