Commit | Line | Data |
---|---|---|
1f192015 IM |
1 | /* |
2 | * | |
3 | * Toshiba T7L66XB core mfd support | |
4 | * | |
5 | * Copyright (c) 2005, 2007, 2008 Ian Molton | |
6 | * Copyright (c) 2008 Dmitry Baryshkov | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * T7L66 features: | |
13 | * | |
14 | * Supported in this driver: | |
15 | * SD/MMC | |
16 | * SM/NAND flash controller | |
17 | * | |
18 | * As yet not supported | |
19 | * GPIO interface (on NAND pins) | |
20 | * Serial interface | |
21 | * TFT 'interface converter' | |
22 | * PCMCIA interface logic | |
23 | */ | |
24 | ||
25 | #include <linux/kernel.h> | |
26 | #include <linux/module.h> | |
7acb706c | 27 | #include <linux/err.h> |
1f192015 IM |
28 | #include <linux/io.h> |
29 | #include <linux/irq.h> | |
7acb706c | 30 | #include <linux/clk.h> |
1f192015 IM |
31 | #include <linux/platform_device.h> |
32 | #include <linux/mfd/core.h> | |
33 | #include <linux/mfd/tmio.h> | |
34 | #include <linux/mfd/t7l66xb.h> | |
35 | ||
36 | enum { | |
37 | T7L66XB_CELL_NAND, | |
38 | T7L66XB_CELL_MMC, | |
39 | }; | |
40 | ||
41 | #define SCR_REVID 0x08 /* b Revision ID */ | |
42 | #define SCR_IMR 0x42 /* b Interrupt Mask */ | |
43 | #define SCR_DEV_CTL 0xe0 /* b Device control */ | |
44 | #define SCR_ISR 0xe1 /* b Interrupt Status */ | |
45 | #define SCR_GPO_OC 0xf0 /* b GPO output control */ | |
46 | #define SCR_GPO_OS 0xf1 /* b GPO output enable */ | |
47 | #define SCR_GPI_S 0xf2 /* w GPI status */ | |
48 | #define SCR_APDC 0xf8 /* b Active pullup down ctrl */ | |
49 | ||
50 | #define SCR_DEV_CTL_USB BIT(0) /* USB enable */ | |
51 | #define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */ | |
52 | ||
53 | /*--------------------------------------------------------------------------*/ | |
54 | ||
55 | struct t7l66xb { | |
56 | void __iomem *scr; | |
57 | /* Lock to protect registers requiring read/modify/write ops. */ | |
58 | spinlock_t lock; | |
59 | ||
60 | struct resource rscr; | |
7acb706c IM |
61 | struct clk *clk48m; |
62 | struct clk *clk32k; | |
1f192015 IM |
63 | int irq; |
64 | int irq_base; | |
65 | }; | |
66 | ||
67 | /*--------------------------------------------------------------------------*/ | |
68 | ||
69 | static int t7l66xb_mmc_enable(struct platform_device *mmc) | |
70 | { | |
71 | struct platform_device *dev = to_platform_device(mmc->dev.parent); | |
1f192015 IM |
72 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
73 | unsigned long flags; | |
74 | u8 dev_ctl; | |
75 | ||
7acb706c | 76 | clk_enable(t7l66xb->clk32k); |
1f192015 IM |
77 | |
78 | spin_lock_irqsave(&t7l66xb->lock, flags); | |
79 | ||
80 | dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); | |
81 | dev_ctl |= SCR_DEV_CTL_MMC; | |
82 | tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); | |
83 | ||
84 | spin_unlock_irqrestore(&t7l66xb->lock, flags); | |
85 | ||
86 | return 0; | |
87 | } | |
88 | ||
89 | static int t7l66xb_mmc_disable(struct platform_device *mmc) | |
90 | { | |
91 | struct platform_device *dev = to_platform_device(mmc->dev.parent); | |
1f192015 IM |
92 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
93 | unsigned long flags; | |
94 | u8 dev_ctl; | |
95 | ||
96 | spin_lock_irqsave(&t7l66xb->lock, flags); | |
97 | ||
98 | dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); | |
99 | dev_ctl &= ~SCR_DEV_CTL_MMC; | |
100 | tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); | |
101 | ||
102 | spin_unlock_irqrestore(&t7l66xb->lock, flags); | |
103 | ||
7acb706c | 104 | clk_disable(t7l66xb->clk32k); |
1f192015 IM |
105 | |
106 | return 0; | |
107 | } | |
108 | ||
109 | /*--------------------------------------------------------------------------*/ | |
110 | ||
4d3792e0 | 111 | static struct tmio_mmc_data t7166xb_mmc_data = { |
f0e46cc4 PZ |
112 | .hclk = 24000000, |
113 | }; | |
114 | ||
3446d4bb | 115 | static const struct resource t7l66xb_mmc_resources[] = { |
1f192015 IM |
116 | { |
117 | .start = 0x800, | |
118 | .end = 0x9ff, | |
119 | .flags = IORESOURCE_MEM, | |
120 | }, | |
121 | { | |
122 | .start = 0x200, | |
123 | .end = 0x2ff, | |
124 | .flags = IORESOURCE_MEM, | |
125 | }, | |
126 | { | |
127 | .start = IRQ_T7L66XB_MMC, | |
128 | .end = IRQ_T7L66XB_MMC, | |
129 | .flags = IORESOURCE_IRQ, | |
130 | }, | |
131 | }; | |
132 | ||
3446d4bb | 133 | static const struct resource t7l66xb_nand_resources[] = { |
1f192015 IM |
134 | { |
135 | .start = 0xc00, | |
136 | .end = 0xc07, | |
137 | .flags = IORESOURCE_MEM, | |
138 | }, | |
139 | { | |
140 | .start = 0x0100, | |
141 | .end = 0x01ff, | |
142 | .flags = IORESOURCE_MEM, | |
143 | }, | |
144 | { | |
145 | .start = IRQ_T7L66XB_NAND, | |
146 | .end = IRQ_T7L66XB_NAND, | |
147 | .flags = IORESOURCE_IRQ, | |
148 | }, | |
149 | }; | |
150 | ||
151 | static struct mfd_cell t7l66xb_cells[] = { | |
152 | [T7L66XB_CELL_MMC] = { | |
153 | .name = "tmio-mmc", | |
154 | .enable = t7l66xb_mmc_enable, | |
155 | .disable = t7l66xb_mmc_disable, | |
f0e46cc4 | 156 | .driver_data = &t7166xb_mmc_data, |
1f192015 IM |
157 | .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources), |
158 | .resources = t7l66xb_mmc_resources, | |
159 | }, | |
160 | [T7L66XB_CELL_NAND] = { | |
161 | .name = "tmio-nand", | |
162 | .num_resources = ARRAY_SIZE(t7l66xb_nand_resources), | |
163 | .resources = t7l66xb_nand_resources, | |
164 | }, | |
165 | }; | |
166 | ||
167 | /*--------------------------------------------------------------------------*/ | |
168 | ||
169 | /* Handle the T7L66XB interrupt mux */ | |
170 | static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc) | |
171 | { | |
172 | struct t7l66xb *t7l66xb = get_irq_data(irq); | |
173 | unsigned int isr; | |
174 | unsigned int i, irq_base; | |
175 | ||
176 | irq_base = t7l66xb->irq_base; | |
177 | ||
178 | while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) & | |
179 | ~tmio_ioread8(t7l66xb->scr + SCR_IMR))) | |
180 | for (i = 0; i < T7L66XB_NR_IRQS; i++) | |
181 | if (isr & (1 << i)) | |
182 | generic_handle_irq(irq_base + i); | |
183 | } | |
184 | ||
185 | static void t7l66xb_irq_mask(unsigned int irq) | |
186 | { | |
187 | struct t7l66xb *t7l66xb = get_irq_chip_data(irq); | |
188 | unsigned long flags; | |
189 | u8 imr; | |
190 | ||
191 | spin_lock_irqsave(&t7l66xb->lock, flags); | |
192 | imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); | |
193 | imr |= 1 << (irq - t7l66xb->irq_base); | |
194 | tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); | |
195 | spin_unlock_irqrestore(&t7l66xb->lock, flags); | |
196 | } | |
197 | ||
198 | static void t7l66xb_irq_unmask(unsigned int irq) | |
199 | { | |
200 | struct t7l66xb *t7l66xb = get_irq_chip_data(irq); | |
201 | unsigned long flags; | |
202 | u8 imr; | |
203 | ||
204 | spin_lock_irqsave(&t7l66xb->lock, flags); | |
205 | imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); | |
206 | imr &= ~(1 << (irq - t7l66xb->irq_base)); | |
207 | tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); | |
208 | spin_unlock_irqrestore(&t7l66xb->lock, flags); | |
209 | } | |
210 | ||
211 | static struct irq_chip t7l66xb_chip = { | |
212 | .name = "t7l66xb", | |
213 | .ack = t7l66xb_irq_mask, | |
214 | .mask = t7l66xb_irq_mask, | |
215 | .unmask = t7l66xb_irq_unmask, | |
216 | }; | |
217 | ||
218 | /*--------------------------------------------------------------------------*/ | |
219 | ||
220 | /* Install the IRQ handler */ | |
221 | static void t7l66xb_attach_irq(struct platform_device *dev) | |
222 | { | |
223 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); | |
224 | unsigned int irq, irq_base; | |
225 | ||
226 | irq_base = t7l66xb->irq_base; | |
227 | ||
228 | for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { | |
229 | set_irq_chip(irq, &t7l66xb_chip); | |
230 | set_irq_chip_data(irq, t7l66xb); | |
231 | set_irq_handler(irq, handle_level_irq); | |
232 | #ifdef CONFIG_ARM | |
233 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
234 | #endif | |
235 | } | |
236 | ||
237 | set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING); | |
238 | set_irq_data(t7l66xb->irq, t7l66xb); | |
239 | set_irq_chained_handler(t7l66xb->irq, t7l66xb_irq); | |
240 | } | |
241 | ||
242 | static void t7l66xb_detach_irq(struct platform_device *dev) | |
243 | { | |
244 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); | |
245 | unsigned int irq, irq_base; | |
246 | ||
247 | irq_base = t7l66xb->irq_base; | |
248 | ||
249 | set_irq_chained_handler(t7l66xb->irq, NULL); | |
250 | set_irq_data(t7l66xb->irq, NULL); | |
251 | ||
252 | for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { | |
253 | #ifdef CONFIG_ARM | |
254 | set_irq_flags(irq, 0); | |
255 | #endif | |
256 | set_irq_chip(irq, NULL); | |
257 | set_irq_chip_data(irq, NULL); | |
258 | } | |
259 | } | |
260 | ||
261 | /*--------------------------------------------------------------------------*/ | |
262 | ||
263 | #ifdef CONFIG_PM | |
264 | static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state) | |
265 | { | |
7acb706c | 266 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
1f192015 IM |
267 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
268 | ||
269 | if (pdata && pdata->suspend) | |
270 | pdata->suspend(dev); | |
7acb706c | 271 | clk_disable(t7l66xb->clk48m); |
1f192015 IM |
272 | |
273 | return 0; | |
274 | } | |
275 | ||
276 | static int t7l66xb_resume(struct platform_device *dev) | |
277 | { | |
7acb706c | 278 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
1f192015 IM |
279 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
280 | ||
7acb706c | 281 | clk_enable(t7l66xb->clk48m); |
1f192015 IM |
282 | if (pdata && pdata->resume) |
283 | pdata->resume(dev); | |
284 | ||
285 | return 0; | |
286 | } | |
287 | #else | |
288 | #define t7l66xb_suspend NULL | |
289 | #define t7l66xb_resume NULL | |
290 | #endif | |
291 | ||
292 | /*--------------------------------------------------------------------------*/ | |
293 | ||
294 | static int t7l66xb_probe(struct platform_device *dev) | |
295 | { | |
296 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; | |
297 | struct t7l66xb *t7l66xb; | |
298 | struct resource *iomem, *rscr; | |
299 | int ret; | |
300 | ||
301 | iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); | |
302 | if (!iomem) | |
303 | return -EINVAL; | |
304 | ||
305 | t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL); | |
306 | if (!t7l66xb) | |
307 | return -ENOMEM; | |
308 | ||
309 | spin_lock_init(&t7l66xb->lock); | |
310 | ||
311 | platform_set_drvdata(dev, t7l66xb); | |
312 | ||
313 | ret = platform_get_irq(dev, 0); | |
314 | if (ret >= 0) | |
315 | t7l66xb->irq = ret; | |
316 | else | |
317 | goto err_noirq; | |
318 | ||
319 | t7l66xb->irq_base = pdata->irq_base; | |
320 | ||
7acb706c IM |
321 | t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K"); |
322 | if (IS_ERR(t7l66xb->clk32k)) { | |
323 | ret = PTR_ERR(t7l66xb->clk32k); | |
324 | goto err_clk32k_get; | |
325 | } | |
326 | ||
327 | t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M"); | |
328 | if (IS_ERR(t7l66xb->clk48m)) { | |
329 | ret = PTR_ERR(t7l66xb->clk48m); | |
330 | clk_put(t7l66xb->clk32k); | |
331 | goto err_clk48m_get; | |
332 | } | |
333 | ||
1f192015 IM |
334 | rscr = &t7l66xb->rscr; |
335 | rscr->name = "t7l66xb-core"; | |
336 | rscr->start = iomem->start; | |
337 | rscr->end = iomem->start + 0xff; | |
338 | rscr->flags = IORESOURCE_MEM; | |
339 | ||
340 | ret = request_resource(iomem, rscr); | |
341 | if (ret) | |
342 | goto err_request_scr; | |
343 | ||
344 | t7l66xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1); | |
345 | if (!t7l66xb->scr) { | |
346 | ret = -ENOMEM; | |
347 | goto err_ioremap; | |
348 | } | |
349 | ||
7acb706c IM |
350 | clk_enable(t7l66xb->clk48m); |
351 | ||
1f192015 IM |
352 | if (pdata && pdata->enable) |
353 | pdata->enable(dev); | |
354 | ||
355 | /* Mask all interrupts */ | |
356 | tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR); | |
357 | ||
358 | printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n", | |
359 | dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID), | |
360 | (unsigned long)iomem->start, t7l66xb->irq); | |
361 | ||
362 | t7l66xb_attach_irq(dev); | |
363 | ||
364 | t7l66xb_cells[T7L66XB_CELL_NAND].driver_data = pdata->nand_data; | |
56bf2bda SO |
365 | t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = |
366 | &t7l66xb_cells[T7L66XB_CELL_NAND]; | |
367 | t7l66xb_cells[T7L66XB_CELL_NAND].data_size = | |
368 | sizeof(t7l66xb_cells[T7L66XB_CELL_NAND]); | |
1f192015 | 369 | |
8a4fbe01 IM |
370 | t7l66xb_cells[T7L66XB_CELL_MMC].platform_data = |
371 | &t7l66xb_cells[T7L66XB_CELL_MMC]; | |
372 | t7l66xb_cells[T7L66XB_CELL_MMC].data_size = | |
373 | sizeof(t7l66xb_cells[T7L66XB_CELL_MMC]); | |
374 | ||
56bf2bda SO |
375 | ret = mfd_add_devices(&dev->dev, dev->id, |
376 | t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells), | |
377 | iomem, t7l66xb->irq_base); | |
1f192015 IM |
378 | |
379 | if (!ret) | |
380 | return 0; | |
381 | ||
382 | t7l66xb_detach_irq(dev); | |
383 | iounmap(t7l66xb->scr); | |
384 | err_ioremap: | |
385 | release_resource(&t7l66xb->rscr); | |
1f192015 IM |
386 | err_request_scr: |
387 | kfree(t7l66xb); | |
7acb706c IM |
388 | clk_put(t7l66xb->clk48m); |
389 | err_clk48m_get: | |
390 | clk_put(t7l66xb->clk32k); | |
391 | err_clk32k_get: | |
392 | err_noirq: | |
1f192015 IM |
393 | return ret; |
394 | } | |
395 | ||
396 | static int t7l66xb_remove(struct platform_device *dev) | |
397 | { | |
398 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; | |
399 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); | |
400 | int ret; | |
401 | ||
402 | ret = pdata->disable(dev); | |
7acb706c IM |
403 | clk_disable(t7l66xb->clk48m); |
404 | clk_put(t7l66xb->clk48m); | |
1f192015 IM |
405 | t7l66xb_detach_irq(dev); |
406 | iounmap(t7l66xb->scr); | |
407 | release_resource(&t7l66xb->rscr); | |
56bf2bda | 408 | mfd_remove_devices(&dev->dev); |
1f192015 IM |
409 | platform_set_drvdata(dev, NULL); |
410 | kfree(t7l66xb); | |
411 | ||
412 | return ret; | |
413 | ||
414 | } | |
415 | ||
416 | static struct platform_driver t7l66xb_platform_driver = { | |
417 | .driver = { | |
418 | .name = "t7l66xb", | |
419 | .owner = THIS_MODULE, | |
420 | }, | |
421 | .suspend = t7l66xb_suspend, | |
422 | .resume = t7l66xb_resume, | |
423 | .probe = t7l66xb_probe, | |
424 | .remove = t7l66xb_remove, | |
425 | }; | |
426 | ||
427 | /*--------------------------------------------------------------------------*/ | |
428 | ||
429 | static int __init t7l66xb_init(void) | |
430 | { | |
431 | int retval = 0; | |
432 | ||
433 | retval = platform_driver_register(&t7l66xb_platform_driver); | |
434 | return retval; | |
435 | } | |
436 | ||
437 | static void __exit t7l66xb_exit(void) | |
438 | { | |
439 | platform_driver_unregister(&t7l66xb_platform_driver); | |
440 | } | |
441 | ||
442 | module_init(t7l66xb_init); | |
443 | module_exit(t7l66xb_exit); | |
444 | ||
445 | MODULE_DESCRIPTION("Toshiba T7L66XB core driver"); | |
446 | MODULE_LICENSE("GPL v2"); | |
447 | MODULE_AUTHOR("Ian Molton"); | |
448 | MODULE_ALIAS("platform:t7l66xb"); |