gpu: add moduleparam.h to drivers/gpu/drm/drm_crtc_helper.c
[deliverable/linux.git] / drivers / mfd / twl-core.c
CommitLineData
a603a7fa 1/*
fc7b92fc
B
2 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
3 * and audio CODEC devices
a603a7fa
DB
4 *
5 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 *
7 * Modifications to defer interrupt handling to a kernel thread:
8 * Copyright (C) 2006 MontaVista Software, Inc.
9 *
10 * Based on tlv320aic23.c:
11 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 *
13 * Code cleanup and modifications to IRQ handler.
14 * by syed khasim <x0khasim@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 */
30
a603a7fa
DB
31#include <linux/init.h>
32#include <linux/mutex.h>
a603a7fa
DB
33#include <linux/platform_device.h>
34#include <linux/clk.h>
a30d46c0 35#include <linux/err.h>
a603a7fa 36
dad759ff
DB
37#include <linux/regulator/machine.h>
38
a603a7fa 39#include <linux/i2c.h>
b07682b6 40#include <linux/i2c/twl.h>
a603a7fa 41
a313d758 42#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
ce491cf8 43#include <plat/cpu.h>
b29c06ae 44#endif
a603a7fa
DB
45
46/*
47 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
48 * Management and System Companion Device" chips originally designed for
49 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
50 * often at around 3 Mbit/sec, including for interrupt handling.
51 *
52 * This driver core provides genirq support for the interrupts emitted,
53 * by the various modules, and exports register access primitives.
54 *
55 * FIXME this driver currently requires use of the first interrupt line
56 * (and associated registers).
57 */
58
fc7b92fc 59#define DRIVER_NAME "twl"
a603a7fa 60
a603a7fa
DB
61#if defined(CONFIG_KEYBOARD_TWL4030) || defined(CONFIG_KEYBOARD_TWL4030_MODULE)
62#define twl_has_keypad() true
63#else
64#define twl_has_keypad() false
65#endif
66
67#if defined(CONFIG_GPIO_TWL4030) || defined(CONFIG_GPIO_TWL4030_MODULE)
68#define twl_has_gpio() true
69#else
70#define twl_has_gpio() false
71#endif
72
dad759ff
DB
73#if defined(CONFIG_REGULATOR_TWL4030) \
74 || defined(CONFIG_REGULATOR_TWL4030_MODULE)
75#define twl_has_regulator() true
76#else
77#define twl_has_regulator() false
78#endif
79
a603a7fa
DB
80#if defined(CONFIG_TWL4030_MADC) || defined(CONFIG_TWL4030_MADC_MODULE)
81#define twl_has_madc() true
82#else
83#define twl_has_madc() false
84#endif
85
ebf0bd36
AK
86#ifdef CONFIG_TWL4030_POWER
87#define twl_has_power() true
88#else
89#define twl_has_power() false
90#endif
91
a603a7fa
DB
92#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
93#define twl_has_rtc() true
94#else
95#define twl_has_rtc() false
96#endif
97
e70357e3
HH
98#if defined(CONFIG_TWL4030_USB) || defined(CONFIG_TWL4030_USB_MODULE) ||\
99 defined(CONFIG_TWL6030_USB) || defined(CONFIG_TWL6030_USB_MODULE)
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DB
100#define twl_has_usb() true
101#else
102#define twl_has_usb() false
103#endif
104
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105#if defined(CONFIG_TWL4030_WATCHDOG) || \
106 defined(CONFIG_TWL4030_WATCHDOG_MODULE)
107#define twl_has_watchdog() true
108#else
109#define twl_has_watchdog() false
110#endif
a603a7fa 111
d62abe56 112#if defined(CONFIG_TWL4030_CODEC) || defined(CONFIG_TWL4030_CODEC_MODULE) ||\
f19b2823 113 defined(CONFIG_TWL6040_CORE) || defined(CONFIG_TWL6040_CORE_MODULE)
0b83ddeb
PU
114#define twl_has_codec() true
115#else
116#define twl_has_codec() false
117#endif
118
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GI
119#if defined(CONFIG_CHARGER_TWL4030) || defined(CONFIG_CHARGER_TWL4030_MODULE)
120#define twl_has_bci() true
121#else
122#define twl_has_bci() false
123#endif
124
a603a7fa
DB
125/* Triton Core internal information (BEGIN) */
126
127/* Last - for index max*/
128#define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG
129
fc7b92fc 130#define TWL_NUM_SLAVES 4
a603a7fa 131
9c3664dd 132#if defined(CONFIG_INPUT_TWL4030_PWRBUTTON) \
14e5c82c 133 || defined(CONFIG_INPUT_TWL4030_PWRBUTTON_MODULE)
9c3664dd
FB
134#define twl_has_pwrbutton() true
135#else
136#define twl_has_pwrbutton() false
137#endif
a603a7fa 138
fc7b92fc
B
139#define SUB_CHIP_ID0 0
140#define SUB_CHIP_ID1 1
141#define SUB_CHIP_ID2 2
142#define SUB_CHIP_ID3 3
143
144#define TWL_MODULE_LAST TWL4030_MODULE_LAST
145
a603a7fa
DB
146/* Base Address defns for twl4030_map[] */
147
148/* subchip/slave 0 - USB ID */
149#define TWL4030_BASEADD_USB 0x0000
150
151/* subchip/slave 1 - AUD ID */
152#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
153#define TWL4030_BASEADD_GPIO 0x0098
154#define TWL4030_BASEADD_INTBR 0x0085
155#define TWL4030_BASEADD_PIH 0x0080
156#define TWL4030_BASEADD_TEST 0x004C
157
158/* subchip/slave 2 - AUX ID */
159#define TWL4030_BASEADD_INTERRUPTS 0x00B9
160#define TWL4030_BASEADD_LED 0x00EE
161#define TWL4030_BASEADD_MADC 0x0000
162#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
163#define TWL4030_BASEADD_PRECHARGE 0x00AA
164#define TWL4030_BASEADD_PWM0 0x00F8
165#define TWL4030_BASEADD_PWM1 0x00FB
166#define TWL4030_BASEADD_PWMA 0x00EF
167#define TWL4030_BASEADD_PWMB 0x00F1
168#define TWL4030_BASEADD_KEYPAD 0x00D2
169
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IK
170#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
171#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
172 one */
173
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DB
174/* subchip/slave 3 - POWER ID */
175#define TWL4030_BASEADD_BACKUP 0x0014
176#define TWL4030_BASEADD_INT 0x002E
177#define TWL4030_BASEADD_PM_MASTER 0x0036
178#define TWL4030_BASEADD_PM_RECEIVER 0x005B
179#define TWL4030_BASEADD_RTC 0x001C
180#define TWL4030_BASEADD_SECURED_REG 0x0000
181
182/* Triton Core internal information (END) */
183
184
e8deb28c
B
185/* subchip/slave 0 0x48 - POWER */
186#define TWL6030_BASEADD_RTC 0x0000
187#define TWL6030_BASEADD_MEM 0x0017
188#define TWL6030_BASEADD_PM_MASTER 0x001F
189#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
190#define TWL6030_BASEADD_PM_MISC 0x00E2
191#define TWL6030_BASEADD_PM_PUPD 0x00F0
192
193/* subchip/slave 1 0x49 - FEATURE */
194#define TWL6030_BASEADD_USB 0x0000
195#define TWL6030_BASEADD_GPADC_CTRL 0x002E
196#define TWL6030_BASEADD_AUX 0x0090
197#define TWL6030_BASEADD_PWM 0x00BA
198#define TWL6030_BASEADD_GASGAUGE 0x00C0
199#define TWL6030_BASEADD_PIH 0x00D0
200#define TWL6030_BASEADD_CHARGER 0x00E0
521d8ec3 201#define TWL6025_BASEADD_CHARGER 0x00DA
e8deb28c
B
202
203/* subchip/slave 2 0x4A - DFT */
204#define TWL6030_BASEADD_DIEID 0x00C0
205
206/* subchip/slave 3 0x4B - AUDIO */
207#define TWL6030_BASEADD_AUDIO 0x0000
208#define TWL6030_BASEADD_RSV 0x0000
fa0d9762 209#define TWL6030_BASEADD_ZERO 0x0000
e8deb28c 210
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DB
211/* Few power values */
212#define R_CFG_BOOT 0x05
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DB
213
214/* some fields in R_CFG_BOOT */
215#define HFCLK_FREQ_19p2_MHZ (1 << 0)
216#define HFCLK_FREQ_26_MHZ (2 << 0)
217#define HFCLK_FREQ_38p4_MHZ (3 << 0)
218#define HIGH_PERF_SQ (1 << 3)
38a68496 219#define CK32K_LOWPWR_EN (1 << 7)
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DB
220
221
dad759ff
DB
222/* chip-specific feature flags, for i2c_device_id.driver_data */
223#define TWL4030_VAUX2 BIT(0) /* pre-5030 voltage ranges */
224#define TPS_SUBSET BIT(1) /* tps659[23]0 have fewer LDOs */
1920a61e 225#define TWL5031 BIT(2) /* twl5031 has different registers */
e8deb28c 226#define TWL6030_CLASS BIT(3) /* TWL6030 class */
dad759ff 227
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DB
228/*----------------------------------------------------------------------*/
229
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DB
230/* is driver active, bound to a chip? */
231static bool inuse;
232
ca972d13
L
233/* TWL IDCODE Register value */
234static u32 twl_idcode;
235
e8deb28c
B
236static unsigned int twl_id;
237unsigned int twl_rev(void)
238{
239 return twl_id;
240}
241EXPORT_SYMBOL(twl_rev);
242
243/* Structure for each TWL4030/TWL6030 Slave */
fc7b92fc 244struct twl_client {
a603a7fa
DB
245 struct i2c_client *client;
246 u8 address;
247
248 /* max numb of i2c_msg required is for read =2 */
249 struct i2c_msg xfer_msg[2];
250
251 /* To lock access to xfer_msg */
252 struct mutex xfer_lock;
253};
254
fc7b92fc 255static struct twl_client twl_modules[TWL_NUM_SLAVES];
a603a7fa
DB
256
257
258/* mapping the module id to slave id and base address */
fc7b92fc 259struct twl_mapping {
a603a7fa
DB
260 unsigned char sid; /* Slave ID */
261 unsigned char base; /* base address */
262};
2cfcce18 263static struct twl_mapping *twl_map;
a603a7fa 264
fc7b92fc 265static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
a603a7fa
DB
266 /*
267 * NOTE: don't change this table without updating the
e8deb28c 268 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
a603a7fa
DB
269 * so they continue to match the order in this table.
270 */
271
272 { 0, TWL4030_BASEADD_USB },
273
274 { 1, TWL4030_BASEADD_AUDIO_VOICE },
275 { 1, TWL4030_BASEADD_GPIO },
276 { 1, TWL4030_BASEADD_INTBR },
277 { 1, TWL4030_BASEADD_PIH },
278 { 1, TWL4030_BASEADD_TEST },
279
280 { 2, TWL4030_BASEADD_KEYPAD },
281 { 2, TWL4030_BASEADD_MADC },
282 { 2, TWL4030_BASEADD_INTERRUPTS },
283 { 2, TWL4030_BASEADD_LED },
284 { 2, TWL4030_BASEADD_MAIN_CHARGE },
285 { 2, TWL4030_BASEADD_PRECHARGE },
286 { 2, TWL4030_BASEADD_PWM0 },
287 { 2, TWL4030_BASEADD_PWM1 },
288 { 2, TWL4030_BASEADD_PWMA },
289 { 2, TWL4030_BASEADD_PWMB },
1920a61e
IK
290 { 2, TWL5031_BASEADD_ACCESSORY },
291 { 2, TWL5031_BASEADD_INTERRUPTS },
a603a7fa
DB
292
293 { 3, TWL4030_BASEADD_BACKUP },
294 { 3, TWL4030_BASEADD_INT },
295 { 3, TWL4030_BASEADD_PM_MASTER },
296 { 3, TWL4030_BASEADD_PM_RECEIVER },
297 { 3, TWL4030_BASEADD_RTC },
298 { 3, TWL4030_BASEADD_SECURED_REG },
299};
300
e8deb28c
B
301static struct twl_mapping twl6030_map[] = {
302 /*
303 * NOTE: don't change this table without updating the
304 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
305 * so they continue to match the order in this table.
306 */
307 { SUB_CHIP_ID1, TWL6030_BASEADD_USB },
308 { SUB_CHIP_ID3, TWL6030_BASEADD_AUDIO },
309 { SUB_CHIP_ID2, TWL6030_BASEADD_DIEID },
310 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
311 { SUB_CHIP_ID1, TWL6030_BASEADD_PIH },
312
313 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
314 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
315 { SUB_CHIP_ID1, TWL6030_BASEADD_GPADC_CTRL },
316 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
317 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
318
319 { SUB_CHIP_ID1, TWL6030_BASEADD_CHARGER },
320 { SUB_CHIP_ID1, TWL6030_BASEADD_GASGAUGE },
321 { SUB_CHIP_ID1, TWL6030_BASEADD_PWM },
fa0d9762
B
322 { SUB_CHIP_ID0, TWL6030_BASEADD_ZERO },
323 { SUB_CHIP_ID1, TWL6030_BASEADD_ZERO },
e8deb28c 324
fa0d9762
B
325 { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
326 { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
e8deb28c
B
327 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
328 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
329 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
330 { SUB_CHIP_ID0, TWL6030_BASEADD_PM_MASTER },
331 { SUB_CHIP_ID0, TWL6030_BASEADD_PM_SLAVE_MISC },
332
333 { SUB_CHIP_ID0, TWL6030_BASEADD_RTC },
334 { SUB_CHIP_ID0, TWL6030_BASEADD_MEM },
521d8ec3 335 { SUB_CHIP_ID1, TWL6025_BASEADD_CHARGER },
e8deb28c
B
336};
337
a603a7fa
DB
338/*----------------------------------------------------------------------*/
339
a603a7fa
DB
340/* Exported Functions */
341
342/**
fc7b92fc 343 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
344 * @mod_no: module number
345 * @value: an array of num_bytes+1 containing data to write
346 * @reg: register address (just offset will do)
347 * @num_bytes: number of bytes to transfer
348 *
349 * IMPORTANT: for 'value' parameter: Allocate value num_bytes+1 and
350 * valid data starts at Offset 1.
351 *
352 * Returns the result of operation - 0 is success
353 */
fc7b92fc 354int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
a603a7fa
DB
355{
356 int ret;
357 int sid;
fc7b92fc 358 struct twl_client *twl;
a603a7fa
DB
359 struct i2c_msg *msg;
360
fc7b92fc 361 if (unlikely(mod_no > TWL_MODULE_LAST)) {
a603a7fa
DB
362 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
363 return -EPERM;
364 }
e8deb28c 365 sid = twl_map[mod_no].sid;
fc7b92fc 366 twl = &twl_modules[sid];
a603a7fa
DB
367
368 if (unlikely(!inuse)) {
369 pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid);
370 return -EPERM;
371 }
372 mutex_lock(&twl->xfer_lock);
373 /*
374 * [MSG1]: fill the register address data
375 * fill the data Tx buffer
376 */
377 msg = &twl->xfer_msg[0];
378 msg->addr = twl->address;
379 msg->len = num_bytes + 1;
380 msg->flags = 0;
381 msg->buf = value;
382 /* over write the first byte of buffer with the register address */
e8deb28c 383 *value = twl_map[mod_no].base + reg;
a603a7fa
DB
384 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1);
385 mutex_unlock(&twl->xfer_lock);
386
147e0847
AK
387 /* i2c_transfer returns number of messages transferred */
388 if (ret != 1) {
389 pr_err("%s: i2c_write failed to transfer all messages\n",
390 DRIVER_NAME);
391 if (ret < 0)
392 return ret;
393 else
394 return -EIO;
395 } else {
396 return 0;
397 }
a603a7fa 398}
fc7b92fc 399EXPORT_SYMBOL(twl_i2c_write);
a603a7fa
DB
400
401/**
fc7b92fc 402 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
403 * @mod_no: module number
404 * @value: an array of num_bytes containing data to be read
405 * @reg: register address (just offset will do)
406 * @num_bytes: number of bytes to transfer
407 *
408 * Returns result of operation - num_bytes is success else failure.
409 */
fc7b92fc 410int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
a603a7fa
DB
411{
412 int ret;
413 u8 val;
414 int sid;
fc7b92fc 415 struct twl_client *twl;
a603a7fa
DB
416 struct i2c_msg *msg;
417
fc7b92fc 418 if (unlikely(mod_no > TWL_MODULE_LAST)) {
a603a7fa
DB
419 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
420 return -EPERM;
421 }
e8deb28c 422 sid = twl_map[mod_no].sid;
fc7b92fc 423 twl = &twl_modules[sid];
a603a7fa
DB
424
425 if (unlikely(!inuse)) {
426 pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid);
427 return -EPERM;
428 }
429 mutex_lock(&twl->xfer_lock);
430 /* [MSG1] fill the register address data */
431 msg = &twl->xfer_msg[0];
432 msg->addr = twl->address;
433 msg->len = 1;
434 msg->flags = 0; /* Read the register value */
e8deb28c 435 val = twl_map[mod_no].base + reg;
a603a7fa
DB
436 msg->buf = &val;
437 /* [MSG2] fill the data rx buffer */
438 msg = &twl->xfer_msg[1];
439 msg->addr = twl->address;
440 msg->flags = I2C_M_RD; /* Read the register value */
441 msg->len = num_bytes; /* only n bytes */
442 msg->buf = value;
443 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 2);
444 mutex_unlock(&twl->xfer_lock);
445
147e0847
AK
446 /* i2c_transfer returns number of messages transferred */
447 if (ret != 2) {
448 pr_err("%s: i2c_read failed to transfer all messages\n",
449 DRIVER_NAME);
450 if (ret < 0)
451 return ret;
452 else
453 return -EIO;
454 } else {
455 return 0;
456 }
a603a7fa 457}
fc7b92fc 458EXPORT_SYMBOL(twl_i2c_read);
a603a7fa
DB
459
460/**
fc7b92fc 461 * twl_i2c_write_u8 - Writes a 8 bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
462 * @mod_no: module number
463 * @value: the value to be written 8 bit
464 * @reg: register address (just offset will do)
465 *
466 * Returns result of operation - 0 is success
467 */
fc7b92fc 468int twl_i2c_write_u8(u8 mod_no, u8 value, u8 reg)
a603a7fa
DB
469{
470
471 /* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */
472 u8 temp_buffer[2] = { 0 };
473 /* offset 1 contains the data */
474 temp_buffer[1] = value;
fc7b92fc 475 return twl_i2c_write(mod_no, temp_buffer, reg, 1);
a603a7fa 476}
fc7b92fc 477EXPORT_SYMBOL(twl_i2c_write_u8);
a603a7fa
DB
478
479/**
fc7b92fc 480 * twl_i2c_read_u8 - Reads a 8 bit register from TWL4030/TWL5030/TWL60X0
a603a7fa
DB
481 * @mod_no: module number
482 * @value: the value read 8 bit
483 * @reg: register address (just offset will do)
484 *
485 * Returns result of operation - 0 is success
486 */
fc7b92fc 487int twl_i2c_read_u8(u8 mod_no, u8 *value, u8 reg)
a603a7fa 488{
fc7b92fc 489 return twl_i2c_read(mod_no, value, reg, 1);
a603a7fa 490}
fc7b92fc 491EXPORT_SYMBOL(twl_i2c_read_u8);
a603a7fa
DB
492
493/*----------------------------------------------------------------------*/
494
ca972d13
L
495/**
496 * twl_read_idcode_register - API to read the IDCODE register.
497 *
498 * Unlocks the IDCODE register and read the 32 bit value.
499 */
500static int twl_read_idcode_register(void)
501{
502 int err;
503
504 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
505 REG_UNLOCK_TEST_REG);
506 if (err) {
507 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
508 goto fail;
509 }
510
511 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_idcode),
512 REG_IDCODE_7_0, 4);
513 if (err) {
514 pr_err("TWL4030: unable to read IDCODE -%d\n", err);
515 goto fail;
516 }
517
518 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
519 if (err)
520 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
521fail:
522 return err;
523}
524
525/**
526 * twl_get_type - API to get TWL Si type.
527 *
528 * Api to get the TWL Si type from IDCODE value.
529 */
530int twl_get_type(void)
531{
532 return TWL_SIL_TYPE(twl_idcode);
533}
534EXPORT_SYMBOL_GPL(twl_get_type);
535
536/**
537 * twl_get_version - API to get TWL Si version.
538 *
539 * Api to get the TWL Si version from IDCODE value.
540 */
541int twl_get_version(void)
542{
543 return TWL_SIL_REV(twl_idcode);
544}
545EXPORT_SYMBOL_GPL(twl_get_version);
546
dad759ff
DB
547static struct device *
548add_numbered_child(unsigned chip, const char *name, int num,
5725d66b
DB
549 void *pdata, unsigned pdata_len,
550 bool can_wakeup, int irq0, int irq1)
a603a7fa 551{
5725d66b 552 struct platform_device *pdev;
fc7b92fc 553 struct twl_client *twl = &twl_modules[chip];
5725d66b
DB
554 int status;
555
dad759ff 556 pdev = platform_device_alloc(name, num);
5725d66b
DB
557 if (!pdev) {
558 dev_dbg(&twl->client->dev, "can't alloc dev\n");
559 status = -ENOMEM;
560 goto err;
561 }
a603a7fa 562
5725d66b
DB
563 device_init_wakeup(&pdev->dev, can_wakeup);
564 pdev->dev.parent = &twl->client->dev;
a603a7fa 565
5725d66b
DB
566 if (pdata) {
567 status = platform_device_add_data(pdev, pdata, pdata_len);
568 if (status < 0) {
569 dev_dbg(&pdev->dev, "can't add platform_data\n");
a603a7fa
DB
570 goto err;
571 }
5725d66b 572 }
a603a7fa 573
5725d66b
DB
574 if (irq0) {
575 struct resource r[2] = {
576 { .start = irq0, .flags = IORESOURCE_IRQ, },
577 { .start = irq1, .flags = IORESOURCE_IRQ, },
578 };
a603a7fa 579
5725d66b 580 status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
a603a7fa 581 if (status < 0) {
5725d66b 582 dev_dbg(&pdev->dev, "can't add irqs\n");
a603a7fa
DB
583 goto err;
584 }
585 }
586
5725d66b 587 status = platform_device_add(pdev);
a603a7fa 588
5725d66b
DB
589err:
590 if (status < 0) {
591 platform_device_put(pdev);
592 dev_err(&twl->client->dev, "can't add %s dev\n", name);
593 return ERR_PTR(status);
594 }
595 return &pdev->dev;
596}
a603a7fa 597
dad759ff
DB
598static inline struct device *add_child(unsigned chip, const char *name,
599 void *pdata, unsigned pdata_len,
600 bool can_wakeup, int irq0, int irq1)
601{
602 return add_numbered_child(chip, name, -1, pdata, pdata_len,
603 can_wakeup, irq0, irq1);
604}
605
606static struct device *
607add_regulator_linked(int num, struct regulator_init_data *pdata,
608 struct regulator_consumer_supply *consumers,
521d8ec3 609 unsigned num_consumers, unsigned long features)
dad759ff 610{
e8deb28c 611 unsigned sub_chip_id;
dad759ff
DB
612 /* regulator framework demands init_data ... */
613 if (!pdata)
614 return NULL;
615
b73eac78 616 if (consumers) {
dad759ff
DB
617 pdata->consumer_supplies = consumers;
618 pdata->num_consumer_supplies = num_consumers;
619 }
620
521d8ec3
GG
621 pdata->driver_data = (void *)features;
622
dad759ff 623 /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
e8deb28c
B
624 sub_chip_id = twl_map[TWL_MODULE_PM_MASTER].sid;
625 return add_numbered_child(sub_chip_id, "twl_reg", num,
dad759ff
DB
626 pdata, sizeof(*pdata), false, 0, 0);
627}
628
629static struct device *
521d8ec3
GG
630add_regulator(int num, struct regulator_init_data *pdata,
631 unsigned long features)
dad759ff 632{
521d8ec3 633 return add_regulator_linked(num, pdata, NULL, 0, features);
dad759ff
DB
634}
635
5725d66b
DB
636/*
637 * NOTE: We know the first 8 IRQs after pdata->base_irq are
638 * for the PIH, and the next are for the PWR_INT SIH, since
639 * that's how twl_init_irq() sets things up.
640 */
a603a7fa 641
dad759ff
DB
642static int
643add_children(struct twl4030_platform_data *pdata, unsigned long features)
5725d66b
DB
644{
645 struct device *child;
e8deb28c 646 unsigned sub_chip_id;
a603a7fa 647
5725d66b 648 if (twl_has_gpio() && pdata->gpio) {
fc7b92fc 649 child = add_child(SUB_CHIP_ID1, "twl4030_gpio",
5725d66b 650 pdata->gpio, sizeof(*pdata->gpio),
fc7b92fc 651 false, pdata->irq_base + GPIO_INTR_OFFSET, 0);
5725d66b
DB
652 if (IS_ERR(child))
653 return PTR_ERR(child);
a603a7fa
DB
654 }
655
656 if (twl_has_keypad() && pdata->keypad) {
fc7b92fc 657 child = add_child(SUB_CHIP_ID2, "twl4030_keypad",
5725d66b 658 pdata->keypad, sizeof(*pdata->keypad),
fc7b92fc 659 true, pdata->irq_base + KEYPAD_INTR_OFFSET, 0);
5725d66b
DB
660 if (IS_ERR(child))
661 return PTR_ERR(child);
a603a7fa
DB
662 }
663
664 if (twl_has_madc() && pdata->madc) {
5725d66b
DB
665 child = add_child(2, "twl4030_madc",
666 pdata->madc, sizeof(*pdata->madc),
fc7b92fc 667 true, pdata->irq_base + MADC_INTR_OFFSET, 0);
5725d66b
DB
668 if (IS_ERR(child))
669 return PTR_ERR(child);
a603a7fa
DB
670 }
671
672 if (twl_has_rtc()) {
a603a7fa 673 /*
5725d66b 674 * REVISIT platform_data here currently might expose the
a603a7fa 675 * "msecure" line ... but for now we just expect board
5725d66b 676 * setup to tell the chip "it's always ok to SET_TIME".
a603a7fa
DB
677 * Eventually, Linux might become more aware of such
678 * HW security concerns, and "least privilege".
679 */
e8deb28c
B
680 sub_chip_id = twl_map[TWL_MODULE_RTC].sid;
681 child = add_child(sub_chip_id, "twl_rtc",
5725d66b 682 NULL, 0,
fc7b92fc 683 true, pdata->irq_base + RTC_INTR_OFFSET, 0);
5725d66b
DB
684 if (IS_ERR(child))
685 return PTR_ERR(child);
a603a7fa
DB
686 }
687
9da66539 688 if (twl_has_usb() && pdata->usb && twl_class_is_4030()) {
f8ebdff0
RQ
689
690 static struct regulator_consumer_supply usb1v5 = {
691 .supply = "usb1v5",
692 };
693 static struct regulator_consumer_supply usb1v8 = {
694 .supply = "usb1v8",
695 };
696 static struct regulator_consumer_supply usb3v1 = {
697 .supply = "usb3v1",
698 };
699
700 /* First add the regulators so that they can be used by transceiver */
701 if (twl_has_regulator()) {
702 /* this is a template that gets copied */
703 struct regulator_init_data usb_fixed = {
704 .constraints.valid_modes_mask =
705 REGULATOR_MODE_NORMAL
706 | REGULATOR_MODE_STANDBY,
707 .constraints.valid_ops_mask =
708 REGULATOR_CHANGE_MODE
709 | REGULATOR_CHANGE_STATUS,
710 };
711
712 child = add_regulator_linked(TWL4030_REG_VUSB1V5,
521d8ec3
GG
713 &usb_fixed, &usb1v5, 1,
714 features);
f8ebdff0
RQ
715 if (IS_ERR(child))
716 return PTR_ERR(child);
717
718 child = add_regulator_linked(TWL4030_REG_VUSB1V8,
521d8ec3
GG
719 &usb_fixed, &usb1v8, 1,
720 features);
f8ebdff0
RQ
721 if (IS_ERR(child))
722 return PTR_ERR(child);
723
724 child = add_regulator_linked(TWL4030_REG_VUSB3V1,
521d8ec3
GG
725 &usb_fixed, &usb3v1, 1,
726 features);
f8ebdff0
RQ
727 if (IS_ERR(child))
728 return PTR_ERR(child);
729
730 }
731
5725d66b
DB
732 child = add_child(0, "twl4030_usb",
733 pdata->usb, sizeof(*pdata->usb),
734 true,
735 /* irq0 = USB_PRES, irq1 = USB */
fc7b92fc
B
736 pdata->irq_base + USB_PRES_INTR_OFFSET,
737 pdata->irq_base + USB_INTR_OFFSET);
f8ebdff0 738
5725d66b
DB
739 if (IS_ERR(child))
740 return PTR_ERR(child);
dad759ff
DB
741
742 /* we need to connect regulators to this transceiver */
f8ebdff0
RQ
743 if (twl_has_regulator() && child) {
744 usb1v5.dev = child;
745 usb1v8.dev = child;
746 usb3v1.dev = child;
747 }
dad759ff 748 }
e70357e3
HH
749 if (twl_has_usb() && pdata->usb && twl_class_is_6030()) {
750
521d8ec3
GG
751 static struct regulator_consumer_supply usb3v3;
752 int regulator;
e70357e3
HH
753
754 if (twl_has_regulator()) {
755 /* this is a template that gets copied */
756 struct regulator_init_data usb_fixed = {
757 .constraints.valid_modes_mask =
758 REGULATOR_MODE_NORMAL
759 | REGULATOR_MODE_STANDBY,
760 .constraints.valid_ops_mask =
761 REGULATOR_CHANGE_MODE
762 | REGULATOR_CHANGE_STATUS,
763 };
764
521d8ec3
GG
765 if (features & TWL6025_SUBCLASS) {
766 usb3v3.supply = "ldousb";
767 regulator = TWL6025_REG_LDOUSB;
768 } else {
769 usb3v3.supply = "vusb";
770 regulator = TWL6030_REG_VUSB;
771 }
772 child = add_regulator_linked(regulator, &usb_fixed,
773 &usb3v3, 1,
774 features);
e70357e3
HH
775 if (IS_ERR(child))
776 return PTR_ERR(child);
777 }
778
521d8ec3
GG
779 pdata->usb->features = features;
780
e70357e3
HH
781 child = add_child(0, "twl6030_usb",
782 pdata->usb, sizeof(*pdata->usb),
783 true,
784 /* irq1 = VBUS_PRES, irq0 = USB ID */
785 pdata->irq_base + USBOTG_INTR_OFFSET,
786 pdata->irq_base + USB_PRES_INTR_OFFSET);
787
788 if (IS_ERR(child))
789 return PTR_ERR(child);
790 /* we need to connect regulators to this transceiver */
791 if (twl_has_regulator() && child)
792 usb3v3.dev = child;
521d8ec3
GG
793 } else if (twl_has_regulator() && twl_class_is_6030()) {
794 if (features & TWL6025_SUBCLASS)
795 child = add_regulator(TWL6025_REG_LDOUSB,
796 pdata->ldousb, features);
797 else
798 child = add_regulator(TWL6030_REG_VUSB,
799 pdata->vusb, features);
e70357e3 800
521d8ec3
GG
801 if (IS_ERR(child))
802 return PTR_ERR(child);
e70357e3 803 }
dad759ff 804
153617fd 805 if (twl_has_watchdog() && twl_class_is_4030()) {
80e45b1e
TK
806 child = add_child(0, "twl4030_wdt", NULL, 0, false, 0, 0);
807 if (IS_ERR(child))
9c3664dd
FB
808 return PTR_ERR(child);
809 }
810
153617fd 811 if (twl_has_pwrbutton() && twl_class_is_4030()) {
9c3664dd
FB
812 child = add_child(1, "twl4030_pwrbutton",
813 NULL, 0, true, pdata->irq_base + 8 + 0, 0);
814 if (IS_ERR(child))
80e45b1e
TK
815 return PTR_ERR(child);
816 }
817
4ae6df5e 818 if (twl_has_codec() && pdata->audio && twl_class_is_4030()) {
d62abe56 819 sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid;
f0fba2ad 820 child = add_child(sub_chip_id, "twl4030-audio",
4ae6df5e 821 pdata->audio, sizeof(*pdata->audio),
d62abe56
MLC
822 false, 0, 0);
823 if (IS_ERR(child))
824 return PTR_ERR(child);
825 }
826
4ae6df5e 827 if (twl_has_codec() && pdata->audio && twl_class_is_6030()) {
d62abe56 828 sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid;
f19b2823 829 child = add_child(sub_chip_id, "twl6040",
4ae6df5e 830 pdata->audio, sizeof(*pdata->audio),
0b83ddeb
PU
831 false, 0, 0);
832 if (IS_ERR(child))
833 return PTR_ERR(child);
834 }
835
9da66539
RN
836 /* twl4030 regulators */
837 if (twl_has_regulator() && twl_class_is_4030()) {
521d8ec3
GG
838 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1,
839 features);
dad759ff
DB
840 if (IS_ERR(child))
841 return PTR_ERR(child);
ab4abe05 842
521d8ec3
GG
843 child = add_regulator(TWL4030_REG_VIO, pdata->vio,
844 features);
ab4abe05
JKS
845 if (IS_ERR(child))
846 return PTR_ERR(child);
847
521d8ec3
GG
848 child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1,
849 features);
ab4abe05
JKS
850 if (IS_ERR(child))
851 return PTR_ERR(child);
852
521d8ec3
GG
853 child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2,
854 features);
ab4abe05
JKS
855 if (IS_ERR(child))
856 return PTR_ERR(child);
dad759ff 857
521d8ec3
GG
858 child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1,
859 features);
dad759ff
DB
860 if (IS_ERR(child))
861 return PTR_ERR(child);
862
521d8ec3
GG
863 child = add_regulator(TWL4030_REG_VDAC, pdata->vdac,
864 features);
dad759ff
DB
865 if (IS_ERR(child))
866 return PTR_ERR(child);
867
868 child = add_regulator((features & TWL4030_VAUX2)
869 ? TWL4030_REG_VAUX2_4030
870 : TWL4030_REG_VAUX2,
521d8ec3 871 pdata->vaux2, features);
dad759ff
DB
872 if (IS_ERR(child))
873 return PTR_ERR(child);
ab4abe05 874
521d8ec3
GG
875 child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1,
876 features);
ab4abe05
JKS
877 if (IS_ERR(child))
878 return PTR_ERR(child);
879
521d8ec3
GG
880 child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2,
881 features);
ab4abe05
JKS
882 if (IS_ERR(child))
883 return PTR_ERR(child);
884
521d8ec3
GG
885 child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig,
886 features);
ab4abe05
JKS
887 if (IS_ERR(child))
888 return PTR_ERR(child);
dad759ff
DB
889 }
890
dad759ff 891 /* maybe add LDOs that are omitted on cost-reduced parts */
9da66539
RN
892 if (twl_has_regulator() && !(features & TPS_SUBSET)
893 && twl_class_is_4030()) {
521d8ec3
GG
894 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2,
895 features);
dad759ff
DB
896 if (IS_ERR(child))
897 return PTR_ERR(child);
dad759ff 898
521d8ec3
GG
899 child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2,
900 features);
dad759ff
DB
901 if (IS_ERR(child))
902 return PTR_ERR(child);
903
521d8ec3
GG
904 child = add_regulator(TWL4030_REG_VSIM, pdata->vsim,
905 features);
dad759ff
DB
906 if (IS_ERR(child))
907 return PTR_ERR(child);
908
521d8ec3
GG
909 child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1,
910 features);
dad759ff
DB
911 if (IS_ERR(child))
912 return PTR_ERR(child);
913
521d8ec3
GG
914 child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3,
915 features);
dad759ff
DB
916 if (IS_ERR(child))
917 return PTR_ERR(child);
918
521d8ec3
GG
919 child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4,
920 features);
dad759ff
DB
921 if (IS_ERR(child))
922 return PTR_ERR(child);
a603a7fa
DB
923 }
924
9da66539 925 /* twl6030 regulators */
521d8ec3
GG
926 if (twl_has_regulator() && twl_class_is_6030() &&
927 !(features & TWL6025_SUBCLASS)) {
928 child = add_regulator(TWL6030_REG_VMMC, pdata->vmmc,
929 features);
930 if (IS_ERR(child))
931 return PTR_ERR(child);
932
933 child = add_regulator(TWL6030_REG_VPP, pdata->vpp,
934 features);
935 if (IS_ERR(child))
936 return PTR_ERR(child);
937
938 child = add_regulator(TWL6030_REG_VUSIM, pdata->vusim,
939 features);
940 if (IS_ERR(child))
941 return PTR_ERR(child);
942
943 child = add_regulator(TWL6030_REG_VCXIO, pdata->vcxio,
944 features);
945 if (IS_ERR(child))
946 return PTR_ERR(child);
947
948 child = add_regulator(TWL6030_REG_VDAC, pdata->vdac,
949 features);
950 if (IS_ERR(child))
951 return PTR_ERR(child);
952
953 child = add_regulator(TWL6030_REG_VAUX1_6030, pdata->vaux1,
954 features);
955 if (IS_ERR(child))
956 return PTR_ERR(child);
957
958 child = add_regulator(TWL6030_REG_VAUX2_6030, pdata->vaux2,
959 features);
960 if (IS_ERR(child))
961 return PTR_ERR(child);
962
963 child = add_regulator(TWL6030_REG_VAUX3_6030, pdata->vaux3,
964 features);
965 if (IS_ERR(child))
966 return PTR_ERR(child);
967
968 child = add_regulator(TWL6030_REG_CLK32KG, pdata->clk32kg,
969 features);
970 if (IS_ERR(child))
971 return PTR_ERR(child);
972 }
973
974 /* 6030 and 6025 share this regulator */
9da66539 975 if (twl_has_regulator() && twl_class_is_6030()) {
521d8ec3
GG
976 child = add_regulator(TWL6030_REG_VANA, pdata->vana,
977 features);
978 if (IS_ERR(child))
979 return PTR_ERR(child);
980 }
981
982 /* twl6025 regulators */
983 if (twl_has_regulator() && twl_class_is_6030() &&
984 (features & TWL6025_SUBCLASS)) {
985 child = add_regulator(TWL6025_REG_LDO5, pdata->ldo5,
986 features);
9da66539
RN
987 if (IS_ERR(child))
988 return PTR_ERR(child);
989
521d8ec3
GG
990 child = add_regulator(TWL6025_REG_LDO1, pdata->ldo1,
991 features);
9da66539
RN
992 if (IS_ERR(child))
993 return PTR_ERR(child);
994
521d8ec3
GG
995 child = add_regulator(TWL6025_REG_LDO7, pdata->ldo7,
996 features);
9da66539
RN
997 if (IS_ERR(child))
998 return PTR_ERR(child);
999
521d8ec3
GG
1000 child = add_regulator(TWL6025_REG_LDO6, pdata->ldo6,
1001 features);
9da66539
RN
1002 if (IS_ERR(child))
1003 return PTR_ERR(child);
1004
521d8ec3
GG
1005 child = add_regulator(TWL6025_REG_LDOLN, pdata->ldoln,
1006 features);
9da66539
RN
1007 if (IS_ERR(child))
1008 return PTR_ERR(child);
1009
521d8ec3
GG
1010 child = add_regulator(TWL6025_REG_LDO2, pdata->ldo2,
1011 features);
9da66539
RN
1012 if (IS_ERR(child))
1013 return PTR_ERR(child);
1014
521d8ec3
GG
1015 child = add_regulator(TWL6025_REG_LDO4, pdata->ldo4,
1016 features);
9da66539
RN
1017 if (IS_ERR(child))
1018 return PTR_ERR(child);
1019
521d8ec3
GG
1020 child = add_regulator(TWL6025_REG_LDO3, pdata->ldo3,
1021 features);
9da66539
RN
1022 if (IS_ERR(child))
1023 return PTR_ERR(child);
1024
521d8ec3
GG
1025 child = add_regulator(TWL6025_REG_SMPS3, pdata->smps3,
1026 features);
9da66539
RN
1027 if (IS_ERR(child))
1028 return PTR_ERR(child);
8e6de4a3 1029
521d8ec3
GG
1030 child = add_regulator(TWL6025_REG_SMPS4, pdata->smps4,
1031 features);
8e6de4a3
B
1032 if (IS_ERR(child))
1033 return PTR_ERR(child);
521d8ec3
GG
1034
1035 child = add_regulator(TWL6025_REG_VIO, pdata->vio6025,
1036 features);
1037 if (IS_ERR(child))
1038 return PTR_ERR(child);
1039
9da66539
RN
1040 }
1041
11c39c4b
GI
1042 if (twl_has_bci() && pdata->bci &&
1043 !(features & (TPS_SUBSET | TWL5031))) {
1044 child = add_child(3, "twl4030_bci",
1045 pdata->bci, sizeof(*pdata->bci), false,
1046 /* irq0 = CHG_PRES, irq1 = BCI */
1047 pdata->irq_base + BCI_PRES_INTR_OFFSET,
1048 pdata->irq_base + BCI_INTR_OFFSET);
1049 if (IS_ERR(child))
1050 return PTR_ERR(child);
1051 }
1052
5725d66b 1053 return 0;
a603a7fa
DB
1054}
1055
1056/*----------------------------------------------------------------------*/
1057
1058/*
1059 * These three functions initialize the on-chip clock framework,
1060 * letting it generate the right frequencies for USB, MADC, and
1061 * other purposes.
1062 */
1063static inline int __init protect_pm_master(void)
1064{
1065 int e = 0;
1066
49e6f87e
FB
1067 e = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
1068 TWL4030_PM_MASTER_PROTECT_KEY);
a603a7fa
DB
1069 return e;
1070}
1071
1072static inline int __init unprotect_pm_master(void)
1073{
1074 int e = 0;
1075
49e6f87e
FB
1076 e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
1077 TWL4030_PM_MASTER_KEY_CFG1,
1078 TWL4030_PM_MASTER_PROTECT_KEY);
1079 e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
1080 TWL4030_PM_MASTER_KEY_CFG2,
1081 TWL4030_PM_MASTER_PROTECT_KEY);
1082
a603a7fa
DB
1083 return e;
1084}
1085
38a68496
IK
1086static void clocks_init(struct device *dev,
1087 struct twl4030_clock_init_data *clock)
a603a7fa
DB
1088{
1089 int e = 0;
1090 struct clk *osc;
1091 u32 rate;
1092 u8 ctrl = HFCLK_FREQ_26_MHZ;
1093
1094#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
1095 if (cpu_is_omap2430())
e6b50c8d 1096 osc = clk_get(dev, "osc_ck");
a603a7fa 1097 else
e6b50c8d 1098 osc = clk_get(dev, "osc_sys_ck");
6354ab5c 1099
a603a7fa 1100 if (IS_ERR(osc)) {
fc7b92fc 1101 printk(KERN_WARNING "Skipping twl internal clock init and "
a603a7fa
DB
1102 "using bootloader value (unknown osc rate)\n");
1103 return;
1104 }
1105
1106 rate = clk_get_rate(osc);
1107 clk_put(osc);
1108
6354ab5c
SO
1109#else
1110 /* REVISIT for non-OMAP systems, pass the clock rate from
1111 * board init code, using platform_data.
1112 */
1113 osc = ERR_PTR(-EIO);
1114
fc7b92fc 1115 printk(KERN_WARNING "Skipping twl internal clock init and "
6354ab5c
SO
1116 "using bootloader value (unknown osc rate)\n");
1117
1118 return;
1119#endif
1120
a603a7fa
DB
1121 switch (rate) {
1122 case 19200000:
1123 ctrl = HFCLK_FREQ_19p2_MHZ;
1124 break;
1125 case 26000000:
1126 ctrl = HFCLK_FREQ_26_MHZ;
1127 break;
1128 case 38400000:
1129 ctrl = HFCLK_FREQ_38p4_MHZ;
1130 break;
1131 }
1132
1133 ctrl |= HIGH_PERF_SQ;
38a68496
IK
1134 if (clock && clock->ck32k_lowpwr_enable)
1135 ctrl |= CK32K_LOWPWR_EN;
1136
a603a7fa
DB
1137 e |= unprotect_pm_master();
1138 /* effect->MADC+USB ck en */
fc7b92fc 1139 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
a603a7fa
DB
1140 e |= protect_pm_master();
1141
1142 if (e < 0)
1143 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
1144}
1145
1146/*----------------------------------------------------------------------*/
1147
e8deb28c
B
1148int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end);
1149int twl4030_exit_irq(void);
1150int twl4030_init_chip_irq(const char *chip);
1151int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end);
1152int twl6030_exit_irq(void);
a603a7fa 1153
fc7b92fc 1154static int twl_remove(struct i2c_client *client)
a603a7fa
DB
1155{
1156 unsigned i;
a30d46c0 1157 int status;
a603a7fa 1158
e8deb28c
B
1159 if (twl_class_is_4030())
1160 status = twl4030_exit_irq();
1161 else
1162 status = twl6030_exit_irq();
1163
a30d46c0
DB
1164 if (status < 0)
1165 return status;
a603a7fa 1166
fc7b92fc
B
1167 for (i = 0; i < TWL_NUM_SLAVES; i++) {
1168 struct twl_client *twl = &twl_modules[i];
a603a7fa
DB
1169
1170 if (twl->client && twl->client != client)
1171 i2c_unregister_device(twl->client);
fc7b92fc 1172 twl_modules[i].client = NULL;
a603a7fa
DB
1173 }
1174 inuse = false;
1175 return 0;
1176}
1177
1178/* NOTE: this driver only handles a single twl4030/tps659x0 chip */
5b9cecd6 1179static int __devinit
fc7b92fc 1180twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
a603a7fa
DB
1181{
1182 int status;
1183 unsigned i;
1184 struct twl4030_platform_data *pdata = client->dev.platform_data;
a29aaf55 1185 u8 temp;
ca972d13 1186 int ret = 0;
a603a7fa
DB
1187
1188 if (!pdata) {
1189 dev_dbg(&client->dev, "no platform data?\n");
1190 return -EINVAL;
1191 }
1192
1193 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
1194 dev_dbg(&client->dev, "can't talk I2C?\n");
1195 return -EIO;
1196 }
1197
a30d46c0 1198 if (inuse) {
a603a7fa
DB
1199 dev_dbg(&client->dev, "driver is already in use\n");
1200 return -EBUSY;
1201 }
1202
fc7b92fc
B
1203 for (i = 0; i < TWL_NUM_SLAVES; i++) {
1204 struct twl_client *twl = &twl_modules[i];
a603a7fa
DB
1205
1206 twl->address = client->addr + i;
1207 if (i == 0)
1208 twl->client = client;
1209 else {
1210 twl->client = i2c_new_dummy(client->adapter,
1211 twl->address);
1212 if (!twl->client) {
a8643430 1213 dev_err(&client->dev,
a603a7fa
DB
1214 "can't attach client %d\n", i);
1215 status = -ENOMEM;
1216 goto fail;
1217 }
a603a7fa
DB
1218 }
1219 mutex_init(&twl->xfer_lock);
1220 }
1221 inuse = true;
e8deb28c
B
1222 if ((id->driver_data) & TWL6030_CLASS) {
1223 twl_id = TWL6030_CLASS_ID;
1224 twl_map = &twl6030_map[0];
1225 } else {
1226 twl_id = TWL4030_CLASS_ID;
1227 twl_map = &twl4030_map[0];
1228 }
a603a7fa
DB
1229
1230 /* setup clock framework */
38a68496 1231 clocks_init(&client->dev, pdata->clock);
a603a7fa 1232
ca972d13
L
1233 /* read TWL IDCODE Register */
1234 if (twl_id == TWL4030_CLASS_ID) {
1235 ret = twl_read_idcode_register();
1236 WARN(ret < 0, "Error: reading twl_idcode register value\n");
1237 }
1238
ebf0bd36
AK
1239 /* load power event scripts */
1240 if (twl_has_power() && pdata->power)
1241 twl4030_power_init(pdata->power);
1242
a603a7fa
DB
1243 /* Maybe init the T2 Interrupt subsystem */
1244 if (client->irq
1245 && pdata->irq_base
1246 && pdata->irq_end > pdata->irq_base) {
e8deb28c
B
1247 if (twl_class_is_4030()) {
1248 twl4030_init_chip_irq(id->name);
1249 status = twl4030_init_irq(client->irq, pdata->irq_base,
1250 pdata->irq_end);
1251 } else {
1252 status = twl6030_init_irq(client->irq, pdata->irq_base,
1253 pdata->irq_end);
1254 }
1255
a30d46c0
DB
1256 if (status < 0)
1257 goto fail;
a603a7fa
DB
1258 }
1259
a29aaf55
MS
1260 /* Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
1261 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
1262 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
1263 */
1264
1265 if (twl_class_is_4030()) {
1266 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
1267 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
1268 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
1269 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
1270 }
1271
dad759ff 1272 status = add_children(pdata, id->driver_data);
a603a7fa
DB
1273fail:
1274 if (status < 0)
fc7b92fc 1275 twl_remove(client);
a603a7fa
DB
1276 return status;
1277}
1278
fc7b92fc 1279static const struct i2c_device_id twl_ids[] = {
dad759ff
DB
1280 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
1281 { "twl5030", 0 }, /* T2 updated */
1920a61e 1282 { "twl5031", TWL5031 }, /* TWL5030 updated */
dad759ff
DB
1283 { "tps65950", 0 }, /* catalog version of twl5030 */
1284 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
1285 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
59dead5a
OD
1286 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
1287 and vibrator. Charger in USB module*/
e8deb28c 1288 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
521d8ec3 1289 { "twl6025", TWL6030_CLASS | TWL6025_SUBCLASS }, /* "Phoenix lite" */
a603a7fa
DB
1290 { /* end of list */ },
1291};
fc7b92fc 1292MODULE_DEVICE_TABLE(i2c, twl_ids);
a603a7fa
DB
1293
1294/* One Client Driver , 4 Clients */
fc7b92fc 1295static struct i2c_driver twl_driver = {
a603a7fa 1296 .driver.name = DRIVER_NAME,
fc7b92fc
B
1297 .id_table = twl_ids,
1298 .probe = twl_probe,
1299 .remove = twl_remove,
a603a7fa
DB
1300};
1301
fc7b92fc 1302static int __init twl_init(void)
a603a7fa 1303{
fc7b92fc 1304 return i2c_add_driver(&twl_driver);
a603a7fa 1305}
fc7b92fc 1306subsys_initcall(twl_init);
a603a7fa 1307
fc7b92fc 1308static void __exit twl_exit(void)
a603a7fa 1309{
fc7b92fc 1310 i2c_del_driver(&twl_driver);
a603a7fa 1311}
fc7b92fc 1312module_exit(twl_exit);
a603a7fa
DB
1313
1314MODULE_AUTHOR("Texas Instruments, Inc.");
fc7b92fc 1315MODULE_DESCRIPTION("I2C Core interface for TWL");
a603a7fa 1316MODULE_LICENSE("GPL");
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