mfd: tps65218: Fix reported randconfig error
[deliverable/linux.git] / drivers / mfd / twl-core.c
CommitLineData
a603a7fa 1/*
fc7b92fc
B
2 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
3 * and audio CODEC devices
a603a7fa
DB
4 *
5 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 *
7 * Modifications to defer interrupt handling to a kernel thread:
8 * Copyright (C) 2006 MontaVista Software, Inc.
9 *
10 * Based on tlv320aic23.c:
11 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 *
13 * Code cleanup and modifications to IRQ handler.
14 * by syed khasim <x0khasim@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 */
30
a603a7fa
DB
31#include <linux/init.h>
32#include <linux/mutex.h>
4e36dd33 33#include <linux/module.h>
a603a7fa 34#include <linux/platform_device.h>
2473d25a 35#include <linux/regmap.h>
a603a7fa 36#include <linux/clk.h>
a30d46c0 37#include <linux/err.h>
aeb5032b
BC
38#include <linux/device.h>
39#include <linux/of.h>
40#include <linux/of_irq.h>
41#include <linux/of_platform.h>
e7cc3aca 42#include <linux/irq.h>
aeb5032b 43#include <linux/irqdomain.h>
a603a7fa 44
dad759ff
DB
45#include <linux/regulator/machine.h>
46
a603a7fa 47#include <linux/i2c.h>
b07682b6 48#include <linux/i2c/twl.h>
a603a7fa 49
91460700
PU
50/* Register descriptions for audio */
51#include <linux/mfd/twl4030-audio.h>
52
1b8f333f 53#include "twl-core.h"
a603a7fa
DB
54
55/*
56 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
57 * Management and System Companion Device" chips originally designed for
58 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
59 * often at around 3 Mbit/sec, including for interrupt handling.
60 *
61 * This driver core provides genirq support for the interrupts emitted,
62 * by the various modules, and exports register access primitives.
63 *
64 * FIXME this driver currently requires use of the first interrupt line
65 * (and associated registers).
66 */
67
fc7b92fc 68#define DRIVER_NAME "twl"
a603a7fa 69
a603a7fa
DB
70/* Triton Core internal information (BEGIN) */
71
a603a7fa
DB
72/* Base Address defns for twl4030_map[] */
73
74/* subchip/slave 0 - USB ID */
75#define TWL4030_BASEADD_USB 0x0000
76
77/* subchip/slave 1 - AUD ID */
78#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
79#define TWL4030_BASEADD_GPIO 0x0098
80#define TWL4030_BASEADD_INTBR 0x0085
81#define TWL4030_BASEADD_PIH 0x0080
82#define TWL4030_BASEADD_TEST 0x004C
83
84/* subchip/slave 2 - AUX ID */
85#define TWL4030_BASEADD_INTERRUPTS 0x00B9
86#define TWL4030_BASEADD_LED 0x00EE
87#define TWL4030_BASEADD_MADC 0x0000
88#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
89#define TWL4030_BASEADD_PRECHARGE 0x00AA
5d4e9bd7 90#define TWL4030_BASEADD_PWM 0x00F8
a603a7fa
DB
91#define TWL4030_BASEADD_KEYPAD 0x00D2
92
1920a61e
IK
93#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
94#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
95 one */
96
a603a7fa
DB
97/* subchip/slave 3 - POWER ID */
98#define TWL4030_BASEADD_BACKUP 0x0014
99#define TWL4030_BASEADD_INT 0x002E
100#define TWL4030_BASEADD_PM_MASTER 0x0036
101#define TWL4030_BASEADD_PM_RECEIVER 0x005B
102#define TWL4030_BASEADD_RTC 0x001C
103#define TWL4030_BASEADD_SECURED_REG 0x0000
104
105/* Triton Core internal information (END) */
106
107
e8deb28c
B
108/* subchip/slave 0 0x48 - POWER */
109#define TWL6030_BASEADD_RTC 0x0000
5d4e9bd7 110#define TWL6030_BASEADD_SECURED_REG 0x0017
e8deb28c
B
111#define TWL6030_BASEADD_PM_MASTER 0x001F
112#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
113#define TWL6030_BASEADD_PM_MISC 0x00E2
114#define TWL6030_BASEADD_PM_PUPD 0x00F0
115
116/* subchip/slave 1 0x49 - FEATURE */
117#define TWL6030_BASEADD_USB 0x0000
118#define TWL6030_BASEADD_GPADC_CTRL 0x002E
119#define TWL6030_BASEADD_AUX 0x0090
120#define TWL6030_BASEADD_PWM 0x00BA
121#define TWL6030_BASEADD_GASGAUGE 0x00C0
122#define TWL6030_BASEADD_PIH 0x00D0
123#define TWL6030_BASEADD_CHARGER 0x00E0
89ce43fb 124#define TWL6032_BASEADD_CHARGER 0x00DA
5d4e9bd7 125#define TWL6030_BASEADD_LED 0x00F4
e8deb28c
B
126
127/* subchip/slave 2 0x4A - DFT */
128#define TWL6030_BASEADD_DIEID 0x00C0
129
130/* subchip/slave 3 0x4B - AUDIO */
131#define TWL6030_BASEADD_AUDIO 0x0000
132#define TWL6030_BASEADD_RSV 0x0000
fa0d9762 133#define TWL6030_BASEADD_ZERO 0x0000
e8deb28c 134
a603a7fa
DB
135/* Few power values */
136#define R_CFG_BOOT 0x05
a603a7fa
DB
137
138/* some fields in R_CFG_BOOT */
139#define HFCLK_FREQ_19p2_MHZ (1 << 0)
140#define HFCLK_FREQ_26_MHZ (2 << 0)
141#define HFCLK_FREQ_38p4_MHZ (3 << 0)
142#define HIGH_PERF_SQ (1 << 3)
38a68496 143#define CK32K_LOWPWR_EN (1 << 7)
a603a7fa 144
a603a7fa
DB
145/*----------------------------------------------------------------------*/
146
e8deb28c 147/* Structure for each TWL4030/TWL6030 Slave */
fc7b92fc 148struct twl_client {
a603a7fa 149 struct i2c_client *client;
2473d25a 150 struct regmap *regmap;
a603a7fa
DB
151};
152
a603a7fa 153/* mapping the module id to slave id and base address */
fc7b92fc 154struct twl_mapping {
a603a7fa
DB
155 unsigned char sid; /* Slave ID */
156 unsigned char base; /* base address */
157};
80a97ccd
PU
158
159struct twl_private {
160 bool ready; /* The core driver is ready to be used */
161 u32 twl_idcode; /* TWL IDCODE Register value */
162 unsigned int twl_id;
163
164 struct twl_mapping *twl_map;
165 struct twl_client *twl_modules;
166};
167
168static struct twl_private *twl_priv;
a603a7fa 169
da059ecf 170static struct twl_mapping twl4030_map[] = {
a603a7fa
DB
171 /*
172 * NOTE: don't change this table without updating the
e8deb28c 173 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
a603a7fa
DB
174 * so they continue to match the order in this table.
175 */
176
5d4e9bd7 177 /* Common IPs */
a603a7fa 178 { 0, TWL4030_BASEADD_USB },
5d4e9bd7
PU
179 { 1, TWL4030_BASEADD_PIH },
180 { 2, TWL4030_BASEADD_MAIN_CHARGE },
181 { 3, TWL4030_BASEADD_PM_MASTER },
182 { 3, TWL4030_BASEADD_PM_RECEIVER },
183
184 { 3, TWL4030_BASEADD_RTC },
185 { 2, TWL4030_BASEADD_PWM },
186 { 2, TWL4030_BASEADD_LED },
187 { 3, TWL4030_BASEADD_SECURED_REG },
188
189 /* TWL4030 specific IPs */
a603a7fa
DB
190 { 1, TWL4030_BASEADD_AUDIO_VOICE },
191 { 1, TWL4030_BASEADD_GPIO },
192 { 1, TWL4030_BASEADD_INTBR },
6691ccd0 193 { 1, TWL4030_BASEADD_TEST },
a603a7fa 194 { 2, TWL4030_BASEADD_KEYPAD },
5d4e9bd7 195
a603a7fa
DB
196 { 2, TWL4030_BASEADD_MADC },
197 { 2, TWL4030_BASEADD_INTERRUPTS },
a603a7fa 198 { 2, TWL4030_BASEADD_PRECHARGE },
a603a7fa
DB
199 { 3, TWL4030_BASEADD_BACKUP },
200 { 3, TWL4030_BASEADD_INT },
6691ccd0 201
5d4e9bd7
PU
202 { 2, TWL5031_BASEADD_ACCESSORY },
203 { 2, TWL5031_BASEADD_INTERRUPTS },
a603a7fa
DB
204};
205
91460700
PU
206static struct reg_default twl4030_49_defaults[] = {
207 /* Audio Registers */
208 { 0x01, 0x00}, /* CODEC_MODE */
209 { 0x02, 0x00}, /* OPTION */
210 /* 0x03 Unused */
211 { 0x04, 0x00}, /* MICBIAS_CTL */
212 { 0x05, 0x00}, /* ANAMICL */
213 { 0x06, 0x00}, /* ANAMICR */
214 { 0x07, 0x00}, /* AVADC_CTL */
215 { 0x08, 0x00}, /* ADCMICSEL */
216 { 0x09, 0x00}, /* DIGMIXING */
217 { 0x0a, 0x0f}, /* ATXL1PGA */
218 { 0x0b, 0x0f}, /* ATXR1PGA */
219 { 0x0c, 0x0f}, /* AVTXL2PGA */
220 { 0x0d, 0x0f}, /* AVTXR2PGA */
221 { 0x0e, 0x00}, /* AUDIO_IF */
222 { 0x0f, 0x00}, /* VOICE_IF */
223 { 0x10, 0x3f}, /* ARXR1PGA */
224 { 0x11, 0x3f}, /* ARXL1PGA */
225 { 0x12, 0x3f}, /* ARXR2PGA */
226 { 0x13, 0x3f}, /* ARXL2PGA */
227 { 0x14, 0x25}, /* VRXPGA */
228 { 0x15, 0x00}, /* VSTPGA */
229 { 0x16, 0x00}, /* VRX2ARXPGA */
230 { 0x17, 0x00}, /* AVDAC_CTL */
231 { 0x18, 0x00}, /* ARX2VTXPGA */
232 { 0x19, 0x32}, /* ARXL1_APGA_CTL*/
233 { 0x1a, 0x32}, /* ARXR1_APGA_CTL*/
234 { 0x1b, 0x32}, /* ARXL2_APGA_CTL*/
235 { 0x1c, 0x32}, /* ARXR2_APGA_CTL*/
236 { 0x1d, 0x00}, /* ATX2ARXPGA */
237 { 0x1e, 0x00}, /* BT_IF */
238 { 0x1f, 0x55}, /* BTPGA */
239 { 0x20, 0x00}, /* BTSTPGA */
240 { 0x21, 0x00}, /* EAR_CTL */
241 { 0x22, 0x00}, /* HS_SEL */
242 { 0x23, 0x00}, /* HS_GAIN_SET */
243 { 0x24, 0x00}, /* HS_POPN_SET */
244 { 0x25, 0x00}, /* PREDL_CTL */
245 { 0x26, 0x00}, /* PREDR_CTL */
246 { 0x27, 0x00}, /* PRECKL_CTL */
247 { 0x28, 0x00}, /* PRECKR_CTL */
248 { 0x29, 0x00}, /* HFL_CTL */
249 { 0x2a, 0x00}, /* HFR_CTL */
250 { 0x2b, 0x05}, /* ALC_CTL */
251 { 0x2c, 0x00}, /* ALC_SET1 */
252 { 0x2d, 0x00}, /* ALC_SET2 */
253 { 0x2e, 0x00}, /* BOOST_CTL */
254 { 0x2f, 0x00}, /* SOFTVOL_CTL */
255 { 0x30, 0x13}, /* DTMF_FREQSEL */
256 { 0x31, 0x00}, /* DTMF_TONEXT1H */
257 { 0x32, 0x00}, /* DTMF_TONEXT1L */
258 { 0x33, 0x00}, /* DTMF_TONEXT2H */
259 { 0x34, 0x00}, /* DTMF_TONEXT2L */
260 { 0x35, 0x79}, /* DTMF_TONOFF */
261 { 0x36, 0x11}, /* DTMF_WANONOFF */
262 { 0x37, 0x00}, /* I2S_RX_SCRAMBLE_H */
263 { 0x38, 0x00}, /* I2S_RX_SCRAMBLE_M */
264 { 0x39, 0x00}, /* I2S_RX_SCRAMBLE_L */
265 { 0x3a, 0x06}, /* APLL_CTL */
266 { 0x3b, 0x00}, /* DTMF_CTL */
267 { 0x3c, 0x44}, /* DTMF_PGA_CTL2 (0x3C) */
268 { 0x3d, 0x69}, /* DTMF_PGA_CTL1 (0x3D) */
269 { 0x3e, 0x00}, /* MISC_SET_1 */
270 { 0x3f, 0x00}, /* PCMBTMUX */
271 /* 0x40 - 0x42 Unused */
272 { 0x43, 0x00}, /* RX_PATH_SEL */
273 { 0x44, 0x32}, /* VDL_APGA_CTL */
274 { 0x45, 0x00}, /* VIBRA_CTL */
275 { 0x46, 0x00}, /* VIBRA_SET */
276 { 0x47, 0x00}, /* VIBRA_PWM_SET */
277 { 0x48, 0x00}, /* ANAMIC_GAIN */
278 { 0x49, 0x00}, /* MISC_SET_2 */
279 /* End of Audio Registers */
280};
281
282static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg)
283{
284 switch (reg) {
285 case 0:
286 case 3:
287 case 40:
288 case 41:
289 case 42:
290 return false;
291 default:
292 return true;
293 }
294}
295
296static const struct regmap_range twl4030_49_volatile_ranges[] = {
297 regmap_reg_range(TWL4030_BASEADD_TEST, 0xff),
298};
299
300static const struct regmap_access_table twl4030_49_volatile_table = {
301 .yes_ranges = twl4030_49_volatile_ranges,
302 .n_yes_ranges = ARRAY_SIZE(twl4030_49_volatile_ranges),
303};
304
2473d25a
PU
305static struct regmap_config twl4030_regmap_config[4] = {
306 {
307 /* Address 0x48 */
308 .reg_bits = 8,
309 .val_bits = 8,
310 .max_register = 0xff,
311 },
312 {
313 /* Address 0x49 */
314 .reg_bits = 8,
315 .val_bits = 8,
316 .max_register = 0xff,
91460700
PU
317
318 .readable_reg = twl4030_49_nop_reg,
319 .writeable_reg = twl4030_49_nop_reg,
320
321 .volatile_table = &twl4030_49_volatile_table,
322
323 .reg_defaults = twl4030_49_defaults,
324 .num_reg_defaults = ARRAY_SIZE(twl4030_49_defaults),
325 .cache_type = REGCACHE_RBTREE,
2473d25a
PU
326 },
327 {
328 /* Address 0x4a */
329 .reg_bits = 8,
330 .val_bits = 8,
331 .max_register = 0xff,
332 },
333 {
334 /* Address 0x4b */
335 .reg_bits = 8,
336 .val_bits = 8,
337 .max_register = 0xff,
338 },
339};
340
e8deb28c
B
341static struct twl_mapping twl6030_map[] = {
342 /*
343 * NOTE: don't change this table without updating the
344 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
345 * so they continue to match the order in this table.
346 */
5d4e9bd7
PU
347
348 /* Common IPs */
349 { 1, TWL6030_BASEADD_USB },
350 { 1, TWL6030_BASEADD_PIH },
351 { 1, TWL6030_BASEADD_CHARGER },
352 { 0, TWL6030_BASEADD_PM_MASTER },
353 { 0, TWL6030_BASEADD_PM_SLAVE_MISC },
354
355 { 0, TWL6030_BASEADD_RTC },
356 { 1, TWL6030_BASEADD_PWM },
357 { 1, TWL6030_BASEADD_LED },
358 { 0, TWL6030_BASEADD_SECURED_REG },
359
360 /* TWL6030 specific IPs */
361 { 0, TWL6030_BASEADD_ZERO },
362 { 1, TWL6030_BASEADD_ZERO },
363 { 2, TWL6030_BASEADD_ZERO },
364 { 1, TWL6030_BASEADD_GPADC_CTRL },
365 { 1, TWL6030_BASEADD_GASGAUGE },
e8deb28c
B
366};
367
2473d25a
PU
368static struct regmap_config twl6030_regmap_config[3] = {
369 {
370 /* Address 0x48 */
371 .reg_bits = 8,
372 .val_bits = 8,
373 .max_register = 0xff,
374 },
375 {
376 /* Address 0x49 */
377 .reg_bits = 8,
378 .val_bits = 8,
379 .max_register = 0xff,
380 },
381 {
382 /* Address 0x4a */
383 .reg_bits = 8,
384 .val_bits = 8,
385 .max_register = 0xff,
386 },
387};
388
a603a7fa
DB
389/*----------------------------------------------------------------------*/
390
6dd810b5
PU
391static inline int twl_get_num_slaves(void)
392{
393 if (twl_class_is_4030())
394 return 4; /* TWL4030 class have four slave address */
395 else
396 return 3; /* TWL6030 class have three slave address */
397}
398
5d4e9bd7
PU
399static inline int twl_get_last_module(void)
400{
401 if (twl_class_is_4030())
402 return TWL4030_MODULE_LAST;
403 else
404 return TWL6030_MODULE_LAST;
405}
406
a603a7fa
DB
407/* Exported Functions */
408
80a97ccd
PU
409unsigned int twl_rev(void)
410{
411 return twl_priv ? twl_priv->twl_id : 0;
412}
413EXPORT_SYMBOL(twl_rev);
414
a603a7fa 415/**
8daf3540 416 * twl_get_regmap - Get the regmap associated with the given module
a603a7fa 417 * @mod_no: module number
a603a7fa 418 *
8daf3540 419 * Returns the regmap pointer or NULL in case of failure.
a603a7fa 420 */
8daf3540 421static struct regmap *twl_get_regmap(u8 mod_no)
a603a7fa 422{
a603a7fa 423 int sid;
fc7b92fc 424 struct twl_client *twl;
a603a7fa 425
1765dbcc
JH
426 if (unlikely(!twl_priv || !twl_priv->ready)) {
427 pr_err("%s: not initialized\n", DRIVER_NAME);
8daf3540 428 return NULL;
a603a7fa 429 }
1765dbcc
JH
430 if (unlikely(mod_no >= twl_get_last_module())) {
431 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
8daf3540 432 return NULL;
a603a7fa 433 }
050cde13 434
80a97ccd
PU
435 sid = twl_priv->twl_map[mod_no].sid;
436 twl = &twl_priv->twl_modules[sid];
8653be1a 437
8daf3540
PU
438 return twl->regmap;
439}
440
441/**
442 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
443 * @mod_no: module number
444 * @value: an array of num_bytes+1 containing data to write
445 * @reg: register address (just offset will do)
446 * @num_bytes: number of bytes to transfer
447 *
448 * Returns the result of operation - 0 is success
449 */
450int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
451{
452 struct regmap *regmap = twl_get_regmap(mod_no);
453 int ret;
454
455 if (!regmap)
456 return -EPERM;
457
458 ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg,
459 value, num_bytes);
2473d25a
PU
460
461 if (ret)
462 pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n",
463 DRIVER_NAME, mod_no, reg, num_bytes);
464
465 return ret;
a603a7fa 466}
fc7b92fc 467EXPORT_SYMBOL(twl_i2c_write);
a603a7fa
DB
468
469/**
fc7b92fc 470 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
471 * @mod_no: module number
472 * @value: an array of num_bytes containing data to be read
473 * @reg: register address (just offset will do)
474 * @num_bytes: number of bytes to transfer
475 *
476 * Returns result of operation - num_bytes is success else failure.
477 */
fc7b92fc 478int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
a603a7fa 479{
8daf3540 480 struct regmap *regmap = twl_get_regmap(mod_no);
a603a7fa 481 int ret;
a603a7fa 482
8daf3540 483 if (!regmap)
a603a7fa 484 return -EPERM;
8653be1a 485
8daf3540
PU
486 ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg,
487 value, num_bytes);
2473d25a
PU
488
489 if (ret)
490 pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n",
491 DRIVER_NAME, mod_no, reg, num_bytes);
492
493 return ret;
a603a7fa 494}
fc7b92fc 495EXPORT_SYMBOL(twl_i2c_read);
a603a7fa 496
3def927e
PU
497/**
498 * twl_regcache_bypass - Configure the regcache bypass for the regmap associated
499 * with the module
500 * @mod_no: module number
501 * @enable: Regcache bypass state
502 *
503 * Returns 0 else failure.
504 */
505int twl_set_regcache_bypass(u8 mod_no, bool enable)
506{
507 struct regmap *regmap = twl_get_regmap(mod_no);
508
509 if (!regmap)
510 return -EPERM;
511
512 regcache_cache_bypass(regmap, enable);
513
514 return 0;
515}
516EXPORT_SYMBOL(twl_set_regcache_bypass);
517
a603a7fa
DB
518/*----------------------------------------------------------------------*/
519
ca972d13
L
520/**
521 * twl_read_idcode_register - API to read the IDCODE register.
522 *
523 * Unlocks the IDCODE register and read the 32 bit value.
524 */
525static int twl_read_idcode_register(void)
526{
527 int err;
528
529 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
530 REG_UNLOCK_TEST_REG);
531 if (err) {
532 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
533 goto fail;
534 }
535
80a97ccd 536 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_priv->twl_idcode),
ca972d13
L
537 REG_IDCODE_7_0, 4);
538 if (err) {
539 pr_err("TWL4030: unable to read IDCODE -%d\n", err);
540 goto fail;
541 }
542
543 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
544 if (err)
545 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
546fail:
547 return err;
548}
549
550/**
551 * twl_get_type - API to get TWL Si type.
552 *
553 * Api to get the TWL Si type from IDCODE value.
554 */
555int twl_get_type(void)
556{
80a97ccd 557 return TWL_SIL_TYPE(twl_priv->twl_idcode);
ca972d13
L
558}
559EXPORT_SYMBOL_GPL(twl_get_type);
560
561/**
562 * twl_get_version - API to get TWL Si version.
563 *
564 * Api to get the TWL Si version from IDCODE value.
565 */
566int twl_get_version(void)
567{
80a97ccd 568 return TWL_SIL_REV(twl_priv->twl_idcode);
ca972d13
L
569}
570EXPORT_SYMBOL_GPL(twl_get_version);
571
2275c544
PU
572/**
573 * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
574 *
575 * Api to get the TWL HFCLK rate based on BOOT_CFG register.
576 */
577int twl_get_hfclk_rate(void)
578{
579 u8 ctrl;
580 int rate;
581
582 twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
583
584 switch (ctrl & 0x3) {
585 case HFCLK_FREQ_19p2_MHZ:
586 rate = 19200000;
587 break;
588 case HFCLK_FREQ_26_MHZ:
589 rate = 26000000;
590 break;
591 case HFCLK_FREQ_38p4_MHZ:
592 rate = 38400000;
593 break;
594 default:
595 pr_err("TWL4030: HFCLK is not configured\n");
596 rate = -EINVAL;
597 break;
598 }
599
600 return rate;
601}
602EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
603
dad759ff 604static struct device *
3c330279 605add_numbered_child(unsigned mod_no, const char *name, int num,
5725d66b
DB
606 void *pdata, unsigned pdata_len,
607 bool can_wakeup, int irq0, int irq1)
a603a7fa 608{
5725d66b 609 struct platform_device *pdev;
3c330279
PU
610 struct twl_client *twl;
611 int status, sid;
612
613 if (unlikely(mod_no >= twl_get_last_module())) {
614 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
615 return ERR_PTR(-EPERM);
616 }
80a97ccd
PU
617 sid = twl_priv->twl_map[mod_no].sid;
618 twl = &twl_priv->twl_modules[sid];
5725d66b 619
dad759ff 620 pdev = platform_device_alloc(name, num);
5725d66b
DB
621 if (!pdev) {
622 dev_dbg(&twl->client->dev, "can't alloc dev\n");
623 status = -ENOMEM;
624 goto err;
625 }
a603a7fa 626
5725d66b 627 pdev->dev.parent = &twl->client->dev;
a603a7fa 628
5725d66b
DB
629 if (pdata) {
630 status = platform_device_add_data(pdev, pdata, pdata_len);
631 if (status < 0) {
632 dev_dbg(&pdev->dev, "can't add platform_data\n");
a603a7fa
DB
633 goto err;
634 }
5725d66b 635 }
a603a7fa 636
5725d66b
DB
637 if (irq0) {
638 struct resource r[2] = {
639 { .start = irq0, .flags = IORESOURCE_IRQ, },
640 { .start = irq1, .flags = IORESOURCE_IRQ, },
641 };
a603a7fa 642
5725d66b 643 status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
a603a7fa 644 if (status < 0) {
5725d66b 645 dev_dbg(&pdev->dev, "can't add irqs\n");
a603a7fa
DB
646 goto err;
647 }
648 }
649
5725d66b 650 status = platform_device_add(pdev);
17ffba6a
N
651 if (status == 0)
652 device_init_wakeup(&pdev->dev, can_wakeup);
a603a7fa 653
5725d66b
DB
654err:
655 if (status < 0) {
656 platform_device_put(pdev);
657 dev_err(&twl->client->dev, "can't add %s dev\n", name);
658 return ERR_PTR(status);
659 }
660 return &pdev->dev;
661}
a603a7fa 662
3c330279 663static inline struct device *add_child(unsigned mod_no, const char *name,
dad759ff
DB
664 void *pdata, unsigned pdata_len,
665 bool can_wakeup, int irq0, int irq1)
666{
3c330279 667 return add_numbered_child(mod_no, name, -1, pdata, pdata_len,
dad759ff
DB
668 can_wakeup, irq0, irq1);
669}
670
671static struct device *
672add_regulator_linked(int num, struct regulator_init_data *pdata,
673 struct regulator_consumer_supply *consumers,
521d8ec3 674 unsigned num_consumers, unsigned long features)
dad759ff 675{
63bfff4e
TK
676 struct twl_regulator_driver_data drv_data;
677
dad759ff
DB
678 /* regulator framework demands init_data ... */
679 if (!pdata)
680 return NULL;
681
b73eac78 682 if (consumers) {
dad759ff
DB
683 pdata->consumer_supplies = consumers;
684 pdata->num_consumer_supplies = num_consumers;
685 }
686
63bfff4e
TK
687 if (pdata->driver_data) {
688 /* If we have existing drv_data, just add the flags */
689 struct twl_regulator_driver_data *tmp;
690 tmp = pdata->driver_data;
691 tmp->features |= features;
692 } else {
693 /* add new driver data struct, used only during init */
694 drv_data.features = features;
695 drv_data.set_voltage = NULL;
696 drv_data.get_voltage = NULL;
697 drv_data.data = NULL;
698 pdata->driver_data = &drv_data;
699 }
521d8ec3 700
dad759ff 701 /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
3c330279 702 return add_numbered_child(TWL_MODULE_PM_MASTER, "twl_reg", num,
dad759ff
DB
703 pdata, sizeof(*pdata), false, 0, 0);
704}
705
706static struct device *
521d8ec3
GG
707add_regulator(int num, struct regulator_init_data *pdata,
708 unsigned long features)
dad759ff 709{
521d8ec3 710 return add_regulator_linked(num, pdata, NULL, 0, features);
dad759ff
DB
711}
712
5725d66b
DB
713/*
714 * NOTE: We know the first 8 IRQs after pdata->base_irq are
715 * for the PIH, and the next are for the PWR_INT SIH, since
716 * that's how twl_init_irq() sets things up.
717 */
a603a7fa 718
dad759ff 719static int
9e178620
FB
720add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
721 unsigned long features)
5725d66b
DB
722{
723 struct device *child;
a603a7fa 724
f78959cf 725 if (IS_ENABLED(CONFIG_GPIO_TWL4030) && pdata->gpio) {
3c330279 726 child = add_child(TWL4030_MODULE_GPIO, "twl4030_gpio",
5725d66b 727 pdata->gpio, sizeof(*pdata->gpio),
9e178620 728 false, irq_base + GPIO_INTR_OFFSET, 0);
5725d66b
DB
729 if (IS_ERR(child))
730 return PTR_ERR(child);
a603a7fa
DB
731 }
732
f78959cf 733 if (IS_ENABLED(CONFIG_KEYBOARD_TWL4030) && pdata->keypad) {
3c330279 734 child = add_child(TWL4030_MODULE_KEYPAD, "twl4030_keypad",
5725d66b 735 pdata->keypad, sizeof(*pdata->keypad),
9e178620 736 true, irq_base + KEYPAD_INTR_OFFSET, 0);
5725d66b
DB
737 if (IS_ERR(child))
738 return PTR_ERR(child);
a603a7fa
DB
739 }
740
24ae36f5
PU
741 if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc &&
742 twl_class_is_4030()) {
3c330279 743 child = add_child(TWL4030_MODULE_MADC, "twl4030_madc",
5725d66b 744 pdata->madc, sizeof(*pdata->madc),
9e178620 745 true, irq_base + MADC_INTR_OFFSET, 0);
5725d66b
DB
746 if (IS_ERR(child))
747 return PTR_ERR(child);
a603a7fa
DB
748 }
749
f78959cf 750 if (IS_ENABLED(CONFIG_RTC_DRV_TWL4030)) {
a603a7fa 751 /*
5725d66b 752 * REVISIT platform_data here currently might expose the
a603a7fa 753 * "msecure" line ... but for now we just expect board
5725d66b 754 * setup to tell the chip "it's always ok to SET_TIME".
a603a7fa
DB
755 * Eventually, Linux might become more aware of such
756 * HW security concerns, and "least privilege".
757 */
3c330279 758 child = add_child(TWL_MODULE_RTC, "twl_rtc", NULL, 0,
9e178620 759 true, irq_base + RTC_INTR_OFFSET, 0);
5725d66b
DB
760 if (IS_ERR(child))
761 return PTR_ERR(child);
a603a7fa
DB
762 }
763
afc45898 764 if (IS_ENABLED(CONFIG_PWM_TWL)) {
3c330279 765 child = add_child(TWL_MODULE_PWM, "twl-pwm", NULL, 0,
afc45898
PU
766 false, 0, 0);
767 if (IS_ERR(child))
768 return PTR_ERR(child);
769 }
770
771 if (IS_ENABLED(CONFIG_PWM_TWL_LED)) {
3c330279 772 child = add_child(TWL_MODULE_LED, "twl-pwmled", NULL, 0,
48a364b7
TR
773 false, 0, 0);
774 if (IS_ERR(child))
775 return PTR_ERR(child);
776 }
777
f78959cf
TR
778 if (IS_ENABLED(CONFIG_TWL4030_USB) && pdata->usb &&
779 twl_class_is_4030()) {
f8ebdff0
RQ
780
781 static struct regulator_consumer_supply usb1v5 = {
782 .supply = "usb1v5",
783 };
784 static struct regulator_consumer_supply usb1v8 = {
785 .supply = "usb1v8",
786 };
ab37813f
N
787 static struct regulator_consumer_supply usb3v1[] = {
788 { .supply = "usb3v1" },
789 { .supply = "bci3v1" },
f8ebdff0
RQ
790 };
791
792 /* First add the regulators so that they can be used by transceiver */
f78959cf 793 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) {
f8ebdff0
RQ
794 /* this is a template that gets copied */
795 struct regulator_init_data usb_fixed = {
796 .constraints.valid_modes_mask =
797 REGULATOR_MODE_NORMAL
798 | REGULATOR_MODE_STANDBY,
799 .constraints.valid_ops_mask =
800 REGULATOR_CHANGE_MODE
801 | REGULATOR_CHANGE_STATUS,
802 };
803
804 child = add_regulator_linked(TWL4030_REG_VUSB1V5,
521d8ec3
GG
805 &usb_fixed, &usb1v5, 1,
806 features);
f8ebdff0
RQ
807 if (IS_ERR(child))
808 return PTR_ERR(child);
809
810 child = add_regulator_linked(TWL4030_REG_VUSB1V8,
521d8ec3
GG
811 &usb_fixed, &usb1v8, 1,
812 features);
f8ebdff0
RQ
813 if (IS_ERR(child))
814 return PTR_ERR(child);
815
816 child = add_regulator_linked(TWL4030_REG_VUSB3V1,
ab37813f 817 &usb_fixed, usb3v1, 2,
521d8ec3 818 features);
f8ebdff0
RQ
819 if (IS_ERR(child))
820 return PTR_ERR(child);
821
822 }
823
3c330279 824 child = add_child(TWL_MODULE_USB, "twl4030_usb",
2d86ad37 825 pdata->usb, sizeof(*pdata->usb), true,
5725d66b 826 /* irq0 = USB_PRES, irq1 = USB */
9e178620
FB
827 irq_base + USB_PRES_INTR_OFFSET,
828 irq_base + USB_INTR_OFFSET);
f8ebdff0 829
5725d66b
DB
830 if (IS_ERR(child))
831 return PTR_ERR(child);
dad759ff
DB
832
833 /* we need to connect regulators to this transceiver */
f78959cf 834 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child) {
1b65fa84
MB
835 usb1v5.dev_name = dev_name(child);
836 usb1v8.dev_name = dev_name(child);
ab37813f 837 usb3v1[0].dev_name = dev_name(child);
f8ebdff0 838 }
dad759ff
DB
839 }
840
f78959cf 841 if (IS_ENABLED(CONFIG_TWL4030_WATCHDOG) && twl_class_is_4030()) {
3c330279
PU
842 child = add_child(TWL_MODULE_PM_RECEIVER, "twl4030_wdt", NULL,
843 0, false, 0, 0);
80e45b1e 844 if (IS_ERR(child))
9c3664dd
FB
845 return PTR_ERR(child);
846 }
847
f78959cf 848 if (IS_ENABLED(CONFIG_INPUT_TWL4030_PWRBUTTON) && twl_class_is_4030()) {
3c330279
PU
849 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_pwrbutton",
850 NULL, 0, true, irq_base + 8 + 0, 0);
9c3664dd 851 if (IS_ERR(child))
80e45b1e
TK
852 return PTR_ERR(child);
853 }
854
f78959cf
TR
855 if (IS_ENABLED(CONFIG_MFD_TWL4030_AUDIO) && pdata->audio &&
856 twl_class_is_4030()) {
3c330279 857 child = add_child(TWL4030_MODULE_AUDIO_VOICE, "twl4030-audio",
4ae6df5e 858 pdata->audio, sizeof(*pdata->audio),
d62abe56
MLC
859 false, 0, 0);
860 if (IS_ERR(child))
861 return PTR_ERR(child);
862 }
863
9da66539 864 /* twl4030 regulators */
f78959cf 865 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_4030()) {
521d8ec3
GG
866 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1,
867 features);
dad759ff
DB
868 if (IS_ERR(child))
869 return PTR_ERR(child);
ab4abe05 870
521d8ec3
GG
871 child = add_regulator(TWL4030_REG_VIO, pdata->vio,
872 features);
ab4abe05
JKS
873 if (IS_ERR(child))
874 return PTR_ERR(child);
875
521d8ec3
GG
876 child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1,
877 features);
ab4abe05
JKS
878 if (IS_ERR(child))
879 return PTR_ERR(child);
880
521d8ec3
GG
881 child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2,
882 features);
ab4abe05
JKS
883 if (IS_ERR(child))
884 return PTR_ERR(child);
dad759ff 885
521d8ec3
GG
886 child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1,
887 features);
dad759ff
DB
888 if (IS_ERR(child))
889 return PTR_ERR(child);
890
521d8ec3
GG
891 child = add_regulator(TWL4030_REG_VDAC, pdata->vdac,
892 features);
dad759ff
DB
893 if (IS_ERR(child))
894 return PTR_ERR(child);
895
896 child = add_regulator((features & TWL4030_VAUX2)
897 ? TWL4030_REG_VAUX2_4030
898 : TWL4030_REG_VAUX2,
521d8ec3 899 pdata->vaux2, features);
dad759ff
DB
900 if (IS_ERR(child))
901 return PTR_ERR(child);
ab4abe05 902
521d8ec3
GG
903 child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1,
904 features);
ab4abe05
JKS
905 if (IS_ERR(child))
906 return PTR_ERR(child);
907
521d8ec3
GG
908 child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2,
909 features);
ab4abe05
JKS
910 if (IS_ERR(child))
911 return PTR_ERR(child);
912
521d8ec3
GG
913 child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig,
914 features);
ab4abe05
JKS
915 if (IS_ERR(child))
916 return PTR_ERR(child);
dad759ff
DB
917 }
918
dad759ff 919 /* maybe add LDOs that are omitted on cost-reduced parts */
f78959cf 920 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && !(features & TPS_SUBSET)
9da66539 921 && twl_class_is_4030()) {
521d8ec3
GG
922 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2,
923 features);
dad759ff
DB
924 if (IS_ERR(child))
925 return PTR_ERR(child);
dad759ff 926
521d8ec3
GG
927 child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2,
928 features);
dad759ff
DB
929 if (IS_ERR(child))
930 return PTR_ERR(child);
931
521d8ec3
GG
932 child = add_regulator(TWL4030_REG_VSIM, pdata->vsim,
933 features);
dad759ff
DB
934 if (IS_ERR(child))
935 return PTR_ERR(child);
936
521d8ec3
GG
937 child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1,
938 features);
dad759ff
DB
939 if (IS_ERR(child))
940 return PTR_ERR(child);
941
521d8ec3
GG
942 child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3,
943 features);
dad759ff
DB
944 if (IS_ERR(child))
945 return PTR_ERR(child);
946
521d8ec3
GG
947 child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4,
948 features);
dad759ff
DB
949 if (IS_ERR(child))
950 return PTR_ERR(child);
a603a7fa
DB
951 }
952
f78959cf 953 if (IS_ENABLED(CONFIG_CHARGER_TWL4030) && pdata->bci &&
11c39c4b 954 !(features & (TPS_SUBSET | TWL5031))) {
3c330279 955 child = add_child(TWL_MODULE_MAIN_CHARGE, "twl4030_bci",
11c39c4b
GI
956 pdata->bci, sizeof(*pdata->bci), false,
957 /* irq0 = CHG_PRES, irq1 = BCI */
9e178620
FB
958 irq_base + BCI_PRES_INTR_OFFSET,
959 irq_base + BCI_INTR_OFFSET);
11c39c4b
GI
960 if (IS_ERR(child))
961 return PTR_ERR(child);
962 }
963
637d6895
FV
964 if (IS_ENABLED(CONFIG_TWL4030_POWER) && pdata->power) {
965 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_power",
966 pdata->power, sizeof(*pdata->power), false,
967 0, 0);
968 if (IS_ERR(child))
969 return PTR_ERR(child);
970 }
971
5725d66b 972 return 0;
a603a7fa
DB
973}
974
975/*----------------------------------------------------------------------*/
976
977/*
978 * These three functions initialize the on-chip clock framework,
979 * letting it generate the right frequencies for USB, MADC, and
980 * other purposes.
981 */
982static inline int __init protect_pm_master(void)
983{
984 int e = 0;
985
d640e757
PU
986 e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
987 TWL4030_PM_MASTER_PROTECT_KEY);
a603a7fa
DB
988 return e;
989}
990
991static inline int __init unprotect_pm_master(void)
992{
993 int e = 0;
994
d640e757
PU
995 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
996 TWL4030_PM_MASTER_PROTECT_KEY);
997 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
998 TWL4030_PM_MASTER_PROTECT_KEY);
49e6f87e 999
a603a7fa
DB
1000 return e;
1001}
1002
38a68496
IK
1003static void clocks_init(struct device *dev,
1004 struct twl4030_clock_init_data *clock)
a603a7fa
DB
1005{
1006 int e = 0;
1007 struct clk *osc;
1008 u32 rate;
1009 u8 ctrl = HFCLK_FREQ_26_MHZ;
1010
defa6be1 1011 osc = clk_get(dev, "fck");
a603a7fa 1012 if (IS_ERR(osc)) {
fc7b92fc 1013 printk(KERN_WARNING "Skipping twl internal clock init and "
a603a7fa
DB
1014 "using bootloader value (unknown osc rate)\n");
1015 return;
1016 }
1017
1018 rate = clk_get_rate(osc);
1019 clk_put(osc);
1020
1021 switch (rate) {
1022 case 19200000:
1023 ctrl = HFCLK_FREQ_19p2_MHZ;
1024 break;
1025 case 26000000:
1026 ctrl = HFCLK_FREQ_26_MHZ;
1027 break;
1028 case 38400000:
1029 ctrl = HFCLK_FREQ_38p4_MHZ;
1030 break;
1031 }
1032
1033 ctrl |= HIGH_PERF_SQ;
38a68496
IK
1034 if (clock && clock->ck32k_lowpwr_enable)
1035 ctrl |= CK32K_LOWPWR_EN;
1036
a603a7fa
DB
1037 e |= unprotect_pm_master();
1038 /* effect->MADC+USB ck en */
fc7b92fc 1039 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
a603a7fa
DB
1040 e |= protect_pm_master();
1041
1042 if (e < 0)
1043 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
1044}
1045
1046/*----------------------------------------------------------------------*/
1047
a603a7fa 1048
fc7b92fc 1049static int twl_remove(struct i2c_client *client)
a603a7fa 1050{
364cedb2 1051 unsigned i, num_slaves;
a30d46c0 1052 int status;
a603a7fa 1053
6dd810b5 1054 if (twl_class_is_4030())
e8deb28c 1055 status = twl4030_exit_irq();
6dd810b5 1056 else
e8deb28c
B
1057 status = twl6030_exit_irq();
1058
a30d46c0
DB
1059 if (status < 0)
1060 return status;
a603a7fa 1061
6dd810b5 1062 num_slaves = twl_get_num_slaves();
364cedb2 1063 for (i = 0; i < num_slaves; i++) {
80a97ccd 1064 struct twl_client *twl = &twl_priv->twl_modules[i];
a603a7fa
DB
1065
1066 if (twl->client && twl->client != client)
1067 i2c_unregister_device(twl->client);
80a97ccd 1068 twl->client = NULL;
a603a7fa 1069 }
80a97ccd 1070 twl_priv->ready = false;
a603a7fa
DB
1071 return 0;
1072}
1073
80ec831e
TL
1074static struct of_dev_auxdata twl_auxdata_lookup[] = {
1075 OF_DEV_AUXDATA("ti,twl4030-gpio", 0, "twl4030-gpio", NULL),
1076 { /* sentinel */ },
1077};
1078
ec1a07b3 1079/* NOTE: This driver only handles a single twl4030/tps659x0 chip */
f791be49 1080static int
fc7b92fc 1081twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
a603a7fa 1082{
334a41ce 1083 struct twl4030_platform_data *pdata = dev_get_platdata(&client->dev);
aeb5032b 1084 struct device_node *node = client->dev.of_node;
defa6be1 1085 struct platform_device *pdev;
2473d25a 1086 struct regmap_config *twl_regmap_config;
ec1a07b3
BC
1087 int irq_base = 0;
1088 int status;
364cedb2 1089 unsigned i, num_slaves;
aeb5032b 1090
7e2e6c57
PU
1091 if (!node && !pdata) {
1092 dev_err(&client->dev, "no platform data\n");
1093 return -EINVAL;
1094 }
1095
80a97ccd 1096 if (twl_priv) {
6382a061
PU
1097 dev_dbg(&client->dev, "only one instance of %s allowed\n",
1098 DRIVER_NAME);
1099 return -EBUSY;
1100 }
1101
defa6be1
TL
1102 pdev = platform_device_alloc(DRIVER_NAME, -1);
1103 if (!pdev) {
1104 dev_err(&client->dev, "can't alloc pdev\n");
1105 return -ENOMEM;
1106 }
1107
1108 status = platform_device_add(pdev);
1109 if (status) {
1110 platform_device_put(pdev);
1111 return status;
1112 }
1113
a603a7fa
DB
1114 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
1115 dev_dbg(&client->dev, "can't talk I2C?\n");
defa6be1
TL
1116 status = -EIO;
1117 goto free;
a603a7fa
DB
1118 }
1119
80a97ccd
PU
1120 twl_priv = devm_kzalloc(&client->dev, sizeof(struct twl_private),
1121 GFP_KERNEL);
1122 if (!twl_priv) {
1123 status = -ENOMEM;
1124 goto free;
1125 }
1126
364cedb2 1127 if ((id->driver_data) & TWL6030_CLASS) {
80a97ccd
PU
1128 twl_priv->twl_id = TWL6030_CLASS_ID;
1129 twl_priv->twl_map = &twl6030_map[0];
89ce43fb
GG
1130 /* The charger base address is different in twl6032 */
1131 if ((id->driver_data) & TWL6032_SUBCLASS)
80a97ccd 1132 twl_priv->twl_map[TWL_MODULE_MAIN_CHARGE].base =
89ce43fb 1133 TWL6032_BASEADD_CHARGER;
2473d25a 1134 twl_regmap_config = twl6030_regmap_config;
364cedb2 1135 } else {
80a97ccd
PU
1136 twl_priv->twl_id = TWL4030_CLASS_ID;
1137 twl_priv->twl_map = &twl4030_map[0];
2473d25a 1138 twl_regmap_config = twl4030_regmap_config;
6dd810b5
PU
1139 }
1140
1141 num_slaves = twl_get_num_slaves();
80a97ccd
PU
1142 twl_priv->twl_modules = devm_kzalloc(&client->dev,
1143 sizeof(struct twl_client) * num_slaves,
1144 GFP_KERNEL);
1145 if (!twl_priv->twl_modules) {
6dd810b5
PU
1146 status = -ENOMEM;
1147 goto free;
364cedb2
PU
1148 }
1149
1150 for (i = 0; i < num_slaves; i++) {
80a97ccd 1151 struct twl_client *twl = &twl_priv->twl_modules[i];
a603a7fa 1152
ec1a07b3 1153 if (i == 0) {
a603a7fa 1154 twl->client = client;
ec1a07b3 1155 } else {
a603a7fa 1156 twl->client = i2c_new_dummy(client->adapter,
2473d25a 1157 client->addr + i);
a603a7fa 1158 if (!twl->client) {
a8643430 1159 dev_err(&client->dev,
a603a7fa
DB
1160 "can't attach client %d\n", i);
1161 status = -ENOMEM;
1162 goto fail;
1163 }
a603a7fa 1164 }
2473d25a
PU
1165
1166 twl->regmap = devm_regmap_init_i2c(twl->client,
1167 &twl_regmap_config[i]);
1168 if (IS_ERR(twl->regmap)) {
1169 status = PTR_ERR(twl->regmap);
1170 dev_err(&client->dev,
1171 "Failed to allocate regmap %d, err: %d\n", i,
1172 status);
1173 goto fail;
1174 }
a603a7fa 1175 }
ec1a07b3 1176
80a97ccd 1177 twl_priv->ready = true;
a603a7fa
DB
1178
1179 /* setup clock framework */
7e2e6c57 1180 clocks_init(&pdev->dev, pdata ? pdata->clock : NULL);
a603a7fa 1181
ca972d13 1182 /* read TWL IDCODE Register */
80a97ccd 1183 if (twl_class_is_4030()) {
ec1a07b3
BC
1184 status = twl_read_idcode_register();
1185 WARN(status < 0, "Error: reading twl_idcode register value\n");
ca972d13
L
1186 }
1187
a603a7fa 1188 /* Maybe init the T2 Interrupt subsystem */
9e178620 1189 if (client->irq) {
e8deb28c
B
1190 if (twl_class_is_4030()) {
1191 twl4030_init_chip_irq(id->name);
78518ffa 1192 irq_base = twl4030_init_irq(&client->dev, client->irq);
e8deb28c 1193 } else {
78518ffa 1194 irq_base = twl6030_init_irq(&client->dev, client->irq);
e8deb28c
B
1195 }
1196
78518ffa
BC
1197 if (irq_base < 0) {
1198 status = irq_base;
a30d46c0 1199 goto fail;
78518ffa 1200 }
a603a7fa
DB
1201 }
1202
ec1a07b3
BC
1203 /*
1204 * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
a29aaf55
MS
1205 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
1206 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
1207 */
a29aaf55 1208 if (twl_class_is_4030()) {
ec1a07b3
BC
1209 u8 temp;
1210
a29aaf55
MS
1211 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
1212 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
ec1a07b3 1213 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
a29aaf55
MS
1214 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
1215 }
1216
80ec831e
TL
1217 if (node) {
1218 if (pdata)
1219 twl_auxdata_lookup[0].platform_data = pdata->gpio;
1220 status = of_platform_populate(node, NULL, twl_auxdata_lookup,
1221 &client->dev);
1222 } else {
9e178620 1223 status = add_children(pdata, irq_base, id->driver_data);
80ec831e 1224 }
aeb5032b 1225
a603a7fa
DB
1226fail:
1227 if (status < 0)
fc7b92fc 1228 twl_remove(client);
defa6be1
TL
1229free:
1230 if (status < 0)
1231 platform_device_unregister(pdev);
ec1a07b3 1232
a603a7fa
DB
1233 return status;
1234}
1235
fc7b92fc 1236static const struct i2c_device_id twl_ids[] = {
dad759ff
DB
1237 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
1238 { "twl5030", 0 }, /* T2 updated */
1920a61e 1239 { "twl5031", TWL5031 }, /* TWL5030 updated */
dad759ff
DB
1240 { "tps65950", 0 }, /* catalog version of twl5030 */
1241 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
1242 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
59dead5a
OD
1243 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
1244 and vibrator. Charger in USB module*/
e8deb28c 1245 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
89ce43fb 1246 { "twl6032", TWL6030_CLASS | TWL6032_SUBCLASS }, /* "Phoenix lite" */
a603a7fa
DB
1247 { /* end of list */ },
1248};
fc7b92fc 1249MODULE_DEVICE_TABLE(i2c, twl_ids);
a603a7fa
DB
1250
1251/* One Client Driver , 4 Clients */
fc7b92fc 1252static struct i2c_driver twl_driver = {
a603a7fa 1253 .driver.name = DRIVER_NAME,
fc7b92fc
B
1254 .id_table = twl_ids,
1255 .probe = twl_probe,
1256 .remove = twl_remove,
a603a7fa
DB
1257};
1258
032fa16d 1259module_i2c_driver(twl_driver);
a603a7fa
DB
1260
1261MODULE_AUTHOR("Texas Instruments, Inc.");
fc7b92fc 1262MODULE_DESCRIPTION("I2C Core interface for TWL");
a603a7fa 1263MODULE_LICENSE("GPL");
This page took 0.502792 seconds and 5 git commands to generate.