Commit | Line | Data |
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f19b2823 MLC |
1 | /* |
2 | * MFD driver for TWL6040 audio device | |
3 | * | |
4 | * Authors: Misael Lopez Cruz <misael.lopez@ti.com> | |
5 | * Jorge Eduardo Candelaria <jorge.candelaria@ti.com> | |
6 | * Peter Ujfalusi <peter.ujfalusi@ti.com> | |
7 | * | |
8 | * Copyright: (C) 2011 Texas Instruments, Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
22 | * 02110-1301 USA | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <linux/module.h> | |
27 | #include <linux/types.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/kernel.h> | |
5af7df6b | 30 | #include <linux/err.h> |
f19b2823 | 31 | #include <linux/platform_device.h> |
37e13cec PU |
32 | #include <linux/of.h> |
33 | #include <linux/of_irq.h> | |
34 | #include <linux/of_gpio.h> | |
35 | #include <linux/of_platform.h> | |
f19b2823 MLC |
36 | #include <linux/gpio.h> |
37 | #include <linux/delay.h> | |
8eaeb939 PU |
38 | #include <linux/i2c.h> |
39 | #include <linux/regmap.h> | |
f19b2823 MLC |
40 | #include <linux/mfd/core.h> |
41 | #include <linux/mfd/twl6040.h> | |
5af7df6b | 42 | #include <linux/regulator/consumer.h> |
f19b2823 | 43 | |
31b402e3 | 44 | #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1) |
5af7df6b | 45 | #define TWL6040_NUM_SUPPLIES (2) |
31b402e3 | 46 | |
de1e23f8 | 47 | static const struct reg_default twl6040_defaults[] = { |
c7f9129d PU |
48 | { 0x01, 0x4B }, /* REG_ASICID (ro) */ |
49 | { 0x02, 0x00 }, /* REG_ASICREV (ro) */ | |
50 | { 0x03, 0x00 }, /* REG_INTID */ | |
51 | { 0x04, 0x00 }, /* REG_INTMR */ | |
52 | { 0x05, 0x00 }, /* REG_NCPCTRL */ | |
53 | { 0x06, 0x00 }, /* REG_LDOCTL */ | |
54 | { 0x07, 0x60 }, /* REG_HPPLLCTL */ | |
55 | { 0x08, 0x00 }, /* REG_LPPLLCTL */ | |
56 | { 0x09, 0x4A }, /* REG_LPPLLDIV */ | |
57 | { 0x0A, 0x00 }, /* REG_AMICBCTL */ | |
58 | { 0x0B, 0x00 }, /* REG_DMICBCTL */ | |
59 | { 0x0C, 0x00 }, /* REG_MICLCTL */ | |
60 | { 0x0D, 0x00 }, /* REG_MICRCTL */ | |
61 | { 0x0E, 0x00 }, /* REG_MICGAIN */ | |
62 | { 0x0F, 0x1B }, /* REG_LINEGAIN */ | |
63 | { 0x10, 0x00 }, /* REG_HSLCTL */ | |
64 | { 0x11, 0x00 }, /* REG_HSRCTL */ | |
65 | { 0x12, 0x00 }, /* REG_HSGAIN */ | |
66 | { 0x13, 0x00 }, /* REG_EARCTL */ | |
67 | { 0x14, 0x00 }, /* REG_HFLCTL */ | |
68 | { 0x15, 0x00 }, /* REG_HFLGAIN */ | |
69 | { 0x16, 0x00 }, /* REG_HFRCTL */ | |
70 | { 0x17, 0x00 }, /* REG_HFRGAIN */ | |
71 | { 0x18, 0x00 }, /* REG_VIBCTLL */ | |
72 | { 0x19, 0x00 }, /* REG_VIBDATL */ | |
73 | { 0x1A, 0x00 }, /* REG_VIBCTLR */ | |
74 | { 0x1B, 0x00 }, /* REG_VIBDATR */ | |
75 | { 0x1C, 0x00 }, /* REG_HKCTL1 */ | |
76 | { 0x1D, 0x00 }, /* REG_HKCTL2 */ | |
77 | { 0x1E, 0x00 }, /* REG_GPOCTL */ | |
78 | { 0x1F, 0x00 }, /* REG_ALB */ | |
79 | { 0x20, 0x00 }, /* REG_DLB */ | |
80 | /* 0x28, REG_TRIM1 */ | |
81 | /* 0x29, REG_TRIM2 */ | |
82 | /* 0x2A, REG_TRIM3 */ | |
83 | /* 0x2B, REG_HSOTRIM */ | |
84 | /* 0x2C, REG_HFOTRIM */ | |
85 | { 0x2D, 0x08 }, /* REG_ACCCTL */ | |
86 | { 0x2E, 0x00 }, /* REG_STATUS (ro) */ | |
87 | }; | |
88 | ||
8019ff6c | 89 | static struct reg_sequence twl6040_patch[] = { |
11e38e11 PU |
90 | /* |
91 | * Select I2C bus access to dual access registers | |
92 | * Interrupt register is cleared on read | |
93 | * Select fast mode for i2c (400KHz) | |
94 | */ | |
95 | { TWL6040_REG_ACCCTL, | |
96 | TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) }, | |
c7f9129d PU |
97 | }; |
98 | ||
99 | ||
df04b624 | 100 | static bool twl6040_has_vibra(struct device_node *node) |
ca2cad6a | 101 | { |
ca2cad6a SO |
102 | #ifdef CONFIG_OF |
103 | if (of_find_node_by_name(node, "vibra")) | |
104 | return true; | |
105 | #endif | |
ca2cad6a SO |
106 | return false; |
107 | } | |
108 | ||
f19b2823 MLC |
109 | int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg) |
110 | { | |
111 | int ret; | |
8eaeb939 | 112 | unsigned int val; |
f19b2823 | 113 | |
c6f39257 MB |
114 | ret = regmap_read(twl6040->regmap, reg, &val); |
115 | if (ret < 0) | |
116 | return ret; | |
f19b2823 MLC |
117 | |
118 | return val; | |
119 | } | |
120 | EXPORT_SYMBOL(twl6040_reg_read); | |
121 | ||
122 | int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val) | |
123 | { | |
124 | int ret; | |
125 | ||
8eaeb939 | 126 | ret = regmap_write(twl6040->regmap, reg, val); |
f19b2823 MLC |
127 | |
128 | return ret; | |
129 | } | |
130 | EXPORT_SYMBOL(twl6040_reg_write); | |
131 | ||
132 | int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask) | |
133 | { | |
c600040f | 134 | return regmap_update_bits(twl6040->regmap, reg, mask, mask); |
f19b2823 MLC |
135 | } |
136 | EXPORT_SYMBOL(twl6040_set_bits); | |
137 | ||
138 | int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask) | |
139 | { | |
c600040f | 140 | return regmap_update_bits(twl6040->regmap, reg, mask, 0); |
f19b2823 MLC |
141 | } |
142 | EXPORT_SYMBOL(twl6040_clear_bits); | |
143 | ||
144 | /* twl6040 codec manual power-up sequence */ | |
f9be1343 | 145 | static int twl6040_power_up_manual(struct twl6040 *twl6040) |
f19b2823 MLC |
146 | { |
147 | u8 ldoctl, ncpctl, lppllctl; | |
148 | int ret; | |
149 | ||
150 | /* enable high-side LDO, reference system and internal oscillator */ | |
151 | ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA; | |
152 | ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
153 | if (ret) | |
154 | return ret; | |
155 | usleep_range(10000, 10500); | |
156 | ||
157 | /* enable negative charge pump */ | |
158 | ncpctl = TWL6040_NCPENA; | |
159 | ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl); | |
160 | if (ret) | |
161 | goto ncp_err; | |
162 | usleep_range(1000, 1500); | |
163 | ||
164 | /* enable low-side LDO */ | |
165 | ldoctl |= TWL6040_LSLDOENA; | |
166 | ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
167 | if (ret) | |
168 | goto lsldo_err; | |
169 | usleep_range(1000, 1500); | |
170 | ||
171 | /* enable low-power PLL */ | |
172 | lppllctl = TWL6040_LPLLENA; | |
173 | ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); | |
174 | if (ret) | |
175 | goto lppll_err; | |
176 | usleep_range(5000, 5500); | |
177 | ||
178 | /* disable internal oscillator */ | |
179 | ldoctl &= ~TWL6040_OSCENA; | |
180 | ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
181 | if (ret) | |
182 | goto osc_err; | |
183 | ||
184 | return 0; | |
185 | ||
186 | osc_err: | |
187 | lppllctl &= ~TWL6040_LPLLENA; | |
188 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); | |
189 | lppll_err: | |
190 | ldoctl &= ~TWL6040_LSLDOENA; | |
191 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
192 | lsldo_err: | |
193 | ncpctl &= ~TWL6040_NCPENA; | |
194 | twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl); | |
195 | ncp_err: | |
196 | ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA); | |
197 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
198 | ||
f9be1343 | 199 | dev_err(twl6040->dev, "manual power-up failed\n"); |
f19b2823 MLC |
200 | return ret; |
201 | } | |
202 | ||
203 | /* twl6040 manual power-down sequence */ | |
f9be1343 | 204 | static void twl6040_power_down_manual(struct twl6040 *twl6040) |
f19b2823 MLC |
205 | { |
206 | u8 ncpctl, ldoctl, lppllctl; | |
207 | ||
208 | ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL); | |
209 | ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL); | |
210 | lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL); | |
211 | ||
212 | /* enable internal oscillator */ | |
213 | ldoctl |= TWL6040_OSCENA; | |
214 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
215 | usleep_range(1000, 1500); | |
216 | ||
217 | /* disable low-power PLL */ | |
218 | lppllctl &= ~TWL6040_LPLLENA; | |
219 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); | |
220 | ||
221 | /* disable low-side LDO */ | |
222 | ldoctl &= ~TWL6040_LSLDOENA; | |
223 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
224 | ||
225 | /* disable negative charge pump */ | |
226 | ncpctl &= ~TWL6040_NCPENA; | |
227 | twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl); | |
228 | ||
229 | /* disable high-side LDO, reference system and internal oscillator */ | |
230 | ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA); | |
231 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
232 | } | |
233 | ||
1ac96265 | 234 | static irqreturn_t twl6040_readyint_handler(int irq, void *data) |
f19b2823 MLC |
235 | { |
236 | struct twl6040 *twl6040 = data; | |
f19b2823 | 237 | |
1ac96265 | 238 | complete(&twl6040->ready); |
f19b2823 | 239 | |
1ac96265 PU |
240 | return IRQ_HANDLED; |
241 | } | |
f19b2823 | 242 | |
1ac96265 PU |
243 | static irqreturn_t twl6040_thint_handler(int irq, void *data) |
244 | { | |
245 | struct twl6040 *twl6040 = data; | |
246 | u8 status; | |
247 | ||
248 | status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS); | |
249 | if (status & TWL6040_TSHUTDET) { | |
250 | dev_warn(twl6040->dev, "Thermal shutdown, powering-off"); | |
251 | twl6040_power(twl6040, 0); | |
252 | } else { | |
253 | dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on"); | |
254 | twl6040_power(twl6040, 1); | |
f19b2823 MLC |
255 | } |
256 | ||
257 | return IRQ_HANDLED; | |
258 | } | |
259 | ||
f9be1343 | 260 | static int twl6040_power_up_automatic(struct twl6040 *twl6040) |
f19b2823 MLC |
261 | { |
262 | int time_left; | |
f9be1343 PU |
263 | |
264 | gpio_set_value(twl6040->audpwron, 1); | |
f19b2823 MLC |
265 | |
266 | time_left = wait_for_completion_timeout(&twl6040->ready, | |
267 | msecs_to_jiffies(144)); | |
268 | if (!time_left) { | |
f9be1343 PU |
269 | u8 intid; |
270 | ||
271 | dev_warn(twl6040->dev, "timeout waiting for READYINT\n"); | |
f19b2823 MLC |
272 | intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID); |
273 | if (!(intid & TWL6040_READYINT)) { | |
f9be1343 PU |
274 | dev_err(twl6040->dev, "automatic power-up failed\n"); |
275 | gpio_set_value(twl6040->audpwron, 0); | |
f19b2823 MLC |
276 | return -ETIMEDOUT; |
277 | } | |
278 | } | |
279 | ||
280 | return 0; | |
281 | } | |
282 | ||
283 | int twl6040_power(struct twl6040 *twl6040, int on) | |
284 | { | |
f19b2823 MLC |
285 | int ret = 0; |
286 | ||
287 | mutex_lock(&twl6040->mutex); | |
288 | ||
289 | if (on) { | |
290 | /* already powered-up */ | |
291 | if (twl6040->power_count++) | |
292 | goto out; | |
293 | ||
32852bca JMC |
294 | ret = clk_prepare_enable(twl6040->clk32k); |
295 | if (ret) { | |
296 | twl6040->power_count = 0; | |
297 | goto out; | |
298 | } | |
68bab866 | 299 | |
c7f9129d PU |
300 | /* Allow writes to the chip */ |
301 | regcache_cache_only(twl6040->regmap, false); | |
302 | ||
f9be1343 PU |
303 | if (gpio_is_valid(twl6040->audpwron)) { |
304 | /* use automatic power-up sequence */ | |
305 | ret = twl6040_power_up_automatic(twl6040); | |
f19b2823 | 306 | if (ret) { |
d6441dc5 | 307 | clk_disable_unprepare(twl6040->clk32k); |
f19b2823 MLC |
308 | twl6040->power_count = 0; |
309 | goto out; | |
310 | } | |
311 | } else { | |
312 | /* use manual power-up sequence */ | |
f9be1343 | 313 | ret = twl6040_power_up_manual(twl6040); |
f19b2823 | 314 | if (ret) { |
d6441dc5 | 315 | clk_disable_unprepare(twl6040->clk32k); |
f19b2823 MLC |
316 | twl6040->power_count = 0; |
317 | goto out; | |
318 | } | |
319 | } | |
c7f9129d PU |
320 | |
321 | /* Sync with the HW */ | |
322 | regcache_sync(twl6040->regmap); | |
323 | ||
cfb7a33b PU |
324 | /* Default PLL configuration after power up */ |
325 | twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL; | |
f19b2823 | 326 | twl6040->sysclk = 19200000; |
f8447d6c | 327 | twl6040->mclk = 32768; |
f19b2823 MLC |
328 | } else { |
329 | /* already powered-down */ | |
330 | if (!twl6040->power_count) { | |
2d7c957e | 331 | dev_err(twl6040->dev, |
f19b2823 MLC |
332 | "device is already powered-off\n"); |
333 | ret = -EPERM; | |
334 | goto out; | |
335 | } | |
336 | ||
337 | if (--twl6040->power_count) | |
338 | goto out; | |
339 | ||
f9be1343 | 340 | if (gpio_is_valid(twl6040->audpwron)) { |
f19b2823 | 341 | /* use AUDPWRON line */ |
f9be1343 | 342 | gpio_set_value(twl6040->audpwron, 0); |
f19b2823 MLC |
343 | |
344 | /* power-down sequence latency */ | |
345 | usleep_range(500, 700); | |
346 | } else { | |
347 | /* use manual power-down sequence */ | |
f9be1343 | 348 | twl6040_power_down_manual(twl6040); |
f19b2823 | 349 | } |
c7f9129d PU |
350 | |
351 | /* Set regmap to cache only and mark it as dirty */ | |
352 | regcache_cache_only(twl6040->regmap, true); | |
353 | regcache_mark_dirty(twl6040->regmap); | |
354 | ||
f19b2823 | 355 | twl6040->sysclk = 0; |
f8447d6c | 356 | twl6040->mclk = 0; |
68bab866 PU |
357 | |
358 | clk_disable_unprepare(twl6040->clk32k); | |
f19b2823 MLC |
359 | } |
360 | ||
361 | out: | |
362 | mutex_unlock(&twl6040->mutex); | |
363 | return ret; | |
364 | } | |
365 | EXPORT_SYMBOL(twl6040_power); | |
366 | ||
cfb7a33b | 367 | int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, |
f19b2823 MLC |
368 | unsigned int freq_in, unsigned int freq_out) |
369 | { | |
370 | u8 hppllctl, lppllctl; | |
371 | int ret = 0; | |
372 | ||
373 | mutex_lock(&twl6040->mutex); | |
374 | ||
375 | hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL); | |
376 | lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL); | |
377 | ||
2bd05db7 PU |
378 | /* Force full reconfiguration when switching between PLL */ |
379 | if (pll_id != twl6040->pll) { | |
380 | twl6040->sysclk = 0; | |
381 | twl6040->mclk = 0; | |
382 | } | |
383 | ||
cfb7a33b PU |
384 | switch (pll_id) { |
385 | case TWL6040_SYSCLK_SEL_LPPLL: | |
f19b2823 | 386 | /* low-power PLL divider */ |
2bd05db7 PU |
387 | /* Change the sysclk configuration only if it has been canged */ |
388 | if (twl6040->sysclk != freq_out) { | |
389 | switch (freq_out) { | |
390 | case 17640000: | |
391 | lppllctl |= TWL6040_LPLLFIN; | |
392 | break; | |
393 | case 19200000: | |
394 | lppllctl &= ~TWL6040_LPLLFIN; | |
395 | break; | |
396 | default: | |
397 | dev_err(twl6040->dev, | |
398 | "freq_out %d not supported\n", | |
399 | freq_out); | |
400 | ret = -EINVAL; | |
401 | goto pll_out; | |
402 | } | |
403 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
404 | lppllctl); | |
f19b2823 | 405 | } |
2bd05db7 PU |
406 | |
407 | /* The PLL in use has not been change, we can exit */ | |
408 | if (twl6040->pll == pll_id) | |
409 | break; | |
f19b2823 MLC |
410 | |
411 | switch (freq_in) { | |
412 | case 32768: | |
413 | lppllctl |= TWL6040_LPLLENA; | |
414 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
415 | lppllctl); | |
416 | mdelay(5); | |
417 | lppllctl &= ~TWL6040_HPLLSEL; | |
418 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
419 | lppllctl); | |
420 | hppllctl &= ~TWL6040_HPLLENA; | |
421 | twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL, | |
422 | hppllctl); | |
423 | break; | |
424 | default: | |
2d7c957e | 425 | dev_err(twl6040->dev, |
f19b2823 MLC |
426 | "freq_in %d not supported\n", freq_in); |
427 | ret = -EINVAL; | |
428 | goto pll_out; | |
429 | } | |
f19b2823 | 430 | break; |
cfb7a33b | 431 | case TWL6040_SYSCLK_SEL_HPPLL: |
f19b2823 MLC |
432 | /* high-performance PLL can provide only 19.2 MHz */ |
433 | if (freq_out != 19200000) { | |
2d7c957e | 434 | dev_err(twl6040->dev, |
f19b2823 MLC |
435 | "freq_out %d not supported\n", freq_out); |
436 | ret = -EINVAL; | |
437 | goto pll_out; | |
438 | } | |
439 | ||
2bd05db7 PU |
440 | if (twl6040->mclk != freq_in) { |
441 | hppllctl &= ~TWL6040_MCLK_MSK; | |
442 | ||
443 | switch (freq_in) { | |
444 | case 12000000: | |
445 | /* PLL enabled, active mode */ | |
446 | hppllctl |= TWL6040_MCLK_12000KHZ | | |
447 | TWL6040_HPLLENA; | |
448 | break; | |
449 | case 19200000: | |
ac8320c4 PU |
450 | /* PLL enabled, bypass mode */ |
451 | hppllctl |= TWL6040_MCLK_19200KHZ | | |
452 | TWL6040_HPLLBP | TWL6040_HPLLENA; | |
2bd05db7 PU |
453 | break; |
454 | case 26000000: | |
455 | /* PLL enabled, active mode */ | |
456 | hppllctl |= TWL6040_MCLK_26000KHZ | | |
457 | TWL6040_HPLLENA; | |
458 | break; | |
459 | case 38400000: | |
ac8320c4 | 460 | /* PLL enabled, bypass mode */ |
2bd05db7 | 461 | hppllctl |= TWL6040_MCLK_38400KHZ | |
ac8320c4 | 462 | TWL6040_HPLLBP | TWL6040_HPLLENA; |
2bd05db7 PU |
463 | break; |
464 | default: | |
465 | dev_err(twl6040->dev, | |
466 | "freq_in %d not supported\n", freq_in); | |
467 | ret = -EINVAL; | |
468 | goto pll_out; | |
469 | } | |
f19b2823 | 470 | |
f19b2823 | 471 | /* |
2bd05db7 PU |
472 | * enable clock slicer to ensure input waveform is |
473 | * square | |
f19b2823 | 474 | */ |
2bd05db7 | 475 | hppllctl |= TWL6040_HPLLSQRENA; |
f19b2823 | 476 | |
2bd05db7 PU |
477 | twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL, |
478 | hppllctl); | |
479 | usleep_range(500, 700); | |
480 | lppllctl |= TWL6040_HPLLSEL; | |
481 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
482 | lppllctl); | |
483 | lppllctl &= ~TWL6040_LPLLENA; | |
484 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
485 | lppllctl); | |
486 | } | |
f19b2823 MLC |
487 | break; |
488 | default: | |
2d7c957e | 489 | dev_err(twl6040->dev, "unknown pll id %d\n", pll_id); |
f19b2823 MLC |
490 | ret = -EINVAL; |
491 | goto pll_out; | |
492 | } | |
493 | ||
494 | twl6040->sysclk = freq_out; | |
f8447d6c | 495 | twl6040->mclk = freq_in; |
cfb7a33b | 496 | twl6040->pll = pll_id; |
f19b2823 MLC |
497 | |
498 | pll_out: | |
499 | mutex_unlock(&twl6040->mutex); | |
500 | return ret; | |
501 | } | |
502 | EXPORT_SYMBOL(twl6040_set_pll); | |
503 | ||
cfb7a33b | 504 | int twl6040_get_pll(struct twl6040 *twl6040) |
f19b2823 | 505 | { |
cfb7a33b PU |
506 | if (twl6040->power_count) |
507 | return twl6040->pll; | |
508 | else | |
509 | return -ENODEV; | |
f19b2823 MLC |
510 | } |
511 | EXPORT_SYMBOL(twl6040_get_pll); | |
512 | ||
513 | unsigned int twl6040_get_sysclk(struct twl6040 *twl6040) | |
514 | { | |
515 | return twl6040->sysclk; | |
516 | } | |
517 | EXPORT_SYMBOL(twl6040_get_sysclk); | |
518 | ||
70601ec1 PU |
519 | /* Get the combined status of the vibra control register */ |
520 | int twl6040_get_vibralr_status(struct twl6040 *twl6040) | |
521 | { | |
c6f39257 MB |
522 | unsigned int reg; |
523 | int ret; | |
70601ec1 PU |
524 | u8 status; |
525 | ||
c6f39257 MB |
526 | ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, ®); |
527 | if (ret != 0) | |
528 | return ret; | |
529 | status = reg; | |
530 | ||
531 | ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, ®); | |
532 | if (ret != 0) | |
533 | return ret; | |
534 | status |= reg; | |
535 | ||
70601ec1 PU |
536 | status &= (TWL6040_VIBENA | TWL6040_VIBSEL); |
537 | ||
538 | return status; | |
539 | } | |
540 | EXPORT_SYMBOL(twl6040_get_vibralr_status); | |
541 | ||
0f962ae2 PU |
542 | static struct resource twl6040_vibra_rsrc[] = { |
543 | { | |
544 | .flags = IORESOURCE_IRQ, | |
545 | }, | |
546 | }; | |
547 | ||
548 | static struct resource twl6040_codec_rsrc[] = { | |
549 | { | |
550 | .flags = IORESOURCE_IRQ, | |
551 | }, | |
552 | }; | |
553 | ||
8eaeb939 | 554 | static bool twl6040_readable_reg(struct device *dev, unsigned int reg) |
f19b2823 | 555 | { |
8eaeb939 PU |
556 | /* Register 0 is not readable */ |
557 | if (!reg) | |
558 | return false; | |
559 | return true; | |
560 | } | |
561 | ||
c6f39257 MB |
562 | static bool twl6040_volatile_reg(struct device *dev, unsigned int reg) |
563 | { | |
564 | switch (reg) { | |
c7f9129d PU |
565 | case TWL6040_REG_ASICID: |
566 | case TWL6040_REG_ASICREV: | |
567 | case TWL6040_REG_INTID: | |
568 | case TWL6040_REG_LPPLLCTL: | |
569 | case TWL6040_REG_HPPLLCTL: | |
570 | case TWL6040_REG_STATUS: | |
571 | return true; | |
572 | default: | |
573 | return false; | |
574 | } | |
575 | } | |
576 | ||
577 | static bool twl6040_writeable_reg(struct device *dev, unsigned int reg) | |
578 | { | |
579 | switch (reg) { | |
580 | case TWL6040_REG_ASICID: | |
581 | case TWL6040_REG_ASICREV: | |
582 | case TWL6040_REG_STATUS: | |
c6f39257 MB |
583 | return false; |
584 | default: | |
585 | return true; | |
586 | } | |
587 | } | |
588 | ||
de1e23f8 | 589 | static const struct regmap_config twl6040_regmap_config = { |
8eaeb939 PU |
590 | .reg_bits = 8, |
591 | .val_bits = 8, | |
c7f9129d PU |
592 | |
593 | .reg_defaults = twl6040_defaults, | |
594 | .num_reg_defaults = ARRAY_SIZE(twl6040_defaults), | |
595 | ||
8eaeb939 PU |
596 | .max_register = TWL6040_REG_STATUS, /* 0x2e */ |
597 | ||
598 | .readable_reg = twl6040_readable_reg, | |
c6f39257 | 599 | .volatile_reg = twl6040_volatile_reg, |
c7f9129d | 600 | .writeable_reg = twl6040_writeable_reg, |
c6f39257 MB |
601 | |
602 | .cache_type = REGCACHE_RBTREE, | |
8eaeb939 PU |
603 | }; |
604 | ||
ab7edb14 PU |
605 | static const struct regmap_irq twl6040_irqs[] = { |
606 | { .reg_offset = 0, .mask = TWL6040_THINT, }, | |
607 | { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, }, | |
608 | { .reg_offset = 0, .mask = TWL6040_HOOKINT, }, | |
609 | { .reg_offset = 0, .mask = TWL6040_HFINT, }, | |
610 | { .reg_offset = 0, .mask = TWL6040_VIBINT, }, | |
611 | { .reg_offset = 0, .mask = TWL6040_READYINT, }, | |
612 | }; | |
613 | ||
614 | static struct regmap_irq_chip twl6040_irq_chip = { | |
615 | .name = "twl6040", | |
616 | .irqs = twl6040_irqs, | |
617 | .num_irqs = ARRAY_SIZE(twl6040_irqs), | |
618 | ||
619 | .num_regs = 1, | |
620 | .status_base = TWL6040_REG_INTID, | |
621 | .mask_base = TWL6040_REG_INTMR, | |
622 | }; | |
623 | ||
612b95cd GKH |
624 | static int twl6040_probe(struct i2c_client *client, |
625 | const struct i2c_device_id *id) | |
8eaeb939 | 626 | { |
37e13cec | 627 | struct device_node *node = client->dev.of_node; |
f19b2823 MLC |
628 | struct twl6040 *twl6040; |
629 | struct mfd_cell *cell = NULL; | |
1f01d60e | 630 | int irq, ret, children = 0; |
f19b2823 | 631 | |
df04b624 PU |
632 | if (!node) { |
633 | dev_err(&client->dev, "of node is missing\n"); | |
f19b2823 MLC |
634 | return -EINVAL; |
635 | } | |
636 | ||
d20e1d21 | 637 | /* In order to operate correctly we need valid interrupt config */ |
6712419d | 638 | if (!client->irq) { |
8eaeb939 | 639 | dev_err(&client->dev, "Invalid IRQ configuration\n"); |
d20e1d21 PU |
640 | return -EINVAL; |
641 | } | |
642 | ||
8eaeb939 PU |
643 | twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040), |
644 | GFP_KERNEL); | |
ecc8fa1c PU |
645 | if (!twl6040) |
646 | return -ENOMEM; | |
8eaeb939 | 647 | |
bbf6adc1 | 648 | twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config); |
ecc8fa1c PU |
649 | if (IS_ERR(twl6040->regmap)) |
650 | return PTR_ERR(twl6040->regmap); | |
f19b2823 | 651 | |
8eaeb939 | 652 | i2c_set_clientdata(client, twl6040); |
f19b2823 | 653 | |
68bab866 PU |
654 | twl6040->clk32k = devm_clk_get(&client->dev, "clk32k"); |
655 | if (IS_ERR(twl6040->clk32k)) { | |
75c08f17 TL |
656 | if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER) |
657 | return -EPROBE_DEFER; | |
68bab866 PU |
658 | dev_info(&client->dev, "clk32k is not handled\n"); |
659 | twl6040->clk32k = NULL; | |
660 | } | |
661 | ||
5af7df6b PU |
662 | twl6040->supplies[0].supply = "vio"; |
663 | twl6040->supplies[1].supply = "v2v1"; | |
990810b0 | 664 | ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES, |
37aefe9f | 665 | twl6040->supplies); |
5af7df6b PU |
666 | if (ret != 0) { |
667 | dev_err(&client->dev, "Failed to get supplies: %d\n", ret); | |
501d609a | 668 | return ret; |
5af7df6b PU |
669 | } |
670 | ||
671 | ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies); | |
672 | if (ret != 0) { | |
673 | dev_err(&client->dev, "Failed to enable supplies: %d\n", ret); | |
501d609a | 674 | return ret; |
5af7df6b PU |
675 | } |
676 | ||
8eaeb939 PU |
677 | twl6040->dev = &client->dev; |
678 | twl6040->irq = client->irq; | |
f19b2823 MLC |
679 | |
680 | mutex_init(&twl6040->mutex); | |
f19b2823 MLC |
681 | init_completion(&twl6040->ready); |
682 | ||
006cea3a PU |
683 | regmap_register_patch(twl6040->regmap, twl6040_patch, |
684 | ARRAY_SIZE(twl6040_patch)); | |
685 | ||
f19b2823 | 686 | twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV); |
89d68998 FV |
687 | if (twl6040->rev < 0) { |
688 | dev_err(&client->dev, "Failed to read revision register: %d\n", | |
689 | twl6040->rev); | |
f2b86781 | 690 | ret = twl6040->rev; |
89d68998 FV |
691 | goto gpio_err; |
692 | } | |
f19b2823 | 693 | |
77f63e06 | 694 | /* ERRATA: Automatic power-up is not possible in ES1.0 */ |
df04b624 PU |
695 | if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0) |
696 | twl6040->audpwron = of_get_named_gpio(node, | |
697 | "ti,audpwron-gpio", 0); | |
698 | else | |
77f63e06 PU |
699 | twl6040->audpwron = -EINVAL; |
700 | ||
f19b2823 | 701 | if (gpio_is_valid(twl6040->audpwron)) { |
990810b0 | 702 | ret = devm_gpio_request_one(&client->dev, twl6040->audpwron, |
37aefe9f | 703 | GPIOF_OUT_INIT_LOW, "audpwron"); |
f19b2823 | 704 | if (ret) |
5af7df6b | 705 | goto gpio_err; |
02d02728 PU |
706 | |
707 | /* Clear any pending interrupt */ | |
708 | twl6040_reg_read(twl6040, TWL6040_REG_INTID); | |
f19b2823 MLC |
709 | } |
710 | ||
37aefe9f | 711 | ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT, |
c06f308a | 712 | 0, &twl6040_irq_chip, &twl6040->irq_data); |
ab7edb14 | 713 | if (ret < 0) |
990810b0 | 714 | goto gpio_err; |
d20e1d21 | 715 | |
ab7edb14 | 716 | twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data, |
37aefe9f | 717 | TWL6040_IRQ_READY); |
ab7edb14 | 718 | twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data, |
37aefe9f | 719 | TWL6040_IRQ_TH); |
ab7edb14 | 720 | |
990810b0 | 721 | ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL, |
37aefe9f PU |
722 | twl6040_readyint_handler, IRQF_ONESHOT, |
723 | "twl6040_irq_ready", twl6040); | |
d20e1d21 | 724 | if (ret) { |
1ac96265 PU |
725 | dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret); |
726 | goto readyirq_err; | |
727 | } | |
728 | ||
990810b0 | 729 | ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL, |
37aefe9f PU |
730 | twl6040_thint_handler, IRQF_ONESHOT, |
731 | "twl6040_irq_th", twl6040); | |
1ac96265 PU |
732 | if (ret) { |
733 | dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret); | |
fc5ee96f | 734 | goto readyirq_err; |
f19b2823 MLC |
735 | } |
736 | ||
1f01d60e PU |
737 | /* |
738 | * The main functionality of twl6040 to provide audio on OMAP4+ systems. | |
739 | * We can add the ASoC codec child whenever this driver has been loaded. | |
1f01d60e | 740 | */ |
ab7edb14 | 741 | irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG); |
1f01d60e PU |
742 | cell = &twl6040->cells[children]; |
743 | cell->name = "twl6040-codec"; | |
744 | twl6040_codec_rsrc[0].start = irq; | |
745 | twl6040_codec_rsrc[0].end = irq; | |
746 | cell->resources = twl6040_codec_rsrc; | |
747 | cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc); | |
1f01d60e | 748 | children++; |
f19b2823 | 749 | |
df04b624 PU |
750 | /* Vibra input driver support */ |
751 | if (twl6040_has_vibra(node)) { | |
ab7edb14 | 752 | irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB); |
0f962ae2 | 753 | |
f19b2823 MLC |
754 | cell = &twl6040->cells[children]; |
755 | cell->name = "twl6040-vibra"; | |
0f962ae2 PU |
756 | twl6040_vibra_rsrc[0].start = irq; |
757 | twl6040_vibra_rsrc[0].end = irq; | |
758 | cell->resources = twl6040_vibra_rsrc; | |
759 | cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc); | |
f19b2823 MLC |
760 | children++; |
761 | } | |
762 | ||
df04b624 PU |
763 | /* GPO support */ |
764 | cell = &twl6040->cells[children]; | |
765 | cell->name = "twl6040-gpo"; | |
766 | children++; | |
5cbe786a | 767 | |
c7f9129d PU |
768 | /* The chip is powered down so mark regmap to cache only and dirty */ |
769 | regcache_cache_only(twl6040->regmap, true); | |
770 | regcache_mark_dirty(twl6040->regmap); | |
771 | ||
1f01d60e | 772 | ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children, |
55692af5 | 773 | NULL, 0, NULL); |
1f01d60e | 774 | if (ret) |
fc5ee96f | 775 | goto readyirq_err; |
f19b2823 MLC |
776 | |
777 | return 0; | |
778 | ||
1ac96265 | 779 | readyirq_err: |
ab7edb14 | 780 | regmap_del_irq_chip(twl6040->irq, twl6040->irq_data); |
5af7df6b PU |
781 | gpio_err: |
782 | regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies); | |
f19b2823 MLC |
783 | return ret; |
784 | } | |
785 | ||
612b95cd | 786 | static int twl6040_remove(struct i2c_client *client) |
f19b2823 | 787 | { |
8eaeb939 | 788 | struct twl6040 *twl6040 = i2c_get_clientdata(client); |
f19b2823 MLC |
789 | |
790 | if (twl6040->power_count) | |
791 | twl6040_power(twl6040, 0); | |
792 | ||
ab7edb14 | 793 | regmap_del_irq_chip(twl6040->irq, twl6040->irq_data); |
f19b2823 | 794 | |
8eaeb939 | 795 | mfd_remove_devices(&client->dev); |
f19b2823 | 796 | |
5af7df6b | 797 | regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies); |
5af7df6b | 798 | |
f19b2823 MLC |
799 | return 0; |
800 | } | |
801 | ||
8eaeb939 PU |
802 | static const struct i2c_device_id twl6040_i2c_id[] = { |
803 | { "twl6040", 0, }, | |
1fc74aef | 804 | { "twl6041", 0, }, |
8eaeb939 PU |
805 | { }, |
806 | }; | |
807 | MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id); | |
808 | ||
809 | static struct i2c_driver twl6040_driver = { | |
810 | .driver = { | |
811 | .name = "twl6040", | |
8eaeb939 | 812 | }, |
f19b2823 | 813 | .probe = twl6040_probe, |
612b95cd | 814 | .remove = twl6040_remove, |
8eaeb939 | 815 | .id_table = twl6040_i2c_id, |
f19b2823 MLC |
816 | }; |
817 | ||
8eaeb939 | 818 | module_i2c_driver(twl6040_driver); |
f19b2823 MLC |
819 | |
820 | MODULE_DESCRIPTION("TWL6040 MFD"); | |
821 | MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>"); | |
822 | MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>"); | |
823 | MODULE_LICENSE("GPL"); |