Commit | Line | Data |
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2b7a5056 WS |
1 | /* |
2 | * at24.c - handle most I2C EEPROMs | |
3 | * | |
4 | * Copyright (C) 2005-2007 David Brownell | |
5 | * Copyright (C) 2008 Wolfram Sang, Pengutronix | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/mutex.h> | |
2b7a5056 WS |
18 | #include <linux/mod_devicetable.h> |
19 | #include <linux/log2.h> | |
20 | #include <linux/bitops.h> | |
21 | #include <linux/jiffies.h> | |
9ed030d7 | 22 | #include <linux/of.h> |
40d8edc9 | 23 | #include <linux/acpi.h> |
2b7a5056 | 24 | #include <linux/i2c.h> |
57d15550 | 25 | #include <linux/nvmem-provider.h> |
25f73ed5 | 26 | #include <linux/platform_data/at24.h> |
2b7a5056 WS |
27 | |
28 | /* | |
29 | * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. | |
30 | * Differences between different vendor product lines (like Atmel AT24C or | |
31 | * MicroChip 24LC, etc) won't much matter for typical read/write access. | |
32 | * There are also I2C RAM chips, likewise interchangeable. One example | |
33 | * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). | |
34 | * | |
35 | * However, misconfiguration can lose data. "Set 16-bit memory address" | |
36 | * to a part with 8-bit addressing will overwrite data. Writing with too | |
37 | * big a page size also loses data. And it's not safe to assume that the | |
38 | * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC | |
39 | * uses 0x51, for just one example. | |
40 | * | |
41 | * Accordingly, explicit board-specific configuration data should be used | |
42 | * in almost all cases. (One partial exception is an SMBus used to access | |
43 | * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) | |
44 | * | |
45 | * So this driver uses "new style" I2C driver binding, expecting to be | |
46 | * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or | |
47 | * similar kernel-resident tables; or, configuration data coming from | |
48 | * a bootloader. | |
49 | * | |
50 | * Other than binding model, current differences from "eeprom" driver are | |
51 | * that this one handles write access and isn't restricted to 24c02 devices. | |
52 | * It also handles larger devices (32 kbit and up) with two-byte addresses, | |
53 | * which won't work on pure SMBus systems. | |
54 | */ | |
55 | ||
56 | struct at24_data { | |
57 | struct at24_platform_data chip; | |
7aeb9664 | 58 | int use_smbus; |
a839ce66 | 59 | int use_smbus_write; |
2b7a5056 | 60 | |
318aa9c6 BG |
61 | ssize_t (*read_func)(struct at24_data *, char *, unsigned int, size_t); |
62 | ssize_t (*write_func)(struct at24_data *, | |
63 | const char *, unsigned int, size_t); | |
64 | ||
2b7a5056 WS |
65 | /* |
66 | * Lock protects against activities from other Linux tasks, | |
67 | * but not from changes by other I2C masters. | |
68 | */ | |
69 | struct mutex lock; | |
2b7a5056 WS |
70 | |
71 | u8 *writebuf; | |
72 | unsigned write_max; | |
73 | unsigned num_addresses; | |
74 | ||
57d15550 AL |
75 | struct nvmem_config nvmem_config; |
76 | struct nvmem_device *nvmem; | |
77 | ||
2b7a5056 WS |
78 | /* |
79 | * Some chips tie up multiple I2C addresses; dummy devices reserve | |
80 | * them for us, and we'll use them with SMBus calls. | |
81 | */ | |
82 | struct i2c_client *client[]; | |
83 | }; | |
84 | ||
85 | /* | |
86 | * This parameter is to help this driver avoid blocking other drivers out | |
87 | * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C | |
88 | * clock, one 256 byte read takes about 1/43 second which is excessive; | |
89 | * but the 1/170 second it takes at 400 kHz may be quite reasonable; and | |
90 | * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. | |
91 | * | |
92 | * This value is forced to be a power of two so that writes align on pages. | |
93 | */ | |
94 | static unsigned io_limit = 128; | |
95 | module_param(io_limit, uint, 0); | |
96 | MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); | |
97 | ||
98 | /* | |
99 | * Specs often allow 5 msec for a page write, sometimes 20 msec; | |
100 | * it's important to recover from write timeouts. | |
101 | */ | |
102 | static unsigned write_timeout = 25; | |
103 | module_param(write_timeout, uint, 0); | |
104 | MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); | |
105 | ||
106 | #define AT24_SIZE_BYTELEN 5 | |
107 | #define AT24_SIZE_FLAGS 8 | |
108 | ||
109 | #define AT24_BITMASK(x) (BIT(x) - 1) | |
110 | ||
111 | /* create non-zero magic value for given eeprom parameters */ | |
112 | #define AT24_DEVICE_MAGIC(_len, _flags) \ | |
113 | ((1 << AT24_SIZE_FLAGS | (_flags)) \ | |
114 | << AT24_SIZE_BYTELEN | ilog2(_len)) | |
115 | ||
9344a81e BG |
116 | /* |
117 | * Both reads and writes fail if the previous write didn't complete yet. This | |
118 | * macro loops a few times waiting at least long enough for one entire page | |
24da3cc0 BG |
119 | * write to work while making sure that at least one iteration is run before |
120 | * checking the break condition. | |
9344a81e BG |
121 | * |
122 | * It takes two parameters: a variable in which the future timeout in jiffies | |
123 | * will be stored and a temporary variable holding the time of the last | |
124 | * iteration of processing the request. Both should be unsigned integers | |
125 | * holding at least 32 bits. | |
126 | */ | |
127 | #define loop_until_timeout(tout, op_time) \ | |
24da3cc0 BG |
128 | for (tout = jiffies + msecs_to_jiffies(write_timeout), op_time = 0; \ |
129 | op_time ? time_before(op_time, tout) : true; \ | |
9344a81e BG |
130 | usleep_range(1000, 1500), op_time = jiffies) |
131 | ||
2b7a5056 WS |
132 | static const struct i2c_device_id at24_ids[] = { |
133 | /* needs 8 addresses as A0-A2 are ignored */ | |
b0b9f7bf | 134 | { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) }, |
2b7a5056 | 135 | /* old variants can't be handled with this generic entry! */ |
b0b9f7bf | 136 | { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) }, |
818d0220 BG |
137 | { "24cs01", AT24_DEVICE_MAGIC(16, |
138 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, | |
b0b9f7bf | 139 | { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) }, |
818d0220 BG |
140 | { "24cs02", AT24_DEVICE_MAGIC(16, |
141 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, | |
0b813658 BG |
142 | { "24mac402", AT24_DEVICE_MAGIC(48 / 8, |
143 | AT24_FLAG_MAC | AT24_FLAG_READONLY) }, | |
144 | { "24mac602", AT24_DEVICE_MAGIC(64 / 8, | |
145 | AT24_FLAG_MAC | AT24_FLAG_READONLY) }, | |
2b7a5056 | 146 | /* spd is a 24c02 in memory DIMMs */ |
b0b9f7bf BG |
147 | { "spd", AT24_DEVICE_MAGIC(2048 / 8, |
148 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO) }, | |
149 | { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) }, | |
818d0220 BG |
150 | { "24cs04", AT24_DEVICE_MAGIC(16, |
151 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, | |
2b7a5056 | 152 | /* 24rf08 quirk is handled at i2c-core */ |
b0b9f7bf | 153 | { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) }, |
818d0220 BG |
154 | { "24cs08", AT24_DEVICE_MAGIC(16, |
155 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, | |
b0b9f7bf | 156 | { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) }, |
818d0220 BG |
157 | { "24cs16", AT24_DEVICE_MAGIC(16, |
158 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, | |
b0b9f7bf | 159 | { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) }, |
818d0220 BG |
160 | { "24cs32", AT24_DEVICE_MAGIC(16, |
161 | AT24_FLAG_ADDR16 | | |
162 | AT24_FLAG_SERIAL | | |
163 | AT24_FLAG_READONLY) }, | |
b0b9f7bf | 164 | { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) }, |
818d0220 BG |
165 | { "24cs64", AT24_DEVICE_MAGIC(16, |
166 | AT24_FLAG_ADDR16 | | |
167 | AT24_FLAG_SERIAL | | |
168 | AT24_FLAG_READONLY) }, | |
b0b9f7bf BG |
169 | { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) }, |
170 | { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) }, | |
171 | { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) }, | |
172 | { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) }, | |
2b7a5056 WS |
173 | { "at24", 0 }, |
174 | { /* END OF LIST */ } | |
175 | }; | |
176 | MODULE_DEVICE_TABLE(i2c, at24_ids); | |
177 | ||
40d8edc9 AS |
178 | static const struct acpi_device_id at24_acpi_ids[] = { |
179 | { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) }, | |
180 | { } | |
181 | }; | |
182 | MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); | |
183 | ||
2b7a5056 WS |
184 | /*-------------------------------------------------------------------------*/ |
185 | ||
186 | /* | |
187 | * This routine supports chips which consume multiple I2C addresses. It | |
188 | * computes the addressing information to be used for a given r/w request. | |
189 | * Assumes that sanity checks for offset happened at sysfs-layer. | |
9afd6866 BG |
190 | * |
191 | * Slave address and byte offset derive from the offset. Always | |
192 | * set the byte address; on a multi-master board, another master | |
193 | * may have changed the chip's "current" address pointer. | |
194 | * | |
195 | * REVISIT some multi-address chips don't rollover page reads to | |
196 | * the next slave address, so we may need to truncate the count. | |
197 | * Those chips might need another quirk flag. | |
198 | * | |
199 | * If the real hardware used four adjacent 24c02 chips and that | |
200 | * were misconfigured as one 24c08, that would be a similar effect: | |
201 | * one "eeprom" file not four, but larger reads would fail when | |
202 | * they crossed certain pages. | |
2b7a5056 WS |
203 | */ |
204 | static struct i2c_client *at24_translate_offset(struct at24_data *at24, | |
2da78ac3 | 205 | unsigned int *offset) |
2b7a5056 WS |
206 | { |
207 | unsigned i; | |
208 | ||
209 | if (at24->chip.flags & AT24_FLAG_ADDR16) { | |
210 | i = *offset >> 16; | |
211 | *offset &= 0xffff; | |
212 | } else { | |
213 | i = *offset >> 8; | |
214 | *offset &= 0xff; | |
215 | } | |
216 | ||
217 | return at24->client[i]; | |
218 | } | |
219 | ||
9afd6866 BG |
220 | static ssize_t at24_eeprom_read_smbus(struct at24_data *at24, char *buf, |
221 | unsigned int offset, size_t count) | |
2b7a5056 | 222 | { |
9afd6866 | 223 | unsigned long timeout, read_time; |
2b7a5056 | 224 | struct i2c_client *client; |
9afd6866 BG |
225 | int status; |
226 | ||
227 | client = at24_translate_offset(at24, &offset); | |
228 | ||
229 | if (count > io_limit) | |
230 | count = io_limit; | |
231 | ||
232 | /* Smaller eeproms can work given some SMBus extension calls */ | |
233 | if (count > I2C_SMBUS_BLOCK_MAX) | |
234 | count = I2C_SMBUS_BLOCK_MAX; | |
235 | ||
236 | loop_until_timeout(timeout, read_time) { | |
237 | status = i2c_smbus_read_i2c_block_data_or_emulated(client, | |
238 | offset, | |
239 | count, buf); | |
240 | ||
241 | dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", | |
242 | count, offset, status, jiffies); | |
243 | ||
244 | if (status == count) | |
245 | return count; | |
246 | } | |
247 | ||
248 | return -ETIMEDOUT; | |
249 | } | |
250 | ||
251 | static ssize_t at24_eeprom_read_i2c(struct at24_data *at24, char *buf, | |
252 | unsigned int offset, size_t count) | |
253 | { | |
4d29196c | 254 | unsigned long timeout, read_time; |
9afd6866 BG |
255 | struct i2c_client *client; |
256 | struct i2c_msg msg[2]; | |
2b7a5056 | 257 | int status, i; |
9afd6866 | 258 | u8 msgbuf[2]; |
2b7a5056 WS |
259 | |
260 | memset(msg, 0, sizeof(msg)); | |
2b7a5056 WS |
261 | client = at24_translate_offset(at24, &offset); |
262 | ||
263 | if (count > io_limit) | |
264 | count = io_limit; | |
265 | ||
9afd6866 BG |
266 | /* |
267 | * When we have a better choice than SMBus calls, use a combined I2C | |
268 | * message. Write address; then read up to io_limit data bytes. Note | |
269 | * that read page rollover helps us here (unlike writes). msgbuf is | |
270 | * u8 and will cast to our needs. | |
271 | */ | |
272 | i = 0; | |
273 | if (at24->chip.flags & AT24_FLAG_ADDR16) | |
274 | msgbuf[i++] = offset >> 8; | |
275 | msgbuf[i++] = offset; | |
4d29196c | 276 | |
9afd6866 BG |
277 | msg[0].addr = client->addr; |
278 | msg[0].buf = msgbuf; | |
279 | msg[0].len = i; | |
4d29196c | 280 | |
9afd6866 BG |
281 | msg[1].addr = client->addr; |
282 | msg[1].flags = I2C_M_RD; | |
283 | msg[1].buf = buf; | |
284 | msg[1].len = count; | |
2b7a5056 | 285 | |
9344a81e | 286 | loop_until_timeout(timeout, read_time) { |
9afd6866 BG |
287 | status = i2c_transfer(client->adapter, msg, 2); |
288 | if (status == 2) | |
289 | status = count; | |
290 | ||
4d29196c WS |
291 | dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", |
292 | count, offset, status, jiffies); | |
2b7a5056 | 293 | |
4d29196c WS |
294 | if (status == count) |
295 | return count; | |
9344a81e | 296 | } |
2b7a5056 | 297 | |
4d29196c | 298 | return -ETIMEDOUT; |
2b7a5056 WS |
299 | } |
300 | ||
818d0220 BG |
301 | static ssize_t at24_eeprom_read_serial(struct at24_data *at24, char *buf, |
302 | unsigned int offset, size_t count) | |
303 | { | |
304 | unsigned long timeout, read_time; | |
305 | struct i2c_client *client; | |
306 | struct i2c_msg msg[2]; | |
307 | u8 addrbuf[2]; | |
308 | int status; | |
309 | ||
310 | client = at24_translate_offset(at24, &offset); | |
311 | ||
312 | memset(msg, 0, sizeof(msg)); | |
313 | msg[0].addr = client->addr; | |
314 | msg[0].buf = addrbuf; | |
315 | ||
316 | /* | |
317 | * The address pointer of the device is shared between the regular | |
318 | * EEPROM array and the serial number block. The dummy write (part of | |
319 | * the sequential read protocol) ensures the address pointer is reset | |
320 | * to the desired position. | |
321 | */ | |
322 | if (at24->chip.flags & AT24_FLAG_ADDR16) { | |
323 | /* | |
324 | * For 16 bit address pointers, the word address must contain | |
325 | * a '10' sequence in bits 11 and 10 regardless of the | |
326 | * intended position of the address pointer. | |
327 | */ | |
328 | addrbuf[0] = 0x08; | |
329 | addrbuf[1] = offset; | |
330 | msg[0].len = 2; | |
331 | } else { | |
332 | /* | |
333 | * Otherwise the word address must begin with a '10' sequence, | |
334 | * regardless of the intended address. | |
335 | */ | |
336 | addrbuf[0] = 0x80 + offset; | |
337 | msg[0].len = 1; | |
338 | } | |
339 | ||
340 | msg[1].addr = client->addr; | |
341 | msg[1].flags = I2C_M_RD; | |
342 | msg[1].buf = buf; | |
343 | msg[1].len = count; | |
344 | ||
345 | loop_until_timeout(timeout, read_time) { | |
346 | status = i2c_transfer(client->adapter, msg, 2); | |
347 | if (status == 2) | |
348 | return count; | |
349 | } | |
350 | ||
351 | return -ETIMEDOUT; | |
352 | } | |
353 | ||
0b813658 BG |
354 | static ssize_t at24_eeprom_read_mac(struct at24_data *at24, char *buf, |
355 | unsigned int offset, size_t count) | |
356 | { | |
357 | unsigned long timeout, read_time; | |
358 | struct i2c_client *client; | |
359 | struct i2c_msg msg[2]; | |
360 | u8 addrbuf[2]; | |
361 | int status; | |
362 | ||
363 | client = at24_translate_offset(at24, &offset); | |
364 | ||
365 | memset(msg, 0, sizeof(msg)); | |
366 | msg[0].addr = client->addr; | |
367 | msg[0].buf = addrbuf; | |
368 | addrbuf[0] = 0x90 + offset; | |
369 | msg[0].len = 1; | |
370 | msg[1].addr = client->addr; | |
371 | msg[1].flags = I2C_M_RD; | |
372 | msg[1].buf = buf; | |
373 | msg[1].len = count; | |
374 | ||
375 | loop_until_timeout(timeout, read_time) { | |
376 | status = i2c_transfer(client->adapter, msg, 2); | |
377 | if (status == 2) | |
378 | return count; | |
379 | } | |
380 | ||
381 | return -ETIMEDOUT; | |
382 | } | |
383 | ||
2b7a5056 WS |
384 | /* |
385 | * Note that if the hardware write-protect pin is pulled high, the whole | |
386 | * chip is normally write protected. But there are plenty of product | |
387 | * variants here, including OTP fuses and partial chip protect. | |
388 | * | |
cd0c8615 BG |
389 | * We only use page mode writes; the alternative is sloooow. These routines |
390 | * write at most one page. | |
2b7a5056 | 391 | */ |
cd0c8615 BG |
392 | |
393 | static size_t at24_adjust_write_count(struct at24_data *at24, | |
394 | unsigned int offset, size_t count) | |
2b7a5056 | 395 | { |
2b7a5056 WS |
396 | unsigned next_page; |
397 | ||
2b7a5056 WS |
398 | /* write_max is at most a page */ |
399 | if (count > at24->write_max) | |
400 | count = at24->write_max; | |
401 | ||
402 | /* Never roll over backwards, to the start of this page */ | |
403 | next_page = roundup(offset + 1, at24->chip.page_size); | |
404 | if (offset + count > next_page) | |
405 | count = next_page - offset; | |
406 | ||
cd0c8615 BG |
407 | return count; |
408 | } | |
409 | ||
410 | static ssize_t at24_eeprom_write_smbus_block(struct at24_data *at24, | |
411 | const char *buf, | |
412 | unsigned int offset, size_t count) | |
413 | { | |
414 | unsigned long timeout, write_time; | |
415 | struct i2c_client *client; | |
416 | ssize_t status = 0; | |
417 | ||
418 | client = at24_translate_offset(at24, &offset); | |
419 | count = at24_adjust_write_count(at24, offset, count); | |
2b7a5056 | 420 | |
cd0c8615 BG |
421 | loop_until_timeout(timeout, write_time) { |
422 | status = i2c_smbus_write_i2c_block_data(client, | |
423 | offset, count, buf); | |
424 | if (status == 0) | |
425 | status = count; | |
2b7a5056 | 426 | |
cd0c8615 BG |
427 | dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", |
428 | count, offset, status, jiffies); | |
2b7a5056 | 429 | |
cd0c8615 BG |
430 | if (status == count) |
431 | return count; | |
2b7a5056 WS |
432 | } |
433 | ||
cd0c8615 BG |
434 | return -ETIMEDOUT; |
435 | } | |
436 | ||
437 | static ssize_t at24_eeprom_write_smbus_byte(struct at24_data *at24, | |
438 | const char *buf, | |
439 | unsigned int offset, size_t count) | |
440 | { | |
441 | unsigned long timeout, write_time; | |
442 | struct i2c_client *client; | |
443 | ssize_t status = 0; | |
444 | ||
445 | client = at24_translate_offset(at24, &offset); | |
446 | ||
9344a81e | 447 | loop_until_timeout(timeout, write_time) { |
cd0c8615 BG |
448 | status = i2c_smbus_write_byte_data(client, offset, buf[0]); |
449 | if (status == 0) | |
450 | status = count; | |
451 | ||
452 | dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", | |
453 | count, offset, status, jiffies); | |
454 | ||
455 | if (status == count) | |
456 | return count; | |
457 | } | |
458 | ||
459 | return -ETIMEDOUT; | |
460 | } | |
461 | ||
462 | static ssize_t at24_eeprom_write_i2c(struct at24_data *at24, const char *buf, | |
463 | unsigned int offset, size_t count) | |
464 | { | |
465 | unsigned long timeout, write_time; | |
466 | struct i2c_client *client; | |
467 | struct i2c_msg msg; | |
468 | ssize_t status = 0; | |
469 | int i = 0; | |
470 | ||
471 | client = at24_translate_offset(at24, &offset); | |
472 | count = at24_adjust_write_count(at24, offset, count); | |
473 | ||
474 | msg.addr = client->addr; | |
475 | msg.flags = 0; | |
476 | ||
477 | /* msg.buf is u8 and casts will mask the values */ | |
478 | msg.buf = at24->writebuf; | |
479 | if (at24->chip.flags & AT24_FLAG_ADDR16) | |
480 | msg.buf[i++] = offset >> 8; | |
481 | ||
482 | msg.buf[i++] = offset; | |
483 | memcpy(&msg.buf[i], buf, count); | |
484 | msg.len = i + count; | |
485 | ||
486 | loop_until_timeout(timeout, write_time) { | |
487 | status = i2c_transfer(client->adapter, &msg, 1); | |
488 | if (status == 1) | |
489 | status = count; | |
490 | ||
2ce5b34f | 491 | dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", |
2b7a5056 WS |
492 | count, offset, status, jiffies); |
493 | ||
494 | if (status == count) | |
495 | return count; | |
9344a81e | 496 | } |
2b7a5056 WS |
497 | |
498 | return -ETIMEDOUT; | |
499 | } | |
500 | ||
d5bc0047 BG |
501 | static int at24_read(void *priv, unsigned int off, void *val, size_t count) |
502 | { | |
503 | struct at24_data *at24 = priv; | |
504 | char *buf = val; | |
505 | ||
506 | if (unlikely(!count)) | |
507 | return count; | |
508 | ||
509 | /* | |
510 | * Read data from chip, protecting against concurrent updates | |
511 | * from this host, but not from other I2C masters. | |
512 | */ | |
513 | mutex_lock(&at24->lock); | |
514 | ||
515 | while (count) { | |
516 | int status; | |
517 | ||
318aa9c6 | 518 | status = at24->read_func(at24, buf, off, count); |
d5bc0047 BG |
519 | if (status < 0) { |
520 | mutex_unlock(&at24->lock); | |
521 | return status; | |
522 | } | |
523 | buf += status; | |
524 | off += status; | |
525 | count -= status; | |
526 | } | |
527 | ||
528 | mutex_unlock(&at24->lock); | |
529 | ||
530 | return 0; | |
531 | } | |
532 | ||
cf0361a2 | 533 | static int at24_write(void *priv, unsigned int off, void *val, size_t count) |
2b7a5056 | 534 | { |
cf0361a2 SK |
535 | struct at24_data *at24 = priv; |
536 | char *buf = val; | |
2b7a5056 | 537 | |
2b7a5056 | 538 | if (unlikely(!count)) |
cf0361a2 | 539 | return -EINVAL; |
2b7a5056 WS |
540 | |
541 | /* | |
542 | * Write data to chip, protecting against concurrent updates | |
543 | * from this host, but not from other I2C masters. | |
544 | */ | |
545 | mutex_lock(&at24->lock); | |
546 | ||
547 | while (count) { | |
cf0361a2 | 548 | int status; |
2b7a5056 | 549 | |
318aa9c6 | 550 | status = at24->write_func(at24, buf, off, count); |
cf0361a2 SK |
551 | if (status < 0) { |
552 | mutex_unlock(&at24->lock); | |
553 | return status; | |
2b7a5056 WS |
554 | } |
555 | buf += status; | |
556 | off += status; | |
557 | count -= status; | |
2b7a5056 WS |
558 | } |
559 | ||
560 | mutex_unlock(&at24->lock); | |
561 | ||
57d15550 AL |
562 | return 0; |
563 | } | |
564 | ||
9ed030d7 WS |
565 | #ifdef CONFIG_OF |
566 | static void at24_get_ofdata(struct i2c_client *client, | |
2da78ac3 | 567 | struct at24_platform_data *chip) |
9ed030d7 WS |
568 | { |
569 | const __be32 *val; | |
570 | struct device_node *node = client->dev.of_node; | |
571 | ||
572 | if (node) { | |
573 | if (of_get_property(node, "read-only", NULL)) | |
574 | chip->flags |= AT24_FLAG_READONLY; | |
575 | val = of_get_property(node, "pagesize", NULL); | |
576 | if (val) | |
577 | chip->page_size = be32_to_cpup(val); | |
578 | } | |
579 | } | |
580 | #else | |
581 | static void at24_get_ofdata(struct i2c_client *client, | |
2da78ac3 | 582 | struct at24_platform_data *chip) |
9ed030d7 WS |
583 | { } |
584 | #endif /* CONFIG_OF */ | |
585 | ||
2b7a5056 WS |
586 | static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) |
587 | { | |
588 | struct at24_platform_data chip; | |
40d8edc9 | 589 | kernel_ulong_t magic = 0; |
2b7a5056 | 590 | bool writable; |
7aeb9664 | 591 | int use_smbus = 0; |
a839ce66 | 592 | int use_smbus_write = 0; |
2b7a5056 WS |
593 | struct at24_data *at24; |
594 | int err; | |
595 | unsigned i, num_addresses; | |
2b7a5056 WS |
596 | |
597 | if (client->dev.platform_data) { | |
598 | chip = *(struct at24_platform_data *)client->dev.platform_data; | |
599 | } else { | |
40d8edc9 AS |
600 | if (id) { |
601 | magic = id->driver_data; | |
602 | } else { | |
603 | const struct acpi_device_id *aid; | |
604 | ||
605 | aid = acpi_match_device(at24_acpi_ids, &client->dev); | |
606 | if (aid) | |
607 | magic = aid->driver_data; | |
608 | } | |
609 | if (!magic) | |
f0ac2363 NB |
610 | return -ENODEV; |
611 | ||
2b7a5056 WS |
612 | chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); |
613 | magic >>= AT24_SIZE_BYTELEN; | |
614 | chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); | |
615 | /* | |
616 | * This is slow, but we can't know all eeproms, so we better | |
617 | * play safe. Specifying custom eeprom-types via platform_data | |
618 | * is recommended anyhow. | |
619 | */ | |
620 | chip.page_size = 1; | |
7274ec8b | 621 | |
9ed030d7 WS |
622 | /* update chipdata if OF is present */ |
623 | at24_get_ofdata(client, &chip); | |
624 | ||
7274ec8b KH |
625 | chip.setup = NULL; |
626 | chip.context = NULL; | |
2b7a5056 WS |
627 | } |
628 | ||
629 | if (!is_power_of_2(chip.byte_len)) | |
630 | dev_warn(&client->dev, | |
631 | "byte_len looks suspicious (no power of 2)!\n"); | |
45efe847 WS |
632 | if (!chip.page_size) { |
633 | dev_err(&client->dev, "page_size must not be 0!\n"); | |
f0ac2363 | 634 | return -EINVAL; |
45efe847 | 635 | } |
2b7a5056 WS |
636 | if (!is_power_of_2(chip.page_size)) |
637 | dev_warn(&client->dev, | |
638 | "page_size looks suspicious (no power of 2)!\n"); | |
639 | ||
640 | /* Use I2C operations unless we're stuck with SMBus extensions. */ | |
641 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { | |
f0ac2363 NB |
642 | if (chip.flags & AT24_FLAG_ADDR16) |
643 | return -EPFNOSUPPORT; | |
644 | ||
7aeb9664 | 645 | if (i2c_check_functionality(client->adapter, |
2b7a5056 | 646 | I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { |
7aeb9664 JD |
647 | use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; |
648 | } else if (i2c_check_functionality(client->adapter, | |
649 | I2C_FUNC_SMBUS_READ_WORD_DATA)) { | |
650 | use_smbus = I2C_SMBUS_WORD_DATA; | |
651 | } else if (i2c_check_functionality(client->adapter, | |
652 | I2C_FUNC_SMBUS_READ_BYTE_DATA)) { | |
653 | use_smbus = I2C_SMBUS_BYTE_DATA; | |
654 | } else { | |
f0ac2363 | 655 | return -EPFNOSUPPORT; |
2b7a5056 | 656 | } |
2b7a5056 | 657 | |
a839ce66 CG |
658 | if (i2c_check_functionality(client->adapter, |
659 | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { | |
660 | use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA; | |
661 | } else if (i2c_check_functionality(client->adapter, | |
662 | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { | |
663 | use_smbus_write = I2C_SMBUS_BYTE_DATA; | |
664 | chip.page_size = 1; | |
665 | } | |
666 | } | |
667 | ||
2b7a5056 WS |
668 | if (chip.flags & AT24_FLAG_TAKE8ADDR) |
669 | num_addresses = 8; | |
670 | else | |
671 | num_addresses = DIV_ROUND_UP(chip.byte_len, | |
672 | (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); | |
673 | ||
f0ac2363 | 674 | at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) + |
2b7a5056 | 675 | num_addresses * sizeof(struct i2c_client *), GFP_KERNEL); |
f0ac2363 NB |
676 | if (!at24) |
677 | return -ENOMEM; | |
2b7a5056 WS |
678 | |
679 | mutex_init(&at24->lock); | |
680 | at24->use_smbus = use_smbus; | |
a839ce66 | 681 | at24->use_smbus_write = use_smbus_write; |
2b7a5056 WS |
682 | at24->chip = chip; |
683 | at24->num_addresses = num_addresses; | |
684 | ||
0b813658 BG |
685 | if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) { |
686 | dev_err(&client->dev, | |
687 | "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); | |
688 | return -EINVAL; | |
689 | } | |
690 | ||
818d0220 BG |
691 | if (chip.flags & AT24_FLAG_SERIAL) { |
692 | at24->read_func = at24_eeprom_read_serial; | |
0b813658 BG |
693 | } else if (chip.flags & AT24_FLAG_MAC) { |
694 | at24->read_func = at24_eeprom_read_mac; | |
818d0220 BG |
695 | } else { |
696 | at24->read_func = at24->use_smbus ? at24_eeprom_read_smbus | |
697 | : at24_eeprom_read_i2c; | |
698 | } | |
699 | ||
cd0c8615 BG |
700 | if (at24->use_smbus) { |
701 | if (at24->use_smbus_write == I2C_SMBUS_I2C_BLOCK_DATA) | |
702 | at24->write_func = at24_eeprom_write_smbus_block; | |
703 | else | |
704 | at24->write_func = at24_eeprom_write_smbus_byte; | |
705 | } else { | |
706 | at24->write_func = at24_eeprom_write_i2c; | |
707 | } | |
318aa9c6 | 708 | |
2b7a5056 WS |
709 | writable = !(chip.flags & AT24_FLAG_READONLY); |
710 | if (writable) { | |
a839ce66 | 711 | if (!use_smbus || use_smbus_write) { |
2b7a5056 WS |
712 | |
713 | unsigned write_max = chip.page_size; | |
714 | ||
2b7a5056 WS |
715 | if (write_max > io_limit) |
716 | write_max = io_limit; | |
717 | if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) | |
718 | write_max = I2C_SMBUS_BLOCK_MAX; | |
719 | at24->write_max = write_max; | |
720 | ||
721 | /* buffer (data + address at the beginning) */ | |
f0ac2363 NB |
722 | at24->writebuf = devm_kzalloc(&client->dev, |
723 | write_max + 2, GFP_KERNEL); | |
724 | if (!at24->writebuf) | |
725 | return -ENOMEM; | |
2b7a5056 WS |
726 | } else { |
727 | dev_warn(&client->dev, | |
728 | "cannot write due to controller restrictions."); | |
729 | } | |
730 | } | |
731 | ||
732 | at24->client[0] = client; | |
733 | ||
734 | /* use dummy devices for multiple-address chips */ | |
735 | for (i = 1; i < num_addresses; i++) { | |
736 | at24->client[i] = i2c_new_dummy(client->adapter, | |
737 | client->addr + i); | |
738 | if (!at24->client[i]) { | |
739 | dev_err(&client->dev, "address 0x%02x unavailable\n", | |
740 | client->addr + i); | |
741 | err = -EADDRINUSE; | |
742 | goto err_clients; | |
743 | } | |
744 | } | |
745 | ||
57d15550 AL |
746 | at24->nvmem_config.name = dev_name(&client->dev); |
747 | at24->nvmem_config.dev = &client->dev; | |
748 | at24->nvmem_config.read_only = !writable; | |
749 | at24->nvmem_config.root_only = true; | |
750 | at24->nvmem_config.owner = THIS_MODULE; | |
751 | at24->nvmem_config.compat = true; | |
752 | at24->nvmem_config.base_dev = &client->dev; | |
cf0361a2 SK |
753 | at24->nvmem_config.reg_read = at24_read; |
754 | at24->nvmem_config.reg_write = at24_write; | |
755 | at24->nvmem_config.priv = at24; | |
756 | at24->nvmem_config.stride = 4; | |
757 | at24->nvmem_config.word_size = 1; | |
758 | at24->nvmem_config.size = chip.byte_len; | |
57d15550 AL |
759 | |
760 | at24->nvmem = nvmem_register(&at24->nvmem_config); | |
761 | ||
762 | if (IS_ERR(at24->nvmem)) { | |
763 | err = PTR_ERR(at24->nvmem); | |
764 | goto err_clients; | |
765 | } | |
2b7a5056 WS |
766 | |
767 | i2c_set_clientdata(client, at24); | |
768 | ||
57d15550 AL |
769 | dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n", |
770 | chip.byte_len, client->name, | |
9ed030d7 | 771 | writable ? "writable" : "read-only", at24->write_max); |
7aeb9664 JD |
772 | if (use_smbus == I2C_SMBUS_WORD_DATA || |
773 | use_smbus == I2C_SMBUS_BYTE_DATA) { | |
774 | dev_notice(&client->dev, "Falling back to %s reads, " | |
775 | "performance will suffer\n", use_smbus == | |
776 | I2C_SMBUS_WORD_DATA ? "word" : "byte"); | |
777 | } | |
2b7a5056 | 778 | |
7274ec8b KH |
779 | /* export data to kernel code */ |
780 | if (chip.setup) | |
bec3c11b | 781 | chip.setup(at24->nvmem, chip.context); |
7274ec8b | 782 | |
2b7a5056 WS |
783 | return 0; |
784 | ||
785 | err_clients: | |
786 | for (i = 1; i < num_addresses; i++) | |
787 | if (at24->client[i]) | |
788 | i2c_unregister_device(at24->client[i]); | |
789 | ||
2b7a5056 WS |
790 | return err; |
791 | } | |
792 | ||
486a5c28 | 793 | static int at24_remove(struct i2c_client *client) |
2b7a5056 WS |
794 | { |
795 | struct at24_data *at24; | |
796 | int i; | |
797 | ||
798 | at24 = i2c_get_clientdata(client); | |
57d15550 AL |
799 | |
800 | nvmem_unregister(at24->nvmem); | |
2b7a5056 WS |
801 | |
802 | for (i = 1; i < at24->num_addresses; i++) | |
803 | i2c_unregister_device(at24->client[i]); | |
804 | ||
2b7a5056 WS |
805 | return 0; |
806 | } | |
807 | ||
808 | /*-------------------------------------------------------------------------*/ | |
809 | ||
810 | static struct i2c_driver at24_driver = { | |
811 | .driver = { | |
812 | .name = "at24", | |
40d8edc9 | 813 | .acpi_match_table = ACPI_PTR(at24_acpi_ids), |
2b7a5056 WS |
814 | }, |
815 | .probe = at24_probe, | |
2d6bed9c | 816 | .remove = at24_remove, |
2b7a5056 WS |
817 | .id_table = at24_ids, |
818 | }; | |
819 | ||
820 | static int __init at24_init(void) | |
821 | { | |
45efe847 WS |
822 | if (!io_limit) { |
823 | pr_err("at24: io_limit must not be 0!\n"); | |
824 | return -EINVAL; | |
825 | } | |
826 | ||
2b7a5056 WS |
827 | io_limit = rounddown_pow_of_two(io_limit); |
828 | return i2c_add_driver(&at24_driver); | |
829 | } | |
830 | module_init(at24_init); | |
831 | ||
832 | static void __exit at24_exit(void) | |
833 | { | |
834 | i2c_del_driver(&at24_driver); | |
835 | } | |
836 | module_exit(at24_exit); | |
837 | ||
838 | MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); | |
839 | MODULE_AUTHOR("David Brownell and Wolfram Sang"); | |
840 | MODULE_LICENSE("GPL"); |