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2b7a5056 WS |
1 | /* |
2 | * at24.c - handle most I2C EEPROMs | |
3 | * | |
4 | * Copyright (C) 2005-2007 David Brownell | |
5 | * Copyright (C) 2008 Wolfram Sang, Pengutronix | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/mutex.h> | |
18 | #include <linux/sysfs.h> | |
19 | #include <linux/mod_devicetable.h> | |
20 | #include <linux/log2.h> | |
21 | #include <linux/bitops.h> | |
22 | #include <linux/jiffies.h> | |
9ed030d7 | 23 | #include <linux/of.h> |
40d8edc9 | 24 | #include <linux/acpi.h> |
2b7a5056 | 25 | #include <linux/i2c.h> |
25f73ed5 | 26 | #include <linux/platform_data/at24.h> |
2b7a5056 WS |
27 | |
28 | /* | |
29 | * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. | |
30 | * Differences between different vendor product lines (like Atmel AT24C or | |
31 | * MicroChip 24LC, etc) won't much matter for typical read/write access. | |
32 | * There are also I2C RAM chips, likewise interchangeable. One example | |
33 | * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). | |
34 | * | |
35 | * However, misconfiguration can lose data. "Set 16-bit memory address" | |
36 | * to a part with 8-bit addressing will overwrite data. Writing with too | |
37 | * big a page size also loses data. And it's not safe to assume that the | |
38 | * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC | |
39 | * uses 0x51, for just one example. | |
40 | * | |
41 | * Accordingly, explicit board-specific configuration data should be used | |
42 | * in almost all cases. (One partial exception is an SMBus used to access | |
43 | * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) | |
44 | * | |
45 | * So this driver uses "new style" I2C driver binding, expecting to be | |
46 | * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or | |
47 | * similar kernel-resident tables; or, configuration data coming from | |
48 | * a bootloader. | |
49 | * | |
50 | * Other than binding model, current differences from "eeprom" driver are | |
51 | * that this one handles write access and isn't restricted to 24c02 devices. | |
52 | * It also handles larger devices (32 kbit and up) with two-byte addresses, | |
53 | * which won't work on pure SMBus systems. | |
54 | */ | |
55 | ||
56 | struct at24_data { | |
57 | struct at24_platform_data chip; | |
7274ec8b | 58 | struct memory_accessor macc; |
7aeb9664 | 59 | int use_smbus; |
a839ce66 | 60 | int use_smbus_write; |
2b7a5056 WS |
61 | |
62 | /* | |
63 | * Lock protects against activities from other Linux tasks, | |
64 | * but not from changes by other I2C masters. | |
65 | */ | |
66 | struct mutex lock; | |
67 | struct bin_attribute bin; | |
68 | ||
69 | u8 *writebuf; | |
70 | unsigned write_max; | |
71 | unsigned num_addresses; | |
72 | ||
73 | /* | |
74 | * Some chips tie up multiple I2C addresses; dummy devices reserve | |
75 | * them for us, and we'll use them with SMBus calls. | |
76 | */ | |
77 | struct i2c_client *client[]; | |
78 | }; | |
79 | ||
80 | /* | |
81 | * This parameter is to help this driver avoid blocking other drivers out | |
82 | * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C | |
83 | * clock, one 256 byte read takes about 1/43 second which is excessive; | |
84 | * but the 1/170 second it takes at 400 kHz may be quite reasonable; and | |
85 | * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. | |
86 | * | |
87 | * This value is forced to be a power of two so that writes align on pages. | |
88 | */ | |
89 | static unsigned io_limit = 128; | |
90 | module_param(io_limit, uint, 0); | |
91 | MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); | |
92 | ||
93 | /* | |
94 | * Specs often allow 5 msec for a page write, sometimes 20 msec; | |
95 | * it's important to recover from write timeouts. | |
96 | */ | |
97 | static unsigned write_timeout = 25; | |
98 | module_param(write_timeout, uint, 0); | |
99 | MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); | |
100 | ||
101 | #define AT24_SIZE_BYTELEN 5 | |
102 | #define AT24_SIZE_FLAGS 8 | |
103 | ||
104 | #define AT24_BITMASK(x) (BIT(x) - 1) | |
105 | ||
106 | /* create non-zero magic value for given eeprom parameters */ | |
107 | #define AT24_DEVICE_MAGIC(_len, _flags) \ | |
108 | ((1 << AT24_SIZE_FLAGS | (_flags)) \ | |
109 | << AT24_SIZE_BYTELEN | ilog2(_len)) | |
110 | ||
111 | static const struct i2c_device_id at24_ids[] = { | |
112 | /* needs 8 addresses as A0-A2 are ignored */ | |
113 | { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) }, | |
114 | /* old variants can't be handled with this generic entry! */ | |
115 | { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) }, | |
116 | { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) }, | |
117 | /* spd is a 24c02 in memory DIMMs */ | |
118 | { "spd", AT24_DEVICE_MAGIC(2048 / 8, | |
119 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO) }, | |
120 | { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) }, | |
121 | /* 24rf08 quirk is handled at i2c-core */ | |
122 | { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) }, | |
123 | { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) }, | |
124 | { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) }, | |
125 | { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) }, | |
126 | { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) }, | |
127 | { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) }, | |
128 | { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) }, | |
129 | { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) }, | |
130 | { "at24", 0 }, | |
131 | { /* END OF LIST */ } | |
132 | }; | |
133 | MODULE_DEVICE_TABLE(i2c, at24_ids); | |
134 | ||
40d8edc9 AS |
135 | static const struct acpi_device_id at24_acpi_ids[] = { |
136 | { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) }, | |
137 | { } | |
138 | }; | |
139 | MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); | |
140 | ||
2b7a5056 WS |
141 | /*-------------------------------------------------------------------------*/ |
142 | ||
143 | /* | |
144 | * This routine supports chips which consume multiple I2C addresses. It | |
145 | * computes the addressing information to be used for a given r/w request. | |
146 | * Assumes that sanity checks for offset happened at sysfs-layer. | |
147 | */ | |
148 | static struct i2c_client *at24_translate_offset(struct at24_data *at24, | |
149 | unsigned *offset) | |
150 | { | |
151 | unsigned i; | |
152 | ||
153 | if (at24->chip.flags & AT24_FLAG_ADDR16) { | |
154 | i = *offset >> 16; | |
155 | *offset &= 0xffff; | |
156 | } else { | |
157 | i = *offset >> 8; | |
158 | *offset &= 0xff; | |
159 | } | |
160 | ||
161 | return at24->client[i]; | |
162 | } | |
163 | ||
164 | static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf, | |
165 | unsigned offset, size_t count) | |
166 | { | |
167 | struct i2c_msg msg[2]; | |
168 | u8 msgbuf[2]; | |
169 | struct i2c_client *client; | |
4d29196c | 170 | unsigned long timeout, read_time; |
2b7a5056 WS |
171 | int status, i; |
172 | ||
173 | memset(msg, 0, sizeof(msg)); | |
174 | ||
175 | /* | |
176 | * REVISIT some multi-address chips don't rollover page reads to | |
177 | * the next slave address, so we may need to truncate the count. | |
178 | * Those chips might need another quirk flag. | |
179 | * | |
180 | * If the real hardware used four adjacent 24c02 chips and that | |
181 | * were misconfigured as one 24c08, that would be a similar effect: | |
182 | * one "eeprom" file not four, but larger reads would fail when | |
183 | * they crossed certain pages. | |
184 | */ | |
185 | ||
186 | /* | |
187 | * Slave address and byte offset derive from the offset. Always | |
188 | * set the byte address; on a multi-master board, another master | |
189 | * may have changed the chip's "current" address pointer. | |
190 | */ | |
191 | client = at24_translate_offset(at24, &offset); | |
192 | ||
193 | if (count > io_limit) | |
194 | count = io_limit; | |
195 | ||
2cd9fbd0 | 196 | if (at24->use_smbus) { |
4d29196c | 197 | /* Smaller eeproms can work given some SMBus extension calls */ |
2b7a5056 WS |
198 | if (count > I2C_SMBUS_BLOCK_MAX) |
199 | count = I2C_SMBUS_BLOCK_MAX; | |
2cd9fbd0 | 200 | } else { |
4d29196c WS |
201 | /* |
202 | * When we have a better choice than SMBus calls, use a | |
203 | * combined I2C message. Write address; then read up to | |
204 | * io_limit data bytes. Note that read page rollover helps us | |
205 | * here (unlike writes). msgbuf is u8 and will cast to our | |
206 | * needs. | |
207 | */ | |
208 | i = 0; | |
209 | if (at24->chip.flags & AT24_FLAG_ADDR16) | |
210 | msgbuf[i++] = offset >> 8; | |
211 | msgbuf[i++] = offset; | |
212 | ||
213 | msg[0].addr = client->addr; | |
214 | msg[0].buf = msgbuf; | |
215 | msg[0].len = i; | |
216 | ||
217 | msg[1].addr = client->addr; | |
218 | msg[1].flags = I2C_M_RD; | |
219 | msg[1].buf = buf; | |
220 | msg[1].len = count; | |
2b7a5056 WS |
221 | } |
222 | ||
223 | /* | |
4d29196c WS |
224 | * Reads fail if the previous write didn't complete yet. We may |
225 | * loop a few times until this one succeeds, waiting at least | |
226 | * long enough for one entire page write to work. | |
2b7a5056 | 227 | */ |
4d29196c WS |
228 | timeout = jiffies + msecs_to_jiffies(write_timeout); |
229 | do { | |
230 | read_time = jiffies; | |
2cd9fbd0 IT |
231 | if (at24->use_smbus) { |
232 | status = i2c_smbus_read_i2c_block_data_or_emulated(client, offset, | |
233 | count, buf); | |
234 | } else { | |
4d29196c WS |
235 | status = i2c_transfer(client->adapter, msg, 2); |
236 | if (status == 2) | |
237 | status = count; | |
238 | } | |
239 | dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", | |
240 | count, offset, status, jiffies); | |
2b7a5056 | 241 | |
4d29196c WS |
242 | if (status == count) |
243 | return count; | |
2b7a5056 | 244 | |
4d29196c WS |
245 | /* REVISIT: at HZ=100, this is sloooow */ |
246 | msleep(1); | |
247 | } while (time_before(read_time, timeout)); | |
2b7a5056 | 248 | |
4d29196c | 249 | return -ETIMEDOUT; |
2b7a5056 WS |
250 | } |
251 | ||
7274ec8b | 252 | static ssize_t at24_read(struct at24_data *at24, |
2b7a5056 WS |
253 | char *buf, loff_t off, size_t count) |
254 | { | |
2b7a5056 WS |
255 | ssize_t retval = 0; |
256 | ||
2b7a5056 WS |
257 | if (unlikely(!count)) |
258 | return count; | |
259 | ||
260 | /* | |
261 | * Read data from chip, protecting against concurrent updates | |
262 | * from this host, but not from other I2C masters. | |
263 | */ | |
264 | mutex_lock(&at24->lock); | |
265 | ||
266 | while (count) { | |
267 | ssize_t status; | |
268 | ||
269 | status = at24_eeprom_read(at24, buf, off, count); | |
270 | if (status <= 0) { | |
271 | if (retval == 0) | |
272 | retval = status; | |
273 | break; | |
274 | } | |
275 | buf += status; | |
276 | off += status; | |
277 | count -= status; | |
278 | retval += status; | |
279 | } | |
280 | ||
281 | mutex_unlock(&at24->lock); | |
282 | ||
283 | return retval; | |
284 | } | |
285 | ||
2c3c8bea CW |
286 | static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj, |
287 | struct bin_attribute *attr, | |
7274ec8b KH |
288 | char *buf, loff_t off, size_t count) |
289 | { | |
290 | struct at24_data *at24; | |
2b7a5056 | 291 | |
7274ec8b KH |
292 | at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); |
293 | return at24_read(at24, buf, off, count); | |
294 | } | |
2b7a5056 WS |
295 | |
296 | ||
297 | /* | |
298 | * Note that if the hardware write-protect pin is pulled high, the whole | |
299 | * chip is normally write protected. But there are plenty of product | |
300 | * variants here, including OTP fuses and partial chip protect. | |
301 | * | |
302 | * We only use page mode writes; the alternative is sloooow. This routine | |
303 | * writes at most one page. | |
304 | */ | |
280ca299 | 305 | static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf, |
2b7a5056 WS |
306 | unsigned offset, size_t count) |
307 | { | |
308 | struct i2c_client *client; | |
309 | struct i2c_msg msg; | |
a839ce66 | 310 | ssize_t status = 0; |
2b7a5056 WS |
311 | unsigned long timeout, write_time; |
312 | unsigned next_page; | |
313 | ||
314 | /* Get corresponding I2C address and adjust offset */ | |
315 | client = at24_translate_offset(at24, &offset); | |
316 | ||
317 | /* write_max is at most a page */ | |
318 | if (count > at24->write_max) | |
319 | count = at24->write_max; | |
320 | ||
321 | /* Never roll over backwards, to the start of this page */ | |
322 | next_page = roundup(offset + 1, at24->chip.page_size); | |
323 | if (offset + count > next_page) | |
324 | count = next_page - offset; | |
325 | ||
326 | /* If we'll use I2C calls for I/O, set up the message */ | |
327 | if (!at24->use_smbus) { | |
328 | int i = 0; | |
329 | ||
330 | msg.addr = client->addr; | |
331 | msg.flags = 0; | |
332 | ||
333 | /* msg.buf is u8 and casts will mask the values */ | |
334 | msg.buf = at24->writebuf; | |
335 | if (at24->chip.flags & AT24_FLAG_ADDR16) | |
336 | msg.buf[i++] = offset >> 8; | |
337 | ||
338 | msg.buf[i++] = offset; | |
339 | memcpy(&msg.buf[i], buf, count); | |
340 | msg.len = i + count; | |
341 | } | |
342 | ||
343 | /* | |
344 | * Writes fail if the previous one didn't complete yet. We may | |
345 | * loop a few times until this one succeeds, waiting at least | |
346 | * long enough for one entire page write to work. | |
347 | */ | |
348 | timeout = jiffies + msecs_to_jiffies(write_timeout); | |
349 | do { | |
350 | write_time = jiffies; | |
a839ce66 CG |
351 | if (at24->use_smbus_write) { |
352 | switch (at24->use_smbus_write) { | |
353 | case I2C_SMBUS_I2C_BLOCK_DATA: | |
354 | status = i2c_smbus_write_i2c_block_data(client, | |
355 | offset, count, buf); | |
356 | break; | |
357 | case I2C_SMBUS_BYTE_DATA: | |
358 | status = i2c_smbus_write_byte_data(client, | |
359 | offset, buf[0]); | |
360 | break; | |
361 | } | |
362 | ||
2b7a5056 WS |
363 | if (status == 0) |
364 | status = count; | |
365 | } else { | |
366 | status = i2c_transfer(client->adapter, &msg, 1); | |
367 | if (status == 1) | |
368 | status = count; | |
369 | } | |
2ce5b34f | 370 | dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", |
2b7a5056 WS |
371 | count, offset, status, jiffies); |
372 | ||
373 | if (status == count) | |
374 | return count; | |
375 | ||
376 | /* REVISIT: at HZ=100, this is sloooow */ | |
377 | msleep(1); | |
378 | } while (time_before(write_time, timeout)); | |
379 | ||
380 | return -ETIMEDOUT; | |
381 | } | |
382 | ||
280ca299 GU |
383 | static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off, |
384 | size_t count) | |
2b7a5056 | 385 | { |
2b7a5056 WS |
386 | ssize_t retval = 0; |
387 | ||
2b7a5056 WS |
388 | if (unlikely(!count)) |
389 | return count; | |
390 | ||
391 | /* | |
392 | * Write data to chip, protecting against concurrent updates | |
393 | * from this host, but not from other I2C masters. | |
394 | */ | |
395 | mutex_lock(&at24->lock); | |
396 | ||
397 | while (count) { | |
398 | ssize_t status; | |
399 | ||
400 | status = at24_eeprom_write(at24, buf, off, count); | |
401 | if (status <= 0) { | |
402 | if (retval == 0) | |
403 | retval = status; | |
404 | break; | |
405 | } | |
406 | buf += status; | |
407 | off += status; | |
408 | count -= status; | |
409 | retval += status; | |
410 | } | |
411 | ||
412 | mutex_unlock(&at24->lock); | |
413 | ||
414 | return retval; | |
415 | } | |
416 | ||
2c3c8bea CW |
417 | static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj, |
418 | struct bin_attribute *attr, | |
7274ec8b KH |
419 | char *buf, loff_t off, size_t count) |
420 | { | |
421 | struct at24_data *at24; | |
422 | ||
423 | at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); | |
424 | return at24_write(at24, buf, off, count); | |
425 | } | |
426 | ||
427 | /*-------------------------------------------------------------------------*/ | |
428 | ||
429 | /* | |
430 | * This lets other kernel code access the eeprom data. For example, it | |
431 | * might hold a board's Ethernet address, or board-specific calibration | |
432 | * data generated on the manufacturing floor. | |
433 | */ | |
434 | ||
435 | static ssize_t at24_macc_read(struct memory_accessor *macc, char *buf, | |
436 | off_t offset, size_t count) | |
437 | { | |
438 | struct at24_data *at24 = container_of(macc, struct at24_data, macc); | |
439 | ||
440 | return at24_read(at24, buf, offset, count); | |
441 | } | |
442 | ||
280ca299 | 443 | static ssize_t at24_macc_write(struct memory_accessor *macc, const char *buf, |
7274ec8b KH |
444 | off_t offset, size_t count) |
445 | { | |
446 | struct at24_data *at24 = container_of(macc, struct at24_data, macc); | |
447 | ||
448 | return at24_write(at24, buf, offset, count); | |
449 | } | |
450 | ||
2b7a5056 WS |
451 | /*-------------------------------------------------------------------------*/ |
452 | ||
9ed030d7 WS |
453 | #ifdef CONFIG_OF |
454 | static void at24_get_ofdata(struct i2c_client *client, | |
455 | struct at24_platform_data *chip) | |
456 | { | |
457 | const __be32 *val; | |
458 | struct device_node *node = client->dev.of_node; | |
459 | ||
460 | if (node) { | |
461 | if (of_get_property(node, "read-only", NULL)) | |
462 | chip->flags |= AT24_FLAG_READONLY; | |
463 | val = of_get_property(node, "pagesize", NULL); | |
464 | if (val) | |
465 | chip->page_size = be32_to_cpup(val); | |
466 | } | |
467 | } | |
468 | #else | |
469 | static void at24_get_ofdata(struct i2c_client *client, | |
470 | struct at24_platform_data *chip) | |
471 | { } | |
472 | #endif /* CONFIG_OF */ | |
473 | ||
2b7a5056 WS |
474 | static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) |
475 | { | |
476 | struct at24_platform_data chip; | |
40d8edc9 | 477 | kernel_ulong_t magic = 0; |
2b7a5056 | 478 | bool writable; |
7aeb9664 | 479 | int use_smbus = 0; |
a839ce66 | 480 | int use_smbus_write = 0; |
2b7a5056 WS |
481 | struct at24_data *at24; |
482 | int err; | |
483 | unsigned i, num_addresses; | |
2b7a5056 WS |
484 | |
485 | if (client->dev.platform_data) { | |
486 | chip = *(struct at24_platform_data *)client->dev.platform_data; | |
487 | } else { | |
40d8edc9 AS |
488 | if (id) { |
489 | magic = id->driver_data; | |
490 | } else { | |
491 | const struct acpi_device_id *aid; | |
492 | ||
493 | aid = acpi_match_device(at24_acpi_ids, &client->dev); | |
494 | if (aid) | |
495 | magic = aid->driver_data; | |
496 | } | |
497 | if (!magic) | |
f0ac2363 NB |
498 | return -ENODEV; |
499 | ||
2b7a5056 WS |
500 | chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); |
501 | magic >>= AT24_SIZE_BYTELEN; | |
502 | chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); | |
503 | /* | |
504 | * This is slow, but we can't know all eeproms, so we better | |
505 | * play safe. Specifying custom eeprom-types via platform_data | |
506 | * is recommended anyhow. | |
507 | */ | |
508 | chip.page_size = 1; | |
7274ec8b | 509 | |
9ed030d7 WS |
510 | /* update chipdata if OF is present */ |
511 | at24_get_ofdata(client, &chip); | |
512 | ||
7274ec8b KH |
513 | chip.setup = NULL; |
514 | chip.context = NULL; | |
2b7a5056 WS |
515 | } |
516 | ||
517 | if (!is_power_of_2(chip.byte_len)) | |
518 | dev_warn(&client->dev, | |
519 | "byte_len looks suspicious (no power of 2)!\n"); | |
45efe847 WS |
520 | if (!chip.page_size) { |
521 | dev_err(&client->dev, "page_size must not be 0!\n"); | |
f0ac2363 | 522 | return -EINVAL; |
45efe847 | 523 | } |
2b7a5056 WS |
524 | if (!is_power_of_2(chip.page_size)) |
525 | dev_warn(&client->dev, | |
526 | "page_size looks suspicious (no power of 2)!\n"); | |
527 | ||
528 | /* Use I2C operations unless we're stuck with SMBus extensions. */ | |
529 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { | |
f0ac2363 NB |
530 | if (chip.flags & AT24_FLAG_ADDR16) |
531 | return -EPFNOSUPPORT; | |
532 | ||
7aeb9664 | 533 | if (i2c_check_functionality(client->adapter, |
2b7a5056 | 534 | I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { |
7aeb9664 JD |
535 | use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; |
536 | } else if (i2c_check_functionality(client->adapter, | |
537 | I2C_FUNC_SMBUS_READ_WORD_DATA)) { | |
538 | use_smbus = I2C_SMBUS_WORD_DATA; | |
539 | } else if (i2c_check_functionality(client->adapter, | |
540 | I2C_FUNC_SMBUS_READ_BYTE_DATA)) { | |
541 | use_smbus = I2C_SMBUS_BYTE_DATA; | |
542 | } else { | |
f0ac2363 | 543 | return -EPFNOSUPPORT; |
2b7a5056 | 544 | } |
2b7a5056 WS |
545 | } |
546 | ||
a839ce66 CG |
547 | /* Use I2C operations unless we're stuck with SMBus extensions. */ |
548 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { | |
549 | if (i2c_check_functionality(client->adapter, | |
550 | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { | |
551 | use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA; | |
552 | } else if (i2c_check_functionality(client->adapter, | |
553 | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { | |
554 | use_smbus_write = I2C_SMBUS_BYTE_DATA; | |
555 | chip.page_size = 1; | |
556 | } | |
557 | } | |
558 | ||
2b7a5056 WS |
559 | if (chip.flags & AT24_FLAG_TAKE8ADDR) |
560 | num_addresses = 8; | |
561 | else | |
562 | num_addresses = DIV_ROUND_UP(chip.byte_len, | |
563 | (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); | |
564 | ||
f0ac2363 | 565 | at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) + |
2b7a5056 | 566 | num_addresses * sizeof(struct i2c_client *), GFP_KERNEL); |
f0ac2363 NB |
567 | if (!at24) |
568 | return -ENOMEM; | |
2b7a5056 WS |
569 | |
570 | mutex_init(&at24->lock); | |
571 | at24->use_smbus = use_smbus; | |
a839ce66 | 572 | at24->use_smbus_write = use_smbus_write; |
2b7a5056 WS |
573 | at24->chip = chip; |
574 | at24->num_addresses = num_addresses; | |
575 | ||
576 | /* | |
577 | * Export the EEPROM bytes through sysfs, since that's convenient. | |
578 | * By default, only root should see the data (maybe passwords etc) | |
579 | */ | |
d07b56b3 | 580 | sysfs_bin_attr_init(&at24->bin); |
2b7a5056 WS |
581 | at24->bin.attr.name = "eeprom"; |
582 | at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR; | |
2b7a5056 WS |
583 | at24->bin.read = at24_bin_read; |
584 | at24->bin.size = chip.byte_len; | |
585 | ||
7274ec8b KH |
586 | at24->macc.read = at24_macc_read; |
587 | ||
2b7a5056 WS |
588 | writable = !(chip.flags & AT24_FLAG_READONLY); |
589 | if (writable) { | |
a839ce66 | 590 | if (!use_smbus || use_smbus_write) { |
2b7a5056 WS |
591 | |
592 | unsigned write_max = chip.page_size; | |
593 | ||
7274ec8b KH |
594 | at24->macc.write = at24_macc_write; |
595 | ||
2b7a5056 WS |
596 | at24->bin.write = at24_bin_write; |
597 | at24->bin.attr.mode |= S_IWUSR; | |
598 | ||
599 | if (write_max > io_limit) | |
600 | write_max = io_limit; | |
601 | if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) | |
602 | write_max = I2C_SMBUS_BLOCK_MAX; | |
603 | at24->write_max = write_max; | |
604 | ||
605 | /* buffer (data + address at the beginning) */ | |
f0ac2363 NB |
606 | at24->writebuf = devm_kzalloc(&client->dev, |
607 | write_max + 2, GFP_KERNEL); | |
608 | if (!at24->writebuf) | |
609 | return -ENOMEM; | |
2b7a5056 WS |
610 | } else { |
611 | dev_warn(&client->dev, | |
612 | "cannot write due to controller restrictions."); | |
613 | } | |
614 | } | |
615 | ||
616 | at24->client[0] = client; | |
617 | ||
618 | /* use dummy devices for multiple-address chips */ | |
619 | for (i = 1; i < num_addresses; i++) { | |
620 | at24->client[i] = i2c_new_dummy(client->adapter, | |
621 | client->addr + i); | |
622 | if (!at24->client[i]) { | |
623 | dev_err(&client->dev, "address 0x%02x unavailable\n", | |
624 | client->addr + i); | |
625 | err = -EADDRINUSE; | |
626 | goto err_clients; | |
627 | } | |
628 | } | |
629 | ||
630 | err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin); | |
631 | if (err) | |
632 | goto err_clients; | |
633 | ||
634 | i2c_set_clientdata(client, at24); | |
635 | ||
9ed030d7 | 636 | dev_info(&client->dev, "%zu byte %s EEPROM, %s, %u bytes/write\n", |
2b7a5056 | 637 | at24->bin.size, client->name, |
9ed030d7 | 638 | writable ? "writable" : "read-only", at24->write_max); |
7aeb9664 JD |
639 | if (use_smbus == I2C_SMBUS_WORD_DATA || |
640 | use_smbus == I2C_SMBUS_BYTE_DATA) { | |
641 | dev_notice(&client->dev, "Falling back to %s reads, " | |
642 | "performance will suffer\n", use_smbus == | |
643 | I2C_SMBUS_WORD_DATA ? "word" : "byte"); | |
644 | } | |
2b7a5056 | 645 | |
7274ec8b KH |
646 | /* export data to kernel code */ |
647 | if (chip.setup) | |
648 | chip.setup(&at24->macc, chip.context); | |
649 | ||
2b7a5056 WS |
650 | return 0; |
651 | ||
652 | err_clients: | |
653 | for (i = 1; i < num_addresses; i++) | |
654 | if (at24->client[i]) | |
655 | i2c_unregister_device(at24->client[i]); | |
656 | ||
2b7a5056 WS |
657 | return err; |
658 | } | |
659 | ||
486a5c28 | 660 | static int at24_remove(struct i2c_client *client) |
2b7a5056 WS |
661 | { |
662 | struct at24_data *at24; | |
663 | int i; | |
664 | ||
665 | at24 = i2c_get_clientdata(client); | |
666 | sysfs_remove_bin_file(&client->dev.kobj, &at24->bin); | |
667 | ||
668 | for (i = 1; i < at24->num_addresses; i++) | |
669 | i2c_unregister_device(at24->client[i]); | |
670 | ||
2b7a5056 WS |
671 | return 0; |
672 | } | |
673 | ||
674 | /*-------------------------------------------------------------------------*/ | |
675 | ||
676 | static struct i2c_driver at24_driver = { | |
677 | .driver = { | |
678 | .name = "at24", | |
40d8edc9 | 679 | .acpi_match_table = ACPI_PTR(at24_acpi_ids), |
2b7a5056 WS |
680 | }, |
681 | .probe = at24_probe, | |
2d6bed9c | 682 | .remove = at24_remove, |
2b7a5056 WS |
683 | .id_table = at24_ids, |
684 | }; | |
685 | ||
686 | static int __init at24_init(void) | |
687 | { | |
45efe847 WS |
688 | if (!io_limit) { |
689 | pr_err("at24: io_limit must not be 0!\n"); | |
690 | return -EINVAL; | |
691 | } | |
692 | ||
2b7a5056 WS |
693 | io_limit = rounddown_pow_of_two(io_limit); |
694 | return i2c_add_driver(&at24_driver); | |
695 | } | |
696 | module_init(at24_init); | |
697 | ||
698 | static void __exit at24_exit(void) | |
699 | { | |
700 | i2c_del_driver(&at24_driver); | |
701 | } | |
702 | module_exit(at24_exit); | |
703 | ||
704 | MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); | |
705 | MODULE_AUTHOR("David Brownell and Wolfram Sang"); | |
706 | MODULE_LICENSE("GPL"); |