[deliverable/linux.git] / drivers / misc / ioc4.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2005-2006 Silicon Graphics, Inc.  All Rights Reserved.
 */

/* This file contains the master driver module for use by SGI IOC4 subdrivers.
 *
 * It allocates any resources shared between multiple subdevices, and
 * provides accessor functions (where needed) and the like for those
 * resources.  It also provides a mechanism for the subdevice modules
 * to support loading and unloading.
 *
 * Non-shared resources (e.g. external interrupt A_INT_OUT register page
 * alias, serial port and UART registers) are handled by the subdevice
 * modules themselves.
 *
 * This is all necessary because IOC4 is not implemented as a multi-function
 * PCI device, but an amalgamation of disparate registers for several
 * types of device (ATA, serial, external interrupts).  The normal
 * resource management in the kernel doesn't have quite the right interfaces
 * to handle this situation (e.g. multiple modules can't claim the same
 * PCI ID), thus this IOC4 master module.
 */

#include <linux/errno.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/ioc4.h>
#include <linux/ktime.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/time.h>
#include <asm/io.h>

/***************
 * Definitions *
 ***************/

/* Tweakable values */

/* PCI bus speed detection/calibration */
#define IOC4_CALIBRATE_COUNT 63		/* Calibration cycle period */
#define IOC4_CALIBRATE_CYCLES 256	/* Average over this many cycles */
#define IOC4_CALIBRATE_DISCARD 2	/* Discard first few cycles */
#define IOC4_CALIBRATE_LOW_MHZ 25	/* Lower bound on bus speed sanity */
#define IOC4_CALIBRATE_HIGH_MHZ 75	/* Upper bound on bus speed sanity */
#define IOC4_CALIBRATE_DEFAULT_MHZ 66	/* Assumed if sanity check fails */

/************************
 * Submodule management *
 ************************/

static DEFINE_MUTEX(ioc4_mutex);

static LIST_HEAD(ioc4_devices);
static LIST_HEAD(ioc4_submodules);

/* Register an IOC4 submodule */
int
ioc4_register_submodule(struct ioc4_submodule *is)
{
	struct ioc4_driver_data *idd;

	mutex_lock(&ioc4_mutex);
	list_add(&is->is_list, &ioc4_submodules);

	/* Initialize submodule for each IOC4 */
	if (!is->is_probe)
		goto out;

	list_for_each_entry(idd, &ioc4_devices, idd_list) {
		if (is->is_probe(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule %s probe failed "
			       "for pci_dev %s",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
 out:
	mutex_unlock(&ioc4_mutex);
	return 0;
}

/* Unregister an IOC4 submodule */
void
ioc4_unregister_submodule(struct ioc4_submodule *is)
{
	struct ioc4_driver_data *idd;

	mutex_lock(&ioc4_mutex);
	list_del(&is->is_list);

	/* Remove submodule for each IOC4 */
	if (!is->is_remove)
		goto out;

	list_for_each_entry(idd, &ioc4_devices, idd_list) {
		if (is->is_remove(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule %s remove failed "
			       "for pci_dev %s.\n",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
 out:
	mutex_unlock(&ioc4_mutex);
}

/*********************
 * Device management *
 *********************/

#define IOC4_CALIBRATE_LOW_LIMIT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
#define IOC4_CALIBRATE_HIGH_LIMIT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
#define IOC4_CALIBRATE_DEFAULT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)

#define IOC4_CALIBRATE_END \
	(IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)

#define IOC4_INT_OUT_MODE_TOGGLE 0x7	/* Toggle INT_OUT every COUNT+1 ticks */

/* Determines external interrupt output clock period of the PCI bus an
 * IOC4 is attached to.  This value can be used to determine the PCI
 * bus speed.
 *
 * IOC4 has a design feature that various internal timers are derived from
 * the PCI bus clock.  This causes IOC4 device drivers to need to take the
 * bus speed into account when setting various register values (e.g. INT_OUT
 * register COUNT field, UART divisors, etc).  Since this information is
 * needed by several subdrivers, it is determined by the main IOC4 driver,
 * even though the following code utilizes external interrupt registers
 * to perform the speed calculation.
 */
static void
ioc4_clock_calibrate(struct ioc4_driver_data *idd)
{
	union ioc4_int_out int_out;
	union ioc4_gpcr gpcr;
	unsigned int state, last_state = 1;
	uint64_t start, end, period;
	unsigned int count = 0;

	/* Enable output */
	gpcr.raw = 0;
	gpcr.fields.dir = IOC4_GPCR_DIR_0;
	gpcr.fields.int_out_en = 1;
	writel(gpcr.raw, &idd->idd_misc_regs->gpcr_s.raw);

	/* Reset to power-on state */
	writel(0, &idd->idd_misc_regs->int_out.raw);
	mmiowb();

	/* Set up square wave */
	int_out.raw = 0;
	int_out.fields.count = IOC4_CALIBRATE_COUNT;
	int_out.fields.mode = IOC4_INT_OUT_MODE_TOGGLE;
	int_out.fields.diag = 0;
	writel(int_out.raw, &idd->idd_misc_regs->int_out.raw);
	mmiowb();

	/* Check square wave period averaged over some number of cycles */
	do {
		int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
		state = int_out.fields.int_out;
		if (!last_state && state) {
			count++;
			if (count == IOC4_CALIBRATE_END) {
				end = ktime_get_ns();
				break;
			} else if (count == IOC4_CALIBRATE_DISCARD)
				start = ktime_get_ns();
		}
		last_state = state;
	} while (1);

	/* Calculation rearranged to preserve intermediate precision.
	 * Logically:
	 * 1. "end - start" gives us the measurement period over all
	 *    the square wave cycles.
	 * 2. Divide by number of square wave cycles to get the period
	 *    of a square wave cycle.
	 * 3. Divide by 2*(int_out.fields.count+1), which is the formula
	 *    by which the IOC4 generates the square wave, to get the
	 *    period of an IOC4 INT_OUT count.
	 */
	period = (end - start) /
		(IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1));

	/* Bounds check the result. */
	if (period > IOC4_CALIBRATE_LOW_LIMIT ||
	    period < IOC4_CALIBRATE_HIGH_LIMIT) {
		printk(KERN_INFO
		       "IOC4 %s: Clock calibration failed.  Assuming"
		       "PCI clock is %d ns.\n",
		       pci_name(idd->idd_pdev),
		       IOC4_CALIBRATE_DEFAULT / IOC4_EXTINT_COUNT_DIVISOR);
		period = IOC4_CALIBRATE_DEFAULT;
	} else {
		u64 ns = period;

		do_div(ns, IOC4_EXTINT_COUNT_DIVISOR);
		printk(KERN_DEBUG
		       "IOC4 %s: PCI clock is %llu ns.\n",
		       pci_name(idd->idd_pdev), (unsigned long long)ns);
	}

	/* Remember results.  We store the extint clock period rather
	 * than the PCI clock period so that greater precision is
	 * retained.  Divide by IOC4_EXTINT_COUNT_DIVISOR to get
	 * PCI clock period.
	 */
	idd->count_period = period;
}

/* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
 * Each brings out different combinations of IOC4 signals, thus.
 * the IOC4 subdrivers need to know to which we're attached.
 *
 * We look for the presence of a SCSI (IO9) or SATA (IO10) controller
 * on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
 * If neither is present, it's a PCI-RT.
 */
static unsigned int
ioc4_variant(struct ioc4_driver_data *idd)
{
	struct pci_dev *pdev = NULL;
	int found = 0;

	/* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
	do {
		pdev = pci_get_device(PCI_VENDOR_ID_QLOGIC,
				      PCI_DEVICE_ID_QLOGIC_ISP12160, pdev);
		if (pdev &&
		    idd->idd_pdev->bus->number == pdev->bus->number &&
		    3 == PCI_SLOT(pdev->devfn))
			found = 1;
	} while (pdev && !found);
	if (NULL != pdev) {
		pci_dev_put(pdev);
		return IOC4_VARIANT_IO9;
	}

	/* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
	pdev = NULL;
	do {
		pdev = pci_get_device(PCI_VENDOR_ID_VITESSE,
				      PCI_DEVICE_ID_VITESSE_VSC7174, pdev);
		if (pdev &&
		    idd->idd_pdev->bus->number == pdev->bus->number &&
		    3 == PCI_SLOT(pdev->devfn))
			found = 1;
	} while (pdev && !found);
	if (NULL != pdev) {
		pci_dev_put(pdev);
		return IOC4_VARIANT_IO10;
	}

	/* PCI-RT: No SCSI/SATA controller will be present */
	return IOC4_VARIANT_PCI_RT;
}

static void
ioc4_load_modules(struct work_struct *work)
{
	request_module("sgiioc4");
}

static DECLARE_WORK(ioc4_load_modules_work, ioc4_load_modules);

/* Adds a new instance of an IOC4 card */
static int
ioc4_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
{
	struct ioc4_driver_data *idd;
	struct ioc4_submodule *is;
	uint32_t pcmd;
	int ret;

	/* Enable IOC4 and take ownership of it */
	if ((ret = pci_enable_device(pdev))) {
		printk(KERN_WARNING
		       "%s: Failed to enable IOC4 device for pci_dev %s.\n",
		       __func__, pci_name(pdev));
		goto out;
	}
	pci_set_master(pdev);

	/* Set up per-IOC4 data */
	idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
	if (!idd) {
		printk(KERN_WARNING
		       "%s: Failed to allocate IOC4 data for pci_dev %s.\n",
		       __func__, pci_name(pdev));
		ret = -ENODEV;
		goto out_idd;
	}
	idd->idd_pdev = pdev;
	idd->idd_pci_id = pci_id;

	/* Map IOC4 misc registers.  These are shared between subdevices
	 * so the main IOC4 module manages them.
	 */
	idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
	if (!idd->idd_bar0) {
		printk(KERN_WARNING
		       "%s: Unable to find IOC4 misc resource "
		       "for pci_dev %s.\n",
		       __func__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_pci;
	}
	if (!request_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
			    "ioc4_misc")) {
		printk(KERN_WARNING
		       "%s: Unable to request IOC4 misc region "
		       "for pci_dev %s.\n",
		       __func__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_pci;
	}
	idd->idd_misc_regs = ioremap(idd->idd_bar0,
				     sizeof(struct ioc4_misc_regs));
	if (!idd->idd_misc_regs) {
		printk(KERN_WARNING
		       "%s: Unable to remap IOC4 misc region "
		       "for pci_dev %s.\n",
		       __func__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_misc_region;
	}

	/* Failsafe portion of per-IOC4 initialization */

	/* Detect card variant */
	idd->idd_variant = ioc4_variant(idd);
	printk(KERN_INFO "IOC4 %s: %s card detected.\n", pci_name(pdev),
	       idd->idd_variant == IOC4_VARIANT_IO9 ? "IO9" :
	       idd->idd_variant == IOC4_VARIANT_PCI_RT ? "PCI-RT" :
	       idd->idd_variant == IOC4_VARIANT_IO10 ? "IO10" : "unknown");

	/* Initialize IOC4 */
	pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
	pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
			       pcmd | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);

	/* Determine PCI clock */
	ioc4_clock_calibrate(idd);

	/* Disable/clear all interrupts.  Need to do this here lest
	 * one submodule request the shared IOC4 IRQ, but interrupt
	 * is generated by a different subdevice.
	 */
	/* Disable */
	writel(~0, &idd->idd_misc_regs->other_iec.raw);
	writel(~0, &idd->idd_misc_regs->sio_iec);
	/* Clear (i.e. acknowledge) */
	writel(~0, &idd->idd_misc_regs->other_ir.raw);
	writel(~0, &idd->idd_misc_regs->sio_ir);

	/* Track PCI-device specific data */
	idd->idd_serial_data = NULL;
	pci_set_drvdata(idd->idd_pdev, idd);

	mutex_lock(&ioc4_mutex);
	list_add_tail(&idd->idd_list, &ioc4_devices);

	/* Add this IOC4 to all submodules */
	list_for_each_entry(is, &ioc4_submodules, is_list) {
		if (is->is_probe && is->is_probe(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule 0x%s probe failed "
			       "for pci_dev %s.\n",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
	mutex_unlock(&ioc4_mutex);

	/* Request sgiioc4 IDE driver on boards that bring that functionality
	 * off of IOC4.  The root filesystem may be hosted on a drive connected
	 * to IOC4, so we need to make sure the sgiioc4 driver is loaded as it
	 * won't be picked up by modprobes due to the ioc4 module owning the
	 * PCI device.
	 */
	if (idd->idd_variant != IOC4_VARIANT_PCI_RT) {
		/* Request the module from a work procedure as the modprobe
		 * goes out to a userland helper and that will hang if done
		 * directly from ioc4_probe().
		 */
		printk(KERN_INFO "IOC4 loading sgiioc4 submodule\n");
		schedule_work(&ioc4_load_modules_work);
	}

	return 0;

out_misc_region:
	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
out_pci:
	kfree(idd);
out_idd:
	pci_disable_device(pdev);
out:
	return ret;
}

/* Removes a particular instance of an IOC4 card. */
static void
ioc4_remove(struct pci_dev *pdev)
{
	struct ioc4_submodule *is;
	struct ioc4_driver_data *idd;

	idd = pci_get_drvdata(pdev);

	/* Remove this IOC4 from all submodules */
	mutex_lock(&ioc4_mutex);
	list_for_each_entry(is, &ioc4_submodules, is_list) {
		if (is->is_remove && is->is_remove(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule 0x%s remove failed "
			       "for pci_dev %s.\n",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
	mutex_unlock(&ioc4_mutex);

	/* Release resources */
	iounmap(idd->idd_misc_regs);
	if (!idd->idd_bar0) {
		printk(KERN_WARNING
		       "%s: Unable to get IOC4 misc mapping for pci_dev %s. "
		       "Device removal may be incomplete.\n",
		       __func__, pci_name(idd->idd_pdev));
	}
	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));

	/* Disable IOC4 and relinquish */
	pci_disable_device(pdev);

	/* Remove and free driver data */
	mutex_lock(&ioc4_mutex);
	list_del(&idd->idd_list);
	mutex_unlock(&ioc4_mutex);
	kfree(idd);
}

static struct pci_device_id ioc4_id_table[] = {
	{PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
	 PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
	{0}
};

static struct pci_driver ioc4_driver = {
	.name = "IOC4",
	.id_table = ioc4_id_table,
	.probe = ioc4_probe,
	.remove = ioc4_remove,
};

MODULE_DEVICE_TABLE(pci, ioc4_id_table);

/*********************
 * Module management *
 *********************/

/* Module load */
static int __init
ioc4_init(void)
{
	return pci_register_driver(&ioc4_driver);
}

/* Module unload */
static void __exit
ioc4_exit(void)
{
	/* Ensure ioc4_load_modules() has completed before exiting */
	flush_work(&ioc4_load_modules_work);
	pci_unregister_driver(&ioc4_driver);
}

module_init(ioc4_init);
module_exit(ioc4_exit);

MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(ioc4_register_submodule);
EXPORT_SYMBOL(ioc4_unregister_submodule);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
107d5a72	6	* Copyright (C) 2005-2006 Silicon Graphics, Inc. All Rights Reserved.
1da177e4 LT	7	*/
1da177e4 LT	8
22329b51 BC	9	/* This file contains the master driver module for use by SGI IOC4 subdrivers.
	10	*
	11	* It allocates any resources shared between multiple subdevices, and
	12	* provides accessor functions (where needed) and the like for those
	13	* resources. It also provides a mechanism for the subdevice modules
	14	* to support loading and unloading.
	15	*
	16	* Non-shared resources (e.g. external interrupt A_INT_OUT register page
	17	* alias, serial port and UART registers) are handled by the subdevice
	18	* modules themselves.
	19	*
	20	* This is all necessary because IOC4 is not implemented as a multi-function
	21	* PCI device, but an amalgamation of disparate registers for several
	22	* types of device (ATA, serial, external interrupts). The normal
	23	* resource management in the kernel doesn't have quite the right interfaces
	24	* to handle this situation (e.g. multiple modules can't claim the same
	25	* PCI ID), thus this IOC4 master module.
1da177e4 LT	26	*/
	27
	28	#include <linux/errno.h>
	29	#include <linux/module.h>
	30	#include <linux/pci.h>
22329b51	31	#include <linux/ioc4.h>
107d5a72	32	#include <linux/ktime.h>
5a0e3ad6	33	#include <linux/slab.h>
6e586f32	34	#include <linux/mutex.h>
107d5a72	35	#include <linux/time.h>
2099c99e	36	#include <asm/io.h>
d4c477ca BC	37
	38	/***************
	39	* Definitions *
	40	***************/
	41
	42	/* Tweakable values */
	43
	44	/* PCI bus speed detection/calibration */
107d5a72	45	#define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
d4c477ca BC	46	#define IOC4_CALIBRATE_CYCLES 256 /* Average over this many cycles */
	47	#define IOC4_CALIBRATE_DISCARD 2 /* Discard first few cycles */
	48	#define IOC4_CALIBRATE_LOW_MHZ 25 /* Lower bound on bus speed sanity */
	49	#define IOC4_CALIBRATE_HIGH_MHZ 75 /* Upper bound on bus speed sanity */
	50	#define IOC4_CALIBRATE_DEFAULT_MHZ 66 /* Assumed if sanity check fails */
1da177e4	51
22329b51 BC	52	/************************
	53	* Submodule management *
	54	************************/
1da177e4	55
6e586f32	56	static DEFINE_MUTEX(ioc4_mutex);
22329b51	57
6e586f32	58	static LIST_HEAD(ioc4_devices);
22329b51	59	static LIST_HEAD(ioc4_submodules);
22329b51 BC	60
	61	/* Register an IOC4 submodule */
	62	int
	63	ioc4_register_submodule(struct ioc4_submodule *is)
	64	{
	65	struct ioc4_driver_data *idd;
	66
6e586f32	67	mutex_lock(&ioc4_mutex);
22329b51	68	list_add(&is->is_list, &ioc4_submodules);
22329b51 BC	69
	70	/* Initialize submodule for each IOC4 */
	71	if (!is->is_probe)
6e586f32	72	goto out;
22329b51	73
22329b51 BC	74	list_for_each_entry(idd, &ioc4_devices, idd_list) {
	75	if (is->is_probe(idd)) {
	76	printk(KERN_WARNING
	77	"%s: IOC4 submodule %s probe failed "
	78	"for pci_dev %s",
6e574195	79	__func__, module_name(is->is_owner),
22329b51 BC	80	pci_name(idd->idd_pdev));
	81	}
	82	}
6e586f32 JS	83	out:
6e586f32 JS	84	mutex_unlock(&ioc4_mutex);
22329b51 BC	85	return 0;
	86	}
	87
	88	/* Unregister an IOC4 submodule */
	89	void
	90	ioc4_unregister_submodule(struct ioc4_submodule *is)
1da177e4	91	{
22329b51 BC	92	struct ioc4_driver_data *idd;
22329b51 BC	93
6e586f32	94	mutex_lock(&ioc4_mutex);
22329b51	95	list_del(&is->is_list);
22329b51 BC	96
	97	/* Remove submodule for each IOC4 */
	98	if (!is->is_remove)
6e586f32	99	goto out;
22329b51	100
22329b51 BC	101	list_for_each_entry(idd, &ioc4_devices, idd_list) {
	102	if (is->is_remove(idd)) {
	103	printk(KERN_WARNING
	104	"%s: IOC4 submodule %s remove failed "
	105	"for pci_dev %s.\n",
6e574195	106	__func__, module_name(is->is_owner),
22329b51 BC	107	pci_name(idd->idd_pdev));
	108	}
	109	}
6e586f32 JS	110	out:
6e586f32 JS	111	mutex_unlock(&ioc4_mutex);
22329b51 BC	112	}
	113
	114	/*********************
	115	* Device management *
	116	*********************/
	117
d4c477ca BC	118	#define IOC4_CALIBRATE_LOW_LIMIT \
	119	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
	120	#define IOC4_CALIBRATE_HIGH_LIMIT \
	121	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
	122	#define IOC4_CALIBRATE_DEFAULT \
	123	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)
	124
	125	#define IOC4_CALIBRATE_END \
	126	(IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)
	127
	128	#define IOC4_INT_OUT_MODE_TOGGLE 0x7 /* Toggle INT_OUT every COUNT+1 ticks */
	129
	130	/* Determines external interrupt output clock period of the PCI bus an
	131	* IOC4 is attached to. This value can be used to determine the PCI
	132	* bus speed.
	133	*
	134	* IOC4 has a design feature that various internal timers are derived from
	135	* the PCI bus clock. This causes IOC4 device drivers to need to take the
	136	* bus speed into account when setting various register values (e.g. INT_OUT
	137	* register COUNT field, UART divisors, etc). Since this information is
	138	* needed by several subdrivers, it is determined by the main IOC4 driver,
	139	* even though the following code utilizes external interrupt registers
	140	* to perform the speed calculation.
	141	*/
80c8ae28	142	static void
d4c477ca BC	143	ioc4_clock_calibrate(struct ioc4_driver_data *idd)
d4c477ca BC	144	{
d4c477ca BC	145	union ioc4_int_out int_out;
	146	union ioc4_gpcr gpcr;
	147	unsigned int state, last_state = 1;
107d5a72	148	uint64_t start, end, period;
d4c477ca BC	149	unsigned int count = 0;
	150
	151	/* Enable output */
	152	gpcr.raw = 0;
	153	gpcr.fields.dir = IOC4_GPCR_DIR_0;
	154	gpcr.fields.int_out_en = 1;
	155	writel(gpcr.raw, &idd->idd_misc_regs->gpcr_s.raw);
	156
	157	/* Reset to power-on state */
	158	writel(0, &idd->idd_misc_regs->int_out.raw);
	159	mmiowb();
	160
d4c477ca BC	161	/* Set up square wave */
	162	int_out.raw = 0;
	163	int_out.fields.count = IOC4_CALIBRATE_COUNT;
	164	int_out.fields.mode = IOC4_INT_OUT_MODE_TOGGLE;
	165	int_out.fields.diag = 0;
	166	writel(int_out.raw, &idd->idd_misc_regs->int_out.raw);
	167	mmiowb();
	168
	169	/* Check square wave period averaged over some number of cycles */
	170	do {
	171	int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
	172	state = int_out.fields.int_out;
	173	if (!last_state && state) {
	174	count++;
	175	if (count == IOC4_CALIBRATE_END) {
6d9b757c	176	end = ktime_get_ns();
d4c477ca BC	177	break;
d4c477ca BC	178	} else if (count == IOC4_CALIBRATE_DISCARD)
6d9b757c	179	start = ktime_get_ns();
d4c477ca BC	180	}
	181	last_state = state;
	182	} while (1);
	183
	184	/* Calculation rearranged to preserve intermediate precision.
	185	* Logically:
107d5a72 BC	186	* 1. "end - start" gives us the measurement period over all
	187	* the square wave cycles.
	188	* 2. Divide by number of square wave cycles to get the period
	189	* of a square wave cycle.
d4c477ca BC	190	* 3. Divide by 2*(int_out.fields.count+1), which is the formula
d4c477ca BC	191	* by which the IOC4 generates the square wave, to get the
107d5a72	192	* period of an IOC4 INT_OUT count.
d4c477ca	193	*/
107d5a72 BC	194	period = (end - start) /
107d5a72 BC	195	(IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1));
d4c477ca BC	196
	197	/* Bounds check the result. */
	198	if (period > IOC4_CALIBRATE_LOW_LIMIT \|\|
	199	period < IOC4_CALIBRATE_HIGH_LIMIT) {
f5befceb BC	200	printk(KERN_INFO
	201	"IOC4 %s: Clock calibration failed. Assuming"
	202	"PCI clock is %d ns.\n",
	203	pci_name(idd->idd_pdev),
d4c477ca BC	204	IOC4_CALIBRATE_DEFAULT / IOC4_EXTINT_COUNT_DIVISOR);
	205	period = IOC4_CALIBRATE_DEFAULT;
	206	} else {
59f14800 BC	207	u64 ns = period;
	208
	209	do_div(ns, IOC4_EXTINT_COUNT_DIVISOR);
f5befceb	210	printk(KERN_DEBUG
760fe9ad RD	211	"IOC4 %s: PCI clock is %llu ns.\n",
760fe9ad RD	212	pci_name(idd->idd_pdev), (unsigned long long)ns);
d4c477ca BC	213	}
	214
	215	/* Remember results. We store the extint clock period rather
	216	* than the PCI clock period so that greater precision is
	217	* retained. Divide by IOC4_EXTINT_COUNT_DIVISOR to get
	218	* PCI clock period.
	219	*/
	220	idd->count_period = period;
	221	}
	222
f5befceb BC	223	/* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
	224	* Each brings out different combinations of IOC4 signals, thus.
	225	* the IOC4 subdrivers need to know to which we're attached.
	226	*
	227	* We look for the presence of a SCSI (IO9) or SATA (IO10) controller
	228	* on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
	229	* If neither is present, it's a PCI-RT.
	230	*/
80c8ae28	231	static unsigned int
f5befceb BC	232	ioc4_variant(struct ioc4_driver_data *idd)
	233	{
	234	struct pci_dev *pdev = NULL;
	235	int found = 0;
	236
	237	/* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
	238	do {
	239	pdev = pci_get_device(PCI_VENDOR_ID_QLOGIC,
	240	PCI_DEVICE_ID_QLOGIC_ISP12160, pdev);
	241	if (pdev &&
	242	idd->idd_pdev->bus->number == pdev->bus->number &&
	243	3 == PCI_SLOT(pdev->devfn))
	244	found = 1;
f5befceb	245	} while (pdev && !found);
90d8dabf JL	246	if (NULL != pdev) {
90d8dabf JL	247	pci_dev_put(pdev);
f5befceb	248	return IOC4_VARIANT_IO9;
90d8dabf	249	}
f5befceb BC	250
	251	/* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
	252	pdev = NULL;
	253	do {
	254	pdev = pci_get_device(PCI_VENDOR_ID_VITESSE,
	255	PCI_DEVICE_ID_VITESSE_VSC7174, pdev);
	256	if (pdev &&
	257	idd->idd_pdev->bus->number == pdev->bus->number &&
	258	3 == PCI_SLOT(pdev->devfn))
	259	found = 1;
f5befceb	260	} while (pdev && !found);
90d8dabf JL	261	if (NULL != pdev) {
90d8dabf JL	262	pci_dev_put(pdev);
f5befceb	263	return IOC4_VARIANT_IO10;
90d8dabf	264	}
f5befceb BC	265
	266	/* PCI-RT: No SCSI/SATA controller will be present */
	267	return IOC4_VARIANT_PCI_RT;
	268	}
	269
1fc6e987	270	static void
08adefd4 BC	271	ioc4_load_modules(struct work_struct *work)
08adefd4 BC	272	{
08adefd4	273	request_module("sgiioc4");
08adefd4 BC	274	}
08adefd4 BC	275
883624a0 TH	276	static DECLARE_WORK(ioc4_load_modules_work, ioc4_load_modules);
883624a0 TH	277
22329b51	278	/* Adds a new instance of an IOC4 card */
80c8ae28	279	static int
22329b51 BC	280	ioc4_probe(struct pci_dev pdev, const struct pci_device_id pci_id)
	281	{
	282	struct ioc4_driver_data *idd;
	283	struct ioc4_submodule *is;
	284	uint32_t pcmd;
1da177e4 LT	285	int ret;
1da177e4 LT	286
22329b51	287	/* Enable IOC4 and take ownership of it */
1da177e4 LT	288	if ((ret = pci_enable_device(pdev))) {
1da177e4 LT	289	printk(KERN_WARNING
22329b51	290	"%s: Failed to enable IOC4 device for pci_dev %s.\n",
6e574195	291	__func__, pci_name(pdev));
22329b51	292	goto out;
1da177e4 LT	293	}
	294	pci_set_master(pdev);
	295
22329b51 BC	296	/* Set up per-IOC4 data */
	297	idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
	298	if (!idd) {
	299	printk(KERN_WARNING
	300	"%s: Failed to allocate IOC4 data for pci_dev %s.\n",
6e574195	301	__func__, pci_name(pdev));
22329b51 BC	302	ret = -ENODEV;
	303	goto out_idd;
	304	}
	305	idd->idd_pdev = pdev;
	306	idd->idd_pci_id = pci_id;
	307
	308	/* Map IOC4 misc registers. These are shared between subdevices
	309	* so the main IOC4 module manages them.
	310	*/
	311	idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
	312	if (!idd->idd_bar0) {
	313	printk(KERN_WARNING
	314	"%s: Unable to find IOC4 misc resource "
	315	"for pci_dev %s.\n",
6e574195	316	__func__, pci_name(idd->idd_pdev));
22329b51 BC	317	ret = -ENODEV;
	318	goto out_pci;
	319	}
52c9ae0a	320	if (!request_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
22329b51 BC	321	"ioc4_misc")) {
	322	printk(KERN_WARNING
	323	"%s: Unable to request IOC4 misc region "
	324	"for pci_dev %s.\n",
6e574195	325	__func__, pci_name(idd->idd_pdev));
22329b51 BC	326	ret = -ENODEV;
	327	goto out_pci;
	328	}
	329	idd->idd_misc_regs = ioremap(idd->idd_bar0,
	330	sizeof(struct ioc4_misc_regs));
	331	if (!idd->idd_misc_regs) {
	332	printk(KERN_WARNING
	333	"%s: Unable to remap IOC4 misc region "
	334	"for pci_dev %s.\n",
6e574195	335	__func__, pci_name(idd->idd_pdev));
22329b51 BC	336	ret = -ENODEV;
	337	goto out_misc_region;
	338	}
	339
	340	/* Failsafe portion of per-IOC4 initialization */
	341
f5befceb BC	342	/* Detect card variant */
	343	idd->idd_variant = ioc4_variant(idd);
	344	printk(KERN_INFO "IOC4 %s: %s card detected.\n", pci_name(pdev),
	345	idd->idd_variant == IOC4_VARIANT_IO9 ? "IO9" :
	346	idd->idd_variant == IOC4_VARIANT_PCI_RT ? "PCI-RT" :
	347	idd->idd_variant == IOC4_VARIANT_IO10 ? "IO10" : "unknown");
	348
22329b51 BC	349	/* Initialize IOC4 */
	350	pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
	351	pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
	352	pcmd \| PCI_COMMAND_PARITY \| PCI_COMMAND_SERR);
	353
d4c477ca BC	354	/* Determine PCI clock */
	355	ioc4_clock_calibrate(idd);
	356
22329b51 BC	357	/* Disable/clear all interrupts. Need to do this here lest
	358	* one submodule request the shared IOC4 IRQ, but interrupt
	359	* is generated by a different subdevice.
	360	*/
	361	/* Disable */
	362	writel(~0, &idd->idd_misc_regs->other_iec.raw);
	363	writel(~0, &idd->idd_misc_regs->sio_iec);
	364	/* Clear (i.e. acknowledge) */
	365	writel(~0, &idd->idd_misc_regs->other_ir.raw);
	366	writel(~0, &idd->idd_misc_regs->sio_ir);
	367
	368	/* Track PCI-device specific data */
	369	idd->idd_serial_data = NULL;
	370	pci_set_drvdata(idd->idd_pdev, idd);
6e586f32 JS	371
6e586f32 JS	372	mutex_lock(&ioc4_mutex);
8683dc99	373	list_add_tail(&idd->idd_list, &ioc4_devices);
22329b51 BC	374
22329b51 BC	375	/* Add this IOC4 to all submodules */
22329b51 BC	376	list_for_each_entry(is, &ioc4_submodules, is_list) {
	377	if (is->is_probe && is->is_probe(idd)) {
	378	printk(KERN_WARNING
	379	"%s: IOC4 submodule 0x%s probe failed "
	380	"for pci_dev %s.\n",
6e574195	381	__func__, module_name(is->is_owner),
22329b51 BC	382	pci_name(idd->idd_pdev));
	383	}
	384	}
6e586f32	385	mutex_unlock(&ioc4_mutex);
22329b51	386
08adefd4 BC	387	/* Request sgiioc4 IDE driver on boards that bring that functionality
	388	* off of IOC4. The root filesystem may be hosted on a drive connected
	389	* to IOC4, so we need to make sure the sgiioc4 driver is loaded as it
	390	* won't be picked up by modprobes due to the ioc4 module owning the
	391	* PCI device.
	392	*/
	393	if (idd->idd_variant != IOC4_VARIANT_PCI_RT) {
883624a0 TH	394	/* Request the module from a work procedure as the modprobe
	395	* goes out to a userland helper and that will hang if done
	396	* directly from ioc4_probe().
	397	*/
	398	printk(KERN_INFO "IOC4 loading sgiioc4 submodule\n");
	399	schedule_work(&ioc4_load_modules_work);
08adefd4 BC	400	}
08adefd4 BC	401
22329b51 BC	402	return 0;
	403
	404	out_misc_region:
52c9ae0a	405	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
22329b51 BC	406	out_pci:
	407	kfree(idd);
	408	out_idd:
	409	pci_disable_device(pdev);
	410	out:
	411	return ret;
1da177e4 LT	412	}
1da177e4 LT	413
22329b51	414	/* Removes a particular instance of an IOC4 card. */
486a5c28	415	static void
22329b51 BC	416	ioc4_remove(struct pci_dev *pdev)
	417	{
	418	struct ioc4_submodule *is;
	419	struct ioc4_driver_data *idd;
	420
	421	idd = pci_get_drvdata(pdev);
	422
	423	/* Remove this IOC4 from all submodules */
6e586f32	424	mutex_lock(&ioc4_mutex);
22329b51 BC	425	list_for_each_entry(is, &ioc4_submodules, is_list) {
	426	if (is->is_remove && is->is_remove(idd)) {
	427	printk(KERN_WARNING
	428	"%s: IOC4 submodule 0x%s remove failed "
	429	"for pci_dev %s.\n",
6e574195	430	__func__, module_name(is->is_owner),
22329b51 BC	431	pci_name(idd->idd_pdev));
	432	}
	433	}
6e586f32	434	mutex_unlock(&ioc4_mutex);
22329b51 BC	435
	436	/* Release resources */
	437	iounmap(idd->idd_misc_regs);
	438	if (!idd->idd_bar0) {
	439	printk(KERN_WARNING
	440	"%s: Unable to get IOC4 misc mapping for pci_dev %s. "
	441	"Device removal may be incomplete.\n",
6e574195	442	__func__, pci_name(idd->idd_pdev));
22329b51	443	}
52c9ae0a	444	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
22329b51 BC	445
	446	/* Disable IOC4 and relinquish */
	447	pci_disable_device(pdev);
	448
	449	/* Remove and free driver data */
6e586f32	450	mutex_lock(&ioc4_mutex);
22329b51	451	list_del(&idd->idd_list);
6e586f32	452	mutex_unlock(&ioc4_mutex);
22329b51 BC	453	kfree(idd);
	454	}
	455
	456	static struct pci_device_id ioc4_id_table[] = {
1da177e4 LT	457	{PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
	458	PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
	459	{0}
	460	};
1da177e4	461
85bd8434	462	static struct pci_driver ioc4_driver = {
22329b51 BC	463	.name = "IOC4",
	464	.id_table = ioc4_id_table,
	465	.probe = ioc4_probe,
2d6bed9c	466	.remove = ioc4_remove,
1da177e4 LT	467	};
1da177e4 LT	468
22329b51 BC	469	MODULE_DEVICE_TABLE(pci, ioc4_id_table);
	470
	471	/*********************
	472	* Module management *
	473	*********************/
	474
	475	/* Module load */
2ea5d35a	476	static int __init
22329b51	477	ioc4_init(void)
1da177e4	478	{
22329b51 BC	479	return pci_register_driver(&ioc4_driver);
22329b51 BC	480	}
1da177e4	481
22329b51	482	/* Module unload */
2ea5d35a	483	static void __exit
22329b51 BC	484	ioc4_exit(void)
22329b51 BC	485	{
08adefd4	486	/* Ensure ioc4_load_modules() has completed before exiting */
43829731	487	flush_work(&ioc4_load_modules_work);
22329b51	488	pci_unregister_driver(&ioc4_driver);
1da177e4	489	}
1da177e4	490
22329b51 BC	491	module_init(ioc4_init);
	492	module_exit(ioc4_exit);
	493
	494	MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
	495	MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
1da177e4	496	MODULE_LICENSE("GPL");
22329b51 BC	497
	498	EXPORT_SYMBOL(ioc4_register_submodule);
	499	EXPORT_SYMBOL(ioc4_unregister_submodule);