Commit | Line | Data |
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ab841160 OW |
1 | /* |
2 | * | |
3 | * Intel Management Engine Interface (Intel MEI) Linux driver | |
733ba91c | 4 | * Copyright (c) 2003-2012, Intel Corporation. |
ab841160 OW |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | */ | |
16 | ||
17 | #ifndef _MEI_DEV_H_ | |
18 | #define _MEI_DEV_H_ | |
19 | ||
20 | #include <linux/types.h> | |
9ce178e5 | 21 | #include <linux/watchdog.h> |
744f0f2f | 22 | #include <linux/poll.h> |
4f3afe1d | 23 | #include <linux/mei.h> |
66ef5ea9 | 24 | |
ab841160 | 25 | #include "hw.h" |
9dc64d6a | 26 | #include "hw-me-regs.h" |
ab841160 | 27 | |
ab841160 OW |
28 | /* |
29 | * watch dog definition | |
30 | */ | |
248ffdf7 TW |
31 | #define MEI_WD_HDR_SIZE 4 |
32 | #define MEI_WD_STOP_MSG_SIZE MEI_WD_HDR_SIZE | |
33 | #define MEI_WD_START_MSG_SIZE (MEI_WD_HDR_SIZE + 16) | |
34 | ||
35 | #define MEI_WD_DEFAULT_TIMEOUT 120 /* seconds */ | |
36 | #define MEI_WD_MIN_TIMEOUT 120 /* seconds */ | |
37 | #define MEI_WD_MAX_TIMEOUT 65535 /* seconds */ | |
38 | ||
c216fdeb TW |
39 | #define MEI_WD_STOP_TIMEOUT 10 /* msecs */ |
40 | ||
ab841160 OW |
41 | #define MEI_WD_STATE_INDEPENDENCE_MSG_SENT (1 << 0) |
42 | ||
edf1eed4 TW |
43 | #define MEI_RD_MSG_BUF_SIZE (128 * sizeof(u32)) |
44 | ||
9ce178e5 | 45 | |
ab841160 OW |
46 | /* |
47 | * AMTHI Client UUID | |
48 | */ | |
1a1aca42 | 49 | extern const uuid_le mei_amthif_guid; |
ab841160 OW |
50 | |
51 | /* | |
52 | * Watchdog Client UUID | |
53 | */ | |
54 | extern const uuid_le mei_wd_guid; | |
55 | ||
56 | /* | |
57 | * Watchdog independence state message | |
58 | */ | |
59 | extern const u8 mei_wd_state_independence_msg[3][4]; | |
60 | ||
1e2776c3 TW |
61 | /* |
62 | * Number of Maximum MEI Clients | |
63 | */ | |
64 | #define MEI_CLIENTS_MAX 256 | |
65 | ||
ab841160 OW |
66 | /* |
67 | * Number of File descriptors/handles | |
68 | * that can be opened to the driver. | |
69 | * | |
781d0d89 | 70 | * Limit to 255: 256 Total Clients |
1e2776c3 | 71 | * minus internal client for MEI Bus Messags |
ab841160 | 72 | */ |
781d0d89 | 73 | #define MEI_MAX_OPEN_HANDLE_COUNT (MEI_CLIENTS_MAX - 1) |
ab841160 | 74 | |
1d3f3da3 TW |
75 | /* |
76 | * Internal Clients Number | |
77 | */ | |
781d0d89 TW |
78 | #define MEI_HOST_CLIENT_ID_ANY (-1) |
79 | #define MEI_HBM_HOST_CLIENT_ID 0 /* not used, just for documentation */ | |
1d3f3da3 TW |
80 | #define MEI_WD_HOST_CLIENT_ID 1 |
81 | #define MEI_IAMTHIF_HOST_CLIENT_ID 2 | |
82 | ||
ab841160 OW |
83 | |
84 | /* File state */ | |
85 | enum file_state { | |
86 | MEI_FILE_INITIALIZING = 0, | |
87 | MEI_FILE_CONNECTING, | |
88 | MEI_FILE_CONNECTED, | |
89 | MEI_FILE_DISCONNECTING, | |
90 | MEI_FILE_DISCONNECTED | |
91 | }; | |
92 | ||
93 | /* MEI device states */ | |
b210d750 TW |
94 | enum mei_dev_state { |
95 | MEI_DEV_INITIALIZING = 0, | |
96 | MEI_DEV_INIT_CLIENTS, | |
97 | MEI_DEV_ENABLED, | |
98 | MEI_DEV_RESETING, | |
99 | MEI_DEV_DISABLED, | |
100 | MEI_DEV_RECOVERING_FROM_RESET, | |
101 | MEI_DEV_POWER_DOWN, | |
102 | MEI_DEV_POWER_UP | |
ab841160 OW |
103 | }; |
104 | ||
b210d750 TW |
105 | const char *mei_dev_state_str(int state); |
106 | ||
5f9092f3 | 107 | /* init clients states*/ |
ab841160 OW |
108 | enum mei_init_clients_states { |
109 | MEI_START_MESSAGE = 0, | |
110 | MEI_ENUM_CLIENTS_MESSAGE, | |
111 | MEI_CLIENT_PROPERTIES_MESSAGE | |
112 | }; | |
113 | ||
114 | enum iamthif_states { | |
115 | MEI_IAMTHIF_IDLE, | |
116 | MEI_IAMTHIF_WRITING, | |
117 | MEI_IAMTHIF_FLOW_CONTROL, | |
118 | MEI_IAMTHIF_READING, | |
119 | MEI_IAMTHIF_READ_COMPLETE | |
120 | }; | |
121 | ||
122 | enum mei_file_transaction_states { | |
123 | MEI_IDLE, | |
124 | MEI_WRITING, | |
125 | MEI_WRITE_COMPLETE, | |
126 | MEI_FLOW_CONTROL, | |
127 | MEI_READING, | |
128 | MEI_READ_COMPLETE | |
129 | }; | |
130 | ||
c216fdeb TW |
131 | enum mei_wd_states { |
132 | MEI_WD_IDLE, | |
133 | MEI_WD_RUNNING, | |
134 | MEI_WD_STOPPING, | |
135 | }; | |
136 | ||
4b8960b4 TW |
137 | /** |
138 | * enum mei_cb_file_ops - file operation associated with the callback | |
139 | * @MEI_FOP_READ - read | |
140 | * @MEI_FOP_WRITE - write | |
141 | * @MEI_FOP_IOCTL - ioctl | |
142 | * @MEI_FOP_OPEN - open | |
143 | * @MEI_FOP_CLOSE - close | |
144 | */ | |
145 | enum mei_cb_file_ops { | |
146 | MEI_FOP_READ = 0, | |
147 | MEI_FOP_WRITE, | |
148 | MEI_FOP_IOCTL, | |
149 | MEI_FOP_OPEN, | |
150 | MEI_FOP_CLOSE | |
ab841160 OW |
151 | }; |
152 | ||
153 | /* | |
154 | * Intel MEI message data struct | |
155 | */ | |
156 | struct mei_message_data { | |
157 | u32 size; | |
edf1eed4 | 158 | unsigned char *data; |
f060939d | 159 | }; |
ab841160 | 160 | |
db7da79d TW |
161 | /** |
162 | * struct mei_me_client - representation of me (fw) client | |
163 | * | |
164 | * @props - client properties | |
165 | * @client_id - me client id | |
166 | * @mei_flow_ctrl_creds - flow control credits | |
167 | */ | |
168 | struct mei_me_client { | |
169 | struct mei_client_properties props; | |
170 | u8 client_id; | |
171 | u8 mei_flow_ctrl_creds; | |
172 | }; | |
173 | ||
ab841160 | 174 | |
db3ed431 TW |
175 | struct mei_cl; |
176 | ||
4b8960b4 | 177 | /** |
db3ed431 TW |
178 | * struct mei_cl_cb - file operation callback structure |
179 | * | |
180 | * @cl - file client who is running this operation | |
4b8960b4 | 181 | * @fop_type - file operation type |
db3ed431 | 182 | */ |
ab841160 | 183 | struct mei_cl_cb { |
fb601adb | 184 | struct list_head list; |
db3ed431 | 185 | struct mei_cl *cl; |
4b8960b4 | 186 | enum mei_cb_file_ops fop_type; |
ab841160 OW |
187 | struct mei_message_data request_buffer; |
188 | struct mei_message_data response_buffer; | |
ebb108ef | 189 | unsigned long buf_idx; |
ab841160 OW |
190 | unsigned long read_time; |
191 | struct file *file_object; | |
192 | }; | |
193 | ||
194 | /* MEI client instance carried as file->pirvate_data*/ | |
195 | struct mei_cl { | |
196 | struct list_head link; | |
197 | struct mei_device *dev; | |
198 | enum file_state state; | |
199 | wait_queue_head_t tx_wait; | |
200 | wait_queue_head_t rx_wait; | |
201 | wait_queue_head_t wait; | |
ab841160 OW |
202 | int status; |
203 | /* ID of client connected */ | |
204 | u8 host_client_id; | |
205 | u8 me_client_id; | |
206 | u8 mei_flow_ctrl_creds; | |
207 | u8 timer_count; | |
208 | enum mei_file_transaction_states reading_state; | |
209 | enum mei_file_transaction_states writing_state; | |
210 | int sm_state; | |
211 | struct mei_cl_cb *read_cb; | |
212 | }; | |
213 | ||
827eef51 TW |
214 | /** struct mei_hw_ops |
215 | * | |
216 | * @host_set_ready - notify FW that host side is ready | |
217 | * @host_is_ready - query for host readiness | |
218 | ||
219 | * @hw_is_ready - query if hw is ready | |
220 | * @hw_reset - reset hw | |
221 | * @hw_config - configure hw | |
222 | ||
223 | * @intr_clear - clear pending interrupts | |
224 | * @intr_enable - enable interrupts | |
225 | * @intr_disable - disable interrupts | |
226 | ||
227 | * @hbuf_free_slots - query for write buffer empty slots | |
228 | * @hbuf_is_ready - query if write buffer is empty | |
229 | * @hbuf_max_len - query for write buffer max len | |
230 | ||
231 | * @write - write a message to FW | |
232 | ||
233 | * @rdbuf_full_slots - query how many slots are filled | |
234 | ||
235 | * @read_hdr - get first 4 bytes (header) | |
236 | * @read - read a buffer from the FW | |
237 | */ | |
238 | struct mei_hw_ops { | |
239 | ||
240 | void (*host_set_ready) (struct mei_device *dev); | |
241 | bool (*host_is_ready) (struct mei_device *dev); | |
242 | ||
243 | bool (*hw_is_ready) (struct mei_device *dev); | |
244 | void (*hw_reset) (struct mei_device *dev, bool enable); | |
245 | void (*hw_config) (struct mei_device *dev); | |
246 | ||
247 | void (*intr_clear) (struct mei_device *dev); | |
248 | void (*intr_enable) (struct mei_device *dev); | |
249 | void (*intr_disable) (struct mei_device *dev); | |
250 | ||
251 | int (*hbuf_free_slots) (struct mei_device *dev); | |
252 | bool (*hbuf_is_ready) (struct mei_device *dev); | |
253 | size_t (*hbuf_max_len) (const struct mei_device *dev); | |
254 | ||
255 | int (*write)(struct mei_device *dev, | |
256 | struct mei_msg_hdr *hdr, | |
257 | unsigned char *buf); | |
258 | ||
259 | int (*rdbuf_full_slots)(struct mei_device *dev); | |
260 | ||
261 | u32 (*read_hdr)(const struct mei_device *dev); | |
262 | int (*read) (struct mei_device *dev, | |
263 | unsigned char *buf, unsigned long len); | |
264 | }; | |
265 | ||
24aadc80 | 266 | /** |
5fb54fb4 | 267 | * struct mei_device - MEI private device struct |
330dd7da | 268 | |
fecb0d58 | 269 | * @mem_addr - mem mapped base register address |
330dd7da TW |
270 | |
271 | * @hbuf_depth - depth of hardware host/write buffer is slots | |
272 | * @hbuf_is_ready - query if the host host/write buffer is ready | |
273 | * @wr_msg - the buffer for hbm control messages | |
274 | * @wr_ext_msg - the buffer for hbm control responses (set in read cycle) | |
24aadc80 | 275 | */ |
ab841160 OW |
276 | struct mei_device { |
277 | struct pci_dev *pdev; /* pointer to pci device struct */ | |
278 | /* | |
279 | * lists of queues | |
280 | */ | |
e773efc4 | 281 | /* array of pointers to aio lists */ |
fb601adb TW |
282 | struct mei_cl_cb read_list; /* driver read queue */ |
283 | struct mei_cl_cb write_list; /* driver write queue */ | |
284 | struct mei_cl_cb write_waiting_list; /* write waiting queue */ | |
285 | struct mei_cl_cb ctrl_wr_list; /* managed write IOCTL list */ | |
286 | struct mei_cl_cb ctrl_rd_list; /* managed read IOCTL list */ | |
ab841160 | 287 | |
ab841160 OW |
288 | /* |
289 | * list of files | |
290 | */ | |
291 | struct list_head file_list; | |
eb9af0ac | 292 | long open_handle_count; |
fecb0d58 | 293 | |
ab841160 OW |
294 | /* |
295 | * lock for the device | |
296 | */ | |
297 | struct mutex device_lock; /* device lock */ | |
a61c6530 | 298 | struct delayed_work timer_work; /* MEI timer delayed work (timeouts) */ |
eb9af0ac | 299 | bool recvd_msg; |
52c34561 | 300 | |
ab841160 OW |
301 | /* |
302 | * waiting queue for receive message from FW | |
303 | */ | |
304 | wait_queue_head_t wait_recvd_msg; | |
305 | wait_queue_head_t wait_stop_wd; | |
306 | ||
307 | /* | |
308 | * mei device states | |
309 | */ | |
b210d750 | 310 | enum mei_dev_state dev_state; |
ab841160 OW |
311 | enum mei_init_clients_states init_clients_state; |
312 | u16 init_clients_timer; | |
ab841160 | 313 | |
edf1eed4 | 314 | unsigned char rd_msg_buf[MEI_RD_MSG_BUF_SIZE]; /* control messages */ |
ab841160 | 315 | u32 rd_msg_hdr; |
e46f1874 | 316 | |
330dd7da TW |
317 | /* write buffer */ |
318 | u8 hbuf_depth; | |
319 | bool hbuf_is_ready; | |
320 | ||
e46f1874 TW |
321 | /* used for control messages */ |
322 | struct { | |
323 | struct mei_msg_hdr hdr; | |
324 | unsigned char data[128]; | |
325 | } wr_msg; | |
326 | ||
5fb54fb4 TW |
327 | struct { |
328 | struct mei_msg_hdr hdr; | |
329 | unsigned char data[4]; /* All HBM messages are 4 bytes */ | |
330 | } wr_ext_msg; /* for control responses */ | |
ab841160 OW |
331 | |
332 | struct hbm_version version; | |
333 | ||
ab841160 OW |
334 | struct mei_me_client *me_clients; /* Note: memory has to be allocated */ |
335 | DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX); | |
336 | DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX); | |
cf9673da | 337 | u8 me_clients_num; |
ab841160 OW |
338 | u8 me_client_presentation_num; |
339 | u8 me_client_index; | |
340 | ||
eb9af0ac | 341 | struct mei_cl wd_cl; |
c216fdeb | 342 | enum mei_wd_states wd_state; |
eb9af0ac | 343 | bool wd_pending; |
c216fdeb | 344 | u16 wd_timeout; |
248ffdf7 | 345 | unsigned char wd_data[MEI_WD_START_MSG_SIZE]; |
ab841160 OW |
346 | |
347 | ||
e773efc4 TW |
348 | /* amthif list for cmd waiting */ |
349 | struct mei_cl_cb amthif_cmd_list; | |
350 | /* driver managed amthif list for reading completed amthif cmd data */ | |
351 | struct mei_cl_cb amthif_rd_complete_list; | |
ab841160 OW |
352 | struct file *iamthif_file_object; |
353 | struct mei_cl iamthif_cl; | |
eb9af0ac | 354 | struct mei_cl_cb *iamthif_current_cb; |
ab841160 OW |
355 | int iamthif_mtu; |
356 | unsigned long iamthif_timer; | |
357 | u32 iamthif_stall_timer; | |
358 | unsigned char *iamthif_msg_buf; /* Note: memory has to be allocated */ | |
359 | u32 iamthif_msg_buf_size; | |
360 | u32 iamthif_msg_buf_index; | |
ab841160 | 361 | enum iamthif_states iamthif_state; |
eb9af0ac TW |
362 | bool iamthif_flow_control_pending; |
363 | bool iamthif_ioctl; | |
364 | bool iamthif_canceled; | |
c1174c0e SO |
365 | |
366 | struct work_struct init_work; | |
827eef51 TW |
367 | |
368 | const struct mei_hw_ops *ops; | |
52c34561 | 369 | char hw[0] __aligned(sizeof(void *)); |
ab841160 OW |
370 | }; |
371 | ||
3870c320 TW |
372 | static inline unsigned long mei_secs_to_jiffies(unsigned long sec) |
373 | { | |
374 | return msecs_to_jiffies(sec * MSEC_PER_SEC); | |
375 | } | |
376 | ||
ab841160 OW |
377 | |
378 | /* | |
379 | * mei init function prototypes | |
380 | */ | |
52c34561 | 381 | void mei_device_init(struct mei_device *dev); |
ab841160 OW |
382 | void mei_reset(struct mei_device *dev, int interrupts); |
383 | int mei_hw_init(struct mei_device *dev); | |
c95efb74 | 384 | |
c95efb74 TW |
385 | /* |
386 | * MEI interrupt functions prototype | |
ab841160 | 387 | */ |
06ecd645 | 388 | |
a61c6530 | 389 | void mei_timer(struct work_struct *work); |
06ecd645 TW |
390 | int mei_irq_read_handler(struct mei_device *dev, |
391 | struct mei_cl_cb *cmpl_list, s32 *slots); | |
392 | ||
393 | int mei_irq_write_handler(struct mei_device *dev, struct mei_cl_cb *cmpl_list); | |
394 | ||
395 | void mei_irq_complete_handler(struct mei_cl *cl, struct mei_cl_cb *cb_pos); | |
ab841160 | 396 | |
19838fb8 TW |
397 | /* |
398 | * AMTHIF - AMT Host Interface Functions | |
399 | */ | |
400 | void mei_amthif_reset_params(struct mei_device *dev); | |
401 | ||
781d0d89 | 402 | int mei_amthif_host_init(struct mei_device *dev); |
19838fb8 TW |
403 | |
404 | int mei_amthif_write(struct mei_device *dev, struct mei_cl_cb *priv_cb); | |
405 | ||
406 | int mei_amthif_read(struct mei_device *dev, struct file *file, | |
744f0f2f TW |
407 | char __user *ubuf, size_t length, loff_t *offset); |
408 | ||
409 | unsigned int mei_amthif_poll(struct mei_device *dev, | |
410 | struct file *file, poll_table *wait); | |
ab841160 | 411 | |
a562d5c2 TW |
412 | int mei_amthif_release(struct mei_device *dev, struct file *file); |
413 | ||
19838fb8 | 414 | struct mei_cl_cb *mei_amthif_find_read_list_entry(struct mei_device *dev, |
ab841160 OW |
415 | struct file *file); |
416 | ||
19838fb8 TW |
417 | void mei_amthif_run_next_cmd(struct mei_device *dev); |
418 | ||
419 | ||
24c656e5 TW |
420 | int mei_amthif_irq_write_complete(struct mei_device *dev, s32 *slots, |
421 | struct mei_cl_cb *cb, struct mei_cl_cb *cmpl_list); | |
ab841160 | 422 | |
19838fb8 TW |
423 | void mei_amthif_complete(struct mei_device *dev, struct mei_cl_cb *cb); |
424 | int mei_amthif_irq_read_message(struct mei_cl_cb *complete_list, | |
425 | struct mei_device *dev, struct mei_msg_hdr *mei_hdr); | |
426 | int mei_amthif_irq_read(struct mei_device *dev, s32 *slots); | |
ab841160 | 427 | |
37e7d6e7 TW |
428 | |
429 | int mei_wd_send(struct mei_device *dev); | |
430 | int mei_wd_stop(struct mei_device *dev); | |
431 | int mei_wd_host_init(struct mei_device *dev); | |
432 | /* | |
433 | * mei_watchdog_register - Registering watchdog interface | |
434 | * once we got connection to the WD Client | |
435 | * @dev - mei device | |
436 | */ | |
437 | void mei_watchdog_register(struct mei_device *dev); | |
438 | /* | |
439 | * mei_watchdog_unregister - Unregistering watchdog interface | |
440 | * @dev - mei device | |
441 | */ | |
442 | void mei_watchdog_unregister(struct mei_device *dev); | |
443 | ||
ab841160 OW |
444 | /* |
445 | * Register Access Function | |
446 | */ | |
447 | ||
827eef51 TW |
448 | static inline void mei_hw_config(struct mei_device *dev) |
449 | { | |
450 | dev->ops->hw_config(dev); | |
451 | } | |
452 | static inline void mei_hw_reset(struct mei_device *dev, bool enable) | |
453 | { | |
454 | dev->ops->hw_reset(dev, enable); | |
455 | } | |
456 | ||
457 | static inline void mei_clear_interrupts(struct mei_device *dev) | |
458 | { | |
459 | dev->ops->intr_clear(dev); | |
460 | } | |
461 | ||
462 | static inline void mei_enable_interrupts(struct mei_device *dev) | |
463 | { | |
464 | dev->ops->intr_enable(dev); | |
465 | } | |
ab841160 | 466 | |
827eef51 TW |
467 | static inline void mei_disable_interrupts(struct mei_device *dev) |
468 | { | |
469 | dev->ops->intr_disable(dev); | |
470 | } | |
ab841160 | 471 | |
827eef51 TW |
472 | static inline void mei_host_set_ready(struct mei_device *dev) |
473 | { | |
474 | dev->ops->host_set_ready(dev); | |
475 | } | |
476 | static inline bool mei_host_is_ready(struct mei_device *dev) | |
477 | { | |
478 | return dev->ops->host_is_ready(dev); | |
479 | } | |
480 | static inline bool mei_hw_is_ready(struct mei_device *dev) | |
481 | { | |
482 | return dev->ops->hw_is_ready(dev); | |
483 | } | |
e7e0c231 | 484 | |
827eef51 TW |
485 | static inline bool mei_hbuf_is_ready(struct mei_device *dev) |
486 | { | |
487 | return dev->ops->hbuf_is_ready(dev); | |
488 | } | |
ab841160 | 489 | |
827eef51 TW |
490 | static inline int mei_hbuf_empty_slots(struct mei_device *dev) |
491 | { | |
492 | return dev->ops->hbuf_free_slots(dev); | |
493 | } | |
115ba28c | 494 | |
827eef51 TW |
495 | static inline size_t mei_hbuf_max_len(const struct mei_device *dev) |
496 | { | |
497 | return dev->ops->hbuf_max_len(dev); | |
498 | } | |
3a65dd4e | 499 | |
827eef51 TW |
500 | static inline int mei_write_message(struct mei_device *dev, |
501 | struct mei_msg_hdr *hdr, | |
502 | unsigned char *buf) | |
503 | { | |
504 | return dev->ops->write(dev, hdr, buf); | |
505 | } | |
506 | ||
507 | static inline u32 mei_read_hdr(const struct mei_device *dev) | |
508 | { | |
509 | return dev->ops->read_hdr(dev); | |
510 | } | |
511 | ||
512 | static inline void mei_read_slots(struct mei_device *dev, | |
513 | unsigned char *buf, unsigned long len) | |
514 | { | |
515 | dev->ops->read(dev, buf, len); | |
516 | } | |
517 | ||
518 | static inline int mei_count_full_read_slots(struct mei_device *dev) | |
519 | { | |
520 | return dev->ops->rdbuf_full_slots(dev); | |
521 | } | |
5bd64714 | 522 | |
2703d4b2 TW |
523 | int mei_register(struct device *dev); |
524 | void mei_deregister(void); | |
525 | ||
15d4acc5 TW |
526 | #define MEI_HDR_FMT "hdr:host=%02d me=%02d len=%d comp=%1d" |
527 | #define MEI_HDR_PRM(hdr) \ | |
528 | (hdr)->host_addr, (hdr)->me_addr, \ | |
529 | (hdr)->length, (hdr)->msg_complete | |
530 | ||
ab841160 | 531 | #endif |