[deliverable/linux.git] / drivers / misc / mei / pci-me.c

/*
 *
 * Intel Management Engine Interface (Intel MEI) Linux driver
 * Copyright (c) 2003-2012, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 */
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/fcntl.h>
#include <linux/aio.h>
#include <linux/pci.h>
#include <linux/poll.h>
#include <linux/ioctl.h>
#include <linux/cdev.h>
#include <linux/sched.h>
#include <linux/uuid.h>
#include <linux/compat.h>
#include <linux/jiffies.h>
#include <linux/interrupt.h>

#include <linux/pm_runtime.h>

#include <linux/mei.h>

#include "mei_dev.h"
#include "client.h"
#include "hw-me-regs.h"
#include "hw-me.h"

/* mei_pci_tbl - PCI Device ID Table */
static const struct pci_device_id mei_me_pci_tbl[] = {
	{MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},

	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},

	{MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_lpt_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_lpt_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_lpt_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch_cfg)},
	{MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch_cfg)},

	/* required last entry */
	{0, }
};

MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);

#ifdef CONFIG_PM_RUNTIME
static inline void mei_me_set_pm_domain(struct mei_device *dev);
static inline void mei_me_unset_pm_domain(struct mei_device *dev);
#else
static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
#endif /* CONFIG_PM_RUNTIME */

/**
 * mei_quirk_probe - probe for devices that doesn't valid ME interface
 *
 * @pdev: PCI device structure
 * @cfg: per generation config
 *
 * returns true if ME Interface is valid, false otherwise
 */
static bool mei_me_quirk_probe(struct pci_dev *pdev,
				const struct mei_cfg *cfg)
{
	if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
		dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
		return false;
	}

	return true;
}

/**
 * mei_probe - Device Initialization Routine
 *
 * @pdev: PCI device structure
 * @ent: entry in kcs_pci_tbl
 *
 * returns 0 on success, <0 on failure.
 */
static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
	struct mei_device *dev;
	struct mei_me_hw *hw;
	int err;


	if (!mei_me_quirk_probe(pdev, cfg))
		return -ENODEV;

	/* enable pci dev */
	err = pci_enable_device(pdev);
	if (err) {
		dev_err(&pdev->dev, "failed to enable pci device.\n");
		goto end;
	}
	/* set PCI host mastering  */
	pci_set_master(pdev);
	/* pci request regions for mei driver */
	err = pci_request_regions(pdev, KBUILD_MODNAME);
	if (err) {
		dev_err(&pdev->dev, "failed to get pci regions.\n");
		goto disable_device;
	}

	if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
	    dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {

		err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
		if (err)
			err = dma_set_coherent_mask(&pdev->dev,
						    DMA_BIT_MASK(32));
	}
	if (err) {
		dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
		goto release_regions;
	}


	/* allocates and initializes the mei dev structure */
	dev = mei_me_dev_init(pdev, cfg);
	if (!dev) {
		err = -ENOMEM;
		goto release_regions;
	}
	hw = to_me_hw(dev);
	/* mapping  IO device memory */
	hw->mem_addr = pci_iomap(pdev, 0, 0);
	if (!hw->mem_addr) {
		dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
		err = -ENOMEM;
		goto free_device;
	}
	pci_enable_msi(pdev);

	 /* request and enable interrupt */
	if (pci_dev_msi_enabled(pdev))
		err = request_threaded_irq(pdev->irq,
			NULL,
			mei_me_irq_thread_handler,
			IRQF_ONESHOT, KBUILD_MODNAME, dev);
	else
		err = request_threaded_irq(pdev->irq,
			mei_me_irq_quick_handler,
			mei_me_irq_thread_handler,
			IRQF_SHARED, KBUILD_MODNAME, dev);

	if (err) {
		dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
		       pdev->irq);
		goto disable_msi;
	}

	if (mei_start(dev)) {
		dev_err(&pdev->dev, "init hw failure.\n");
		err = -ENODEV;
		goto release_irq;
	}

	pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
	pm_runtime_use_autosuspend(&pdev->dev);

	err = mei_register(dev, &pdev->dev);
	if (err)
		goto release_irq;

	pci_set_drvdata(pdev, dev);

	schedule_delayed_work(&dev->timer_work, HZ);

	/*
	* For not wake-able HW runtime pm framework
	* can't be used on pci device level.
	* Use domain runtime pm callbacks instead.
	*/
	if (!pci_dev_run_wake(pdev))
		mei_me_set_pm_domain(dev);

	if (mei_pg_is_enabled(dev))
		pm_runtime_put_noidle(&pdev->dev);

	dev_dbg(&pdev->dev, "initialization successful.\n");

	return 0;

release_irq:
	mei_cancel_work(dev);
	mei_disable_interrupts(dev);
	free_irq(pdev->irq, dev);
disable_msi:
	pci_disable_msi(pdev);
	pci_iounmap(pdev, hw->mem_addr);
free_device:
	kfree(dev);
release_regions:
	pci_release_regions(pdev);
disable_device:
	pci_disable_device(pdev);
end:
	dev_err(&pdev->dev, "initialization failed.\n");
	return err;
}

/**
 * mei_remove - Device Removal Routine
 *
 * @pdev: PCI device structure
 *
 * mei_remove is called by the PCI subsystem to alert the driver
 * that it should release a PCI device.
 */
static void mei_me_remove(struct pci_dev *pdev)
{
	struct mei_device *dev;
	struct mei_me_hw *hw;

	dev = pci_get_drvdata(pdev);
	if (!dev)
		return;

	if (mei_pg_is_enabled(dev))
		pm_runtime_get_noresume(&pdev->dev);

	hw = to_me_hw(dev);


	dev_dbg(&pdev->dev, "stop\n");
	mei_stop(dev);

	if (!pci_dev_run_wake(pdev))
		mei_me_unset_pm_domain(dev);

	/* disable interrupts */
	mei_disable_interrupts(dev);

	free_irq(pdev->irq, dev);
	pci_disable_msi(pdev);

	if (hw->mem_addr)
		pci_iounmap(pdev, hw->mem_addr);

	mei_deregister(dev);

	kfree(dev);

	pci_release_regions(pdev);
	pci_disable_device(pdev);


}
#ifdef CONFIG_PM_SLEEP
static int mei_me_pci_suspend(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct mei_device *dev = pci_get_drvdata(pdev);

	if (!dev)
		return -ENODEV;

	dev_dbg(&pdev->dev, "suspend\n");

	mei_stop(dev);

	mei_disable_interrupts(dev);

	free_irq(pdev->irq, dev);
	pci_disable_msi(pdev);

	return 0;
}

static int mei_me_pci_resume(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct mei_device *dev;
	int err;

	dev = pci_get_drvdata(pdev);
	if (!dev)
		return -ENODEV;

	pci_enable_msi(pdev);

	/* request and enable interrupt */
	if (pci_dev_msi_enabled(pdev))
		err = request_threaded_irq(pdev->irq,
			NULL,
			mei_me_irq_thread_handler,
			IRQF_ONESHOT, KBUILD_MODNAME, dev);
	else
		err = request_threaded_irq(pdev->irq,
			mei_me_irq_quick_handler,
			mei_me_irq_thread_handler,
			IRQF_SHARED, KBUILD_MODNAME, dev);

	if (err) {
		dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
				pdev->irq);
		return err;
	}

	err = mei_restart(dev);
	if (err)
		return err;

	/* Start timer if stopped in suspend */
	schedule_delayed_work(&dev->timer_work, HZ);

	return 0;
}
#endif /* CONFIG_PM_SLEEP */

#ifdef CONFIG_PM_RUNTIME
static int mei_me_pm_runtime_idle(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct mei_device *dev;

	dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");

	dev = pci_get_drvdata(pdev);
	if (!dev)
		return -ENODEV;
	if (mei_write_is_idle(dev))
		pm_runtime_autosuspend(device);

	return -EBUSY;
}

static int mei_me_pm_runtime_suspend(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct mei_device *dev;
	int ret;

	dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");

	dev = pci_get_drvdata(pdev);
	if (!dev)
		return -ENODEV;

	mutex_lock(&dev->device_lock);

	if (mei_write_is_idle(dev))
		ret = mei_me_pg_set_sync(dev);
	else
		ret = -EAGAIN;

	mutex_unlock(&dev->device_lock);

	dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);

	return ret;
}

static int mei_me_pm_runtime_resume(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct mei_device *dev;
	int ret;

	dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");

	dev = pci_get_drvdata(pdev);
	if (!dev)
		return -ENODEV;

	mutex_lock(&dev->device_lock);

	ret = mei_me_pg_unset_sync(dev);

	mutex_unlock(&dev->device_lock);

	dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);

	return ret;
}

/**
 * mei_me_set_pm_domain - fill and set pm domian stucture for device
 *
 * @dev: mei_device
 */
static inline void mei_me_set_pm_domain(struct mei_device *dev)
{
	struct pci_dev *pdev  = dev->pdev;

	if (pdev->dev.bus && pdev->dev.bus->pm) {
		dev->pg_domain.ops = *pdev->dev.bus->pm;

		dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
		dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
		dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;

		pdev->dev.pm_domain = &dev->pg_domain;
	}
}

/**
 * mei_me_unset_pm_domain - clean pm domian stucture for device
 *
 * @dev: mei_device
 */
static inline void mei_me_unset_pm_domain(struct mei_device *dev)
{
	/* stop using pm callbacks if any */
	dev->dev->pm_domain = NULL;
}
#endif /* CONFIG_PM_RUNTIME */

#ifdef CONFIG_PM
static const struct dev_pm_ops mei_me_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
				mei_me_pci_resume)
	SET_RUNTIME_PM_OPS(
		mei_me_pm_runtime_suspend,
		mei_me_pm_runtime_resume,
		mei_me_pm_runtime_idle)
};

#define MEI_ME_PM_OPS	(&mei_me_pm_ops)
#else
#define MEI_ME_PM_OPS	NULL
#endif /* CONFIG_PM */
/*
 *  PCI driver structure
 */
static struct pci_driver mei_me_driver = {
	.name = KBUILD_MODNAME,
	.id_table = mei_me_pci_tbl,
	.probe = mei_me_probe,
	.remove = mei_me_remove,
	.shutdown = mei_me_remove,
	.driver.pm = MEI_ME_PM_OPS,
};

module_pci_driver(mei_me_driver);

MODULE_AUTHOR("Intel Corporation");
MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
2703d4b2 TW	1	/*
	2	*
	3	* Intel Management Engine Interface (Intel MEI) Linux driver
	4	* Copyright (c) 2003-2012, Intel Corporation.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms and conditions of the GNU General Public License,
	8	* version 2, as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope it will be useful, but WITHOUT
	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	* more details.
	14	*
	15	*/
2703d4b2 TW	16	#include <linux/module.h>
	17	#include <linux/moduleparam.h>
	18	#include <linux/kernel.h>
	19	#include <linux/device.h>
	20	#include <linux/fs.h>
	21	#include <linux/errno.h>
	22	#include <linux/types.h>
	23	#include <linux/fcntl.h>
	24	#include <linux/aio.h>
	25	#include <linux/pci.h>
	26	#include <linux/poll.h>
2703d4b2 TW	27	#include <linux/ioctl.h>
	28	#include <linux/cdev.h>
	29	#include <linux/sched.h>
	30	#include <linux/uuid.h>
	31	#include <linux/compat.h>
	32	#include <linux/jiffies.h>
	33	#include <linux/interrupt.h>
2703d4b2	34
180ea05b TW	35	#include <linux/pm_runtime.h>
180ea05b TW	36
2703d4b2 TW	37	#include <linux/mei.h>
	38
	39	#include "mei_dev.h"
2703d4b2	40	#include "client.h"
6e4cd27a TW	41	#include "hw-me-regs.h"
6e4cd27a TW	42	#include "hw-me.h"
2703d4b2	43
2703d4b2	44	/* mei_pci_tbl - PCI Device ID Table */
a05f8f86	45	static const struct pci_device_id mei_me_pci_tbl[] = {
8d929d48 AU	46	{MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
	47	{MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
	48	{MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
	49	{MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
	50	{MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
	51	{MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
	52	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
	53	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
	54	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
	55	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
	56	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},
	57
	58	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
	59	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
	60	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
	61	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
	62	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
	63	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
	64	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
	65	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
	66	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
	67	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
	68	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
	69	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
	70	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},
	71
	72	{MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
	73	{MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
c919951d TW	74	{MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
c919951d TW	75	{MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
8d929d48 AU	76	{MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
	77	{MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
	78	{MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
c919951d TW	79	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_lpt_cfg)},
c919951d TW	80	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_lpt_cfg)},
8d929d48	81	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch_cfg)},
c919951d	82	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_lpt_cfg)},
8d929d48	83	{MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch_cfg)},
d238a0ec	84	{MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch_cfg)},
2703d4b2 TW	85
	86	/* required last entry */
	87	{0, }
	88	};
	89
b68301e9	90	MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
2703d4b2	91
e13fa90c TW	92	#ifdef CONFIG_PM_RUNTIME
	93	static inline void mei_me_set_pm_domain(struct mei_device *dev);
	94	static inline void mei_me_unset_pm_domain(struct mei_device *dev);
	95	#else
	96	static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
	97	static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
	98	#endif /* CONFIG_PM_RUNTIME */
	99
2703d4b2 TW	100	/**
2703d4b2 TW	101	* mei_quirk_probe - probe for devices that doesn't valid ME interface
393b148f	102	*
2703d4b2	103	* @pdev: PCI device structure
c919951d	104	* @cfg: per generation config
2703d4b2 TW	105	*
	106	* returns true if ME Interface is valid, false otherwise
	107	*/
b68301e9	108	static bool mei_me_quirk_probe(struct pci_dev *pdev,
c919951d	109	const struct mei_cfg *cfg)
2703d4b2	110	{
c919951d TW	111	if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
	112	dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
	113	return false;
5e6533a6 TW	114	}
5e6533a6 TW	115
2703d4b2 TW	116	return true;
2703d4b2 TW	117	}
c919951d	118
2703d4b2 TW	119	/**
	120	* mei_probe - Device Initialization Routine
	121	*
	122	* @pdev: PCI device structure
	123	* @ent: entry in kcs_pci_tbl
	124	*
	125	* returns 0 on success, <0 on failure.
	126	*/
b68301e9	127	static int mei_me_probe(struct pci_dev pdev, const struct pci_device_id ent)
2703d4b2	128	{
8d929d48	129	const struct mei_cfg cfg = (struct mei_cfg )(ent->driver_data);
2703d4b2	130	struct mei_device *dev;
52c34561	131	struct mei_me_hw *hw;
2703d4b2 TW	132	int err;
2703d4b2 TW	133
2703d4b2	134
c919951d TW	135	if (!mei_me_quirk_probe(pdev, cfg))
c919951d TW	136	return -ENODEV;
2703d4b2	137
2703d4b2 TW	138	/* enable pci dev */
	139	err = pci_enable_device(pdev);
	140	if (err) {
	141	dev_err(&pdev->dev, "failed to enable pci device.\n");
	142	goto end;
	143	}
	144	/* set PCI host mastering */
	145	pci_set_master(pdev);
	146	/* pci request regions for mei driver */
	147	err = pci_request_regions(pdev, KBUILD_MODNAME);
	148	if (err) {
	149	dev_err(&pdev->dev, "failed to get pci regions.\n");
	150	goto disable_device;
	151	}
3ecfb168 TW	152
	153	if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) \|\|
	154	dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
	155
	156	err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
	157	if (err)
	158	err = dma_set_coherent_mask(&pdev->dev,
	159	DMA_BIT_MASK(32));
	160	}
	161	if (err) {
	162	dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
	163	goto release_regions;
	164	}
	165
	166
2703d4b2	167	/* allocates and initializes the mei dev structure */
8d929d48	168	dev = mei_me_dev_init(pdev, cfg);
2703d4b2 TW	169	if (!dev) {
	170	err = -ENOMEM;
	171	goto release_regions;
	172	}
52c34561	173	hw = to_me_hw(dev);
2703d4b2	174	/* mapping IO device memory */
52c34561 TW	175	hw->mem_addr = pci_iomap(pdev, 0, 0);
52c34561 TW	176	if (!hw->mem_addr) {
2703d4b2 TW	177	dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
	178	err = -ENOMEM;
	179	goto free_device;
	180	}
	181	pci_enable_msi(pdev);
	182
	183	/* request and enable interrupt */
	184	if (pci_dev_msi_enabled(pdev))
	185	err = request_threaded_irq(pdev->irq,
	186	NULL,
06ecd645	187	mei_me_irq_thread_handler,
2703d4b2 TW	188	IRQF_ONESHOT, KBUILD_MODNAME, dev);
	189	else
	190	err = request_threaded_irq(pdev->irq,
06ecd645 TW	191	mei_me_irq_quick_handler,
06ecd645 TW	192	mei_me_irq_thread_handler,
2703d4b2 TW	193	IRQF_SHARED, KBUILD_MODNAME, dev);
	194
	195	if (err) {
	196	dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
	197	pdev->irq);
	198	goto disable_msi;
	199	}
	200
c4d589be	201	if (mei_start(dev)) {
2703d4b2 TW	202	dev_err(&pdev->dev, "init hw failure.\n");
	203	err = -ENODEV;
	204	goto release_irq;
	205	}
	206
180ea05b TW	207	pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
	208	pm_runtime_use_autosuspend(&pdev->dev);
	209
f3d8e878	210	err = mei_register(dev, &pdev->dev);
2703d4b2 TW	211	if (err)
	212	goto release_irq;
	213
2703d4b2 TW	214	pci_set_drvdata(pdev, dev);
2703d4b2 TW	215
2703d4b2 TW	216	schedule_delayed_work(&dev->timer_work, HZ);
2703d4b2 TW	217
e13fa90c TW	218	/*
	219	* For not wake-able HW runtime pm framework
	220	* can't be used on pci device level.
	221	* Use domain runtime pm callbacks instead.
	222	*/
	223	if (!pci_dev_run_wake(pdev))
	224	mei_me_set_pm_domain(dev);
	225
180ea05b TW	226	if (mei_pg_is_enabled(dev))
	227	pm_runtime_put_noidle(&pdev->dev);
	228
c4e87b52	229	dev_dbg(&pdev->dev, "initialization successful.\n");
2703d4b2 TW	230
	231	return 0;
	232
	233	release_irq:
dc844b0d	234	mei_cancel_work(dev);
2703d4b2	235	mei_disable_interrupts(dev);
2703d4b2 TW	236	free_irq(pdev->irq, dev);
	237	disable_msi:
	238	pci_disable_msi(pdev);
52c34561	239	pci_iounmap(pdev, hw->mem_addr);
2703d4b2 TW	240	free_device:
	241	kfree(dev);
	242	release_regions:
	243	pci_release_regions(pdev);
	244	disable_device:
	245	pci_disable_device(pdev);
	246	end:
2703d4b2 TW	247	dev_err(&pdev->dev, "initialization failed.\n");
	248	return err;
	249	}
	250
	251	/**
	252	* mei_remove - Device Removal Routine
	253	*
	254	* @pdev: PCI device structure
	255	*
	256	* mei_remove is called by the PCI subsystem to alert the driver
	257	* that it should release a PCI device.
	258	*/
b68301e9	259	static void mei_me_remove(struct pci_dev *pdev)
2703d4b2 TW	260	{
2703d4b2 TW	261	struct mei_device *dev;
52c34561	262	struct mei_me_hw *hw;
2703d4b2	263
2703d4b2 TW	264	dev = pci_get_drvdata(pdev);
	265	if (!dev)
	266	return;
	267
180ea05b TW	268	if (mei_pg_is_enabled(dev))
	269	pm_runtime_get_noresume(&pdev->dev);
	270
52c34561 TW	271	hw = to_me_hw(dev);
52c34561 TW	272
2703d4b2	273
ed6f7ac1	274	dev_dbg(&pdev->dev, "stop\n");
7cb035d9	275	mei_stop(dev);
2703d4b2	276
e13fa90c TW	277	if (!pci_dev_run_wake(pdev))
	278	mei_me_unset_pm_domain(dev);
	279
2703d4b2 TW	280	/* disable interrupts */
	281	mei_disable_interrupts(dev);
	282
	283	free_irq(pdev->irq, dev);
	284	pci_disable_msi(pdev);
2703d4b2	285
52c34561 TW	286	if (hw->mem_addr)
52c34561 TW	287	pci_iounmap(pdev, hw->mem_addr);
2703d4b2	288
30e53bb8 TW	289	mei_deregister(dev);
30e53bb8 TW	290
2703d4b2 TW	291	kfree(dev);
	292
	293	pci_release_regions(pdev);
	294	pci_disable_device(pdev);
	295
2703d4b2 TW	296
2703d4b2 TW	297	}
16833257	298	#ifdef CONFIG_PM_SLEEP
b68301e9	299	static int mei_me_pci_suspend(struct device *device)
2703d4b2 TW	300	{
	301	struct pci_dev *pdev = to_pci_dev(device);
	302	struct mei_device *dev = pci_get_drvdata(pdev);
2703d4b2 TW	303
	304	if (!dev)
	305	return -ENODEV;
2703d4b2	306
ed6f7ac1	307	dev_dbg(&pdev->dev, "suspend\n");
2703d4b2	308
7cb035d9 TW	309	mei_stop(dev);
	310
	311	mei_disable_interrupts(dev);
2703d4b2 TW	312
	313	free_irq(pdev->irq, dev);
	314	pci_disable_msi(pdev);
	315
7cb035d9	316	return 0;
2703d4b2 TW	317	}
2703d4b2 TW	318
b68301e9	319	static int mei_me_pci_resume(struct device *device)
2703d4b2 TW	320	{
	321	struct pci_dev *pdev = to_pci_dev(device);
	322	struct mei_device *dev;
	323	int err;
	324
	325	dev = pci_get_drvdata(pdev);
	326	if (!dev)
	327	return -ENODEV;
	328
	329	pci_enable_msi(pdev);
	330
	331	/* request and enable interrupt */
	332	if (pci_dev_msi_enabled(pdev))
	333	err = request_threaded_irq(pdev->irq,
	334	NULL,
06ecd645	335	mei_me_irq_thread_handler,
2703d4b2 TW	336	IRQF_ONESHOT, KBUILD_MODNAME, dev);
	337	else
	338	err = request_threaded_irq(pdev->irq,
06ecd645 TW	339	mei_me_irq_quick_handler,
06ecd645 TW	340	mei_me_irq_thread_handler,
2703d4b2 TW	341	IRQF_SHARED, KBUILD_MODNAME, dev);
	342
	343	if (err) {
	344	dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
	345	pdev->irq);
	346	return err;
	347	}
	348
33ec0826 TW	349	err = mei_restart(dev);
	350	if (err)
	351	return err;
2703d4b2 TW	352
	353	/* Start timer if stopped in suspend */
	354	schedule_delayed_work(&dev->timer_work, HZ);
	355
33ec0826	356	return 0;
2703d4b2	357	}
180ea05b TW	358	#endif /* CONFIG_PM_SLEEP */
	359
	360	#ifdef CONFIG_PM_RUNTIME
	361	static int mei_me_pm_runtime_idle(struct device *device)
	362	{
	363	struct pci_dev *pdev = to_pci_dev(device);
	364	struct mei_device *dev;
	365
	366	dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
	367
	368	dev = pci_get_drvdata(pdev);
	369	if (!dev)
	370	return -ENODEV;
	371	if (mei_write_is_idle(dev))
d5d83f8a	372	pm_runtime_autosuspend(device);
180ea05b TW	373
	374	return -EBUSY;
	375	}
	376
	377	static int mei_me_pm_runtime_suspend(struct device *device)
	378	{
	379	struct pci_dev *pdev = to_pci_dev(device);
	380	struct mei_device *dev;
	381	int ret;
	382
	383	dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
	384
	385	dev = pci_get_drvdata(pdev);
	386	if (!dev)
	387	return -ENODEV;
	388
	389	mutex_lock(&dev->device_lock);
	390
	391	if (mei_write_is_idle(dev))
	392	ret = mei_me_pg_set_sync(dev);
	393	else
	394	ret = -EAGAIN;
	395
	396	mutex_unlock(&dev->device_lock);
	397
	398	dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
	399
	400	return ret;
	401	}
	402
	403	static int mei_me_pm_runtime_resume(struct device *device)
	404	{
	405	struct pci_dev *pdev = to_pci_dev(device);
	406	struct mei_device *dev;
	407	int ret;
	408
	409	dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
	410
	411	dev = pci_get_drvdata(pdev);
	412	if (!dev)
	413	return -ENODEV;
	414
	415	mutex_lock(&dev->device_lock);
	416
	417	ret = mei_me_pg_unset_sync(dev);
	418
	419	mutex_unlock(&dev->device_lock);
	420
	421	dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
	422
	423	return ret;
	424	}
e13fa90c TW	425
	426	/**
	427	* mei_me_set_pm_domain - fill and set pm domian stucture for device
	428	*
	429	* @dev: mei_device
	430	*/
	431	static inline void mei_me_set_pm_domain(struct mei_device *dev)
	432	{
	433	struct pci_dev *pdev = dev->pdev;
	434
	435	if (pdev->dev.bus && pdev->dev.bus->pm) {
	436	dev->pg_domain.ops = *pdev->dev.bus->pm;
	437
	438	dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
	439	dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
	440	dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
	441
	442	pdev->dev.pm_domain = &dev->pg_domain;
	443	}
	444	}
	445
	446	/**
	447	* mei_me_unset_pm_domain - clean pm domian stucture for device
	448	*
	449	* @dev: mei_device
	450	*/
	451	static inline void mei_me_unset_pm_domain(struct mei_device *dev)
	452	{
	453	/* stop using pm callbacks if any */
2bf94cab	454	dev->dev->pm_domain = NULL;
e13fa90c	455	}
180ea05b TW	456	#endif /* CONFIG_PM_RUNTIME */
	457
	458	#ifdef CONFIG_PM
	459	static const struct dev_pm_ops mei_me_pm_ops = {
	460	SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
	461	mei_me_pci_resume)
	462	SET_RUNTIME_PM_OPS(
	463	mei_me_pm_runtime_suspend,
	464	mei_me_pm_runtime_resume,
	465	mei_me_pm_runtime_idle)
	466	};
16833257	467
b68301e9	468	#define MEI_ME_PM_OPS (&mei_me_pm_ops)
2703d4b2	469	#else
b68301e9	470	#define MEI_ME_PM_OPS NULL
180ea05b	471	#endif /* CONFIG_PM */
2703d4b2 TW	472	/*
	473	* PCI driver structure
	474	*/
b68301e9	475	static struct pci_driver mei_me_driver = {
2703d4b2	476	.name = KBUILD_MODNAME,
b68301e9 TW	477	.id_table = mei_me_pci_tbl,
	478	.probe = mei_me_probe,
	479	.remove = mei_me_remove,
	480	.shutdown = mei_me_remove,
	481	.driver.pm = MEI_ME_PM_OPS,
2703d4b2 TW	482	};
2703d4b2 TW	483
b68301e9	484	module_pci_driver(mei_me_driver);
2703d4b2 TW	485
	486	MODULE_AUTHOR("Intel Corporation");
	487	MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
	488	MODULE_LICENSE("GPL v2");