Commit | Line | Data |
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14258640 JS |
1 | /* |
2 | * SN Platform GRU Driver | |
3 | * | |
4 | * FAULT HANDLER FOR GRU DETECTED TLB MISSES | |
5 | * | |
6 | * This file contains code that handles TLB misses within the GRU. | |
7 | * These misses are reported either via interrupts or user polling of | |
8 | * the user CB. | |
9 | * | |
10 | * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #include <linux/kernel.h> | |
28 | #include <linux/errno.h> | |
29 | #include <linux/spinlock.h> | |
30 | #include <linux/mm.h> | |
31 | #include <linux/hugetlb.h> | |
32 | #include <linux/device.h> | |
33 | #include <linux/io.h> | |
34 | #include <linux/uaccess.h> | |
bb04aa78 | 35 | #include <linux/security.h> |
268bb0ce | 36 | #include <linux/prefetch.h> |
14258640 JS |
37 | #include <asm/pgtable.h> |
38 | #include "gru.h" | |
39 | #include "grutables.h" | |
40 | #include "grulib.h" | |
41 | #include "gru_instructions.h" | |
42 | #include <asm/uv/uv_hub.h> | |
43 | ||
9c13cb33 JS |
44 | /* Return codes for vtop functions */ |
45 | #define VTOP_SUCCESS 0 | |
46 | #define VTOP_INVALID -1 | |
47 | #define VTOP_RETRY -2 | |
48 | ||
49 | ||
14258640 JS |
50 | /* |
51 | * Test if a physical address is a valid GRU GSEG address | |
52 | */ | |
53 | static inline int is_gru_paddr(unsigned long paddr) | |
54 | { | |
55 | return paddr >= gru_start_paddr && paddr < gru_end_paddr; | |
56 | } | |
57 | ||
58 | /* | |
59 | * Find the vma of a GRU segment. Caller must hold mmap_sem. | |
60 | */ | |
61 | struct vm_area_struct *gru_find_vma(unsigned long vaddr) | |
62 | { | |
63 | struct vm_area_struct *vma; | |
64 | ||
65 | vma = find_vma(current->mm, vaddr); | |
66 | if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops) | |
67 | return vma; | |
68 | return NULL; | |
69 | } | |
70 | ||
71 | /* | |
72 | * Find and lock the gts that contains the specified user vaddr. | |
73 | * | |
74 | * Returns: | |
75 | * - *gts with the mmap_sem locked for read and the GTS locked. | |
76 | * - NULL if vaddr invalid OR is not a valid GSEG vaddr. | |
77 | */ | |
78 | ||
79 | static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr) | |
80 | { | |
81 | struct mm_struct *mm = current->mm; | |
82 | struct vm_area_struct *vma; | |
83 | struct gru_thread_state *gts = NULL; | |
84 | ||
85 | down_read(&mm->mmap_sem); | |
86 | vma = gru_find_vma(vaddr); | |
87 | if (vma) | |
88 | gts = gru_find_thread_state(vma, TSID(vaddr, vma)); | |
89 | if (gts) | |
90 | mutex_lock(>s->ts_ctxlock); | |
91 | else | |
92 | up_read(&mm->mmap_sem); | |
93 | return gts; | |
94 | } | |
95 | ||
96 | static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr) | |
97 | { | |
98 | struct mm_struct *mm = current->mm; | |
99 | struct vm_area_struct *vma; | |
e006043a | 100 | struct gru_thread_state *gts = ERR_PTR(-EINVAL); |
14258640 JS |
101 | |
102 | down_write(&mm->mmap_sem); | |
103 | vma = gru_find_vma(vaddr); | |
e006043a JS |
104 | if (!vma) |
105 | goto err; | |
106 | ||
107 | gts = gru_alloc_thread_state(vma, TSID(vaddr, vma)); | |
108 | if (IS_ERR(gts)) | |
109 | goto err; | |
110 | mutex_lock(>s->ts_ctxlock); | |
111 | downgrade_write(&mm->mmap_sem); | |
112 | return gts; | |
14258640 | 113 | |
e006043a JS |
114 | err: |
115 | up_write(&mm->mmap_sem); | |
14258640 JS |
116 | return gts; |
117 | } | |
118 | ||
119 | /* | |
120 | * Unlock a GTS that was previously locked with gru_find_lock_gts(). | |
121 | */ | |
122 | static void gru_unlock_gts(struct gru_thread_state *gts) | |
123 | { | |
124 | mutex_unlock(>s->ts_ctxlock); | |
125 | up_read(¤t->mm->mmap_sem); | |
126 | } | |
127 | ||
128 | /* | |
129 | * Set a CB.istatus to active using a user virtual address. This must be done | |
130 | * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY. | |
131 | * If the line is evicted, the status may be lost. The in-cache update | |
132 | * is necessary to prevent the user from seeing a stale cb.istatus that will | |
133 | * change as soon as the TFH restart is complete. Races may cause an | |
134 | * occasional failure to clear the cb.istatus, but that is ok. | |
14258640 | 135 | */ |
b61fc69b | 136 | static void gru_cb_set_istatus_active(struct gru_instruction_bits *cbk) |
14258640 | 137 | { |
b61fc69b JS |
138 | if (cbk) { |
139 | cbk->istatus = CBS_ACTIVE; | |
14258640 JS |
140 | } |
141 | } | |
142 | ||
14258640 JS |
143 | /* |
144 | * Read & clear a TFM | |
145 | * | |
146 | * The GRU has an array of fault maps. A map is private to a cpu | |
147 | * Only one cpu will be accessing a cpu's fault map. | |
148 | * | |
149 | * This function scans the cpu-private fault map & clears all bits that | |
150 | * are set. The function returns a bitmap that indicates the bits that | |
151 | * were cleared. Note that sense the maps may be updated asynchronously by | |
152 | * the GRU, atomic operations must be used to clear bits. | |
153 | */ | |
154 | static void get_clear_fault_map(struct gru_state *gru, | |
4a7a17c1 JS |
155 | struct gru_tlb_fault_map *imap, |
156 | struct gru_tlb_fault_map *dmap) | |
14258640 JS |
157 | { |
158 | unsigned long i, k; | |
159 | struct gru_tlb_fault_map *tfm; | |
160 | ||
161 | tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id()); | |
162 | prefetchw(tfm); /* Helps on hardware, required for emulator */ | |
163 | for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) { | |
164 | k = tfm->fault_bits[i]; | |
165 | if (k) | |
166 | k = xchg(&tfm->fault_bits[i], 0UL); | |
4a7a17c1 JS |
167 | imap->fault_bits[i] = k; |
168 | k = tfm->done_bits[i]; | |
169 | if (k) | |
170 | k = xchg(&tfm->done_bits[i], 0UL); | |
171 | dmap->fault_bits[i] = k; | |
14258640 JS |
172 | } |
173 | ||
174 | /* | |
175 | * Not functionally required but helps performance. (Required | |
176 | * on emulator) | |
177 | */ | |
178 | gru_flush_cache(tfm); | |
179 | } | |
180 | ||
181 | /* | |
182 | * Atomic (interrupt context) & non-atomic (user context) functions to | |
183 | * convert a vaddr into a physical address. The size of the page | |
184 | * is returned in pageshift. | |
185 | * returns: | |
186 | * 0 - successful | |
187 | * < 0 - error code | |
188 | * 1 - (atomic only) try again in non-atomic context | |
189 | */ | |
190 | static int non_atomic_pte_lookup(struct vm_area_struct *vma, | |
191 | unsigned long vaddr, int write, | |
192 | unsigned long *paddr, int *pageshift) | |
193 | { | |
194 | struct page *page; | |
195 | ||
74ccd095 JS |
196 | #ifdef CONFIG_HUGETLB_PAGE |
197 | *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT; | |
198 | #else | |
14258640 | 199 | *pageshift = PAGE_SHIFT; |
74ccd095 | 200 | #endif |
14258640 JS |
201 | if (get_user_pages |
202 | (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0) | |
203 | return -EFAULT; | |
204 | *paddr = page_to_phys(page); | |
205 | put_page(page); | |
206 | return 0; | |
207 | } | |
208 | ||
209 | /* | |
14258640 JS |
210 | * atomic_pte_lookup |
211 | * | |
212 | * Convert a user virtual address to a physical address | |
213 | * Only supports Intel large pages (2MB only) on x86_64. | |
214 | * ZZZ - hugepage support is incomplete | |
923f7f69 JS |
215 | * |
216 | * NOTE: mmap_sem is already held on entry to this function. This | |
217 | * guarantees existence of the page tables. | |
14258640 JS |
218 | */ |
219 | static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr, | |
220 | int write, unsigned long *paddr, int *pageshift) | |
221 | { | |
222 | pgd_t *pgdp; | |
223 | pmd_t *pmdp; | |
224 | pud_t *pudp; | |
225 | pte_t pte; | |
226 | ||
14258640 JS |
227 | pgdp = pgd_offset(vma->vm_mm, vaddr); |
228 | if (unlikely(pgd_none(*pgdp))) | |
229 | goto err; | |
230 | ||
231 | pudp = pud_offset(pgdp, vaddr); | |
232 | if (unlikely(pud_none(*pudp))) | |
233 | goto err; | |
234 | ||
235 | pmdp = pmd_offset(pudp, vaddr); | |
236 | if (unlikely(pmd_none(*pmdp))) | |
237 | goto err; | |
238 | #ifdef CONFIG_X86_64 | |
239 | if (unlikely(pmd_large(*pmdp))) | |
240 | pte = *(pte_t *) pmdp; | |
241 | else | |
242 | #endif | |
243 | pte = *pte_offset_kernel(pmdp, vaddr); | |
244 | ||
14258640 JS |
245 | if (unlikely(!pte_present(pte) || |
246 | (write && (!pte_write(pte) || !pte_dirty(pte))))) | |
247 | return 1; | |
248 | ||
249 | *paddr = pte_pfn(pte) << PAGE_SHIFT; | |
023a407f | 250 | #ifdef CONFIG_HUGETLB_PAGE |
14258640 | 251 | *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT; |
023a407f JS |
252 | #else |
253 | *pageshift = PAGE_SHIFT; | |
254 | #endif | |
14258640 JS |
255 | return 0; |
256 | ||
257 | err: | |
14258640 JS |
258 | return 1; |
259 | } | |
260 | ||
ecdaf2b5 JS |
261 | static int gru_vtop(struct gru_thread_state *gts, unsigned long vaddr, |
262 | int write, int atomic, unsigned long *gpa, int *pageshift) | |
263 | { | |
264 | struct mm_struct *mm = gts->ts_mm; | |
265 | struct vm_area_struct *vma; | |
266 | unsigned long paddr; | |
267 | int ret, ps; | |
268 | ||
269 | vma = find_vma(mm, vaddr); | |
270 | if (!vma) | |
271 | goto inval; | |
272 | ||
273 | /* | |
274 | * Atomic lookup is faster & usually works even if called in non-atomic | |
275 | * context. | |
276 | */ | |
277 | rmb(); /* Must/check ms_range_active before loading PTEs */ | |
278 | ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &ps); | |
279 | if (ret) { | |
280 | if (atomic) | |
281 | goto upm; | |
282 | if (non_atomic_pte_lookup(vma, vaddr, write, &paddr, &ps)) | |
283 | goto inval; | |
284 | } | |
285 | if (is_gru_paddr(paddr)) | |
286 | goto inval; | |
287 | paddr = paddr & ~((1UL << ps) - 1); | |
288 | *gpa = uv_soc_phys_ram_to_gpa(paddr); | |
289 | *pageshift = ps; | |
9c13cb33 | 290 | return VTOP_SUCCESS; |
ecdaf2b5 JS |
291 | |
292 | inval: | |
9c13cb33 | 293 | return VTOP_INVALID; |
ecdaf2b5 | 294 | upm: |
9c13cb33 | 295 | return VTOP_RETRY; |
ecdaf2b5 JS |
296 | } |
297 | ||
298 | ||
c550222f JS |
299 | /* |
300 | * Flush a CBE from cache. The CBE is clean in the cache. Dirty the | |
301 | * CBE cacheline so that the line will be written back to home agent. | |
302 | * Otherwise the line may be silently dropped. This has no impact | |
303 | * except on performance. | |
304 | */ | |
305 | static void gru_flush_cache_cbe(struct gru_control_block_extended *cbe) | |
306 | { | |
307 | if (unlikely(cbe)) { | |
308 | cbe->cbrexecstatus = 0; /* make CL dirty */ | |
309 | gru_flush_cache(cbe); | |
310 | } | |
311 | } | |
312 | ||
313 | /* | |
314 | * Preload the TLB with entries that may be required. Currently, preloading | |
315 | * is implemented only for BCOPY. Preload <tlb_preload_count> pages OR to | |
316 | * the end of the bcopy tranfer, whichever is smaller. | |
317 | */ | |
318 | static void gru_preload_tlb(struct gru_state *gru, | |
319 | struct gru_thread_state *gts, int atomic, | |
320 | unsigned long fault_vaddr, int asid, int write, | |
321 | unsigned char tlb_preload_count, | |
322 | struct gru_tlb_fault_handle *tfh, | |
323 | struct gru_control_block_extended *cbe) | |
324 | { | |
325 | unsigned long vaddr = 0, gpa; | |
326 | int ret, pageshift; | |
327 | ||
328 | if (cbe->opccpy != OP_BCOPY) | |
329 | return; | |
330 | ||
331 | if (fault_vaddr == cbe->cbe_baddr0) | |
332 | vaddr = fault_vaddr + GRU_CACHE_LINE_BYTES * cbe->cbe_src_cl - 1; | |
333 | else if (fault_vaddr == cbe->cbe_baddr1) | |
334 | vaddr = fault_vaddr + (1 << cbe->xtypecpy) * cbe->cbe_nelemcur - 1; | |
335 | ||
336 | fault_vaddr &= PAGE_MASK; | |
337 | vaddr &= PAGE_MASK; | |
338 | vaddr = min(vaddr, fault_vaddr + tlb_preload_count * PAGE_SIZE); | |
339 | ||
340 | while (vaddr > fault_vaddr) { | |
341 | ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift); | |
342 | if (ret || tfh_write_only(tfh, gpa, GAA_RAM, vaddr, asid, write, | |
343 | GRU_PAGESIZE(pageshift))) | |
344 | return; | |
345 | gru_dbg(grudev, | |
346 | "%s: gid %d, gts 0x%p, tfh 0x%p, vaddr 0x%lx, asid 0x%x, rw %d, ps %d, gpa 0x%lx\n", | |
347 | atomic ? "atomic" : "non-atomic", gru->gs_gid, gts, tfh, | |
348 | vaddr, asid, write, pageshift, gpa); | |
349 | vaddr -= PAGE_SIZE; | |
350 | STAT(tlb_preload_page); | |
351 | } | |
352 | } | |
353 | ||
14258640 JS |
354 | /* |
355 | * Drop a TLB entry into the GRU. The fault is described by info in an TFH. | |
356 | * Input: | |
357 | * cb Address of user CBR. Null if not running in user context | |
358 | * Return: | |
359 | * 0 = dropin, exception, or switch to UPM successful | |
360 | * 1 = range invalidate active | |
361 | * < 0 = error code | |
362 | * | |
363 | */ | |
2ce4d4c9 JS |
364 | static int gru_try_dropin(struct gru_state *gru, |
365 | struct gru_thread_state *gts, | |
14258640 | 366 | struct gru_tlb_fault_handle *tfh, |
b61fc69b | 367 | struct gru_instruction_bits *cbk) |
14258640 | 368 | { |
c550222f JS |
369 | struct gru_control_block_extended *cbe = NULL; |
370 | unsigned char tlb_preload_count = gts->ts_tlb_preload_count; | |
563447d7 | 371 | int pageshift = 0, asid, write, ret, atomic = !cbk, indexway; |
ecdaf2b5 | 372 | unsigned long gpa = 0, vaddr = 0; |
14258640 JS |
373 | |
374 | /* | |
375 | * NOTE: The GRU contains magic hardware that eliminates races between | |
376 | * TLB invalidates and TLB dropins. If an invalidate occurs | |
377 | * in the window between reading the TFH and the subsequent TLB dropin, | |
378 | * the dropin is ignored. This eliminates the need for additional locks. | |
379 | */ | |
380 | ||
c550222f JS |
381 | /* |
382 | * Prefetch the CBE if doing TLB preloading | |
383 | */ | |
384 | if (unlikely(tlb_preload_count)) { | |
385 | cbe = gru_tfh_to_cbe(tfh); | |
386 | prefetchw(cbe); | |
387 | } | |
388 | ||
14258640 JS |
389 | /* |
390 | * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call. | |
391 | * Might be a hardware race OR a stupid user. Ignore FMM because FMM | |
392 | * is a transient state. | |
393 | */ | |
270952a9 JS |
394 | if (tfh->status != TFHSTATUS_EXCEPTION) { |
395 | gru_flush_cache(tfh); | |
67bf04a5 | 396 | sync_core(); |
270952a9 JS |
397 | if (tfh->status != TFHSTATUS_EXCEPTION) |
398 | goto failnoexception; | |
399 | STAT(tfh_stale_on_fault); | |
400 | } | |
14258640 JS |
401 | if (tfh->state == TFHSTATE_IDLE) |
402 | goto failidle; | |
b61fc69b | 403 | if (tfh->state == TFHSTATE_MISS_FMM && cbk) |
14258640 JS |
404 | goto failfmm; |
405 | ||
406 | write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0; | |
407 | vaddr = tfh->missvaddr; | |
408 | asid = tfh->missasid; | |
563447d7 | 409 | indexway = tfh->indexway; |
14258640 JS |
410 | if (asid == 0) |
411 | goto failnoasid; | |
412 | ||
413 | rmb(); /* TFH must be cache resident before reading ms_range_active */ | |
414 | ||
415 | /* | |
416 | * TFH is cache resident - at least briefly. Fail the dropin | |
417 | * if a range invalidate is active. | |
418 | */ | |
419 | if (atomic_read(>s->ts_gms->ms_range_active)) | |
420 | goto failactive; | |
421 | ||
ecdaf2b5 | 422 | ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift); |
9c13cb33 | 423 | if (ret == VTOP_INVALID) |
14258640 | 424 | goto failinval; |
9c13cb33 | 425 | if (ret == VTOP_RETRY) |
ecdaf2b5 | 426 | goto failupm; |
14258640 | 427 | |
7b8274e9 JS |
428 | if (!(gts->ts_sizeavail & GRU_SIZEAVAIL(pageshift))) { |
429 | gts->ts_sizeavail |= GRU_SIZEAVAIL(pageshift); | |
99f7c229 | 430 | if (atomic || !gru_update_cch(gts)) { |
7b8274e9 JS |
431 | gts->ts_force_cch_reload = 1; |
432 | goto failupm; | |
433 | } | |
434 | } | |
c550222f JS |
435 | |
436 | if (unlikely(cbe) && pageshift == PAGE_SHIFT) { | |
2ce4d4c9 | 437 | gru_preload_tlb(gru, gts, atomic, vaddr, asid, write, tlb_preload_count, tfh, cbe); |
c550222f JS |
438 | gru_flush_cache_cbe(cbe); |
439 | } | |
440 | ||
b61fc69b | 441 | gru_cb_set_istatus_active(cbk); |
5958ab88 | 442 | gts->ustats.tlbdropin++; |
14258640 JS |
443 | tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write, |
444 | GRU_PAGESIZE(pageshift)); | |
14258640 | 445 | gru_dbg(grudev, |
563447d7 JS |
446 | "%s: gid %d, gts 0x%p, tfh 0x%p, vaddr 0x%lx, asid 0x%x, indexway 0x%x," |
447 | " rw %d, ps %d, gpa 0x%lx\n", | |
2ce4d4c9 | 448 | atomic ? "atomic" : "non-atomic", gru->gs_gid, gts, tfh, vaddr, asid, |
563447d7 JS |
449 | indexway, write, pageshift, gpa); |
450 | STAT(tlb_dropin); | |
14258640 JS |
451 | return 0; |
452 | ||
453 | failnoasid: | |
454 | /* No asid (delayed unload). */ | |
455 | STAT(tlb_dropin_fail_no_asid); | |
456 | gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr); | |
b61fc69b | 457 | if (!cbk) |
14258640 JS |
458 | tfh_user_polling_mode(tfh); |
459 | else | |
460 | gru_flush_cache(tfh); | |
c550222f | 461 | gru_flush_cache_cbe(cbe); |
14258640 JS |
462 | return -EAGAIN; |
463 | ||
464 | failupm: | |
465 | /* Atomic failure switch CBR to UPM */ | |
466 | tfh_user_polling_mode(tfh); | |
c550222f | 467 | gru_flush_cache_cbe(cbe); |
14258640 JS |
468 | STAT(tlb_dropin_fail_upm); |
469 | gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr); | |
470 | return 1; | |
471 | ||
472 | failfmm: | |
473 | /* FMM state on UPM call */ | |
fe5bb6b0 | 474 | gru_flush_cache(tfh); |
c550222f | 475 | gru_flush_cache_cbe(cbe); |
14258640 JS |
476 | STAT(tlb_dropin_fail_fmm); |
477 | gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state); | |
478 | return 0; | |
479 | ||
cd1334f0 JS |
480 | failnoexception: |
481 | /* TFH status did not show exception pending */ | |
482 | gru_flush_cache(tfh); | |
c550222f | 483 | gru_flush_cache_cbe(cbe); |
b61fc69b JS |
484 | if (cbk) |
485 | gru_flush_cache(cbk); | |
cd1334f0 | 486 | STAT(tlb_dropin_fail_no_exception); |
b61fc69b JS |
487 | gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n", |
488 | tfh, tfh->status, tfh->state); | |
cd1334f0 JS |
489 | return 0; |
490 | ||
14258640 | 491 | failidle: |
cd1334f0 | 492 | /* TFH state was idle - no miss pending */ |
14258640 | 493 | gru_flush_cache(tfh); |
c550222f | 494 | gru_flush_cache_cbe(cbe); |
b61fc69b JS |
495 | if (cbk) |
496 | gru_flush_cache(cbk); | |
14258640 JS |
497 | STAT(tlb_dropin_fail_idle); |
498 | gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state); | |
499 | return 0; | |
500 | ||
501 | failinval: | |
502 | /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */ | |
503 | tfh_exception(tfh); | |
c550222f | 504 | gru_flush_cache_cbe(cbe); |
14258640 JS |
505 | STAT(tlb_dropin_fail_invalid); |
506 | gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr); | |
507 | return -EFAULT; | |
508 | ||
509 | failactive: | |
510 | /* Range invalidate active. Switch to UPM iff atomic */ | |
b61fc69b | 511 | if (!cbk) |
14258640 JS |
512 | tfh_user_polling_mode(tfh); |
513 | else | |
514 | gru_flush_cache(tfh); | |
c550222f | 515 | gru_flush_cache_cbe(cbe); |
14258640 JS |
516 | STAT(tlb_dropin_fail_range_active); |
517 | gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n", | |
518 | tfh, vaddr); | |
519 | return 1; | |
520 | } | |
521 | ||
522 | /* | |
523 | * Process an external interrupt from the GRU. This interrupt is | |
524 | * caused by a TLB miss. | |
525 | * Note that this is the interrupt handler that is registered with linux | |
526 | * interrupt handlers. | |
527 | */ | |
4107e1d3 | 528 | static irqreturn_t gru_intr(int chiplet, int blade) |
14258640 JS |
529 | { |
530 | struct gru_state *gru; | |
4a7a17c1 | 531 | struct gru_tlb_fault_map imap, dmap; |
14258640 JS |
532 | struct gru_thread_state *gts; |
533 | struct gru_tlb_fault_handle *tfh = NULL; | |
2ce4d4c9 | 534 | struct completion *cmp; |
14258640 JS |
535 | int cbrnum, ctxnum; |
536 | ||
537 | STAT(intr); | |
538 | ||
4107e1d3 | 539 | gru = &gru_base[blade]->bs_grus[chiplet]; |
14258640 | 540 | if (!gru) { |
4107e1d3 JS |
541 | dev_err(grudev, "GRU: invalid interrupt: cpu %d, chiplet %d\n", |
542 | raw_smp_processor_id(), chiplet); | |
14258640 JS |
543 | return IRQ_NONE; |
544 | } | |
4a7a17c1 | 545 | get_clear_fault_map(gru, &imap, &dmap); |
4107e1d3 JS |
546 | gru_dbg(grudev, |
547 | "cpu %d, chiplet %d, gid %d, imap %016lx %016lx, dmap %016lx %016lx\n", | |
548 | smp_processor_id(), chiplet, gru->gs_gid, | |
549 | imap.fault_bits[0], imap.fault_bits[1], | |
550 | dmap.fault_bits[0], dmap.fault_bits[1]); | |
4a7a17c1 JS |
551 | |
552 | for_each_cbr_in_tfm(cbrnum, dmap.fault_bits) { | |
563447d7 | 553 | STAT(intr_cbr); |
2ce4d4c9 JS |
554 | cmp = gru->gs_blade->bs_async_wq; |
555 | if (cmp) | |
556 | complete(cmp); | |
4a7a17c1 | 557 | gru_dbg(grudev, "gid %d, cbr_done %d, done %d\n", |
2ce4d4c9 | 558 | gru->gs_gid, cbrnum, cmp ? cmp->done : -1); |
4a7a17c1 | 559 | } |
14258640 | 560 | |
4a7a17c1 | 561 | for_each_cbr_in_tfm(cbrnum, imap.fault_bits) { |
563447d7 | 562 | STAT(intr_tfh); |
14258640 JS |
563 | tfh = get_tfh_by_index(gru, cbrnum); |
564 | prefetchw(tfh); /* Helps on hdw, required for emulator */ | |
565 | ||
566 | /* | |
567 | * When hardware sets a bit in the faultmap, it implicitly | |
568 | * locks the GRU context so that it cannot be unloaded. | |
569 | * The gts cannot change until a TFH start/writestart command | |
570 | * is issued. | |
571 | */ | |
572 | ctxnum = tfh->ctxnum; | |
573 | gts = gru->gs_gts[ctxnum]; | |
574 | ||
2ce4d4c9 JS |
575 | /* Spurious interrupts can cause this. Ignore. */ |
576 | if (!gts) { | |
577 | STAT(intr_spurious); | |
578 | continue; | |
579 | } | |
580 | ||
14258640 JS |
581 | /* |
582 | * This is running in interrupt context. Trylock the mmap_sem. | |
583 | * If it fails, retry the fault in user context. | |
584 | */ | |
5958ab88 | 585 | gts->ustats.fmm_tlbmiss++; |
cd1334f0 JS |
586 | if (!gts->ts_force_cch_reload && |
587 | down_read_trylock(>s->ts_mm->mmap_sem)) { | |
2ce4d4c9 | 588 | gru_try_dropin(gru, gts, tfh, NULL); |
14258640 JS |
589 | up_read(>s->ts_mm->mmap_sem); |
590 | } else { | |
591 | tfh_user_polling_mode(tfh); | |
43884604 | 592 | STAT(intr_mm_lock_failed); |
14258640 JS |
593 | } |
594 | } | |
595 | return IRQ_HANDLED; | |
596 | } | |
597 | ||
4107e1d3 JS |
598 | irqreturn_t gru0_intr(int irq, void *dev_id) |
599 | { | |
600 | return gru_intr(0, uv_numa_blade_id()); | |
601 | } | |
602 | ||
603 | irqreturn_t gru1_intr(int irq, void *dev_id) | |
604 | { | |
605 | return gru_intr(1, uv_numa_blade_id()); | |
606 | } | |
607 | ||
608 | irqreturn_t gru_intr_mblade(int irq, void *dev_id) | |
609 | { | |
610 | int blade; | |
611 | ||
612 | for_each_possible_blade(blade) { | |
613 | if (uv_blade_nr_possible_cpus(blade)) | |
614 | continue; | |
615 | gru_intr(0, blade); | |
616 | gru_intr(1, blade); | |
617 | } | |
618 | return IRQ_HANDLED; | |
619 | } | |
620 | ||
14258640 JS |
621 | |
622 | static int gru_user_dropin(struct gru_thread_state *gts, | |
623 | struct gru_tlb_fault_handle *tfh, | |
b61fc69b | 624 | void *cb) |
14258640 JS |
625 | { |
626 | struct gru_mm_struct *gms = gts->ts_gms; | |
627 | int ret; | |
628 | ||
5958ab88 | 629 | gts->ustats.upm_tlbmiss++; |
14258640 JS |
630 | while (1) { |
631 | wait_event(gms->ms_wait_queue, | |
632 | atomic_read(&gms->ms_range_active) == 0); | |
633 | prefetchw(tfh); /* Helps on hdw, required for emulator */ | |
2ce4d4c9 | 634 | ret = gru_try_dropin(gts->ts_gru, gts, tfh, cb); |
14258640 JS |
635 | if (ret <= 0) |
636 | return ret; | |
637 | STAT(call_os_wait_queue); | |
638 | } | |
639 | } | |
640 | ||
641 | /* | |
642 | * This interface is called as a result of a user detecting a "call OS" bit | |
643 | * in a user CB. Normally means that a TLB fault has occurred. | |
644 | * cb - user virtual address of the CB | |
645 | */ | |
646 | int gru_handle_user_call_os(unsigned long cb) | |
647 | { | |
648 | struct gru_tlb_fault_handle *tfh; | |
649 | struct gru_thread_state *gts; | |
b61fc69b | 650 | void *cbk; |
14258640 JS |
651 | int ucbnum, cbrnum, ret = -EINVAL; |
652 | ||
653 | STAT(call_os); | |
14258640 JS |
654 | |
655 | /* sanity check the cb pointer */ | |
656 | ucbnum = get_cb_number((void *)cb); | |
657 | if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB) | |
658 | return -EINVAL; | |
14258640 JS |
659 | |
660 | gts = gru_find_lock_gts(cb); | |
661 | if (!gts) | |
662 | return -EINVAL; | |
563447d7 | 663 | gru_dbg(grudev, "address 0x%lx, gid %d, gts 0x%p\n", cb, gts->ts_gru ? gts->ts_gru->gs_gid : -1, gts); |
14258640 | 664 | |
fe5bb6b0 | 665 | if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) |
14258640 | 666 | goto exit; |
14258640 | 667 | |
55484c45 | 668 | gru_check_context_placement(gts); |
fe5bb6b0 | 669 | |
7b8274e9 JS |
670 | /* |
671 | * CCH may contain stale data if ts_force_cch_reload is set. | |
672 | */ | |
673 | if (gts->ts_gru && gts->ts_force_cch_reload) { | |
7b8274e9 | 674 | gts->ts_force_cch_reload = 0; |
99f7c229 | 675 | gru_update_cch(gts); |
7b8274e9 JS |
676 | } |
677 | ||
14258640 JS |
678 | ret = -EAGAIN; |
679 | cbrnum = thread_cbr_number(gts, ucbnum); | |
99f7c229 | 680 | if (gts->ts_gru) { |
14258640 | 681 | tfh = get_tfh_by_index(gts->ts_gru, cbrnum); |
b61fc69b JS |
682 | cbk = get_gseg_base_address_cb(gts->ts_gru->gs_gru_base_vaddr, |
683 | gts->ts_ctxnum, ucbnum); | |
684 | ret = gru_user_dropin(gts, tfh, cbk); | |
14258640 JS |
685 | } |
686 | exit: | |
687 | gru_unlock_gts(gts); | |
688 | return ret; | |
689 | } | |
690 | ||
691 | /* | |
692 | * Fetch the exception detail information for a CB that terminated with | |
693 | * an exception. | |
694 | */ | |
695 | int gru_get_exception_detail(unsigned long arg) | |
696 | { | |
697 | struct control_block_extended_exc_detail excdet; | |
698 | struct gru_control_block_extended *cbe; | |
699 | struct gru_thread_state *gts; | |
700 | int ucbnum, cbrnum, ret; | |
701 | ||
702 | STAT(user_exception); | |
703 | if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet))) | |
704 | return -EFAULT; | |
705 | ||
14258640 JS |
706 | gts = gru_find_lock_gts(excdet.cb); |
707 | if (!gts) | |
708 | return -EINVAL; | |
709 | ||
563447d7 | 710 | gru_dbg(grudev, "address 0x%lx, gid %d, gts 0x%p\n", excdet.cb, gts->ts_gru ? gts->ts_gru->gs_gid : -1, gts); |
fe5bb6b0 JS |
711 | ucbnum = get_cb_number((void *)excdet.cb); |
712 | if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) { | |
713 | ret = -EINVAL; | |
714 | } else if (gts->ts_gru) { | |
14258640 JS |
715 | cbrnum = thread_cbr_number(gts, ucbnum); |
716 | cbe = get_cbe_by_index(gts->ts_gru, cbrnum); | |
1a2c09e3 | 717 | gru_flush_cache(cbe); /* CBE not coherent */ |
67bf04a5 | 718 | sync_core(); /* make sure we are have current data */ |
14258640 JS |
719 | excdet.opc = cbe->opccpy; |
720 | excdet.exopc = cbe->exopccpy; | |
721 | excdet.ecause = cbe->ecause; | |
722 | excdet.exceptdet0 = cbe->idef1upd; | |
723 | excdet.exceptdet1 = cbe->idef3upd; | |
cd1334f0 JS |
724 | excdet.cbrstate = cbe->cbrstate; |
725 | excdet.cbrexecstatus = cbe->cbrexecstatus; | |
c550222f | 726 | gru_flush_cache_cbe(cbe); |
14258640 JS |
727 | ret = 0; |
728 | } else { | |
729 | ret = -EAGAIN; | |
730 | } | |
731 | gru_unlock_gts(gts); | |
732 | ||
cd1334f0 JS |
733 | gru_dbg(grudev, |
734 | "cb 0x%lx, op %d, exopc %d, cbrstate %d, cbrexecstatus 0x%x, ecause 0x%x, " | |
735 | "exdet0 0x%lx, exdet1 0x%x\n", | |
736 | excdet.cb, excdet.opc, excdet.exopc, excdet.cbrstate, excdet.cbrexecstatus, | |
737 | excdet.ecause, excdet.exceptdet0, excdet.exceptdet1); | |
14258640 JS |
738 | if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet))) |
739 | ret = -EFAULT; | |
740 | return ret; | |
741 | } | |
742 | ||
743 | /* | |
744 | * User request to unload a context. Content is saved for possible reload. | |
745 | */ | |
bb04aa78 JS |
746 | static int gru_unload_all_contexts(void) |
747 | { | |
748 | struct gru_thread_state *gts; | |
749 | struct gru_state *gru; | |
e1c3219d | 750 | int gid, ctxnum; |
bb04aa78 JS |
751 | |
752 | if (!capable(CAP_SYS_ADMIN)) | |
753 | return -EPERM; | |
e1c3219d | 754 | foreach_gid(gid) { |
bb04aa78 JS |
755 | gru = GID_TO_GRU(gid); |
756 | spin_lock(&gru->gs_lock); | |
757 | for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) { | |
758 | gts = gru->gs_gts[ctxnum]; | |
759 | if (gts && mutex_trylock(>s->ts_ctxlock)) { | |
760 | spin_unlock(&gru->gs_lock); | |
761 | gru_unload_context(gts, 1); | |
d57c82b1 | 762 | mutex_unlock(>s->ts_ctxlock); |
bb04aa78 JS |
763 | spin_lock(&gru->gs_lock); |
764 | } | |
765 | } | |
766 | spin_unlock(&gru->gs_lock); | |
767 | } | |
768 | return 0; | |
769 | } | |
770 | ||
14258640 JS |
771 | int gru_user_unload_context(unsigned long arg) |
772 | { | |
773 | struct gru_thread_state *gts; | |
774 | struct gru_unload_context_req req; | |
775 | ||
776 | STAT(user_unload_context); | |
777 | if (copy_from_user(&req, (void __user *)arg, sizeof(req))) | |
778 | return -EFAULT; | |
779 | ||
780 | gru_dbg(grudev, "gseg 0x%lx\n", req.gseg); | |
781 | ||
bb04aa78 JS |
782 | if (!req.gseg) |
783 | return gru_unload_all_contexts(); | |
784 | ||
14258640 JS |
785 | gts = gru_find_lock_gts(req.gseg); |
786 | if (!gts) | |
787 | return -EINVAL; | |
788 | ||
789 | if (gts->ts_gru) | |
790 | gru_unload_context(gts, 1); | |
791 | gru_unlock_gts(gts); | |
792 | ||
793 | return 0; | |
794 | } | |
795 | ||
796 | /* | |
797 | * User request to flush a range of virtual addresses from the GRU TLB | |
798 | * (Mainly for testing). | |
799 | */ | |
800 | int gru_user_flush_tlb(unsigned long arg) | |
801 | { | |
802 | struct gru_thread_state *gts; | |
803 | struct gru_flush_tlb_req req; | |
1926ee85 | 804 | struct gru_mm_struct *gms; |
14258640 JS |
805 | |
806 | STAT(user_flush_tlb); | |
807 | if (copy_from_user(&req, (void __user *)arg, sizeof(req))) | |
808 | return -EFAULT; | |
809 | ||
810 | gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg, | |
811 | req.vaddr, req.len); | |
812 | ||
813 | gts = gru_find_lock_gts(req.gseg); | |
814 | if (!gts) | |
815 | return -EINVAL; | |
816 | ||
1926ee85 | 817 | gms = gts->ts_gms; |
14258640 | 818 | gru_unlock_gts(gts); |
1926ee85 | 819 | gru_flush_tlb_range(gms, req.vaddr, req.len); |
14258640 JS |
820 | |
821 | return 0; | |
822 | } | |
823 | ||
7e796a72 JS |
824 | /* |
825 | * Fetch GSEG statisticss | |
826 | */ | |
827 | long gru_get_gseg_statistics(unsigned long arg) | |
828 | { | |
829 | struct gru_thread_state *gts; | |
830 | struct gru_get_gseg_statistics_req req; | |
831 | ||
832 | if (copy_from_user(&req, (void __user *)arg, sizeof(req))) | |
833 | return -EFAULT; | |
834 | ||
091f1a10 JS |
835 | /* |
836 | * The library creates arrays of contexts for threaded programs. | |
837 | * If no gts exists in the array, the context has never been used & all | |
838 | * statistics are implicitly 0. | |
839 | */ | |
7e796a72 JS |
840 | gts = gru_find_lock_gts(req.gseg); |
841 | if (gts) { | |
842 | memcpy(&req.stats, >s->ustats, sizeof(gts->ustats)); | |
843 | gru_unlock_gts(gts); | |
844 | } else { | |
845 | memset(&req.stats, 0, sizeof(gts->ustats)); | |
846 | } | |
847 | ||
848 | if (copy_to_user((void __user *)arg, &req, sizeof(req))) | |
849 | return -EFAULT; | |
850 | ||
851 | return 0; | |
852 | } | |
853 | ||
14258640 JS |
854 | /* |
855 | * Register the current task as the user of the GSEG slice. | |
856 | * Needed for TLB fault interrupt targeting. | |
857 | */ | |
92b39388 | 858 | int gru_set_context_option(unsigned long arg) |
14258640 JS |
859 | { |
860 | struct gru_thread_state *gts; | |
92b39388 JS |
861 | struct gru_set_context_option_req req; |
862 | int ret = 0; | |
14258640 | 863 | |
92b39388 JS |
864 | STAT(set_context_option); |
865 | if (copy_from_user(&req, (void __user *)arg, sizeof(req))) | |
866 | return -EFAULT; | |
867 | gru_dbg(grudev, "op %d, gseg 0x%lx, value1 0x%lx\n", req.op, req.gseg, req.val1); | |
868 | ||
c550222f JS |
869 | gts = gru_find_lock_gts(req.gseg); |
870 | if (!gts) { | |
871 | gts = gru_alloc_locked_gts(req.gseg); | |
872 | if (IS_ERR(gts)) | |
873 | return PTR_ERR(gts); | |
874 | } | |
14258640 | 875 | |
92b39388 | 876 | switch (req.op) { |
518e5cd4 JS |
877 | case sco_blade_chiplet: |
878 | /* Select blade/chiplet for GRU context */ | |
a7d0dabb DS |
879 | if (req.val0 < -1 || req.val0 >= GRU_CHIPLETS_PER_HUB || |
880 | req.val1 < -1 || req.val1 >= GRU_MAX_BLADES || | |
881 | (req.val1 >= 0 && !gru_base[req.val1])) { | |
518e5cd4 JS |
882 | ret = -EINVAL; |
883 | } else { | |
884 | gts->ts_user_blade_id = req.val1; | |
885 | gts->ts_user_chiplet_id = req.val0; | |
55484c45 | 886 | gru_check_context_placement(gts); |
518e5cd4 JS |
887 | } |
888 | break; | |
92b39388 JS |
889 | case sco_gseg_owner: |
890 | /* Register the current task as the GSEG owner */ | |
891 | gts->ts_tgid_owner = current->tgid; | |
892 | break; | |
b1b19fcf JS |
893 | case sco_cch_req_slice: |
894 | /* Set the CCH slice option */ | |
895 | gts->ts_cch_req_slice = req.val1 & 3; | |
896 | break; | |
92b39388 JS |
897 | default: |
898 | ret = -EINVAL; | |
899 | } | |
14258640 JS |
900 | gru_unlock_gts(gts); |
901 | ||
92b39388 | 902 | return ret; |
14258640 | 903 | } |