Commit | Line | Data |
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985b1aa0 MR |
1 | /* |
2 | * sdhci-dove.c Support for SDHCI on Marvell's Dove SoC | |
3 | * | |
4 | * Author: Saeed Bishara <saeed@marvell.com> | |
5 | * Mike Rapoport <mike@compulab.co.il> | |
6 | * Based on sdhci-cns3xxx.c | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
30b87c60 SH |
22 | #include <linux/clk.h> |
23 | #include <linux/err.h> | |
f8ec589b | 24 | #include <linux/io.h> |
985b1aa0 | 25 | #include <linux/mmc/host.h> |
f8ec589b | 26 | #include <linux/module.h> |
4ee7ed0d | 27 | #include <linux/of.h> |
985b1aa0 | 28 | |
985b1aa0 MR |
29 | #include "sdhci-pltfm.h" |
30 | ||
30b87c60 SH |
31 | struct sdhci_dove_priv { |
32 | struct clk *clk; | |
33 | }; | |
34 | ||
985b1aa0 MR |
35 | static u16 sdhci_dove_readw(struct sdhci_host *host, int reg) |
36 | { | |
37 | u16 ret; | |
38 | ||
39 | switch (reg) { | |
40 | case SDHCI_HOST_VERSION: | |
41 | case SDHCI_SLOT_INT_STATUS: | |
42 | /* those registers don't exist */ | |
43 | return 0; | |
44 | default: | |
45 | ret = readw(host->ioaddr + reg); | |
46 | } | |
47 | return ret; | |
48 | } | |
49 | ||
50 | static u32 sdhci_dove_readl(struct sdhci_host *host, int reg) | |
51 | { | |
52 | u32 ret; | |
53 | ||
f8ec589b RK |
54 | ret = readl(host->ioaddr + reg); |
55 | ||
985b1aa0 MR |
56 | switch (reg) { |
57 | case SDHCI_CAPABILITIES: | |
985b1aa0 MR |
58 | /* Mask the support for 3.0V */ |
59 | ret &= ~SDHCI_CAN_VDD_300; | |
60 | break; | |
985b1aa0 MR |
61 | } |
62 | return ret; | |
63 | } | |
64 | ||
c915568d | 65 | static const struct sdhci_ops sdhci_dove_ops = { |
985b1aa0 MR |
66 | .read_w = sdhci_dove_readw, |
67 | .read_l = sdhci_dove_readl, | |
1771059c | 68 | .set_clock = sdhci_set_clock, |
2317f56c | 69 | .set_bus_width = sdhci_set_bus_width, |
03231f9b | 70 | .reset = sdhci_reset, |
96d7b78c | 71 | .set_uhs_signaling = sdhci_set_uhs_signaling, |
985b1aa0 MR |
72 | }; |
73 | ||
1db5eebf | 74 | static const struct sdhci_pltfm_data sdhci_dove_pdata = { |
985b1aa0 MR |
75 | .ops = &sdhci_dove_ops, |
76 | .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | | |
77 | SDHCI_QUIRK_NO_BUSY_IRQ | | |
78 | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | | |
a9ca1d54 SH |
79 | SDHCI_QUIRK_FORCE_DMA | |
80 | SDHCI_QUIRK_NO_HISPD_BIT, | |
985b1aa0 | 81 | }; |
85d6509d | 82 | |
c3be1efd | 83 | static int sdhci_dove_probe(struct platform_device *pdev) |
85d6509d | 84 | { |
30b87c60 SH |
85 | struct sdhci_host *host; |
86 | struct sdhci_pltfm_host *pltfm_host; | |
87 | struct sdhci_dove_priv *priv; | |
88 | int ret; | |
89 | ||
30b87c60 SH |
90 | priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), |
91 | GFP_KERNEL); | |
92 | if (!priv) { | |
93 | dev_err(&pdev->dev, "unable to allocate private data"); | |
ee3298a2 | 94 | return -ENOMEM; |
30b87c60 SH |
95 | } |
96 | ||
7430e77e | 97 | priv->clk = devm_clk_get(&pdev->dev, NULL); |
ee3298a2 | 98 | |
0e748234 | 99 | host = sdhci_pltfm_init(pdev, &sdhci_dove_pdata, 0); |
c5ee2490 SH |
100 | if (IS_ERR(host)) |
101 | return PTR_ERR(host); | |
ee3298a2 | 102 | |
30b87c60 SH |
103 | pltfm_host = sdhci_priv(host); |
104 | pltfm_host->priv = priv; | |
105 | ||
c430689f RK |
106 | if (!IS_ERR(priv->clk)) |
107 | clk_prepare_enable(priv->clk); | |
108 | ||
c5ee2490 SH |
109 | ret = mmc_of_parse(host->mmc); |
110 | if (ret) | |
111 | goto err_sdhci_add; | |
c430689f RK |
112 | |
113 | ret = sdhci_add_host(host); | |
114 | if (ret) | |
115 | goto err_sdhci_add; | |
116 | ||
30b87c60 SH |
117 | return 0; |
118 | ||
c430689f | 119 | err_sdhci_add: |
7430e77e | 120 | if (!IS_ERR(priv->clk)) |
ee3298a2 | 121 | clk_disable_unprepare(priv->clk); |
c430689f | 122 | sdhci_pltfm_free(pdev); |
30b87c60 | 123 | return ret; |
85d6509d SG |
124 | } |
125 | ||
6e0ee714 | 126 | static int sdhci_dove_remove(struct platform_device *pdev) |
85d6509d | 127 | { |
30b87c60 SH |
128 | struct sdhci_host *host = platform_get_drvdata(pdev); |
129 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); | |
130 | struct sdhci_dove_priv *priv = pltfm_host->priv; | |
131 | ||
ee3298a2 RKAL |
132 | sdhci_pltfm_unregister(pdev); |
133 | ||
7430e77e | 134 | if (!IS_ERR(priv->clk)) |
ee3298a2 | 135 | clk_disable_unprepare(priv->clk); |
7430e77e | 136 | |
ee3298a2 | 137 | return 0; |
85d6509d SG |
138 | } |
139 | ||
498d83e7 | 140 | static const struct of_device_id sdhci_dove_of_match_table[] = { |
4ee7ed0d SH |
141 | { .compatible = "marvell,dove-sdhci", }, |
142 | {} | |
143 | }; | |
144 | MODULE_DEVICE_TABLE(of, sdhci_dove_of_match_table); | |
145 | ||
85d6509d SG |
146 | static struct platform_driver sdhci_dove_driver = { |
147 | .driver = { | |
148 | .name = "sdhci-dove", | |
149 | .owner = THIS_MODULE, | |
29495aa0 | 150 | .pm = SDHCI_PLTFM_PMOPS, |
5941fd07 | 151 | .of_match_table = sdhci_dove_of_match_table, |
85d6509d SG |
152 | }, |
153 | .probe = sdhci_dove_probe, | |
0433c143 | 154 | .remove = sdhci_dove_remove, |
85d6509d SG |
155 | }; |
156 | ||
d1f81a64 | 157 | module_platform_driver(sdhci_dove_driver); |
85d6509d SG |
158 | |
159 | MODULE_DESCRIPTION("SDHCI driver for Dove"); | |
160 | MODULE_AUTHOR("Saeed Bishara <saeed@marvell.com>, " | |
161 | "Mike Rapoport <mike@compulab.co.il>"); | |
162 | MODULE_LICENSE("GPL v2"); |