Merge tag 'hsi-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-hsi
[deliverable/linux.git] / drivers / mmc / host / sdhci-pltfm.h
CommitLineData
515033f9
AV
1/*
2 * Copyright 2010 MontaVista Software, LLC.
3 *
4 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef _DRIVERS_MMC_SDHCI_PLTFM_H
12#define _DRIVERS_MMC_SDHCI_PLTFM_H
13
4b711cb1 14#include <linux/clk.h>
85d6509d 15#include <linux/platform_device.h>
f0de8369 16#include "sdhci.h"
20b1597b 17
94cc6a86 18struct sdhci_pltfm_data {
ad1df8c2 19 const struct sdhci_ops *ops;
94cc6a86 20 unsigned int quirks;
ad82ab65 21 unsigned int quirks2;
94cc6a86
SG
22};
23
4b711cb1
WS
24struct sdhci_pltfm_host {
25 struct clk *clk;
e149860d 26 void *priv; /* to handle quirks across io-accessor calls */
e307148f
SG
27
28 /* migrate from sdhci_of_host */
29 unsigned int clock;
30 u16 xfer_mode_shadow;
0e748234
CD
31
32 unsigned long private[0] ____cacheline_aligned;
4b711cb1
WS
33};
34
38576af1 35#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
f0de8369
SG
36/*
37 * These accessors are designed for big endian hosts doing I/O to
38 * little endian controllers incorporating a 32-bit hardware byte swapper.
39 */
40static inline u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
41{
42 return in_be32(host->ioaddr + reg);
43}
44
45static inline u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
46{
47 return in_be16(host->ioaddr + (reg ^ 0x2));
48}
49
50static inline u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
51{
52 return in_8(host->ioaddr + (reg ^ 0x3));
53}
54
55static inline void sdhci_be32bs_writel(struct sdhci_host *host,
56 u32 val, int reg)
57{
58 out_be32(host->ioaddr + reg, val);
59}
60
61static inline void sdhci_be32bs_writew(struct sdhci_host *host,
62 u16 val, int reg)
63{
64 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
65 int base = reg & ~0x3;
66 int shift = (reg & 0x2) * 8;
67
68 switch (reg) {
69 case SDHCI_TRANSFER_MODE:
70 /*
71 * Postpone this write, we must do it together with a
72 * command write that is down below.
73 */
74 pltfm_host->xfer_mode_shadow = val;
75 return;
76 case SDHCI_COMMAND:
77 sdhci_be32bs_writel(host,
78 val << 16 | pltfm_host->xfer_mode_shadow,
79 SDHCI_TRANSFER_MODE);
80 return;
81 }
82 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
83}
84
85static inline void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
86{
87 int base = reg & ~0x3;
88 int shift = (reg & 0x3) * 8;
89
90 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
91}
92#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
38576af1
SG
93
94extern void sdhci_get_of_property(struct platform_device *pdev);
95
85d6509d 96extern struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev,
0e748234
CD
97 const struct sdhci_pltfm_data *pdata,
98 size_t priv_size);
85d6509d
SG
99extern void sdhci_pltfm_free(struct platform_device *pdev);
100
101extern int sdhci_pltfm_register(struct platform_device *pdev,
0e748234
CD
102 const struct sdhci_pltfm_data *pdata,
103 size_t priv_size);
85d6509d
SG
104extern int sdhci_pltfm_unregister(struct platform_device *pdev);
105
d005d943
LPC
106extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
107
0e748234
CD
108static inline void *sdhci_pltfm_priv(struct sdhci_pltfm_host *host)
109{
110 return (void *)host->private;
111}
112
85d6509d 113#ifdef CONFIG_PM
d433dc63
DA
114extern int sdhci_pltfm_suspend(struct device *dev);
115extern int sdhci_pltfm_resume(struct device *dev);
29495aa0
ML
116extern const struct dev_pm_ops sdhci_pltfm_pmops;
117#define SDHCI_PLTFM_PMOPS (&sdhci_pltfm_pmops)
118#else
119#define SDHCI_PLTFM_PMOPS NULL
85d6509d 120#endif
20b1597b 121
515033f9 122#endif /* _DRIVERS_MMC_SDHCI_PLTFM_H */
This page took 0.266412 seconds and 5 git commands to generate.