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b6147490 GL |
1 | /* |
2 | * linux/drivers/mmc/host/tmio_mmc_pio.c | |
3 | * | |
4 | * Copyright (C) 2011 Guennadi Liakhovetski | |
5 | * Copyright (C) 2007 Ian Molton | |
6 | * Copyright (C) 2004 Ian Molton | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * Driver for the MMC / SD / SDIO IP found in: | |
13 | * | |
14 | * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs | |
15 | * | |
16 | * This driver draws mainly on scattered spec sheets, Reverse engineering | |
17 | * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit | |
18 | * support). (Further 4 bit support from a later datasheet). | |
19 | * | |
20 | * TODO: | |
21 | * Investigate using a workqueue for PIO transfers | |
22 | * Eliminate FIXMEs | |
23 | * SDIO support | |
24 | * Better Power management | |
25 | * Handle MMC errors better | |
26 | * double buffer support | |
27 | * | |
28 | */ | |
29 | ||
30 | #include <linux/delay.h> | |
31 | #include <linux/device.h> | |
32 | #include <linux/highmem.h> | |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/io.h> | |
35 | #include <linux/irq.h> | |
36 | #include <linux/mfd/tmio.h> | |
37 | #include <linux/mmc/host.h> | |
cba179ae | 38 | #include <linux/mmc/tmio.h> |
b6147490 GL |
39 | #include <linux/module.h> |
40 | #include <linux/pagemap.h> | |
41 | #include <linux/platform_device.h> | |
e6ee7182 | 42 | #include <linux/pm_runtime.h> |
b6147490 GL |
43 | #include <linux/scatterlist.h> |
44 | #include <linux/workqueue.h> | |
45 | #include <linux/spinlock.h> | |
46 | ||
47 | #include "tmio_mmc.h" | |
48 | ||
b6147490 GL |
49 | void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) |
50 | { | |
54680fe7 SH |
51 | host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); |
52 | sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); | |
b6147490 GL |
53 | } |
54 | ||
55 | void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) | |
56 | { | |
54680fe7 SH |
57 | host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); |
58 | sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); | |
b6147490 GL |
59 | } |
60 | ||
61 | static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) | |
62 | { | |
63 | sd_ctrl_write32(host, CTL_STATUS, ~i); | |
64 | } | |
65 | ||
66 | static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) | |
67 | { | |
68 | host->sg_len = data->sg_len; | |
69 | host->sg_ptr = data->sg; | |
70 | host->sg_orig = data->sg; | |
71 | host->sg_off = 0; | |
72 | } | |
73 | ||
74 | static int tmio_mmc_next_sg(struct tmio_mmc_host *host) | |
75 | { | |
76 | host->sg_ptr = sg_next(host->sg_ptr); | |
77 | host->sg_off = 0; | |
78 | return --host->sg_len; | |
79 | } | |
80 | ||
81 | #ifdef CONFIG_MMC_DEBUG | |
82 | ||
83 | #define STATUS_TO_TEXT(a, status, i) \ | |
84 | do { \ | |
85 | if (status & TMIO_STAT_##a) { \ | |
86 | if (i++) \ | |
87 | printk(" | "); \ | |
88 | printk(#a); \ | |
89 | } \ | |
90 | } while (0) | |
91 | ||
92 | static void pr_debug_status(u32 status) | |
93 | { | |
94 | int i = 0; | |
a3c76eb9 | 95 | pr_debug("status: %08x = ", status); |
b6147490 GL |
96 | STATUS_TO_TEXT(CARD_REMOVE, status, i); |
97 | STATUS_TO_TEXT(CARD_INSERT, status, i); | |
98 | STATUS_TO_TEXT(SIGSTATE, status, i); | |
99 | STATUS_TO_TEXT(WRPROTECT, status, i); | |
100 | STATUS_TO_TEXT(CARD_REMOVE_A, status, i); | |
101 | STATUS_TO_TEXT(CARD_INSERT_A, status, i); | |
102 | STATUS_TO_TEXT(SIGSTATE_A, status, i); | |
103 | STATUS_TO_TEXT(CMD_IDX_ERR, status, i); | |
104 | STATUS_TO_TEXT(STOPBIT_ERR, status, i); | |
105 | STATUS_TO_TEXT(ILL_FUNC, status, i); | |
106 | STATUS_TO_TEXT(CMD_BUSY, status, i); | |
107 | STATUS_TO_TEXT(CMDRESPEND, status, i); | |
108 | STATUS_TO_TEXT(DATAEND, status, i); | |
109 | STATUS_TO_TEXT(CRCFAIL, status, i); | |
110 | STATUS_TO_TEXT(DATATIMEOUT, status, i); | |
111 | STATUS_TO_TEXT(CMDTIMEOUT, status, i); | |
112 | STATUS_TO_TEXT(RXOVERFLOW, status, i); | |
113 | STATUS_TO_TEXT(TXUNDERRUN, status, i); | |
114 | STATUS_TO_TEXT(RXRDY, status, i); | |
115 | STATUS_TO_TEXT(TXRQ, status, i); | |
116 | STATUS_TO_TEXT(ILL_ACCESS, status, i); | |
117 | printk("\n"); | |
118 | } | |
119 | ||
120 | #else | |
121 | #define pr_debug_status(s) do { } while (0) | |
122 | #endif | |
123 | ||
124 | static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) | |
125 | { | |
126 | struct tmio_mmc_host *host = mmc_priv(mmc); | |
127 | ||
128 | if (enable) { | |
129 | host->sdio_irq_enabled = 1; | |
54680fe7 SH |
130 | host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & |
131 | ~TMIO_SDIO_STAT_IOIRQ; | |
b6147490 | 132 | sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); |
54680fe7 | 133 | sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); |
b6147490 | 134 | } else { |
54680fe7 SH |
135 | host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; |
136 | sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); | |
b6147490 GL |
137 | sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); |
138 | host->sdio_irq_enabled = 0; | |
139 | } | |
140 | } | |
141 | ||
142 | static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock) | |
143 | { | |
144 | u32 clk = 0, clock; | |
145 | ||
146 | if (new_clock) { | |
147 | for (clock = host->mmc->f_min, clk = 0x80000080; | |
148 | new_clock >= (clock<<1); clk >>= 1) | |
149 | clock <<= 1; | |
150 | clk |= 0x100; | |
151 | } | |
152 | ||
153 | if (host->set_clk_div) | |
154 | host->set_clk_div(host->pdev, (clk>>22) & 1); | |
155 | ||
156 | sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff); | |
157 | } | |
158 | ||
159 | static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) | |
160 | { | |
69d1fe18 | 161 | struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); |
b6147490 | 162 | |
69d1fe18 GL |
163 | /* implicit BUG_ON(!res) */ |
164 | if (resource_size(res) > 0x100) { | |
165 | sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); | |
166 | msleep(10); | |
167 | } | |
d9b03421 | 168 | |
b6147490 GL |
169 | sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 & |
170 | sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); | |
171 | msleep(10); | |
172 | } | |
173 | ||
174 | static void tmio_mmc_clk_start(struct tmio_mmc_host *host) | |
175 | { | |
69d1fe18 | 176 | struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); |
b6147490 GL |
177 | |
178 | sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 | | |
179 | sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); | |
180 | msleep(10); | |
d9b03421 | 181 | |
69d1fe18 GL |
182 | /* implicit BUG_ON(!res) */ |
183 | if (resource_size(res) > 0x100) { | |
184 | sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); | |
185 | msleep(10); | |
186 | } | |
b6147490 GL |
187 | } |
188 | ||
189 | static void tmio_mmc_reset(struct tmio_mmc_host *host) | |
190 | { | |
69d1fe18 GL |
191 | struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); |
192 | ||
b6147490 GL |
193 | /* FIXME - should we set stop clock reg here */ |
194 | sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); | |
69d1fe18 GL |
195 | /* implicit BUG_ON(!res) */ |
196 | if (resource_size(res) > 0x100) | |
197 | sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); | |
b6147490 GL |
198 | msleep(10); |
199 | sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); | |
69d1fe18 GL |
200 | if (resource_size(res) > 0x100) |
201 | sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); | |
b6147490 GL |
202 | msleep(10); |
203 | } | |
204 | ||
205 | static void tmio_mmc_reset_work(struct work_struct *work) | |
206 | { | |
207 | struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, | |
208 | delayed_reset_work.work); | |
209 | struct mmc_request *mrq; | |
210 | unsigned long flags; | |
211 | ||
212 | spin_lock_irqsave(&host->lock, flags); | |
213 | mrq = host->mrq; | |
214 | ||
df3ef2d3 GL |
215 | /* |
216 | * is request already finished? Since we use a non-blocking | |
217 | * cancel_delayed_work(), it can happen, that a .set_ios() call preempts | |
218 | * us, so, have to check for IS_ERR(host->mrq) | |
219 | */ | |
220 | if (IS_ERR_OR_NULL(mrq) | |
b6147490 GL |
221 | || time_is_after_jiffies(host->last_req_ts + |
222 | msecs_to_jiffies(2000))) { | |
223 | spin_unlock_irqrestore(&host->lock, flags); | |
224 | return; | |
225 | } | |
226 | ||
227 | dev_warn(&host->pdev->dev, | |
228 | "timeout waiting for hardware interrupt (CMD%u)\n", | |
229 | mrq->cmd->opcode); | |
230 | ||
231 | if (host->data) | |
232 | host->data->error = -ETIMEDOUT; | |
233 | else if (host->cmd) | |
234 | host->cmd->error = -ETIMEDOUT; | |
235 | else | |
236 | mrq->cmd->error = -ETIMEDOUT; | |
237 | ||
238 | host->cmd = NULL; | |
239 | host->data = NULL; | |
b6147490 GL |
240 | host->force_pio = false; |
241 | ||
242 | spin_unlock_irqrestore(&host->lock, flags); | |
243 | ||
244 | tmio_mmc_reset(host); | |
245 | ||
df3ef2d3 GL |
246 | /* Ready for new calls */ |
247 | host->mrq = NULL; | |
248 | ||
b6147490 GL |
249 | mmc_request_done(host->mmc, mrq); |
250 | } | |
251 | ||
df3ef2d3 | 252 | /* called with host->lock held, interrupts disabled */ |
b6147490 GL |
253 | static void tmio_mmc_finish_request(struct tmio_mmc_host *host) |
254 | { | |
b9269fdd GL |
255 | struct mmc_request *mrq; |
256 | unsigned long flags; | |
b6147490 | 257 | |
b9269fdd GL |
258 | spin_lock_irqsave(&host->lock, flags); |
259 | ||
260 | mrq = host->mrq; | |
261 | if (IS_ERR_OR_NULL(mrq)) { | |
262 | spin_unlock_irqrestore(&host->lock, flags); | |
b6147490 | 263 | return; |
b9269fdd | 264 | } |
b6147490 | 265 | |
b6147490 GL |
266 | host->cmd = NULL; |
267 | host->data = NULL; | |
268 | host->force_pio = false; | |
269 | ||
270 | cancel_delayed_work(&host->delayed_reset_work); | |
271 | ||
df3ef2d3 | 272 | host->mrq = NULL; |
b9269fdd | 273 | spin_unlock_irqrestore(&host->lock, flags); |
df3ef2d3 | 274 | |
b6147490 GL |
275 | mmc_request_done(host->mmc, mrq); |
276 | } | |
277 | ||
b9269fdd GL |
278 | static void tmio_mmc_done_work(struct work_struct *work) |
279 | { | |
280 | struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, | |
281 | done); | |
282 | tmio_mmc_finish_request(host); | |
283 | } | |
284 | ||
b6147490 GL |
285 | /* These are the bitmasks the tmio chip requires to implement the MMC response |
286 | * types. Note that R1 and R6 are the same in this scheme. */ | |
287 | #define APP_CMD 0x0040 | |
288 | #define RESP_NONE 0x0300 | |
289 | #define RESP_R1 0x0400 | |
290 | #define RESP_R1B 0x0500 | |
291 | #define RESP_R2 0x0600 | |
292 | #define RESP_R3 0x0700 | |
293 | #define DATA_PRESENT 0x0800 | |
294 | #define TRANSFER_READ 0x1000 | |
295 | #define TRANSFER_MULTI 0x2000 | |
296 | #define SECURITY_CMD 0x4000 | |
297 | ||
298 | static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd) | |
299 | { | |
300 | struct mmc_data *data = host->data; | |
301 | int c = cmd->opcode; | |
302 | ||
303 | /* Command 12 is handled by hardware */ | |
304 | if (cmd->opcode == 12 && !cmd->arg) { | |
305 | sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001); | |
306 | return 0; | |
307 | } | |
308 | ||
309 | switch (mmc_resp_type(cmd)) { | |
310 | case MMC_RSP_NONE: c |= RESP_NONE; break; | |
311 | case MMC_RSP_R1: c |= RESP_R1; break; | |
312 | case MMC_RSP_R1B: c |= RESP_R1B; break; | |
313 | case MMC_RSP_R2: c |= RESP_R2; break; | |
314 | case MMC_RSP_R3: c |= RESP_R3; break; | |
315 | default: | |
316 | pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); | |
317 | return -EINVAL; | |
318 | } | |
319 | ||
320 | host->cmd = cmd; | |
321 | ||
322 | /* FIXME - this seems to be ok commented out but the spec suggest this bit | |
323 | * should be set when issuing app commands. | |
324 | * if(cmd->flags & MMC_FLAG_ACMD) | |
325 | * c |= APP_CMD; | |
326 | */ | |
327 | if (data) { | |
328 | c |= DATA_PRESENT; | |
329 | if (data->blocks > 1) { | |
330 | sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100); | |
331 | c |= TRANSFER_MULTI; | |
332 | } | |
333 | if (data->flags & MMC_DATA_READ) | |
334 | c |= TRANSFER_READ; | |
335 | } | |
336 | ||
337 | tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD); | |
338 | ||
339 | /* Fire off the command */ | |
340 | sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg); | |
341 | sd_ctrl_write16(host, CTL_SD_CMD, c); | |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
346 | /* | |
347 | * This chip always returns (at least?) as much data as you ask for. | |
348 | * I'm unsure what happens if you ask for less than a block. This should be | |
25985edc | 349 | * looked into to ensure that a funny length read doesn't hose the controller. |
b6147490 GL |
350 | */ |
351 | static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) | |
352 | { | |
353 | struct mmc_data *data = host->data; | |
354 | void *sg_virt; | |
355 | unsigned short *buf; | |
356 | unsigned int count; | |
357 | unsigned long flags; | |
358 | ||
359 | if ((host->chan_tx || host->chan_rx) && !host->force_pio) { | |
360 | pr_err("PIO IRQ in DMA mode!\n"); | |
361 | return; | |
362 | } else if (!data) { | |
363 | pr_debug("Spurious PIO IRQ\n"); | |
364 | return; | |
365 | } | |
366 | ||
367 | sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); | |
368 | buf = (unsigned short *)(sg_virt + host->sg_off); | |
369 | ||
370 | count = host->sg_ptr->length - host->sg_off; | |
371 | if (count > data->blksz) | |
372 | count = data->blksz; | |
373 | ||
374 | pr_debug("count: %08x offset: %08x flags %08x\n", | |
375 | count, host->sg_off, data->flags); | |
376 | ||
377 | /* Transfer the data */ | |
378 | if (data->flags & MMC_DATA_READ) | |
379 | sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); | |
380 | else | |
381 | sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); | |
382 | ||
383 | host->sg_off += count; | |
384 | ||
385 | tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt); | |
386 | ||
387 | if (host->sg_off == host->sg_ptr->length) | |
388 | tmio_mmc_next_sg(host); | |
389 | ||
390 | return; | |
391 | } | |
392 | ||
393 | static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) | |
394 | { | |
395 | if (host->sg_ptr == &host->bounce_sg) { | |
396 | unsigned long flags; | |
397 | void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); | |
398 | memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); | |
399 | tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); | |
400 | } | |
401 | } | |
402 | ||
403 | /* needs to be called with host->lock held */ | |
404 | void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) | |
405 | { | |
406 | struct mmc_data *data = host->data; | |
407 | struct mmc_command *stop; | |
408 | ||
409 | host->data = NULL; | |
410 | ||
411 | if (!data) { | |
412 | dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); | |
413 | return; | |
414 | } | |
415 | stop = data->stop; | |
416 | ||
417 | /* FIXME - return correct transfer count on errors */ | |
418 | if (!data->error) | |
419 | data->bytes_xfered = data->blocks * data->blksz; | |
420 | else | |
421 | data->bytes_xfered = 0; | |
422 | ||
423 | pr_debug("Completed data request\n"); | |
424 | ||
425 | /* | |
426 | * FIXME: other drivers allow an optional stop command of any given type | |
427 | * which we dont do, as the chip can auto generate them. | |
428 | * Perhaps we can be smarter about when to use auto CMD12 and | |
429 | * only issue the auto request when we know this is the desired | |
430 | * stop command, allowing fallback to the stop command the | |
431 | * upper layers expect. For now, we do what works. | |
432 | */ | |
433 | ||
434 | if (data->flags & MMC_DATA_READ) { | |
435 | if (host->chan_rx && !host->force_pio) | |
436 | tmio_mmc_check_bounce_buffer(host); | |
437 | dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", | |
438 | host->mrq); | |
439 | } else { | |
440 | dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", | |
441 | host->mrq); | |
442 | } | |
443 | ||
444 | if (stop) { | |
445 | if (stop->opcode == 12 && !stop->arg) | |
446 | sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000); | |
447 | else | |
448 | BUG(); | |
449 | } | |
450 | ||
b9269fdd | 451 | schedule_work(&host->done); |
b6147490 GL |
452 | } |
453 | ||
454 | static void tmio_mmc_data_irq(struct tmio_mmc_host *host) | |
455 | { | |
456 | struct mmc_data *data; | |
457 | spin_lock(&host->lock); | |
458 | data = host->data; | |
459 | ||
460 | if (!data) | |
461 | goto out; | |
462 | ||
463 | if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { | |
464 | /* | |
465 | * Has all data been written out yet? Testing on SuperH showed, | |
466 | * that in most cases the first interrupt comes already with the | |
467 | * BUSY status bit clear, but on some operations, like mount or | |
468 | * in the beginning of a write / sync / umount, there is one | |
469 | * DATAEND interrupt with the BUSY bit set, in this cases | |
470 | * waiting for one more interrupt fixes the problem. | |
471 | */ | |
472 | if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) { | |
473 | tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); | |
474 | tasklet_schedule(&host->dma_complete); | |
475 | } | |
476 | } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) { | |
477 | tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); | |
478 | tasklet_schedule(&host->dma_complete); | |
479 | } else { | |
480 | tmio_mmc_do_data_irq(host); | |
481 | tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); | |
482 | } | |
483 | out: | |
484 | spin_unlock(&host->lock); | |
485 | } | |
486 | ||
487 | static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, | |
488 | unsigned int stat) | |
489 | { | |
490 | struct mmc_command *cmd = host->cmd; | |
491 | int i, addr; | |
492 | ||
493 | spin_lock(&host->lock); | |
494 | ||
495 | if (!host->cmd) { | |
496 | pr_debug("Spurious CMD irq\n"); | |
497 | goto out; | |
498 | } | |
499 | ||
500 | host->cmd = NULL; | |
501 | ||
502 | /* This controller is sicker than the PXA one. Not only do we need to | |
503 | * drop the top 8 bits of the first response word, we also need to | |
504 | * modify the order of the response for short response command types. | |
505 | */ | |
506 | ||
507 | for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) | |
508 | cmd->resp[i] = sd_ctrl_read32(host, addr); | |
509 | ||
510 | if (cmd->flags & MMC_RSP_136) { | |
511 | cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); | |
512 | cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); | |
513 | cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); | |
514 | cmd->resp[3] <<= 8; | |
515 | } else if (cmd->flags & MMC_RSP_R3) { | |
516 | cmd->resp[0] = cmd->resp[3]; | |
517 | } | |
518 | ||
519 | if (stat & TMIO_STAT_CMDTIMEOUT) | |
520 | cmd->error = -ETIMEDOUT; | |
521 | else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) | |
522 | cmd->error = -EILSEQ; | |
523 | ||
524 | /* If there is data to handle we enable data IRQs here, and | |
525 | * we will ultimatley finish the request in the data_end handler. | |
526 | * If theres no data or we encountered an error, finish now. | |
527 | */ | |
528 | if (host->data && !cmd->error) { | |
529 | if (host->data->flags & MMC_DATA_READ) { | |
530 | if (host->force_pio || !host->chan_rx) | |
531 | tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); | |
532 | else | |
533 | tasklet_schedule(&host->dma_issue); | |
534 | } else { | |
535 | if (host->force_pio || !host->chan_tx) | |
536 | tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); | |
537 | else | |
538 | tasklet_schedule(&host->dma_issue); | |
539 | } | |
540 | } else { | |
b9269fdd | 541 | schedule_work(&host->done); |
b6147490 GL |
542 | } |
543 | ||
544 | out: | |
545 | spin_unlock(&host->lock); | |
546 | } | |
547 | ||
7729c7a2 SH |
548 | static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host, |
549 | int *ireg, int *status) | |
b6147490 | 550 | { |
7729c7a2 SH |
551 | *status = sd_ctrl_read32(host, CTL_STATUS); |
552 | *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; | |
b6147490 | 553 | |
7729c7a2 SH |
554 | pr_debug_status(*status); |
555 | pr_debug_status(*ireg); | |
556 | } | |
b6147490 | 557 | |
7729c7a2 SH |
558 | static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, |
559 | int ireg, int status) | |
560 | { | |
561 | struct mmc_host *mmc = host->mmc; | |
b6147490 | 562 | |
e312eb1e PP |
563 | /* Card insert / remove attempts */ |
564 | if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { | |
565 | tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | | |
566 | TMIO_STAT_CARD_REMOVE); | |
71d111cd GL |
567 | if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || |
568 | ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && | |
569 | !work_pending(&mmc->detect.work)) | |
b9269fdd | 570 | mmc_detect_change(host->mmc, msecs_to_jiffies(100)); |
7729c7a2 | 571 | return true; |
b6147490 GL |
572 | } |
573 | ||
7729c7a2 SH |
574 | return false; |
575 | } | |
576 | ||
577 | irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid) | |
578 | { | |
579 | unsigned int ireg, status; | |
580 | struct tmio_mmc_host *host = devid; | |
b6147490 | 581 | |
7729c7a2 SH |
582 | tmio_mmc_card_irq_status(host, &ireg, &status); |
583 | __tmio_mmc_card_detect_irq(host, ireg, status); | |
584 | ||
585 | return IRQ_HANDLED; | |
586 | } | |
587 | EXPORT_SYMBOL(tmio_mmc_card_detect_irq); | |
588 | ||
589 | static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, | |
590 | int ireg, int status) | |
591 | { | |
e312eb1e PP |
592 | /* Command completion */ |
593 | if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { | |
594 | tmio_mmc_ack_mmc_irqs(host, | |
595 | TMIO_STAT_CMDRESPEND | | |
596 | TMIO_STAT_CMDTIMEOUT); | |
597 | tmio_mmc_cmd_irq(host, status); | |
7729c7a2 | 598 | return true; |
e312eb1e | 599 | } |
b6147490 | 600 | |
e312eb1e PP |
601 | /* Data transfer */ |
602 | if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { | |
603 | tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); | |
604 | tmio_mmc_pio_irq(host); | |
7729c7a2 | 605 | return true; |
e312eb1e | 606 | } |
b6147490 | 607 | |
e312eb1e PP |
608 | /* Data transfer completion */ |
609 | if (ireg & TMIO_STAT_DATAEND) { | |
610 | tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); | |
611 | tmio_mmc_data_irq(host); | |
7729c7a2 | 612 | return true; |
b6147490 | 613 | } |
e312eb1e | 614 | |
7729c7a2 SH |
615 | return false; |
616 | } | |
617 | ||
618 | irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid) | |
619 | { | |
620 | unsigned int ireg, status; | |
621 | struct tmio_mmc_host *host = devid; | |
622 | ||
623 | tmio_mmc_card_irq_status(host, &ireg, &status); | |
624 | __tmio_mmc_sdcard_irq(host, ireg, status); | |
625 | ||
626 | return IRQ_HANDLED; | |
627 | } | |
628 | EXPORT_SYMBOL(tmio_mmc_sdcard_irq); | |
629 | ||
630 | irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid) | |
631 | { | |
632 | struct tmio_mmc_host *host = devid; | |
633 | struct mmc_host *mmc = host->mmc; | |
634 | struct tmio_mmc_data *pdata = host->pdata; | |
635 | unsigned int ireg, status; | |
636 | ||
637 | if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) | |
638 | return IRQ_HANDLED; | |
639 | ||
640 | status = sd_ctrl_read16(host, CTL_SDIO_STATUS); | |
641 | ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask; | |
642 | ||
643 | sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL); | |
644 | ||
645 | if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) | |
646 | mmc_signal_sdio_irq(mmc); | |
647 | ||
648 | return IRQ_HANDLED; | |
649 | } | |
650 | EXPORT_SYMBOL(tmio_mmc_sdio_irq); | |
651 | ||
652 | irqreturn_t tmio_mmc_irq(int irq, void *devid) | |
653 | { | |
654 | struct tmio_mmc_host *host = devid; | |
655 | unsigned int ireg, status; | |
656 | ||
657 | pr_debug("MMC IRQ begin\n"); | |
658 | ||
659 | tmio_mmc_card_irq_status(host, &ireg, &status); | |
660 | if (__tmio_mmc_card_detect_irq(host, ireg, status)) | |
661 | return IRQ_HANDLED; | |
662 | if (__tmio_mmc_sdcard_irq(host, ireg, status)) | |
663 | return IRQ_HANDLED; | |
664 | ||
665 | tmio_mmc_sdio_irq(irq, devid); | |
b6147490 | 666 | |
b6147490 GL |
667 | return IRQ_HANDLED; |
668 | } | |
8e7bfdb3 | 669 | EXPORT_SYMBOL(tmio_mmc_irq); |
b6147490 GL |
670 | |
671 | static int tmio_mmc_start_data(struct tmio_mmc_host *host, | |
672 | struct mmc_data *data) | |
673 | { | |
674 | struct tmio_mmc_data *pdata = host->pdata; | |
675 | ||
676 | pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", | |
677 | data->blksz, data->blocks); | |
678 | ||
679 | /* Some hardware cannot perform 2 byte requests in 4 bit mode */ | |
680 | if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) { | |
681 | int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; | |
682 | ||
683 | if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { | |
684 | pr_err("%s: %d byte block unsupported in 4 bit mode\n", | |
685 | mmc_hostname(host->mmc), data->blksz); | |
686 | return -EINVAL; | |
687 | } | |
688 | } | |
689 | ||
690 | tmio_mmc_init_sg(host, data); | |
691 | host->data = data; | |
692 | ||
693 | /* Set transfer length / blocksize */ | |
694 | sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); | |
695 | sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); | |
696 | ||
697 | tmio_mmc_start_dma(host, data); | |
698 | ||
699 | return 0; | |
700 | } | |
701 | ||
702 | /* Process requests from the MMC layer */ | |
703 | static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) | |
704 | { | |
705 | struct tmio_mmc_host *host = mmc_priv(mmc); | |
df3ef2d3 | 706 | unsigned long flags; |
b6147490 GL |
707 | int ret; |
708 | ||
df3ef2d3 GL |
709 | spin_lock_irqsave(&host->lock, flags); |
710 | ||
711 | if (host->mrq) { | |
b6147490 | 712 | pr_debug("request not null\n"); |
df3ef2d3 GL |
713 | if (IS_ERR(host->mrq)) { |
714 | spin_unlock_irqrestore(&host->lock, flags); | |
715 | mrq->cmd->error = -EAGAIN; | |
716 | mmc_request_done(mmc, mrq); | |
717 | return; | |
718 | } | |
719 | } | |
b6147490 GL |
720 | |
721 | host->last_req_ts = jiffies; | |
722 | wmb(); | |
723 | host->mrq = mrq; | |
724 | ||
df3ef2d3 GL |
725 | spin_unlock_irqrestore(&host->lock, flags); |
726 | ||
b6147490 GL |
727 | if (mrq->data) { |
728 | ret = tmio_mmc_start_data(host, mrq->data); | |
729 | if (ret) | |
730 | goto fail; | |
731 | } | |
732 | ||
733 | ret = tmio_mmc_start_command(host, mrq->cmd); | |
734 | if (!ret) { | |
735 | schedule_delayed_work(&host->delayed_reset_work, | |
736 | msecs_to_jiffies(2000)); | |
737 | return; | |
738 | } | |
739 | ||
740 | fail: | |
b6147490 | 741 | host->force_pio = false; |
df3ef2d3 | 742 | host->mrq = NULL; |
b6147490 GL |
743 | mrq->cmd->error = ret; |
744 | mmc_request_done(mmc, mrq); | |
745 | } | |
746 | ||
747 | /* Set MMC clock / power. | |
748 | * Note: This controller uses a simple divider scheme therefore it cannot | |
749 | * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as | |
750 | * MMC wont run that fast, it has to be clocked at 12MHz which is the next | |
751 | * slowest setting. | |
752 | */ | |
753 | static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |
754 | { | |
755 | struct tmio_mmc_host *host = mmc_priv(mmc); | |
7311bef0 | 756 | struct tmio_mmc_data *pdata = host->pdata; |
df3ef2d3 GL |
757 | unsigned long flags; |
758 | ||
b9269fdd GL |
759 | mutex_lock(&host->ios_lock); |
760 | ||
df3ef2d3 GL |
761 | spin_lock_irqsave(&host->lock, flags); |
762 | if (host->mrq) { | |
763 | if (IS_ERR(host->mrq)) { | |
764 | dev_dbg(&host->pdev->dev, | |
765 | "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", | |
766 | current->comm, task_pid_nr(current), | |
767 | ios->clock, ios->power_mode); | |
768 | host->mrq = ERR_PTR(-EINTR); | |
769 | } else { | |
770 | dev_dbg(&host->pdev->dev, | |
771 | "%s.%d: CMD%u active since %lu, now %lu!\n", | |
772 | current->comm, task_pid_nr(current), | |
773 | host->mrq->cmd->opcode, host->last_req_ts, jiffies); | |
774 | } | |
775 | spin_unlock_irqrestore(&host->lock, flags); | |
b9269fdd GL |
776 | |
777 | mutex_unlock(&host->ios_lock); | |
df3ef2d3 GL |
778 | return; |
779 | } | |
780 | ||
781 | host->mrq = ERR_PTR(-EBUSY); | |
782 | ||
783 | spin_unlock_irqrestore(&host->lock, flags); | |
b6147490 | 784 | |
71d111cd GL |
785 | /* |
786 | * pdata->power == false only if COLD_CD is available, otherwise only | |
787 | * in short time intervals during probing or resuming | |
788 | */ | |
789 | if (ios->power_mode == MMC_POWER_ON && ios->clock) { | |
790 | if (!pdata->power) { | |
7311bef0 GL |
791 | pm_runtime_get_sync(&host->pdev->dev); |
792 | pdata->power = true; | |
793 | } | |
71d111cd | 794 | tmio_mmc_set_clock(host, ios->clock); |
c919c2a0 GL |
795 | /* power up SD bus */ |
796 | if (host->set_pwr) | |
797 | host->set_pwr(host->pdev, 1); | |
5fd01579 GL |
798 | /* start bus clock */ |
799 | tmio_mmc_clk_start(host); | |
71d111cd | 800 | } else if (ios->power_mode != MMC_POWER_UP) { |
f6b8b52c | 801 | if (host->set_pwr && ios->power_mode == MMC_POWER_OFF) |
71d111cd | 802 | host->set_pwr(host->pdev, 0); |
cbb18b30 | 803 | if (pdata->power) { |
71d111cd GL |
804 | pdata->power = false; |
805 | pm_runtime_put(&host->pdev->dev); | |
806 | } | |
807 | tmio_mmc_clk_stop(host); | |
b6147490 GL |
808 | } |
809 | ||
810 | switch (ios->bus_width) { | |
811 | case MMC_BUS_WIDTH_1: | |
812 | sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); | |
813 | break; | |
814 | case MMC_BUS_WIDTH_4: | |
815 | sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); | |
816 | break; | |
817 | } | |
818 | ||
819 | /* Let things settle. delay taken from winCE driver */ | |
820 | udelay(140); | |
df3ef2d3 GL |
821 | if (PTR_ERR(host->mrq) == -EINTR) |
822 | dev_dbg(&host->pdev->dev, | |
823 | "%s.%d: IOS interrupted: clk %u, mode %u", | |
824 | current->comm, task_pid_nr(current), | |
825 | ios->clock, ios->power_mode); | |
826 | host->mrq = NULL; | |
b9269fdd GL |
827 | |
828 | mutex_unlock(&host->ios_lock); | |
b6147490 GL |
829 | } |
830 | ||
831 | static int tmio_mmc_get_ro(struct mmc_host *mmc) | |
832 | { | |
833 | struct tmio_mmc_host *host = mmc_priv(mmc); | |
834 | struct tmio_mmc_data *pdata = host->pdata; | |
835 | ||
7d8b4c2a GL |
836 | return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || |
837 | (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); | |
b6147490 GL |
838 | } |
839 | ||
840 | static int tmio_mmc_get_cd(struct mmc_host *mmc) | |
841 | { | |
842 | struct tmio_mmc_host *host = mmc_priv(mmc); | |
843 | struct tmio_mmc_data *pdata = host->pdata; | |
844 | ||
845 | if (!pdata->get_cd) | |
846 | return -ENOSYS; | |
847 | else | |
848 | return pdata->get_cd(host->pdev); | |
849 | } | |
850 | ||
851 | static const struct mmc_host_ops tmio_mmc_ops = { | |
852 | .request = tmio_mmc_request, | |
853 | .set_ios = tmio_mmc_set_ios, | |
854 | .get_ro = tmio_mmc_get_ro, | |
855 | .get_cd = tmio_mmc_get_cd, | |
856 | .enable_sdio_irq = tmio_mmc_enable_sdio_irq, | |
857 | }; | |
858 | ||
859 | int __devinit tmio_mmc_host_probe(struct tmio_mmc_host **host, | |
860 | struct platform_device *pdev, | |
861 | struct tmio_mmc_data *pdata) | |
862 | { | |
863 | struct tmio_mmc_host *_host; | |
864 | struct mmc_host *mmc; | |
865 | struct resource *res_ctl; | |
866 | int ret; | |
867 | u32 irq_mask = TMIO_MASK_CMD; | |
868 | ||
869 | res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
870 | if (!res_ctl) | |
871 | return -EINVAL; | |
872 | ||
873 | mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); | |
874 | if (!mmc) | |
875 | return -ENOMEM; | |
876 | ||
7311bef0 | 877 | pdata->dev = &pdev->dev; |
b6147490 GL |
878 | _host = mmc_priv(mmc); |
879 | _host->pdata = pdata; | |
880 | _host->mmc = mmc; | |
881 | _host->pdev = pdev; | |
882 | platform_set_drvdata(pdev, mmc); | |
883 | ||
884 | _host->set_pwr = pdata->set_pwr; | |
885 | _host->set_clk_div = pdata->set_clk_div; | |
886 | ||
887 | /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ | |
888 | _host->bus_shift = resource_size(res_ctl) >> 10; | |
889 | ||
890 | _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl)); | |
891 | if (!_host->ctl) { | |
892 | ret = -ENOMEM; | |
893 | goto host_free; | |
894 | } | |
895 | ||
896 | mmc->ops = &tmio_mmc_ops; | |
897 | mmc->caps = MMC_CAP_4_BIT_DATA | pdata->capabilities; | |
898 | mmc->f_max = pdata->hclk; | |
899 | mmc->f_min = mmc->f_max / 512; | |
900 | mmc->max_segs = 32; | |
901 | mmc->max_blk_size = 512; | |
902 | mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) * | |
903 | mmc->max_segs; | |
904 | mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; | |
905 | mmc->max_seg_size = mmc->max_req_size; | |
906 | if (pdata->ocr_mask) | |
907 | mmc->ocr_avail = pdata->ocr_mask; | |
908 | else | |
909 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; | |
910 | ||
7311bef0 | 911 | pdata->power = false; |
e6ee7182 GL |
912 | pm_runtime_enable(&pdev->dev); |
913 | ret = pm_runtime_resume(&pdev->dev); | |
914 | if (ret < 0) | |
915 | goto pm_disable; | |
916 | ||
cbb18b30 BH |
917 | /* |
918 | * There are 4 different scenarios for the card detection: | |
919 | * 1) an external gpio irq handles the cd (best for power savings) | |
920 | * 2) internal sdhi irq handles the cd | |
921 | * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL | |
922 | * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE | |
923 | * | |
924 | * While we increment the rtpm counter for all scenarios when the mmc | |
925 | * core activates us by calling an appropriate set_ios(), we must | |
926 | * additionally ensure that in case 2) the tmio mmc hardware stays | |
927 | * powered on during runtime for the card detection to work. | |
928 | */ | |
929 | if (!(pdata->flags & TMIO_MMC_HAS_COLD_CD | |
930 | || mmc->caps & MMC_CAP_NEEDS_POLL | |
931 | || mmc->caps & MMC_CAP_NONREMOVABLE)) | |
932 | pm_runtime_get_noresume(&pdev->dev); | |
933 | ||
b6147490 GL |
934 | tmio_mmc_clk_stop(_host); |
935 | tmio_mmc_reset(_host); | |
936 | ||
54680fe7 | 937 | _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK); |
b6147490 GL |
938 | tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); |
939 | if (pdata->flags & TMIO_MMC_SDIO_IRQ) | |
940 | tmio_mmc_enable_sdio_irq(mmc, 0); | |
941 | ||
b6147490 | 942 | spin_lock_init(&_host->lock); |
b9269fdd | 943 | mutex_init(&_host->ios_lock); |
b6147490 GL |
944 | |
945 | /* Init delayed work for request timeouts */ | |
946 | INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); | |
b9269fdd | 947 | INIT_WORK(&_host->done, tmio_mmc_done_work); |
b6147490 GL |
948 | |
949 | /* See if we also get DMA */ | |
950 | tmio_mmc_request_dma(_host, pdata); | |
951 | ||
952 | mmc_add_host(mmc); | |
953 | ||
954 | /* Unmask the IRQs we want to know about */ | |
955 | if (!_host->chan_rx) | |
956 | irq_mask |= TMIO_MASK_READOP; | |
957 | if (!_host->chan_tx) | |
958 | irq_mask |= TMIO_MASK_WRITEOP; | |
959 | ||
960 | tmio_mmc_enable_mmc_irqs(_host, irq_mask); | |
961 | ||
962 | *host = _host; | |
963 | ||
964 | return 0; | |
965 | ||
e6ee7182 GL |
966 | pm_disable: |
967 | pm_runtime_disable(&pdev->dev); | |
b6147490 GL |
968 | iounmap(_host->ctl); |
969 | host_free: | |
970 | mmc_free_host(mmc); | |
971 | ||
972 | return ret; | |
973 | } | |
974 | EXPORT_SYMBOL(tmio_mmc_host_probe); | |
975 | ||
976 | void tmio_mmc_host_remove(struct tmio_mmc_host *host) | |
977 | { | |
e6ee7182 GL |
978 | struct platform_device *pdev = host->pdev; |
979 | ||
7311bef0 GL |
980 | /* |
981 | * We don't have to manipulate pdata->power here: if there is a card in | |
982 | * the slot, the runtime PM is active and our .runtime_resume() will not | |
983 | * be run. If there is no card in the slot and the platform can suspend | |
984 | * the controller, the runtime PM is suspended and pdata->power == false, | |
985 | * so, our .runtime_resume() will not try to detect a card in the slot. | |
986 | */ | |
cbb18b30 BH |
987 | if (host->pdata->flags & TMIO_MMC_HAS_COLD_CD |
988 | || host->mmc->caps & MMC_CAP_NEEDS_POLL | |
989 | || host->mmc->caps & MMC_CAP_NONREMOVABLE) | |
7311bef0 GL |
990 | pm_runtime_get_sync(&pdev->dev); |
991 | ||
b6147490 | 992 | mmc_remove_host(host->mmc); |
b9269fdd | 993 | cancel_work_sync(&host->done); |
b6147490 GL |
994 | cancel_delayed_work_sync(&host->delayed_reset_work); |
995 | tmio_mmc_release_dma(host); | |
e6ee7182 | 996 | |
e6ee7182 GL |
997 | pm_runtime_put_sync(&pdev->dev); |
998 | pm_runtime_disable(&pdev->dev); | |
7311bef0 GL |
999 | |
1000 | iounmap(host->ctl); | |
1001 | mmc_free_host(host->mmc); | |
b6147490 GL |
1002 | } |
1003 | EXPORT_SYMBOL(tmio_mmc_host_remove); | |
1004 | ||
e6ee7182 GL |
1005 | #ifdef CONFIG_PM |
1006 | int tmio_mmc_host_suspend(struct device *dev) | |
1007 | { | |
1008 | struct mmc_host *mmc = dev_get_drvdata(dev); | |
1009 | struct tmio_mmc_host *host = mmc_priv(mmc); | |
1010 | int ret = mmc_suspend_host(mmc); | |
1011 | ||
1012 | if (!ret) | |
1013 | tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); | |
1014 | ||
1015 | host->pm_error = pm_runtime_put_sync(dev); | |
1016 | ||
1017 | return ret; | |
1018 | } | |
1019 | EXPORT_SYMBOL(tmio_mmc_host_suspend); | |
1020 | ||
1021 | int tmio_mmc_host_resume(struct device *dev) | |
1022 | { | |
1023 | struct mmc_host *mmc = dev_get_drvdata(dev); | |
1024 | struct tmio_mmc_host *host = mmc_priv(mmc); | |
1025 | ||
7311bef0 GL |
1026 | /* The MMC core will perform the complete set up */ |
1027 | host->pdata->power = false; | |
1028 | ||
71d111cd | 1029 | host->pm_global = true; |
e6ee7182 GL |
1030 | if (!host->pm_error) |
1031 | pm_runtime_get_sync(dev); | |
1032 | ||
71d111cd GL |
1033 | if (host->pm_global) { |
1034 | /* Runtime PM resume callback didn't run */ | |
1035 | tmio_mmc_reset(host); | |
162f43e3 | 1036 | tmio_mmc_enable_dma(host, true); |
71d111cd GL |
1037 | host->pm_global = false; |
1038 | } | |
e6ee7182 GL |
1039 | |
1040 | return mmc_resume_host(mmc); | |
1041 | } | |
1042 | EXPORT_SYMBOL(tmio_mmc_host_resume); | |
1043 | ||
1044 | #endif /* CONFIG_PM */ | |
1045 | ||
7311bef0 GL |
1046 | int tmio_mmc_host_runtime_suspend(struct device *dev) |
1047 | { | |
1048 | return 0; | |
1049 | } | |
1050 | EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend); | |
1051 | ||
1052 | int tmio_mmc_host_runtime_resume(struct device *dev) | |
1053 | { | |
1054 | struct mmc_host *mmc = dev_get_drvdata(dev); | |
1055 | struct tmio_mmc_host *host = mmc_priv(mmc); | |
1056 | struct tmio_mmc_data *pdata = host->pdata; | |
1057 | ||
1058 | tmio_mmc_reset(host); | |
162f43e3 | 1059 | tmio_mmc_enable_dma(host, true); |
7311bef0 GL |
1060 | |
1061 | if (pdata->power) { | |
1062 | /* Only entered after a card-insert interrupt */ | |
71d111cd GL |
1063 | if (!mmc->card) |
1064 | tmio_mmc_set_ios(mmc, &mmc->ios); | |
7311bef0 GL |
1065 | mmc_detect_change(mmc, msecs_to_jiffies(100)); |
1066 | } | |
71d111cd | 1067 | host->pm_global = false; |
7311bef0 GL |
1068 | |
1069 | return 0; | |
1070 | } | |
1071 | EXPORT_SYMBOL(tmio_mmc_host_runtime_resume); | |
1072 | ||
b6147490 | 1073 | MODULE_LICENSE("GPL v2"); |