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[MMC] sdhci: more DMA capabilities tests
[deliverable/linux.git] / drivers / mmc / sdhci.c
CommitLineData
d129bceb
PO		 1/*
2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
d129bceb
PO		 11#include <linux/delay.h>
12#include <linux/highmem.h>
13#include <linux/pci.h>
14#include <linux/dma-mapping.h>
15
16#include <linux/mmc/host.h>
17#include <linux/mmc/protocol.h>
18
19#include <asm/scatterlist.h>
20
21#include "sdhci.h"
22
23#define DRIVER_NAME "sdhci"
24#define DRIVER_VERSION "0.11"
25
26#define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
27
d129bceb 28#define DBG(f, x...) \
c6563178 29 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
d129bceb 30
67435274
PO		 31static unsigned int debug_nodma = 0;
32static unsigned int debug_forcedma = 0;
33
d129bceb
PO		 34static const struct pci_device_id pci_ids[] __devinitdata = {
35 /* handle any SD host controller */
36 {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)},
37 { /* end: all zeroes */ },
38};
39
40MODULE_DEVICE_TABLE(pci, pci_ids);
41
42static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
43static void sdhci_finish_data(struct sdhci_host *);
44
45static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
46static void sdhci_finish_command(struct sdhci_host *);
47
48static void sdhci_dumpregs(struct sdhci_host *host)
49{
50 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
51
52 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
53 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
54 readw(host->ioaddr + SDHCI_HOST_VERSION));
55 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
56 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
57 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
58 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
59 readl(host->ioaddr + SDHCI_ARGUMENT),
60 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
61 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
62 readl(host->ioaddr + SDHCI_PRESENT_STATE),
63 readb(host->ioaddr + SDHCI_HOST_CONTROL));
64 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
65 readb(host->ioaddr + SDHCI_POWER_CONTROL),
66 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
67 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
68 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
69 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
70 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
71 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
72 readl(host->ioaddr + SDHCI_INT_STATUS));
73 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
74 readl(host->ioaddr + SDHCI_INT_ENABLE),
75 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
76 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
77 readw(host->ioaddr + SDHCI_ACMD12_ERR),
78 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
79 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
80 readl(host->ioaddr + SDHCI_CAPABILITIES),
81 readl(host->ioaddr + SDHCI_MAX_CURRENT));
82
83 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
84}
85
86/*****************************************************************************\
87 * *
88 * Low level functions *
89 * *
90\*****************************************************************************/
91
92static void sdhci_reset(struct sdhci_host *host, u8 mask)
93{
e16514d8
PO		 94 unsigned long timeout;
95
d129bceb
PO		 96 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
97
e16514d8 98 if (mask & SDHCI_RESET_ALL)
d129bceb
PO		 99 host->clock = 0;
100
e16514d8
PO		 101 /* Wait max 100 ms */
102 timeout = 100;
103
104 /* hw clears the bit when it's done */
105 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
106 if (timeout == 0) {
107 printk(KERN_ERR "%s: Reset 0x%x never completed. "
108 "Please report this to " BUGMAIL ".\n",
109 mmc_hostname(host->mmc), (int)mask);
110 sdhci_dumpregs(host);
111 return;
112 }
113 timeout--;
114 mdelay(1);
d129bceb
PO		 115 }
116}
117
118static void sdhci_init(struct sdhci_host *host)
119{
120 u32 intmask;
121
122 sdhci_reset(host, SDHCI_RESET_ALL);
123
3192a28f
PO		 124 intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
125 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
126 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
127 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
a406f5a3 128 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
3192a28f 129 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
d129bceb
PO		 130
131 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
132 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
d129bceb
PO		 133}
134
135static void sdhci_activate_led(struct sdhci_host *host)
136{
137 u8 ctrl;
138
139 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
140 ctrl |= SDHCI_CTRL_LED;
141 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
142}
143
144static void sdhci_deactivate_led(struct sdhci_host *host)
145{
146 u8 ctrl;
147
148 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
149 ctrl &= ~SDHCI_CTRL_LED;
150 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
151}
152
153/*****************************************************************************\
154 * *
155 * Core functions *
156 * *
157\*****************************************************************************/
158
159static inline char* sdhci_kmap_sg(struct sdhci_host* host)
160{
161 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
162 return host->mapped_sg + host->cur_sg->offset;
163}
164
165static inline void sdhci_kunmap_sg(struct sdhci_host* host)
166{
167 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
168}
169
170static inline int sdhci_next_sg(struct sdhci_host* host)
171{
172 /*
173 * Skip to next SG entry.
174 */
175 host->cur_sg++;
176 host->num_sg--;
177
178 /*
179 * Any entries left?
180 */
181 if (host->num_sg > 0) {
182 host->offset = 0;
183 host->remain = host->cur_sg->length;
184 }
185
186 return host->num_sg;
187}
188
a406f5a3 189static void sdhci_read_block_pio(struct sdhci_host *host)
d129bceb 190{
a406f5a3
PO		 191 int blksize, chunk_remain;
192 u32 data;
d129bceb 193 char *buffer;
a406f5a3 194 int size;
d129bceb 195
a406f5a3 196 DBG("PIO reading\n");
d129bceb 197
a406f5a3
PO		 198 blksize = host->data->blksz;
199 chunk_remain = 0;
200 data = 0;
d129bceb
PO		 201
202 buffer = sdhci_kmap_sg(host) + host->offset;
203
a406f5a3
PO		 204 while (blksize) {
205 if (chunk_remain == 0) {
206 data = readl(host->ioaddr + SDHCI_BUFFER);
207 chunk_remain = min(blksize, 4);
208 }
d129bceb 209
a406f5a3
PO		 210 size = min(host->size, host->remain);
211 size = min(size, chunk_remain);
d129bceb 212
a406f5a3
PO		 213 chunk_remain -= size;
214 blksize -= size;
215 host->offset += size;
216 host->remain -= size;
217 host->size -= size;
218 while (size) {
219 *buffer = data & 0xFF;
220 buffer++;
221 data >>= 8;
222 size--;
223 }
d129bceb 224
a406f5a3
PO		 225 if (host->remain == 0) {
226 sdhci_kunmap_sg(host);
227 if (sdhci_next_sg(host) == 0) {
228 BUG_ON(blksize != 0);
229 return;
230 }
231 buffer = sdhci_kmap_sg(host);
d129bceb 232 }
a406f5a3 233 }
d129bceb 234
a406f5a3
PO		 235 sdhci_kunmap_sg(host);
236}
d129bceb 237
a406f5a3
PO		 238static void sdhci_write_block_pio(struct sdhci_host *host)
239{
240 int blksize, chunk_remain;
241 u32 data;
242 char *buffer;
243 int bytes, size;
d129bceb 244
a406f5a3
PO		 245 DBG("PIO writing\n");
246
247 blksize = host->data->blksz;
248 chunk_remain = 4;
249 data = 0;
250
251 bytes = 0;
252 buffer = sdhci_kmap_sg(host) + host->offset;
d129bceb 253
a406f5a3
PO		 254 while (blksize) {
255 size = min(host->size, host->remain);
256 size = min(size, chunk_remain);
257
258 chunk_remain -= size;
259 blksize -= size;
d129bceb
PO		 260 host->offset += size;
261 host->remain -= size;
d129bceb 262 host->size -= size;
a406f5a3
PO		 263 while (size) {
264 data >>= 8;
265 data |= (u32)*buffer << 24;
266 buffer++;
267 size--;
268 }
269
270 if (chunk_remain == 0) {
271 writel(data, host->ioaddr + SDHCI_BUFFER);
272 chunk_remain = min(blksize, 4);
273 }
d129bceb
PO		 274
275 if (host->remain == 0) {
276 sdhci_kunmap_sg(host);
277 if (sdhci_next_sg(host) == 0) {
a406f5a3 278 BUG_ON(blksize != 0);
d129bceb
PO		 279 return;
280 }
281 buffer = sdhci_kmap_sg(host);
282 }
283 }
284
285 sdhci_kunmap_sg(host);
a406f5a3
PO		 286}
287
288static void sdhci_transfer_pio(struct sdhci_host *host)
289{
290 u32 mask;
291
292 BUG_ON(!host->data);
293
294 if (host->size == 0)
295 return;
296
297 if (host->data->flags & MMC_DATA_READ)
298 mask = SDHCI_DATA_AVAILABLE;
299 else
300 mask = SDHCI_SPACE_AVAILABLE;
301
302 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
303 if (host->data->flags & MMC_DATA_READ)
304 sdhci_read_block_pio(host);
305 else
306 sdhci_write_block_pio(host);
307
308 if (host->size == 0)
309 break;
310
311 BUG_ON(host->num_sg == 0);
312 }
d129bceb 313
a406f5a3 314 DBG("PIO transfer complete.\n");
d129bceb
PO		 315}
316
317static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
318{
1c8cde92
PO		 319 u8 count;
320 unsigned target_timeout, current_timeout;
d129bceb
PO		 321
322 WARN_ON(host->data);
323
c7fa9963 324 if (data == NULL)
d129bceb 325 return;
d129bceb
PO		 326
327 DBG("blksz %04x blks %04x flags %08x\n",
a3fd4a1b 328 data->blksz, data->blocks, data->flags);
d129bceb
PO		 329 DBG("tsac %d ms nsac %d clk\n",
330 data->timeout_ns / 1000000, data->timeout_clks);
331
bab76961
PO		 332 /* Sanity checks */
333 BUG_ON(data->blksz * data->blocks > 524288);
1d676e02
PO		 334 BUG_ON(data->blksz > host->max_block);
335 BUG_ON(data->blocks > 65535);
bab76961 336
1c8cde92
PO		 337 /* timeout in us */
338 target_timeout = data->timeout_ns / 1000 +
339 data->timeout_clks / host->clock;
340
341 /*
342 * Figure out needed cycles.
343 * We do this in steps in order to fit inside a 32 bit int.
344 * The first step is the minimum timeout, which will have a
345 * minimum resolution of 6 bits:
346 * (1) 2^13*1000 > 2^22,
347 * (2) host->timeout_clk < 2^16
348 * =>
349 * (1) / (2) > 2^6
350 */
351 count = 0;
352 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
353 while (current_timeout < target_timeout) {
354 count++;
355 current_timeout <<= 1;
356 if (count >= 0xF)
357 break;
358 }
359
360 if (count >= 0xF) {
361 printk(KERN_WARNING "%s: Too large timeout requested!\n",
362 mmc_hostname(host->mmc));
363 count = 0xE;
364 }
365
366 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
367
d129bceb
PO		 368 if (host->flags & SDHCI_USE_DMA) {
369 int count;
370
371 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
372 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
373 BUG_ON(count != 1);
374
375 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
376 } else {
a3fd4a1b 377 host->size = data->blksz * data->blocks;
d129bceb
PO		 378
379 host->cur_sg = data->sg;
380 host->num_sg = data->sg_len;
381
382 host->offset = 0;
383 host->remain = host->cur_sg->length;
384 }
c7fa9963 385
bab76961
PO		 386 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
387 writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
388 host->ioaddr + SDHCI_BLOCK_SIZE);
c7fa9963
PO		 389 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
390}
391
392static void sdhci_set_transfer_mode(struct sdhci_host *host,
393 struct mmc_data *data)
394{
395 u16 mode;
396
397 WARN_ON(host->data);
398
399 if (data == NULL)
400 return;
401
402 mode = SDHCI_TRNS_BLK_CNT_EN;
403 if (data->blocks > 1)
404 mode |= SDHCI_TRNS_MULTI;
405 if (data->flags & MMC_DATA_READ)
406 mode |= SDHCI_TRNS_READ;
407 if (host->flags & SDHCI_USE_DMA)
408 mode |= SDHCI_TRNS_DMA;
409
410 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
d129bceb
PO		 411}
412
413static void sdhci_finish_data(struct sdhci_host *host)
414{
415 struct mmc_data *data;
d129bceb
PO		 416 u16 blocks;
417
418 BUG_ON(!host->data);
419
420 data = host->data;
421 host->data = NULL;
422
423 if (host->flags & SDHCI_USE_DMA) {
424 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
425 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
d129bceb
PO		 426 }
427
428 /*
429 * Controller doesn't count down when in single block mode.
430 */
431 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
432 blocks = 0;
433 else
434 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
a3fd4a1b 435 data->bytes_xfered = data->blksz * (data->blocks - blocks);
d129bceb
PO		 436
437 if ((data->error == MMC_ERR_NONE) && blocks) {
438 printk(KERN_ERR "%s: Controller signalled completion even "
439 "though there were blocks left. Please report this "
440 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
441 data->error = MMC_ERR_FAILED;
442 }
443
444 if (host->size != 0) {
445 printk(KERN_ERR "%s: %d bytes were left untransferred. "
446 "Please report this to " BUGMAIL ".\n",
447 mmc_hostname(host->mmc), host->size);
448 data->error = MMC_ERR_FAILED;
449 }
450
451 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
452
453 if (data->stop) {
454 /*
455 * The controller needs a reset of internal state machines
456 * upon error conditions.
457 */
458 if (data->error != MMC_ERR_NONE) {
459 sdhci_reset(host, SDHCI_RESET_CMD);
460 sdhci_reset(host, SDHCI_RESET_DATA);
461 }
462
463 sdhci_send_command(host, data->stop);
464 } else
465 tasklet_schedule(&host->finish_tasklet);
466}
467
468static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
469{
470 int flags;
fd2208d7 471 u32 mask;
7cb2c76f 472 unsigned long timeout;
d129bceb
PO		 473
474 WARN_ON(host->cmd);
475
476 DBG("Sending cmd (%x)\n", cmd->opcode);
477
478 /* Wait max 10 ms */
7cb2c76f 479 timeout = 10;
fd2208d7
PO		 480
481 mask = SDHCI_CMD_INHIBIT;
482 if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
483 mask |= SDHCI_DATA_INHIBIT;
484
485 /* We shouldn't wait for data inihibit for stop commands, even
486 though they might use busy signaling */
487 if (host->mrq->data && (cmd == host->mrq->data->stop))
488 mask &= ~SDHCI_DATA_INHIBIT;
489
490 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
7cb2c76f 491 if (timeout == 0) {
d129bceb 492 printk(KERN_ERR "%s: Controller never released "
fd2208d7 493 "inhibit bit(s). Please report this to "
d129bceb
PO		 494 BUGMAIL ".\n", mmc_hostname(host->mmc));
495 sdhci_dumpregs(host);
496 cmd->error = MMC_ERR_FAILED;
497 tasklet_schedule(&host->finish_tasklet);
498 return;
499 }
7cb2c76f
PO		 500 timeout--;
501 mdelay(1);
502 }
d129bceb
PO		 503
504 mod_timer(&host->timer, jiffies + 10 * HZ);
505
506 host->cmd = cmd;
507
508 sdhci_prepare_data(host, cmd->data);
509
510 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
511
c7fa9963
PO		 512 sdhci_set_transfer_mode(host, cmd->data);
513
d129bceb
PO		 514 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
515 printk(KERN_ERR "%s: Unsupported response type! "
516 "Please report this to " BUGMAIL ".\n",
517 mmc_hostname(host->mmc));
518 cmd->error = MMC_ERR_INVALID;
519 tasklet_schedule(&host->finish_tasklet);
520 return;
521 }
522
523 if (!(cmd->flags & MMC_RSP_PRESENT))
524 flags = SDHCI_CMD_RESP_NONE;
525 else if (cmd->flags & MMC_RSP_136)
526 flags = SDHCI_CMD_RESP_LONG;
527 else if (cmd->flags & MMC_RSP_BUSY)
528 flags = SDHCI_CMD_RESP_SHORT_BUSY;
529 else
530 flags = SDHCI_CMD_RESP_SHORT;
531
532 if (cmd->flags & MMC_RSP_CRC)
533 flags |= SDHCI_CMD_CRC;
534 if (cmd->flags & MMC_RSP_OPCODE)
535 flags |= SDHCI_CMD_INDEX;
536 if (cmd->data)
537 flags |= SDHCI_CMD_DATA;
538
539 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
540 host->ioaddr + SDHCI_COMMAND);
541}
542
543static void sdhci_finish_command(struct sdhci_host *host)
544{
545 int i;
546
547 BUG_ON(host->cmd == NULL);
548
549 if (host->cmd->flags & MMC_RSP_PRESENT) {
550 if (host->cmd->flags & MMC_RSP_136) {
551 /* CRC is stripped so we need to do some shifting. */
552 for (i = 0;i < 4;i++) {
553 host->cmd->resp[i] = readl(host->ioaddr +
554 SDHCI_RESPONSE + (3-i)*4) << 8;
555 if (i != 3)
556 host->cmd->resp[i] |=
557 readb(host->ioaddr +
558 SDHCI_RESPONSE + (3-i)*4-1);
559 }
560 } else {
561 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
562 }
563 }
564
565 host->cmd->error = MMC_ERR_NONE;
566
567 DBG("Ending cmd (%x)\n", host->cmd->opcode);
568
3192a28f 569 if (host->cmd->data)
d129bceb 570 host->data = host->cmd->data;
3192a28f 571 else
d129bceb
PO		 572 tasklet_schedule(&host->finish_tasklet);
573
574 host->cmd = NULL;
575}
576
577static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
578{
579 int div;
580 u16 clk;
7cb2c76f 581 unsigned long timeout;
d129bceb
PO		 582
583 if (clock == host->clock)
584 return;
585
586 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
587
588 if (clock == 0)
589 goto out;
590
591 for (div = 1;div < 256;div *= 2) {
592 if ((host->max_clk / div) <= clock)
593 break;
594 }
595 div >>= 1;
596
597 clk = div << SDHCI_DIVIDER_SHIFT;
598 clk |= SDHCI_CLOCK_INT_EN;
599 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
600
601 /* Wait max 10 ms */
7cb2c76f
PO		 602 timeout = 10;
603 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
604 & SDHCI_CLOCK_INT_STABLE)) {
605 if (timeout == 0) {
d129bceb
PO		 606 printk(KERN_ERR "%s: Internal clock never stabilised. "
607 "Please report this to " BUGMAIL ".\n",
608 mmc_hostname(host->mmc));
609 sdhci_dumpregs(host);
610 return;
611 }
7cb2c76f
PO		 612 timeout--;
613 mdelay(1);
614 }
d129bceb
PO		 615
616 clk |= SDHCI_CLOCK_CARD_EN;
617 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
618
619out:
620 host->clock = clock;
621}
622
146ad66e
PO		 623static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
624{
625 u8 pwr;
626
627 if (host->power == power)
628 return;
629
630 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
631
632 if (power == (unsigned short)-1)
633 goto out;
634
635 pwr = SDHCI_POWER_ON;
636
637 switch (power) {
638 case MMC_VDD_170:
639 case MMC_VDD_180:
640 case MMC_VDD_190:
641 pwr |= SDHCI_POWER_180;
642 break;
643 case MMC_VDD_290:
644 case MMC_VDD_300:
645 case MMC_VDD_310:
646 pwr |= SDHCI_POWER_300;
647 break;
648 case MMC_VDD_320:
649 case MMC_VDD_330:
650 case MMC_VDD_340:
651 pwr |= SDHCI_POWER_330;
652 break;
653 default:
654 BUG();
655 }
656
657 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
658
659out:
660 host->power = power;
661}
662
d129bceb
PO		 663/*****************************************************************************\
664 * *
665 * MMC callbacks *
666 * *
667\*****************************************************************************/
668
669static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
670{
671 struct sdhci_host *host;
672 unsigned long flags;
673
674 host = mmc_priv(mmc);
675
676 spin_lock_irqsave(&host->lock, flags);
677
678 WARN_ON(host->mrq != NULL);
679
680 sdhci_activate_led(host);
681
682 host->mrq = mrq;
683
684 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
685 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
686 tasklet_schedule(&host->finish_tasklet);
687 } else
688 sdhci_send_command(host, mrq->cmd);
689
690 spin_unlock_irqrestore(&host->lock, flags);
691}
692
693static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
694{
695 struct sdhci_host *host;
696 unsigned long flags;
697 u8 ctrl;
698
699 host = mmc_priv(mmc);
700
701 spin_lock_irqsave(&host->lock, flags);
702
d129bceb
PO		 703 /*
704 * Reset the chip on each power off.
705 * Should clear out any weird states.
706 */
707 if (ios->power_mode == MMC_POWER_OFF) {
708 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
d129bceb 709 sdhci_init(host);
d129bceb
PO		 710 }
711
712 sdhci_set_clock(host, ios->clock);
713
714 if (ios->power_mode == MMC_POWER_OFF)
146ad66e 715 sdhci_set_power(host, -1);
d129bceb 716 else
146ad66e 717 sdhci_set_power(host, ios->vdd);
d129bceb
PO		 718
719 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
720 if (ios->bus_width == MMC_BUS_WIDTH_4)
721 ctrl |= SDHCI_CTRL_4BITBUS;
722 else
723 ctrl &= ~SDHCI_CTRL_4BITBUS;
724 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
725
726 spin_unlock_irqrestore(&host->lock, flags);
727}
728
729static int sdhci_get_ro(struct mmc_host *mmc)
730{
731 struct sdhci_host *host;
732 unsigned long flags;
733 int present;
734
735 host = mmc_priv(mmc);
736
737 spin_lock_irqsave(&host->lock, flags);
738
739 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
740
741 spin_unlock_irqrestore(&host->lock, flags);
742
743 return !(present & SDHCI_WRITE_PROTECT);
744}
745
746static struct mmc_host_ops sdhci_ops = {
747 .request = sdhci_request,
748 .set_ios = sdhci_set_ios,
749 .get_ro = sdhci_get_ro,
750};
751
752/*****************************************************************************\
753 * *
754 * Tasklets *
755 * *
756\*****************************************************************************/
757
758static void sdhci_tasklet_card(unsigned long param)
759{
760 struct sdhci_host *host;
761 unsigned long flags;
762
763 host = (struct sdhci_host*)param;
764
765 spin_lock_irqsave(&host->lock, flags);
766
767 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
768 if (host->mrq) {
769 printk(KERN_ERR "%s: Card removed during transfer!\n",
770 mmc_hostname(host->mmc));
771 printk(KERN_ERR "%s: Resetting controller.\n",
772 mmc_hostname(host->mmc));
773
774 sdhci_reset(host, SDHCI_RESET_CMD);
775 sdhci_reset(host, SDHCI_RESET_DATA);
776
777 host->mrq->cmd->error = MMC_ERR_FAILED;
778 tasklet_schedule(&host->finish_tasklet);
779 }
780 }
781
782 spin_unlock_irqrestore(&host->lock, flags);
783
784 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
785}
786
787static void sdhci_tasklet_finish(unsigned long param)
788{
789 struct sdhci_host *host;
790 unsigned long flags;
791 struct mmc_request *mrq;
792
793 host = (struct sdhci_host*)param;
794
795 spin_lock_irqsave(&host->lock, flags);
796
797 del_timer(&host->timer);
798
799 mrq = host->mrq;
800
801 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
802
803 /*
804 * The controller needs a reset of internal state machines
805 * upon error conditions.
806 */
807 if ((mrq->cmd->error != MMC_ERR_NONE) ||
808 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
809 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
810 sdhci_reset(host, SDHCI_RESET_CMD);
811 sdhci_reset(host, SDHCI_RESET_DATA);
812 }
813
814 host->mrq = NULL;
815 host->cmd = NULL;
816 host->data = NULL;
817
818 sdhci_deactivate_led(host);
819
820 spin_unlock_irqrestore(&host->lock, flags);
821
822 mmc_request_done(host->mmc, mrq);
823}
824
825static void sdhci_timeout_timer(unsigned long data)
826{
827 struct sdhci_host *host;
828 unsigned long flags;
829
830 host = (struct sdhci_host*)data;
831
832 spin_lock_irqsave(&host->lock, flags);
833
834 if (host->mrq) {
835 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
836 "Please report this to " BUGMAIL ".\n",
837 mmc_hostname(host->mmc));
838 sdhci_dumpregs(host);
839
840 if (host->data) {
841 host->data->error = MMC_ERR_TIMEOUT;
842 sdhci_finish_data(host);
843 } else {
844 if (host->cmd)
845 host->cmd->error = MMC_ERR_TIMEOUT;
846 else
847 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
848
849 tasklet_schedule(&host->finish_tasklet);
850 }
851 }
852
853 spin_unlock_irqrestore(&host->lock, flags);
854}
855
856/*****************************************************************************\
857 * *
858 * Interrupt handling *
859 * *
860\*****************************************************************************/
861
862static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
863{
864 BUG_ON(intmask == 0);
865
866 if (!host->cmd) {
867 printk(KERN_ERR "%s: Got command interrupt even though no "
868 "command operation was in progress.\n",
869 mmc_hostname(host->mmc));
870 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
871 mmc_hostname(host->mmc));
872 sdhci_dumpregs(host);
873 return;
874 }
875
876 if (intmask & SDHCI_INT_RESPONSE)
877 sdhci_finish_command(host);
878 else {
879 if (intmask & SDHCI_INT_TIMEOUT)
880 host->cmd->error = MMC_ERR_TIMEOUT;
881 else if (intmask & SDHCI_INT_CRC)
882 host->cmd->error = MMC_ERR_BADCRC;
883 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
884 host->cmd->error = MMC_ERR_FAILED;
885 else
886 host->cmd->error = MMC_ERR_INVALID;
887
888 tasklet_schedule(&host->finish_tasklet);
889 }
890}
891
892static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
893{
894 BUG_ON(intmask == 0);
895
896 if (!host->data) {
897 /*
898 * A data end interrupt is sent together with the response
899 * for the stop command.
900 */
901 if (intmask & SDHCI_INT_DATA_END)
902 return;
903
904 printk(KERN_ERR "%s: Got data interrupt even though no "
905 "data operation was in progress.\n",
906 mmc_hostname(host->mmc));
907 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
908 mmc_hostname(host->mmc));
909 sdhci_dumpregs(host);
910
911 return;
912 }
913
914 if (intmask & SDHCI_INT_DATA_TIMEOUT)
915 host->data->error = MMC_ERR_TIMEOUT;
916 else if (intmask & SDHCI_INT_DATA_CRC)
917 host->data->error = MMC_ERR_BADCRC;
918 else if (intmask & SDHCI_INT_DATA_END_BIT)
919 host->data->error = MMC_ERR_FAILED;
920
921 if (host->data->error != MMC_ERR_NONE)
922 sdhci_finish_data(host);
923 else {
a406f5a3 924 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
d129bceb
PO		 925 sdhci_transfer_pio(host);
926
927 if (intmask & SDHCI_INT_DATA_END)
928 sdhci_finish_data(host);
929 }
930}
931
932static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
933{
934 irqreturn_t result;
935 struct sdhci_host* host = dev_id;
936 u32 intmask;
937
938 spin_lock(&host->lock);
939
940 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
941
942 if (!intmask) {
943 result = IRQ_NONE;
944 goto out;
945 }
946
947 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
948
3192a28f
PO		 949 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
950 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
951 host->ioaddr + SDHCI_INT_STATUS);
d129bceb 952 tasklet_schedule(&host->card_tasklet);
3192a28f 953 }
d129bceb 954
3192a28f 955 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
d129bceb 956
3192a28f 957 if (intmask & SDHCI_INT_CMD_MASK) {
d129bceb
PO		 958 writel(intmask & SDHCI_INT_CMD_MASK,
959 host->ioaddr + SDHCI_INT_STATUS);
3192a28f 960 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
d129bceb
PO		 961 }
962
963 if (intmask & SDHCI_INT_DATA_MASK) {
d129bceb
PO		 964 writel(intmask & SDHCI_INT_DATA_MASK,
965 host->ioaddr + SDHCI_INT_STATUS);
3192a28f 966 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
d129bceb
PO		 967 }
968
969 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
970
d129bceb 971 if (intmask & SDHCI_INT_BUS_POWER) {
3192a28f 972 printk(KERN_ERR "%s: Card is consuming too much power!\n",
d129bceb 973 mmc_hostname(host->mmc));
3192a28f 974 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
d129bceb
PO		 975 }
976
3192a28f
PO		 977 intmask &= SDHCI_INT_BUS_POWER;
978
979 if (intmask) {
980 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
d129bceb 981 "report this to " BUGMAIL ".\n",
3192a28f 982 mmc_hostname(host->mmc), intmask);
d129bceb
PO		 983 sdhci_dumpregs(host);
984
d129bceb 985 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
3192a28f 986 }
d129bceb
PO		 987
988 result = IRQ_HANDLED;
989
990out:
991 spin_unlock(&host->lock);
992
993 return result;
994}
995
996/*****************************************************************************\
997 * *
998 * Suspend/resume *
999 * *
1000\*****************************************************************************/
1001
1002#ifdef CONFIG_PM
1003
1004static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1005{
1006 struct sdhci_chip *chip;
1007 int i, ret;
1008
1009 chip = pci_get_drvdata(pdev);
1010 if (!chip)
1011 return 0;
1012
1013 DBG("Suspending...\n");
1014
1015 for (i = 0;i < chip->num_slots;i++) {
1016 if (!chip->hosts[i])
1017 continue;
1018 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1019 if (ret) {
1020 for (i--;i >= 0;i--)
1021 mmc_resume_host(chip->hosts[i]->mmc);
1022 return ret;
1023 }
1024 }
1025
1026 pci_save_state(pdev);
1027 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1028 pci_disable_device(pdev);
1029 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1030
1031 return 0;
1032}
1033
1034static int sdhci_resume (struct pci_dev *pdev)
1035{
1036 struct sdhci_chip *chip;
1037 int i, ret;
1038
1039 chip = pci_get_drvdata(pdev);
1040 if (!chip)
1041 return 0;
1042
1043 DBG("Resuming...\n");
1044
1045 pci_set_power_state(pdev, PCI_D0);
1046 pci_restore_state(pdev);
1047 pci_enable_device(pdev);
1048
1049 for (i = 0;i < chip->num_slots;i++) {
1050 if (!chip->hosts[i])
1051 continue;
1052 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1053 pci_set_master(pdev);
1054 sdhci_init(chip->hosts[i]);
1055 ret = mmc_resume_host(chip->hosts[i]->mmc);
1056 if (ret)
1057 return ret;
1058 }
1059
1060 return 0;
1061}
1062
1063#else /* CONFIG_PM */
1064
1065#define sdhci_suspend NULL
1066#define sdhci_resume NULL
1067
1068#endif /* CONFIG_PM */
1069
1070/*****************************************************************************\
1071 * *
1072 * Device probing/removal *
1073 * *
1074\*****************************************************************************/
1075
1076static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1077{
1078 int ret;
4a965505 1079 unsigned int version;
d129bceb
PO		 1080 struct sdhci_chip *chip;
1081 struct mmc_host *mmc;
1082 struct sdhci_host *host;
1083
1084 u8 first_bar;
1085 unsigned int caps;
1086
1087 chip = pci_get_drvdata(pdev);
1088 BUG_ON(!chip);
1089
1090 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1091 if (ret)
1092 return ret;
1093
1094 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1095
1096 if (first_bar > 5) {
1097 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1098 return -ENODEV;
1099 }
1100
1101 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1102 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1103 return -ENODEV;
1104 }
1105
1106 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1107 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1108 return -ENODEV;
1109 }
1110
67435274
PO		 1111 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1112 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1113 return -ENODEV;
1114 }
1115
1116 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1117 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1118 return -ENODEV;
1119 }
1120
d129bceb
PO		 1121 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1122 if (!mmc)
1123 return -ENOMEM;
1124
1125 host = mmc_priv(mmc);
1126 host->mmc = mmc;
1127
1128 host->bar = first_bar + slot;
1129
1130 host->addr = pci_resource_start(pdev, host->bar);
1131 host->irq = pdev->irq;
1132
1133 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1134
1135 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1136
1137 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1138 if (ret)
1139 goto free;
1140
1141 host->ioaddr = ioremap_nocache(host->addr,
1142 pci_resource_len(pdev, host->bar));
1143 if (!host->ioaddr) {
1144 ret = -ENOMEM;
1145 goto release;
1146 }
1147
d96649ed
PO		 1148 sdhci_reset(host, SDHCI_RESET_ALL);
1149
4a965505
PO		 1150 version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1151 version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1152 if (version != 0) {
1153 printk(KERN_ERR "%s: Unknown controller version (%d). "
1154 "Cowardly refusing to continue.\n", host->slot_descr,
1155 version);
1156 ret = -ENODEV;
1157 goto unmap;
1158 }
1159
d129bceb
PO		 1160 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1161
67435274
PO		 1162 if (debug_nodma)
1163 DBG("DMA forced off\n");
1164 else if (debug_forcedma) {
1165 DBG("DMA forced on\n");
1166 host->flags |= SDHCI_USE_DMA;
1167 } else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1168 DBG("Controller doesn't have DMA interface\n");
1169 else if (!(caps & SDHCI_CAN_DO_DMA))
1170 DBG("Controller doesn't have DMA capability\n");
1171 else
d129bceb
PO		 1172 host->flags |= SDHCI_USE_DMA;
1173
1174 if (host->flags & SDHCI_USE_DMA) {
1175 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1176 printk(KERN_WARNING "%s: No suitable DMA available. "
1177 "Falling back to PIO.\n", host->slot_descr);
1178 host->flags &= ~SDHCI_USE_DMA;
1179 }
1180 }
1181
1182 if (host->flags & SDHCI_USE_DMA)
1183 pci_set_master(pdev);
1184 else /* XXX: Hack to get MMC layer to avoid highmem */
1185 pdev->dma_mask = 0;
1186
8ef1a143
PO		 1187 host->max_clk =
1188 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1189 if (host->max_clk == 0) {
1190 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1191 "frequency.\n", host->slot_descr);
1192 ret = -ENODEV;
1193 goto unmap;
1194 }
d129bceb 1195 host->max_clk *= 1000000;
1c8cde92
PO		 1196
1197 host->timeout_clk =
1198 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1199 if (host->timeout_clk == 0) {
1200 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1201 "frequency.\n", host->slot_descr);
1202 ret = -ENODEV;
1203 goto unmap;
1204 }
1205 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1206 host->timeout_clk *= 1000;
d129bceb 1207
1d676e02
PO		 1208 host->max_block = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1209 if (host->max_block >= 3) {
1210 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1211 host->slot_descr);
1212 ret = -ENODEV;
1213 goto unmap;
1214 }
1215 host->max_block = 512 << host->max_block;
1216
d129bceb
PO		 1217 /*
1218 * Set host parameters.
1219 */
1220 mmc->ops = &sdhci_ops;
1221 mmc->f_min = host->max_clk / 256;
1222 mmc->f_max = host->max_clk;
d129bceb
PO		 1223 mmc->caps = MMC_CAP_4_BIT_DATA;
1224
146ad66e
PO		 1225 mmc->ocr_avail = 0;
1226 if (caps & SDHCI_CAN_VDD_330)
1227 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1228 else if (caps & SDHCI_CAN_VDD_300)
1229 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1230 else if (caps & SDHCI_CAN_VDD_180)
1231 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1232
1233 if (mmc->ocr_avail == 0) {
1234 printk(KERN_ERR "%s: Hardware doesn't report any "
1235 "support voltages.\n", host->slot_descr);
1236 ret = -ENODEV;
1237 goto unmap;
1238 }
1239
d129bceb
PO		 1240 spin_lock_init(&host->lock);
1241
1242 /*
1243 * Maximum number of segments. Hardware cannot do scatter lists.
1244 */
1245 if (host->flags & SDHCI_USE_DMA)
1246 mmc->max_hw_segs = 1;
1247 else
1248 mmc->max_hw_segs = 16;
1249 mmc->max_phys_segs = 16;
1250
1251 /*
bab76961
PO		 1252 * Maximum number of sectors in one transfer. Limited by DMA boundary
1253 * size (512KiB), which means (512 KiB/512=) 1024 entries.
d129bceb 1254 */
bab76961 1255 mmc->max_sectors = 1024;
d129bceb
PO		 1256
1257 /*
1258 * Maximum segment size. Could be one segment with the maximum number
1259 * of sectors.
1260 */
1261 mmc->max_seg_size = mmc->max_sectors * 512;
1262
1263 /*
1264 * Init tasklets.
1265 */
1266 tasklet_init(&host->card_tasklet,
1267 sdhci_tasklet_card, (unsigned long)host);
1268 tasklet_init(&host->finish_tasklet,
1269 sdhci_tasklet_finish, (unsigned long)host);
1270
e474c66b 1271 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
d129bceb
PO		 1272
1273 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1274 host->slot_descr, host);
1275 if (ret)
8ef1a143 1276 goto untasklet;
d129bceb
PO		 1277
1278 sdhci_init(host);
1279
1280#ifdef CONFIG_MMC_DEBUG
1281 sdhci_dumpregs(host);
1282#endif
1283
1284 host->chip = chip;
1285 chip->hosts[slot] = host;
1286
1287 mmc_add_host(mmc);
1288
1289 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1290 host->addr, host->irq,
1291 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1292
1293 return 0;
1294
8ef1a143 1295untasklet:
d129bceb
PO		 1296 tasklet_kill(&host->card_tasklet);
1297 tasklet_kill(&host->finish_tasklet);
8ef1a143 1298unmap:
d129bceb
PO		 1299 iounmap(host->ioaddr);
1300release:
1301 pci_release_region(pdev, host->bar);
1302free:
1303 mmc_free_host(mmc);
1304
1305 return ret;
1306}
1307
1308static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1309{
1310 struct sdhci_chip *chip;
1311 struct mmc_host *mmc;
1312 struct sdhci_host *host;
1313
1314 chip = pci_get_drvdata(pdev);
1315 host = chip->hosts[slot];
1316 mmc = host->mmc;
1317
1318 chip->hosts[slot] = NULL;
1319
1320 mmc_remove_host(mmc);
1321
1322 sdhci_reset(host, SDHCI_RESET_ALL);
1323
1324 free_irq(host->irq, host);
1325
1326 del_timer_sync(&host->timer);
1327
1328 tasklet_kill(&host->card_tasklet);
1329 tasklet_kill(&host->finish_tasklet);
1330
1331 iounmap(host->ioaddr);
1332
1333 pci_release_region(pdev, host->bar);
1334
1335 mmc_free_host(mmc);
1336}
1337
1338static int __devinit sdhci_probe(struct pci_dev *pdev,
1339 const struct pci_device_id *ent)
1340{
1341 int ret, i;
51f82bc0 1342 u8 slots, rev;
d129bceb
PO		 1343 struct sdhci_chip *chip;
1344
1345 BUG_ON(pdev == NULL);
1346 BUG_ON(ent == NULL);
1347
51f82bc0
PO		 1348 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1349
1350 printk(KERN_INFO DRIVER_NAME
1351 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1352 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1353 (int)rev);
d129bceb
PO		 1354
1355 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1356 if (ret)
1357 return ret;
1358
1359 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1360 DBG("found %d slot(s)\n", slots);
1361 if (slots == 0)
1362 return -ENODEV;
1363
1364 ret = pci_enable_device(pdev);
1365 if (ret)
1366 return ret;
1367
1368 chip = kzalloc(sizeof(struct sdhci_chip) +
1369 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1370 if (!chip) {
1371 ret = -ENOMEM;
1372 goto err;
1373 }
1374
1375 chip->pdev = pdev;
1376
1377 chip->num_slots = slots;
1378 pci_set_drvdata(pdev, chip);
1379
1380 for (i = 0;i < slots;i++) {
1381 ret = sdhci_probe_slot(pdev, i);
1382 if (ret) {
1383 for (i--;i >= 0;i--)
1384 sdhci_remove_slot(pdev, i);
1385 goto free;
1386 }
1387 }
1388
1389 return 0;
1390
1391free:
1392 pci_set_drvdata(pdev, NULL);
1393 kfree(chip);
1394
1395err:
1396 pci_disable_device(pdev);
1397 return ret;
1398}
1399
1400static void __devexit sdhci_remove(struct pci_dev *pdev)
1401{
1402 int i;
1403 struct sdhci_chip *chip;
1404
1405 chip = pci_get_drvdata(pdev);
1406
1407 if (chip) {
1408 for (i = 0;i < chip->num_slots;i++)
1409 sdhci_remove_slot(pdev, i);
1410
1411 pci_set_drvdata(pdev, NULL);
1412
1413 kfree(chip);
1414 }
1415
1416 pci_disable_device(pdev);
1417}
1418
1419static struct pci_driver sdhci_driver = {
1420 .name = DRIVER_NAME,
1421 .id_table = pci_ids,
1422 .probe = sdhci_probe,
1423 .remove = __devexit_p(sdhci_remove),
1424 .suspend = sdhci_suspend,
1425 .resume = sdhci_resume,
1426};
1427
1428/*****************************************************************************\
1429 * *
1430 * Driver init/exit *
1431 * *
1432\*****************************************************************************/
1433
1434static int __init sdhci_drv_init(void)
1435{
1436 printk(KERN_INFO DRIVER_NAME
1437 ": Secure Digital Host Controller Interface driver, "
1438 DRIVER_VERSION "\n");
1439 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1440
1441 return pci_register_driver(&sdhci_driver);
1442}
1443
1444static void __exit sdhci_drv_exit(void)
1445{
1446 DBG("Exiting\n");
1447
1448 pci_unregister_driver(&sdhci_driver);
1449}
1450
1451module_init(sdhci_drv_init);
1452module_exit(sdhci_drv_exit);
1453
67435274
PO		 1454module_param(debug_nodma, uint, 0444);
1455module_param(debug_forcedma, uint, 0444);
1456
d129bceb
PO		 1457MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1458MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1459MODULE_VERSION(DRIVER_VERSION);
1460MODULE_LICENSE("GPL");
67435274
PO		 1461
1462MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1463MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
Linux kernel - Deliverables
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