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tifm_sd: restructure initialization, removal and command handling
[deliverable/linux.git] / drivers / mmc / tifm_sd.c
CommitLineData
4020f2d7
AD		 1/*
2 * tifm_sd.c - TI FlashMedia driver
3 *
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12
13#include <linux/tifm.h>
14#include <linux/mmc/protocol.h>
15#include <linux/mmc/host.h>
16#include <linux/highmem.h>
2099c99e 17#include <asm/io.h>
4020f2d7
AD		 18
19#define DRIVER_NAME "tifm_sd"
1289335a 20#define DRIVER_VERSION "0.7"
4020f2d7
AD		 21
22static int no_dma = 0;
23static int fixed_timeout = 0;
24module_param(no_dma, bool, 0644);
25module_param(fixed_timeout, bool, 0644);
26
27/* Constants here are mostly from OMAP5912 datasheet */
28#define TIFM_MMCSD_RESET 0x0002
29#define TIFM_MMCSD_CLKMASK 0x03ff
30#define TIFM_MMCSD_POWER 0x0800
31#define TIFM_MMCSD_4BBUS 0x8000
32#define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
33#define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
34#define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
35#define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
36#define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
37#define TIFM_MMCSD_READ 0x8000
38
39#define TIFM_MMCSD_DATAMASK 0x001d /* set bits: EOFB, BRS, CB, EOC */
40#define TIFM_MMCSD_ERRMASK 0x41e0 /* set bits: CERR, CCRC, CTO, DCRC, DTO */
41#define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
42#define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
43#define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
44#define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
45#define TIFM_MMCSD_DTO 0x0020 /* data time-out */
46#define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
47#define TIFM_MMCSD_CTO 0x0080 /* command time-out */
48#define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
49#define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
50#define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
51#define TIFM_MMCSD_CERR 0x4000 /* card status error */
52
53#define TIFM_MMCSD_FIFO_SIZE 0x0020
54
55#define TIFM_MMCSD_RSP_R0 0x0000
56#define TIFM_MMCSD_RSP_R1 0x0100
57#define TIFM_MMCSD_RSP_R2 0x0200
58#define TIFM_MMCSD_RSP_R3 0x0300
59#define TIFM_MMCSD_RSP_R4 0x0400
60#define TIFM_MMCSD_RSP_R5 0x0500
61#define TIFM_MMCSD_RSP_R6 0x0600
62
63#define TIFM_MMCSD_RSP_BUSY 0x0800
64
65#define TIFM_MMCSD_CMD_BC 0x0000
66#define TIFM_MMCSD_CMD_BCR 0x1000
67#define TIFM_MMCSD_CMD_AC 0x2000
68#define TIFM_MMCSD_CMD_ADTC 0x3000
69
70typedef enum {
71 IDLE = 0,
72 CMD, /* main command ended */
73 BRS, /* block transfer finished */
74 SCMD, /* stop command ended */
75 CARD, /* card left busy state */
76 FIFO, /* FIFO operation completed (uncertain) */
77 READY
78} card_state_t;
79
80enum {
81 FIFO_RDY = 0x0001, /* hardware dependent value */
4020f2d7
AD		 82 EJECT = 0x0004,
83 EJECT_DONE = 0x0008,
84 CARD_BUSY = 0x0010,
85 OPENDRAIN = 0x0040, /* hardware dependent value */
86 CARD_EVENT = 0x0100, /* hardware dependent value */
87 CARD_RO = 0x0200, /* hardware dependent value */
88 FIFO_EVENT = 0x10000 }; /* hardware dependent value */
89
90struct tifm_sd {
91 struct tifm_dev *dev;
92
93 unsigned int flags;
94 card_state_t state;
95 unsigned int clk_freq;
96 unsigned int clk_div;
0803dd0c 97 unsigned long timeout_jiffies;
4020f2d7 98
8e02f858 99 struct tasklet_struct finish_tasklet;
0803dd0c 100 struct timer_list timer;
4020f2d7 101 struct mmc_request *req;
8e02f858 102 wait_queue_head_t notify;
4020f2d7
AD		 103
104 size_t written_blocks;
4020f2d7
AD		 105 size_t buffer_size;
106 size_t buffer_pos;
107
108};
109
255ef22e
AD		 110static char* tifm_sd_kmap_atomic(struct mmc_data *data)
111{
112 return kmap_atomic(data->sg->page, KM_BIO_SRC_IRQ) + data->sg->offset;
113}
114
115static void tifm_sd_kunmap_atomic(char *buffer, struct mmc_data *data)
116{
117 kunmap_atomic(buffer - data->sg->offset, KM_BIO_SRC_IRQ);
118}
119
4020f2d7
AD		 120static int tifm_sd_transfer_data(struct tifm_dev *sock, struct tifm_sd *host,
121 unsigned int host_status)
122{
123 struct mmc_command *cmd = host->req->cmd;
124 unsigned int t_val = 0, cnt = 0;
255ef22e 125 char *buffer;
4020f2d7
AD		 126
127 if (host_status & TIFM_MMCSD_BRS) {
128 /* in non-dma rx mode BRS fires when fifo is still not empty */
255ef22e
AD		 129 if (no_dma && (cmd->data->flags & MMC_DATA_READ)) {
130 buffer = tifm_sd_kmap_atomic(host->req->data);
4020f2d7
AD		 131 while (host->buffer_size > host->buffer_pos) {
132 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
255ef22e
AD		 133 buffer[host->buffer_pos++] = t_val & 0xff;
134 buffer[host->buffer_pos++] =
4020f2d7
AD		 135 (t_val >> 8) & 0xff;
136 }
255ef22e 137 tifm_sd_kunmap_atomic(buffer, host->req->data);
4020f2d7
AD		 138 }
139 return 1;
255ef22e
AD		 140 } else if (no_dma) {
141 buffer = tifm_sd_kmap_atomic(host->req->data);
4020f2d7
AD		 142 if ((cmd->data->flags & MMC_DATA_READ) &&
143 (host_status & TIFM_MMCSD_AF)) {
144 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
145 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
146 if (host->buffer_size > host->buffer_pos) {
255ef22e 147 buffer[host->buffer_pos++] =
4020f2d7 148 t_val & 0xff;
255ef22e 149 buffer[host->buffer_pos++] =
4020f2d7
AD		 150 (t_val >> 8) & 0xff;
151 }
152 }
153 } else if ((cmd->data->flags & MMC_DATA_WRITE)
154 && (host_status & TIFM_MMCSD_AE)) {
155 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
156 if (host->buffer_size > host->buffer_pos) {
255ef22e
AD		 157 t_val = buffer[host->buffer_pos++]
158 & 0x00ff;
159 t_val |= ((buffer[host->buffer_pos++])
160 << 8) & 0xff00;
4020f2d7
AD		 161 writel(t_val,
162 sock->addr + SOCK_MMCSD_DATA);
163 }
164 }
165 }
255ef22e 166 tifm_sd_kunmap_atomic(buffer, host->req->data);
4020f2d7
AD		 167 }
168 return 0;
169}
170
171static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
172{
173 unsigned int rc = 0;
174
175 switch (mmc_resp_type(cmd)) {
176 case MMC_RSP_NONE:
177 rc |= TIFM_MMCSD_RSP_R0;
178 break;
179 case MMC_RSP_R1B:
180 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
181 case MMC_RSP_R1:
182 rc |= TIFM_MMCSD_RSP_R1;
183 break;
184 case MMC_RSP_R2:
185 rc |= TIFM_MMCSD_RSP_R2;
186 break;
187 case MMC_RSP_R3:
188 rc |= TIFM_MMCSD_RSP_R3;
189 break;
4020f2d7
AD		 190 default:
191 BUG();
192 }
193
194 switch (mmc_cmd_type(cmd)) {
195 case MMC_CMD_BC:
196 rc |= TIFM_MMCSD_CMD_BC;
197 break;
198 case MMC_CMD_BCR:
199 rc |= TIFM_MMCSD_CMD_BCR;
200 break;
201 case MMC_CMD_AC:
202 rc |= TIFM_MMCSD_CMD_AC;
203 break;
204 case MMC_CMD_ADTC:
205 rc |= TIFM_MMCSD_CMD_ADTC;
206 break;
207 default:
208 BUG();
209 }
210 return rc;
211}
212
213static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
214{
215 struct tifm_dev *sock = host->dev;
216 unsigned int cmd_mask = tifm_sd_op_flags(cmd) |
217 (host->flags & OPENDRAIN);
218
219 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
220 cmd_mask |= TIFM_MMCSD_READ;
221
222 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
223 cmd->opcode, cmd->arg, cmd_mask);
224
225 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
226 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
227 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
228}
229
230static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
231{
232 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
233 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
234 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
235 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
236 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
237 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
238 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
239 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
240}
241
242static void tifm_sd_process_cmd(struct tifm_dev *sock, struct tifm_sd *host,
243 unsigned int host_status)
244{
245 struct mmc_command *cmd = host->req->cmd;
246
247change_state:
248 switch (host->state) {
249 case IDLE:
250 return;
251 case CMD:
252 if (host_status & TIFM_MMCSD_EOC) {
253 tifm_sd_fetch_resp(cmd, sock);
254 if (cmd->data) {
255 host->state = BRS;
1289335a 256 } else {
4020f2d7 257 host->state = READY;
1289335a 258 }
4020f2d7
AD		 259 goto change_state;
260 }
261 break;
262 case BRS:
263 if (tifm_sd_transfer_data(sock, host, host_status)) {
1289335a
AD		 264 if (cmd->data->flags & MMC_DATA_WRITE) {
265 host->state = CARD;
266 } else {
267 if (no_dma) {
268 if (host->req->stop) {
269 tifm_sd_exec(host, host->req->stop);
270 host->state = SCMD;
271 } else {
272 host->state = READY;
273 }
4020f2d7 274 } else {
1289335a 275 host->state = FIFO;
4020f2d7 276 }
4020f2d7 277 }
1289335a 278 goto change_state;
4020f2d7
AD		 279 }
280 break;
281 case SCMD:
282 if (host_status & TIFM_MMCSD_EOC) {
283 tifm_sd_fetch_resp(host->req->stop, sock);
1289335a 284 host->state = READY;
4020f2d7
AD		 285 goto change_state;
286 }
287 break;
288 case CARD:
1289335a
AD		 289 dev_dbg(&sock->dev, "waiting for CARD, have %zd blocks\n",
290 host->written_blocks);
4020f2d7
AD		 291 if (!(host->flags & CARD_BUSY)
292 && (host->written_blocks == cmd->data->blocks)) {
1289335a
AD		 293 if (no_dma) {
294 if (host->req->stop) {
295 tifm_sd_exec(host, host->req->stop);
296 host->state = SCMD;
297 } else {
298 host->state = READY;
299 }
300 } else {
301 host->state = FIFO;
302 }
4020f2d7
AD		 303 goto change_state;
304 }
305 break;
306 case FIFO:
307 if (host->flags & FIFO_RDY) {
4020f2d7 308 host->flags &= ~FIFO_RDY;
1289335a
AD		 309 if (host->req->stop) {
310 tifm_sd_exec(host, host->req->stop);
311 host->state = SCMD;
312 } else {
313 host->state = READY;
314 }
4020f2d7
AD		 315 goto change_state;
316 }
317 break;
318 case READY:
8e02f858 319 tasklet_schedule(&host->finish_tasklet);
4020f2d7
AD		 320 return;
321 }
322
4020f2d7
AD		 323}
324
325/* Called from interrupt handler */
326static unsigned int tifm_sd_signal_irq(struct tifm_dev *sock,
327 unsigned int sock_irq_status)
328{
329 struct tifm_sd *host;
330 unsigned int host_status = 0, fifo_status = 0;
331 int error_code = 0;
332
333 spin_lock(&sock->lock);
334 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
4020f2d7
AD		 335
336 if (sock_irq_status & FIFO_EVENT) {
337 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
338 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
339
340 host->flags |= fifo_status & FIFO_RDY;
341 }
342
343 if (sock_irq_status & CARD_EVENT) {
344 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
345 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
346
4020f2d7
AD		 347 if (!host->req)
348 goto done;
349
350 if (host_status & TIFM_MMCSD_ERRMASK) {
351 if (host_status & TIFM_MMCSD_CERR)
352 error_code = MMC_ERR_FAILED;
353 else if (host_status &
354 (TIFM_MMCSD_CTO | TIFM_MMCSD_DTO))
355 error_code = MMC_ERR_TIMEOUT;
356 else if (host_status &
357 (TIFM_MMCSD_CCRC | TIFM_MMCSD_DCRC))
358 error_code = MMC_ERR_BADCRC;
359
360 writel(TIFM_FIFO_INT_SETALL,
361 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
362 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
363
364 if (host->req->stop) {
365 if (host->state == SCMD) {
366 host->req->stop->error = error_code;
1289335a
AD		 367 } else if (host->state == BRS
368 || host->state == CARD
369 || host->state == FIFO) {
4020f2d7
AD		 370 host->req->cmd->error = error_code;
371 tifm_sd_exec(host, host->req->stop);
4020f2d7
AD		 372 host->state = SCMD;
373 goto done;
374 } else {
375 host->req->cmd->error = error_code;
376 }
377 } else {
378 host->req->cmd->error = error_code;
379 }
380 host->state = READY;
381 }
382
383 if (host_status & TIFM_MMCSD_CB)
384 host->flags |= CARD_BUSY;
385 if ((host_status & TIFM_MMCSD_EOFB) &&
386 (host->flags & CARD_BUSY)) {
387 host->written_blocks++;
388 host->flags &= ~CARD_BUSY;
389 }
390 }
391
392 if (host->req)
393 tifm_sd_process_cmd(sock, host, host_status);
394done:
395 dev_dbg(&sock->dev, "host_status %x, fifo_status %x\n",
396 host_status, fifo_status);
397 spin_unlock(&sock->lock);
398 return sock_irq_status;
399}
400
401static void tifm_sd_prepare_data(struct tifm_sd *card, struct mmc_command *cmd)
402{
403 struct tifm_dev *sock = card->dev;
404 unsigned int dest_cnt;
405
406 /* DMA style IO */
407
408 writel(TIFM_FIFO_INT_SETALL,
409 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
f0d1b0b3 410 writel(ilog2(cmd->data->blksz) - 2,
4020f2d7
AD		 411 sock->addr + SOCK_FIFO_PAGE_SIZE);
412 writel(TIFM_FIFO_ENABLE, sock->addr + SOCK_FIFO_CONTROL);
413 writel(TIFM_FIFO_INTMASK, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
414
415 dest_cnt = (cmd->data->blocks) << 8;
416
417 writel(sg_dma_address(cmd->data->sg), sock->addr + SOCK_DMA_ADDRESS);
418
419 writel(cmd->data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
420 writel(cmd->data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
421
422 if (cmd->data->flags & MMC_DATA_WRITE) {
423 writel(TIFM_MMCSD_TXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
424 writel(dest_cnt | TIFM_DMA_TX | TIFM_DMA_EN,
425 sock->addr + SOCK_DMA_CONTROL);
426 } else {
427 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
428 writel(dest_cnt | TIFM_DMA_EN, sock->addr + SOCK_DMA_CONTROL);
429 }
430}
431
432static void tifm_sd_set_data_timeout(struct tifm_sd *host,
433 struct mmc_data *data)
434{
435 struct tifm_dev *sock = host->dev;
436 unsigned int data_timeout = data->timeout_clks;
437
438 if (fixed_timeout)
439 return;
440
441 data_timeout += data->timeout_ns /
83d420ba 442 ((1000000000UL / host->clk_freq) * host->clk_div);
4020f2d7
AD		 443
444 if (data_timeout < 0xffff) {
4020f2d7 445 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
83d420ba
AD		 446 writel((~TIFM_MMCSD_DPE)
447 & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
448 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
4020f2d7 449 } else {
4020f2d7
AD		 450 data_timeout = (data_timeout >> 10) + 1;
451 if(data_timeout > 0xffff)
452 data_timeout = 0; /* set to unlimited */
453 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
83d420ba
AD		 454 writel(TIFM_MMCSD_DPE
455 | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
456 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
4020f2d7
AD		 457 }
458}
459
460static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
461{
462 struct tifm_sd *host = mmc_priv(mmc);
463 struct tifm_dev *sock = host->dev;
464 unsigned long flags;
465 int sg_count = 0;
466 struct mmc_data *r_data = mrq->cmd->data;
467
468 spin_lock_irqsave(&sock->lock, flags);
469 if (host->flags & EJECT) {
470 spin_unlock_irqrestore(&sock->lock, flags);
471 goto err_out;
472 }
473
474 if (host->req) {
475 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
476 spin_unlock_irqrestore(&sock->lock, flags);
477 goto err_out;
478 }
479
480 if (r_data) {
481 tifm_sd_set_data_timeout(host, r_data);
482
483 sg_count = tifm_map_sg(sock, r_data->sg, r_data->sg_len,
484 mrq->cmd->flags & MMC_DATA_WRITE
485 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
486 if (sg_count != 1) {
487 printk(KERN_ERR DRIVER_NAME
488 ": scatterlist map failed\n");
489 spin_unlock_irqrestore(&sock->lock, flags);
490 goto err_out;
491 }
492
493 host->written_blocks = 0;
494 host->flags &= ~CARD_BUSY;
495 tifm_sd_prepare_data(host, mrq->cmd);
496 }
497
498 host->req = mrq;
0803dd0c 499 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
4020f2d7 500 host->state = CMD;
4020f2d7
AD		 501 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
502 sock->addr + SOCK_CONTROL);
503 tifm_sd_exec(host, mrq->cmd);
504 spin_unlock_irqrestore(&sock->lock, flags);
505 return;
506
507err_out:
508 if (sg_count > 0)
509 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
510 (r_data->flags & MMC_DATA_WRITE)
511 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
512
513 mrq->cmd->error = MMC_ERR_TIMEOUT;
514 mmc_request_done(mmc, mrq);
515}
516
8e02f858 517static void tifm_sd_end_cmd(unsigned long data)
4020f2d7 518{
8e02f858 519 struct tifm_sd *host = (struct tifm_sd*)data;
4020f2d7
AD		 520 struct tifm_dev *sock = host->dev;
521 struct mmc_host *mmc = tifm_get_drvdata(sock);
522 struct mmc_request *mrq;
e069d79d 523 struct mmc_data *r_data = NULL;
4020f2d7
AD		 524 unsigned long flags;
525
526 spin_lock_irqsave(&sock->lock, flags);
527
0803dd0c 528 del_timer(&host->timer);
4020f2d7 529 mrq = host->req;
e069d79d 530 host->req = NULL;
4020f2d7
AD		 531 host->state = IDLE;
532
533 if (!mrq) {
534 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
535 spin_unlock_irqrestore(&sock->lock, flags);
536 return;
537 }
538
539 r_data = mrq->cmd->data;
540 if (r_data) {
541 if (r_data->flags & MMC_DATA_WRITE) {
542 r_data->bytes_xfered = host->written_blocks *
543 r_data->blksz;
544 } else {
545 r_data->bytes_xfered = r_data->blocks -
546 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
547 r_data->bytes_xfered *= r_data->blksz;
548 r_data->bytes_xfered += r_data->blksz -
549 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
550 }
551 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
552 (r_data->flags & MMC_DATA_WRITE)
553 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
554 }
555
556 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
557 sock->addr + SOCK_CONTROL);
558
559 spin_unlock_irqrestore(&sock->lock, flags);
560 mmc_request_done(mmc, mrq);
561}
562
563static void tifm_sd_request_nodma(struct mmc_host *mmc, struct mmc_request *mrq)
564{
565 struct tifm_sd *host = mmc_priv(mmc);
566 struct tifm_dev *sock = host->dev;
567 unsigned long flags;
568 struct mmc_data *r_data = mrq->cmd->data;
4020f2d7
AD		 569
570 spin_lock_irqsave(&sock->lock, flags);
571 if (host->flags & EJECT) {
572 spin_unlock_irqrestore(&sock->lock, flags);
573 goto err_out;
574 }
575
576 if (host->req) {
577 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
578 spin_unlock_irqrestore(&sock->lock, flags);
579 goto err_out;
580 }
581
582 if (r_data) {
583 tifm_sd_set_data_timeout(host, r_data);
584
4020f2d7
AD		 585 host->buffer_size = mrq->cmd->data->blocks *
586 mrq->cmd->data->blksz;
587
588 writel(TIFM_MMCSD_BUFINT |
589 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
590 sock->addr + SOCK_MMCSD_INT_ENABLE);
591 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) |
592 (TIFM_MMCSD_FIFO_SIZE - 1),
593 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
594
595 host->written_blocks = 0;
596 host->flags &= ~CARD_BUSY;
597 host->buffer_pos = 0;
598 writel(r_data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
599 writel(r_data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
600 }
601
602 host->req = mrq;
0803dd0c 603 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
4020f2d7 604 host->state = CMD;
4020f2d7
AD		 605 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
606 sock->addr + SOCK_CONTROL);
607 tifm_sd_exec(host, mrq->cmd);
608 spin_unlock_irqrestore(&sock->lock, flags);
609 return;
610
611err_out:
4020f2d7
AD		 612 mrq->cmd->error = MMC_ERR_TIMEOUT;
613 mmc_request_done(mmc, mrq);
614}
615
8e02f858 616static void tifm_sd_end_cmd_nodma(unsigned long data)
4020f2d7 617{
8e02f858 618 struct tifm_sd *host = (struct tifm_sd*)data;
4020f2d7
AD		 619 struct tifm_dev *sock = host->dev;
620 struct mmc_host *mmc = tifm_get_drvdata(sock);
621 struct mmc_request *mrq;
e069d79d 622 struct mmc_data *r_data = NULL;
4020f2d7
AD		 623 unsigned long flags;
624
625 spin_lock_irqsave(&sock->lock, flags);
626
0803dd0c 627 del_timer(&host->timer);
4020f2d7 628 mrq = host->req;
e069d79d 629 host->req = NULL;
4020f2d7
AD		 630 host->state = IDLE;
631
632 if (!mrq) {
633 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
634 spin_unlock_irqrestore(&sock->lock, flags);
635 return;
636 }
637
638 r_data = mrq->cmd->data;
639 if (r_data) {
640 writel((~TIFM_MMCSD_BUFINT) &
641 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
642 sock->addr + SOCK_MMCSD_INT_ENABLE);
643
644 if (r_data->flags & MMC_DATA_WRITE) {
645 r_data->bytes_xfered = host->written_blocks *
646 r_data->blksz;
647 } else {
648 r_data->bytes_xfered = r_data->blocks -
649 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
650 r_data->bytes_xfered *= r_data->blksz;
651 r_data->bytes_xfered += r_data->blksz -
652 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
653 }
4020f2d7
AD		 654 host->buffer_pos = 0;
655 host->buffer_size = 0;
656 }
657
658 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
659 sock->addr + SOCK_CONTROL);
660
661 spin_unlock_irqrestore(&sock->lock, flags);
662
4020f2d7
AD		 663 mmc_request_done(mmc, mrq);
664}
665
8e02f858
AD		 666static void tifm_sd_terminate(struct tifm_sd *host)
667{
668 struct tifm_dev *sock = host->dev;
669 unsigned long flags;
670
671 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
672 mmiowb();
673 spin_lock_irqsave(&sock->lock, flags);
674 host->flags |= EJECT;
675 if (host->req) {
676 writel(TIFM_FIFO_INT_SETALL,
677 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
678 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
679 tasklet_schedule(&host->finish_tasklet);
680 }
681 spin_unlock_irqrestore(&sock->lock, flags);
682}
683
0803dd0c 684static void tifm_sd_abort(unsigned long data)
4020f2d7 685{
8e02f858
AD		 686 struct tifm_sd *host = (struct tifm_sd*)data;
687
4020f2d7 688 printk(KERN_ERR DRIVER_NAME
0803dd0c 689 ": card failed to respond for a long period of time");
8e02f858
AD		 690
691 tifm_sd_terminate(host);
692 tifm_eject(host->dev);
4020f2d7
AD		 693}
694
695static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
696{
697 struct tifm_sd *host = mmc_priv(mmc);
698 struct tifm_dev *sock = host->dev;
699 unsigned int clk_div1, clk_div2;
700 unsigned long flags;
701
702 spin_lock_irqsave(&sock->lock, flags);
703
704 dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
705 ios->power_mode);
706 if (ios->bus_width == MMC_BUS_WIDTH_4) {
707 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
708 sock->addr + SOCK_MMCSD_CONFIG);
709 } else {
710 writel((~TIFM_MMCSD_4BBUS) &
711 readl(sock->addr + SOCK_MMCSD_CONFIG),
712 sock->addr + SOCK_MMCSD_CONFIG);
713 }
714
715 if (ios->clock) {
716 clk_div1 = 20000000 / ios->clock;
717 if (!clk_div1)
718 clk_div1 = 1;
719
720 clk_div2 = 24000000 / ios->clock;
721 if (!clk_div2)
722 clk_div2 = 1;
723
724 if ((20000000 / clk_div1) > ios->clock)
725 clk_div1++;
726 if ((24000000 / clk_div2) > ios->clock)
727 clk_div2++;
728 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
729 host->clk_freq = 20000000;
730 host->clk_div = clk_div1;
731 writel((~TIFM_CTRL_FAST_CLK) &
732 readl(sock->addr + SOCK_CONTROL),
733 sock->addr + SOCK_CONTROL);
734 } else {
735 host->clk_freq = 24000000;
736 host->clk_div = clk_div2;
737 writel(TIFM_CTRL_FAST_CLK |
738 readl(sock->addr + SOCK_CONTROL),
739 sock->addr + SOCK_CONTROL);
740 }
741 } else {
742 host->clk_div = 0;
743 }
744 host->clk_div &= TIFM_MMCSD_CLKMASK;
745 writel(host->clk_div | ((~TIFM_MMCSD_CLKMASK) &
746 readl(sock->addr + SOCK_MMCSD_CONFIG)),
747 sock->addr + SOCK_MMCSD_CONFIG);
748
749 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
750 host->flags |= OPENDRAIN;
751 else
752 host->flags &= ~OPENDRAIN;
753
754 /* chip_select : maybe later */
755 //vdd
756 //power is set before probe / after remove
757 //I believe, power_off when already marked for eject is sufficient to
758 // allow removal.
759 if ((host->flags & EJECT) && ios->power_mode == MMC_POWER_OFF) {
760 host->flags |= EJECT_DONE;
8e02f858 761 wake_up_all(&host->notify);
4020f2d7
AD		 762 }
763
764 spin_unlock_irqrestore(&sock->lock, flags);
765}
766
767static int tifm_sd_ro(struct mmc_host *mmc)
768{
769 int rc;
770 struct tifm_sd *host = mmc_priv(mmc);
771 struct tifm_dev *sock = host->dev;
772 unsigned long flags;
773
774 spin_lock_irqsave(&sock->lock, flags);
775
776 host->flags |= (CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE));
777 rc = (host->flags & CARD_RO) ? 1 : 0;
778
779 spin_unlock_irqrestore(&sock->lock, flags);
780 return rc;
781}
782
783static struct mmc_host_ops tifm_sd_ops = {
784 .request = tifm_sd_request,
785 .set_ios = tifm_sd_ios,
786 .get_ro = tifm_sd_ro
787};
788
8e02f858 789static int tifm_sd_initialize_host(struct tifm_sd *host)
4020f2d7 790{
8e02f858
AD		 791 int rc;
792 unsigned int host_status = 0;
4020f2d7 793 struct tifm_dev *sock = host->dev;
4020f2d7 794
8e02f858
AD		 795 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
796 mmiowb();
797 host->clk_div = 61;
798 host->clk_freq = 20000000;
799 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
800 writel(host->clk_div | TIFM_MMCSD_POWER,
801 sock->addr + SOCK_MMCSD_CONFIG);
802
803 /* wait up to 0.51 sec for reset */
804 for (rc = 2; rc <= 256; rc <<= 1) {
805 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
806 rc = 0;
807 break;
808 }
809 msleep(rc);
810 }
811
812 if (rc) {
813 printk(KERN_ERR DRIVER_NAME
814 ": controller failed to reset\n");
815 return -ENODEV;
816 }
817
818 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
819 writel(host->clk_div | TIFM_MMCSD_POWER,
820 sock->addr + SOCK_MMCSD_CONFIG);
821 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
822
823 // command timeout fixed to 64 clocks for now
824 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO);
825 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
826
827 /* INAB should take much less than reset */
828 for (rc = 1; rc <= 16; rc <<= 1) {
829 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
830 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
831 if (!(host_status & TIFM_MMCSD_ERRMASK)
832 && (host_status & TIFM_MMCSD_EOC)) {
833 rc = 0;
834 break;
835 }
836 msleep(rc);
837 }
838
839 if (rc) {
840 printk(KERN_ERR DRIVER_NAME
841 ": card not ready - probe failed on initialization\n");
842 return -ENODEV;
843 }
844
845 writel(TIFM_MMCSD_DATAMASK | TIFM_MMCSD_ERRMASK,
846 sock->addr + SOCK_MMCSD_INT_ENABLE);
847 mmiowb();
848
849 return 0;
4020f2d7
AD		 850}
851
852static int tifm_sd_probe(struct tifm_dev *sock)
853{
854 struct mmc_host *mmc;
855 struct tifm_sd *host;
856 int rc = -EIO;
857
858 if (!(TIFM_SOCK_STATE_OCCUPIED &
859 readl(sock->addr + SOCK_PRESENT_STATE))) {
860 printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
861 return rc;
862 }
863
864 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
865 if (!mmc)
866 return -ENOMEM;
867
868 host = mmc_priv(mmc);
4020f2d7 869 tifm_set_drvdata(sock, mmc);
8e02f858 870 host->dev = sock;
4020f2d7
AD		 871 host->timeout_jiffies = msecs_to_jiffies(1000);
872
8e02f858
AD		 873 init_waitqueue_head(&host->notify);
874 tasklet_init(&host->finish_tasklet,
875 no_dma ? tifm_sd_end_cmd_nodma : tifm_sd_end_cmd,
876 (unsigned long)host);
877 setup_timer(&host->timer, tifm_sd_abort, (unsigned long)host);
878
4020f2d7
AD		 879 tifm_sd_ops.request = no_dma ? tifm_sd_request_nodma : tifm_sd_request;
880 mmc->ops = &tifm_sd_ops;
881 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
8e02f858 882 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE;
4020f2d7
AD		 883 mmc->f_min = 20000000 / 60;
884 mmc->f_max = 24000000;
885 mmc->max_hw_segs = 1;
886 mmc->max_phys_segs = 1;
887 mmc->max_sectors = 127;
888 mmc->max_seg_size = mmc->max_sectors << 11; //2k maximum hw block length
8e02f858
AD		 889 sock->signal_irq = tifm_sd_signal_irq;
890 rc = tifm_sd_initialize_host(host);
4020f2d7 891
8e02f858
AD		 892 if (!rc)
893 rc = mmc_add_host(mmc);
894 if (rc)
895 goto out_free_mmc;
4020f2d7
AD		 896
897 return 0;
8e02f858
AD		 898out_free_mmc:
899 mmc_free_host(mmc);
4020f2d7
AD		 900 return rc;
901}
902
903static void tifm_sd_remove(struct tifm_dev *sock)
904{
905 struct mmc_host *mmc = tifm_get_drvdata(sock);
906 struct tifm_sd *host = mmc_priv(mmc);
4020f2d7 907
0803dd0c 908 del_timer_sync(&host->timer);
8e02f858
AD		 909 tifm_sd_terminate(host);
910 wait_event_timeout(host->notify, host->flags & EJECT_DONE,
911 host->timeout_jiffies);
912 tasklet_kill(&host->finish_tasklet);
913 mmc_remove_host(mmc);
4020f2d7
AD		 914
915 /* The meaning of the bit majority in this constant is unknown. */
916 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
917 sock->addr + SOCK_CONTROL);
4020f2d7 918
e069d79d 919 tifm_set_drvdata(sock, NULL);
4020f2d7
AD		 920 mmc_free_host(mmc);
921}
922
923static tifm_media_id tifm_sd_id_tbl[] = {
924 FM_SD, 0
925};
926
927static struct tifm_driver tifm_sd_driver = {
928 .driver = {
929 .name = DRIVER_NAME,
930 .owner = THIS_MODULE
931 },
932 .id_table = tifm_sd_id_tbl,
933 .probe = tifm_sd_probe,
934 .remove = tifm_sd_remove
935};
936
937static int __init tifm_sd_init(void)
938{
939 return tifm_register_driver(&tifm_sd_driver);
940}
941
942static void __exit tifm_sd_exit(void)
943{
944 tifm_unregister_driver(&tifm_sd_driver);
945}
946
947MODULE_AUTHOR("Alex Dubov");
948MODULE_DESCRIPTION("TI FlashMedia SD driver");
949MODULE_LICENSE("GPL");
950MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
951MODULE_VERSION(DRIVER_VERSION);
952
953module_init(tifm_sd_init);
954module_exit(tifm_sd_exit);
Linux kernel - Deliverables
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