[deliverable/linux.git] / drivers / mtd / nand / ams-delta.c

/*
 *  drivers/mtd/nand/ams-delta.c
 *
 *  Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
 *
 *  Derived from drivers/mtd/toto.c
 *  Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
 *  Partially stolen from drivers/mtd/nand/plat_nand.c
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  Overview:
 *   This is a device driver for the NAND flash device found on the
 *   Amstrad E3 (Delta).
 */

#include <linux/slab.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>

#include <asm/io.h>
#include <asm/sizes.h>

#include <mach/board-ams-delta.h>

#include <mach/hardware.h>

/*
 * MTD structure for E3 (Delta)
 */
static struct mtd_info *ams_delta_mtd = NULL;

/*
 * Define partitions for flash devices
 */

static struct mtd_partition partition_info[] = {
	{ .name		= "Kernel",
	  .offset	= 0,
	  .size		= 3 * SZ_1M + SZ_512K },
	{ .name		= "u-boot",
	  .offset	= 3 * SZ_1M + SZ_512K,
	  .size		= SZ_256K },
	{ .name		= "u-boot params",
	  .offset	= 3 * SZ_1M + SZ_512K + SZ_256K,
	  .size		= SZ_256K },
	{ .name		= "Amstrad LDR",
	  .offset	= 4 * SZ_1M,
	  .size		= SZ_256K },
	{ .name		= "File system",
	  .offset	= 4 * SZ_1M + 1 * SZ_256K,
	  .size		= 27 * SZ_1M },
	{ .name		= "PBL reserved",
	  .offset	= 32 * SZ_1M - 3 * SZ_256K,
	  .size		=  3 * SZ_256K },
};

static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
{
	struct nand_chip *this = mtd->priv;
	void __iomem *io_base = this->priv;

	writew(0, io_base + OMAP_MPUIO_IO_CNTL);
	writew(byte, this->IO_ADDR_W);
	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
	ndelay(40);
	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
}

static u_char ams_delta_read_byte(struct mtd_info *mtd)
{
	u_char res;
	struct nand_chip *this = mtd->priv;
	void __iomem *io_base = this->priv;

	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
	ndelay(40);
	writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
	res = readw(this->IO_ADDR_R);
	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);

	return res;
}

static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf,
				int len)
{
	int i;

	for (i=0; i<len; i++)
		ams_delta_write_byte(mtd, buf[i]);
}

static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len)
{
	int i;

	for (i=0; i<len; i++)
		buf[i] = ams_delta_read_byte(mtd);
}

/*
 * Command control function
 *
 * ctrl:
 * NAND_NCE: bit 0 -> bit 2
 * NAND_CLE: bit 1 -> bit 7
 * NAND_ALE: bit 2 -> bit 6
 */
static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
				unsigned int ctrl)
{

	if (ctrl & NAND_CTRL_CHANGE) {
		gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
				(ctrl & NAND_NCE) == 0);
		gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
				(ctrl & NAND_CLE) != 0);
		gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
				(ctrl & NAND_ALE) != 0);
	}

	if (cmd != NAND_CMD_NONE)
		ams_delta_write_byte(mtd, cmd);
}

static int ams_delta_nand_ready(struct mtd_info *mtd)
{
	return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
}

static const struct gpio _mandatory_gpio[] = {
	{
		.gpio	= AMS_DELTA_GPIO_PIN_NAND_NCE,
		.flags	= GPIOF_OUT_INIT_HIGH,
		.label	= "nand_nce",
	},
	{
		.gpio	= AMS_DELTA_GPIO_PIN_NAND_NRE,
		.flags	= GPIOF_OUT_INIT_HIGH,
		.label	= "nand_nre",
	},
	{
		.gpio	= AMS_DELTA_GPIO_PIN_NAND_NWP,
		.flags	= GPIOF_OUT_INIT_HIGH,
		.label	= "nand_nwp",
	},
	{
		.gpio	= AMS_DELTA_GPIO_PIN_NAND_NWE,
		.flags	= GPIOF_OUT_INIT_HIGH,
		.label	= "nand_nwe",
	},
	{
		.gpio	= AMS_DELTA_GPIO_PIN_NAND_ALE,
		.flags	= GPIOF_OUT_INIT_LOW,
		.label	= "nand_ale",
	},
	{
		.gpio	= AMS_DELTA_GPIO_PIN_NAND_CLE,
		.flags	= GPIOF_OUT_INIT_LOW,
		.label	= "nand_cle",
	},
};

/*
 * Main initialization routine
 */
static int __devinit ams_delta_init(struct platform_device *pdev)
{
	struct nand_chip *this;
	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	void __iomem *io_base;
	int err = 0;

	if (!res)
		return -ENXIO;

	/* Allocate memory for MTD device structure and private data */
	ams_delta_mtd = kmalloc(sizeof(struct mtd_info) +
				sizeof(struct nand_chip), GFP_KERNEL);
	if (!ams_delta_mtd) {
		printk (KERN_WARNING "Unable to allocate E3 NAND MTD device structure.\n");
		err = -ENOMEM;
		goto out;
	}

	ams_delta_mtd->owner = THIS_MODULE;

	/* Get pointer to private data */
	this = (struct nand_chip *) (&ams_delta_mtd[1]);

	/* Initialize structures */
	memset(ams_delta_mtd, 0, sizeof(struct mtd_info));
	memset(this, 0, sizeof(struct nand_chip));

	/* Link the private data with the MTD structure */
	ams_delta_mtd->priv = this;

	/*
	 * Don't try to request the memory region from here,
	 * it should have been already requested from the
	 * gpio-omap driver and requesting it again would fail.
	 */

	io_base = ioremap(res->start, resource_size(res));
	if (io_base == NULL) {
		dev_err(&pdev->dev, "ioremap failed\n");
		err = -EIO;
		goto out_free;
	}

	this->priv = io_base;

	/* Set address of NAND IO lines */
	this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
	this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT;
	this->read_byte = ams_delta_read_byte;
	this->write_buf = ams_delta_write_buf;
	this->read_buf = ams_delta_read_buf;
	this->cmd_ctrl = ams_delta_hwcontrol;
	if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) {
		this->dev_ready = ams_delta_nand_ready;
	} else {
		this->dev_ready = NULL;
		printk(KERN_NOTICE "Couldn't request gpio for Delta NAND ready.\n");
	}
	/* 25 us command delay time */
	this->chip_delay = 30;
	this->ecc.mode = NAND_ECC_SOFT;

	platform_set_drvdata(pdev, io_base);

	/* Set chip enabled, but  */
	err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
	if (err)
		goto out_gpio;

	/* Scan to find existence of the device */
	if (nand_scan(ams_delta_mtd, 1)) {
		err = -ENXIO;
		goto out_mtd;
	}

	/* Register the partitions */
	mtd_device_register(ams_delta_mtd, partition_info,
			    ARRAY_SIZE(partition_info));

	goto out;

 out_mtd:
	gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
out_gpio:
	platform_set_drvdata(pdev, NULL);
	gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
	iounmap(io_base);
out_free:
	kfree(ams_delta_mtd);
 out:
	return err;
}

/*
 * Clean up routine
 */
static int __devexit ams_delta_cleanup(struct platform_device *pdev)
{
	void __iomem *io_base = platform_get_drvdata(pdev);

	/* Release resources, unregister device */
	nand_release(ams_delta_mtd);

	gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
	gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
	iounmap(io_base);

	/* Free the MTD device structure */
	kfree(ams_delta_mtd);

	return 0;
}

static struct platform_driver ams_delta_nand_driver = {
	.probe		= ams_delta_init,
	.remove		= __devexit_p(ams_delta_cleanup),
	.driver		= {
		.name	= "ams-delta-nand",
		.owner	= THIS_MODULE,
	},
};

module_platform_driver(ams_delta_nand_driver);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>");
MODULE_DESCRIPTION("Glue layer for NAND flash on Amstrad E3 (Delta)");
Commit	Line	Data
3d12c0c7 JM	1	/*
	2	* drivers/mtd/nand/ams-delta.c
	3	*
	4	* Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
	5	*
	6	* Derived from drivers/mtd/toto.c
7e95d1f1	7	* Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
eaca491f	8	* Partially stolen from drivers/mtd/nand/plat_nand.c
3d12c0c7 JM	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	* Overview:
	15	* This is a device driver for the NAND flash device found on the
	16	* Amstrad E3 (Delta).
	17	*/
	18
	19	#include <linux/slab.h>
	20	#include <linux/init.h>
	21	#include <linux/module.h>
	22	#include <linux/delay.h>
	23	#include <linux/mtd/mtd.h>
	24	#include <linux/mtd/nand.h>
	25	#include <linux/mtd/partitions.h>
4b25408f TL	26	#include <linux/gpio.h>
	27	#include <linux/platform_data/gpio-omap.h>
	28
3d12c0c7	29	#include <asm/io.h>
3d12c0c7	30	#include <asm/sizes.h>
4b25408f	31
e27e35ec	32	#include <mach/board-ams-delta.h>
3d12c0c7	33
4b25408f	34	#include <mach/hardware.h>
3d12c0c7 JM	35
	36	/*
	37	* MTD structure for E3 (Delta)
	38	*/
	39	static struct mtd_info *ams_delta_mtd = NULL;
	40
3d12c0c7 JM	41	/*
	42	* Define partitions for flash devices
	43	*/
	44
	45	static struct mtd_partition partition_info[] = {
	46	{ .name = "Kernel",
	47	.offset = 0,
	48	.size = 3 * SZ_1M + SZ_512K },
	49	{ .name = "u-boot",
	50	.offset = 3 * SZ_1M + SZ_512K,
	51	.size = SZ_256K },
	52	{ .name = "u-boot params",
	53	.offset = 3 * SZ_1M + SZ_512K + SZ_256K,
	54	.size = SZ_256K },
	55	{ .name = "Amstrad LDR",
	56	.offset = 4 * SZ_1M,
	57	.size = SZ_256K },
	58	{ .name = "File system",
	59	.offset = 4 * SZ_1M + 1 * SZ_256K,
	60	.size = 27 * SZ_1M },
	61	{ .name = "PBL reserved",
	62	.offset = 32 * SZ_1M - 3 * SZ_256K,
	63	.size = 3 * SZ_256K },
	64	};
	65
3d12c0c7 JM	66	static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
	67	{
	68	struct nand_chip *this = mtd->priv;
eaca491f	69	void __iomem *io_base = this->priv;
3d12c0c7	70
eaca491f JK	71	writew(0, io_base + OMAP_MPUIO_IO_CNTL);
eaca491f JK	72	writew(byte, this->IO_ADDR_W);
68f06766	73	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
3d12c0c7	74	ndelay(40);
68f06766	75	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
3d12c0c7 JM	76	}
	77
	78	static u_char ams_delta_read_byte(struct mtd_info *mtd)
	79	{
	80	u_char res;
	81	struct nand_chip *this = mtd->priv;
eaca491f	82	void __iomem *io_base = this->priv;
3d12c0c7	83
68f06766	84	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
3d12c0c7	85	ndelay(40);
eaca491f JK	86	writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
eaca491f JK	87	res = readw(this->IO_ADDR_R);
68f06766	88	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);
3d12c0c7 JM	89
	90	return res;
	91	}
	92
	93	static void ams_delta_write_buf(struct mtd_info mtd, const u_char buf,
	94	int len)
	95	{
	96	int i;
	97
	98	for (i=0; i<len; i++)
	99	ams_delta_write_byte(mtd, buf[i]);
	100	}
	101
	102	static void ams_delta_read_buf(struct mtd_info mtd, u_char buf, int len)
	103	{
	104	int i;
	105
	106	for (i=0; i<len; i++)
	107	buf[i] = ams_delta_read_byte(mtd);
	108	}
	109
7abd3ef9 TG	110	/*
	111	* Command control function
	112	*
	113	* ctrl:
	114	* NAND_NCE: bit 0 -> bit 2
	115	* NAND_CLE: bit 1 -> bit 7
	116	* NAND_ALE: bit 2 -> bit 6
	117	*/
	118	static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
	119	unsigned int ctrl)
	120	{
	121
	122	if (ctrl & NAND_CTRL_CHANGE) {
68f06766 JK	123	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
	124	(ctrl & NAND_NCE) == 0);
	125	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
	126	(ctrl & NAND_CLE) != 0);
	127	gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
	128	(ctrl & NAND_ALE) != 0);
7abd3ef9 TG	129	}
	130
	131	if (cmd != NAND_CMD_NONE)
	132	ams_delta_write_byte(mtd, cmd);
	133	}
	134
3d12c0c7 JM	135	static int ams_delta_nand_ready(struct mtd_info *mtd)
3d12c0c7 JM	136	{
93a22f8b	137	return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
3d12c0c7 JM	138	}
3d12c0c7 JM	139
da564a05	140	static const struct gpio _mandatory_gpio[] = {
68f06766 JK	141	{
	142	.gpio = AMS_DELTA_GPIO_PIN_NAND_NCE,
	143	.flags = GPIOF_OUT_INIT_HIGH,
	144	.label = "nand_nce",
	145	},
	146	{
	147	.gpio = AMS_DELTA_GPIO_PIN_NAND_NRE,
	148	.flags = GPIOF_OUT_INIT_HIGH,
	149	.label = "nand_nre",
	150	},
	151	{
	152	.gpio = AMS_DELTA_GPIO_PIN_NAND_NWP,
	153	.flags = GPIOF_OUT_INIT_HIGH,
	154	.label = "nand_nwp",
	155	},
	156	{
	157	.gpio = AMS_DELTA_GPIO_PIN_NAND_NWE,
	158	.flags = GPIOF_OUT_INIT_HIGH,
	159	.label = "nand_nwe",
	160	},
	161	{
	162	.gpio = AMS_DELTA_GPIO_PIN_NAND_ALE,
	163	.flags = GPIOF_OUT_INIT_LOW,
	164	.label = "nand_ale",
	165	},
	166	{
	167	.gpio = AMS_DELTA_GPIO_PIN_NAND_CLE,
	168	.flags = GPIOF_OUT_INIT_LOW,
	169	.label = "nand_cle",
	170	},
	171	};
	172
3d12c0c7 JM	173	/*
	174	* Main initialization routine
	175	*/
7e95d1f1	176	static int __devinit ams_delta_init(struct platform_device *pdev)
3d12c0c7 JM	177	{
3d12c0c7 JM	178	struct nand_chip *this;
eaca491f JK	179	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
eaca491f JK	180	void __iomem *io_base;
3d12c0c7 JM	181	int err = 0;
3d12c0c7 JM	182
eaca491f JK	183	if (!res)
	184	return -ENXIO;
	185
3d12c0c7 JM	186	/* Allocate memory for MTD device structure and private data */
	187	ams_delta_mtd = kmalloc(sizeof(struct mtd_info) +
	188	sizeof(struct nand_chip), GFP_KERNEL);
	189	if (!ams_delta_mtd) {
	190	printk (KERN_WARNING "Unable to allocate E3 NAND MTD device structure.\n");
	191	err = -ENOMEM;
	192	goto out;
	193	}
	194
	195	ams_delta_mtd->owner = THIS_MODULE;
	196
	197	/* Get pointer to private data */
	198	this = (struct nand_chip *) (&ams_delta_mtd[1]);
	199
	200	/* Initialize structures */
	201	memset(ams_delta_mtd, 0, sizeof(struct mtd_info));
	202	memset(this, 0, sizeof(struct nand_chip));
	203
	204	/* Link the private data with the MTD structure */
	205	ams_delta_mtd->priv = this;
	206
b027274d JK	207	/*
	208	* Don't try to request the memory region from here,
	209	* it should have been already requested from the
	210	* gpio-omap driver and requesting it again would fail.
	211	*/
eaca491f JK	212
	213	io_base = ioremap(res->start, resource_size(res));
	214	if (io_base == NULL) {
	215	dev_err(&pdev->dev, "ioremap failed\n");
	216	err = -EIO;
b027274d	217	goto out_free;
eaca491f JK	218	}
	219
	220	this->priv = io_base;
	221
3d12c0c7	222	/* Set address of NAND IO lines */
eaca491f JK	223	this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
eaca491f JK	224	this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT;
3d12c0c7	225	this->read_byte = ams_delta_read_byte;
3d12c0c7 JM	226	this->write_buf = ams_delta_write_buf;
3d12c0c7 JM	227	this->read_buf = ams_delta_read_buf;
7abd3ef9	228	this->cmd_ctrl = ams_delta_hwcontrol;
93a22f8b	229	if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) {
3d12c0c7 JM	230	this->dev_ready = ams_delta_nand_ready;
	231	} else {
	232	this->dev_ready = NULL;
	233	printk(KERN_NOTICE "Couldn't request gpio for Delta NAND ready.\n");
	234	}
	235	/* 25 us command delay time */
	236	this->chip_delay = 30;
6dfc6d25	237	this->ecc.mode = NAND_ECC_SOFT;
3d12c0c7	238
eaca491f JK	239	platform_set_drvdata(pdev, io_base);
eaca491f JK	240
3d12c0c7	241	/* Set chip enabled, but */
68f06766 JK	242	err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
	243	if (err)
	244	goto out_gpio;
3d12c0c7	245
25985edc	246	/* Scan to find existence of the device */
3d12c0c7 JM	247	if (nand_scan(ams_delta_mtd, 1)) {
	248	err = -ENXIO;
	249	goto out_mtd;
	250	}
	251
	252	/* Register the partitions */
ee0e87b1 JI	253	mtd_device_register(ams_delta_mtd, partition_info,
ee0e87b1 JI	254	ARRAY_SIZE(partition_info));
3d12c0c7 JM	255
	256	goto out;
	257
	258	out_mtd:
68f06766 JK	259	gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
68f06766 JK	260	out_gpio:
eaca491f	261	platform_set_drvdata(pdev, NULL);
68f06766	262	gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
eaca491f	263	iounmap(io_base);
eaca491f	264	out_free:
3d12c0c7 JM	265	kfree(ams_delta_mtd);
	266	out:
	267	return err;
	268	}
	269
3d12c0c7 JM	270	/*
	271	* Clean up routine
	272	*/
7e95d1f1	273	static int __devexit ams_delta_cleanup(struct platform_device *pdev)
3d12c0c7	274	{
eaca491f	275	void __iomem *io_base = platform_get_drvdata(pdev);
eaca491f	276
3d12c0c7 JM	277	/* Release resources, unregister device */
	278	nand_release(ams_delta_mtd);
	279
68f06766 JK	280	gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
68f06766 JK	281	gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
eaca491f	282	iounmap(io_base);
eaca491f	283
3d12c0c7 JM	284	/* Free the MTD device structure */
3d12c0c7 JM	285	kfree(ams_delta_mtd);
7e95d1f1 JK	286
	287	return 0;
	288	}
	289
	290	static struct platform_driver ams_delta_nand_driver = {
	291	.probe = ams_delta_init,
	292	.remove = __devexit_p(ams_delta_cleanup),
	293	.driver = {
	294	.name = "ams-delta-nand",
	295	.owner = THIS_MODULE,
	296	},
	297	};
	298
f99640de	299	module_platform_driver(ams_delta_nand_driver);
3d12c0c7 JM	300
	301	MODULE_LICENSE("GPL");
	302	MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>");
	303	MODULE_DESCRIPTION("Glue layer for NAND flash on Amstrad E3 (Delta)");