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570469f3 MD |
1 | /* |
2 | * Copyright © 2012 Mike Dunn <mikedunn@newsguy.com> | |
3 | * | |
4 | * mtd nand driver for M-Systems DiskOnChip G4 | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * Tested on the Palm Treo 680. The G4 is also present on Toshiba Portege, Asus | |
12 | * P526, some HTC smartphones (Wizard, Prophet, ...), O2 XDA Zinc, maybe others. | |
13 | * Should work on these as well. Let me know! | |
14 | * | |
15 | * TODO: | |
16 | * | |
17 | * Mechanism for management of password-protected areas | |
18 | * | |
19 | * Hamming ecc when reading oob only | |
20 | * | |
21 | * According to the M-Sys documentation, this device is also available in a | |
22 | * "dual-die" configuration having a 256MB capacity, but no mechanism for | |
23 | * detecting this variant is documented. Currently this driver assumes 128MB | |
24 | * capacity. | |
25 | * | |
26 | * Support for multiple cascaded devices ("floors"). Not sure which gadgets | |
27 | * contain multiple G4s in a cascaded configuration, if any. | |
28 | * | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/slab.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/sched.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/export.h> | |
39 | #include <linux/platform_device.h> | |
40 | #include <linux/io.h> | |
41 | #include <linux/bitops.h> | |
42 | #include <linux/mtd/partitions.h> | |
43 | #include <linux/mtd/mtd.h> | |
44 | #include <linux/mtd/nand.h> | |
45 | #include <linux/bch.h> | |
46 | #include <linux/bitrev.h> | |
47 | ||
48 | /* | |
49 | * You'll want to ignore badblocks if you're reading a partition that contains | |
50 | * data written by the TrueFFS library (i.e., by PalmOS, Windows, etc), since | |
51 | * it does not use mtd nand's method for marking bad blocks (using oob area). | |
52 | * This will also skip the check of the "page written" flag. | |
53 | */ | |
54 | static bool ignore_badblocks; | |
55 | module_param(ignore_badblocks, bool, 0); | |
56 | MODULE_PARM_DESC(ignore_badblocks, "no badblock checking performed"); | |
57 | ||
58 | struct docg4_priv { | |
59 | struct mtd_info *mtd; | |
60 | struct device *dev; | |
61 | void __iomem *virtadr; | |
62 | int status; | |
63 | struct { | |
64 | unsigned int command; | |
65 | int column; | |
66 | int page; | |
67 | } last_command; | |
68 | uint8_t oob_buf[16]; | |
69 | uint8_t ecc_buf[7]; | |
70 | int oob_page; | |
71 | struct bch_control *bch; | |
72 | }; | |
73 | ||
74 | /* | |
75 | * Defines prefixed with DOCG4 are unique to the diskonchip G4. All others are | |
76 | * shared with other diskonchip devices (P3, G3 at least). | |
77 | * | |
78 | * Functions with names prefixed with docg4_ are mtd / nand interface functions | |
79 | * (though they may also be called internally). All others are internal. | |
80 | */ | |
81 | ||
82 | #define DOC_IOSPACE_DATA 0x0800 | |
83 | ||
84 | /* register offsets */ | |
85 | #define DOC_CHIPID 0x1000 | |
86 | #define DOC_DEVICESELECT 0x100a | |
87 | #define DOC_ASICMODE 0x100c | |
88 | #define DOC_DATAEND 0x101e | |
89 | #define DOC_NOP 0x103e | |
90 | ||
91 | #define DOC_FLASHSEQUENCE 0x1032 | |
92 | #define DOC_FLASHCOMMAND 0x1034 | |
93 | #define DOC_FLASHADDRESS 0x1036 | |
94 | #define DOC_FLASHCONTROL 0x1038 | |
95 | #define DOC_ECCCONF0 0x1040 | |
96 | #define DOC_ECCCONF1 0x1042 | |
97 | #define DOC_HAMMINGPARITY 0x1046 | |
98 | #define DOC_BCH_SYNDROM(idx) (0x1048 + idx) | |
99 | ||
100 | #define DOC_ASICMODECONFIRM 0x1072 | |
101 | #define DOC_CHIPID_INV 0x1074 | |
102 | #define DOC_POWERMODE 0x107c | |
103 | ||
104 | #define DOCG4_MYSTERY_REG 0x1050 | |
105 | ||
106 | /* apparently used only to write oob bytes 6 and 7 */ | |
107 | #define DOCG4_OOB_6_7 0x1052 | |
108 | ||
109 | /* DOC_FLASHSEQUENCE register commands */ | |
110 | #define DOC_SEQ_RESET 0x00 | |
111 | #define DOCG4_SEQ_PAGE_READ 0x03 | |
112 | #define DOCG4_SEQ_FLUSH 0x29 | |
113 | #define DOCG4_SEQ_PAGEWRITE 0x16 | |
114 | #define DOCG4_SEQ_PAGEPROG 0x1e | |
115 | #define DOCG4_SEQ_BLOCKERASE 0x24 | |
116 | ||
117 | /* DOC_FLASHCOMMAND register commands */ | |
118 | #define DOCG4_CMD_PAGE_READ 0x00 | |
119 | #define DOC_CMD_ERASECYCLE2 0xd0 | |
120 | #define DOCG4_CMD_FLUSH 0x70 | |
121 | #define DOCG4_CMD_READ2 0x30 | |
122 | #define DOC_CMD_PROG_BLOCK_ADDR 0x60 | |
123 | #define DOCG4_CMD_PAGEWRITE 0x80 | |
124 | #define DOC_CMD_PROG_CYCLE2 0x10 | |
125 | #define DOC_CMD_RESET 0xff | |
126 | ||
127 | /* DOC_POWERMODE register bits */ | |
128 | #define DOC_POWERDOWN_READY 0x80 | |
129 | ||
130 | /* DOC_FLASHCONTROL register bits */ | |
131 | #define DOC_CTRL_CE 0x10 | |
132 | #define DOC_CTRL_UNKNOWN 0x40 | |
133 | #define DOC_CTRL_FLASHREADY 0x01 | |
134 | ||
135 | /* DOC_ECCCONF0 register bits */ | |
136 | #define DOC_ECCCONF0_READ_MODE 0x8000 | |
137 | #define DOC_ECCCONF0_UNKNOWN 0x2000 | |
138 | #define DOC_ECCCONF0_ECC_ENABLE 0x1000 | |
139 | #define DOC_ECCCONF0_DATA_BYTES_MASK 0x07ff | |
140 | ||
141 | /* DOC_ECCCONF1 register bits */ | |
142 | #define DOC_ECCCONF1_BCH_SYNDROM_ERR 0x80 | |
143 | #define DOC_ECCCONF1_ECC_ENABLE 0x07 | |
144 | #define DOC_ECCCONF1_PAGE_IS_WRITTEN 0x20 | |
145 | ||
146 | /* DOC_ASICMODE register bits */ | |
147 | #define DOC_ASICMODE_RESET 0x00 | |
148 | #define DOC_ASICMODE_NORMAL 0x01 | |
149 | #define DOC_ASICMODE_POWERDOWN 0x02 | |
150 | #define DOC_ASICMODE_MDWREN 0x04 | |
151 | #define DOC_ASICMODE_BDETCT_RESET 0x08 | |
152 | #define DOC_ASICMODE_RSTIN_RESET 0x10 | |
153 | #define DOC_ASICMODE_RAM_WE 0x20 | |
154 | ||
155 | /* good status values read after read/write/erase operations */ | |
156 | #define DOCG4_PROGSTATUS_GOOD 0x51 | |
157 | #define DOCG4_PROGSTATUS_GOOD_2 0xe0 | |
158 | ||
159 | /* | |
160 | * On read operations (page and oob-only), the first byte read from I/O reg is a | |
161 | * status. On error, it reads 0x73; otherwise, it reads either 0x71 (first read | |
162 | * after reset only) or 0x51, so bit 1 is presumed to be an error indicator. | |
163 | */ | |
164 | #define DOCG4_READ_ERROR 0x02 /* bit 1 indicates read error */ | |
165 | ||
166 | /* anatomy of the device */ | |
167 | #define DOCG4_CHIP_SIZE 0x8000000 | |
168 | #define DOCG4_PAGE_SIZE 0x200 | |
169 | #define DOCG4_PAGES_PER_BLOCK 0x200 | |
170 | #define DOCG4_BLOCK_SIZE (DOCG4_PAGES_PER_BLOCK * DOCG4_PAGE_SIZE) | |
171 | #define DOCG4_NUMBLOCKS (DOCG4_CHIP_SIZE / DOCG4_BLOCK_SIZE) | |
172 | #define DOCG4_OOB_SIZE 0x10 | |
173 | #define DOCG4_CHIP_SHIFT 27 /* log_2(DOCG4_CHIP_SIZE) */ | |
174 | #define DOCG4_PAGE_SHIFT 9 /* log_2(DOCG4_PAGE_SIZE) */ | |
175 | #define DOCG4_ERASE_SHIFT 18 /* log_2(DOCG4_BLOCK_SIZE) */ | |
176 | ||
177 | /* all but the last byte is included in ecc calculation */ | |
178 | #define DOCG4_BCH_SIZE (DOCG4_PAGE_SIZE + DOCG4_OOB_SIZE - 1) | |
179 | ||
180 | #define DOCG4_USERDATA_LEN 520 /* 512 byte page plus 8 oob avail to user */ | |
181 | ||
182 | /* expected values from the ID registers */ | |
183 | #define DOCG4_IDREG1_VALUE 0x0400 | |
184 | #define DOCG4_IDREG2_VALUE 0xfbff | |
185 | ||
186 | /* primitive polynomial used to build the Galois field used by hw ecc gen */ | |
187 | #define DOCG4_PRIMITIVE_POLY 0x4443 | |
188 | ||
189 | #define DOCG4_M 14 /* Galois field is of order 2^14 */ | |
190 | #define DOCG4_T 4 /* BCH alg corrects up to 4 bit errors */ | |
191 | ||
192 | #define DOCG4_FACTORY_BBT_PAGE 16 /* page where read-only factory bbt lives */ | |
193 | ||
194 | /* | |
195 | * Oob bytes 0 - 6 are available to the user. | |
196 | * Byte 7 is hamming ecc for first 7 bytes. Bytes 8 - 14 are hw-generated ecc. | |
197 | * Byte 15 (the last) is used by the driver as a "page written" flag. | |
198 | */ | |
199 | static struct nand_ecclayout docg4_oobinfo = { | |
200 | .eccbytes = 9, | |
201 | .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15}, | |
202 | .oobavail = 7, | |
203 | .oobfree = { {0, 7} } | |
204 | }; | |
205 | ||
206 | /* | |
207 | * The device has a nop register which M-Sys claims is for the purpose of | |
208 | * inserting precise delays. But beware; at least some operations fail if the | |
209 | * nop writes are replaced with a generic delay! | |
210 | */ | |
211 | static inline void write_nop(void __iomem *docptr) | |
212 | { | |
213 | writew(0, docptr + DOC_NOP); | |
214 | } | |
215 | ||
216 | static void docg4_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) | |
217 | { | |
218 | int i; | |
219 | struct nand_chip *nand = mtd->priv; | |
220 | uint16_t *p = (uint16_t *) buf; | |
221 | len >>= 1; | |
222 | ||
223 | for (i = 0; i < len; i++) | |
224 | p[i] = readw(nand->IO_ADDR_R); | |
225 | } | |
226 | ||
227 | static void docg4_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) | |
228 | { | |
229 | int i; | |
230 | struct nand_chip *nand = mtd->priv; | |
231 | uint16_t *p = (uint16_t *) buf; | |
232 | len >>= 1; | |
233 | ||
234 | for (i = 0; i < len; i++) | |
235 | writew(p[i], nand->IO_ADDR_W); | |
236 | } | |
237 | ||
238 | static int poll_status(struct docg4_priv *doc) | |
239 | { | |
240 | /* | |
241 | * Busy-wait for the FLASHREADY bit to be set in the FLASHCONTROL | |
242 | * register. Operations known to take a long time (e.g., block erase) | |
243 | * should sleep for a while before calling this. | |
244 | */ | |
245 | ||
246 | uint16_t flash_status; | |
247 | unsigned int timeo; | |
248 | void __iomem *docptr = doc->virtadr; | |
249 | ||
250 | dev_dbg(doc->dev, "%s...\n", __func__); | |
251 | ||
252 | /* hardware quirk requires reading twice initially */ | |
253 | flash_status = readw(docptr + DOC_FLASHCONTROL); | |
254 | ||
255 | timeo = 1000; | |
256 | do { | |
257 | cpu_relax(); | |
258 | flash_status = readb(docptr + DOC_FLASHCONTROL); | |
259 | } while (!(flash_status & DOC_CTRL_FLASHREADY) && --timeo); | |
260 | ||
261 | ||
262 | if (!timeo) { | |
263 | dev_err(doc->dev, "%s: timed out!\n", __func__); | |
264 | return NAND_STATUS_FAIL; | |
265 | } | |
266 | ||
267 | if (unlikely(timeo < 50)) | |
268 | dev_warn(doc->dev, "%s: nearly timed out; %d remaining\n", | |
269 | __func__, timeo); | |
270 | ||
271 | return 0; | |
272 | } | |
273 | ||
274 | ||
275 | static int docg4_wait(struct mtd_info *mtd, struct nand_chip *nand) | |
276 | { | |
277 | ||
278 | struct docg4_priv *doc = nand->priv; | |
279 | int status = NAND_STATUS_WP; /* inverse logic?? */ | |
280 | dev_dbg(doc->dev, "%s...\n", __func__); | |
281 | ||
282 | /* report any previously unreported error */ | |
283 | if (doc->status) { | |
284 | status |= doc->status; | |
285 | doc->status = 0; | |
286 | return status; | |
287 | } | |
288 | ||
289 | status |= poll_status(doc); | |
290 | return status; | |
291 | } | |
292 | ||
293 | static void docg4_select_chip(struct mtd_info *mtd, int chip) | |
294 | { | |
295 | /* | |
296 | * Select among multiple cascaded chips ("floors"). Multiple floors are | |
297 | * not yet supported, so the only valid non-negative value is 0. | |
298 | */ | |
299 | struct nand_chip *nand = mtd->priv; | |
300 | struct docg4_priv *doc = nand->priv; | |
301 | void __iomem *docptr = doc->virtadr; | |
302 | ||
303 | dev_dbg(doc->dev, "%s: chip %d\n", __func__, chip); | |
304 | ||
305 | if (chip < 0) | |
306 | return; /* deselected */ | |
307 | ||
308 | if (chip > 0) | |
309 | dev_warn(doc->dev, "multiple floors currently unsupported\n"); | |
310 | ||
311 | writew(0, docptr + DOC_DEVICESELECT); | |
312 | } | |
313 | ||
314 | static void reset(struct mtd_info *mtd) | |
315 | { | |
316 | /* full device reset */ | |
317 | ||
318 | struct nand_chip *nand = mtd->priv; | |
319 | struct docg4_priv *doc = nand->priv; | |
320 | void __iomem *docptr = doc->virtadr; | |
321 | ||
322 | writew(DOC_ASICMODE_RESET | DOC_ASICMODE_MDWREN, | |
323 | docptr + DOC_ASICMODE); | |
324 | writew(~(DOC_ASICMODE_RESET | DOC_ASICMODE_MDWREN), | |
325 | docptr + DOC_ASICMODECONFIRM); | |
326 | write_nop(docptr); | |
327 | ||
328 | writew(DOC_ASICMODE_NORMAL | DOC_ASICMODE_MDWREN, | |
329 | docptr + DOC_ASICMODE); | |
330 | writew(~(DOC_ASICMODE_NORMAL | DOC_ASICMODE_MDWREN), | |
331 | docptr + DOC_ASICMODECONFIRM); | |
332 | ||
333 | writew(DOC_ECCCONF1_ECC_ENABLE, docptr + DOC_ECCCONF1); | |
334 | ||
335 | poll_status(doc); | |
336 | } | |
337 | ||
338 | static void read_hw_ecc(void __iomem *docptr, uint8_t *ecc_buf) | |
339 | { | |
340 | /* read the 7 hw-generated ecc bytes */ | |
341 | ||
342 | int i; | |
343 | for (i = 0; i < 7; i++) { /* hw quirk; read twice */ | |
344 | ecc_buf[i] = readb(docptr + DOC_BCH_SYNDROM(i)); | |
345 | ecc_buf[i] = readb(docptr + DOC_BCH_SYNDROM(i)); | |
346 | } | |
347 | } | |
348 | ||
349 | static int correct_data(struct mtd_info *mtd, uint8_t *buf, int page) | |
350 | { | |
351 | /* | |
352 | * Called after a page read when hardware reports bitflips. | |
353 | * Up to four bitflips can be corrected. | |
354 | */ | |
355 | ||
356 | struct nand_chip *nand = mtd->priv; | |
357 | struct docg4_priv *doc = nand->priv; | |
358 | void __iomem *docptr = doc->virtadr; | |
359 | int i, numerrs, errpos[4]; | |
360 | const uint8_t blank_read_hwecc[8] = { | |
361 | 0xcf, 0x72, 0xfc, 0x1b, 0xa9, 0xc7, 0xb9, 0 }; | |
362 | ||
363 | read_hw_ecc(docptr, doc->ecc_buf); /* read 7 hw-generated ecc bytes */ | |
364 | ||
365 | /* check if read error is due to a blank page */ | |
366 | if (!memcmp(doc->ecc_buf, blank_read_hwecc, 7)) | |
367 | return 0; /* yes */ | |
368 | ||
369 | /* skip additional check of "written flag" if ignore_badblocks */ | |
370 | if (ignore_badblocks == false) { | |
371 | ||
372 | /* | |
373 | * If the hw ecc bytes are not those of a blank page, there's | |
374 | * still a chance that the page is blank, but was read with | |
375 | * errors. Check the "written flag" in last oob byte, which | |
376 | * is set to zero when a page is written. If more than half | |
377 | * the bits are set, assume a blank page. Unfortunately, the | |
378 | * bit flips(s) are not reported in stats. | |
379 | */ | |
380 | ||
aa6d01fa | 381 | if (nand->oob_poi[15]) { |
570469f3 | 382 | int bit, numsetbits = 0; |
aa6d01fa | 383 | unsigned long written_flag = nand->oob_poi[15]; |
570469f3 MD |
384 | for_each_set_bit(bit, &written_flag, 8) |
385 | numsetbits++; | |
386 | if (numsetbits > 4) { /* assume blank */ | |
387 | dev_warn(doc->dev, | |
388 | "error(s) in blank page " | |
389 | "at offset %08x\n", | |
390 | page * DOCG4_PAGE_SIZE); | |
391 | return 0; | |
392 | } | |
393 | } | |
394 | } | |
395 | ||
396 | /* | |
397 | * The hardware ecc unit produces oob_ecc ^ calc_ecc. The kernel's bch | |
398 | * algorithm is used to decode this. However the hw operates on page | |
399 | * data in a bit order that is the reverse of that of the bch alg, | |
400 | * requiring that the bits be reversed on the result. Thanks to Ivan | |
401 | * Djelic for his analysis! | |
402 | */ | |
403 | for (i = 0; i < 7; i++) | |
404 | doc->ecc_buf[i] = bitrev8(doc->ecc_buf[i]); | |
405 | ||
406 | numerrs = decode_bch(doc->bch, NULL, DOCG4_USERDATA_LEN, NULL, | |
407 | doc->ecc_buf, NULL, errpos); | |
408 | ||
409 | if (numerrs == -EBADMSG) { | |
410 | dev_warn(doc->dev, "uncorrectable errors at offset %08x\n", | |
411 | page * DOCG4_PAGE_SIZE); | |
412 | return -EBADMSG; | |
413 | } | |
414 | ||
415 | BUG_ON(numerrs < 0); /* -EINVAL, or anything other than -EBADMSG */ | |
416 | ||
417 | /* undo last step in BCH alg (modulo mirroring not needed) */ | |
418 | for (i = 0; i < numerrs; i++) | |
419 | errpos[i] = (errpos[i] & ~7)|(7-(errpos[i] & 7)); | |
420 | ||
421 | /* fix the errors */ | |
422 | for (i = 0; i < numerrs; i++) { | |
423 | ||
424 | /* ignore if error within oob ecc bytes */ | |
425 | if (errpos[i] > DOCG4_USERDATA_LEN * 8) | |
426 | continue; | |
427 | ||
428 | /* if error within oob area preceeding ecc bytes... */ | |
429 | if (errpos[i] > DOCG4_PAGE_SIZE * 8) | |
430 | change_bit(errpos[i] - DOCG4_PAGE_SIZE * 8, | |
aa6d01fa | 431 | (unsigned long *)nand->oob_poi); |
570469f3 MD |
432 | |
433 | else /* error in page data */ | |
434 | change_bit(errpos[i], (unsigned long *)buf); | |
435 | } | |
436 | ||
437 | dev_notice(doc->dev, "%d error(s) corrected at offset %08x\n", | |
438 | numerrs, page * DOCG4_PAGE_SIZE); | |
439 | ||
440 | return numerrs; | |
441 | } | |
442 | ||
443 | static uint8_t docg4_read_byte(struct mtd_info *mtd) | |
444 | { | |
445 | struct nand_chip *nand = mtd->priv; | |
446 | struct docg4_priv *doc = nand->priv; | |
447 | ||
448 | dev_dbg(doc->dev, "%s\n", __func__); | |
449 | ||
450 | if (doc->last_command.command == NAND_CMD_STATUS) { | |
451 | int status; | |
452 | ||
453 | /* | |
454 | * Previous nand command was status request, so nand | |
455 | * infrastructure code expects to read the status here. If an | |
456 | * error occurred in a previous operation, report it. | |
457 | */ | |
458 | doc->last_command.command = 0; | |
459 | ||
460 | if (doc->status) { | |
461 | status = doc->status; | |
462 | doc->status = 0; | |
463 | } | |
464 | ||
465 | /* why is NAND_STATUS_WP inverse logic?? */ | |
466 | else | |
467 | status = NAND_STATUS_WP | NAND_STATUS_READY; | |
468 | ||
469 | return status; | |
470 | } | |
471 | ||
472 | dev_warn(doc->dev, "unexpectd call to read_byte()\n"); | |
473 | ||
474 | return 0; | |
475 | } | |
476 | ||
477 | static void write_addr(struct docg4_priv *doc, uint32_t docg4_addr) | |
478 | { | |
479 | /* write the four address bytes packed in docg4_addr to the device */ | |
480 | ||
481 | void __iomem *docptr = doc->virtadr; | |
482 | writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS); | |
483 | docg4_addr >>= 8; | |
484 | writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS); | |
485 | docg4_addr >>= 8; | |
486 | writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS); | |
487 | docg4_addr >>= 8; | |
488 | writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS); | |
489 | } | |
490 | ||
491 | static int read_progstatus(struct docg4_priv *doc) | |
492 | { | |
493 | /* | |
494 | * This apparently checks the status of programming. Done after an | |
495 | * erasure, and after page data is written. On error, the status is | |
496 | * saved, to be later retrieved by the nand infrastructure code. | |
497 | */ | |
498 | void __iomem *docptr = doc->virtadr; | |
499 | ||
500 | /* status is read from the I/O reg */ | |
501 | uint16_t status1 = readw(docptr + DOC_IOSPACE_DATA); | |
502 | uint16_t status2 = readw(docptr + DOC_IOSPACE_DATA); | |
503 | uint16_t status3 = readw(docptr + DOCG4_MYSTERY_REG); | |
504 | ||
505 | dev_dbg(doc->dev, "docg4: %s: %02x %02x %02x\n", | |
506 | __func__, status1, status2, status3); | |
507 | ||
508 | if (status1 != DOCG4_PROGSTATUS_GOOD | |
509 | || status2 != DOCG4_PROGSTATUS_GOOD_2 | |
510 | || status3 != DOCG4_PROGSTATUS_GOOD_2) { | |
511 | doc->status = NAND_STATUS_FAIL; | |
512 | dev_warn(doc->dev, "read_progstatus failed: " | |
513 | "%02x, %02x, %02x\n", status1, status2, status3); | |
514 | return -EIO; | |
515 | } | |
516 | return 0; | |
517 | } | |
518 | ||
519 | static int pageprog(struct mtd_info *mtd) | |
520 | { | |
521 | /* | |
522 | * Final step in writing a page. Writes the contents of its | |
523 | * internal buffer out to the flash array, or some such. | |
524 | */ | |
525 | ||
526 | struct nand_chip *nand = mtd->priv; | |
527 | struct docg4_priv *doc = nand->priv; | |
528 | void __iomem *docptr = doc->virtadr; | |
529 | int retval = 0; | |
530 | ||
531 | dev_dbg(doc->dev, "docg4: %s\n", __func__); | |
532 | ||
533 | writew(DOCG4_SEQ_PAGEPROG, docptr + DOC_FLASHSEQUENCE); | |
534 | writew(DOC_CMD_PROG_CYCLE2, docptr + DOC_FLASHCOMMAND); | |
535 | write_nop(docptr); | |
536 | write_nop(docptr); | |
537 | ||
538 | /* Just busy-wait; usleep_range() slows things down noticeably. */ | |
539 | poll_status(doc); | |
540 | ||
541 | writew(DOCG4_SEQ_FLUSH, docptr + DOC_FLASHSEQUENCE); | |
542 | writew(DOCG4_CMD_FLUSH, docptr + DOC_FLASHCOMMAND); | |
543 | writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0); | |
544 | write_nop(docptr); | |
545 | write_nop(docptr); | |
546 | write_nop(docptr); | |
547 | write_nop(docptr); | |
548 | write_nop(docptr); | |
549 | ||
550 | retval = read_progstatus(doc); | |
551 | writew(0, docptr + DOC_DATAEND); | |
552 | write_nop(docptr); | |
553 | poll_status(doc); | |
554 | write_nop(docptr); | |
555 | ||
556 | return retval; | |
557 | } | |
558 | ||
559 | static void sequence_reset(struct mtd_info *mtd) | |
560 | { | |
561 | /* common starting sequence for all operations */ | |
562 | ||
563 | struct nand_chip *nand = mtd->priv; | |
564 | struct docg4_priv *doc = nand->priv; | |
565 | void __iomem *docptr = doc->virtadr; | |
566 | ||
567 | writew(DOC_CTRL_UNKNOWN | DOC_CTRL_CE, docptr + DOC_FLASHCONTROL); | |
568 | writew(DOC_SEQ_RESET, docptr + DOC_FLASHSEQUENCE); | |
569 | writew(DOC_CMD_RESET, docptr + DOC_FLASHCOMMAND); | |
570 | write_nop(docptr); | |
571 | write_nop(docptr); | |
572 | poll_status(doc); | |
573 | write_nop(docptr); | |
574 | } | |
575 | ||
576 | static void read_page_prologue(struct mtd_info *mtd, uint32_t docg4_addr) | |
577 | { | |
578 | /* first step in reading a page */ | |
579 | ||
580 | struct nand_chip *nand = mtd->priv; | |
581 | struct docg4_priv *doc = nand->priv; | |
582 | void __iomem *docptr = doc->virtadr; | |
583 | ||
584 | dev_dbg(doc->dev, | |
585 | "docg4: %s: g4 page %08x\n", __func__, docg4_addr); | |
586 | ||
587 | sequence_reset(mtd); | |
588 | ||
589 | writew(DOCG4_SEQ_PAGE_READ, docptr + DOC_FLASHSEQUENCE); | |
590 | writew(DOCG4_CMD_PAGE_READ, docptr + DOC_FLASHCOMMAND); | |
591 | write_nop(docptr); | |
592 | ||
593 | write_addr(doc, docg4_addr); | |
594 | ||
595 | write_nop(docptr); | |
596 | writew(DOCG4_CMD_READ2, docptr + DOC_FLASHCOMMAND); | |
597 | write_nop(docptr); | |
598 | write_nop(docptr); | |
599 | ||
600 | poll_status(doc); | |
601 | } | |
602 | ||
603 | static void write_page_prologue(struct mtd_info *mtd, uint32_t docg4_addr) | |
604 | { | |
605 | /* first step in writing a page */ | |
606 | ||
607 | struct nand_chip *nand = mtd->priv; | |
608 | struct docg4_priv *doc = nand->priv; | |
609 | void __iomem *docptr = doc->virtadr; | |
610 | ||
611 | dev_dbg(doc->dev, | |
612 | "docg4: %s: g4 addr: %x\n", __func__, docg4_addr); | |
613 | sequence_reset(mtd); | |
614 | writew(DOCG4_SEQ_PAGEWRITE, docptr + DOC_FLASHSEQUENCE); | |
615 | writew(DOCG4_CMD_PAGEWRITE, docptr + DOC_FLASHCOMMAND); | |
616 | write_nop(docptr); | |
617 | write_addr(doc, docg4_addr); | |
618 | write_nop(docptr); | |
619 | write_nop(docptr); | |
620 | poll_status(doc); | |
621 | } | |
622 | ||
623 | static uint32_t mtd_to_docg4_address(int page, int column) | |
624 | { | |
625 | /* | |
626 | * Convert mtd address to format used by the device, 32 bit packed. | |
627 | * | |
628 | * Some notes on G4 addressing... The M-Sys documentation on this device | |
629 | * claims that pages are 2K in length, and indeed, the format of the | |
630 | * address used by the device reflects that. But within each page are | |
631 | * four 512 byte "sub-pages", each with its own oob data that is | |
632 | * read/written immediately after the 512 bytes of page data. This oob | |
633 | * data contains the ecc bytes for the preceeding 512 bytes. | |
634 | * | |
635 | * Rather than tell the mtd nand infrastructure that page size is 2k, | |
636 | * with four sub-pages each, we engage in a little subterfuge and tell | |
637 | * the infrastructure code that pages are 512 bytes in size. This is | |
638 | * done because during the course of reverse-engineering the device, I | |
639 | * never observed an instance where an entire 2K "page" was read or | |
640 | * written as a unit. Each "sub-page" is always addressed individually, | |
641 | * its data read/written, and ecc handled before the next "sub-page" is | |
642 | * addressed. | |
643 | * | |
644 | * This requires us to convert addresses passed by the mtd nand | |
645 | * infrastructure code to those used by the device. | |
646 | * | |
647 | * The address that is written to the device consists of four bytes: the | |
648 | * first two are the 2k page number, and the second is the index into | |
649 | * the page. The index is in terms of 16-bit half-words and includes | |
650 | * the preceeding oob data, so e.g., the index into the second | |
651 | * "sub-page" is 0x108, and the full device address of the start of mtd | |
652 | * page 0x201 is 0x00800108. | |
653 | */ | |
654 | int g4_page = page / 4; /* device's 2K page */ | |
655 | int g4_index = (page % 4) * 0x108 + column/2; /* offset into page */ | |
656 | return (g4_page << 16) | g4_index; /* pack */ | |
657 | } | |
658 | ||
659 | static void docg4_command(struct mtd_info *mtd, unsigned command, int column, | |
660 | int page_addr) | |
661 | { | |
662 | /* handle standard nand commands */ | |
663 | ||
664 | struct nand_chip *nand = mtd->priv; | |
665 | struct docg4_priv *doc = nand->priv; | |
666 | uint32_t g4_addr = mtd_to_docg4_address(page_addr, column); | |
667 | ||
668 | dev_dbg(doc->dev, "%s %x, page_addr=%x, column=%x\n", | |
669 | __func__, command, page_addr, column); | |
670 | ||
671 | /* | |
672 | * Save the command and its arguments. This enables emulation of | |
673 | * standard flash devices, and also some optimizations. | |
674 | */ | |
675 | doc->last_command.command = command; | |
676 | doc->last_command.column = column; | |
677 | doc->last_command.page = page_addr; | |
678 | ||
679 | switch (command) { | |
680 | ||
681 | case NAND_CMD_RESET: | |
682 | reset(mtd); | |
683 | break; | |
684 | ||
685 | case NAND_CMD_READ0: | |
686 | read_page_prologue(mtd, g4_addr); | |
687 | break; | |
688 | ||
689 | case NAND_CMD_STATUS: | |
690 | /* next call to read_byte() will expect a status */ | |
691 | break; | |
692 | ||
693 | case NAND_CMD_SEQIN: | |
694 | write_page_prologue(mtd, g4_addr); | |
695 | ||
696 | /* hack for deferred write of oob bytes */ | |
697 | if (doc->oob_page == page_addr) | |
698 | memcpy(nand->oob_poi, doc->oob_buf, 16); | |
699 | break; | |
700 | ||
701 | case NAND_CMD_PAGEPROG: | |
702 | pageprog(mtd); | |
703 | break; | |
704 | ||
705 | /* we don't expect these, based on review of nand_base.c */ | |
706 | case NAND_CMD_READOOB: | |
707 | case NAND_CMD_READID: | |
708 | case NAND_CMD_ERASE1: | |
709 | case NAND_CMD_ERASE2: | |
710 | dev_warn(doc->dev, "docg4_command: " | |
711 | "unexpected nand command 0x%x\n", command); | |
712 | break; | |
713 | ||
714 | } | |
715 | } | |
716 | ||
717 | static int read_page(struct mtd_info *mtd, struct nand_chip *nand, | |
718 | uint8_t *buf, int page, bool use_ecc) | |
719 | { | |
720 | struct docg4_priv *doc = nand->priv; | |
721 | void __iomem *docptr = doc->virtadr; | |
722 | uint16_t status, edc_err, *buf16; | |
3f91e94f | 723 | int bits_corrected = 0; |
570469f3 MD |
724 | |
725 | dev_dbg(doc->dev, "%s: page %08x\n", __func__, page); | |
726 | ||
727 | writew(DOC_ECCCONF0_READ_MODE | | |
728 | DOC_ECCCONF0_ECC_ENABLE | | |
729 | DOC_ECCCONF0_UNKNOWN | | |
730 | DOCG4_BCH_SIZE, | |
731 | docptr + DOC_ECCCONF0); | |
732 | write_nop(docptr); | |
733 | write_nop(docptr); | |
734 | write_nop(docptr); | |
735 | write_nop(docptr); | |
736 | write_nop(docptr); | |
737 | ||
738 | /* the 1st byte from the I/O reg is a status; the rest is page data */ | |
739 | status = readw(docptr + DOC_IOSPACE_DATA); | |
740 | if (status & DOCG4_READ_ERROR) { | |
741 | dev_err(doc->dev, | |
742 | "docg4_read_page: bad status: 0x%02x\n", status); | |
743 | writew(0, docptr + DOC_DATAEND); | |
744 | return -EIO; | |
745 | } | |
746 | ||
747 | dev_dbg(doc->dev, "%s: status = 0x%x\n", __func__, status); | |
748 | ||
749 | docg4_read_buf(mtd, buf, DOCG4_PAGE_SIZE); /* read the page data */ | |
750 | ||
aa6d01fa | 751 | /* this device always reads oob after page data */ |
570469f3 | 752 | /* first 14 oob bytes read from I/O reg */ |
aa6d01fa | 753 | docg4_read_buf(mtd, nand->oob_poi, 14); |
570469f3 MD |
754 | |
755 | /* last 2 read from another reg */ | |
aa6d01fa | 756 | buf16 = (uint16_t *)(nand->oob_poi + 14); |
570469f3 MD |
757 | *buf16 = readw(docptr + DOCG4_MYSTERY_REG); |
758 | ||
759 | write_nop(docptr); | |
760 | ||
761 | if (likely(use_ecc == true)) { | |
762 | ||
763 | /* read the register that tells us if bitflip(s) detected */ | |
764 | edc_err = readw(docptr + DOC_ECCCONF1); | |
765 | edc_err = readw(docptr + DOC_ECCCONF1); | |
766 | dev_dbg(doc->dev, "%s: edc_err = 0x%02x\n", __func__, edc_err); | |
767 | ||
768 | /* If bitflips are reported, attempt to correct with ecc */ | |
769 | if (edc_err & DOC_ECCCONF1_BCH_SYNDROM_ERR) { | |
3f91e94f | 770 | bits_corrected = correct_data(mtd, buf, page); |
570469f3 MD |
771 | if (bits_corrected == -EBADMSG) |
772 | mtd->ecc_stats.failed++; | |
773 | else | |
774 | mtd->ecc_stats.corrected += bits_corrected; | |
775 | } | |
776 | } | |
777 | ||
778 | writew(0, docptr + DOC_DATAEND); | |
5bf3d66a MD |
779 | if (bits_corrected == -EBADMSG) /* uncorrectable errors */ |
780 | return 0; | |
3f91e94f | 781 | return bits_corrected; |
570469f3 MD |
782 | } |
783 | ||
784 | ||
785 | static int docg4_read_page_raw(struct mtd_info *mtd, struct nand_chip *nand, | |
1fbb938d | 786 | uint8_t *buf, int oob_required, int page) |
570469f3 MD |
787 | { |
788 | return read_page(mtd, nand, buf, page, false); | |
789 | } | |
790 | ||
791 | static int docg4_read_page(struct mtd_info *mtd, struct nand_chip *nand, | |
1fbb938d | 792 | uint8_t *buf, int oob_required, int page) |
570469f3 MD |
793 | { |
794 | return read_page(mtd, nand, buf, page, true); | |
795 | } | |
796 | ||
797 | static int docg4_read_oob(struct mtd_info *mtd, struct nand_chip *nand, | |
5c2ffb11 | 798 | int page) |
570469f3 MD |
799 | { |
800 | struct docg4_priv *doc = nand->priv; | |
801 | void __iomem *docptr = doc->virtadr; | |
802 | uint16_t status; | |
803 | ||
804 | dev_dbg(doc->dev, "%s: page %x\n", __func__, page); | |
805 | ||
570469f3 MD |
806 | docg4_command(mtd, NAND_CMD_READ0, nand->ecc.size, page); |
807 | ||
808 | writew(DOC_ECCCONF0_READ_MODE | DOCG4_OOB_SIZE, docptr + DOC_ECCCONF0); | |
809 | write_nop(docptr); | |
810 | write_nop(docptr); | |
811 | write_nop(docptr); | |
812 | write_nop(docptr); | |
813 | write_nop(docptr); | |
814 | ||
815 | /* the 1st byte from the I/O reg is a status; the rest is oob data */ | |
816 | status = readw(docptr + DOC_IOSPACE_DATA); | |
817 | if (status & DOCG4_READ_ERROR) { | |
818 | dev_warn(doc->dev, | |
819 | "docg4_read_oob failed: status = 0x%02x\n", status); | |
820 | return -EIO; | |
821 | } | |
822 | ||
823 | dev_dbg(doc->dev, "%s: status = 0x%x\n", __func__, status); | |
824 | ||
825 | docg4_read_buf(mtd, nand->oob_poi, 16); | |
826 | ||
827 | write_nop(docptr); | |
828 | write_nop(docptr); | |
829 | write_nop(docptr); | |
830 | writew(0, docptr + DOC_DATAEND); | |
831 | write_nop(docptr); | |
832 | ||
833 | return 0; | |
834 | } | |
835 | ||
836 | static void docg4_erase_block(struct mtd_info *mtd, int page) | |
837 | { | |
838 | struct nand_chip *nand = mtd->priv; | |
839 | struct docg4_priv *doc = nand->priv; | |
840 | void __iomem *docptr = doc->virtadr; | |
841 | uint16_t g4_page; | |
842 | ||
843 | dev_dbg(doc->dev, "%s: page %04x\n", __func__, page); | |
844 | ||
845 | sequence_reset(mtd); | |
846 | ||
847 | writew(DOCG4_SEQ_BLOCKERASE, docptr + DOC_FLASHSEQUENCE); | |
848 | writew(DOC_CMD_PROG_BLOCK_ADDR, docptr + DOC_FLASHCOMMAND); | |
849 | write_nop(docptr); | |
850 | ||
851 | /* only 2 bytes of address are written to specify erase block */ | |
852 | g4_page = (uint16_t)(page / 4); /* to g4's 2k page addressing */ | |
853 | writeb(g4_page & 0xff, docptr + DOC_FLASHADDRESS); | |
854 | g4_page >>= 8; | |
855 | writeb(g4_page & 0xff, docptr + DOC_FLASHADDRESS); | |
856 | write_nop(docptr); | |
857 | ||
858 | /* start the erasure */ | |
859 | writew(DOC_CMD_ERASECYCLE2, docptr + DOC_FLASHCOMMAND); | |
860 | write_nop(docptr); | |
861 | write_nop(docptr); | |
862 | ||
863 | usleep_range(500, 1000); /* erasure is long; take a snooze */ | |
864 | poll_status(doc); | |
865 | writew(DOCG4_SEQ_FLUSH, docptr + DOC_FLASHSEQUENCE); | |
866 | writew(DOCG4_CMD_FLUSH, docptr + DOC_FLASHCOMMAND); | |
867 | writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0); | |
868 | write_nop(docptr); | |
869 | write_nop(docptr); | |
870 | write_nop(docptr); | |
871 | write_nop(docptr); | |
872 | write_nop(docptr); | |
873 | ||
874 | read_progstatus(doc); | |
875 | ||
876 | writew(0, docptr + DOC_DATAEND); | |
877 | write_nop(docptr); | |
878 | poll_status(doc); | |
879 | write_nop(docptr); | |
880 | } | |
881 | ||
fdbad98d | 882 | static int write_page(struct mtd_info *mtd, struct nand_chip *nand, |
570469f3 MD |
883 | const uint8_t *buf, bool use_ecc) |
884 | { | |
885 | struct docg4_priv *doc = nand->priv; | |
886 | void __iomem *docptr = doc->virtadr; | |
887 | uint8_t ecc_buf[8]; | |
888 | ||
889 | dev_dbg(doc->dev, "%s...\n", __func__); | |
890 | ||
891 | writew(DOC_ECCCONF0_ECC_ENABLE | | |
892 | DOC_ECCCONF0_UNKNOWN | | |
893 | DOCG4_BCH_SIZE, | |
894 | docptr + DOC_ECCCONF0); | |
895 | write_nop(docptr); | |
896 | ||
897 | /* write the page data */ | |
898 | docg4_write_buf16(mtd, buf, DOCG4_PAGE_SIZE); | |
899 | ||
900 | /* oob bytes 0 through 5 are written to I/O reg */ | |
901 | docg4_write_buf16(mtd, nand->oob_poi, 6); | |
902 | ||
903 | /* oob byte 6 written to a separate reg */ | |
904 | writew(nand->oob_poi[6], docptr + DOCG4_OOB_6_7); | |
905 | ||
906 | write_nop(docptr); | |
907 | write_nop(docptr); | |
908 | ||
909 | /* write hw-generated ecc bytes to oob */ | |
910 | if (likely(use_ecc == true)) { | |
911 | /* oob byte 7 is hamming code */ | |
912 | uint8_t hamming = readb(docptr + DOC_HAMMINGPARITY); | |
913 | hamming = readb(docptr + DOC_HAMMINGPARITY); /* 2nd read */ | |
914 | writew(hamming, docptr + DOCG4_OOB_6_7); | |
915 | write_nop(docptr); | |
916 | ||
917 | /* read the 7 bch bytes from ecc regs */ | |
918 | read_hw_ecc(docptr, ecc_buf); | |
919 | ecc_buf[7] = 0; /* clear the "page written" flag */ | |
920 | } | |
921 | ||
922 | /* write user-supplied bytes to oob */ | |
923 | else { | |
924 | writew(nand->oob_poi[7], docptr + DOCG4_OOB_6_7); | |
925 | write_nop(docptr); | |
926 | memcpy(ecc_buf, &nand->oob_poi[8], 8); | |
927 | } | |
928 | ||
929 | docg4_write_buf16(mtd, ecc_buf, 8); | |
930 | write_nop(docptr); | |
931 | write_nop(docptr); | |
932 | writew(0, docptr + DOC_DATAEND); | |
933 | write_nop(docptr); | |
fdbad98d JW |
934 | |
935 | return 0; | |
570469f3 MD |
936 | } |
937 | ||
fdbad98d | 938 | static int docg4_write_page_raw(struct mtd_info *mtd, struct nand_chip *nand, |
1fbb938d | 939 | const uint8_t *buf, int oob_required) |
570469f3 MD |
940 | { |
941 | return write_page(mtd, nand, buf, false); | |
942 | } | |
943 | ||
fdbad98d | 944 | static int docg4_write_page(struct mtd_info *mtd, struct nand_chip *nand, |
1fbb938d | 945 | const uint8_t *buf, int oob_required) |
570469f3 MD |
946 | { |
947 | return write_page(mtd, nand, buf, true); | |
948 | } | |
949 | ||
950 | static int docg4_write_oob(struct mtd_info *mtd, struct nand_chip *nand, | |
951 | int page) | |
952 | { | |
953 | /* | |
954 | * Writing oob-only is not really supported, because MLC nand must write | |
955 | * oob bytes at the same time as page data. Nonetheless, we save the | |
956 | * oob buffer contents here, and then write it along with the page data | |
957 | * if the same page is subsequently written. This allows user space | |
958 | * utilities that write the oob data prior to the page data to work | |
959 | * (e.g., nandwrite). The disdvantage is that, if the intention was to | |
960 | * write oob only, the operation is quietly ignored. Also, oob can get | |
961 | * corrupted if two concurrent processes are running nandwrite. | |
962 | */ | |
963 | ||
964 | /* note that bytes 7..14 are hw generated hamming/ecc and overwritten */ | |
965 | struct docg4_priv *doc = nand->priv; | |
966 | doc->oob_page = page; | |
967 | memcpy(doc->oob_buf, nand->oob_poi, 16); | |
968 | return 0; | |
969 | } | |
970 | ||
971 | static int __init read_factory_bbt(struct mtd_info *mtd) | |
972 | { | |
973 | /* | |
974 | * The device contains a read-only factory bad block table. Read it and | |
975 | * update the memory-based bbt accordingly. | |
976 | */ | |
977 | ||
978 | struct nand_chip *nand = mtd->priv; | |
979 | struct docg4_priv *doc = nand->priv; | |
980 | uint32_t g4_addr = mtd_to_docg4_address(DOCG4_FACTORY_BBT_PAGE, 0); | |
981 | uint8_t *buf; | |
982 | int i, block, status; | |
983 | ||
984 | buf = kzalloc(DOCG4_PAGE_SIZE, GFP_KERNEL); | |
985 | if (buf == NULL) | |
986 | return -ENOMEM; | |
987 | ||
988 | read_page_prologue(mtd, g4_addr); | |
1fbb938d | 989 | status = docg4_read_page(mtd, nand, buf, 0, DOCG4_FACTORY_BBT_PAGE); |
570469f3 MD |
990 | if (status) |
991 | goto exit; | |
992 | ||
993 | /* | |
994 | * If no memory-based bbt was created, exit. This will happen if module | |
995 | * parameter ignore_badblocks is set. Then why even call this function? | |
996 | * For an unknown reason, block erase always fails if it's the first | |
997 | * operation after device power-up. The above read ensures it never is. | |
998 | * Ugly, I know. | |
999 | */ | |
1000 | if (nand->bbt == NULL) /* no memory-based bbt */ | |
1001 | goto exit; | |
1002 | ||
1003 | /* | |
1004 | * Parse factory bbt and update memory-based bbt. Factory bbt format is | |
1005 | * simple: one bit per block, block numbers increase left to right (msb | |
1006 | * to lsb). Bit clear means bad block. | |
1007 | */ | |
1008 | for (i = block = 0; block < DOCG4_NUMBLOCKS; block += 8, i++) { | |
1009 | int bitnum; | |
1010 | unsigned long bits = ~buf[i]; | |
1011 | for_each_set_bit(bitnum, &bits, 8) { | |
1012 | int badblock = block + 7 - bitnum; | |
1013 | nand->bbt[badblock / 4] |= | |
1014 | 0x03 << ((badblock % 4) * 2); | |
1015 | mtd->ecc_stats.badblocks++; | |
1016 | dev_notice(doc->dev, "factory-marked bad block: %d\n", | |
1017 | badblock); | |
1018 | } | |
1019 | } | |
1020 | exit: | |
1021 | kfree(buf); | |
1022 | return status; | |
1023 | } | |
1024 | ||
1025 | static int docg4_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1026 | { | |
1027 | /* | |
1028 | * Mark a block as bad. Bad blocks are marked in the oob area of the | |
1029 | * first page of the block. The default scan_bbt() in the nand | |
1030 | * infrastructure code works fine for building the memory-based bbt | |
1031 | * during initialization, as does the nand infrastructure function that | |
1032 | * checks if a block is bad by reading the bbt. This function replaces | |
1033 | * the nand default because writes to oob-only are not supported. | |
1034 | */ | |
1035 | ||
1036 | int ret, i; | |
1037 | uint8_t *buf; | |
1038 | struct nand_chip *nand = mtd->priv; | |
1039 | struct docg4_priv *doc = nand->priv; | |
1040 | struct nand_bbt_descr *bbtd = nand->badblock_pattern; | |
1041 | int block = (int)(ofs >> nand->bbt_erase_shift); | |
1042 | int page = (int)(ofs >> nand->page_shift); | |
1043 | uint32_t g4_addr = mtd_to_docg4_address(page, 0); | |
1044 | ||
1045 | dev_dbg(doc->dev, "%s: %08llx\n", __func__, ofs); | |
1046 | ||
1047 | if (unlikely(ofs & (DOCG4_BLOCK_SIZE - 1))) | |
1048 | dev_warn(doc->dev, "%s: ofs %llx not start of block!\n", | |
1049 | __func__, ofs); | |
1050 | ||
1051 | /* allocate blank buffer for page data */ | |
1052 | buf = kzalloc(DOCG4_PAGE_SIZE, GFP_KERNEL); | |
1053 | if (buf == NULL) | |
1054 | return -ENOMEM; | |
1055 | ||
1056 | /* update bbt in memory */ | |
1057 | nand->bbt[block / 4] |= 0x01 << ((block & 0x03) * 2); | |
1058 | ||
1059 | /* write bit-wise negation of pattern to oob buffer */ | |
1060 | memset(nand->oob_poi, 0xff, mtd->oobsize); | |
1061 | for (i = 0; i < bbtd->len; i++) | |
1062 | nand->oob_poi[bbtd->offs + i] = ~bbtd->pattern[i]; | |
1063 | ||
1064 | /* write first page of block */ | |
1065 | write_page_prologue(mtd, g4_addr); | |
1fbb938d | 1066 | docg4_write_page(mtd, nand, buf, 1); |
570469f3 MD |
1067 | ret = pageprog(mtd); |
1068 | if (!ret) | |
1069 | mtd->ecc_stats.badblocks++; | |
1070 | ||
1071 | kfree(buf); | |
1072 | ||
1073 | return ret; | |
1074 | } | |
1075 | ||
1076 | static int docg4_block_neverbad(struct mtd_info *mtd, loff_t ofs, int getchip) | |
1077 | { | |
1078 | /* only called when module_param ignore_badblocks is set */ | |
1079 | return 0; | |
1080 | } | |
1081 | ||
1082 | static int docg4_suspend(struct platform_device *pdev, pm_message_t state) | |
1083 | { | |
1084 | /* | |
1085 | * Put the device into "deep power-down" mode. Note that CE# must be | |
1086 | * deasserted for this to take effect. The xscale, e.g., can be | |
1087 | * configured to float this signal when the processor enters power-down, | |
1088 | * and a suitable pull-up ensures its deassertion. | |
1089 | */ | |
1090 | ||
1091 | int i; | |
1092 | uint8_t pwr_down; | |
1093 | struct docg4_priv *doc = platform_get_drvdata(pdev); | |
1094 | void __iomem *docptr = doc->virtadr; | |
1095 | ||
1096 | dev_dbg(doc->dev, "%s...\n", __func__); | |
1097 | ||
1098 | /* poll the register that tells us we're ready to go to sleep */ | |
1099 | for (i = 0; i < 10; i++) { | |
1100 | pwr_down = readb(docptr + DOC_POWERMODE); | |
1101 | if (pwr_down & DOC_POWERDOWN_READY) | |
1102 | break; | |
1103 | usleep_range(1000, 4000); | |
1104 | } | |
1105 | ||
1106 | if (pwr_down & DOC_POWERDOWN_READY) { | |
1107 | dev_err(doc->dev, "suspend failed; " | |
1108 | "timeout polling DOC_POWERDOWN_READY\n"); | |
1109 | return -EIO; | |
1110 | } | |
1111 | ||
1112 | writew(DOC_ASICMODE_POWERDOWN | DOC_ASICMODE_MDWREN, | |
1113 | docptr + DOC_ASICMODE); | |
1114 | writew(~(DOC_ASICMODE_POWERDOWN | DOC_ASICMODE_MDWREN), | |
1115 | docptr + DOC_ASICMODECONFIRM); | |
1116 | ||
1117 | write_nop(docptr); | |
1118 | ||
1119 | return 0; | |
1120 | } | |
1121 | ||
1122 | static int docg4_resume(struct platform_device *pdev) | |
1123 | { | |
1124 | ||
1125 | /* | |
1126 | * Exit power-down. Twelve consecutive reads of the address below | |
1127 | * accomplishes this, assuming CE# has been asserted. | |
1128 | */ | |
1129 | ||
1130 | struct docg4_priv *doc = platform_get_drvdata(pdev); | |
1131 | void __iomem *docptr = doc->virtadr; | |
1132 | int i; | |
1133 | ||
1134 | dev_dbg(doc->dev, "%s...\n", __func__); | |
1135 | ||
1136 | for (i = 0; i < 12; i++) | |
1137 | readb(docptr + 0x1fff); | |
1138 | ||
1139 | return 0; | |
1140 | } | |
1141 | ||
1142 | static void __init init_mtd_structs(struct mtd_info *mtd) | |
1143 | { | |
1144 | /* initialize mtd and nand data structures */ | |
1145 | ||
1146 | /* | |
1147 | * Note that some of the following initializations are not usually | |
1148 | * required within a nand driver because they are performed by the nand | |
1149 | * infrastructure code as part of nand_scan(). In this case they need | |
1150 | * to be initialized here because we skip call to nand_scan_ident() (the | |
1151 | * first half of nand_scan()). The call to nand_scan_ident() is skipped | |
1152 | * because for this device the chip id is not read in the manner of a | |
1153 | * standard nand device. Unfortunately, nand_scan_ident() does other | |
1154 | * things as well, such as call nand_set_defaults(). | |
1155 | */ | |
1156 | ||
1157 | struct nand_chip *nand = mtd->priv; | |
1158 | struct docg4_priv *doc = nand->priv; | |
1159 | ||
1160 | mtd->size = DOCG4_CHIP_SIZE; | |
1161 | mtd->name = "Msys_Diskonchip_G4"; | |
1162 | mtd->writesize = DOCG4_PAGE_SIZE; | |
1163 | mtd->erasesize = DOCG4_BLOCK_SIZE; | |
1164 | mtd->oobsize = DOCG4_OOB_SIZE; | |
1165 | nand->chipsize = DOCG4_CHIP_SIZE; | |
1166 | nand->chip_shift = DOCG4_CHIP_SHIFT; | |
1167 | nand->bbt_erase_shift = nand->phys_erase_shift = DOCG4_ERASE_SHIFT; | |
1168 | nand->chip_delay = 20; | |
1169 | nand->page_shift = DOCG4_PAGE_SHIFT; | |
1170 | nand->pagemask = 0x3ffff; | |
1171 | nand->badblockpos = NAND_LARGE_BADBLOCK_POS; | |
1172 | nand->badblockbits = 8; | |
1173 | nand->ecc.layout = &docg4_oobinfo; | |
1174 | nand->ecc.mode = NAND_ECC_HW_SYNDROME; | |
1175 | nand->ecc.size = DOCG4_PAGE_SIZE; | |
1176 | nand->ecc.prepad = 8; | |
1177 | nand->ecc.bytes = 8; | |
6a918bad | 1178 | nand->ecc.strength = DOCG4_T; |
1826dbcc | 1179 | nand->options = NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE; |
570469f3 MD |
1180 | nand->IO_ADDR_R = nand->IO_ADDR_W = doc->virtadr + DOC_IOSPACE_DATA; |
1181 | nand->controller = &nand->hwcontrol; | |
1182 | spin_lock_init(&nand->controller->lock); | |
1183 | init_waitqueue_head(&nand->controller->wq); | |
1184 | ||
1185 | /* methods */ | |
1186 | nand->cmdfunc = docg4_command; | |
1187 | nand->waitfunc = docg4_wait; | |
1188 | nand->select_chip = docg4_select_chip; | |
1189 | nand->read_byte = docg4_read_byte; | |
1190 | nand->block_markbad = docg4_block_markbad; | |
1191 | nand->read_buf = docg4_read_buf; | |
1192 | nand->write_buf = docg4_write_buf16; | |
1193 | nand->scan_bbt = nand_default_bbt; | |
1194 | nand->erase_cmd = docg4_erase_block; | |
1195 | nand->ecc.read_page = docg4_read_page; | |
1196 | nand->ecc.write_page = docg4_write_page; | |
1197 | nand->ecc.read_page_raw = docg4_read_page_raw; | |
1198 | nand->ecc.write_page_raw = docg4_write_page_raw; | |
1199 | nand->ecc.read_oob = docg4_read_oob; | |
1200 | nand->ecc.write_oob = docg4_write_oob; | |
1201 | ||
1202 | /* | |
1203 | * The way the nand infrastructure code is written, a memory-based bbt | |
1204 | * is not created if NAND_SKIP_BBTSCAN is set. With no memory bbt, | |
1205 | * nand->block_bad() is used. So when ignoring bad blocks, we skip the | |
1206 | * scan and define a dummy block_bad() which always returns 0. | |
1207 | */ | |
1208 | if (ignore_badblocks) { | |
1209 | nand->options |= NAND_SKIP_BBTSCAN; | |
1210 | nand->block_bad = docg4_block_neverbad; | |
1211 | } | |
1212 | ||
1213 | } | |
1214 | ||
1215 | static int __init read_id_reg(struct mtd_info *mtd) | |
1216 | { | |
1217 | struct nand_chip *nand = mtd->priv; | |
1218 | struct docg4_priv *doc = nand->priv; | |
1219 | void __iomem *docptr = doc->virtadr; | |
1220 | uint16_t id1, id2; | |
1221 | ||
1222 | /* check for presence of g4 chip by reading id registers */ | |
1223 | id1 = readw(docptr + DOC_CHIPID); | |
1224 | id1 = readw(docptr + DOCG4_MYSTERY_REG); | |
1225 | id2 = readw(docptr + DOC_CHIPID_INV); | |
1226 | id2 = readw(docptr + DOCG4_MYSTERY_REG); | |
1227 | ||
1228 | if (id1 == DOCG4_IDREG1_VALUE && id2 == DOCG4_IDREG2_VALUE) { | |
1229 | dev_info(doc->dev, | |
1230 | "NAND device: 128MiB Diskonchip G4 detected\n"); | |
1231 | return 0; | |
1232 | } | |
1233 | ||
1234 | return -ENODEV; | |
1235 | } | |
1236 | ||
1237 | static char const *part_probes[] = { "cmdlinepart", "saftlpart", NULL }; | |
1238 | ||
1239 | static int __init probe_docg4(struct platform_device *pdev) | |
1240 | { | |
1241 | struct mtd_info *mtd; | |
1242 | struct nand_chip *nand; | |
1243 | void __iomem *virtadr; | |
1244 | struct docg4_priv *doc; | |
1245 | int len, retval; | |
1246 | struct resource *r; | |
1247 | struct device *dev = &pdev->dev; | |
1248 | ||
1249 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1250 | if (r == NULL) { | |
1251 | dev_err(dev, "no io memory resource defined!\n"); | |
1252 | return -ENODEV; | |
1253 | } | |
1254 | ||
1255 | virtadr = ioremap(r->start, resource_size(r)); | |
1256 | if (!virtadr) { | |
2c4ae276 | 1257 | dev_err(dev, "Diskonchip ioremap failed: %pR\n", r); |
570469f3 MD |
1258 | return -EIO; |
1259 | } | |
1260 | ||
1261 | len = sizeof(struct mtd_info) + sizeof(struct nand_chip) + | |
1262 | sizeof(struct docg4_priv); | |
1263 | mtd = kzalloc(len, GFP_KERNEL); | |
1264 | if (mtd == NULL) { | |
1265 | retval = -ENOMEM; | |
1266 | goto fail; | |
1267 | } | |
1268 | nand = (struct nand_chip *) (mtd + 1); | |
1269 | doc = (struct docg4_priv *) (nand + 1); | |
1270 | mtd->priv = nand; | |
1271 | nand->priv = doc; | |
1272 | mtd->owner = THIS_MODULE; | |
1273 | doc->virtadr = virtadr; | |
1274 | doc->dev = dev; | |
1275 | ||
1276 | init_mtd_structs(mtd); | |
1277 | ||
1278 | /* initialize kernel bch algorithm */ | |
1279 | doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY); | |
1280 | if (doc->bch == NULL) { | |
1281 | retval = -EINVAL; | |
1282 | goto fail; | |
1283 | } | |
1284 | ||
1285 | platform_set_drvdata(pdev, doc); | |
1286 | ||
1287 | reset(mtd); | |
1288 | retval = read_id_reg(mtd); | |
1289 | if (retval == -ENODEV) { | |
1290 | dev_warn(dev, "No diskonchip G4 device found.\n"); | |
1291 | goto fail; | |
1292 | } | |
1293 | ||
1294 | retval = nand_scan_tail(mtd); | |
1295 | if (retval) | |
1296 | goto fail; | |
1297 | ||
1298 | retval = read_factory_bbt(mtd); | |
1299 | if (retval) | |
1300 | goto fail; | |
1301 | ||
1302 | retval = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0); | |
1303 | if (retval) | |
1304 | goto fail; | |
1305 | ||
1306 | doc->mtd = mtd; | |
1307 | return 0; | |
1308 | ||
1309 | fail: | |
1310 | iounmap(virtadr); | |
1311 | if (mtd) { | |
1312 | /* re-declarations avoid compiler warning */ | |
1313 | struct nand_chip *nand = mtd->priv; | |
1314 | struct docg4_priv *doc = nand->priv; | |
1315 | nand_release(mtd); /* deletes partitions and mtd devices */ | |
1316 | platform_set_drvdata(pdev, NULL); | |
1317 | free_bch(doc->bch); | |
1318 | kfree(mtd); | |
1319 | } | |
1320 | ||
1321 | return retval; | |
1322 | } | |
1323 | ||
1324 | static int __exit cleanup_docg4(struct platform_device *pdev) | |
1325 | { | |
1326 | struct docg4_priv *doc = platform_get_drvdata(pdev); | |
1327 | nand_release(doc->mtd); | |
1328 | platform_set_drvdata(pdev, NULL); | |
1329 | free_bch(doc->bch); | |
1330 | kfree(doc->mtd); | |
1331 | iounmap(doc->virtadr); | |
1332 | return 0; | |
1333 | } | |
1334 | ||
1335 | static struct platform_driver docg4_driver = { | |
1336 | .driver = { | |
1337 | .name = "docg4", | |
1338 | .owner = THIS_MODULE, | |
1339 | }, | |
1340 | .suspend = docg4_suspend, | |
1341 | .resume = docg4_resume, | |
1342 | .remove = __exit_p(cleanup_docg4), | |
1343 | }; | |
1344 | ||
1345 | static int __init docg4_init(void) | |
1346 | { | |
1347 | return platform_driver_probe(&docg4_driver, probe_docg4); | |
1348 | } | |
1349 | ||
1350 | static void __exit docg4_exit(void) | |
1351 | { | |
1352 | platform_driver_unregister(&docg4_driver); | |
1353 | } | |
1354 | ||
1355 | module_init(docg4_init); | |
1356 | module_exit(docg4_exit); | |
1357 | ||
1358 | MODULE_LICENSE("GPL"); | |
1359 | MODULE_AUTHOR("Mike Dunn"); | |
1360 | MODULE_DESCRIPTION("M-Systems DiskOnChip G4 device driver"); |