Commit | Line | Data |
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67e054e9 ML |
1 | /* |
2 | * Copyright © 2009 - Maxim Levitsky | |
3 | * driver for Ricoh xD readers | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/jiffies.h> | |
13 | #include <linux/workqueue.h> | |
14 | #include <linux/interrupt.h> | |
f696aa43 | 15 | #include <linux/pci.h> |
67e054e9 | 16 | #include <linux/pci_ids.h> |
ada49657 | 17 | #include <linux/delay.h> |
05d71b46 | 18 | #include <linux/slab.h> |
67e054e9 ML |
19 | #include <asm/byteorder.h> |
20 | #include <linux/sched.h> | |
21 | #include "sm_common.h" | |
22 | #include "r852.h" | |
23 | ||
24 | ||
90ab5ee9 | 25 | static bool r852_enable_dma = 1; |
ada49657 SR |
26 | module_param(r852_enable_dma, bool, S_IRUGO); |
27 | MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)"); | |
67e054e9 ML |
28 | |
29 | static int debug; | |
30 | module_param(debug, int, S_IRUGO | S_IWUSR); | |
31 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); | |
32 | ||
33 | /* read register */ | |
34 | static inline uint8_t r852_read_reg(struct r852_device *dev, int address) | |
35 | { | |
36 | uint8_t reg = readb(dev->mmio + address); | |
37 | return reg; | |
38 | } | |
39 | ||
40 | /* write register */ | |
41 | static inline void r852_write_reg(struct r852_device *dev, | |
42 | int address, uint8_t value) | |
43 | { | |
44 | writeb(value, dev->mmio + address); | |
45 | mmiowb(); | |
46 | } | |
47 | ||
48 | ||
49 | /* read dword sized register */ | |
50 | static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address) | |
51 | { | |
52 | uint32_t reg = le32_to_cpu(readl(dev->mmio + address)); | |
53 | return reg; | |
54 | } | |
55 | ||
56 | /* write dword sized register */ | |
57 | static inline void r852_write_reg_dword(struct r852_device *dev, | |
58 | int address, uint32_t value) | |
59 | { | |
60 | writel(cpu_to_le32(value), dev->mmio + address); | |
61 | mmiowb(); | |
62 | } | |
63 | ||
64 | /* returns pointer to our private structure */ | |
65 | static inline struct r852_device *r852_get_dev(struct mtd_info *mtd) | |
66 | { | |
d5af6dcf KV |
67 | struct nand_chip *chip = mtd->priv; |
68 | return chip->priv; | |
67e054e9 ML |
69 | } |
70 | ||
71 | ||
72 | /* check if controller supports dma */ | |
73 | static void r852_dma_test(struct r852_device *dev) | |
74 | { | |
75 | dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) & | |
76 | (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2); | |
77 | ||
78 | if (!dev->dma_usable) | |
79 | message("Non dma capable device detected, dma disabled"); | |
80 | ||
ada49657 | 81 | if (!r852_enable_dma) { |
67e054e9 ML |
82 | message("disabling dma on user request"); |
83 | dev->dma_usable = 0; | |
84 | } | |
85 | } | |
86 | ||
87 | /* | |
88 | * Enable dma. Enables ether first or second stage of the DMA, | |
89 | * Expects dev->dma_dir and dev->dma_state be set | |
90 | */ | |
91 | static void r852_dma_enable(struct r852_device *dev) | |
92 | { | |
93 | uint8_t dma_reg, dma_irq_reg; | |
94 | ||
95 | /* Set up dma settings */ | |
96 | dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS); | |
97 | dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY); | |
98 | ||
99 | if (dev->dma_dir) | |
100 | dma_reg |= R852_DMA_READ; | |
101 | ||
fb45d323 | 102 | if (dev->dma_state == DMA_INTERNAL) { |
67e054e9 | 103 | dma_reg |= R852_DMA_INTERNAL; |
fb45d323 ML |
104 | /* Precaution to make sure HW doesn't write */ |
105 | /* to random kernel memory */ | |
106 | r852_write_reg_dword(dev, R852_DMA_ADDR, | |
107 | cpu_to_le32(dev->phys_bounce_buffer)); | |
108 | } else { | |
67e054e9 ML |
109 | dma_reg |= R852_DMA_MEMORY; |
110 | r852_write_reg_dword(dev, R852_DMA_ADDR, | |
111 | cpu_to_le32(dev->phys_dma_addr)); | |
112 | } | |
113 | ||
fb45d323 ML |
114 | /* Precaution: make sure write reached the device */ |
115 | r852_read_reg_dword(dev, R852_DMA_ADDR); | |
116 | ||
67e054e9 ML |
117 | r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg); |
118 | ||
119 | /* Set dma irq */ | |
120 | dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE); | |
121 | r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, | |
122 | dma_irq_reg | | |
123 | R852_DMA_IRQ_INTERNAL | | |
124 | R852_DMA_IRQ_ERROR | | |
125 | R852_DMA_IRQ_MEMORY); | |
126 | } | |
127 | ||
128 | /* | |
129 | * Disable dma, called from the interrupt handler, which specifies | |
130 | * success of the operation via 'error' argument | |
131 | */ | |
132 | static void r852_dma_done(struct r852_device *dev, int error) | |
133 | { | |
134 | WARN_ON(dev->dma_stage == 0); | |
135 | ||
136 | r852_write_reg_dword(dev, R852_DMA_IRQ_STA, | |
137 | r852_read_reg_dword(dev, R852_DMA_IRQ_STA)); | |
138 | ||
139 | r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0); | |
140 | r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0); | |
141 | ||
fb45d323 ML |
142 | /* Precaution to make sure HW doesn't write to random kernel memory */ |
143 | r852_write_reg_dword(dev, R852_DMA_ADDR, | |
144 | cpu_to_le32(dev->phys_bounce_buffer)); | |
145 | r852_read_reg_dword(dev, R852_DMA_ADDR); | |
146 | ||
67e054e9 ML |
147 | dev->dma_error = error; |
148 | dev->dma_stage = 0; | |
149 | ||
150 | if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer) | |
151 | pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN, | |
152 | dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE); | |
67e054e9 ML |
153 | } |
154 | ||
155 | /* | |
156 | * Wait, till dma is done, which includes both phases of it | |
157 | */ | |
158 | static int r852_dma_wait(struct r852_device *dev) | |
159 | { | |
160 | long timeout = wait_for_completion_timeout(&dev->dma_done, | |
161 | msecs_to_jiffies(1000)); | |
162 | if (!timeout) { | |
163 | dbg("timeout waiting for DMA interrupt"); | |
164 | return -ETIMEDOUT; | |
165 | } | |
166 | ||
167 | return 0; | |
168 | } | |
169 | ||
170 | /* | |
171 | * Read/Write one page using dma. Only pages can be read (512 bytes) | |
172 | */ | |
173 | static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read) | |
174 | { | |
175 | int bounce = 0; | |
176 | unsigned long flags; | |
177 | int error; | |
178 | ||
179 | dev->dma_error = 0; | |
180 | ||
181 | /* Set dma direction */ | |
182 | dev->dma_dir = do_read; | |
183 | dev->dma_stage = 1; | |
9489be8c | 184 | INIT_COMPLETION(dev->dma_done); |
67e054e9 ML |
185 | |
186 | dbg_verbose("doing dma %s ", do_read ? "read" : "write"); | |
187 | ||
25985edc | 188 | /* Set initial dma state: for reading first fill on board buffer, |
67e054e9 ML |
189 | from device, for writes first fill the buffer from memory*/ |
190 | dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY; | |
191 | ||
192 | /* if incoming buffer is not page aligned, we should do bounce */ | |
193 | if ((unsigned long)buf & (R852_DMA_LEN-1)) | |
194 | bounce = 1; | |
195 | ||
196 | if (!bounce) { | |
197 | dev->phys_dma_addr = pci_map_single(dev->pci_dev, (void *)buf, | |
198 | R852_DMA_LEN, | |
199 | (do_read ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE)); | |
200 | ||
0c82d3ce | 201 | if (pci_dma_mapping_error(dev->pci_dev, dev->phys_dma_addr)) |
67e054e9 ML |
202 | bounce = 1; |
203 | } | |
204 | ||
205 | if (bounce) { | |
206 | dbg_verbose("dma: using bounce buffer"); | |
207 | dev->phys_dma_addr = dev->phys_bounce_buffer; | |
208 | if (!do_read) | |
209 | memcpy(dev->bounce_buffer, buf, R852_DMA_LEN); | |
210 | } | |
211 | ||
212 | /* Enable DMA */ | |
213 | spin_lock_irqsave(&dev->irqlock, flags); | |
214 | r852_dma_enable(dev); | |
215 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
216 | ||
217 | /* Wait till complete */ | |
218 | error = r852_dma_wait(dev); | |
219 | ||
220 | if (error) { | |
221 | r852_dma_done(dev, error); | |
222 | return; | |
223 | } | |
224 | ||
225 | if (do_read && bounce) | |
226 | memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN); | |
227 | } | |
228 | ||
229 | /* | |
230 | * Program data lines of the nand chip to send data to it | |
231 | */ | |
232 | void r852_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) | |
233 | { | |
234 | struct r852_device *dev = r852_get_dev(mtd); | |
235 | uint32_t reg; | |
236 | ||
237 | /* Don't allow any access to hardware if we suspect card removal */ | |
238 | if (dev->card_unstable) | |
239 | return; | |
240 | ||
241 | /* Special case for whole sector read */ | |
242 | if (len == R852_DMA_LEN && dev->dma_usable) { | |
243 | r852_do_dma(dev, (uint8_t *)buf, 0); | |
244 | return; | |
245 | } | |
246 | ||
247 | /* write DWORD chinks - faster */ | |
248 | while (len) { | |
249 | reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24; | |
250 | r852_write_reg_dword(dev, R852_DATALINE, reg); | |
251 | buf += 4; | |
252 | len -= 4; | |
253 | ||
254 | } | |
255 | ||
256 | /* write rest */ | |
257 | while (len) | |
258 | r852_write_reg(dev, R852_DATALINE, *buf++); | |
259 | } | |
260 | ||
261 | /* | |
262 | * Read data lines of the nand chip to retrieve data | |
263 | */ | |
264 | void r852_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) | |
265 | { | |
266 | struct r852_device *dev = r852_get_dev(mtd); | |
267 | uint32_t reg; | |
268 | ||
269 | if (dev->card_unstable) { | |
270 | /* since we can't signal error here, at least, return | |
271 | predictable buffer */ | |
272 | memset(buf, 0, len); | |
273 | return; | |
274 | } | |
275 | ||
276 | /* special case for whole sector read */ | |
277 | if (len == R852_DMA_LEN && dev->dma_usable) { | |
278 | r852_do_dma(dev, buf, 1); | |
279 | return; | |
280 | } | |
281 | ||
282 | /* read in dword sized chunks */ | |
283 | while (len >= 4) { | |
284 | ||
285 | reg = r852_read_reg_dword(dev, R852_DATALINE); | |
286 | *buf++ = reg & 0xFF; | |
287 | *buf++ = (reg >> 8) & 0xFF; | |
288 | *buf++ = (reg >> 16) & 0xFF; | |
289 | *buf++ = (reg >> 24) & 0xFF; | |
290 | len -= 4; | |
291 | } | |
292 | ||
293 | /* read the reset by bytes */ | |
294 | while (len--) | |
295 | *buf++ = r852_read_reg(dev, R852_DATALINE); | |
296 | } | |
297 | ||
298 | /* | |
299 | * Read one byte from nand chip | |
300 | */ | |
301 | static uint8_t r852_read_byte(struct mtd_info *mtd) | |
302 | { | |
303 | struct r852_device *dev = r852_get_dev(mtd); | |
304 | ||
305 | /* Same problem as in r852_read_buf.... */ | |
306 | if (dev->card_unstable) | |
307 | return 0; | |
308 | ||
309 | return r852_read_reg(dev, R852_DATALINE); | |
310 | } | |
311 | ||
67e054e9 ML |
312 | /* |
313 | * Control several chip lines & send commands | |
314 | */ | |
315 | void r852_cmdctl(struct mtd_info *mtd, int dat, unsigned int ctrl) | |
316 | { | |
317 | struct r852_device *dev = r852_get_dev(mtd); | |
318 | ||
319 | if (dev->card_unstable) | |
320 | return; | |
321 | ||
322 | if (ctrl & NAND_CTRL_CHANGE) { | |
323 | ||
324 | dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND | | |
325 | R852_CTL_ON | R852_CTL_CARDENABLE); | |
326 | ||
327 | if (ctrl & NAND_ALE) | |
328 | dev->ctlreg |= R852_CTL_DATA; | |
329 | ||
330 | if (ctrl & NAND_CLE) | |
331 | dev->ctlreg |= R852_CTL_COMMAND; | |
332 | ||
333 | if (ctrl & NAND_NCE) | |
334 | dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON); | |
335 | else | |
336 | dev->ctlreg &= ~R852_CTL_WRITE; | |
337 | ||
338 | /* when write is stareted, enable write access */ | |
339 | if (dat == NAND_CMD_ERASE1) | |
340 | dev->ctlreg |= R852_CTL_WRITE; | |
341 | ||
342 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
343 | } | |
344 | ||
345 | /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need | |
346 | to set write mode */ | |
347 | if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) { | |
348 | dev->ctlreg |= R852_CTL_WRITE; | |
349 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
350 | } | |
351 | ||
352 | if (dat != NAND_CMD_NONE) | |
353 | r852_write_reg(dev, R852_DATALINE, dat); | |
354 | } | |
355 | ||
356 | /* | |
357 | * Wait till card is ready. | |
358 | * based on nand_wait, but returns errors on DMA error | |
359 | */ | |
360 | int r852_wait(struct mtd_info *mtd, struct nand_chip *chip) | |
361 | { | |
029919c1 | 362 | struct r852_device *dev = chip->priv; |
67e054e9 ML |
363 | |
364 | unsigned long timeout; | |
365 | int status; | |
366 | ||
367 | timeout = jiffies + (chip->state == FL_ERASING ? | |
368 | msecs_to_jiffies(400) : msecs_to_jiffies(20)); | |
369 | ||
370 | while (time_before(jiffies, timeout)) | |
371 | if (chip->dev_ready(mtd)) | |
372 | break; | |
373 | ||
374 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); | |
375 | status = (int)chip->read_byte(mtd); | |
376 | ||
377 | /* Unfortunelly, no way to send detailed error status... */ | |
378 | if (dev->dma_error) { | |
379 | status |= NAND_STATUS_FAIL; | |
380 | dev->dma_error = 0; | |
381 | } | |
382 | return status; | |
383 | } | |
384 | ||
385 | /* | |
386 | * Check if card is ready | |
387 | */ | |
388 | ||
389 | int r852_ready(struct mtd_info *mtd) | |
390 | { | |
391 | struct r852_device *dev = r852_get_dev(mtd); | |
392 | return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY); | |
393 | } | |
394 | ||
395 | ||
396 | /* | |
397 | * Set ECC engine mode | |
398 | */ | |
399 | ||
400 | void r852_ecc_hwctl(struct mtd_info *mtd, int mode) | |
401 | { | |
402 | struct r852_device *dev = r852_get_dev(mtd); | |
403 | ||
404 | if (dev->card_unstable) | |
405 | return; | |
406 | ||
407 | switch (mode) { | |
408 | case NAND_ECC_READ: | |
409 | case NAND_ECC_WRITE: | |
410 | /* enable ecc generation/check*/ | |
411 | dev->ctlreg |= R852_CTL_ECC_ENABLE; | |
412 | ||
413 | /* flush ecc buffer */ | |
414 | r852_write_reg(dev, R852_CTL, | |
415 | dev->ctlreg | R852_CTL_ECC_ACCESS); | |
416 | ||
417 | r852_read_reg_dword(dev, R852_DATALINE); | |
418 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
419 | return; | |
420 | ||
421 | case NAND_ECC_READSYN: | |
422 | /* disable ecc generation */ | |
423 | dev->ctlreg &= ~R852_CTL_ECC_ENABLE; | |
424 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
425 | } | |
426 | } | |
427 | ||
428 | /* | |
429 | * Calculate ECC, only used for writes | |
430 | */ | |
431 | ||
432 | int r852_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat, | |
433 | uint8_t *ecc_code) | |
434 | { | |
435 | struct r852_device *dev = r852_get_dev(mtd); | |
436 | struct sm_oob *oob = (struct sm_oob *)ecc_code; | |
437 | uint32_t ecc1, ecc2; | |
438 | ||
439 | if (dev->card_unstable) | |
440 | return 0; | |
441 | ||
442 | dev->ctlreg &= ~R852_CTL_ECC_ENABLE; | |
443 | r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); | |
444 | ||
445 | ecc1 = r852_read_reg_dword(dev, R852_DATALINE); | |
446 | ecc2 = r852_read_reg_dword(dev, R852_DATALINE); | |
447 | ||
448 | oob->ecc1[0] = (ecc1) & 0xFF; | |
449 | oob->ecc1[1] = (ecc1 >> 8) & 0xFF; | |
450 | oob->ecc1[2] = (ecc1 >> 16) & 0xFF; | |
451 | ||
452 | oob->ecc2[0] = (ecc2) & 0xFF; | |
453 | oob->ecc2[1] = (ecc2 >> 8) & 0xFF; | |
454 | oob->ecc2[2] = (ecc2 >> 16) & 0xFF; | |
455 | ||
456 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
457 | return 0; | |
458 | } | |
459 | ||
460 | /* | |
461 | * Correct the data using ECC, hw did almost everything for us | |
462 | */ | |
463 | ||
464 | int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat, | |
465 | uint8_t *read_ecc, uint8_t *calc_ecc) | |
466 | { | |
467 | uint16_t ecc_reg; | |
468 | uint8_t ecc_status, err_byte; | |
469 | int i, error = 0; | |
470 | ||
471 | struct r852_device *dev = r852_get_dev(mtd); | |
472 | ||
473 | if (dev->card_unstable) | |
474 | return 0; | |
475 | ||
9489be8c ML |
476 | if (dev->dma_error) { |
477 | dev->dma_error = 0; | |
478 | return -1; | |
479 | } | |
480 | ||
67e054e9 ML |
481 | r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); |
482 | ecc_reg = r852_read_reg_dword(dev, R852_DATALINE); | |
483 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
484 | ||
485 | for (i = 0 ; i <= 1 ; i++) { | |
486 | ||
487 | ecc_status = (ecc_reg >> 8) & 0xFF; | |
488 | ||
489 | /* ecc uncorrectable error */ | |
490 | if (ecc_status & R852_ECC_FAIL) { | |
491 | dbg("ecc: unrecoverable error, in half %d", i); | |
492 | error = -1; | |
493 | goto exit; | |
494 | } | |
495 | ||
496 | /* correctable error */ | |
497 | if (ecc_status & R852_ECC_CORRECTABLE) { | |
498 | ||
499 | err_byte = ecc_reg & 0xFF; | |
500 | dbg("ecc: recoverable error, " | |
501 | "in half %d, byte %d, bit %d", i, | |
502 | err_byte, ecc_status & R852_ECC_ERR_BIT_MSK); | |
503 | ||
504 | dat[err_byte] ^= | |
505 | 1 << (ecc_status & R852_ECC_ERR_BIT_MSK); | |
506 | error++; | |
507 | } | |
508 | ||
509 | dat += 256; | |
510 | ecc_reg >>= 16; | |
511 | } | |
512 | exit: | |
513 | return error; | |
514 | } | |
515 | ||
516 | /* | |
517 | * This is copy of nand_read_oob_std | |
518 | * nand_read_oob_syndrome assumes we can send column address - we can't | |
519 | */ | |
520 | static int r852_read_oob(struct mtd_info *mtd, struct nand_chip *chip, | |
5c2ffb11 | 521 | int page) |
67e054e9 | 522 | { |
5c2ffb11 | 523 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
67e054e9 | 524 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
5c2ffb11 | 525 | return 0; |
67e054e9 ML |
526 | } |
527 | ||
528 | /* | |
529 | * Start the nand engine | |
530 | */ | |
531 | ||
532 | void r852_engine_enable(struct r852_device *dev) | |
533 | { | |
534 | if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) { | |
535 | r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON); | |
536 | r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED); | |
537 | } else { | |
538 | r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED); | |
539 | r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON); | |
540 | } | |
541 | msleep(300); | |
542 | r852_write_reg(dev, R852_CTL, 0); | |
543 | } | |
544 | ||
545 | ||
546 | /* | |
547 | * Stop the nand engine | |
548 | */ | |
549 | ||
550 | void r852_engine_disable(struct r852_device *dev) | |
551 | { | |
552 | r852_write_reg_dword(dev, R852_HW, 0); | |
553 | r852_write_reg(dev, R852_CTL, R852_CTL_RESET); | |
554 | } | |
555 | ||
556 | /* | |
557 | * Test if card is present | |
558 | */ | |
559 | ||
560 | void r852_card_update_present(struct r852_device *dev) | |
561 | { | |
562 | unsigned long flags; | |
563 | uint8_t reg; | |
564 | ||
565 | spin_lock_irqsave(&dev->irqlock, flags); | |
566 | reg = r852_read_reg(dev, R852_CARD_STA); | |
567 | dev->card_detected = !!(reg & R852_CARD_STA_PRESENT); | |
568 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
569 | } | |
570 | ||
571 | /* | |
572 | * Update card detection IRQ state according to current card state | |
573 | * which is read in r852_card_update_present | |
574 | */ | |
575 | void r852_update_card_detect(struct r852_device *dev) | |
576 | { | |
577 | int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE); | |
fb45d323 | 578 | dev->card_unstable = 0; |
67e054e9 ML |
579 | |
580 | card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT); | |
581 | card_detect_reg |= R852_CARD_IRQ_GENABLE; | |
582 | ||
583 | card_detect_reg |= dev->card_detected ? | |
584 | R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT; | |
585 | ||
586 | r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg); | |
587 | } | |
588 | ||
589 | ssize_t r852_media_type_show(struct device *sys_dev, | |
590 | struct device_attribute *attr, char *buf) | |
591 | { | |
592 | struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev); | |
593 | struct r852_device *dev = r852_get_dev(mtd); | |
594 | char *data = dev->sm ? "smartmedia" : "xd"; | |
595 | ||
596 | strcpy(buf, data); | |
597 | return strlen(data); | |
598 | } | |
599 | ||
600 | DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL); | |
601 | ||
602 | ||
603 | /* Detect properties of card in slot */ | |
604 | void r852_update_media_status(struct r852_device *dev) | |
605 | { | |
606 | uint8_t reg; | |
607 | unsigned long flags; | |
608 | int readonly; | |
609 | ||
610 | spin_lock_irqsave(&dev->irqlock, flags); | |
611 | if (!dev->card_detected) { | |
612 | message("card removed"); | |
613 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
614 | return ; | |
615 | } | |
616 | ||
617 | readonly = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO; | |
618 | reg = r852_read_reg(dev, R852_DMA_CAP); | |
619 | dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT); | |
620 | ||
621 | message("detected %s %s card in slot", | |
622 | dev->sm ? "SmartMedia" : "xD", | |
623 | readonly ? "readonly" : "writeable"); | |
624 | ||
625 | dev->readonly = readonly; | |
626 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
627 | } | |
628 | ||
629 | /* | |
630 | * Register the nand device | |
631 | * Called when the card is detected | |
632 | */ | |
633 | int r852_register_nand_device(struct r852_device *dev) | |
634 | { | |
635 | dev->mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL); | |
636 | ||
637 | if (!dev->mtd) | |
638 | goto error1; | |
639 | ||
640 | WARN_ON(dev->card_registred); | |
641 | ||
642 | dev->mtd->owner = THIS_MODULE; | |
643 | dev->mtd->priv = dev->chip; | |
644 | dev->mtd->dev.parent = &dev->pci_dev->dev; | |
645 | ||
646 | if (dev->readonly) | |
647 | dev->chip->options |= NAND_ROM; | |
648 | ||
649 | r852_engine_enable(dev); | |
650 | ||
c3611570 | 651 | if (sm_register_device(dev->mtd, dev->sm)) |
67e054e9 ML |
652 | goto error2; |
653 | ||
133fa8c7 ML |
654 | if (device_create_file(&dev->mtd->dev, &dev_attr_media_type)) |
655 | message("can't create media type sysfs attribute"); | |
656 | ||
67e054e9 ML |
657 | dev->card_registred = 1; |
658 | return 0; | |
659 | error2: | |
660 | kfree(dev->mtd); | |
661 | error1: | |
662 | /* Force card redetect */ | |
663 | dev->card_detected = 0; | |
664 | return -1; | |
665 | } | |
666 | ||
667 | /* | |
668 | * Unregister the card | |
669 | */ | |
670 | ||
671 | void r852_unregister_nand_device(struct r852_device *dev) | |
672 | { | |
673 | if (!dev->card_registred) | |
674 | return; | |
675 | ||
676 | device_remove_file(&dev->mtd->dev, &dev_attr_media_type); | |
677 | nand_release(dev->mtd); | |
678 | r852_engine_disable(dev); | |
679 | dev->card_registred = 0; | |
680 | kfree(dev->mtd); | |
681 | dev->mtd = NULL; | |
682 | } | |
683 | ||
684 | /* Card state updater */ | |
685 | void r852_card_detect_work(struct work_struct *work) | |
686 | { | |
687 | struct r852_device *dev = | |
688 | container_of(work, struct r852_device, card_detect_work.work); | |
689 | ||
fb45d323 | 690 | r852_card_update_present(dev); |
ac373f7e | 691 | r852_update_card_detect(dev); |
67e054e9 ML |
692 | dev->card_unstable = 0; |
693 | ||
fb45d323 | 694 | /* False alarm */ |
67e054e9 ML |
695 | if (dev->card_detected == dev->card_registred) |
696 | goto exit; | |
697 | ||
698 | /* Read media properties */ | |
699 | r852_update_media_status(dev); | |
700 | ||
701 | /* Register the card */ | |
702 | if (dev->card_detected) | |
703 | r852_register_nand_device(dev); | |
704 | else | |
705 | r852_unregister_nand_device(dev); | |
706 | exit: | |
67e054e9 ML |
707 | r852_update_card_detect(dev); |
708 | } | |
709 | ||
710 | /* Ack + disable IRQ generation */ | |
711 | static void r852_disable_irqs(struct r852_device *dev) | |
712 | { | |
713 | uint8_t reg; | |
714 | reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE); | |
715 | r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK); | |
716 | ||
717 | reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE); | |
718 | r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, | |
719 | reg & ~R852_DMA_IRQ_MASK); | |
720 | ||
721 | r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK); | |
722 | r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK); | |
723 | } | |
724 | ||
725 | /* Interrupt handler */ | |
726 | static irqreturn_t r852_irq(int irq, void *data) | |
727 | { | |
728 | struct r852_device *dev = (struct r852_device *)data; | |
729 | ||
730 | uint8_t card_status, dma_status; | |
731 | unsigned long flags; | |
732 | irqreturn_t ret = IRQ_NONE; | |
733 | ||
734 | spin_lock_irqsave(&dev->irqlock, flags); | |
735 | ||
67e054e9 ML |
736 | /* handle card detection interrupts first */ |
737 | card_status = r852_read_reg(dev, R852_CARD_IRQ_STA); | |
738 | r852_write_reg(dev, R852_CARD_IRQ_STA, card_status); | |
739 | ||
740 | if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) { | |
741 | ||
742 | ret = IRQ_HANDLED; | |
743 | dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT); | |
744 | ||
25985edc | 745 | /* we shouldn't receive any interrupts if we wait for card |
67e054e9 ML |
746 | to settle */ |
747 | WARN_ON(dev->card_unstable); | |
748 | ||
749 | /* disable irqs while card is unstable */ | |
750 | /* this will timeout DMA if active, but better that garbage */ | |
751 | r852_disable_irqs(dev); | |
752 | ||
753 | if (dev->card_unstable) | |
754 | goto out; | |
755 | ||
756 | /* let, card state to settle a bit, and then do the work */ | |
757 | dev->card_unstable = 1; | |
758 | queue_delayed_work(dev->card_workqueue, | |
759 | &dev->card_detect_work, msecs_to_jiffies(100)); | |
760 | goto out; | |
761 | } | |
762 | ||
763 | ||
764 | /* Handle dma interrupts */ | |
765 | dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA); | |
766 | r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status); | |
767 | ||
768 | if (dma_status & R852_DMA_IRQ_MASK) { | |
769 | ||
770 | ret = IRQ_HANDLED; | |
771 | ||
772 | if (dma_status & R852_DMA_IRQ_ERROR) { | |
25985edc | 773 | dbg("received dma error IRQ"); |
67e054e9 | 774 | r852_dma_done(dev, -EIO); |
9489be8c | 775 | complete(&dev->dma_done); |
67e054e9 ML |
776 | goto out; |
777 | } | |
778 | ||
25985edc | 779 | /* received DMA interrupt out of nowhere? */ |
67e054e9 ML |
780 | WARN_ON_ONCE(dev->dma_stage == 0); |
781 | ||
782 | if (dev->dma_stage == 0) | |
783 | goto out; | |
784 | ||
785 | /* done device access */ | |
786 | if (dev->dma_state == DMA_INTERNAL && | |
787 | (dma_status & R852_DMA_IRQ_INTERNAL)) { | |
788 | ||
789 | dev->dma_state = DMA_MEMORY; | |
790 | dev->dma_stage++; | |
791 | } | |
792 | ||
793 | /* done memory DMA */ | |
794 | if (dev->dma_state == DMA_MEMORY && | |
795 | (dma_status & R852_DMA_IRQ_MEMORY)) { | |
796 | dev->dma_state = DMA_INTERNAL; | |
797 | dev->dma_stage++; | |
798 | } | |
799 | ||
800 | /* Enable 2nd half of dma dance */ | |
801 | if (dev->dma_stage == 2) | |
802 | r852_dma_enable(dev); | |
803 | ||
804 | /* Operation done */ | |
9489be8c | 805 | if (dev->dma_stage == 3) { |
67e054e9 | 806 | r852_dma_done(dev, 0); |
9489be8c ML |
807 | complete(&dev->dma_done); |
808 | } | |
67e054e9 ML |
809 | goto out; |
810 | } | |
811 | ||
812 | /* Handle unknown interrupts */ | |
813 | if (dma_status) | |
814 | dbg("bad dma IRQ status = %x", dma_status); | |
815 | ||
816 | if (card_status & ~R852_CARD_STA_CD) | |
817 | dbg("strange card status = %x", card_status); | |
818 | ||
819 | out: | |
820 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
821 | return ret; | |
822 | } | |
823 | ||
824 | int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) | |
825 | { | |
826 | int error; | |
827 | struct nand_chip *chip; | |
828 | struct r852_device *dev; | |
829 | ||
830 | /* pci initialization */ | |
831 | error = pci_enable_device(pci_dev); | |
832 | ||
833 | if (error) | |
834 | goto error1; | |
835 | ||
836 | pci_set_master(pci_dev); | |
837 | ||
133fa8c7 | 838 | error = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); |
67e054e9 ML |
839 | if (error) |
840 | goto error2; | |
841 | ||
842 | error = pci_request_regions(pci_dev, DRV_NAME); | |
843 | ||
844 | if (error) | |
845 | goto error3; | |
846 | ||
847 | error = -ENOMEM; | |
848 | ||
849 | /* init nand chip, but register it only on card insert */ | |
850 | chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL); | |
851 | ||
852 | if (!chip) | |
853 | goto error4; | |
854 | ||
855 | /* commands */ | |
856 | chip->cmd_ctrl = r852_cmdctl; | |
857 | chip->waitfunc = r852_wait; | |
858 | chip->dev_ready = r852_ready; | |
859 | ||
860 | /* I/O */ | |
861 | chip->read_byte = r852_read_byte; | |
862 | chip->read_buf = r852_read_buf; | |
863 | chip->write_buf = r852_write_buf; | |
67e054e9 ML |
864 | |
865 | /* ecc */ | |
866 | chip->ecc.mode = NAND_ECC_HW_SYNDROME; | |
867 | chip->ecc.size = R852_DMA_LEN; | |
868 | chip->ecc.bytes = SM_OOB_SIZE; | |
6a918bad | 869 | chip->ecc.strength = 2; |
67e054e9 ML |
870 | chip->ecc.hwctl = r852_ecc_hwctl; |
871 | chip->ecc.calculate = r852_ecc_calculate; | |
872 | chip->ecc.correct = r852_ecc_correct; | |
873 | ||
874 | /* TODO: hack */ | |
875 | chip->ecc.read_oob = r852_read_oob; | |
876 | ||
877 | /* init our device structure */ | |
878 | dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL); | |
879 | ||
880 | if (!dev) | |
881 | goto error5; | |
882 | ||
883 | chip->priv = dev; | |
884 | dev->chip = chip; | |
885 | dev->pci_dev = pci_dev; | |
886 | pci_set_drvdata(pci_dev, dev); | |
887 | ||
888 | dev->bounce_buffer = pci_alloc_consistent(pci_dev, R852_DMA_LEN, | |
889 | &dev->phys_bounce_buffer); | |
890 | ||
891 | if (!dev->bounce_buffer) | |
892 | goto error6; | |
893 | ||
894 | ||
895 | error = -ENODEV; | |
896 | dev->mmio = pci_ioremap_bar(pci_dev, 0); | |
897 | ||
898 | if (!dev->mmio) | |
899 | goto error7; | |
900 | ||
901 | error = -ENOMEM; | |
902 | dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL); | |
903 | ||
904 | if (!dev->tmp_buffer) | |
905 | goto error8; | |
906 | ||
907 | init_completion(&dev->dma_done); | |
908 | ||
58a69cb4 | 909 | dev->card_workqueue = create_freezable_workqueue(DRV_NAME); |
67e054e9 ML |
910 | |
911 | if (!dev->card_workqueue) | |
912 | goto error9; | |
913 | ||
914 | INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work); | |
915 | ||
916 | /* shutdown everything - precation */ | |
917 | r852_engine_disable(dev); | |
918 | r852_disable_irqs(dev); | |
919 | ||
920 | r852_dma_test(dev); | |
921 | ||
cc1fed00 ML |
922 | dev->irq = pci_dev->irq; |
923 | spin_lock_init(&dev->irqlock); | |
924 | ||
925 | dev->card_detected = 0; | |
926 | r852_card_update_present(dev); | |
927 | ||
67e054e9 ML |
928 | /*register irq handler*/ |
929 | error = -ENODEV; | |
930 | if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED, | |
931 | DRV_NAME, dev)) | |
932 | goto error10; | |
933 | ||
67e054e9 | 934 | /* kick initial present test */ |
67e054e9 ML |
935 | queue_delayed_work(dev->card_workqueue, |
936 | &dev->card_detect_work, 0); | |
937 | ||
938 | ||
25985edc | 939 | printk(KERN_NOTICE DRV_NAME ": driver loaded successfully\n"); |
67e054e9 ML |
940 | return 0; |
941 | ||
942 | error10: | |
943 | destroy_workqueue(dev->card_workqueue); | |
944 | error9: | |
945 | kfree(dev->tmp_buffer); | |
946 | error8: | |
947 | pci_iounmap(pci_dev, dev->mmio); | |
948 | error7: | |
949 | pci_free_consistent(pci_dev, R852_DMA_LEN, | |
950 | dev->bounce_buffer, dev->phys_bounce_buffer); | |
951 | error6: | |
952 | kfree(dev); | |
953 | error5: | |
954 | kfree(chip); | |
955 | error4: | |
956 | pci_release_regions(pci_dev); | |
957 | error3: | |
958 | error2: | |
959 | pci_disable_device(pci_dev); | |
960 | error1: | |
961 | return error; | |
962 | } | |
963 | ||
964 | void r852_remove(struct pci_dev *pci_dev) | |
965 | { | |
966 | struct r852_device *dev = pci_get_drvdata(pci_dev); | |
967 | ||
968 | /* Stop detect workqueue - | |
969 | we are going to unregister the device anyway*/ | |
970 | cancel_delayed_work_sync(&dev->card_detect_work); | |
971 | destroy_workqueue(dev->card_workqueue); | |
972 | ||
973 | /* Unregister the device, this might make more IO */ | |
974 | r852_unregister_nand_device(dev); | |
975 | ||
976 | /* Stop interrupts */ | |
977 | r852_disable_irqs(dev); | |
978 | synchronize_irq(dev->irq); | |
979 | free_irq(dev->irq, dev); | |
980 | ||
981 | /* Cleanup */ | |
982 | kfree(dev->tmp_buffer); | |
983 | pci_iounmap(pci_dev, dev->mmio); | |
984 | pci_free_consistent(pci_dev, R852_DMA_LEN, | |
985 | dev->bounce_buffer, dev->phys_bounce_buffer); | |
986 | ||
987 | kfree(dev->chip); | |
988 | kfree(dev); | |
989 | ||
990 | /* Shutdown the PCI device */ | |
991 | pci_release_regions(pci_dev); | |
992 | pci_disable_device(pci_dev); | |
993 | } | |
994 | ||
995 | void r852_shutdown(struct pci_dev *pci_dev) | |
996 | { | |
997 | struct r852_device *dev = pci_get_drvdata(pci_dev); | |
998 | ||
999 | cancel_delayed_work_sync(&dev->card_detect_work); | |
1000 | r852_disable_irqs(dev); | |
1001 | synchronize_irq(dev->irq); | |
1002 | pci_disable_device(pci_dev); | |
1003 | } | |
1004 | ||
b2aaf7a2 | 1005 | #ifdef CONFIG_PM |
1bba688b | 1006 | static int r852_suspend(struct device *device) |
67e054e9 ML |
1007 | { |
1008 | struct r852_device *dev = pci_get_drvdata(to_pci_dev(device)); | |
67e054e9 ML |
1009 | |
1010 | if (dev->ctlreg & R852_CTL_CARDENABLE) | |
1011 | return -EBUSY; | |
1012 | ||
1013 | /* First make sure the detect work is gone */ | |
1014 | cancel_delayed_work_sync(&dev->card_detect_work); | |
1015 | ||
1016 | /* Turn off the interrupts and stop the device */ | |
1017 | r852_disable_irqs(dev); | |
1018 | r852_engine_disable(dev); | |
1019 | ||
67e054e9 ML |
1020 | /* If card was pulled off just during the suspend, which is very |
1021 | unlikely, we will remove it on resume, it too late now | |
1022 | anyway... */ | |
1023 | dev->card_unstable = 0; | |
9bf70717 | 1024 | return 0; |
67e054e9 ML |
1025 | } |
1026 | ||
1bba688b | 1027 | static int r852_resume(struct device *device) |
67e054e9 ML |
1028 | { |
1029 | struct r852_device *dev = pci_get_drvdata(to_pci_dev(device)); | |
67e054e9 ML |
1030 | |
1031 | r852_disable_irqs(dev); | |
1032 | r852_card_update_present(dev); | |
1033 | r852_engine_disable(dev); | |
1034 | ||
1035 | ||
67e054e9 ML |
1036 | /* If card status changed, just do the work */ |
1037 | if (dev->card_detected != dev->card_registred) { | |
1038 | dbg("card was %s during low power state", | |
1039 | dev->card_detected ? "added" : "removed"); | |
1040 | ||
1041 | queue_delayed_work(dev->card_workqueue, | |
9489be8c | 1042 | &dev->card_detect_work, msecs_to_jiffies(1000)); |
67e054e9 ML |
1043 | return 0; |
1044 | } | |
1045 | ||
1046 | /* Otherwise, initialize the card */ | |
1047 | if (dev->card_registred) { | |
1048 | r852_engine_enable(dev); | |
1049 | dev->chip->select_chip(dev->mtd, 0); | |
1050 | dev->chip->cmdfunc(dev->mtd, NAND_CMD_RESET, -1, -1); | |
1051 | dev->chip->select_chip(dev->mtd, -1); | |
1052 | } | |
1053 | ||
1054 | /* Program card detection IRQ */ | |
1055 | r852_update_card_detect(dev); | |
1056 | return 0; | |
1057 | } | |
b2aaf7a2 RD |
1058 | #else |
1059 | #define r852_suspend NULL | |
1060 | #define r852_resume NULL | |
1061 | #endif | |
67e054e9 ML |
1062 | |
1063 | static const struct pci_device_id r852_pci_id_tbl[] = { | |
1064 | ||
d4080cb3 | 1065 | { PCI_VDEVICE(RICOH, 0x0852), }, |
67e054e9 ML |
1066 | { }, |
1067 | }; | |
1068 | ||
1069 | MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl); | |
1070 | ||
1bba688b | 1071 | static SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume); |
67e054e9 | 1072 | |
67e054e9 ML |
1073 | static struct pci_driver r852_pci_driver = { |
1074 | .name = DRV_NAME, | |
1075 | .id_table = r852_pci_id_tbl, | |
1076 | .probe = r852_probe, | |
1077 | .remove = r852_remove, | |
1078 | .shutdown = r852_shutdown, | |
1079 | .driver.pm = &r852_pm_ops, | |
1080 | }; | |
1081 | ||
4d16cd65 | 1082 | module_pci_driver(r852_pci_driver); |
67e054e9 ML |
1083 | |
1084 | MODULE_LICENSE("GPL"); | |
1085 | MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>"); | |
1086 | MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver"); |