Commit | Line | Data |
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67e054e9 ML |
1 | /* |
2 | * Copyright © 2009 - Maxim Levitsky | |
3 | * driver for Ricoh xD readers | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/jiffies.h> | |
13 | #include <linux/workqueue.h> | |
14 | #include <linux/interrupt.h> | |
f696aa43 | 15 | #include <linux/pci.h> |
67e054e9 | 16 | #include <linux/pci_ids.h> |
ada49657 | 17 | #include <linux/delay.h> |
05d71b46 | 18 | #include <linux/slab.h> |
67e054e9 ML |
19 | #include <asm/byteorder.h> |
20 | #include <linux/sched.h> | |
21 | #include "sm_common.h" | |
22 | #include "r852.h" | |
23 | ||
24 | ||
ada49657 SR |
25 | static int r852_enable_dma = 1; |
26 | module_param(r852_enable_dma, bool, S_IRUGO); | |
27 | MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)"); | |
67e054e9 ML |
28 | |
29 | static int debug; | |
30 | module_param(debug, int, S_IRUGO | S_IWUSR); | |
31 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); | |
32 | ||
33 | /* read register */ | |
34 | static inline uint8_t r852_read_reg(struct r852_device *dev, int address) | |
35 | { | |
36 | uint8_t reg = readb(dev->mmio + address); | |
37 | return reg; | |
38 | } | |
39 | ||
40 | /* write register */ | |
41 | static inline void r852_write_reg(struct r852_device *dev, | |
42 | int address, uint8_t value) | |
43 | { | |
44 | writeb(value, dev->mmio + address); | |
45 | mmiowb(); | |
46 | } | |
47 | ||
48 | ||
49 | /* read dword sized register */ | |
50 | static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address) | |
51 | { | |
52 | uint32_t reg = le32_to_cpu(readl(dev->mmio + address)); | |
53 | return reg; | |
54 | } | |
55 | ||
56 | /* write dword sized register */ | |
57 | static inline void r852_write_reg_dword(struct r852_device *dev, | |
58 | int address, uint32_t value) | |
59 | { | |
60 | writel(cpu_to_le32(value), dev->mmio + address); | |
61 | mmiowb(); | |
62 | } | |
63 | ||
64 | /* returns pointer to our private structure */ | |
65 | static inline struct r852_device *r852_get_dev(struct mtd_info *mtd) | |
66 | { | |
67 | struct nand_chip *chip = (struct nand_chip *)mtd->priv; | |
68 | return (struct r852_device *)chip->priv; | |
69 | } | |
70 | ||
71 | ||
72 | /* check if controller supports dma */ | |
73 | static void r852_dma_test(struct r852_device *dev) | |
74 | { | |
75 | dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) & | |
76 | (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2); | |
77 | ||
78 | if (!dev->dma_usable) | |
79 | message("Non dma capable device detected, dma disabled"); | |
80 | ||
ada49657 | 81 | if (!r852_enable_dma) { |
67e054e9 ML |
82 | message("disabling dma on user request"); |
83 | dev->dma_usable = 0; | |
84 | } | |
85 | } | |
86 | ||
87 | /* | |
88 | * Enable dma. Enables ether first or second stage of the DMA, | |
89 | * Expects dev->dma_dir and dev->dma_state be set | |
90 | */ | |
91 | static void r852_dma_enable(struct r852_device *dev) | |
92 | { | |
93 | uint8_t dma_reg, dma_irq_reg; | |
94 | ||
95 | /* Set up dma settings */ | |
96 | dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS); | |
97 | dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY); | |
98 | ||
99 | if (dev->dma_dir) | |
100 | dma_reg |= R852_DMA_READ; | |
101 | ||
fb45d323 | 102 | if (dev->dma_state == DMA_INTERNAL) { |
67e054e9 | 103 | dma_reg |= R852_DMA_INTERNAL; |
fb45d323 ML |
104 | /* Precaution to make sure HW doesn't write */ |
105 | /* to random kernel memory */ | |
106 | r852_write_reg_dword(dev, R852_DMA_ADDR, | |
107 | cpu_to_le32(dev->phys_bounce_buffer)); | |
108 | } else { | |
67e054e9 ML |
109 | dma_reg |= R852_DMA_MEMORY; |
110 | r852_write_reg_dword(dev, R852_DMA_ADDR, | |
111 | cpu_to_le32(dev->phys_dma_addr)); | |
112 | } | |
113 | ||
fb45d323 ML |
114 | /* Precaution: make sure write reached the device */ |
115 | r852_read_reg_dword(dev, R852_DMA_ADDR); | |
116 | ||
67e054e9 ML |
117 | r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg); |
118 | ||
119 | /* Set dma irq */ | |
120 | dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE); | |
121 | r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, | |
122 | dma_irq_reg | | |
123 | R852_DMA_IRQ_INTERNAL | | |
124 | R852_DMA_IRQ_ERROR | | |
125 | R852_DMA_IRQ_MEMORY); | |
126 | } | |
127 | ||
128 | /* | |
129 | * Disable dma, called from the interrupt handler, which specifies | |
130 | * success of the operation via 'error' argument | |
131 | */ | |
132 | static void r852_dma_done(struct r852_device *dev, int error) | |
133 | { | |
134 | WARN_ON(dev->dma_stage == 0); | |
135 | ||
136 | r852_write_reg_dword(dev, R852_DMA_IRQ_STA, | |
137 | r852_read_reg_dword(dev, R852_DMA_IRQ_STA)); | |
138 | ||
139 | r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0); | |
140 | r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0); | |
141 | ||
fb45d323 ML |
142 | /* Precaution to make sure HW doesn't write to random kernel memory */ |
143 | r852_write_reg_dword(dev, R852_DMA_ADDR, | |
144 | cpu_to_le32(dev->phys_bounce_buffer)); | |
145 | r852_read_reg_dword(dev, R852_DMA_ADDR); | |
146 | ||
67e054e9 ML |
147 | dev->dma_error = error; |
148 | dev->dma_stage = 0; | |
149 | ||
150 | if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer) | |
151 | pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN, | |
152 | dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE); | |
67e054e9 ML |
153 | } |
154 | ||
155 | /* | |
156 | * Wait, till dma is done, which includes both phases of it | |
157 | */ | |
158 | static int r852_dma_wait(struct r852_device *dev) | |
159 | { | |
160 | long timeout = wait_for_completion_timeout(&dev->dma_done, | |
161 | msecs_to_jiffies(1000)); | |
162 | if (!timeout) { | |
163 | dbg("timeout waiting for DMA interrupt"); | |
164 | return -ETIMEDOUT; | |
165 | } | |
166 | ||
167 | return 0; | |
168 | } | |
169 | ||
170 | /* | |
171 | * Read/Write one page using dma. Only pages can be read (512 bytes) | |
172 | */ | |
173 | static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read) | |
174 | { | |
175 | int bounce = 0; | |
176 | unsigned long flags; | |
177 | int error; | |
178 | ||
179 | dev->dma_error = 0; | |
180 | ||
181 | /* Set dma direction */ | |
182 | dev->dma_dir = do_read; | |
183 | dev->dma_stage = 1; | |
9489be8c | 184 | INIT_COMPLETION(dev->dma_done); |
67e054e9 ML |
185 | |
186 | dbg_verbose("doing dma %s ", do_read ? "read" : "write"); | |
187 | ||
188 | /* Set intial dma state: for reading first fill on board buffer, | |
189 | from device, for writes first fill the buffer from memory*/ | |
190 | dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY; | |
191 | ||
192 | /* if incoming buffer is not page aligned, we should do bounce */ | |
193 | if ((unsigned long)buf & (R852_DMA_LEN-1)) | |
194 | bounce = 1; | |
195 | ||
196 | if (!bounce) { | |
197 | dev->phys_dma_addr = pci_map_single(dev->pci_dev, (void *)buf, | |
198 | R852_DMA_LEN, | |
199 | (do_read ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE)); | |
200 | ||
0c82d3ce | 201 | if (pci_dma_mapping_error(dev->pci_dev, dev->phys_dma_addr)) |
67e054e9 ML |
202 | bounce = 1; |
203 | } | |
204 | ||
205 | if (bounce) { | |
206 | dbg_verbose("dma: using bounce buffer"); | |
207 | dev->phys_dma_addr = dev->phys_bounce_buffer; | |
208 | if (!do_read) | |
209 | memcpy(dev->bounce_buffer, buf, R852_DMA_LEN); | |
210 | } | |
211 | ||
212 | /* Enable DMA */ | |
213 | spin_lock_irqsave(&dev->irqlock, flags); | |
214 | r852_dma_enable(dev); | |
215 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
216 | ||
217 | /* Wait till complete */ | |
218 | error = r852_dma_wait(dev); | |
219 | ||
220 | if (error) { | |
221 | r852_dma_done(dev, error); | |
222 | return; | |
223 | } | |
224 | ||
225 | if (do_read && bounce) | |
226 | memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN); | |
227 | } | |
228 | ||
229 | /* | |
230 | * Program data lines of the nand chip to send data to it | |
231 | */ | |
232 | void r852_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) | |
233 | { | |
234 | struct r852_device *dev = r852_get_dev(mtd); | |
235 | uint32_t reg; | |
236 | ||
237 | /* Don't allow any access to hardware if we suspect card removal */ | |
238 | if (dev->card_unstable) | |
239 | return; | |
240 | ||
241 | /* Special case for whole sector read */ | |
242 | if (len == R852_DMA_LEN && dev->dma_usable) { | |
243 | r852_do_dma(dev, (uint8_t *)buf, 0); | |
244 | return; | |
245 | } | |
246 | ||
247 | /* write DWORD chinks - faster */ | |
248 | while (len) { | |
249 | reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24; | |
250 | r852_write_reg_dword(dev, R852_DATALINE, reg); | |
251 | buf += 4; | |
252 | len -= 4; | |
253 | ||
254 | } | |
255 | ||
256 | /* write rest */ | |
257 | while (len) | |
258 | r852_write_reg(dev, R852_DATALINE, *buf++); | |
259 | } | |
260 | ||
261 | /* | |
262 | * Read data lines of the nand chip to retrieve data | |
263 | */ | |
264 | void r852_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) | |
265 | { | |
266 | struct r852_device *dev = r852_get_dev(mtd); | |
267 | uint32_t reg; | |
268 | ||
269 | if (dev->card_unstable) { | |
270 | /* since we can't signal error here, at least, return | |
271 | predictable buffer */ | |
272 | memset(buf, 0, len); | |
273 | return; | |
274 | } | |
275 | ||
276 | /* special case for whole sector read */ | |
277 | if (len == R852_DMA_LEN && dev->dma_usable) { | |
278 | r852_do_dma(dev, buf, 1); | |
279 | return; | |
280 | } | |
281 | ||
282 | /* read in dword sized chunks */ | |
283 | while (len >= 4) { | |
284 | ||
285 | reg = r852_read_reg_dword(dev, R852_DATALINE); | |
286 | *buf++ = reg & 0xFF; | |
287 | *buf++ = (reg >> 8) & 0xFF; | |
288 | *buf++ = (reg >> 16) & 0xFF; | |
289 | *buf++ = (reg >> 24) & 0xFF; | |
290 | len -= 4; | |
291 | } | |
292 | ||
293 | /* read the reset by bytes */ | |
294 | while (len--) | |
295 | *buf++ = r852_read_reg(dev, R852_DATALINE); | |
296 | } | |
297 | ||
298 | /* | |
299 | * Read one byte from nand chip | |
300 | */ | |
301 | static uint8_t r852_read_byte(struct mtd_info *mtd) | |
302 | { | |
303 | struct r852_device *dev = r852_get_dev(mtd); | |
304 | ||
305 | /* Same problem as in r852_read_buf.... */ | |
306 | if (dev->card_unstable) | |
307 | return 0; | |
308 | ||
309 | return r852_read_reg(dev, R852_DATALINE); | |
310 | } | |
311 | ||
312 | ||
313 | /* | |
314 | * Readback the buffer to verify it | |
315 | */ | |
316 | int r852_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) | |
317 | { | |
318 | struct r852_device *dev = r852_get_dev(mtd); | |
319 | ||
320 | /* We can't be sure about anything here... */ | |
321 | if (dev->card_unstable) | |
322 | return -1; | |
323 | ||
324 | /* This will never happen, unless you wired up a nand chip | |
325 | with > 512 bytes page size to the reader */ | |
326 | if (len > SM_SECTOR_SIZE) | |
327 | return 0; | |
328 | ||
329 | r852_read_buf(mtd, dev->tmp_buffer, len); | |
330 | return memcmp(buf, dev->tmp_buffer, len); | |
331 | } | |
332 | ||
333 | /* | |
334 | * Control several chip lines & send commands | |
335 | */ | |
336 | void r852_cmdctl(struct mtd_info *mtd, int dat, unsigned int ctrl) | |
337 | { | |
338 | struct r852_device *dev = r852_get_dev(mtd); | |
339 | ||
340 | if (dev->card_unstable) | |
341 | return; | |
342 | ||
343 | if (ctrl & NAND_CTRL_CHANGE) { | |
344 | ||
345 | dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND | | |
346 | R852_CTL_ON | R852_CTL_CARDENABLE); | |
347 | ||
348 | if (ctrl & NAND_ALE) | |
349 | dev->ctlreg |= R852_CTL_DATA; | |
350 | ||
351 | if (ctrl & NAND_CLE) | |
352 | dev->ctlreg |= R852_CTL_COMMAND; | |
353 | ||
354 | if (ctrl & NAND_NCE) | |
355 | dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON); | |
356 | else | |
357 | dev->ctlreg &= ~R852_CTL_WRITE; | |
358 | ||
359 | /* when write is stareted, enable write access */ | |
360 | if (dat == NAND_CMD_ERASE1) | |
361 | dev->ctlreg |= R852_CTL_WRITE; | |
362 | ||
363 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
364 | } | |
365 | ||
366 | /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need | |
367 | to set write mode */ | |
368 | if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) { | |
369 | dev->ctlreg |= R852_CTL_WRITE; | |
370 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
371 | } | |
372 | ||
373 | if (dat != NAND_CMD_NONE) | |
374 | r852_write_reg(dev, R852_DATALINE, dat); | |
375 | } | |
376 | ||
377 | /* | |
378 | * Wait till card is ready. | |
379 | * based on nand_wait, but returns errors on DMA error | |
380 | */ | |
381 | int r852_wait(struct mtd_info *mtd, struct nand_chip *chip) | |
382 | { | |
383 | struct r852_device *dev = (struct r852_device *)chip->priv; | |
384 | ||
385 | unsigned long timeout; | |
386 | int status; | |
387 | ||
388 | timeout = jiffies + (chip->state == FL_ERASING ? | |
389 | msecs_to_jiffies(400) : msecs_to_jiffies(20)); | |
390 | ||
391 | while (time_before(jiffies, timeout)) | |
392 | if (chip->dev_ready(mtd)) | |
393 | break; | |
394 | ||
395 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); | |
396 | status = (int)chip->read_byte(mtd); | |
397 | ||
398 | /* Unfortunelly, no way to send detailed error status... */ | |
399 | if (dev->dma_error) { | |
400 | status |= NAND_STATUS_FAIL; | |
401 | dev->dma_error = 0; | |
402 | } | |
403 | return status; | |
404 | } | |
405 | ||
406 | /* | |
407 | * Check if card is ready | |
408 | */ | |
409 | ||
410 | int r852_ready(struct mtd_info *mtd) | |
411 | { | |
412 | struct r852_device *dev = r852_get_dev(mtd); | |
413 | return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY); | |
414 | } | |
415 | ||
416 | ||
417 | /* | |
418 | * Set ECC engine mode | |
419 | */ | |
420 | ||
421 | void r852_ecc_hwctl(struct mtd_info *mtd, int mode) | |
422 | { | |
423 | struct r852_device *dev = r852_get_dev(mtd); | |
424 | ||
425 | if (dev->card_unstable) | |
426 | return; | |
427 | ||
428 | switch (mode) { | |
429 | case NAND_ECC_READ: | |
430 | case NAND_ECC_WRITE: | |
431 | /* enable ecc generation/check*/ | |
432 | dev->ctlreg |= R852_CTL_ECC_ENABLE; | |
433 | ||
434 | /* flush ecc buffer */ | |
435 | r852_write_reg(dev, R852_CTL, | |
436 | dev->ctlreg | R852_CTL_ECC_ACCESS); | |
437 | ||
438 | r852_read_reg_dword(dev, R852_DATALINE); | |
439 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
440 | return; | |
441 | ||
442 | case NAND_ECC_READSYN: | |
443 | /* disable ecc generation */ | |
444 | dev->ctlreg &= ~R852_CTL_ECC_ENABLE; | |
445 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
446 | } | |
447 | } | |
448 | ||
449 | /* | |
450 | * Calculate ECC, only used for writes | |
451 | */ | |
452 | ||
453 | int r852_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat, | |
454 | uint8_t *ecc_code) | |
455 | { | |
456 | struct r852_device *dev = r852_get_dev(mtd); | |
457 | struct sm_oob *oob = (struct sm_oob *)ecc_code; | |
458 | uint32_t ecc1, ecc2; | |
459 | ||
460 | if (dev->card_unstable) | |
461 | return 0; | |
462 | ||
463 | dev->ctlreg &= ~R852_CTL_ECC_ENABLE; | |
464 | r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); | |
465 | ||
466 | ecc1 = r852_read_reg_dword(dev, R852_DATALINE); | |
467 | ecc2 = r852_read_reg_dword(dev, R852_DATALINE); | |
468 | ||
469 | oob->ecc1[0] = (ecc1) & 0xFF; | |
470 | oob->ecc1[1] = (ecc1 >> 8) & 0xFF; | |
471 | oob->ecc1[2] = (ecc1 >> 16) & 0xFF; | |
472 | ||
473 | oob->ecc2[0] = (ecc2) & 0xFF; | |
474 | oob->ecc2[1] = (ecc2 >> 8) & 0xFF; | |
475 | oob->ecc2[2] = (ecc2 >> 16) & 0xFF; | |
476 | ||
477 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
478 | return 0; | |
479 | } | |
480 | ||
481 | /* | |
482 | * Correct the data using ECC, hw did almost everything for us | |
483 | */ | |
484 | ||
485 | int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat, | |
486 | uint8_t *read_ecc, uint8_t *calc_ecc) | |
487 | { | |
488 | uint16_t ecc_reg; | |
489 | uint8_t ecc_status, err_byte; | |
490 | int i, error = 0; | |
491 | ||
492 | struct r852_device *dev = r852_get_dev(mtd); | |
493 | ||
494 | if (dev->card_unstable) | |
495 | return 0; | |
496 | ||
9489be8c ML |
497 | if (dev->dma_error) { |
498 | dev->dma_error = 0; | |
499 | return -1; | |
500 | } | |
501 | ||
67e054e9 ML |
502 | r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); |
503 | ecc_reg = r852_read_reg_dword(dev, R852_DATALINE); | |
504 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | |
505 | ||
506 | for (i = 0 ; i <= 1 ; i++) { | |
507 | ||
508 | ecc_status = (ecc_reg >> 8) & 0xFF; | |
509 | ||
510 | /* ecc uncorrectable error */ | |
511 | if (ecc_status & R852_ECC_FAIL) { | |
512 | dbg("ecc: unrecoverable error, in half %d", i); | |
513 | error = -1; | |
514 | goto exit; | |
515 | } | |
516 | ||
517 | /* correctable error */ | |
518 | if (ecc_status & R852_ECC_CORRECTABLE) { | |
519 | ||
520 | err_byte = ecc_reg & 0xFF; | |
521 | dbg("ecc: recoverable error, " | |
522 | "in half %d, byte %d, bit %d", i, | |
523 | err_byte, ecc_status & R852_ECC_ERR_BIT_MSK); | |
524 | ||
525 | dat[err_byte] ^= | |
526 | 1 << (ecc_status & R852_ECC_ERR_BIT_MSK); | |
527 | error++; | |
528 | } | |
529 | ||
530 | dat += 256; | |
531 | ecc_reg >>= 16; | |
532 | } | |
533 | exit: | |
534 | return error; | |
535 | } | |
536 | ||
537 | /* | |
538 | * This is copy of nand_read_oob_std | |
539 | * nand_read_oob_syndrome assumes we can send column address - we can't | |
540 | */ | |
541 | static int r852_read_oob(struct mtd_info *mtd, struct nand_chip *chip, | |
542 | int page, int sndcmd) | |
543 | { | |
544 | if (sndcmd) { | |
545 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); | |
546 | sndcmd = 0; | |
547 | } | |
548 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); | |
549 | return sndcmd; | |
550 | } | |
551 | ||
552 | /* | |
553 | * Start the nand engine | |
554 | */ | |
555 | ||
556 | void r852_engine_enable(struct r852_device *dev) | |
557 | { | |
558 | if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) { | |
559 | r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON); | |
560 | r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED); | |
561 | } else { | |
562 | r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED); | |
563 | r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON); | |
564 | } | |
565 | msleep(300); | |
566 | r852_write_reg(dev, R852_CTL, 0); | |
567 | } | |
568 | ||
569 | ||
570 | /* | |
571 | * Stop the nand engine | |
572 | */ | |
573 | ||
574 | void r852_engine_disable(struct r852_device *dev) | |
575 | { | |
576 | r852_write_reg_dword(dev, R852_HW, 0); | |
577 | r852_write_reg(dev, R852_CTL, R852_CTL_RESET); | |
578 | } | |
579 | ||
580 | /* | |
581 | * Test if card is present | |
582 | */ | |
583 | ||
584 | void r852_card_update_present(struct r852_device *dev) | |
585 | { | |
586 | unsigned long flags; | |
587 | uint8_t reg; | |
588 | ||
589 | spin_lock_irqsave(&dev->irqlock, flags); | |
590 | reg = r852_read_reg(dev, R852_CARD_STA); | |
591 | dev->card_detected = !!(reg & R852_CARD_STA_PRESENT); | |
592 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
593 | } | |
594 | ||
595 | /* | |
596 | * Update card detection IRQ state according to current card state | |
597 | * which is read in r852_card_update_present | |
598 | */ | |
599 | void r852_update_card_detect(struct r852_device *dev) | |
600 | { | |
601 | int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE); | |
fb45d323 | 602 | dev->card_unstable = 0; |
67e054e9 ML |
603 | |
604 | card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT); | |
605 | card_detect_reg |= R852_CARD_IRQ_GENABLE; | |
606 | ||
607 | card_detect_reg |= dev->card_detected ? | |
608 | R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT; | |
609 | ||
610 | r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg); | |
611 | } | |
612 | ||
613 | ssize_t r852_media_type_show(struct device *sys_dev, | |
614 | struct device_attribute *attr, char *buf) | |
615 | { | |
616 | struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev); | |
617 | struct r852_device *dev = r852_get_dev(mtd); | |
618 | char *data = dev->sm ? "smartmedia" : "xd"; | |
619 | ||
620 | strcpy(buf, data); | |
621 | return strlen(data); | |
622 | } | |
623 | ||
624 | DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL); | |
625 | ||
626 | ||
627 | /* Detect properties of card in slot */ | |
628 | void r852_update_media_status(struct r852_device *dev) | |
629 | { | |
630 | uint8_t reg; | |
631 | unsigned long flags; | |
632 | int readonly; | |
633 | ||
634 | spin_lock_irqsave(&dev->irqlock, flags); | |
635 | if (!dev->card_detected) { | |
636 | message("card removed"); | |
637 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
638 | return ; | |
639 | } | |
640 | ||
641 | readonly = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO; | |
642 | reg = r852_read_reg(dev, R852_DMA_CAP); | |
643 | dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT); | |
644 | ||
645 | message("detected %s %s card in slot", | |
646 | dev->sm ? "SmartMedia" : "xD", | |
647 | readonly ? "readonly" : "writeable"); | |
648 | ||
649 | dev->readonly = readonly; | |
650 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
651 | } | |
652 | ||
653 | /* | |
654 | * Register the nand device | |
655 | * Called when the card is detected | |
656 | */ | |
657 | int r852_register_nand_device(struct r852_device *dev) | |
658 | { | |
659 | dev->mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL); | |
660 | ||
661 | if (!dev->mtd) | |
662 | goto error1; | |
663 | ||
664 | WARN_ON(dev->card_registred); | |
665 | ||
666 | dev->mtd->owner = THIS_MODULE; | |
667 | dev->mtd->priv = dev->chip; | |
668 | dev->mtd->dev.parent = &dev->pci_dev->dev; | |
669 | ||
670 | if (dev->readonly) | |
671 | dev->chip->options |= NAND_ROM; | |
672 | ||
673 | r852_engine_enable(dev); | |
674 | ||
c3611570 | 675 | if (sm_register_device(dev->mtd, dev->sm)) |
67e054e9 ML |
676 | goto error2; |
677 | ||
133fa8c7 ML |
678 | if (device_create_file(&dev->mtd->dev, &dev_attr_media_type)) |
679 | message("can't create media type sysfs attribute"); | |
680 | ||
67e054e9 ML |
681 | dev->card_registred = 1; |
682 | return 0; | |
683 | error2: | |
684 | kfree(dev->mtd); | |
685 | error1: | |
686 | /* Force card redetect */ | |
687 | dev->card_detected = 0; | |
688 | return -1; | |
689 | } | |
690 | ||
691 | /* | |
692 | * Unregister the card | |
693 | */ | |
694 | ||
695 | void r852_unregister_nand_device(struct r852_device *dev) | |
696 | { | |
697 | if (!dev->card_registred) | |
698 | return; | |
699 | ||
700 | device_remove_file(&dev->mtd->dev, &dev_attr_media_type); | |
701 | nand_release(dev->mtd); | |
702 | r852_engine_disable(dev); | |
703 | dev->card_registred = 0; | |
704 | kfree(dev->mtd); | |
705 | dev->mtd = NULL; | |
706 | } | |
707 | ||
708 | /* Card state updater */ | |
709 | void r852_card_detect_work(struct work_struct *work) | |
710 | { | |
711 | struct r852_device *dev = | |
712 | container_of(work, struct r852_device, card_detect_work.work); | |
713 | ||
fb45d323 | 714 | r852_card_update_present(dev); |
ac373f7e | 715 | r852_update_card_detect(dev); |
67e054e9 ML |
716 | dev->card_unstable = 0; |
717 | ||
fb45d323 | 718 | /* False alarm */ |
67e054e9 ML |
719 | if (dev->card_detected == dev->card_registred) |
720 | goto exit; | |
721 | ||
722 | /* Read media properties */ | |
723 | r852_update_media_status(dev); | |
724 | ||
725 | /* Register the card */ | |
726 | if (dev->card_detected) | |
727 | r852_register_nand_device(dev); | |
728 | else | |
729 | r852_unregister_nand_device(dev); | |
730 | exit: | |
67e054e9 ML |
731 | r852_update_card_detect(dev); |
732 | } | |
733 | ||
734 | /* Ack + disable IRQ generation */ | |
735 | static void r852_disable_irqs(struct r852_device *dev) | |
736 | { | |
737 | uint8_t reg; | |
738 | reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE); | |
739 | r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK); | |
740 | ||
741 | reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE); | |
742 | r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, | |
743 | reg & ~R852_DMA_IRQ_MASK); | |
744 | ||
745 | r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK); | |
746 | r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK); | |
747 | } | |
748 | ||
749 | /* Interrupt handler */ | |
750 | static irqreturn_t r852_irq(int irq, void *data) | |
751 | { | |
752 | struct r852_device *dev = (struct r852_device *)data; | |
753 | ||
754 | uint8_t card_status, dma_status; | |
755 | unsigned long flags; | |
756 | irqreturn_t ret = IRQ_NONE; | |
757 | ||
758 | spin_lock_irqsave(&dev->irqlock, flags); | |
759 | ||
760 | /* We can recieve shared interrupt while pci is suspended | |
761 | in that case reads will return 0xFFFFFFFF.... */ | |
762 | if (dev->insuspend) | |
763 | goto out; | |
764 | ||
765 | /* handle card detection interrupts first */ | |
766 | card_status = r852_read_reg(dev, R852_CARD_IRQ_STA); | |
767 | r852_write_reg(dev, R852_CARD_IRQ_STA, card_status); | |
768 | ||
769 | if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) { | |
770 | ||
771 | ret = IRQ_HANDLED; | |
772 | dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT); | |
773 | ||
774 | /* we shouldn't recieve any interrupts if we wait for card | |
775 | to settle */ | |
776 | WARN_ON(dev->card_unstable); | |
777 | ||
778 | /* disable irqs while card is unstable */ | |
779 | /* this will timeout DMA if active, but better that garbage */ | |
780 | r852_disable_irqs(dev); | |
781 | ||
782 | if (dev->card_unstable) | |
783 | goto out; | |
784 | ||
785 | /* let, card state to settle a bit, and then do the work */ | |
786 | dev->card_unstable = 1; | |
787 | queue_delayed_work(dev->card_workqueue, | |
788 | &dev->card_detect_work, msecs_to_jiffies(100)); | |
789 | goto out; | |
790 | } | |
791 | ||
792 | ||
793 | /* Handle dma interrupts */ | |
794 | dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA); | |
795 | r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status); | |
796 | ||
797 | if (dma_status & R852_DMA_IRQ_MASK) { | |
798 | ||
799 | ret = IRQ_HANDLED; | |
800 | ||
801 | if (dma_status & R852_DMA_IRQ_ERROR) { | |
802 | dbg("recieved dma error IRQ"); | |
803 | r852_dma_done(dev, -EIO); | |
9489be8c | 804 | complete(&dev->dma_done); |
67e054e9 ML |
805 | goto out; |
806 | } | |
807 | ||
808 | /* recieved DMA interrupt out of nowhere? */ | |
809 | WARN_ON_ONCE(dev->dma_stage == 0); | |
810 | ||
811 | if (dev->dma_stage == 0) | |
812 | goto out; | |
813 | ||
814 | /* done device access */ | |
815 | if (dev->dma_state == DMA_INTERNAL && | |
816 | (dma_status & R852_DMA_IRQ_INTERNAL)) { | |
817 | ||
818 | dev->dma_state = DMA_MEMORY; | |
819 | dev->dma_stage++; | |
820 | } | |
821 | ||
822 | /* done memory DMA */ | |
823 | if (dev->dma_state == DMA_MEMORY && | |
824 | (dma_status & R852_DMA_IRQ_MEMORY)) { | |
825 | dev->dma_state = DMA_INTERNAL; | |
826 | dev->dma_stage++; | |
827 | } | |
828 | ||
829 | /* Enable 2nd half of dma dance */ | |
830 | if (dev->dma_stage == 2) | |
831 | r852_dma_enable(dev); | |
832 | ||
833 | /* Operation done */ | |
9489be8c | 834 | if (dev->dma_stage == 3) { |
67e054e9 | 835 | r852_dma_done(dev, 0); |
9489be8c ML |
836 | complete(&dev->dma_done); |
837 | } | |
67e054e9 ML |
838 | goto out; |
839 | } | |
840 | ||
841 | /* Handle unknown interrupts */ | |
842 | if (dma_status) | |
843 | dbg("bad dma IRQ status = %x", dma_status); | |
844 | ||
845 | if (card_status & ~R852_CARD_STA_CD) | |
846 | dbg("strange card status = %x", card_status); | |
847 | ||
848 | out: | |
849 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
850 | return ret; | |
851 | } | |
852 | ||
853 | int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) | |
854 | { | |
855 | int error; | |
856 | struct nand_chip *chip; | |
857 | struct r852_device *dev; | |
858 | ||
859 | /* pci initialization */ | |
860 | error = pci_enable_device(pci_dev); | |
861 | ||
862 | if (error) | |
863 | goto error1; | |
864 | ||
865 | pci_set_master(pci_dev); | |
866 | ||
133fa8c7 | 867 | error = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); |
67e054e9 ML |
868 | if (error) |
869 | goto error2; | |
870 | ||
871 | error = pci_request_regions(pci_dev, DRV_NAME); | |
872 | ||
873 | if (error) | |
874 | goto error3; | |
875 | ||
876 | error = -ENOMEM; | |
877 | ||
878 | /* init nand chip, but register it only on card insert */ | |
879 | chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL); | |
880 | ||
881 | if (!chip) | |
882 | goto error4; | |
883 | ||
884 | /* commands */ | |
885 | chip->cmd_ctrl = r852_cmdctl; | |
886 | chip->waitfunc = r852_wait; | |
887 | chip->dev_ready = r852_ready; | |
888 | ||
889 | /* I/O */ | |
890 | chip->read_byte = r852_read_byte; | |
891 | chip->read_buf = r852_read_buf; | |
892 | chip->write_buf = r852_write_buf; | |
893 | chip->verify_buf = r852_verify_buf; | |
894 | ||
895 | /* ecc */ | |
896 | chip->ecc.mode = NAND_ECC_HW_SYNDROME; | |
897 | chip->ecc.size = R852_DMA_LEN; | |
898 | chip->ecc.bytes = SM_OOB_SIZE; | |
899 | chip->ecc.hwctl = r852_ecc_hwctl; | |
900 | chip->ecc.calculate = r852_ecc_calculate; | |
901 | chip->ecc.correct = r852_ecc_correct; | |
902 | ||
903 | /* TODO: hack */ | |
904 | chip->ecc.read_oob = r852_read_oob; | |
905 | ||
906 | /* init our device structure */ | |
907 | dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL); | |
908 | ||
909 | if (!dev) | |
910 | goto error5; | |
911 | ||
912 | chip->priv = dev; | |
913 | dev->chip = chip; | |
914 | dev->pci_dev = pci_dev; | |
915 | pci_set_drvdata(pci_dev, dev); | |
916 | ||
917 | dev->bounce_buffer = pci_alloc_consistent(pci_dev, R852_DMA_LEN, | |
918 | &dev->phys_bounce_buffer); | |
919 | ||
920 | if (!dev->bounce_buffer) | |
921 | goto error6; | |
922 | ||
923 | ||
924 | error = -ENODEV; | |
925 | dev->mmio = pci_ioremap_bar(pci_dev, 0); | |
926 | ||
927 | if (!dev->mmio) | |
928 | goto error7; | |
929 | ||
930 | error = -ENOMEM; | |
931 | dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL); | |
932 | ||
933 | if (!dev->tmp_buffer) | |
934 | goto error8; | |
935 | ||
936 | init_completion(&dev->dma_done); | |
937 | ||
938 | dev->card_workqueue = create_freezeable_workqueue(DRV_NAME); | |
939 | ||
940 | if (!dev->card_workqueue) | |
941 | goto error9; | |
942 | ||
943 | INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work); | |
944 | ||
945 | /* shutdown everything - precation */ | |
946 | r852_engine_disable(dev); | |
947 | r852_disable_irqs(dev); | |
948 | ||
949 | r852_dma_test(dev); | |
950 | ||
cc1fed00 ML |
951 | dev->irq = pci_dev->irq; |
952 | spin_lock_init(&dev->irqlock); | |
953 | ||
954 | dev->card_detected = 0; | |
955 | r852_card_update_present(dev); | |
956 | ||
67e054e9 ML |
957 | /*register irq handler*/ |
958 | error = -ENODEV; | |
959 | if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED, | |
960 | DRV_NAME, dev)) | |
961 | goto error10; | |
962 | ||
67e054e9 | 963 | /* kick initial present test */ |
67e054e9 ML |
964 | queue_delayed_work(dev->card_workqueue, |
965 | &dev->card_detect_work, 0); | |
966 | ||
967 | ||
968 | printk(KERN_NOTICE DRV_NAME ": driver loaded succesfully\n"); | |
969 | return 0; | |
970 | ||
971 | error10: | |
972 | destroy_workqueue(dev->card_workqueue); | |
973 | error9: | |
974 | kfree(dev->tmp_buffer); | |
975 | error8: | |
976 | pci_iounmap(pci_dev, dev->mmio); | |
977 | error7: | |
978 | pci_free_consistent(pci_dev, R852_DMA_LEN, | |
979 | dev->bounce_buffer, dev->phys_bounce_buffer); | |
980 | error6: | |
981 | kfree(dev); | |
982 | error5: | |
983 | kfree(chip); | |
984 | error4: | |
985 | pci_release_regions(pci_dev); | |
986 | error3: | |
987 | error2: | |
988 | pci_disable_device(pci_dev); | |
989 | error1: | |
990 | return error; | |
991 | } | |
992 | ||
993 | void r852_remove(struct pci_dev *pci_dev) | |
994 | { | |
995 | struct r852_device *dev = pci_get_drvdata(pci_dev); | |
996 | ||
997 | /* Stop detect workqueue - | |
998 | we are going to unregister the device anyway*/ | |
999 | cancel_delayed_work_sync(&dev->card_detect_work); | |
1000 | destroy_workqueue(dev->card_workqueue); | |
1001 | ||
1002 | /* Unregister the device, this might make more IO */ | |
1003 | r852_unregister_nand_device(dev); | |
1004 | ||
1005 | /* Stop interrupts */ | |
1006 | r852_disable_irqs(dev); | |
1007 | synchronize_irq(dev->irq); | |
1008 | free_irq(dev->irq, dev); | |
1009 | ||
1010 | /* Cleanup */ | |
1011 | kfree(dev->tmp_buffer); | |
1012 | pci_iounmap(pci_dev, dev->mmio); | |
1013 | pci_free_consistent(pci_dev, R852_DMA_LEN, | |
1014 | dev->bounce_buffer, dev->phys_bounce_buffer); | |
1015 | ||
1016 | kfree(dev->chip); | |
1017 | kfree(dev); | |
1018 | ||
1019 | /* Shutdown the PCI device */ | |
1020 | pci_release_regions(pci_dev); | |
1021 | pci_disable_device(pci_dev); | |
1022 | } | |
1023 | ||
1024 | void r852_shutdown(struct pci_dev *pci_dev) | |
1025 | { | |
1026 | struct r852_device *dev = pci_get_drvdata(pci_dev); | |
1027 | ||
1028 | cancel_delayed_work_sync(&dev->card_detect_work); | |
1029 | r852_disable_irqs(dev); | |
1030 | synchronize_irq(dev->irq); | |
1031 | pci_disable_device(pci_dev); | |
1032 | } | |
1033 | ||
b2aaf7a2 | 1034 | #ifdef CONFIG_PM |
67e054e9 ML |
1035 | int r852_suspend(struct device *device) |
1036 | { | |
1037 | struct r852_device *dev = pci_get_drvdata(to_pci_dev(device)); | |
1038 | unsigned long flags; | |
1039 | ||
1040 | if (dev->ctlreg & R852_CTL_CARDENABLE) | |
1041 | return -EBUSY; | |
1042 | ||
1043 | /* First make sure the detect work is gone */ | |
1044 | cancel_delayed_work_sync(&dev->card_detect_work); | |
1045 | ||
1046 | /* Turn off the interrupts and stop the device */ | |
1047 | r852_disable_irqs(dev); | |
1048 | r852_engine_disable(dev); | |
1049 | ||
1050 | spin_lock_irqsave(&dev->irqlock, flags); | |
1051 | dev->insuspend = 1; | |
1052 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
1053 | ||
1054 | /* At that point, even if interrupt handler is running, it will quit */ | |
1055 | /* So wait for this to happen explictly */ | |
1056 | synchronize_irq(dev->irq); | |
1057 | ||
1058 | /* If card was pulled off just during the suspend, which is very | |
1059 | unlikely, we will remove it on resume, it too late now | |
1060 | anyway... */ | |
1061 | dev->card_unstable = 0; | |
1062 | ||
1063 | pci_save_state(to_pci_dev(device)); | |
1064 | return pci_prepare_to_sleep(to_pci_dev(device)); | |
1065 | } | |
1066 | ||
1067 | int r852_resume(struct device *device) | |
1068 | { | |
1069 | struct r852_device *dev = pci_get_drvdata(to_pci_dev(device)); | |
1070 | unsigned long flags; | |
1071 | ||
1072 | /* Turn on the hardware */ | |
1073 | pci_back_from_sleep(to_pci_dev(device)); | |
1074 | pci_restore_state(to_pci_dev(device)); | |
1075 | ||
1076 | r852_disable_irqs(dev); | |
1077 | r852_card_update_present(dev); | |
1078 | r852_engine_disable(dev); | |
1079 | ||
1080 | ||
1081 | /* Now its safe for IRQ to run */ | |
1082 | spin_lock_irqsave(&dev->irqlock, flags); | |
1083 | dev->insuspend = 0; | |
1084 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
1085 | ||
1086 | ||
1087 | /* If card status changed, just do the work */ | |
1088 | if (dev->card_detected != dev->card_registred) { | |
1089 | dbg("card was %s during low power state", | |
1090 | dev->card_detected ? "added" : "removed"); | |
1091 | ||
1092 | queue_delayed_work(dev->card_workqueue, | |
9489be8c | 1093 | &dev->card_detect_work, msecs_to_jiffies(1000)); |
67e054e9 ML |
1094 | return 0; |
1095 | } | |
1096 | ||
1097 | /* Otherwise, initialize the card */ | |
1098 | if (dev->card_registred) { | |
1099 | r852_engine_enable(dev); | |
1100 | dev->chip->select_chip(dev->mtd, 0); | |
1101 | dev->chip->cmdfunc(dev->mtd, NAND_CMD_RESET, -1, -1); | |
1102 | dev->chip->select_chip(dev->mtd, -1); | |
1103 | } | |
1104 | ||
1105 | /* Program card detection IRQ */ | |
1106 | r852_update_card_detect(dev); | |
1107 | return 0; | |
1108 | } | |
b2aaf7a2 RD |
1109 | #else |
1110 | #define r852_suspend NULL | |
1111 | #define r852_resume NULL | |
1112 | #endif | |
67e054e9 ML |
1113 | |
1114 | static const struct pci_device_id r852_pci_id_tbl[] = { | |
1115 | ||
d4080cb3 | 1116 | { PCI_VDEVICE(RICOH, 0x0852), }, |
67e054e9 ML |
1117 | { }, |
1118 | }; | |
1119 | ||
1120 | MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl); | |
1121 | ||
1122 | SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume); | |
1123 | ||
1124 | ||
1125 | static struct pci_driver r852_pci_driver = { | |
1126 | .name = DRV_NAME, | |
1127 | .id_table = r852_pci_id_tbl, | |
1128 | .probe = r852_probe, | |
1129 | .remove = r852_remove, | |
1130 | .shutdown = r852_shutdown, | |
1131 | .driver.pm = &r852_pm_ops, | |
1132 | }; | |
1133 | ||
1134 | static __init int r852_module_init(void) | |
1135 | { | |
1136 | return pci_register_driver(&r852_pci_driver); | |
1137 | } | |
1138 | ||
1139 | static void __exit r852_module_exit(void) | |
1140 | { | |
1141 | pci_unregister_driver(&r852_pci_driver); | |
1142 | } | |
1143 | ||
1144 | module_init(r852_module_init); | |
1145 | module_exit(r852_module_exit); | |
1146 | ||
1147 | MODULE_LICENSE("GPL"); | |
1148 | MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>"); | |
1149 | MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver"); |