Commit | Line | Data |
---|---|---|
6b7c5b94 | 1 | /* |
294aedcf | 2 | * Copyright (C) 2005 - 2010 ServerEngines |
6b7c5b94 SP |
3 | * All rights reserved. |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License version 2 | |
7 | * as published by the Free Software Foundation. The full GNU General | |
8 | * Public License is included in this distribution in the file called COPYING. | |
9 | * | |
10 | * Contact Information: | |
11 | * linux-drivers@serverengines.com | |
12 | * | |
13 | * ServerEngines | |
14 | * 209 N. Fair Oaks Ave | |
15 | * Sunnyvale, CA 94085 | |
16 | */ | |
17 | ||
18 | #include "be.h" | |
8788fdc2 | 19 | #include "be_cmds.h" |
65f71b8b | 20 | #include <asm/div64.h> |
6b7c5b94 SP |
21 | |
22 | MODULE_VERSION(DRV_VER); | |
23 | MODULE_DEVICE_TABLE(pci, be_dev_ids); | |
24 | MODULE_DESCRIPTION(DRV_DESC " " DRV_VER); | |
25 | MODULE_AUTHOR("ServerEngines Corporation"); | |
26 | MODULE_LICENSE("GPL"); | |
27 | ||
28 | static unsigned int rx_frag_size = 2048; | |
29 | module_param(rx_frag_size, uint, S_IRUGO); | |
30 | MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data."); | |
31 | ||
6b7c5b94 | 32 | static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = { |
c4ca2374 | 33 | { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) }, |
59fd5d87 | 34 | { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) }, |
c4ca2374 AK |
35 | { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) }, |
36 | { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) }, | |
6b7c5b94 SP |
37 | { 0 } |
38 | }; | |
39 | MODULE_DEVICE_TABLE(pci, be_dev_ids); | |
40 | ||
41 | static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q) | |
42 | { | |
43 | struct be_dma_mem *mem = &q->dma_mem; | |
44 | if (mem->va) | |
45 | pci_free_consistent(adapter->pdev, mem->size, | |
46 | mem->va, mem->dma); | |
47 | } | |
48 | ||
49 | static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q, | |
50 | u16 len, u16 entry_size) | |
51 | { | |
52 | struct be_dma_mem *mem = &q->dma_mem; | |
53 | ||
54 | memset(q, 0, sizeof(*q)); | |
55 | q->len = len; | |
56 | q->entry_size = entry_size; | |
57 | mem->size = len * entry_size; | |
58 | mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma); | |
59 | if (!mem->va) | |
60 | return -1; | |
61 | memset(mem->va, 0, mem->size); | |
62 | return 0; | |
63 | } | |
64 | ||
8788fdc2 | 65 | static void be_intr_set(struct be_adapter *adapter, bool enable) |
6b7c5b94 | 66 | { |
8788fdc2 | 67 | u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET; |
6b7c5b94 SP |
68 | u32 reg = ioread32(addr); |
69 | u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; | |
5f0b849e | 70 | |
cf588477 SP |
71 | if (adapter->eeh_err) |
72 | return; | |
73 | ||
5f0b849e | 74 | if (!enabled && enable) |
6b7c5b94 | 75 | reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; |
5f0b849e | 76 | else if (enabled && !enable) |
6b7c5b94 | 77 | reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; |
5f0b849e | 78 | else |
6b7c5b94 | 79 | return; |
5f0b849e | 80 | |
6b7c5b94 SP |
81 | iowrite32(reg, addr); |
82 | } | |
83 | ||
8788fdc2 | 84 | static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted) |
6b7c5b94 SP |
85 | { |
86 | u32 val = 0; | |
87 | val |= qid & DB_RQ_RING_ID_MASK; | |
88 | val |= posted << DB_RQ_NUM_POSTED_SHIFT; | |
8788fdc2 | 89 | iowrite32(val, adapter->db + DB_RQ_OFFSET); |
6b7c5b94 SP |
90 | } |
91 | ||
8788fdc2 | 92 | static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted) |
6b7c5b94 SP |
93 | { |
94 | u32 val = 0; | |
95 | val |= qid & DB_TXULP_RING_ID_MASK; | |
96 | val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT; | |
8788fdc2 | 97 | iowrite32(val, adapter->db + DB_TXULP1_OFFSET); |
6b7c5b94 SP |
98 | } |
99 | ||
8788fdc2 | 100 | static void be_eq_notify(struct be_adapter *adapter, u16 qid, |
6b7c5b94 SP |
101 | bool arm, bool clear_int, u16 num_popped) |
102 | { | |
103 | u32 val = 0; | |
104 | val |= qid & DB_EQ_RING_ID_MASK; | |
cf588477 SP |
105 | |
106 | if (adapter->eeh_err) | |
107 | return; | |
108 | ||
6b7c5b94 SP |
109 | if (arm) |
110 | val |= 1 << DB_EQ_REARM_SHIFT; | |
111 | if (clear_int) | |
112 | val |= 1 << DB_EQ_CLR_SHIFT; | |
113 | val |= 1 << DB_EQ_EVNT_SHIFT; | |
114 | val |= num_popped << DB_EQ_NUM_POPPED_SHIFT; | |
8788fdc2 | 115 | iowrite32(val, adapter->db + DB_EQ_OFFSET); |
6b7c5b94 SP |
116 | } |
117 | ||
8788fdc2 | 118 | void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped) |
6b7c5b94 SP |
119 | { |
120 | u32 val = 0; | |
121 | val |= qid & DB_CQ_RING_ID_MASK; | |
cf588477 SP |
122 | |
123 | if (adapter->eeh_err) | |
124 | return; | |
125 | ||
6b7c5b94 SP |
126 | if (arm) |
127 | val |= 1 << DB_CQ_REARM_SHIFT; | |
128 | val |= num_popped << DB_CQ_NUM_POPPED_SHIFT; | |
8788fdc2 | 129 | iowrite32(val, adapter->db + DB_CQ_OFFSET); |
6b7c5b94 SP |
130 | } |
131 | ||
6b7c5b94 SP |
132 | static int be_mac_addr_set(struct net_device *netdev, void *p) |
133 | { | |
134 | struct be_adapter *adapter = netdev_priv(netdev); | |
135 | struct sockaddr *addr = p; | |
136 | int status = 0; | |
137 | ||
ca9e4988 AK |
138 | if (!is_valid_ether_addr(addr->sa_data)) |
139 | return -EADDRNOTAVAIL; | |
140 | ||
a65027e4 SP |
141 | status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id); |
142 | if (status) | |
143 | return status; | |
6b7c5b94 | 144 | |
a65027e4 SP |
145 | status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data, |
146 | adapter->if_handle, &adapter->pmac_id); | |
6b7c5b94 SP |
147 | if (!status) |
148 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
149 | ||
150 | return status; | |
151 | } | |
152 | ||
b31c50a7 | 153 | void netdev_stats_update(struct be_adapter *adapter) |
6b7c5b94 SP |
154 | { |
155 | struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va); | |
156 | struct be_rxf_stats *rxf_stats = &hw_stats->rxf; | |
157 | struct be_port_rxf_stats *port_stats = | |
158 | &rxf_stats->port[adapter->port_num]; | |
78122a52 | 159 | struct net_device_stats *dev_stats = &adapter->netdev->stats; |
68110868 | 160 | struct be_erx_stats *erx_stats = &hw_stats->erx; |
6b7c5b94 | 161 | |
91992e44 AK |
162 | dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts; |
163 | dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts; | |
164 | dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes; | |
165 | dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes; | |
6b7c5b94 SP |
166 | |
167 | /* bad pkts received */ | |
168 | dev_stats->rx_errors = port_stats->rx_crc_errors + | |
169 | port_stats->rx_alignment_symbol_errors + | |
170 | port_stats->rx_in_range_errors + | |
68110868 SP |
171 | port_stats->rx_out_range_errors + |
172 | port_stats->rx_frame_too_long + | |
173 | port_stats->rx_dropped_too_small + | |
174 | port_stats->rx_dropped_too_short + | |
175 | port_stats->rx_dropped_header_too_small + | |
176 | port_stats->rx_dropped_tcp_length + | |
177 | port_stats->rx_dropped_runt + | |
178 | port_stats->rx_tcp_checksum_errs + | |
179 | port_stats->rx_ip_checksum_errs + | |
180 | port_stats->rx_udp_checksum_errs; | |
181 | ||
182 | /* no space in linux buffers: best possible approximation */ | |
01ed30da SP |
183 | dev_stats->rx_dropped = |
184 | erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id]; | |
6b7c5b94 SP |
185 | |
186 | /* detailed rx errors */ | |
187 | dev_stats->rx_length_errors = port_stats->rx_in_range_errors + | |
68110868 SP |
188 | port_stats->rx_out_range_errors + |
189 | port_stats->rx_frame_too_long; | |
190 | ||
6b7c5b94 SP |
191 | /* receive ring buffer overflow */ |
192 | dev_stats->rx_over_errors = 0; | |
68110868 | 193 | |
6b7c5b94 SP |
194 | dev_stats->rx_crc_errors = port_stats->rx_crc_errors; |
195 | ||
196 | /* frame alignment errors */ | |
197 | dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors; | |
68110868 | 198 | |
6b7c5b94 SP |
199 | /* receiver fifo overrun */ |
200 | /* drops_no_pbuf is no per i/f, it's per BE card */ | |
201 | dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow + | |
202 | port_stats->rx_input_fifo_overflow + | |
203 | rxf_stats->rx_drops_no_pbuf; | |
204 | /* receiver missed packetd */ | |
205 | dev_stats->rx_missed_errors = 0; | |
68110868 SP |
206 | |
207 | /* packet transmit problems */ | |
208 | dev_stats->tx_errors = 0; | |
209 | ||
210 | /* no space available in linux */ | |
211 | dev_stats->tx_dropped = 0; | |
212 | ||
c5b9b92e | 213 | dev_stats->multicast = port_stats->rx_multicast_frames; |
68110868 SP |
214 | dev_stats->collisions = 0; |
215 | ||
6b7c5b94 SP |
216 | /* detailed tx_errors */ |
217 | dev_stats->tx_aborted_errors = 0; | |
218 | dev_stats->tx_carrier_errors = 0; | |
219 | dev_stats->tx_fifo_errors = 0; | |
220 | dev_stats->tx_heartbeat_errors = 0; | |
221 | dev_stats->tx_window_errors = 0; | |
222 | } | |
223 | ||
8788fdc2 | 224 | void be_link_status_update(struct be_adapter *adapter, bool link_up) |
6b7c5b94 | 225 | { |
6b7c5b94 SP |
226 | struct net_device *netdev = adapter->netdev; |
227 | ||
6b7c5b94 | 228 | /* If link came up or went down */ |
a8f447bd | 229 | if (adapter->link_up != link_up) { |
0dffc83e | 230 | adapter->link_speed = -1; |
a8f447bd | 231 | if (link_up) { |
6b7c5b94 SP |
232 | netif_start_queue(netdev); |
233 | netif_carrier_on(netdev); | |
234 | printk(KERN_INFO "%s: Link up\n", netdev->name); | |
a8f447bd SP |
235 | } else { |
236 | netif_stop_queue(netdev); | |
237 | netif_carrier_off(netdev); | |
238 | printk(KERN_INFO "%s: Link down\n", netdev->name); | |
6b7c5b94 | 239 | } |
a8f447bd | 240 | adapter->link_up = link_up; |
6b7c5b94 | 241 | } |
6b7c5b94 SP |
242 | } |
243 | ||
244 | /* Update the EQ delay n BE based on the RX frags consumed / sec */ | |
245 | static void be_rx_eqd_update(struct be_adapter *adapter) | |
246 | { | |
6b7c5b94 SP |
247 | struct be_eq_obj *rx_eq = &adapter->rx_eq; |
248 | struct be_drvr_stats *stats = &adapter->stats.drvr_stats; | |
4097f663 SP |
249 | ulong now = jiffies; |
250 | u32 eqd; | |
251 | ||
252 | if (!rx_eq->enable_aic) | |
253 | return; | |
254 | ||
255 | /* Wrapped around */ | |
256 | if (time_before(now, stats->rx_fps_jiffies)) { | |
257 | stats->rx_fps_jiffies = now; | |
258 | return; | |
259 | } | |
6b7c5b94 SP |
260 | |
261 | /* Update once a second */ | |
4097f663 | 262 | if ((now - stats->rx_fps_jiffies) < HZ) |
6b7c5b94 SP |
263 | return; |
264 | ||
265 | stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) / | |
4097f663 | 266 | ((now - stats->rx_fps_jiffies) / HZ); |
6b7c5b94 | 267 | |
4097f663 | 268 | stats->rx_fps_jiffies = now; |
6b7c5b94 SP |
269 | stats->be_prev_rx_frags = stats->be_rx_frags; |
270 | eqd = stats->be_rx_fps / 110000; | |
271 | eqd = eqd << 3; | |
272 | if (eqd > rx_eq->max_eqd) | |
273 | eqd = rx_eq->max_eqd; | |
274 | if (eqd < rx_eq->min_eqd) | |
275 | eqd = rx_eq->min_eqd; | |
276 | if (eqd < 10) | |
277 | eqd = 0; | |
278 | if (eqd != rx_eq->cur_eqd) | |
8788fdc2 | 279 | be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd); |
6b7c5b94 SP |
280 | |
281 | rx_eq->cur_eqd = eqd; | |
282 | } | |
283 | ||
6b7c5b94 SP |
284 | static struct net_device_stats *be_get_stats(struct net_device *dev) |
285 | { | |
78122a52 | 286 | return &dev->stats; |
6b7c5b94 SP |
287 | } |
288 | ||
65f71b8b SH |
289 | static u32 be_calc_rate(u64 bytes, unsigned long ticks) |
290 | { | |
291 | u64 rate = bytes; | |
292 | ||
293 | do_div(rate, ticks / HZ); | |
294 | rate <<= 3; /* bytes/sec -> bits/sec */ | |
295 | do_div(rate, 1000000ul); /* MB/Sec */ | |
296 | ||
297 | return rate; | |
298 | } | |
299 | ||
4097f663 SP |
300 | static void be_tx_rate_update(struct be_adapter *adapter) |
301 | { | |
302 | struct be_drvr_stats *stats = drvr_stats(adapter); | |
303 | ulong now = jiffies; | |
304 | ||
305 | /* Wrapped around? */ | |
306 | if (time_before(now, stats->be_tx_jiffies)) { | |
307 | stats->be_tx_jiffies = now; | |
308 | return; | |
309 | } | |
310 | ||
311 | /* Update tx rate once in two seconds */ | |
312 | if ((now - stats->be_tx_jiffies) > 2 * HZ) { | |
65f71b8b SH |
313 | stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes |
314 | - stats->be_tx_bytes_prev, | |
315 | now - stats->be_tx_jiffies); | |
4097f663 SP |
316 | stats->be_tx_jiffies = now; |
317 | stats->be_tx_bytes_prev = stats->be_tx_bytes; | |
318 | } | |
319 | } | |
320 | ||
6b7c5b94 | 321 | static void be_tx_stats_update(struct be_adapter *adapter, |
91992e44 | 322 | u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped) |
6b7c5b94 | 323 | { |
4097f663 | 324 | struct be_drvr_stats *stats = drvr_stats(adapter); |
6b7c5b94 SP |
325 | stats->be_tx_reqs++; |
326 | stats->be_tx_wrbs += wrb_cnt; | |
327 | stats->be_tx_bytes += copied; | |
91992e44 | 328 | stats->be_tx_pkts += (gso_segs ? gso_segs : 1); |
6b7c5b94 SP |
329 | if (stopped) |
330 | stats->be_tx_stops++; | |
6b7c5b94 SP |
331 | } |
332 | ||
333 | /* Determine number of WRB entries needed to xmit data in an skb */ | |
334 | static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy) | |
335 | { | |
ebc8d2ab DM |
336 | int cnt = (skb->len > skb->data_len); |
337 | ||
338 | cnt += skb_shinfo(skb)->nr_frags; | |
339 | ||
6b7c5b94 SP |
340 | /* to account for hdr wrb */ |
341 | cnt++; | |
342 | if (cnt & 1) { | |
343 | /* add a dummy to make it an even num */ | |
344 | cnt++; | |
345 | *dummy = true; | |
346 | } else | |
347 | *dummy = false; | |
348 | BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT); | |
349 | return cnt; | |
350 | } | |
351 | ||
352 | static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len) | |
353 | { | |
354 | wrb->frag_pa_hi = upper_32_bits(addr); | |
355 | wrb->frag_pa_lo = addr & 0xFFFFFFFF; | |
356 | wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK; | |
357 | } | |
358 | ||
359 | static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb, | |
360 | bool vlan, u32 wrb_cnt, u32 len) | |
361 | { | |
362 | memset(hdr, 0, sizeof(*hdr)); | |
363 | ||
364 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1); | |
365 | ||
366 | if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) { | |
367 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1); | |
368 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss, | |
369 | hdr, skb_shinfo(skb)->gso_size); | |
370 | } else if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
371 | if (is_tcp_pkt(skb)) | |
372 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1); | |
373 | else if (is_udp_pkt(skb)) | |
374 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1); | |
375 | } | |
376 | ||
377 | if (vlan && vlan_tx_tag_present(skb)) { | |
378 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1); | |
379 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, | |
380 | hdr, vlan_tx_tag_get(skb)); | |
381 | } | |
382 | ||
383 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1); | |
384 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1); | |
385 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt); | |
386 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len); | |
387 | } | |
388 | ||
389 | ||
390 | static int make_tx_wrbs(struct be_adapter *adapter, | |
391 | struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb) | |
392 | { | |
393 | u64 busaddr; | |
394 | u32 i, copied = 0; | |
395 | struct pci_dev *pdev = adapter->pdev; | |
396 | struct sk_buff *first_skb = skb; | |
397 | struct be_queue_info *txq = &adapter->tx_obj.q; | |
398 | struct be_eth_wrb *wrb; | |
399 | struct be_eth_hdr_wrb *hdr; | |
400 | ||
6b7c5b94 | 401 | hdr = queue_head_node(txq); |
c190e3c8 | 402 | atomic_add(wrb_cnt, &txq->used); |
6b7c5b94 SP |
403 | queue_head_inc(txq); |
404 | ||
ebc8d2ab DM |
405 | if (skb->len > skb->data_len) { |
406 | int len = skb->len - skb->data_len; | |
a73b796e AD |
407 | busaddr = pci_map_single(pdev, skb->data, len, |
408 | PCI_DMA_TODEVICE); | |
ebc8d2ab DM |
409 | wrb = queue_head_node(txq); |
410 | wrb_fill(wrb, busaddr, len); | |
411 | be_dws_cpu_to_le(wrb, sizeof(*wrb)); | |
412 | queue_head_inc(txq); | |
413 | copied += len; | |
414 | } | |
6b7c5b94 | 415 | |
ebc8d2ab DM |
416 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
417 | struct skb_frag_struct *frag = | |
418 | &skb_shinfo(skb)->frags[i]; | |
a73b796e AD |
419 | busaddr = pci_map_page(pdev, frag->page, |
420 | frag->page_offset, | |
421 | frag->size, PCI_DMA_TODEVICE); | |
ebc8d2ab DM |
422 | wrb = queue_head_node(txq); |
423 | wrb_fill(wrb, busaddr, frag->size); | |
424 | be_dws_cpu_to_le(wrb, sizeof(*wrb)); | |
425 | queue_head_inc(txq); | |
426 | copied += frag->size; | |
6b7c5b94 SP |
427 | } |
428 | ||
429 | if (dummy_wrb) { | |
430 | wrb = queue_head_node(txq); | |
431 | wrb_fill(wrb, 0, 0); | |
432 | be_dws_cpu_to_le(wrb, sizeof(*wrb)); | |
433 | queue_head_inc(txq); | |
434 | } | |
435 | ||
436 | wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false, | |
437 | wrb_cnt, copied); | |
438 | be_dws_cpu_to_le(hdr, sizeof(*hdr)); | |
439 | ||
440 | return copied; | |
441 | } | |
442 | ||
61357325 | 443 | static netdev_tx_t be_xmit(struct sk_buff *skb, |
b31c50a7 | 444 | struct net_device *netdev) |
6b7c5b94 SP |
445 | { |
446 | struct be_adapter *adapter = netdev_priv(netdev); | |
447 | struct be_tx_obj *tx_obj = &adapter->tx_obj; | |
448 | struct be_queue_info *txq = &tx_obj->q; | |
449 | u32 wrb_cnt = 0, copied = 0; | |
450 | u32 start = txq->head; | |
451 | bool dummy_wrb, stopped = false; | |
452 | ||
453 | wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb); | |
454 | ||
455 | copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb); | |
c190e3c8 AK |
456 | if (copied) { |
457 | /* record the sent skb in the sent_skb table */ | |
458 | BUG_ON(tx_obj->sent_skb_list[start]); | |
459 | tx_obj->sent_skb_list[start] = skb; | |
460 | ||
461 | /* Ensure txq has space for the next skb; Else stop the queue | |
462 | * *BEFORE* ringing the tx doorbell, so that we serialze the | |
463 | * tx compls of the current transmit which'll wake up the queue | |
464 | */ | |
465 | if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= | |
466 | txq->len) { | |
467 | netif_stop_queue(netdev); | |
468 | stopped = true; | |
469 | } | |
6b7c5b94 | 470 | |
c190e3c8 | 471 | be_txq_notify(adapter, txq->id, wrb_cnt); |
6b7c5b94 | 472 | |
91992e44 AK |
473 | be_tx_stats_update(adapter, wrb_cnt, copied, |
474 | skb_shinfo(skb)->gso_segs, stopped); | |
c190e3c8 AK |
475 | } else { |
476 | txq->head = start; | |
477 | dev_kfree_skb_any(skb); | |
6b7c5b94 | 478 | } |
6b7c5b94 SP |
479 | return NETDEV_TX_OK; |
480 | } | |
481 | ||
482 | static int be_change_mtu(struct net_device *netdev, int new_mtu) | |
483 | { | |
484 | struct be_adapter *adapter = netdev_priv(netdev); | |
485 | if (new_mtu < BE_MIN_MTU || | |
34a89b8c AK |
486 | new_mtu > (BE_MAX_JUMBO_FRAME_SIZE - |
487 | (ETH_HLEN + ETH_FCS_LEN))) { | |
6b7c5b94 SP |
488 | dev_info(&adapter->pdev->dev, |
489 | "MTU must be between %d and %d bytes\n", | |
34a89b8c AK |
490 | BE_MIN_MTU, |
491 | (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN))); | |
6b7c5b94 SP |
492 | return -EINVAL; |
493 | } | |
494 | dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n", | |
495 | netdev->mtu, new_mtu); | |
496 | netdev->mtu = new_mtu; | |
497 | return 0; | |
498 | } | |
499 | ||
500 | /* | |
82903e4b AK |
501 | * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE. |
502 | * If the user configures more, place BE in vlan promiscuous mode. | |
6b7c5b94 | 503 | */ |
b31c50a7 | 504 | static int be_vid_config(struct be_adapter *adapter) |
6b7c5b94 | 505 | { |
6b7c5b94 SP |
506 | u16 vtag[BE_NUM_VLANS_SUPPORTED]; |
507 | u16 ntags = 0, i; | |
82903e4b | 508 | int status = 0; |
6b7c5b94 | 509 | |
82903e4b | 510 | if (adapter->vlans_added <= adapter->max_vlans) { |
6b7c5b94 SP |
511 | /* Construct VLAN Table to give to HW */ |
512 | for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) { | |
513 | if (adapter->vlan_tag[i]) { | |
514 | vtag[ntags] = cpu_to_le16(i); | |
515 | ntags++; | |
516 | } | |
517 | } | |
b31c50a7 SP |
518 | status = be_cmd_vlan_config(adapter, adapter->if_handle, |
519 | vtag, ntags, 1, 0); | |
6b7c5b94 | 520 | } else { |
b31c50a7 SP |
521 | status = be_cmd_vlan_config(adapter, adapter->if_handle, |
522 | NULL, 0, 1, 1); | |
6b7c5b94 | 523 | } |
b31c50a7 | 524 | return status; |
6b7c5b94 SP |
525 | } |
526 | ||
527 | static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp) | |
528 | { | |
529 | struct be_adapter *adapter = netdev_priv(netdev); | |
530 | struct be_eq_obj *rx_eq = &adapter->rx_eq; | |
531 | struct be_eq_obj *tx_eq = &adapter->tx_eq; | |
6b7c5b94 | 532 | |
8788fdc2 SP |
533 | be_eq_notify(adapter, rx_eq->q.id, false, false, 0); |
534 | be_eq_notify(adapter, tx_eq->q.id, false, false, 0); | |
6b7c5b94 | 535 | adapter->vlan_grp = grp; |
8788fdc2 SP |
536 | be_eq_notify(adapter, rx_eq->q.id, true, false, 0); |
537 | be_eq_notify(adapter, tx_eq->q.id, true, false, 0); | |
6b7c5b94 SP |
538 | } |
539 | ||
540 | static void be_vlan_add_vid(struct net_device *netdev, u16 vid) | |
541 | { | |
542 | struct be_adapter *adapter = netdev_priv(netdev); | |
543 | ||
6b7c5b94 | 544 | adapter->vlan_tag[vid] = 1; |
82903e4b AK |
545 | adapter->vlans_added++; |
546 | if (adapter->vlans_added <= (adapter->max_vlans + 1)) | |
547 | be_vid_config(adapter); | |
6b7c5b94 SP |
548 | } |
549 | ||
550 | static void be_vlan_rem_vid(struct net_device *netdev, u16 vid) | |
551 | { | |
552 | struct be_adapter *adapter = netdev_priv(netdev); | |
553 | ||
6b7c5b94 | 554 | adapter->vlan_tag[vid] = 0; |
6b7c5b94 | 555 | vlan_group_set_device(adapter->vlan_grp, vid, NULL); |
82903e4b AK |
556 | adapter->vlans_added--; |
557 | if (adapter->vlans_added <= adapter->max_vlans) | |
558 | be_vid_config(adapter); | |
6b7c5b94 SP |
559 | } |
560 | ||
24307eef | 561 | static void be_set_multicast_list(struct net_device *netdev) |
6b7c5b94 SP |
562 | { |
563 | struct be_adapter *adapter = netdev_priv(netdev); | |
6b7c5b94 | 564 | |
24307eef | 565 | if (netdev->flags & IFF_PROMISC) { |
8788fdc2 | 566 | be_cmd_promiscuous_config(adapter, adapter->port_num, 1); |
24307eef SP |
567 | adapter->promiscuous = true; |
568 | goto done; | |
6b7c5b94 SP |
569 | } |
570 | ||
24307eef SP |
571 | /* BE was previously in promiscous mode; disable it */ |
572 | if (adapter->promiscuous) { | |
573 | adapter->promiscuous = false; | |
8788fdc2 | 574 | be_cmd_promiscuous_config(adapter, adapter->port_num, 0); |
6b7c5b94 SP |
575 | } |
576 | ||
e7b909a6 | 577 | /* Enable multicast promisc if num configured exceeds what we support */ |
4cd24eaf JP |
578 | if (netdev->flags & IFF_ALLMULTI || |
579 | netdev_mc_count(netdev) > BE_MAX_MC) { | |
0ddf477b | 580 | be_cmd_multicast_set(adapter, adapter->if_handle, NULL, |
e7b909a6 | 581 | &adapter->mc_cmd_mem); |
24307eef | 582 | goto done; |
6b7c5b94 | 583 | } |
6b7c5b94 | 584 | |
0ddf477b | 585 | be_cmd_multicast_set(adapter, adapter->if_handle, netdev, |
f31e50a8 | 586 | &adapter->mc_cmd_mem); |
24307eef SP |
587 | done: |
588 | return; | |
6b7c5b94 SP |
589 | } |
590 | ||
4097f663 | 591 | static void be_rx_rate_update(struct be_adapter *adapter) |
6b7c5b94 | 592 | { |
4097f663 SP |
593 | struct be_drvr_stats *stats = drvr_stats(adapter); |
594 | ulong now = jiffies; | |
6b7c5b94 | 595 | |
4097f663 SP |
596 | /* Wrapped around */ |
597 | if (time_before(now, stats->be_rx_jiffies)) { | |
598 | stats->be_rx_jiffies = now; | |
599 | return; | |
600 | } | |
6b7c5b94 SP |
601 | |
602 | /* Update the rate once in two seconds */ | |
4097f663 | 603 | if ((now - stats->be_rx_jiffies) < 2 * HZ) |
6b7c5b94 SP |
604 | return; |
605 | ||
65f71b8b SH |
606 | stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes |
607 | - stats->be_rx_bytes_prev, | |
608 | now - stats->be_rx_jiffies); | |
4097f663 | 609 | stats->be_rx_jiffies = now; |
6b7c5b94 SP |
610 | stats->be_rx_bytes_prev = stats->be_rx_bytes; |
611 | } | |
612 | ||
4097f663 SP |
613 | static void be_rx_stats_update(struct be_adapter *adapter, |
614 | u32 pktsize, u16 numfrags) | |
615 | { | |
616 | struct be_drvr_stats *stats = drvr_stats(adapter); | |
617 | ||
618 | stats->be_rx_compl++; | |
619 | stats->be_rx_frags += numfrags; | |
620 | stats->be_rx_bytes += pktsize; | |
91992e44 | 621 | stats->be_rx_pkts++; |
4097f663 SP |
622 | } |
623 | ||
728a9972 AK |
624 | static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso) |
625 | { | |
626 | u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk; | |
627 | ||
628 | l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp); | |
629 | ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp); | |
630 | ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp); | |
631 | if (ip_version) { | |
632 | tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp); | |
633 | udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp); | |
634 | } | |
635 | ipv6_chk = (ip_version && (tcpf || udpf)); | |
636 | ||
637 | return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true; | |
638 | } | |
639 | ||
6b7c5b94 SP |
640 | static struct be_rx_page_info * |
641 | get_rx_page_info(struct be_adapter *adapter, u16 frag_idx) | |
642 | { | |
643 | struct be_rx_page_info *rx_page_info; | |
644 | struct be_queue_info *rxq = &adapter->rx_obj.q; | |
645 | ||
646 | rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx]; | |
647 | BUG_ON(!rx_page_info->page); | |
648 | ||
205859a2 | 649 | if (rx_page_info->last_page_user) { |
6b7c5b94 SP |
650 | pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus), |
651 | adapter->big_page_size, PCI_DMA_FROMDEVICE); | |
205859a2 AK |
652 | rx_page_info->last_page_user = false; |
653 | } | |
6b7c5b94 SP |
654 | |
655 | atomic_dec(&rxq->used); | |
656 | return rx_page_info; | |
657 | } | |
658 | ||
659 | /* Throwaway the data in the Rx completion */ | |
660 | static void be_rx_compl_discard(struct be_adapter *adapter, | |
661 | struct be_eth_rx_compl *rxcp) | |
662 | { | |
663 | struct be_queue_info *rxq = &adapter->rx_obj.q; | |
664 | struct be_rx_page_info *page_info; | |
665 | u16 rxq_idx, i, num_rcvd; | |
666 | ||
667 | rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp); | |
668 | num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp); | |
669 | ||
670 | for (i = 0; i < num_rcvd; i++) { | |
671 | page_info = get_rx_page_info(adapter, rxq_idx); | |
672 | put_page(page_info->page); | |
673 | memset(page_info, 0, sizeof(*page_info)); | |
674 | index_inc(&rxq_idx, rxq->len); | |
675 | } | |
676 | } | |
677 | ||
678 | /* | |
679 | * skb_fill_rx_data forms a complete skb for an ether frame | |
680 | * indicated by rxcp. | |
681 | */ | |
682 | static void skb_fill_rx_data(struct be_adapter *adapter, | |
89420424 SP |
683 | struct sk_buff *skb, struct be_eth_rx_compl *rxcp, |
684 | u16 num_rcvd) | |
6b7c5b94 SP |
685 | { |
686 | struct be_queue_info *rxq = &adapter->rx_obj.q; | |
687 | struct be_rx_page_info *page_info; | |
89420424 | 688 | u16 rxq_idx, i, j; |
fa77406a | 689 | u32 pktsize, hdr_len, curr_frag_len, size; |
6b7c5b94 SP |
690 | u8 *start; |
691 | ||
692 | rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp); | |
693 | pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp); | |
6b7c5b94 SP |
694 | |
695 | page_info = get_rx_page_info(adapter, rxq_idx); | |
696 | ||
697 | start = page_address(page_info->page) + page_info->page_offset; | |
698 | prefetch(start); | |
699 | ||
700 | /* Copy data in the first descriptor of this completion */ | |
701 | curr_frag_len = min(pktsize, rx_frag_size); | |
702 | ||
703 | /* Copy the header portion into skb_data */ | |
704 | hdr_len = min((u32)BE_HDR_LEN, curr_frag_len); | |
705 | memcpy(skb->data, start, hdr_len); | |
706 | skb->len = curr_frag_len; | |
707 | if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */ | |
708 | /* Complete packet has now been moved to data */ | |
709 | put_page(page_info->page); | |
710 | skb->data_len = 0; | |
711 | skb->tail += curr_frag_len; | |
712 | } else { | |
713 | skb_shinfo(skb)->nr_frags = 1; | |
714 | skb_shinfo(skb)->frags[0].page = page_info->page; | |
715 | skb_shinfo(skb)->frags[0].page_offset = | |
716 | page_info->page_offset + hdr_len; | |
717 | skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len; | |
718 | skb->data_len = curr_frag_len - hdr_len; | |
719 | skb->tail += hdr_len; | |
720 | } | |
205859a2 | 721 | page_info->page = NULL; |
6b7c5b94 SP |
722 | |
723 | if (pktsize <= rx_frag_size) { | |
724 | BUG_ON(num_rcvd != 1); | |
76fbb429 | 725 | goto done; |
6b7c5b94 SP |
726 | } |
727 | ||
728 | /* More frags present for this completion */ | |
fa77406a | 729 | size = pktsize; |
bd46cb6c | 730 | for (i = 1, j = 0; i < num_rcvd; i++) { |
fa77406a | 731 | size -= curr_frag_len; |
6b7c5b94 SP |
732 | index_inc(&rxq_idx, rxq->len); |
733 | page_info = get_rx_page_info(adapter, rxq_idx); | |
734 | ||
fa77406a | 735 | curr_frag_len = min(size, rx_frag_size); |
6b7c5b94 | 736 | |
bd46cb6c AK |
737 | /* Coalesce all frags from the same physical page in one slot */ |
738 | if (page_info->page_offset == 0) { | |
739 | /* Fresh page */ | |
740 | j++; | |
741 | skb_shinfo(skb)->frags[j].page = page_info->page; | |
742 | skb_shinfo(skb)->frags[j].page_offset = | |
743 | page_info->page_offset; | |
744 | skb_shinfo(skb)->frags[j].size = 0; | |
745 | skb_shinfo(skb)->nr_frags++; | |
746 | } else { | |
747 | put_page(page_info->page); | |
748 | } | |
749 | ||
750 | skb_shinfo(skb)->frags[j].size += curr_frag_len; | |
6b7c5b94 SP |
751 | skb->len += curr_frag_len; |
752 | skb->data_len += curr_frag_len; | |
6b7c5b94 | 753 | |
205859a2 | 754 | page_info->page = NULL; |
6b7c5b94 | 755 | } |
bd46cb6c | 756 | BUG_ON(j > MAX_SKB_FRAGS); |
6b7c5b94 | 757 | |
76fbb429 | 758 | done: |
4097f663 | 759 | be_rx_stats_update(adapter, pktsize, num_rcvd); |
6b7c5b94 SP |
760 | return; |
761 | } | |
762 | ||
5be93b9a | 763 | /* Process the RX completion indicated by rxcp when GRO is disabled */ |
6b7c5b94 SP |
764 | static void be_rx_compl_process(struct be_adapter *adapter, |
765 | struct be_eth_rx_compl *rxcp) | |
766 | { | |
767 | struct sk_buff *skb; | |
dcb9b564 | 768 | u32 vlanf, vid; |
89420424 | 769 | u16 num_rcvd; |
dcb9b564 | 770 | u8 vtm; |
6b7c5b94 | 771 | |
89420424 SP |
772 | num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp); |
773 | /* Is it a flush compl that has no data */ | |
774 | if (unlikely(num_rcvd == 0)) | |
775 | return; | |
776 | ||
89d71a66 | 777 | skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN); |
a058a632 | 778 | if (unlikely(!skb)) { |
6b7c5b94 SP |
779 | if (net_ratelimit()) |
780 | dev_warn(&adapter->pdev->dev, "skb alloc failed\n"); | |
781 | be_rx_compl_discard(adapter, rxcp); | |
782 | return; | |
783 | } | |
784 | ||
89420424 | 785 | skb_fill_rx_data(adapter, skb, rxcp, num_rcvd); |
6b7c5b94 | 786 | |
728a9972 | 787 | if (do_pkt_csum(rxcp, adapter->rx_csum)) |
6b7c5b94 | 788 | skb->ip_summed = CHECKSUM_NONE; |
728a9972 AK |
789 | else |
790 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
6b7c5b94 SP |
791 | |
792 | skb->truesize = skb->len + sizeof(struct sk_buff); | |
793 | skb->protocol = eth_type_trans(skb, adapter->netdev); | |
794 | skb->dev = adapter->netdev; | |
795 | ||
a058a632 SP |
796 | vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp); |
797 | vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp); | |
798 | ||
799 | /* vlanf could be wrongly set in some cards. | |
800 | * ignore if vtm is not set */ | |
801 | if ((adapter->cap & 0x400) && !vtm) | |
802 | vlanf = 0; | |
803 | ||
804 | if (unlikely(vlanf)) { | |
82903e4b | 805 | if (!adapter->vlan_grp || adapter->vlans_added == 0) { |
6b7c5b94 SP |
806 | kfree_skb(skb); |
807 | return; | |
808 | } | |
809 | vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp); | |
810 | vid = be16_to_cpu(vid); | |
811 | vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid); | |
812 | } else { | |
813 | netif_receive_skb(skb); | |
814 | } | |
815 | ||
6b7c5b94 SP |
816 | return; |
817 | } | |
818 | ||
5be93b9a AK |
819 | /* Process the RX completion indicated by rxcp when GRO is enabled */ |
820 | static void be_rx_compl_process_gro(struct be_adapter *adapter, | |
6b7c5b94 SP |
821 | struct be_eth_rx_compl *rxcp) |
822 | { | |
823 | struct be_rx_page_info *page_info; | |
5be93b9a | 824 | struct sk_buff *skb = NULL; |
6b7c5b94 | 825 | struct be_queue_info *rxq = &adapter->rx_obj.q; |
5be93b9a | 826 | struct be_eq_obj *eq_obj = &adapter->rx_eq; |
6b7c5b94 | 827 | u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len; |
bd46cb6c | 828 | u16 i, rxq_idx = 0, vid, j; |
dcb9b564 | 829 | u8 vtm; |
6b7c5b94 SP |
830 | |
831 | num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp); | |
89420424 SP |
832 | /* Is it a flush compl that has no data */ |
833 | if (unlikely(num_rcvd == 0)) | |
834 | return; | |
835 | ||
6b7c5b94 SP |
836 | pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp); |
837 | vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp); | |
838 | rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp); | |
dcb9b564 AK |
839 | vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp); |
840 | ||
841 | /* vlanf could be wrongly set in some cards. | |
842 | * ignore if vtm is not set */ | |
e1187b3b | 843 | if ((adapter->cap & 0x400) && !vtm) |
dcb9b564 | 844 | vlanf = 0; |
6b7c5b94 | 845 | |
5be93b9a AK |
846 | skb = napi_get_frags(&eq_obj->napi); |
847 | if (!skb) { | |
848 | be_rx_compl_discard(adapter, rxcp); | |
849 | return; | |
850 | } | |
851 | ||
6b7c5b94 | 852 | remaining = pkt_size; |
bd46cb6c | 853 | for (i = 0, j = -1; i < num_rcvd; i++) { |
6b7c5b94 SP |
854 | page_info = get_rx_page_info(adapter, rxq_idx); |
855 | ||
856 | curr_frag_len = min(remaining, rx_frag_size); | |
857 | ||
bd46cb6c AK |
858 | /* Coalesce all frags from the same physical page in one slot */ |
859 | if (i == 0 || page_info->page_offset == 0) { | |
860 | /* First frag or Fresh page */ | |
861 | j++; | |
5be93b9a AK |
862 | skb_shinfo(skb)->frags[j].page = page_info->page; |
863 | skb_shinfo(skb)->frags[j].page_offset = | |
864 | page_info->page_offset; | |
865 | skb_shinfo(skb)->frags[j].size = 0; | |
bd46cb6c AK |
866 | } else { |
867 | put_page(page_info->page); | |
868 | } | |
5be93b9a | 869 | skb_shinfo(skb)->frags[j].size += curr_frag_len; |
6b7c5b94 | 870 | |
bd46cb6c | 871 | remaining -= curr_frag_len; |
6b7c5b94 | 872 | index_inc(&rxq_idx, rxq->len); |
6b7c5b94 SP |
873 | memset(page_info, 0, sizeof(*page_info)); |
874 | } | |
bd46cb6c | 875 | BUG_ON(j > MAX_SKB_FRAGS); |
6b7c5b94 | 876 | |
5be93b9a AK |
877 | skb_shinfo(skb)->nr_frags = j + 1; |
878 | skb->len = pkt_size; | |
879 | skb->data_len = pkt_size; | |
880 | skb->truesize += pkt_size; | |
881 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
882 | ||
6b7c5b94 | 883 | if (likely(!vlanf)) { |
5be93b9a | 884 | napi_gro_frags(&eq_obj->napi); |
6b7c5b94 SP |
885 | } else { |
886 | vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp); | |
887 | vid = be16_to_cpu(vid); | |
888 | ||
82903e4b | 889 | if (!adapter->vlan_grp || adapter->vlans_added == 0) |
6b7c5b94 SP |
890 | return; |
891 | ||
5be93b9a | 892 | vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid); |
6b7c5b94 SP |
893 | } |
894 | ||
4097f663 | 895 | be_rx_stats_update(adapter, pkt_size, num_rcvd); |
6b7c5b94 SP |
896 | return; |
897 | } | |
898 | ||
899 | static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter) | |
900 | { | |
901 | struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq); | |
902 | ||
903 | if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0) | |
904 | return NULL; | |
905 | ||
906 | be_dws_le_to_cpu(rxcp, sizeof(*rxcp)); | |
907 | ||
6b7c5b94 SP |
908 | queue_tail_inc(&adapter->rx_obj.cq); |
909 | return rxcp; | |
910 | } | |
911 | ||
a7a0ef31 SP |
912 | /* To reset the valid bit, we need to reset the whole word as |
913 | * when walking the queue the valid entries are little-endian | |
914 | * and invalid entries are host endian | |
915 | */ | |
916 | static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp) | |
917 | { | |
918 | rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0; | |
919 | } | |
920 | ||
6b7c5b94 SP |
921 | static inline struct page *be_alloc_pages(u32 size) |
922 | { | |
923 | gfp_t alloc_flags = GFP_ATOMIC; | |
924 | u32 order = get_order(size); | |
925 | if (order > 0) | |
926 | alloc_flags |= __GFP_COMP; | |
927 | return alloc_pages(alloc_flags, order); | |
928 | } | |
929 | ||
930 | /* | |
931 | * Allocate a page, split it to fragments of size rx_frag_size and post as | |
932 | * receive buffers to BE | |
933 | */ | |
934 | static void be_post_rx_frags(struct be_adapter *adapter) | |
935 | { | |
936 | struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl; | |
26d92f92 | 937 | struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL; |
6b7c5b94 SP |
938 | struct be_queue_info *rxq = &adapter->rx_obj.q; |
939 | struct page *pagep = NULL; | |
940 | struct be_eth_rx_d *rxd; | |
941 | u64 page_dmaaddr = 0, frag_dmaaddr; | |
942 | u32 posted, page_offset = 0; | |
943 | ||
6b7c5b94 SP |
944 | page_info = &page_info_tbl[rxq->head]; |
945 | for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) { | |
946 | if (!pagep) { | |
947 | pagep = be_alloc_pages(adapter->big_page_size); | |
948 | if (unlikely(!pagep)) { | |
949 | drvr_stats(adapter)->be_ethrx_post_fail++; | |
950 | break; | |
951 | } | |
952 | page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0, | |
953 | adapter->big_page_size, | |
954 | PCI_DMA_FROMDEVICE); | |
955 | page_info->page_offset = 0; | |
956 | } else { | |
957 | get_page(pagep); | |
958 | page_info->page_offset = page_offset + rx_frag_size; | |
959 | } | |
960 | page_offset = page_info->page_offset; | |
961 | page_info->page = pagep; | |
962 | pci_unmap_addr_set(page_info, bus, page_dmaaddr); | |
963 | frag_dmaaddr = page_dmaaddr + page_info->page_offset; | |
964 | ||
965 | rxd = queue_head_node(rxq); | |
966 | rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF); | |
967 | rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr)); | |
6b7c5b94 SP |
968 | |
969 | /* Any space left in the current big page for another frag? */ | |
970 | if ((page_offset + rx_frag_size + rx_frag_size) > | |
971 | adapter->big_page_size) { | |
972 | pagep = NULL; | |
973 | page_info->last_page_user = true; | |
974 | } | |
26d92f92 SP |
975 | |
976 | prev_page_info = page_info; | |
977 | queue_head_inc(rxq); | |
6b7c5b94 SP |
978 | page_info = &page_info_tbl[rxq->head]; |
979 | } | |
980 | if (pagep) | |
26d92f92 | 981 | prev_page_info->last_page_user = true; |
6b7c5b94 SP |
982 | |
983 | if (posted) { | |
6b7c5b94 | 984 | atomic_add(posted, &rxq->used); |
8788fdc2 | 985 | be_rxq_notify(adapter, rxq->id, posted); |
ea1dae11 SP |
986 | } else if (atomic_read(&rxq->used) == 0) { |
987 | /* Let be_worker replenish when memory is available */ | |
988 | adapter->rx_post_starved = true; | |
6b7c5b94 SP |
989 | } |
990 | ||
991 | return; | |
992 | } | |
993 | ||
5fb379ee | 994 | static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq) |
6b7c5b94 | 995 | { |
6b7c5b94 SP |
996 | struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq); |
997 | ||
998 | if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0) | |
999 | return NULL; | |
1000 | ||
1001 | be_dws_le_to_cpu(txcp, sizeof(*txcp)); | |
1002 | ||
1003 | txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0; | |
1004 | ||
1005 | queue_tail_inc(tx_cq); | |
1006 | return txcp; | |
1007 | } | |
1008 | ||
1009 | static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index) | |
1010 | { | |
1011 | struct be_queue_info *txq = &adapter->tx_obj.q; | |
a73b796e | 1012 | struct be_eth_wrb *wrb; |
6b7c5b94 SP |
1013 | struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list; |
1014 | struct sk_buff *sent_skb; | |
a73b796e | 1015 | u64 busaddr; |
6b7c5b94 SP |
1016 | u16 cur_index, num_wrbs = 0; |
1017 | ||
1018 | cur_index = txq->tail; | |
1019 | sent_skb = sent_skbs[cur_index]; | |
1020 | BUG_ON(!sent_skb); | |
1021 | sent_skbs[cur_index] = NULL; | |
a73b796e AD |
1022 | wrb = queue_tail_node(txq); |
1023 | be_dws_le_to_cpu(wrb, sizeof(*wrb)); | |
1024 | busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo; | |
1025 | if (busaddr != 0) { | |
1026 | pci_unmap_single(adapter->pdev, busaddr, | |
1027 | wrb->frag_len, PCI_DMA_TODEVICE); | |
1028 | } | |
1029 | num_wrbs++; | |
1030 | queue_tail_inc(txq); | |
6b7c5b94 | 1031 | |
a73b796e | 1032 | while (cur_index != last_index) { |
6b7c5b94 | 1033 | cur_index = txq->tail; |
a73b796e AD |
1034 | wrb = queue_tail_node(txq); |
1035 | be_dws_le_to_cpu(wrb, sizeof(*wrb)); | |
1036 | busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo; | |
1037 | if (busaddr != 0) { | |
1038 | pci_unmap_page(adapter->pdev, busaddr, | |
1039 | wrb->frag_len, PCI_DMA_TODEVICE); | |
1040 | } | |
6b7c5b94 SP |
1041 | num_wrbs++; |
1042 | queue_tail_inc(txq); | |
a73b796e | 1043 | } |
6b7c5b94 SP |
1044 | |
1045 | atomic_sub(num_wrbs, &txq->used); | |
a73b796e | 1046 | |
6b7c5b94 SP |
1047 | kfree_skb(sent_skb); |
1048 | } | |
1049 | ||
859b1e4e SP |
1050 | static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj) |
1051 | { | |
1052 | struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q); | |
1053 | ||
1054 | if (!eqe->evt) | |
1055 | return NULL; | |
1056 | ||
1057 | eqe->evt = le32_to_cpu(eqe->evt); | |
1058 | queue_tail_inc(&eq_obj->q); | |
1059 | return eqe; | |
1060 | } | |
1061 | ||
1062 | static int event_handle(struct be_adapter *adapter, | |
1063 | struct be_eq_obj *eq_obj) | |
1064 | { | |
1065 | struct be_eq_entry *eqe; | |
1066 | u16 num = 0; | |
1067 | ||
1068 | while ((eqe = event_get(eq_obj)) != NULL) { | |
1069 | eqe->evt = 0; | |
1070 | num++; | |
1071 | } | |
1072 | ||
1073 | /* Deal with any spurious interrupts that come | |
1074 | * without events | |
1075 | */ | |
1076 | be_eq_notify(adapter, eq_obj->q.id, true, true, num); | |
1077 | if (num) | |
1078 | napi_schedule(&eq_obj->napi); | |
1079 | ||
1080 | return num; | |
1081 | } | |
1082 | ||
1083 | /* Just read and notify events without processing them. | |
1084 | * Used at the time of destroying event queues */ | |
1085 | static void be_eq_clean(struct be_adapter *adapter, | |
1086 | struct be_eq_obj *eq_obj) | |
1087 | { | |
1088 | struct be_eq_entry *eqe; | |
1089 | u16 num = 0; | |
1090 | ||
1091 | while ((eqe = event_get(eq_obj)) != NULL) { | |
1092 | eqe->evt = 0; | |
1093 | num++; | |
1094 | } | |
1095 | ||
1096 | if (num) | |
1097 | be_eq_notify(adapter, eq_obj->q.id, false, true, num); | |
1098 | } | |
1099 | ||
6b7c5b94 SP |
1100 | static void be_rx_q_clean(struct be_adapter *adapter) |
1101 | { | |
1102 | struct be_rx_page_info *page_info; | |
1103 | struct be_queue_info *rxq = &adapter->rx_obj.q; | |
1104 | struct be_queue_info *rx_cq = &adapter->rx_obj.cq; | |
1105 | struct be_eth_rx_compl *rxcp; | |
1106 | u16 tail; | |
1107 | ||
1108 | /* First cleanup pending rx completions */ | |
1109 | while ((rxcp = be_rx_compl_get(adapter)) != NULL) { | |
1110 | be_rx_compl_discard(adapter, rxcp); | |
a7a0ef31 | 1111 | be_rx_compl_reset(rxcp); |
8788fdc2 | 1112 | be_cq_notify(adapter, rx_cq->id, true, 1); |
6b7c5b94 SP |
1113 | } |
1114 | ||
1115 | /* Then free posted rx buffer that were not used */ | |
1116 | tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len; | |
cdab23b7 | 1117 | for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) { |
6b7c5b94 SP |
1118 | page_info = get_rx_page_info(adapter, tail); |
1119 | put_page(page_info->page); | |
1120 | memset(page_info, 0, sizeof(*page_info)); | |
1121 | } | |
1122 | BUG_ON(atomic_read(&rxq->used)); | |
1123 | } | |
1124 | ||
a8e9179a | 1125 | static void be_tx_compl_clean(struct be_adapter *adapter) |
6b7c5b94 | 1126 | { |
a8e9179a | 1127 | struct be_queue_info *tx_cq = &adapter->tx_obj.cq; |
6b7c5b94 | 1128 | struct be_queue_info *txq = &adapter->tx_obj.q; |
a8e9179a SP |
1129 | struct be_eth_tx_compl *txcp; |
1130 | u16 end_idx, cmpl = 0, timeo = 0; | |
b03388d6 SP |
1131 | struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list; |
1132 | struct sk_buff *sent_skb; | |
1133 | bool dummy_wrb; | |
a8e9179a SP |
1134 | |
1135 | /* Wait for a max of 200ms for all the tx-completions to arrive. */ | |
1136 | do { | |
1137 | while ((txcp = be_tx_compl_get(tx_cq))) { | |
1138 | end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl, | |
1139 | wrb_index, txcp); | |
1140 | be_tx_compl_process(adapter, end_idx); | |
1141 | cmpl++; | |
1142 | } | |
1143 | if (cmpl) { | |
1144 | be_cq_notify(adapter, tx_cq->id, false, cmpl); | |
1145 | cmpl = 0; | |
1146 | } | |
1147 | ||
1148 | if (atomic_read(&txq->used) == 0 || ++timeo > 200) | |
1149 | break; | |
1150 | ||
1151 | mdelay(1); | |
1152 | } while (true); | |
1153 | ||
1154 | if (atomic_read(&txq->used)) | |
1155 | dev_err(&adapter->pdev->dev, "%d pending tx-completions\n", | |
1156 | atomic_read(&txq->used)); | |
b03388d6 SP |
1157 | |
1158 | /* free posted tx for which compls will never arrive */ | |
1159 | while (atomic_read(&txq->used)) { | |
1160 | sent_skb = sent_skbs[txq->tail]; | |
1161 | end_idx = txq->tail; | |
1162 | index_adv(&end_idx, | |
1163 | wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len); | |
1164 | be_tx_compl_process(adapter, end_idx); | |
1165 | } | |
6b7c5b94 SP |
1166 | } |
1167 | ||
5fb379ee SP |
1168 | static void be_mcc_queues_destroy(struct be_adapter *adapter) |
1169 | { | |
1170 | struct be_queue_info *q; | |
5fb379ee | 1171 | |
8788fdc2 | 1172 | q = &adapter->mcc_obj.q; |
5fb379ee | 1173 | if (q->created) |
8788fdc2 | 1174 | be_cmd_q_destroy(adapter, q, QTYPE_MCCQ); |
5fb379ee SP |
1175 | be_queue_free(adapter, q); |
1176 | ||
8788fdc2 | 1177 | q = &adapter->mcc_obj.cq; |
5fb379ee | 1178 | if (q->created) |
8788fdc2 | 1179 | be_cmd_q_destroy(adapter, q, QTYPE_CQ); |
5fb379ee SP |
1180 | be_queue_free(adapter, q); |
1181 | } | |
1182 | ||
1183 | /* Must be called only after TX qs are created as MCC shares TX EQ */ | |
1184 | static int be_mcc_queues_create(struct be_adapter *adapter) | |
1185 | { | |
1186 | struct be_queue_info *q, *cq; | |
5fb379ee SP |
1187 | |
1188 | /* Alloc MCC compl queue */ | |
8788fdc2 | 1189 | cq = &adapter->mcc_obj.cq; |
5fb379ee | 1190 | if (be_queue_alloc(adapter, cq, MCC_CQ_LEN, |
efd2e40a | 1191 | sizeof(struct be_mcc_compl))) |
5fb379ee SP |
1192 | goto err; |
1193 | ||
1194 | /* Ask BE to create MCC compl queue; share TX's eq */ | |
8788fdc2 | 1195 | if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0)) |
5fb379ee SP |
1196 | goto mcc_cq_free; |
1197 | ||
1198 | /* Alloc MCC queue */ | |
8788fdc2 | 1199 | q = &adapter->mcc_obj.q; |
5fb379ee SP |
1200 | if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb))) |
1201 | goto mcc_cq_destroy; | |
1202 | ||
1203 | /* Ask BE to create MCC queue */ | |
8788fdc2 | 1204 | if (be_cmd_mccq_create(adapter, q, cq)) |
5fb379ee SP |
1205 | goto mcc_q_free; |
1206 | ||
1207 | return 0; | |
1208 | ||
1209 | mcc_q_free: | |
1210 | be_queue_free(adapter, q); | |
1211 | mcc_cq_destroy: | |
8788fdc2 | 1212 | be_cmd_q_destroy(adapter, cq, QTYPE_CQ); |
5fb379ee SP |
1213 | mcc_cq_free: |
1214 | be_queue_free(adapter, cq); | |
1215 | err: | |
1216 | return -1; | |
1217 | } | |
1218 | ||
6b7c5b94 SP |
1219 | static void be_tx_queues_destroy(struct be_adapter *adapter) |
1220 | { | |
1221 | struct be_queue_info *q; | |
1222 | ||
1223 | q = &adapter->tx_obj.q; | |
a8e9179a | 1224 | if (q->created) |
8788fdc2 | 1225 | be_cmd_q_destroy(adapter, q, QTYPE_TXQ); |
6b7c5b94 SP |
1226 | be_queue_free(adapter, q); |
1227 | ||
1228 | q = &adapter->tx_obj.cq; | |
1229 | if (q->created) | |
8788fdc2 | 1230 | be_cmd_q_destroy(adapter, q, QTYPE_CQ); |
6b7c5b94 SP |
1231 | be_queue_free(adapter, q); |
1232 | ||
859b1e4e SP |
1233 | /* Clear any residual events */ |
1234 | be_eq_clean(adapter, &adapter->tx_eq); | |
1235 | ||
6b7c5b94 SP |
1236 | q = &adapter->tx_eq.q; |
1237 | if (q->created) | |
8788fdc2 | 1238 | be_cmd_q_destroy(adapter, q, QTYPE_EQ); |
6b7c5b94 SP |
1239 | be_queue_free(adapter, q); |
1240 | } | |
1241 | ||
1242 | static int be_tx_queues_create(struct be_adapter *adapter) | |
1243 | { | |
1244 | struct be_queue_info *eq, *q, *cq; | |
1245 | ||
1246 | adapter->tx_eq.max_eqd = 0; | |
1247 | adapter->tx_eq.min_eqd = 0; | |
1248 | adapter->tx_eq.cur_eqd = 96; | |
1249 | adapter->tx_eq.enable_aic = false; | |
1250 | /* Alloc Tx Event queue */ | |
1251 | eq = &adapter->tx_eq.q; | |
1252 | if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry))) | |
1253 | return -1; | |
1254 | ||
1255 | /* Ask BE to create Tx Event queue */ | |
8788fdc2 | 1256 | if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd)) |
6b7c5b94 SP |
1257 | goto tx_eq_free; |
1258 | /* Alloc TX eth compl queue */ | |
1259 | cq = &adapter->tx_obj.cq; | |
1260 | if (be_queue_alloc(adapter, cq, TX_CQ_LEN, | |
1261 | sizeof(struct be_eth_tx_compl))) | |
1262 | goto tx_eq_destroy; | |
1263 | ||
1264 | /* Ask BE to create Tx eth compl queue */ | |
8788fdc2 | 1265 | if (be_cmd_cq_create(adapter, cq, eq, false, false, 3)) |
6b7c5b94 SP |
1266 | goto tx_cq_free; |
1267 | ||
1268 | /* Alloc TX eth queue */ | |
1269 | q = &adapter->tx_obj.q; | |
1270 | if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb))) | |
1271 | goto tx_cq_destroy; | |
1272 | ||
1273 | /* Ask BE to create Tx eth queue */ | |
8788fdc2 | 1274 | if (be_cmd_txq_create(adapter, q, cq)) |
6b7c5b94 SP |
1275 | goto tx_q_free; |
1276 | return 0; | |
1277 | ||
1278 | tx_q_free: | |
1279 | be_queue_free(adapter, q); | |
1280 | tx_cq_destroy: | |
8788fdc2 | 1281 | be_cmd_q_destroy(adapter, cq, QTYPE_CQ); |
6b7c5b94 SP |
1282 | tx_cq_free: |
1283 | be_queue_free(adapter, cq); | |
1284 | tx_eq_destroy: | |
8788fdc2 | 1285 | be_cmd_q_destroy(adapter, eq, QTYPE_EQ); |
6b7c5b94 SP |
1286 | tx_eq_free: |
1287 | be_queue_free(adapter, eq); | |
1288 | return -1; | |
1289 | } | |
1290 | ||
1291 | static void be_rx_queues_destroy(struct be_adapter *adapter) | |
1292 | { | |
1293 | struct be_queue_info *q; | |
1294 | ||
1295 | q = &adapter->rx_obj.q; | |
1296 | if (q->created) { | |
8788fdc2 | 1297 | be_cmd_q_destroy(adapter, q, QTYPE_RXQ); |
89420424 SP |
1298 | |
1299 | /* After the rxq is invalidated, wait for a grace time | |
1300 | * of 1ms for all dma to end and the flush compl to arrive | |
1301 | */ | |
1302 | mdelay(1); | |
6b7c5b94 SP |
1303 | be_rx_q_clean(adapter); |
1304 | } | |
1305 | be_queue_free(adapter, q); | |
1306 | ||
1307 | q = &adapter->rx_obj.cq; | |
1308 | if (q->created) | |
8788fdc2 | 1309 | be_cmd_q_destroy(adapter, q, QTYPE_CQ); |
6b7c5b94 SP |
1310 | be_queue_free(adapter, q); |
1311 | ||
859b1e4e SP |
1312 | /* Clear any residual events */ |
1313 | be_eq_clean(adapter, &adapter->rx_eq); | |
1314 | ||
6b7c5b94 SP |
1315 | q = &adapter->rx_eq.q; |
1316 | if (q->created) | |
8788fdc2 | 1317 | be_cmd_q_destroy(adapter, q, QTYPE_EQ); |
6b7c5b94 SP |
1318 | be_queue_free(adapter, q); |
1319 | } | |
1320 | ||
1321 | static int be_rx_queues_create(struct be_adapter *adapter) | |
1322 | { | |
1323 | struct be_queue_info *eq, *q, *cq; | |
1324 | int rc; | |
1325 | ||
6b7c5b94 SP |
1326 | adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE; |
1327 | adapter->rx_eq.max_eqd = BE_MAX_EQD; | |
1328 | adapter->rx_eq.min_eqd = 0; | |
1329 | adapter->rx_eq.cur_eqd = 0; | |
1330 | adapter->rx_eq.enable_aic = true; | |
1331 | ||
1332 | /* Alloc Rx Event queue */ | |
1333 | eq = &adapter->rx_eq.q; | |
1334 | rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN, | |
1335 | sizeof(struct be_eq_entry)); | |
1336 | if (rc) | |
1337 | return rc; | |
1338 | ||
1339 | /* Ask BE to create Rx Event queue */ | |
8788fdc2 | 1340 | rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd); |
6b7c5b94 SP |
1341 | if (rc) |
1342 | goto rx_eq_free; | |
1343 | ||
1344 | /* Alloc RX eth compl queue */ | |
1345 | cq = &adapter->rx_obj.cq; | |
1346 | rc = be_queue_alloc(adapter, cq, RX_CQ_LEN, | |
1347 | sizeof(struct be_eth_rx_compl)); | |
1348 | if (rc) | |
1349 | goto rx_eq_destroy; | |
1350 | ||
1351 | /* Ask BE to create Rx eth compl queue */ | |
8788fdc2 | 1352 | rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3); |
6b7c5b94 SP |
1353 | if (rc) |
1354 | goto rx_cq_free; | |
1355 | ||
1356 | /* Alloc RX eth queue */ | |
1357 | q = &adapter->rx_obj.q; | |
1358 | rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d)); | |
1359 | if (rc) | |
1360 | goto rx_cq_destroy; | |
1361 | ||
1362 | /* Ask BE to create Rx eth queue */ | |
8788fdc2 | 1363 | rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size, |
6b7c5b94 SP |
1364 | BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false); |
1365 | if (rc) | |
1366 | goto rx_q_free; | |
1367 | ||
1368 | return 0; | |
1369 | rx_q_free: | |
1370 | be_queue_free(adapter, q); | |
1371 | rx_cq_destroy: | |
8788fdc2 | 1372 | be_cmd_q_destroy(adapter, cq, QTYPE_CQ); |
6b7c5b94 SP |
1373 | rx_cq_free: |
1374 | be_queue_free(adapter, cq); | |
1375 | rx_eq_destroy: | |
8788fdc2 | 1376 | be_cmd_q_destroy(adapter, eq, QTYPE_EQ); |
6b7c5b94 SP |
1377 | rx_eq_free: |
1378 | be_queue_free(adapter, eq); | |
1379 | return rc; | |
1380 | } | |
6b7c5b94 | 1381 | |
b628bde2 SP |
1382 | /* There are 8 evt ids per func. Retruns the evt id's bit number */ |
1383 | static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id) | |
1384 | { | |
500ca9ba | 1385 | return eq_id % 8; |
b628bde2 SP |
1386 | } |
1387 | ||
6b7c5b94 SP |
1388 | static irqreturn_t be_intx(int irq, void *dev) |
1389 | { | |
1390 | struct be_adapter *adapter = dev; | |
8788fdc2 | 1391 | int isr; |
6b7c5b94 | 1392 | |
8788fdc2 | 1393 | isr = ioread32(adapter->csr + CEV_ISR0_OFFSET + |
55bdeed9 | 1394 | (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE); |
c001c213 | 1395 | if (!isr) |
8788fdc2 | 1396 | return IRQ_NONE; |
6b7c5b94 | 1397 | |
8788fdc2 SP |
1398 | event_handle(adapter, &adapter->tx_eq); |
1399 | event_handle(adapter, &adapter->rx_eq); | |
c001c213 | 1400 | |
8788fdc2 | 1401 | return IRQ_HANDLED; |
6b7c5b94 SP |
1402 | } |
1403 | ||
1404 | static irqreturn_t be_msix_rx(int irq, void *dev) | |
1405 | { | |
1406 | struct be_adapter *adapter = dev; | |
1407 | ||
8788fdc2 | 1408 | event_handle(adapter, &adapter->rx_eq); |
6b7c5b94 SP |
1409 | |
1410 | return IRQ_HANDLED; | |
1411 | } | |
1412 | ||
5fb379ee | 1413 | static irqreturn_t be_msix_tx_mcc(int irq, void *dev) |
6b7c5b94 SP |
1414 | { |
1415 | struct be_adapter *adapter = dev; | |
1416 | ||
8788fdc2 | 1417 | event_handle(adapter, &adapter->tx_eq); |
6b7c5b94 SP |
1418 | |
1419 | return IRQ_HANDLED; | |
1420 | } | |
1421 | ||
5be93b9a | 1422 | static inline bool do_gro(struct be_adapter *adapter, |
6b7c5b94 SP |
1423 | struct be_eth_rx_compl *rxcp) |
1424 | { | |
1425 | int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp); | |
1426 | int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp); | |
1427 | ||
1428 | if (err) | |
1429 | drvr_stats(adapter)->be_rxcp_err++; | |
1430 | ||
5be93b9a | 1431 | return (tcp_frame && !err) ? true : false; |
6b7c5b94 SP |
1432 | } |
1433 | ||
1434 | int be_poll_rx(struct napi_struct *napi, int budget) | |
1435 | { | |
1436 | struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi); | |
1437 | struct be_adapter *adapter = | |
1438 | container_of(rx_eq, struct be_adapter, rx_eq); | |
1439 | struct be_queue_info *rx_cq = &adapter->rx_obj.cq; | |
1440 | struct be_eth_rx_compl *rxcp; | |
1441 | u32 work_done; | |
1442 | ||
b7b83ac3 | 1443 | adapter->stats.drvr_stats.be_rx_polls++; |
6b7c5b94 SP |
1444 | for (work_done = 0; work_done < budget; work_done++) { |
1445 | rxcp = be_rx_compl_get(adapter); | |
1446 | if (!rxcp) | |
1447 | break; | |
1448 | ||
5be93b9a AK |
1449 | if (do_gro(adapter, rxcp)) |
1450 | be_rx_compl_process_gro(adapter, rxcp); | |
6b7c5b94 SP |
1451 | else |
1452 | be_rx_compl_process(adapter, rxcp); | |
a7a0ef31 SP |
1453 | |
1454 | be_rx_compl_reset(rxcp); | |
6b7c5b94 SP |
1455 | } |
1456 | ||
6b7c5b94 SP |
1457 | /* Refill the queue */ |
1458 | if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM) | |
1459 | be_post_rx_frags(adapter); | |
1460 | ||
1461 | /* All consumed */ | |
1462 | if (work_done < budget) { | |
1463 | napi_complete(napi); | |
8788fdc2 | 1464 | be_cq_notify(adapter, rx_cq->id, true, work_done); |
6b7c5b94 SP |
1465 | } else { |
1466 | /* More to be consumed; continue with interrupts disabled */ | |
8788fdc2 | 1467 | be_cq_notify(adapter, rx_cq->id, false, work_done); |
6b7c5b94 SP |
1468 | } |
1469 | return work_done; | |
1470 | } | |
1471 | ||
f31e50a8 SP |
1472 | /* As TX and MCC share the same EQ check for both TX and MCC completions. |
1473 | * For TX/MCC we don't honour budget; consume everything | |
1474 | */ | |
1475 | static int be_poll_tx_mcc(struct napi_struct *napi, int budget) | |
6b7c5b94 | 1476 | { |
f31e50a8 SP |
1477 | struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi); |
1478 | struct be_adapter *adapter = | |
1479 | container_of(tx_eq, struct be_adapter, tx_eq); | |
5fb379ee SP |
1480 | struct be_queue_info *txq = &adapter->tx_obj.q; |
1481 | struct be_queue_info *tx_cq = &adapter->tx_obj.cq; | |
6b7c5b94 | 1482 | struct be_eth_tx_compl *txcp; |
f31e50a8 | 1483 | int tx_compl = 0, mcc_compl, status = 0; |
6b7c5b94 SP |
1484 | u16 end_idx; |
1485 | ||
5fb379ee | 1486 | while ((txcp = be_tx_compl_get(tx_cq))) { |
6b7c5b94 | 1487 | end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl, |
f31e50a8 | 1488 | wrb_index, txcp); |
6b7c5b94 | 1489 | be_tx_compl_process(adapter, end_idx); |
f31e50a8 | 1490 | tx_compl++; |
6b7c5b94 SP |
1491 | } |
1492 | ||
f31e50a8 SP |
1493 | mcc_compl = be_process_mcc(adapter, &status); |
1494 | ||
1495 | napi_complete(napi); | |
1496 | ||
1497 | if (mcc_compl) { | |
1498 | struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; | |
1499 | be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl); | |
1500 | } | |
1501 | ||
1502 | if (tx_compl) { | |
1503 | be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl); | |
5fb379ee SP |
1504 | |
1505 | /* As Tx wrbs have been freed up, wake up netdev queue if | |
1506 | * it was stopped due to lack of tx wrbs. | |
1507 | */ | |
1508 | if (netif_queue_stopped(adapter->netdev) && | |
6b7c5b94 | 1509 | atomic_read(&txq->used) < txq->len / 2) { |
5fb379ee SP |
1510 | netif_wake_queue(adapter->netdev); |
1511 | } | |
1512 | ||
1513 | drvr_stats(adapter)->be_tx_events++; | |
f31e50a8 | 1514 | drvr_stats(adapter)->be_tx_compl += tx_compl; |
6b7c5b94 | 1515 | } |
6b7c5b94 SP |
1516 | |
1517 | return 1; | |
1518 | } | |
1519 | ||
ea1dae11 SP |
1520 | static void be_worker(struct work_struct *work) |
1521 | { | |
1522 | struct be_adapter *adapter = | |
1523 | container_of(work, struct be_adapter, work.work); | |
ea1dae11 | 1524 | |
b31c50a7 | 1525 | be_cmd_get_stats(adapter, &adapter->stats.cmd); |
ea1dae11 SP |
1526 | |
1527 | /* Set EQ delay */ | |
1528 | be_rx_eqd_update(adapter); | |
1529 | ||
4097f663 SP |
1530 | be_tx_rate_update(adapter); |
1531 | be_rx_rate_update(adapter); | |
1532 | ||
ea1dae11 SP |
1533 | if (adapter->rx_post_starved) { |
1534 | adapter->rx_post_starved = false; | |
1535 | be_post_rx_frags(adapter); | |
1536 | } | |
1537 | ||
1538 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000)); | |
1539 | } | |
1540 | ||
8d56ff11 SP |
1541 | static void be_msix_disable(struct be_adapter *adapter) |
1542 | { | |
1543 | if (adapter->msix_enabled) { | |
1544 | pci_disable_msix(adapter->pdev); | |
1545 | adapter->msix_enabled = false; | |
1546 | } | |
1547 | } | |
1548 | ||
6b7c5b94 SP |
1549 | static void be_msix_enable(struct be_adapter *adapter) |
1550 | { | |
1551 | int i, status; | |
1552 | ||
1553 | for (i = 0; i < BE_NUM_MSIX_VECTORS; i++) | |
1554 | adapter->msix_entries[i].entry = i; | |
1555 | ||
1556 | status = pci_enable_msix(adapter->pdev, adapter->msix_entries, | |
1557 | BE_NUM_MSIX_VECTORS); | |
1558 | if (status == 0) | |
1559 | adapter->msix_enabled = true; | |
1560 | return; | |
1561 | } | |
1562 | ||
1563 | static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id) | |
1564 | { | |
b628bde2 SP |
1565 | return adapter->msix_entries[ |
1566 | be_evt_bit_get(adapter, eq_id)].vector; | |
6b7c5b94 SP |
1567 | } |
1568 | ||
b628bde2 SP |
1569 | static int be_request_irq(struct be_adapter *adapter, |
1570 | struct be_eq_obj *eq_obj, | |
1571 | void *handler, char *desc) | |
6b7c5b94 SP |
1572 | { |
1573 | struct net_device *netdev = adapter->netdev; | |
b628bde2 SP |
1574 | int vec; |
1575 | ||
1576 | sprintf(eq_obj->desc, "%s-%s", netdev->name, desc); | |
1577 | vec = be_msix_vec_get(adapter, eq_obj->q.id); | |
1578 | return request_irq(vec, handler, 0, eq_obj->desc, adapter); | |
1579 | } | |
1580 | ||
1581 | static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj) | |
1582 | { | |
1583 | int vec = be_msix_vec_get(adapter, eq_obj->q.id); | |
1584 | free_irq(vec, adapter); | |
1585 | } | |
6b7c5b94 | 1586 | |
b628bde2 SP |
1587 | static int be_msix_register(struct be_adapter *adapter) |
1588 | { | |
1589 | int status; | |
1590 | ||
1591 | status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx"); | |
6b7c5b94 SP |
1592 | if (status) |
1593 | goto err; | |
1594 | ||
b628bde2 SP |
1595 | status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx"); |
1596 | if (status) | |
1597 | goto free_tx_irq; | |
1598 | ||
6b7c5b94 | 1599 | return 0; |
b628bde2 SP |
1600 | |
1601 | free_tx_irq: | |
1602 | be_free_irq(adapter, &adapter->tx_eq); | |
6b7c5b94 SP |
1603 | err: |
1604 | dev_warn(&adapter->pdev->dev, | |
1605 | "MSIX Request IRQ failed - err %d\n", status); | |
1606 | pci_disable_msix(adapter->pdev); | |
1607 | adapter->msix_enabled = false; | |
1608 | return status; | |
1609 | } | |
1610 | ||
1611 | static int be_irq_register(struct be_adapter *adapter) | |
1612 | { | |
1613 | struct net_device *netdev = adapter->netdev; | |
1614 | int status; | |
1615 | ||
1616 | if (adapter->msix_enabled) { | |
1617 | status = be_msix_register(adapter); | |
1618 | if (status == 0) | |
1619 | goto done; | |
1620 | } | |
1621 | ||
1622 | /* INTx */ | |
1623 | netdev->irq = adapter->pdev->irq; | |
1624 | status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name, | |
1625 | adapter); | |
1626 | if (status) { | |
1627 | dev_err(&adapter->pdev->dev, | |
1628 | "INTx request IRQ failed - err %d\n", status); | |
1629 | return status; | |
1630 | } | |
1631 | done: | |
1632 | adapter->isr_registered = true; | |
1633 | return 0; | |
1634 | } | |
1635 | ||
1636 | static void be_irq_unregister(struct be_adapter *adapter) | |
1637 | { | |
1638 | struct net_device *netdev = adapter->netdev; | |
6b7c5b94 SP |
1639 | |
1640 | if (!adapter->isr_registered) | |
1641 | return; | |
1642 | ||
1643 | /* INTx */ | |
1644 | if (!adapter->msix_enabled) { | |
1645 | free_irq(netdev->irq, adapter); | |
1646 | goto done; | |
1647 | } | |
1648 | ||
1649 | /* MSIx */ | |
b628bde2 SP |
1650 | be_free_irq(adapter, &adapter->tx_eq); |
1651 | be_free_irq(adapter, &adapter->rx_eq); | |
6b7c5b94 SP |
1652 | done: |
1653 | adapter->isr_registered = false; | |
1654 | return; | |
1655 | } | |
1656 | ||
1657 | static int be_open(struct net_device *netdev) | |
1658 | { | |
1659 | struct be_adapter *adapter = netdev_priv(netdev); | |
6b7c5b94 SP |
1660 | struct be_eq_obj *rx_eq = &adapter->rx_eq; |
1661 | struct be_eq_obj *tx_eq = &adapter->tx_eq; | |
a8f447bd SP |
1662 | bool link_up; |
1663 | int status; | |
0388f251 SB |
1664 | u8 mac_speed; |
1665 | u16 link_speed; | |
5fb379ee SP |
1666 | |
1667 | /* First time posting */ | |
1668 | be_post_rx_frags(adapter); | |
1669 | ||
1670 | napi_enable(&rx_eq->napi); | |
1671 | napi_enable(&tx_eq->napi); | |
1672 | ||
1673 | be_irq_register(adapter); | |
1674 | ||
8788fdc2 | 1675 | be_intr_set(adapter, true); |
5fb379ee SP |
1676 | |
1677 | /* The evt queues are created in unarmed state; arm them */ | |
8788fdc2 SP |
1678 | be_eq_notify(adapter, rx_eq->q.id, true, false, 0); |
1679 | be_eq_notify(adapter, tx_eq->q.id, true, false, 0); | |
5fb379ee SP |
1680 | |
1681 | /* Rx compl queue may be in unarmed state; rearm it */ | |
8788fdc2 | 1682 | be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0); |
5fb379ee | 1683 | |
7a1e9b20 SP |
1684 | /* Now that interrupts are on we can process async mcc */ |
1685 | be_async_mcc_enable(adapter); | |
1686 | ||
0388f251 SB |
1687 | status = be_cmd_link_status_query(adapter, &link_up, &mac_speed, |
1688 | &link_speed); | |
a8f447bd | 1689 | if (status) |
4f2aa89c | 1690 | goto ret_sts; |
a8f447bd | 1691 | be_link_status_update(adapter, link_up); |
5fb379ee | 1692 | |
4f2aa89c AK |
1693 | status = be_vid_config(adapter); |
1694 | if (status) | |
1695 | goto ret_sts; | |
1696 | ||
1697 | status = be_cmd_set_flow_control(adapter, | |
1698 | adapter->tx_fc, adapter->rx_fc); | |
1699 | if (status) | |
1700 | goto ret_sts; | |
1701 | ||
5fb379ee | 1702 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); |
4f2aa89c AK |
1703 | ret_sts: |
1704 | return status; | |
5fb379ee SP |
1705 | } |
1706 | ||
71d8d1b5 AK |
1707 | static int be_setup_wol(struct be_adapter *adapter, bool enable) |
1708 | { | |
1709 | struct be_dma_mem cmd; | |
1710 | int status = 0; | |
1711 | u8 mac[ETH_ALEN]; | |
1712 | ||
1713 | memset(mac, 0, ETH_ALEN); | |
1714 | ||
1715 | cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config); | |
1716 | cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma); | |
1717 | if (cmd.va == NULL) | |
1718 | return -1; | |
1719 | memset(cmd.va, 0, cmd.size); | |
1720 | ||
1721 | if (enable) { | |
1722 | status = pci_write_config_dword(adapter->pdev, | |
1723 | PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK); | |
1724 | if (status) { | |
1725 | dev_err(&adapter->pdev->dev, | |
1726 | "Could not enable Wake-on-lan \n"); | |
1727 | pci_free_consistent(adapter->pdev, cmd.size, cmd.va, | |
1728 | cmd.dma); | |
1729 | return status; | |
1730 | } | |
1731 | status = be_cmd_enable_magic_wol(adapter, | |
1732 | adapter->netdev->dev_addr, &cmd); | |
1733 | pci_enable_wake(adapter->pdev, PCI_D3hot, 1); | |
1734 | pci_enable_wake(adapter->pdev, PCI_D3cold, 1); | |
1735 | } else { | |
1736 | status = be_cmd_enable_magic_wol(adapter, mac, &cmd); | |
1737 | pci_enable_wake(adapter->pdev, PCI_D3hot, 0); | |
1738 | pci_enable_wake(adapter->pdev, PCI_D3cold, 0); | |
1739 | } | |
1740 | ||
1741 | pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma); | |
1742 | return status; | |
1743 | } | |
1744 | ||
5fb379ee SP |
1745 | static int be_setup(struct be_adapter *adapter) |
1746 | { | |
5fb379ee | 1747 | struct net_device *netdev = adapter->netdev; |
73d540f2 | 1748 | u32 cap_flags, en_flags; |
6b7c5b94 SP |
1749 | int status; |
1750 | ||
73d540f2 SP |
1751 | cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST | |
1752 | BE_IF_FLAGS_MCAST_PROMISCUOUS | | |
1753 | BE_IF_FLAGS_PROMISCUOUS | | |
1754 | BE_IF_FLAGS_PASS_L3L4_ERRORS; | |
1755 | en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST | | |
1756 | BE_IF_FLAGS_PASS_L3L4_ERRORS; | |
1757 | ||
1758 | status = be_cmd_if_create(adapter, cap_flags, en_flags, | |
1759 | netdev->dev_addr, false/* pmac_invalid */, | |
1760 | &adapter->if_handle, &adapter->pmac_id); | |
6b7c5b94 SP |
1761 | if (status != 0) |
1762 | goto do_none; | |
1763 | ||
6b7c5b94 SP |
1764 | status = be_tx_queues_create(adapter); |
1765 | if (status != 0) | |
1766 | goto if_destroy; | |
1767 | ||
1768 | status = be_rx_queues_create(adapter); | |
1769 | if (status != 0) | |
1770 | goto tx_qs_destroy; | |
1771 | ||
5fb379ee SP |
1772 | status = be_mcc_queues_create(adapter); |
1773 | if (status != 0) | |
1774 | goto rx_qs_destroy; | |
6b7c5b94 | 1775 | |
0dffc83e AK |
1776 | adapter->link_speed = -1; |
1777 | ||
6b7c5b94 SP |
1778 | return 0; |
1779 | ||
5fb379ee SP |
1780 | rx_qs_destroy: |
1781 | be_rx_queues_destroy(adapter); | |
6b7c5b94 SP |
1782 | tx_qs_destroy: |
1783 | be_tx_queues_destroy(adapter); | |
1784 | if_destroy: | |
8788fdc2 | 1785 | be_cmd_if_destroy(adapter, adapter->if_handle); |
6b7c5b94 SP |
1786 | do_none: |
1787 | return status; | |
1788 | } | |
1789 | ||
5fb379ee SP |
1790 | static int be_clear(struct be_adapter *adapter) |
1791 | { | |
1a8887d8 | 1792 | be_mcc_queues_destroy(adapter); |
5fb379ee SP |
1793 | be_rx_queues_destroy(adapter); |
1794 | be_tx_queues_destroy(adapter); | |
1795 | ||
8788fdc2 | 1796 | be_cmd_if_destroy(adapter, adapter->if_handle); |
5fb379ee | 1797 | |
2243e2e9 SP |
1798 | /* tell fw we're done with firing cmds */ |
1799 | be_cmd_fw_clean(adapter); | |
5fb379ee SP |
1800 | return 0; |
1801 | } | |
1802 | ||
6b7c5b94 SP |
1803 | static int be_close(struct net_device *netdev) |
1804 | { | |
1805 | struct be_adapter *adapter = netdev_priv(netdev); | |
6b7c5b94 SP |
1806 | struct be_eq_obj *rx_eq = &adapter->rx_eq; |
1807 | struct be_eq_obj *tx_eq = &adapter->tx_eq; | |
1808 | int vec; | |
1809 | ||
b305be78 | 1810 | cancel_delayed_work_sync(&adapter->work); |
6b7c5b94 | 1811 | |
7a1e9b20 SP |
1812 | be_async_mcc_disable(adapter); |
1813 | ||
6b7c5b94 SP |
1814 | netif_stop_queue(netdev); |
1815 | netif_carrier_off(netdev); | |
a8f447bd | 1816 | adapter->link_up = false; |
6b7c5b94 | 1817 | |
8788fdc2 | 1818 | be_intr_set(adapter, false); |
6b7c5b94 SP |
1819 | |
1820 | if (adapter->msix_enabled) { | |
1821 | vec = be_msix_vec_get(adapter, tx_eq->q.id); | |
1822 | synchronize_irq(vec); | |
1823 | vec = be_msix_vec_get(adapter, rx_eq->q.id); | |
1824 | synchronize_irq(vec); | |
1825 | } else { | |
1826 | synchronize_irq(netdev->irq); | |
1827 | } | |
1828 | be_irq_unregister(adapter); | |
1829 | ||
1830 | napi_disable(&rx_eq->napi); | |
1831 | napi_disable(&tx_eq->napi); | |
1832 | ||
a8e9179a SP |
1833 | /* Wait for all pending tx completions to arrive so that |
1834 | * all tx skbs are freed. | |
1835 | */ | |
1836 | be_tx_compl_clean(adapter); | |
1837 | ||
6b7c5b94 SP |
1838 | return 0; |
1839 | } | |
1840 | ||
84517482 AK |
1841 | #define FW_FILE_HDR_SIGN "ServerEngines Corp. " |
1842 | char flash_cookie[2][16] = {"*** SE FLAS", | |
1843 | "H DIRECTORY *** "}; | |
fa9a6fed SB |
1844 | |
1845 | static bool be_flash_redboot(struct be_adapter *adapter, | |
3f0d4560 AK |
1846 | const u8 *p, u32 img_start, int image_size, |
1847 | int hdr_size) | |
fa9a6fed SB |
1848 | { |
1849 | u32 crc_offset; | |
1850 | u8 flashed_crc[4]; | |
1851 | int status; | |
3f0d4560 AK |
1852 | |
1853 | crc_offset = hdr_size + img_start + image_size - 4; | |
1854 | ||
fa9a6fed | 1855 | p += crc_offset; |
3f0d4560 AK |
1856 | |
1857 | status = be_cmd_get_flash_crc(adapter, flashed_crc, | |
f510fc64 | 1858 | (image_size - 4)); |
fa9a6fed SB |
1859 | if (status) { |
1860 | dev_err(&adapter->pdev->dev, | |
1861 | "could not get crc from flash, not flashing redboot\n"); | |
1862 | return false; | |
1863 | } | |
1864 | ||
1865 | /*update redboot only if crc does not match*/ | |
1866 | if (!memcmp(flashed_crc, p, 4)) | |
1867 | return false; | |
1868 | else | |
1869 | return true; | |
fa9a6fed SB |
1870 | } |
1871 | ||
3f0d4560 | 1872 | static int be_flash_data(struct be_adapter *adapter, |
84517482 | 1873 | const struct firmware *fw, |
3f0d4560 AK |
1874 | struct be_dma_mem *flash_cmd, int num_of_images) |
1875 | ||
84517482 | 1876 | { |
3f0d4560 AK |
1877 | int status = 0, i, filehdr_size = 0; |
1878 | u32 total_bytes = 0, flash_op; | |
84517482 AK |
1879 | int num_bytes; |
1880 | const u8 *p = fw->data; | |
1881 | struct be_cmd_write_flashrom *req = flash_cmd->va; | |
3f0d4560 | 1882 | struct flash_comp *pflashcomp; |
9fe96934 | 1883 | int num_comp; |
3f0d4560 | 1884 | |
9fe96934 | 1885 | struct flash_comp gen3_flash_types[9] = { |
3f0d4560 AK |
1886 | { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE, |
1887 | FLASH_IMAGE_MAX_SIZE_g3}, | |
1888 | { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT, | |
1889 | FLASH_REDBOOT_IMAGE_MAX_SIZE_g3}, | |
1890 | { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS, | |
1891 | FLASH_BIOS_IMAGE_MAX_SIZE_g3}, | |
1892 | { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS, | |
1893 | FLASH_BIOS_IMAGE_MAX_SIZE_g3}, | |
1894 | { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS, | |
1895 | FLASH_BIOS_IMAGE_MAX_SIZE_g3}, | |
1896 | { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP, | |
1897 | FLASH_IMAGE_MAX_SIZE_g3}, | |
1898 | { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE, | |
1899 | FLASH_IMAGE_MAX_SIZE_g3}, | |
1900 | { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP, | |
9fe96934 SB |
1901 | FLASH_IMAGE_MAX_SIZE_g3}, |
1902 | { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW, | |
1903 | FLASH_NCSI_IMAGE_MAX_SIZE_g3} | |
3f0d4560 AK |
1904 | }; |
1905 | struct flash_comp gen2_flash_types[8] = { | |
1906 | { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE, | |
1907 | FLASH_IMAGE_MAX_SIZE_g2}, | |
1908 | { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT, | |
1909 | FLASH_REDBOOT_IMAGE_MAX_SIZE_g2}, | |
1910 | { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS, | |
1911 | FLASH_BIOS_IMAGE_MAX_SIZE_g2}, | |
1912 | { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS, | |
1913 | FLASH_BIOS_IMAGE_MAX_SIZE_g2}, | |
1914 | { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS, | |
1915 | FLASH_BIOS_IMAGE_MAX_SIZE_g2}, | |
1916 | { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP, | |
1917 | FLASH_IMAGE_MAX_SIZE_g2}, | |
1918 | { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE, | |
1919 | FLASH_IMAGE_MAX_SIZE_g2}, | |
1920 | { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP, | |
1921 | FLASH_IMAGE_MAX_SIZE_g2} | |
1922 | }; | |
1923 | ||
1924 | if (adapter->generation == BE_GEN3) { | |
1925 | pflashcomp = gen3_flash_types; | |
1926 | filehdr_size = sizeof(struct flash_file_hdr_g3); | |
9fe96934 | 1927 | num_comp = 9; |
3f0d4560 AK |
1928 | } else { |
1929 | pflashcomp = gen2_flash_types; | |
1930 | filehdr_size = sizeof(struct flash_file_hdr_g2); | |
9fe96934 | 1931 | num_comp = 8; |
84517482 | 1932 | } |
9fe96934 SB |
1933 | for (i = 0; i < num_comp; i++) { |
1934 | if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) && | |
1935 | memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0) | |
1936 | continue; | |
3f0d4560 AK |
1937 | if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) && |
1938 | (!be_flash_redboot(adapter, fw->data, | |
1939 | pflashcomp[i].offset, pflashcomp[i].size, | |
1940 | filehdr_size))) | |
1941 | continue; | |
1942 | p = fw->data; | |
1943 | p += filehdr_size + pflashcomp[i].offset | |
1944 | + (num_of_images * sizeof(struct image_hdr)); | |
1945 | if (p + pflashcomp[i].size > fw->data + fw->size) | |
84517482 | 1946 | return -1; |
3f0d4560 AK |
1947 | total_bytes = pflashcomp[i].size; |
1948 | while (total_bytes) { | |
1949 | if (total_bytes > 32*1024) | |
1950 | num_bytes = 32*1024; | |
1951 | else | |
1952 | num_bytes = total_bytes; | |
1953 | total_bytes -= num_bytes; | |
1954 | ||
1955 | if (!total_bytes) | |
1956 | flash_op = FLASHROM_OPER_FLASH; | |
1957 | else | |
1958 | flash_op = FLASHROM_OPER_SAVE; | |
1959 | memcpy(req->params.data_buf, p, num_bytes); | |
1960 | p += num_bytes; | |
1961 | status = be_cmd_write_flashrom(adapter, flash_cmd, | |
1962 | pflashcomp[i].optype, flash_op, num_bytes); | |
1963 | if (status) { | |
1964 | dev_err(&adapter->pdev->dev, | |
1965 | "cmd to write to flash rom failed.\n"); | |
1966 | return -1; | |
1967 | } | |
1968 | yield(); | |
84517482 | 1969 | } |
84517482 | 1970 | } |
84517482 AK |
1971 | return 0; |
1972 | } | |
1973 | ||
3f0d4560 AK |
1974 | static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr) |
1975 | { | |
1976 | if (fhdr == NULL) | |
1977 | return 0; | |
1978 | if (fhdr->build[0] == '3') | |
1979 | return BE_GEN3; | |
1980 | else if (fhdr->build[0] == '2') | |
1981 | return BE_GEN2; | |
1982 | else | |
1983 | return 0; | |
1984 | } | |
1985 | ||
84517482 AK |
1986 | int be_load_fw(struct be_adapter *adapter, u8 *func) |
1987 | { | |
1988 | char fw_file[ETHTOOL_FLASH_MAX_FILENAME]; | |
1989 | const struct firmware *fw; | |
3f0d4560 AK |
1990 | struct flash_file_hdr_g2 *fhdr; |
1991 | struct flash_file_hdr_g3 *fhdr3; | |
1992 | struct image_hdr *img_hdr_ptr = NULL; | |
84517482 | 1993 | struct be_dma_mem flash_cmd; |
8b93b710 | 1994 | int status, i = 0, num_imgs = 0; |
84517482 | 1995 | const u8 *p; |
84517482 | 1996 | |
84517482 AK |
1997 | strcpy(fw_file, func); |
1998 | ||
1999 | status = request_firmware(&fw, fw_file, &adapter->pdev->dev); | |
2000 | if (status) | |
2001 | goto fw_exit; | |
2002 | ||
2003 | p = fw->data; | |
3f0d4560 | 2004 | fhdr = (struct flash_file_hdr_g2 *) p; |
84517482 AK |
2005 | dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file); |
2006 | ||
84517482 AK |
2007 | flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024; |
2008 | flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size, | |
2009 | &flash_cmd.dma); | |
2010 | if (!flash_cmd.va) { | |
2011 | status = -ENOMEM; | |
2012 | dev_err(&adapter->pdev->dev, | |
2013 | "Memory allocation failure while flashing\n"); | |
2014 | goto fw_exit; | |
2015 | } | |
2016 | ||
3f0d4560 AK |
2017 | if ((adapter->generation == BE_GEN3) && |
2018 | (get_ufigen_type(fhdr) == BE_GEN3)) { | |
2019 | fhdr3 = (struct flash_file_hdr_g3 *) fw->data; | |
8b93b710 AK |
2020 | num_imgs = le32_to_cpu(fhdr3->num_imgs); |
2021 | for (i = 0; i < num_imgs; i++) { | |
3f0d4560 AK |
2022 | img_hdr_ptr = (struct image_hdr *) (fw->data + |
2023 | (sizeof(struct flash_file_hdr_g3) + | |
8b93b710 AK |
2024 | i * sizeof(struct image_hdr))); |
2025 | if (le32_to_cpu(img_hdr_ptr->imageid) == 1) | |
2026 | status = be_flash_data(adapter, fw, &flash_cmd, | |
2027 | num_imgs); | |
3f0d4560 AK |
2028 | } |
2029 | } else if ((adapter->generation == BE_GEN2) && | |
2030 | (get_ufigen_type(fhdr) == BE_GEN2)) { | |
2031 | status = be_flash_data(adapter, fw, &flash_cmd, 0); | |
2032 | } else { | |
2033 | dev_err(&adapter->pdev->dev, | |
2034 | "UFI and Interface are not compatible for flashing\n"); | |
2035 | status = -1; | |
84517482 AK |
2036 | } |
2037 | ||
2038 | pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va, | |
2039 | flash_cmd.dma); | |
2040 | if (status) { | |
2041 | dev_err(&adapter->pdev->dev, "Firmware load error\n"); | |
2042 | goto fw_exit; | |
2043 | } | |
2044 | ||
af901ca1 | 2045 | dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n"); |
84517482 AK |
2046 | |
2047 | fw_exit: | |
2048 | release_firmware(fw); | |
2049 | return status; | |
2050 | } | |
2051 | ||
6b7c5b94 SP |
2052 | static struct net_device_ops be_netdev_ops = { |
2053 | .ndo_open = be_open, | |
2054 | .ndo_stop = be_close, | |
2055 | .ndo_start_xmit = be_xmit, | |
2056 | .ndo_get_stats = be_get_stats, | |
2057 | .ndo_set_rx_mode = be_set_multicast_list, | |
2058 | .ndo_set_mac_address = be_mac_addr_set, | |
2059 | .ndo_change_mtu = be_change_mtu, | |
2060 | .ndo_validate_addr = eth_validate_addr, | |
2061 | .ndo_vlan_rx_register = be_vlan_register, | |
2062 | .ndo_vlan_rx_add_vid = be_vlan_add_vid, | |
2063 | .ndo_vlan_rx_kill_vid = be_vlan_rem_vid, | |
2064 | }; | |
2065 | ||
2066 | static void be_netdev_init(struct net_device *netdev) | |
2067 | { | |
2068 | struct be_adapter *adapter = netdev_priv(netdev); | |
2069 | ||
2070 | netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO | | |
583e3f34 AK |
2071 | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM | |
2072 | NETIF_F_GRO; | |
6b7c5b94 | 2073 | |
51c59870 AK |
2074 | netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM; |
2075 | ||
6b7c5b94 SP |
2076 | netdev->flags |= IFF_MULTICAST; |
2077 | ||
728a9972 AK |
2078 | adapter->rx_csum = true; |
2079 | ||
9e90c961 AK |
2080 | /* Default settings for Rx and Tx flow control */ |
2081 | adapter->rx_fc = true; | |
2082 | adapter->tx_fc = true; | |
2083 | ||
c190e3c8 AK |
2084 | netif_set_gso_max_size(netdev, 65535); |
2085 | ||
6b7c5b94 SP |
2086 | BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); |
2087 | ||
2088 | SET_ETHTOOL_OPS(netdev, &be_ethtool_ops); | |
2089 | ||
6b7c5b94 SP |
2090 | netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx, |
2091 | BE_NAPI_WEIGHT); | |
5fb379ee | 2092 | netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc, |
6b7c5b94 SP |
2093 | BE_NAPI_WEIGHT); |
2094 | ||
2095 | netif_carrier_off(netdev); | |
2096 | netif_stop_queue(netdev); | |
2097 | } | |
2098 | ||
2099 | static void be_unmap_pci_bars(struct be_adapter *adapter) | |
2100 | { | |
8788fdc2 SP |
2101 | if (adapter->csr) |
2102 | iounmap(adapter->csr); | |
2103 | if (adapter->db) | |
2104 | iounmap(adapter->db); | |
2105 | if (adapter->pcicfg) | |
2106 | iounmap(adapter->pcicfg); | |
6b7c5b94 SP |
2107 | } |
2108 | ||
2109 | static int be_map_pci_bars(struct be_adapter *adapter) | |
2110 | { | |
2111 | u8 __iomem *addr; | |
7b139c83 | 2112 | int pcicfg_reg; |
6b7c5b94 SP |
2113 | |
2114 | addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2), | |
2115 | pci_resource_len(adapter->pdev, 2)); | |
2116 | if (addr == NULL) | |
2117 | return -ENOMEM; | |
8788fdc2 | 2118 | adapter->csr = addr; |
6b7c5b94 SP |
2119 | |
2120 | addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4), | |
2121 | 128 * 1024); | |
2122 | if (addr == NULL) | |
2123 | goto pci_map_err; | |
8788fdc2 | 2124 | adapter->db = addr; |
6b7c5b94 | 2125 | |
7b139c83 AK |
2126 | if (adapter->generation == BE_GEN2) |
2127 | pcicfg_reg = 1; | |
2128 | else | |
2129 | pcicfg_reg = 0; | |
2130 | ||
2131 | addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg), | |
2132 | pci_resource_len(adapter->pdev, pcicfg_reg)); | |
6b7c5b94 SP |
2133 | if (addr == NULL) |
2134 | goto pci_map_err; | |
8788fdc2 | 2135 | adapter->pcicfg = addr; |
6b7c5b94 SP |
2136 | |
2137 | return 0; | |
2138 | pci_map_err: | |
2139 | be_unmap_pci_bars(adapter); | |
2140 | return -ENOMEM; | |
2141 | } | |
2142 | ||
2143 | ||
2144 | static void be_ctrl_cleanup(struct be_adapter *adapter) | |
2145 | { | |
8788fdc2 | 2146 | struct be_dma_mem *mem = &adapter->mbox_mem_alloced; |
6b7c5b94 SP |
2147 | |
2148 | be_unmap_pci_bars(adapter); | |
2149 | ||
2150 | if (mem->va) | |
2151 | pci_free_consistent(adapter->pdev, mem->size, | |
2152 | mem->va, mem->dma); | |
e7b909a6 SP |
2153 | |
2154 | mem = &adapter->mc_cmd_mem; | |
2155 | if (mem->va) | |
2156 | pci_free_consistent(adapter->pdev, mem->size, | |
2157 | mem->va, mem->dma); | |
6b7c5b94 SP |
2158 | } |
2159 | ||
6b7c5b94 SP |
2160 | static int be_ctrl_init(struct be_adapter *adapter) |
2161 | { | |
8788fdc2 SP |
2162 | struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced; |
2163 | struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem; | |
e7b909a6 | 2164 | struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem; |
6b7c5b94 | 2165 | int status; |
6b7c5b94 SP |
2166 | |
2167 | status = be_map_pci_bars(adapter); | |
2168 | if (status) | |
e7b909a6 | 2169 | goto done; |
6b7c5b94 SP |
2170 | |
2171 | mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16; | |
2172 | mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev, | |
2173 | mbox_mem_alloc->size, &mbox_mem_alloc->dma); | |
2174 | if (!mbox_mem_alloc->va) { | |
e7b909a6 SP |
2175 | status = -ENOMEM; |
2176 | goto unmap_pci_bars; | |
6b7c5b94 | 2177 | } |
e7b909a6 | 2178 | |
6b7c5b94 SP |
2179 | mbox_mem_align->size = sizeof(struct be_mcc_mailbox); |
2180 | mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16); | |
2181 | mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16); | |
2182 | memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox)); | |
e7b909a6 SP |
2183 | |
2184 | mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config); | |
2185 | mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size, | |
2186 | &mc_cmd_mem->dma); | |
2187 | if (mc_cmd_mem->va == NULL) { | |
2188 | status = -ENOMEM; | |
2189 | goto free_mbox; | |
2190 | } | |
2191 | memset(mc_cmd_mem->va, 0, mc_cmd_mem->size); | |
2192 | ||
8788fdc2 SP |
2193 | spin_lock_init(&adapter->mbox_lock); |
2194 | spin_lock_init(&adapter->mcc_lock); | |
2195 | spin_lock_init(&adapter->mcc_cq_lock); | |
a8f447bd | 2196 | |
cf588477 | 2197 | pci_save_state(adapter->pdev); |
6b7c5b94 | 2198 | return 0; |
e7b909a6 SP |
2199 | |
2200 | free_mbox: | |
2201 | pci_free_consistent(adapter->pdev, mbox_mem_alloc->size, | |
2202 | mbox_mem_alloc->va, mbox_mem_alloc->dma); | |
2203 | ||
2204 | unmap_pci_bars: | |
2205 | be_unmap_pci_bars(adapter); | |
2206 | ||
2207 | done: | |
2208 | return status; | |
6b7c5b94 SP |
2209 | } |
2210 | ||
2211 | static void be_stats_cleanup(struct be_adapter *adapter) | |
2212 | { | |
2213 | struct be_stats_obj *stats = &adapter->stats; | |
2214 | struct be_dma_mem *cmd = &stats->cmd; | |
2215 | ||
2216 | if (cmd->va) | |
2217 | pci_free_consistent(adapter->pdev, cmd->size, | |
2218 | cmd->va, cmd->dma); | |
2219 | } | |
2220 | ||
2221 | static int be_stats_init(struct be_adapter *adapter) | |
2222 | { | |
2223 | struct be_stats_obj *stats = &adapter->stats; | |
2224 | struct be_dma_mem *cmd = &stats->cmd; | |
2225 | ||
2226 | cmd->size = sizeof(struct be_cmd_req_get_stats); | |
2227 | cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma); | |
2228 | if (cmd->va == NULL) | |
2229 | return -1; | |
d291b9af | 2230 | memset(cmd->va, 0, cmd->size); |
6b7c5b94 SP |
2231 | return 0; |
2232 | } | |
2233 | ||
2234 | static void __devexit be_remove(struct pci_dev *pdev) | |
2235 | { | |
2236 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
8d56ff11 | 2237 | |
6b7c5b94 SP |
2238 | if (!adapter) |
2239 | return; | |
2240 | ||
2241 | unregister_netdev(adapter->netdev); | |
2242 | ||
5fb379ee SP |
2243 | be_clear(adapter); |
2244 | ||
6b7c5b94 SP |
2245 | be_stats_cleanup(adapter); |
2246 | ||
2247 | be_ctrl_cleanup(adapter); | |
2248 | ||
8d56ff11 | 2249 | be_msix_disable(adapter); |
6b7c5b94 SP |
2250 | |
2251 | pci_set_drvdata(pdev, NULL); | |
2252 | pci_release_regions(pdev); | |
2253 | pci_disable_device(pdev); | |
2254 | ||
2255 | free_netdev(adapter->netdev); | |
2256 | } | |
2257 | ||
2243e2e9 | 2258 | static int be_get_config(struct be_adapter *adapter) |
6b7c5b94 | 2259 | { |
6b7c5b94 | 2260 | int status; |
2243e2e9 | 2261 | u8 mac[ETH_ALEN]; |
6b7c5b94 | 2262 | |
2243e2e9 | 2263 | status = be_cmd_get_fw_ver(adapter, adapter->fw_ver); |
6b7c5b94 SP |
2264 | if (status) |
2265 | return status; | |
2266 | ||
2243e2e9 SP |
2267 | status = be_cmd_query_fw_cfg(adapter, |
2268 | &adapter->port_num, &adapter->cap); | |
43a04fdc SP |
2269 | if (status) |
2270 | return status; | |
2271 | ||
2243e2e9 SP |
2272 | memset(mac, 0, ETH_ALEN); |
2273 | status = be_cmd_mac_addr_query(adapter, mac, | |
2274 | MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0); | |
6b7c5b94 SP |
2275 | if (status) |
2276 | return status; | |
ca9e4988 AK |
2277 | |
2278 | if (!is_valid_ether_addr(mac)) | |
2279 | return -EADDRNOTAVAIL; | |
2280 | ||
2243e2e9 | 2281 | memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN); |
35a65285 | 2282 | memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN); |
6b7c5b94 | 2283 | |
82903e4b AK |
2284 | if (adapter->cap & 0x400) |
2285 | adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4; | |
2286 | else | |
2287 | adapter->max_vlans = BE_NUM_VLANS_SUPPORTED; | |
2288 | ||
2243e2e9 | 2289 | return 0; |
6b7c5b94 SP |
2290 | } |
2291 | ||
2292 | static int __devinit be_probe(struct pci_dev *pdev, | |
2293 | const struct pci_device_id *pdev_id) | |
2294 | { | |
2295 | int status = 0; | |
2296 | struct be_adapter *adapter; | |
2297 | struct net_device *netdev; | |
6b7c5b94 SP |
2298 | |
2299 | status = pci_enable_device(pdev); | |
2300 | if (status) | |
2301 | goto do_none; | |
2302 | ||
2303 | status = pci_request_regions(pdev, DRV_NAME); | |
2304 | if (status) | |
2305 | goto disable_dev; | |
2306 | pci_set_master(pdev); | |
2307 | ||
2308 | netdev = alloc_etherdev(sizeof(struct be_adapter)); | |
2309 | if (netdev == NULL) { | |
2310 | status = -ENOMEM; | |
2311 | goto rel_reg; | |
2312 | } | |
2313 | adapter = netdev_priv(netdev); | |
7b139c83 AK |
2314 | |
2315 | switch (pdev->device) { | |
2316 | case BE_DEVICE_ID1: | |
2317 | case OC_DEVICE_ID1: | |
2318 | adapter->generation = BE_GEN2; | |
2319 | break; | |
2320 | case BE_DEVICE_ID2: | |
2321 | case OC_DEVICE_ID2: | |
2322 | adapter->generation = BE_GEN3; | |
2323 | break; | |
2324 | default: | |
2325 | adapter->generation = 0; | |
2326 | } | |
2327 | ||
6b7c5b94 SP |
2328 | adapter->pdev = pdev; |
2329 | pci_set_drvdata(pdev, adapter); | |
2330 | adapter->netdev = netdev; | |
2243e2e9 SP |
2331 | be_netdev_init(netdev); |
2332 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
6b7c5b94 SP |
2333 | |
2334 | be_msix_enable(adapter); | |
2335 | ||
e930438c | 2336 | status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); |
6b7c5b94 SP |
2337 | if (!status) { |
2338 | netdev->features |= NETIF_F_HIGHDMA; | |
2339 | } else { | |
e930438c | 2340 | status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
6b7c5b94 SP |
2341 | if (status) { |
2342 | dev_err(&pdev->dev, "Could not set PCI DMA Mask\n"); | |
2343 | goto free_netdev; | |
2344 | } | |
2345 | } | |
2346 | ||
6b7c5b94 SP |
2347 | status = be_ctrl_init(adapter); |
2348 | if (status) | |
2349 | goto free_netdev; | |
2350 | ||
2243e2e9 SP |
2351 | /* sync up with fw's ready state */ |
2352 | status = be_cmd_POST(adapter); | |
6b7c5b94 SP |
2353 | if (status) |
2354 | goto ctrl_clean; | |
2355 | ||
2243e2e9 SP |
2356 | /* tell fw we're ready to fire cmds */ |
2357 | status = be_cmd_fw_init(adapter); | |
6b7c5b94 | 2358 | if (status) |
2243e2e9 SP |
2359 | goto ctrl_clean; |
2360 | ||
2361 | status = be_cmd_reset_function(adapter); | |
2362 | if (status) | |
2363 | goto ctrl_clean; | |
6b7c5b94 | 2364 | |
2243e2e9 SP |
2365 | status = be_stats_init(adapter); |
2366 | if (status) | |
2367 | goto ctrl_clean; | |
2368 | ||
2369 | status = be_get_config(adapter); | |
6b7c5b94 SP |
2370 | if (status) |
2371 | goto stats_clean; | |
6b7c5b94 SP |
2372 | |
2373 | INIT_DELAYED_WORK(&adapter->work, be_worker); | |
6b7c5b94 | 2374 | |
5fb379ee SP |
2375 | status = be_setup(adapter); |
2376 | if (status) | |
2377 | goto stats_clean; | |
2243e2e9 | 2378 | |
6b7c5b94 SP |
2379 | status = register_netdev(netdev); |
2380 | if (status != 0) | |
5fb379ee | 2381 | goto unsetup; |
6b7c5b94 | 2382 | |
c4ca2374 | 2383 | dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num); |
6b7c5b94 SP |
2384 | return 0; |
2385 | ||
5fb379ee SP |
2386 | unsetup: |
2387 | be_clear(adapter); | |
6b7c5b94 SP |
2388 | stats_clean: |
2389 | be_stats_cleanup(adapter); | |
2390 | ctrl_clean: | |
2391 | be_ctrl_cleanup(adapter); | |
2392 | free_netdev: | |
8d56ff11 | 2393 | be_msix_disable(adapter); |
6b7c5b94 | 2394 | free_netdev(adapter->netdev); |
8d56ff11 | 2395 | pci_set_drvdata(pdev, NULL); |
6b7c5b94 SP |
2396 | rel_reg: |
2397 | pci_release_regions(pdev); | |
2398 | disable_dev: | |
2399 | pci_disable_device(pdev); | |
2400 | do_none: | |
c4ca2374 | 2401 | dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev)); |
6b7c5b94 SP |
2402 | return status; |
2403 | } | |
2404 | ||
2405 | static int be_suspend(struct pci_dev *pdev, pm_message_t state) | |
2406 | { | |
2407 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
2408 | struct net_device *netdev = adapter->netdev; | |
2409 | ||
71d8d1b5 AK |
2410 | if (adapter->wol) |
2411 | be_setup_wol(adapter, true); | |
2412 | ||
6b7c5b94 SP |
2413 | netif_device_detach(netdev); |
2414 | if (netif_running(netdev)) { | |
2415 | rtnl_lock(); | |
2416 | be_close(netdev); | |
2417 | rtnl_unlock(); | |
2418 | } | |
9e90c961 | 2419 | be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc); |
9b0365f1 | 2420 | be_clear(adapter); |
6b7c5b94 SP |
2421 | |
2422 | pci_save_state(pdev); | |
2423 | pci_disable_device(pdev); | |
2424 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
2425 | return 0; | |
2426 | } | |
2427 | ||
2428 | static int be_resume(struct pci_dev *pdev) | |
2429 | { | |
2430 | int status = 0; | |
2431 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
2432 | struct net_device *netdev = adapter->netdev; | |
2433 | ||
2434 | netif_device_detach(netdev); | |
2435 | ||
2436 | status = pci_enable_device(pdev); | |
2437 | if (status) | |
2438 | return status; | |
2439 | ||
2440 | pci_set_power_state(pdev, 0); | |
2441 | pci_restore_state(pdev); | |
2442 | ||
2243e2e9 SP |
2443 | /* tell fw we're ready to fire cmds */ |
2444 | status = be_cmd_fw_init(adapter); | |
2445 | if (status) | |
2446 | return status; | |
2447 | ||
9b0365f1 | 2448 | be_setup(adapter); |
6b7c5b94 SP |
2449 | if (netif_running(netdev)) { |
2450 | rtnl_lock(); | |
2451 | be_open(netdev); | |
2452 | rtnl_unlock(); | |
2453 | } | |
2454 | netif_device_attach(netdev); | |
71d8d1b5 AK |
2455 | |
2456 | if (adapter->wol) | |
2457 | be_setup_wol(adapter, false); | |
6b7c5b94 SP |
2458 | return 0; |
2459 | } | |
2460 | ||
82456b03 SP |
2461 | /* |
2462 | * An FLR will stop BE from DMAing any data. | |
2463 | */ | |
2464 | static void be_shutdown(struct pci_dev *pdev) | |
2465 | { | |
2466 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
2467 | struct net_device *netdev = adapter->netdev; | |
2468 | ||
2469 | netif_device_detach(netdev); | |
2470 | ||
2471 | be_cmd_reset_function(adapter); | |
2472 | ||
2473 | if (adapter->wol) | |
2474 | be_setup_wol(adapter, true); | |
2475 | ||
2476 | pci_disable_device(pdev); | |
2477 | ||
2478 | return; | |
2479 | } | |
2480 | ||
cf588477 SP |
2481 | static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev, |
2482 | pci_channel_state_t state) | |
2483 | { | |
2484 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
2485 | struct net_device *netdev = adapter->netdev; | |
2486 | ||
2487 | dev_err(&adapter->pdev->dev, "EEH error detected\n"); | |
2488 | ||
2489 | adapter->eeh_err = true; | |
2490 | ||
2491 | netif_device_detach(netdev); | |
2492 | ||
2493 | if (netif_running(netdev)) { | |
2494 | rtnl_lock(); | |
2495 | be_close(netdev); | |
2496 | rtnl_unlock(); | |
2497 | } | |
2498 | be_clear(adapter); | |
2499 | ||
2500 | if (state == pci_channel_io_perm_failure) | |
2501 | return PCI_ERS_RESULT_DISCONNECT; | |
2502 | ||
2503 | pci_disable_device(pdev); | |
2504 | ||
2505 | return PCI_ERS_RESULT_NEED_RESET; | |
2506 | } | |
2507 | ||
2508 | static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev) | |
2509 | { | |
2510 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
2511 | int status; | |
2512 | ||
2513 | dev_info(&adapter->pdev->dev, "EEH reset\n"); | |
2514 | adapter->eeh_err = false; | |
2515 | ||
2516 | status = pci_enable_device(pdev); | |
2517 | if (status) | |
2518 | return PCI_ERS_RESULT_DISCONNECT; | |
2519 | ||
2520 | pci_set_master(pdev); | |
2521 | pci_set_power_state(pdev, 0); | |
2522 | pci_restore_state(pdev); | |
2523 | ||
2524 | /* Check if card is ok and fw is ready */ | |
2525 | status = be_cmd_POST(adapter); | |
2526 | if (status) | |
2527 | return PCI_ERS_RESULT_DISCONNECT; | |
2528 | ||
2529 | return PCI_ERS_RESULT_RECOVERED; | |
2530 | } | |
2531 | ||
2532 | static void be_eeh_resume(struct pci_dev *pdev) | |
2533 | { | |
2534 | int status = 0; | |
2535 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
2536 | struct net_device *netdev = adapter->netdev; | |
2537 | ||
2538 | dev_info(&adapter->pdev->dev, "EEH resume\n"); | |
2539 | ||
2540 | pci_save_state(pdev); | |
2541 | ||
2542 | /* tell fw we're ready to fire cmds */ | |
2543 | status = be_cmd_fw_init(adapter); | |
2544 | if (status) | |
2545 | goto err; | |
2546 | ||
2547 | status = be_setup(adapter); | |
2548 | if (status) | |
2549 | goto err; | |
2550 | ||
2551 | if (netif_running(netdev)) { | |
2552 | status = be_open(netdev); | |
2553 | if (status) | |
2554 | goto err; | |
2555 | } | |
2556 | netif_device_attach(netdev); | |
2557 | return; | |
2558 | err: | |
2559 | dev_err(&adapter->pdev->dev, "EEH resume failed\n"); | |
2560 | return; | |
2561 | } | |
2562 | ||
2563 | static struct pci_error_handlers be_eeh_handlers = { | |
2564 | .error_detected = be_eeh_err_detected, | |
2565 | .slot_reset = be_eeh_reset, | |
2566 | .resume = be_eeh_resume, | |
2567 | }; | |
2568 | ||
6b7c5b94 SP |
2569 | static struct pci_driver be_driver = { |
2570 | .name = DRV_NAME, | |
2571 | .id_table = be_dev_ids, | |
2572 | .probe = be_probe, | |
2573 | .remove = be_remove, | |
2574 | .suspend = be_suspend, | |
cf588477 | 2575 | .resume = be_resume, |
82456b03 | 2576 | .shutdown = be_shutdown, |
cf588477 | 2577 | .err_handler = &be_eeh_handlers |
6b7c5b94 SP |
2578 | }; |
2579 | ||
2580 | static int __init be_init_module(void) | |
2581 | { | |
8e95a202 JP |
2582 | if (rx_frag_size != 8192 && rx_frag_size != 4096 && |
2583 | rx_frag_size != 2048) { | |
6b7c5b94 SP |
2584 | printk(KERN_WARNING DRV_NAME |
2585 | " : Module param rx_frag_size must be 2048/4096/8192." | |
2586 | " Using 2048\n"); | |
2587 | rx_frag_size = 2048; | |
2588 | } | |
6b7c5b94 SP |
2589 | |
2590 | return pci_register_driver(&be_driver); | |
2591 | } | |
2592 | module_init(be_init_module); | |
2593 | ||
2594 | static void __exit be_exit_module(void) | |
2595 | { | |
2596 | pci_unregister_driver(&be_driver); | |
2597 | } | |
2598 | module_exit(be_exit_module); |