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8b230ed8 RM |
1 | /* |
2 | * Linux network driver for Brocade Converged Network Adapter. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License (GPL) Version 2 as | |
6 | * published by the Free Software Foundation | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | /* | |
14 | * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. | |
15 | * All rights reserved | |
16 | * www.brocade.com | |
17 | */ | |
18 | ||
19 | #ifndef __BFI_H__ | |
20 | #define __BFI_H__ | |
21 | ||
22 | #include "bfa_defs.h" | |
23 | ||
24 | #pragma pack(1) | |
25 | ||
26 | /** | |
27 | * BFI FW image type | |
28 | */ | |
29 | #define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */ | |
30 | #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32)) | |
31 | enum { | |
32 | BFI_IMAGE_CB_FC, | |
33 | BFI_IMAGE_CT_FC, | |
34 | BFI_IMAGE_CT_CNA, | |
35 | BFI_IMAGE_MAX, | |
36 | }; | |
37 | ||
38 | /** | |
39 | * Msg header common to all msgs | |
40 | */ | |
41 | struct bfi_mhdr { | |
42 | u8 msg_class; /*!< @ref enum bfi_mclass */ | |
43 | u8 msg_id; /*!< msg opcode with in the class */ | |
44 | union { | |
45 | struct { | |
46 | u8 rsvd; | |
47 | u8 lpu_id; /*!< msg destination */ | |
48 | } h2i; | |
49 | u16 i2htok; /*!< token in msgs to host */ | |
50 | } mtag; | |
51 | }; | |
52 | ||
53 | #define bfi_h2i_set(_mh, _mc, _op, _lpuid) do { \ | |
54 | (_mh).msg_class = (_mc); \ | |
55 | (_mh).msg_id = (_op); \ | |
56 | (_mh).mtag.h2i.lpu_id = (_lpuid); \ | |
57 | } while (0) | |
58 | ||
59 | #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \ | |
60 | (_mh).msg_class = (_mc); \ | |
61 | (_mh).msg_id = (_op); \ | |
62 | (_mh).mtag.i2htok = (_i2htok); \ | |
63 | } while (0) | |
64 | ||
65 | /* | |
66 | * Message opcodes: 0-127 to firmware, 128-255 to host | |
67 | */ | |
68 | #define BFI_I2H_OPCODE_BASE 128 | |
69 | #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE) | |
70 | ||
71 | /** | |
72 | **************************************************************************** | |
73 | * | |
74 | * Scatter Gather Element and Page definition | |
75 | * | |
76 | **************************************************************************** | |
77 | */ | |
78 | ||
79 | #define BFI_SGE_INLINE 1 | |
80 | #define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1) | |
81 | ||
82 | /** | |
83 | * SG Flags | |
84 | */ | |
85 | enum { | |
86 | BFI_SGE_DATA = 0, /*!< data address, not last */ | |
87 | BFI_SGE_DATA_CPL = 1, /*!< data addr, last in current page */ | |
88 | BFI_SGE_DATA_LAST = 3, /*!< data address, last */ | |
89 | BFI_SGE_LINK = 2, /*!< link address */ | |
90 | BFI_SGE_PGDLEN = 2, /*!< cumulative data length for page */ | |
91 | }; | |
92 | ||
93 | /** | |
94 | * DMA addresses | |
95 | */ | |
96 | union bfi_addr_u { | |
97 | struct { | |
98 | u32 addr_lo; | |
99 | u32 addr_hi; | |
100 | } a32; | |
101 | }; | |
102 | ||
103 | /** | |
104 | * Scatter Gather Element | |
105 | */ | |
106 | struct bfi_sge { | |
107 | #ifdef __BIGENDIAN | |
108 | u32 flags:2, | |
109 | rsvd:2, | |
110 | sg_len:28; | |
111 | #else | |
112 | u32 sg_len:28, | |
113 | rsvd:2, | |
114 | flags:2; | |
115 | #endif | |
116 | union bfi_addr_u sga; | |
117 | }; | |
118 | ||
119 | /** | |
120 | * Scatter Gather Page | |
121 | */ | |
122 | #define BFI_SGPG_DATA_SGES 7 | |
123 | #define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1) | |
124 | #define BFI_SGPG_RSVD_WD_LEN 8 | |
125 | struct bfi_sgpg { | |
126 | struct bfi_sge sges[BFI_SGPG_SGES_MAX]; | |
127 | u32 rsvd[BFI_SGPG_RSVD_WD_LEN]; | |
128 | }; | |
129 | ||
130 | /* | |
131 | * Large Message structure - 128 Bytes size Msgs | |
132 | */ | |
133 | #define BFI_LMSG_SZ 128 | |
134 | #define BFI_LMSG_PL_WSZ \ | |
135 | ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4) | |
136 | ||
137 | struct bfi_msg { | |
138 | struct bfi_mhdr mhdr; | |
139 | u32 pl[BFI_LMSG_PL_WSZ]; | |
140 | }; | |
141 | ||
142 | /** | |
143 | * Mailbox message structure | |
144 | */ | |
145 | #define BFI_MBMSG_SZ 7 | |
146 | struct bfi_mbmsg { | |
147 | struct bfi_mhdr mh; | |
148 | u32 pl[BFI_MBMSG_SZ]; | |
149 | }; | |
150 | ||
151 | /** | |
152 | * Message Classes | |
153 | */ | |
154 | enum bfi_mclass { | |
155 | BFI_MC_IOC = 1, /*!< IO Controller (IOC) */ | |
156 | BFI_MC_DIAG = 2, /*!< Diagnostic Msgs */ | |
157 | BFI_MC_FLASH = 3, /*!< Flash message class */ | |
158 | BFI_MC_CEE = 4, /*!< CEE */ | |
159 | BFI_MC_FCPORT = 5, /*!< FC port */ | |
160 | BFI_MC_IOCFC = 6, /*!< FC - IO Controller (IOC) */ | |
161 | BFI_MC_LL = 7, /*!< Link Layer */ | |
162 | BFI_MC_UF = 8, /*!< Unsolicited frame receive */ | |
163 | BFI_MC_FCXP = 9, /*!< FC Transport */ | |
164 | BFI_MC_LPS = 10, /*!< lport fc login services */ | |
165 | BFI_MC_RPORT = 11, /*!< Remote port */ | |
166 | BFI_MC_ITNIM = 12, /*!< I-T nexus (Initiator mode) */ | |
167 | BFI_MC_IOIM_READ = 13, /*!< read IO (Initiator mode) */ | |
168 | BFI_MC_IOIM_WRITE = 14, /*!< write IO (Initiator mode) */ | |
169 | BFI_MC_IOIM_IO = 15, /*!< IO (Initiator mode) */ | |
170 | BFI_MC_IOIM = 16, /*!< IO (Initiator mode) */ | |
171 | BFI_MC_IOIM_IOCOM = 17, /*!< good IO completion */ | |
172 | BFI_MC_TSKIM = 18, /*!< Initiator Task management */ | |
173 | BFI_MC_SBOOT = 19, /*!< SAN boot services */ | |
174 | BFI_MC_IPFC = 20, /*!< IP over FC Msgs */ | |
175 | BFI_MC_PORT = 21, /*!< Physical port */ | |
176 | BFI_MC_SFP = 22, /*!< SFP module */ | |
177 | BFI_MC_MSGQ = 23, /*!< MSGQ */ | |
178 | BFI_MC_ENET = 24, /*!< ENET commands/responses */ | |
179 | BFI_MC_MAX = 32 | |
180 | }; | |
181 | ||
182 | #define BFI_IOC_MAX_CQS 4 | |
183 | #define BFI_IOC_MAX_CQS_ASIC 8 | |
184 | #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */ | |
185 | ||
186 | #define BFI_BOOT_TYPE_OFF 8 | |
187 | #define BFI_BOOT_PARAM_OFF 12 | |
188 | ||
189 | #define BFI_BOOT_TYPE_NORMAL 0 /* param is device id */ | |
190 | #define BFI_BOOT_TYPE_FLASH 1 | |
191 | #define BFI_BOOT_TYPE_MEMTEST 2 | |
192 | ||
193 | #define BFI_BOOT_MEMTEST_RES_ADDR 0x900 | |
194 | #define BFI_BOOT_MEMTEST_RES_SIG 0xA0A1A2A3 | |
195 | ||
196 | /** | |
197 | *---------------------------------------------------------------------- | |
198 | * IOC | |
199 | *---------------------------------------------------------------------- | |
200 | */ | |
201 | ||
202 | enum bfi_ioc_h2i_msgs { | |
203 | BFI_IOC_H2I_ENABLE_REQ = 1, | |
204 | BFI_IOC_H2I_DISABLE_REQ = 2, | |
205 | BFI_IOC_H2I_GETATTR_REQ = 3, | |
206 | BFI_IOC_H2I_DBG_SYNC = 4, | |
207 | BFI_IOC_H2I_DBG_DUMP = 5, | |
208 | }; | |
209 | ||
210 | enum bfi_ioc_i2h_msgs { | |
211 | BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1), | |
212 | BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2), | |
213 | BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3), | |
214 | BFI_IOC_I2H_READY_EVENT = BFA_I2HM(4), | |
215 | BFI_IOC_I2H_HBEAT = BFA_I2HM(5), | |
216 | }; | |
217 | ||
218 | /** | |
219 | * BFI_IOC_H2I_GETATTR_REQ message | |
220 | */ | |
221 | struct bfi_ioc_getattr_req { | |
222 | struct bfi_mhdr mh; | |
223 | union bfi_addr_u attr_addr; | |
224 | }; | |
225 | ||
226 | struct bfi_ioc_attr { | |
227 | u64 mfg_pwwn; /*!< Mfg port wwn */ | |
228 | u64 mfg_nwwn; /*!< Mfg node wwn */ | |
229 | mac_t mfg_mac; /*!< Mfg mac */ | |
230 | u16 rsvd_a; | |
231 | u64 pwwn; | |
232 | u64 nwwn; | |
233 | mac_t mac; /*!< PBC or Mfg mac */ | |
234 | u16 rsvd_b; | |
235 | mac_t fcoe_mac; | |
236 | u16 rsvd_c; | |
237 | char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; | |
238 | u8 pcie_gen; | |
239 | u8 pcie_lanes_orig; | |
240 | u8 pcie_lanes; | |
241 | u8 rx_bbcredit; /*!< receive buffer credits */ | |
242 | u32 adapter_prop; /*!< adapter properties */ | |
243 | u16 maxfrsize; /*!< max receive frame size */ | |
244 | char asic_rev; | |
245 | u8 rsvd_d; | |
246 | char fw_version[BFA_VERSION_LEN]; | |
247 | char optrom_version[BFA_VERSION_LEN]; | |
248 | struct bfa_mfg_vpd vpd; | |
249 | u32 card_type; /*!< card type */ | |
250 | }; | |
251 | ||
252 | /** | |
253 | * BFI_IOC_I2H_GETATTR_REPLY message | |
254 | */ | |
255 | struct bfi_ioc_getattr_reply { | |
256 | struct bfi_mhdr mh; /*!< Common msg header */ | |
257 | u8 status; /*!< cfg reply status */ | |
258 | u8 rsvd[3]; | |
259 | }; | |
260 | ||
261 | /** | |
262 | * Firmware memory page offsets | |
263 | */ | |
264 | #define BFI_IOC_SMEM_PG0_CB (0x40) | |
265 | #define BFI_IOC_SMEM_PG0_CT (0x180) | |
266 | ||
267 | /** | |
268 | * Firmware statistic offset | |
269 | */ | |
270 | #define BFI_IOC_FWSTATS_OFF (0x6B40) | |
271 | #define BFI_IOC_FWSTATS_SZ (4096) | |
272 | ||
273 | /** | |
274 | * Firmware trace offset | |
275 | */ | |
276 | #define BFI_IOC_TRC_OFF (0x4b00) | |
277 | #define BFI_IOC_TRC_ENTS 256 | |
278 | ||
279 | #define BFI_IOC_FW_SIGNATURE (0xbfadbfad) | |
280 | #define BFI_IOC_MD5SUM_SZ 4 | |
281 | struct bfi_ioc_image_hdr { | |
282 | u32 signature; /*!< constant signature */ | |
283 | u32 rsvd_a; | |
284 | u32 exec; /*!< exec vector */ | |
285 | u32 param; /*!< parameters */ | |
286 | u32 rsvd_b[4]; | |
287 | u32 md5sum[BFI_IOC_MD5SUM_SZ]; | |
288 | }; | |
289 | ||
290 | /** | |
291 | * BFI_IOC_I2H_READY_EVENT message | |
292 | */ | |
293 | struct bfi_ioc_rdy_event { | |
294 | struct bfi_mhdr mh; /*!< common msg header */ | |
295 | u8 init_status; /*!< init event status */ | |
296 | u8 rsvd[3]; | |
297 | }; | |
298 | ||
299 | struct bfi_ioc_hbeat { | |
300 | struct bfi_mhdr mh; /*!< common msg header */ | |
301 | u32 hb_count; /*!< current heart beat count */ | |
302 | }; | |
303 | ||
304 | /** | |
305 | * IOC hardware/firmware state | |
306 | */ | |
307 | enum bfi_ioc_state { | |
308 | BFI_IOC_UNINIT = 0, /*!< not initialized */ | |
309 | BFI_IOC_INITING = 1, /*!< h/w is being initialized */ | |
310 | BFI_IOC_HWINIT = 2, /*!< h/w is initialized */ | |
311 | BFI_IOC_CFG = 3, /*!< IOC configuration in progress */ | |
312 | BFI_IOC_OP = 4, /*!< IOC is operational */ | |
313 | BFI_IOC_DISABLING = 5, /*!< IOC is being disabled */ | |
314 | BFI_IOC_DISABLED = 6, /*!< IOC is disabled */ | |
315 | BFI_IOC_CFG_DISABLED = 7, /*!< IOC is being disabled;transient */ | |
316 | BFI_IOC_FAIL = 8, /*!< IOC heart-beat failure */ | |
317 | BFI_IOC_MEMTEST = 9, /*!< IOC is doing memtest */ | |
318 | }; | |
319 | ||
320 | #define BFI_IOC_ENDIAN_SIG 0x12345678 | |
321 | ||
322 | enum { | |
323 | BFI_ADAPTER_TYPE_FC = 0x01, /*!< FC adapters */ | |
324 | BFI_ADAPTER_TYPE_MK = 0x0f0000, /*!< adapter type mask */ | |
325 | BFI_ADAPTER_TYPE_SH = 16, /*!< adapter type shift */ | |
326 | BFI_ADAPTER_NPORTS_MK = 0xff00, /*!< number of ports mask */ | |
327 | BFI_ADAPTER_NPORTS_SH = 8, /*!< number of ports shift */ | |
328 | BFI_ADAPTER_SPEED_MK = 0xff, /*!< adapter speed mask */ | |
329 | BFI_ADAPTER_SPEED_SH = 0, /*!< adapter speed shift */ | |
330 | BFI_ADAPTER_PROTO = 0x100000, /*!< prototype adapaters */ | |
331 | BFI_ADAPTER_TTV = 0x200000, /*!< TTV debug capable */ | |
332 | BFI_ADAPTER_UNSUPP = 0x400000, /*!< unknown adapter type */ | |
333 | }; | |
334 | ||
335 | #define BFI_ADAPTER_GETP(__prop, __adap_prop) \ | |
336 | (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \ | |
337 | BFI_ADAPTER_ ## __prop ## _SH) | |
338 | #define BFI_ADAPTER_SETP(__prop, __val) \ | |
339 | ((__val) << BFI_ADAPTER_ ## __prop ## _SH) | |
340 | #define BFI_ADAPTER_IS_PROTO(__adap_type) \ | |
341 | ((__adap_type) & BFI_ADAPTER_PROTO) | |
342 | #define BFI_ADAPTER_IS_TTV(__adap_type) \ | |
343 | ((__adap_type) & BFI_ADAPTER_TTV) | |
344 | #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \ | |
345 | ((__adap_type) & BFI_ADAPTER_UNSUPP) | |
346 | #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \ | |
347 | ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \ | |
348 | BFI_ADAPTER_UNSUPP)) | |
349 | ||
350 | /** | |
351 | * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages | |
352 | */ | |
353 | struct bfi_ioc_ctrl_req { | |
354 | struct bfi_mhdr mh; | |
355 | u8 ioc_class; | |
356 | u8 rsvd[3]; | |
357 | u32 tv_sec; | |
358 | }; | |
359 | ||
360 | /** | |
361 | * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages | |
362 | */ | |
363 | struct bfi_ioc_ctrl_reply { | |
364 | struct bfi_mhdr mh; /*!< Common msg header */ | |
365 | u8 status; /*!< enable/disable status */ | |
366 | u8 rsvd[3]; | |
367 | }; | |
368 | ||
369 | #define BFI_IOC_MSGSZ 8 | |
370 | /** | |
371 | * H2I Messages | |
372 | */ | |
373 | union bfi_ioc_h2i_msg_u { | |
374 | struct bfi_mhdr mh; | |
375 | struct bfi_ioc_ctrl_req enable_req; | |
376 | struct bfi_ioc_ctrl_req disable_req; | |
377 | struct bfi_ioc_getattr_req getattr_req; | |
378 | u32 mboxmsg[BFI_IOC_MSGSZ]; | |
379 | }; | |
380 | ||
381 | /** | |
382 | * I2H Messages | |
383 | */ | |
384 | union bfi_ioc_i2h_msg_u { | |
385 | struct bfi_mhdr mh; | |
386 | struct bfi_ioc_rdy_event rdy_event; | |
387 | u32 mboxmsg[BFI_IOC_MSGSZ]; | |
388 | }; | |
389 | ||
390 | #pragma pack() | |
391 | ||
392 | #endif /* __BFI_H__ */ |