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8b230ed8 RM |
1 | /* |
2 | * Linux network driver for Brocade Converged Network Adapter. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License (GPL) Version 2 as | |
6 | * published by the Free Software Foundation | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | /* | |
14 | * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. | |
15 | * All rights reserved | |
16 | * www.brocade.com | |
17 | */ | |
18 | #ifndef __BNAD_H__ | |
19 | #define __BNAD_H__ | |
20 | ||
21 | #include <linux/rtnetlink.h> | |
22 | #include <linux/workqueue.h> | |
23 | #include <linux/ipv6.h> | |
24 | #include <linux/etherdevice.h> | |
25 | #include <linux/mutex.h> | |
26 | #include <linux/firmware.h> | |
27 | ||
28 | /* Fix for IA64 */ | |
29 | #include <asm/checksum.h> | |
30 | #include <net/ip6_checksum.h> | |
31 | ||
32 | #include <net/ip.h> | |
33 | #include <net/tcp.h> | |
34 | ||
35 | #include "bna.h" | |
36 | ||
37 | #define BNAD_TXQ_DEPTH 2048 | |
38 | #define BNAD_RXQ_DEPTH 2048 | |
39 | ||
40 | #define BNAD_MAX_TXS 1 | |
41 | #define BNAD_MAX_TXQ_PER_TX 8 /* 8 priority queues */ | |
42 | #define BNAD_TXQ_NUM 1 | |
43 | ||
44 | #define BNAD_MAX_RXS 1 | |
45 | #define BNAD_MAX_RXPS_PER_RX 16 | |
46 | ||
47 | /* | |
48 | * Control structure pointed to ccb->ctrl, which | |
49 | * determines the NAPI / LRO behavior CCB | |
50 | * There is 1:1 corres. between ccb & ctrl | |
51 | */ | |
52 | struct bnad_rx_ctrl { | |
53 | struct bna_ccb *ccb; | |
be7fa326 | 54 | unsigned long flags; |
8b230ed8 RM |
55 | struct napi_struct napi; |
56 | }; | |
57 | ||
58 | #define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC | |
59 | ||
60 | #define BNAD_GET_TX_ID(_skb) (0) | |
61 | ||
62 | /* | |
63 | * GLOBAL #defines (CONSTANTS) | |
64 | */ | |
65 | #define BNAD_NAME "bna" | |
66 | #define BNAD_NAME_LEN 64 | |
67 | ||
a1a5da57 | 68 | #define BNAD_VERSION "2.3.2.3" |
8b230ed8 RM |
69 | |
70 | #define BNAD_MAILBOX_MSIX_VECTORS 1 | |
71 | ||
72 | #define BNAD_STATS_TIMER_FREQ 1000 /* in msecs */ | |
73 | #define BNAD_DIM_TIMER_FREQ 1000 /* in msecs */ | |
74 | ||
75 | #define BNAD_MAX_Q_DEPTH 0x10000 | |
76 | #define BNAD_MIN_Q_DEPTH 0x200 | |
77 | ||
78 | #define BNAD_JUMBO_MTU 9000 | |
79 | ||
80 | #define BNAD_NETIF_WAKE_THRESHOLD 8 | |
81 | ||
82 | #define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3 | |
83 | ||
84 | /* Bit positions for tcb->flags */ | |
85 | #define BNAD_TXQ_FREE_SENT 0 | |
be7fa326 | 86 | #define BNAD_TXQ_TX_STARTED 1 |
8b230ed8 RM |
87 | |
88 | /* Bit positions for rcb->flags */ | |
89 | #define BNAD_RXQ_REFILL 0 | |
90 | #define BNAD_RXQ_STARTED 1 | |
91 | ||
92 | /* | |
93 | * DATA STRUCTURES | |
94 | */ | |
95 | ||
96 | /* enums */ | |
97 | enum bnad_intr_source { | |
98 | BNAD_INTR_TX = 1, | |
99 | BNAD_INTR_RX = 2 | |
100 | }; | |
101 | ||
102 | enum bnad_link_state { | |
103 | BNAD_LS_DOWN = 0, | |
104 | BNAD_LS_UP = 1 | |
105 | }; | |
106 | ||
107 | struct bnad_completion { | |
108 | struct completion ioc_comp; | |
109 | struct completion ucast_comp; | |
110 | struct completion mcast_comp; | |
111 | struct completion tx_comp; | |
112 | struct completion rx_comp; | |
113 | struct completion stats_comp; | |
114 | struct completion port_comp; | |
115 | ||
116 | u8 ioc_comp_status; | |
117 | u8 ucast_comp_status; | |
118 | u8 mcast_comp_status; | |
119 | u8 tx_comp_status; | |
120 | u8 rx_comp_status; | |
121 | u8 stats_comp_status; | |
122 | u8 port_comp_status; | |
123 | }; | |
124 | ||
125 | /* Tx Rx Control Stats */ | |
126 | struct bnad_drv_stats { | |
127 | u64 netif_queue_stop; | |
128 | u64 netif_queue_wakeup; | |
f7c0fa4c | 129 | u64 netif_queue_stopped; |
8b230ed8 RM |
130 | u64 tso4; |
131 | u64 tso6; | |
132 | u64 tso_err; | |
133 | u64 tcpcsum_offload; | |
134 | u64 udpcsum_offload; | |
135 | u64 csum_help; | |
136 | u64 csum_help_err; | |
137 | ||
138 | u64 hw_stats_updates; | |
139 | u64 netif_rx_schedule; | |
140 | u64 netif_rx_complete; | |
141 | u64 netif_rx_dropped; | |
142 | ||
143 | u64 link_toggle; | |
144 | u64 cee_up; | |
145 | ||
146 | u64 rxp_info_alloc_failed; | |
147 | u64 mbox_intr_disabled; | |
148 | u64 mbox_intr_enabled; | |
149 | u64 tx_unmap_q_alloc_failed; | |
150 | u64 rx_unmap_q_alloc_failed; | |
151 | ||
152 | u64 rxbuf_alloc_failed; | |
153 | }; | |
154 | ||
155 | /* Complete driver stats */ | |
156 | struct bnad_stats { | |
157 | struct bnad_drv_stats drv_stats; | |
158 | struct bna_stats *bna_stats; | |
159 | }; | |
160 | ||
161 | /* Tx / Rx Resources */ | |
162 | struct bnad_tx_res_info { | |
163 | struct bna_res_info res_info[BNA_TX_RES_T_MAX]; | |
164 | }; | |
165 | ||
166 | struct bnad_rx_res_info { | |
167 | struct bna_res_info res_info[BNA_RX_RES_T_MAX]; | |
168 | }; | |
169 | ||
170 | struct bnad_tx_info { | |
171 | struct bna_tx *tx; /* 1:1 between tx_info & tx */ | |
172 | struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX]; | |
173 | } ____cacheline_aligned; | |
174 | ||
175 | struct bnad_rx_info { | |
176 | struct bna_rx *rx; /* 1:1 between rx_info & rx */ | |
177 | ||
178 | struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXPS_PER_RX]; | |
179 | } ____cacheline_aligned; | |
180 | ||
181 | /* Unmap queues for Tx / Rx cleanup */ | |
182 | struct bnad_skb_unmap { | |
183 | struct sk_buff *skb; | |
184 | DECLARE_PCI_UNMAP_ADDR(dma_addr) | |
185 | }; | |
186 | ||
187 | struct bnad_unmap_q { | |
188 | u32 producer_index; | |
189 | u32 consumer_index; | |
190 | u32 q_depth; | |
191 | /* This should be the last one */ | |
192 | struct bnad_skb_unmap unmap_array[1]; | |
193 | }; | |
194 | ||
195 | /* Bit mask values for bnad->cfg_flags */ | |
196 | #define BNAD_CF_DIM_ENABLED 0x01 /* DIM */ | |
197 | #define BNAD_CF_PROMISC 0x02 | |
198 | #define BNAD_CF_ALLMULTI 0x04 | |
199 | #define BNAD_CF_MSIX 0x08 /* If in MSIx mode */ | |
200 | ||
201 | /* Defines for run_flags bit-mask */ | |
202 | /* Set, tested & cleared using xxx_bit() functions */ | |
203 | /* Values indicated bit positions */ | |
204 | #define BNAD_RF_CEE_RUNNING 1 | |
be7fa326 RM |
205 | #define BNAD_RF_MBOX_IRQ_DISABLED 2 |
206 | #define BNAD_RF_RX_STARTED 3 | |
207 | #define BNAD_RF_DIM_TIMER_RUNNING 4 | |
208 | #define BNAD_RF_STATS_TIMER_RUNNING 5 | |
209 | #define BNAD_RF_TX_SHUTDOWN_DELAYED 6 | |
210 | #define BNAD_RF_RX_SHUTDOWN_DELAYED 7 | |
8b230ed8 RM |
211 | |
212 | struct bnad { | |
213 | struct net_device *netdev; | |
214 | ||
215 | /* Data path */ | |
216 | struct bnad_tx_info tx_info[BNAD_MAX_TXS]; | |
217 | struct bnad_rx_info rx_info[BNAD_MAX_RXS]; | |
218 | ||
219 | struct vlan_group *vlan_grp; | |
220 | /* | |
221 | * These q numbers are global only because | |
222 | * they are used to calculate MSIx vectors. | |
223 | * Actually the exact # of queues are per Tx/Rx | |
224 | * object. | |
225 | */ | |
226 | u32 num_tx; | |
227 | u32 num_rx; | |
228 | u32 num_txq_per_tx; | |
229 | u32 num_rxp_per_rx; | |
230 | ||
231 | u32 txq_depth; | |
232 | u32 rxq_depth; | |
233 | ||
234 | u8 tx_coalescing_timeo; | |
235 | u8 rx_coalescing_timeo; | |
236 | ||
237 | struct bna_rx_config rx_config[BNAD_MAX_RXS]; | |
238 | struct bna_tx_config tx_config[BNAD_MAX_TXS]; | |
239 | ||
240 | u32 rx_csum; | |
241 | ||
242 | void __iomem *bar0; /* BAR0 address */ | |
243 | ||
244 | struct bna bna; | |
245 | ||
246 | u32 cfg_flags; | |
247 | unsigned long run_flags; | |
248 | ||
249 | struct pci_dev *pcidev; | |
250 | u64 mmio_start; | |
251 | u64 mmio_len; | |
252 | ||
253 | u32 msix_num; | |
8b230ed8 RM |
254 | struct msix_entry *msix_table; |
255 | ||
256 | struct mutex conf_mutex; | |
257 | spinlock_t bna_lock ____cacheline_aligned; | |
258 | ||
259 | /* Timers */ | |
260 | struct timer_list ioc_timer; | |
261 | struct timer_list dim_timer; | |
262 | struct timer_list stats_timer; | |
263 | ||
264 | /* Control path resources, memory & irq */ | |
265 | struct bna_res_info res_info[BNA_RES_T_MAX]; | |
266 | struct bnad_tx_res_info tx_res_info[BNAD_MAX_TXS]; | |
267 | struct bnad_rx_res_info rx_res_info[BNAD_MAX_RXS]; | |
268 | ||
269 | struct bnad_completion bnad_completions; | |
270 | ||
271 | /* Burnt in MAC address */ | |
272 | mac_t perm_addr; | |
273 | ||
274 | struct tasklet_struct tx_free_tasklet; | |
275 | ||
276 | /* Statistics */ | |
277 | struct bnad_stats stats; | |
8b230ed8 RM |
278 | |
279 | struct bnad_diag *diag; | |
280 | ||
281 | char adapter_name[BNAD_NAME_LEN]; | |
282 | char port_name[BNAD_NAME_LEN]; | |
283 | char mbox_irq_name[BNAD_NAME_LEN]; | |
284 | }; | |
285 | ||
286 | /* | |
287 | * EXTERN VARIABLES | |
288 | */ | |
289 | extern struct firmware *bfi_fw; | |
290 | extern u32 bnad_rxqs_per_cq; | |
291 | ||
292 | /* | |
293 | * EXTERN PROTOTYPES | |
294 | */ | |
295 | extern u32 *cna_get_firmware_buf(struct pci_dev *pdev); | |
296 | /* Netdev entry point prototypes */ | |
297 | extern void bnad_set_ethtool_ops(struct net_device *netdev); | |
298 | ||
299 | /* Configuration & setup */ | |
300 | extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad); | |
301 | extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad); | |
302 | ||
303 | extern int bnad_setup_rx(struct bnad *bnad, uint rx_id); | |
304 | extern int bnad_setup_tx(struct bnad *bnad, uint tx_id); | |
305 | extern void bnad_cleanup_tx(struct bnad *bnad, uint tx_id); | |
306 | extern void bnad_cleanup_rx(struct bnad *bnad, uint rx_id); | |
307 | ||
308 | /* Timer start/stop protos */ | |
309 | extern void bnad_dim_timer_start(struct bnad *bnad); | |
310 | ||
311 | /* Statistics */ | |
f7c0fa4c RM |
312 | extern void bnad_netdev_qstats_fill(struct bnad *bnad, |
313 | struct rtnl_link_stats64 *stats); | |
314 | extern void bnad_netdev_hwstats_fill(struct bnad *bnad, | |
315 | struct rtnl_link_stats64 *stats); | |
8b230ed8 RM |
316 | |
317 | /** | |
318 | * MACROS | |
319 | */ | |
320 | /* To set & get the stats counters */ | |
321 | #define BNAD_UPDATE_CTR(_bnad, _ctr) \ | |
322 | (((_bnad)->stats.drv_stats._ctr)++) | |
323 | ||
324 | #define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr) | |
325 | ||
326 | #define bnad_enable_rx_irq_unsafe(_ccb) \ | |
327 | { \ | |
be7fa326 RM |
328 | if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))) {\ |
329 | bna_ib_coalescing_timer_set((_ccb)->i_dbell, \ | |
330 | (_ccb)->rx_coalescing_timeo); \ | |
331 | bna_ib_ack((_ccb)->i_dbell, 0); \ | |
332 | } \ | |
8b230ed8 RM |
333 | } |
334 | ||
335 | #define bnad_dim_timer_running(_bnad) \ | |
336 | (((_bnad)->cfg_flags & BNAD_CF_DIM_ENABLED) && \ | |
337 | (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &((_bnad)->run_flags)))) | |
338 | ||
339 | #endif /* __BNAD_H__ */ |