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38034518 WG |
1 | /* |
2 | * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com> | |
e6d9c80b | 3 | * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com> |
38034518 WG |
4 | * |
5 | * Derived from the PCAN project file driver/src/pcan_pci.c: | |
6 | * | |
7 | * Copyright (C) 2001-2006 PEAK System-Technik GmbH | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the version 2 of the GNU General Public License | |
11 | * as published by the Free Software Foundation | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
38034518 WG |
17 | */ |
18 | ||
19 | #include <linux/kernel.h> | |
38034518 WG |
20 | #include <linux/module.h> |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/netdevice.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/pci.h> | |
25 | #include <linux/io.h> | |
e6d9c80b SG |
26 | #include <linux/i2c.h> |
27 | #include <linux/i2c-algo-bit.h> | |
38034518 WG |
28 | #include <linux/can.h> |
29 | #include <linux/can/dev.h> | |
30 | ||
31 | #include "sja1000.h" | |
32 | ||
fc09e367 | 33 | MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>"); |
e6d9c80b SG |
34 | MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards"); |
35 | MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards"); | |
fc09e367 | 36 | MODULE_SUPPORTED_DEVICE("PEAK PCAN miniPCIe/cPCI PC/104+ PCI/104e CAN Cards"); |
38034518 WG |
37 | MODULE_LICENSE("GPL v2"); |
38 | ||
39 | #define DRV_NAME "peak_pci" | |
40 | ||
e6d9c80b | 41 | struct peak_pciec_card; |
38034518 | 42 | struct peak_pci_chan { |
29830406 SG |
43 | void __iomem *cfg_base; /* Common for all channels */ |
44 | struct net_device *prev_dev; /* Chain of network devices */ | |
45 | u16 icr_mask; /* Interrupt mask for fast ack */ | |
e6d9c80b | 46 | struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */ |
38034518 WG |
47 | }; |
48 | ||
49 | #define PEAK_PCI_CAN_CLOCK (16000000 / 2) | |
50 | ||
51 | #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK) | |
52 | #define PEAK_PCI_OCR OCR_TX0_PUSHPULL | |
53 | ||
54 | /* | |
55 | * Important PITA registers | |
56 | */ | |
57 | #define PITA_ICR 0x00 /* Interrupt control register */ | |
58 | #define PITA_GPIOICR 0x18 /* GPIO interface control register */ | |
59 | #define PITA_MISC 0x1C /* Miscellaneous register */ | |
60 | ||
61 | #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */ | |
62 | #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */ | |
63 | ||
64 | #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */ | |
65 | #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */ | |
e6d9c80b SG |
66 | #define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */ |
67 | #define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */ | |
fc09e367 SG |
68 | #define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */ |
69 | #define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */ | |
70 | #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */ | |
71 | #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */ | |
72 | #define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */ | |
e6d9c80b SG |
73 | |
74 | #define PEAK_PCI_CHAN_MAX 4 | |
38034518 | 75 | |
e6d9c80b SG |
76 | static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = { |
77 | 0x02, 0x01, 0x40, 0x80 | |
78 | }; | |
38034518 WG |
79 | |
80 | static DEFINE_PCI_DEVICE_TABLE(peak_pci_tbl) = { | |
81 | {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, | |
e6d9c80b SG |
82 | {PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
83 | {PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, | |
fc09e367 SG |
84 | {PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
85 | {PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, | |
86 | {PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, | |
87 | {PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, | |
e6d9c80b SG |
88 | #ifdef CONFIG_CAN_PEAK_PCIEC |
89 | {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, | |
90 | #endif | |
38034518 WG |
91 | {0,} |
92 | }; | |
93 | ||
94 | MODULE_DEVICE_TABLE(pci, peak_pci_tbl); | |
95 | ||
e6d9c80b SG |
96 | #ifdef CONFIG_CAN_PEAK_PCIEC |
97 | /* | |
98 | * PCAN-ExpressCard needs I2C bit-banging configuration option. | |
99 | */ | |
100 | ||
101 | /* GPIOICR byte access offsets */ | |
102 | #define PITA_GPOUT 0x18 /* GPx output value */ | |
103 | #define PITA_GPIN 0x19 /* GPx input value */ | |
104 | #define PITA_GPOEN 0x1A /* configure GPx as ouput pin */ | |
105 | ||
106 | /* I2C GP bits */ | |
107 | #define PITA_GPIN_SCL 0x01 /* Serial Clock Line */ | |
108 | #define PITA_GPIN_SDA 0x04 /* Serial DAta line */ | |
109 | ||
110 | #define PCA9553_1_SLAVEADDR (0xC4 >> 1) | |
111 | ||
112 | /* PCA9553 LS0 fields values */ | |
113 | enum { | |
114 | PCA9553_LOW, | |
115 | PCA9553_HIGHZ, | |
116 | PCA9553_PWM0, | |
117 | PCA9553_PWM1 | |
118 | }; | |
119 | ||
120 | /* LEDs control */ | |
121 | #define PCA9553_ON PCA9553_LOW | |
122 | #define PCA9553_OFF PCA9553_HIGHZ | |
123 | #define PCA9553_SLOW PCA9553_PWM0 | |
124 | #define PCA9553_FAST PCA9553_PWM1 | |
125 | ||
126 | #define PCA9553_LED(c) (1 << (c)) | |
127 | #define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1)) | |
128 | ||
129 | #define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c) | |
130 | #define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c) | |
131 | #define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c) | |
132 | #define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c) | |
133 | #define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c) | |
134 | ||
135 | #define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1)) | |
136 | ||
137 | #define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */ | |
138 | ||
139 | struct peak_pciec_chan { | |
140 | struct net_device *netdev; | |
141 | unsigned long prev_rx_bytes; | |
142 | unsigned long prev_tx_bytes; | |
143 | }; | |
144 | ||
145 | struct peak_pciec_card { | |
146 | void __iomem *cfg_base; /* Common for all channels */ | |
147 | void __iomem *reg_base; /* first channel base address */ | |
148 | u8 led_cache; /* leds state cache */ | |
149 | ||
150 | /* PCIExpressCard i2c data */ | |
151 | struct i2c_algo_bit_data i2c_bit; | |
152 | struct i2c_adapter led_chip; | |
153 | struct delayed_work led_work; /* led delayed work */ | |
154 | int chan_count; | |
155 | struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX]; | |
156 | }; | |
157 | ||
158 | /* "normal" pci register write callback is overloaded for leds control */ | |
159 | static void peak_pci_write_reg(const struct sja1000_priv *priv, | |
160 | int port, u8 val); | |
161 | ||
162 | static inline void pita_set_scl_highz(struct peak_pciec_card *card) | |
163 | { | |
164 | u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL; | |
165 | writeb(gp_outen, card->cfg_base + PITA_GPOEN); | |
166 | } | |
167 | ||
168 | static inline void pita_set_sda_highz(struct peak_pciec_card *card) | |
169 | { | |
170 | u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA; | |
171 | writeb(gp_outen, card->cfg_base + PITA_GPOEN); | |
172 | } | |
173 | ||
174 | static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card) | |
175 | { | |
176 | /* raise SCL & SDA GPIOs to high-Z */ | |
177 | pita_set_scl_highz(card); | |
178 | pita_set_sda_highz(card); | |
179 | } | |
180 | ||
181 | static void pita_setsda(void *data, int state) | |
182 | { | |
183 | struct peak_pciec_card *card = (struct peak_pciec_card *)data; | |
184 | u8 gp_out, gp_outen; | |
185 | ||
186 | /* set output sda always to 0 */ | |
187 | gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA; | |
188 | writeb(gp_out, card->cfg_base + PITA_GPOUT); | |
189 | ||
190 | /* control output sda with GPOEN */ | |
191 | gp_outen = readb(card->cfg_base + PITA_GPOEN); | |
192 | if (state) | |
193 | gp_outen &= ~PITA_GPIN_SDA; | |
194 | else | |
195 | gp_outen |= PITA_GPIN_SDA; | |
196 | ||
197 | writeb(gp_outen, card->cfg_base + PITA_GPOEN); | |
198 | } | |
199 | ||
200 | static void pita_setscl(void *data, int state) | |
201 | { | |
202 | struct peak_pciec_card *card = (struct peak_pciec_card *)data; | |
203 | u8 gp_out, gp_outen; | |
204 | ||
205 | /* set output scl always to 0 */ | |
206 | gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL; | |
207 | writeb(gp_out, card->cfg_base + PITA_GPOUT); | |
208 | ||
209 | /* control output scl with GPOEN */ | |
210 | gp_outen = readb(card->cfg_base + PITA_GPOEN); | |
211 | if (state) | |
212 | gp_outen &= ~PITA_GPIN_SCL; | |
213 | else | |
214 | gp_outen |= PITA_GPIN_SCL; | |
215 | ||
216 | writeb(gp_outen, card->cfg_base + PITA_GPOEN); | |
217 | } | |
218 | ||
219 | static int pita_getsda(void *data) | |
220 | { | |
221 | struct peak_pciec_card *card = (struct peak_pciec_card *)data; | |
222 | ||
223 | /* set tristate */ | |
224 | pita_set_sda_highz(card); | |
225 | ||
226 | return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0; | |
227 | } | |
228 | ||
229 | static int pita_getscl(void *data) | |
230 | { | |
231 | struct peak_pciec_card *card = (struct peak_pciec_card *)data; | |
232 | ||
233 | /* set tristate */ | |
234 | pita_set_scl_highz(card); | |
235 | ||
236 | return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0; | |
237 | } | |
238 | ||
239 | /* | |
240 | * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC | |
241 | */ | |
242 | static int peak_pciec_write_pca9553(struct peak_pciec_card *card, | |
243 | u8 offset, u8 data) | |
244 | { | |
245 | u8 buffer[2] = { | |
246 | offset, | |
247 | data | |
248 | }; | |
249 | struct i2c_msg msg = { | |
250 | .addr = PCA9553_1_SLAVEADDR, | |
251 | .len = 2, | |
252 | .buf = buffer, | |
253 | }; | |
254 | int ret; | |
255 | ||
256 | /* cache led mask */ | |
257 | if ((offset == 5) && (data == card->led_cache)) | |
258 | return 0; | |
259 | ||
260 | ret = i2c_transfer(&card->led_chip, &msg, 1); | |
261 | if (ret < 0) | |
262 | return ret; | |
263 | ||
264 | if (offset == 5) | |
265 | card->led_cache = data; | |
266 | ||
267 | return 0; | |
268 | } | |
269 | ||
270 | /* | |
271 | * delayed work callback used to control the LEDs | |
272 | */ | |
273 | static void peak_pciec_led_work(struct work_struct *work) | |
274 | { | |
275 | struct peak_pciec_card *card = | |
276 | container_of(work, struct peak_pciec_card, led_work.work); | |
277 | struct net_device *netdev; | |
278 | u8 new_led = card->led_cache; | |
279 | int i, up_count = 0; | |
280 | ||
281 | /* first check what is to do */ | |
282 | for (i = 0; i < card->chan_count; i++) { | |
283 | /* default is: not configured */ | |
284 | new_led &= ~PCA9553_LED_MASK(i); | |
285 | new_led |= PCA9553_LED_ON(i); | |
286 | ||
287 | netdev = card->channel[i].netdev; | |
288 | if (!netdev || !(netdev->flags & IFF_UP)) | |
289 | continue; | |
290 | ||
291 | up_count++; | |
292 | ||
293 | /* no activity (but configured) */ | |
294 | new_led &= ~PCA9553_LED_MASK(i); | |
295 | new_led |= PCA9553_LED_SLOW(i); | |
296 | ||
297 | /* if bytes counters changed, set fast blinking led */ | |
298 | if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) { | |
299 | card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes; | |
300 | new_led &= ~PCA9553_LED_MASK(i); | |
301 | new_led |= PCA9553_LED_FAST(i); | |
302 | } | |
303 | if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) { | |
304 | card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes; | |
305 | new_led &= ~PCA9553_LED_MASK(i); | |
306 | new_led |= PCA9553_LED_FAST(i); | |
307 | } | |
308 | } | |
309 | ||
310 | /* check if LS0 settings changed, only update i2c if so */ | |
311 | peak_pciec_write_pca9553(card, 5, new_led); | |
312 | ||
313 | /* restart timer (except if no more configured channels) */ | |
314 | if (up_count) | |
315 | schedule_delayed_work(&card->led_work, HZ); | |
316 | } | |
317 | ||
318 | /* | |
319 | * set LEDs blinking state | |
320 | */ | |
321 | static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s) | |
322 | { | |
323 | u8 new_led = card->led_cache; | |
324 | int i; | |
325 | ||
326 | /* first check what is to do */ | |
327 | for (i = 0; i < card->chan_count; i++) | |
328 | if (led_mask & PCA9553_LED(i)) { | |
329 | new_led &= ~PCA9553_LED_MASK(i); | |
330 | new_led |= PCA9553_LED_STATE(s, i); | |
331 | } | |
332 | ||
333 | /* check if LS0 settings changed, only update i2c if so */ | |
334 | peak_pciec_write_pca9553(card, 5, new_led); | |
335 | } | |
336 | ||
337 | /* | |
338 | * start one second delayed work to control LEDs | |
339 | */ | |
340 | static void peak_pciec_start_led_work(struct peak_pciec_card *card) | |
341 | { | |
1cab3f9f | 342 | schedule_delayed_work(&card->led_work, HZ); |
e6d9c80b SG |
343 | } |
344 | ||
345 | /* | |
346 | * stop LEDs delayed work | |
347 | */ | |
348 | static void peak_pciec_stop_led_work(struct peak_pciec_card *card) | |
349 | { | |
350 | cancel_delayed_work_sync(&card->led_work); | |
351 | } | |
352 | ||
353 | /* | |
354 | * initialize the PCA9553 4-bit I2C-bus LED chip | |
355 | */ | |
356 | static int peak_pciec_init_leds(struct peak_pciec_card *card) | |
357 | { | |
358 | int err; | |
359 | ||
360 | /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */ | |
361 | err = peak_pciec_write_pca9553(card, 1, 44 / 1); | |
362 | if (err) | |
363 | return err; | |
364 | ||
365 | /* duty cycle 0: 50% */ | |
366 | err = peak_pciec_write_pca9553(card, 2, 0x80); | |
367 | if (err) | |
368 | return err; | |
369 | ||
370 | /* prescaler for frequency 1: "FAST" = 5 Hz */ | |
371 | err = peak_pciec_write_pca9553(card, 3, 44 / 5); | |
372 | if (err) | |
373 | return err; | |
374 | ||
375 | /* duty cycle 1: 50% */ | |
376 | err = peak_pciec_write_pca9553(card, 4, 0x80); | |
377 | if (err) | |
378 | return err; | |
379 | ||
380 | /* switch LEDs to initial state */ | |
381 | return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT); | |
382 | } | |
383 | ||
384 | /* | |
385 | * restore LEDs state to off peak_pciec_leds_exit | |
386 | */ | |
387 | static void peak_pciec_leds_exit(struct peak_pciec_card *card) | |
388 | { | |
389 | /* switch LEDs to off */ | |
390 | peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL); | |
391 | } | |
392 | ||
393 | /* | |
394 | * normal write sja1000 register method overloaded to catch when controller | |
395 | * is started or stopped, to control leds | |
396 | */ | |
397 | static void peak_pciec_write_reg(const struct sja1000_priv *priv, | |
398 | int port, u8 val) | |
399 | { | |
400 | struct peak_pci_chan *chan = priv->priv; | |
401 | struct peak_pciec_card *card = chan->pciec_card; | |
402 | int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE; | |
403 | ||
404 | /* sja1000 register changes control the leds state */ | |
06e1d1d7 | 405 | if (port == SJA1000_MOD) |
e6d9c80b SG |
406 | switch (val) { |
407 | case MOD_RM: | |
408 | /* Reset Mode: set led on */ | |
409 | peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON); | |
410 | break; | |
411 | case 0x00: | |
412 | /* Normal Mode: led slow blinking and start led timer */ | |
413 | peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW); | |
414 | peak_pciec_start_led_work(card); | |
415 | break; | |
416 | default: | |
417 | break; | |
418 | } | |
419 | ||
420 | /* call base function */ | |
421 | peak_pci_write_reg(priv, port, val); | |
422 | } | |
423 | ||
424 | static struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = { | |
425 | .setsda = pita_setsda, | |
426 | .setscl = pita_setscl, | |
427 | .getsda = pita_getsda, | |
428 | .getscl = pita_getscl, | |
429 | .udelay = 10, | |
430 | .timeout = HZ, | |
431 | }; | |
432 | ||
433 | static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) | |
434 | { | |
435 | struct sja1000_priv *priv = netdev_priv(dev); | |
436 | struct peak_pci_chan *chan = priv->priv; | |
437 | struct peak_pciec_card *card; | |
438 | int err; | |
439 | ||
440 | /* copy i2c object address from 1st channel */ | |
441 | if (chan->prev_dev) { | |
442 | struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev); | |
443 | struct peak_pci_chan *prev_chan = prev_priv->priv; | |
444 | ||
445 | card = prev_chan->pciec_card; | |
446 | if (!card) | |
447 | return -ENODEV; | |
448 | ||
449 | /* channel is the first one: do the init part */ | |
450 | } else { | |
451 | /* create the bit banging I2C adapter structure */ | |
452 | card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL); | |
09da6c5f | 453 | if (!card) |
e6d9c80b | 454 | return -ENOMEM; |
e6d9c80b SG |
455 | |
456 | card->cfg_base = chan->cfg_base; | |
457 | card->reg_base = priv->reg_base; | |
458 | ||
459 | card->led_chip.owner = THIS_MODULE; | |
460 | card->led_chip.dev.parent = &pdev->dev; | |
461 | card->led_chip.algo_data = &card->i2c_bit; | |
462 | strncpy(card->led_chip.name, "peak_i2c", | |
463 | sizeof(card->led_chip.name)); | |
464 | ||
465 | card->i2c_bit = peak_pciec_i2c_bit_ops; | |
466 | card->i2c_bit.udelay = 10; | |
467 | card->i2c_bit.timeout = HZ; | |
468 | card->i2c_bit.data = card; | |
469 | ||
470 | peak_pciec_init_pita_gpio(card); | |
471 | ||
472 | err = i2c_bit_add_bus(&card->led_chip); | |
473 | if (err) { | |
474 | dev_err(&pdev->dev, "i2c init failed\n"); | |
475 | goto pciec_init_err_1; | |
476 | } | |
477 | ||
478 | err = peak_pciec_init_leds(card); | |
479 | if (err) { | |
480 | dev_err(&pdev->dev, "leds hardware init failed\n"); | |
481 | goto pciec_init_err_2; | |
482 | } | |
483 | ||
484 | INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work); | |
485 | /* PCAN-ExpressCard needs its own callback for leds */ | |
486 | priv->write_reg = peak_pciec_write_reg; | |
487 | } | |
488 | ||
489 | chan->pciec_card = card; | |
490 | card->channel[card->chan_count++].netdev = dev; | |
491 | ||
492 | return 0; | |
493 | ||
494 | pciec_init_err_2: | |
495 | i2c_del_adapter(&card->led_chip); | |
496 | ||
497 | pciec_init_err_1: | |
498 | peak_pciec_init_pita_gpio(card); | |
499 | kfree(card); | |
500 | ||
501 | return err; | |
502 | } | |
503 | ||
504 | static void peak_pciec_remove(struct peak_pciec_card *card) | |
505 | { | |
506 | peak_pciec_stop_led_work(card); | |
507 | peak_pciec_leds_exit(card); | |
508 | i2c_del_adapter(&card->led_chip); | |
509 | peak_pciec_init_pita_gpio(card); | |
510 | kfree(card); | |
511 | } | |
512 | ||
513 | #else /* CONFIG_CAN_PEAK_PCIEC */ | |
514 | ||
515 | /* | |
516 | * Placebo functions when PCAN-ExpressCard support is not selected | |
517 | */ | |
518 | static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) | |
519 | { | |
520 | return -ENODEV; | |
521 | } | |
522 | ||
523 | static inline void peak_pciec_remove(struct peak_pciec_card *card) | |
524 | { | |
525 | } | |
526 | #endif /* CONFIG_CAN_PEAK_PCIEC */ | |
527 | ||
38034518 WG |
528 | static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port) |
529 | { | |
530 | return readb(priv->reg_base + (port << 2)); | |
531 | } | |
532 | ||
533 | static void peak_pci_write_reg(const struct sja1000_priv *priv, | |
534 | int port, u8 val) | |
535 | { | |
536 | writeb(val, priv->reg_base + (port << 2)); | |
537 | } | |
538 | ||
539 | static void peak_pci_post_irq(const struct sja1000_priv *priv) | |
540 | { | |
541 | struct peak_pci_chan *chan = priv->priv; | |
542 | u16 icr; | |
543 | ||
544 | /* Select and clear in PITA stored interrupt */ | |
545 | icr = readw(chan->cfg_base + PITA_ICR); | |
546 | if (icr & chan->icr_mask) | |
547 | writew(chan->icr_mask, chan->cfg_base + PITA_ICR); | |
548 | } | |
549 | ||
1dd06ae8 | 550 | static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
38034518 WG |
551 | { |
552 | struct sja1000_priv *priv; | |
553 | struct peak_pci_chan *chan; | |
29830406 | 554 | struct net_device *dev; |
38034518 WG |
555 | void __iomem *cfg_base, *reg_base; |
556 | u16 sub_sys_id, icr; | |
557 | int i, err, channels; | |
558 | ||
559 | err = pci_enable_device(pdev); | |
560 | if (err) | |
561 | return err; | |
562 | ||
563 | err = pci_request_regions(pdev, DRV_NAME); | |
564 | if (err) | |
565 | goto failure_disable_pci; | |
566 | ||
567 | err = pci_read_config_word(pdev, 0x2e, &sub_sys_id); | |
568 | if (err) | |
569 | goto failure_release_regions; | |
570 | ||
571 | dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n", | |
572 | pdev->vendor, pdev->device, sub_sys_id); | |
573 | ||
574 | err = pci_write_config_word(pdev, 0x44, 0); | |
575 | if (err) | |
576 | goto failure_release_regions; | |
577 | ||
578 | if (sub_sys_id >= 12) | |
579 | channels = 4; | |
580 | else if (sub_sys_id >= 10) | |
581 | channels = 3; | |
582 | else if (sub_sys_id >= 4) | |
583 | channels = 2; | |
584 | else | |
585 | channels = 1; | |
586 | ||
587 | cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE); | |
588 | if (!cfg_base) { | |
589 | dev_err(&pdev->dev, "failed to map PCI resource #0\n"); | |
4a4bfdcd | 590 | err = -ENOMEM; |
38034518 WG |
591 | goto failure_release_regions; |
592 | } | |
593 | ||
594 | reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels); | |
595 | if (!reg_base) { | |
596 | dev_err(&pdev->dev, "failed to map PCI resource #1\n"); | |
4a4bfdcd | 597 | err = -ENOMEM; |
38034518 WG |
598 | goto failure_unmap_cfg_base; |
599 | } | |
600 | ||
601 | /* Set GPIO control register */ | |
602 | writew(0x0005, cfg_base + PITA_GPIOICR + 2); | |
603 | /* Enable all channels of this card */ | |
604 | writeb(0x00, cfg_base + PITA_GPIOICR); | |
605 | /* Toggle reset */ | |
606 | writeb(0x05, cfg_base + PITA_MISC + 3); | |
607 | mdelay(5); | |
608 | /* Leave parport mux mode */ | |
609 | writeb(0x04, cfg_base + PITA_MISC + 3); | |
610 | ||
611 | icr = readw(cfg_base + PITA_ICR + 2); | |
612 | ||
613 | for (i = 0; i < channels; i++) { | |
614 | dev = alloc_sja1000dev(sizeof(struct peak_pci_chan)); | |
615 | if (!dev) { | |
616 | err = -ENOMEM; | |
617 | goto failure_remove_channels; | |
618 | } | |
619 | ||
620 | priv = netdev_priv(dev); | |
621 | chan = priv->priv; | |
622 | ||
623 | chan->cfg_base = cfg_base; | |
624 | priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE; | |
625 | ||
626 | priv->read_reg = peak_pci_read_reg; | |
627 | priv->write_reg = peak_pci_write_reg; | |
628 | priv->post_irq = peak_pci_post_irq; | |
629 | ||
630 | priv->can.clock.freq = PEAK_PCI_CAN_CLOCK; | |
631 | priv->ocr = PEAK_PCI_OCR; | |
632 | priv->cdr = PEAK_PCI_CDR; | |
633 | /* Neither a slave nor a single device distributes the clock */ | |
634 | if (channels == 1 || i > 0) | |
635 | priv->cdr |= CDR_CLK_OFF; | |
636 | ||
637 | /* Setup interrupt handling */ | |
638 | priv->irq_flags = IRQF_SHARED; | |
639 | dev->irq = pdev->irq; | |
640 | ||
641 | chan->icr_mask = peak_pci_icr_masks[i]; | |
642 | icr |= chan->icr_mask; | |
643 | ||
644 | SET_NETDEV_DEV(dev, &pdev->dev); | |
645 | ||
e6d9c80b SG |
646 | /* Create chain of SJA1000 devices */ |
647 | chan->prev_dev = pci_get_drvdata(pdev); | |
648 | pci_set_drvdata(pdev, dev); | |
649 | ||
650 | /* | |
651 | * PCAN-ExpressCard needs some additional i2c init. | |
652 | * This must be done *before* register_sja1000dev() but | |
653 | * *after* devices linkage | |
654 | */ | |
655 | if (pdev->device == PEAK_PCIEC_DEVICE_ID) { | |
656 | err = peak_pciec_probe(pdev, dev); | |
657 | if (err) { | |
658 | dev_err(&pdev->dev, | |
659 | "failed to probe device (err %d)\n", | |
660 | err); | |
661 | goto failure_free_dev; | |
662 | } | |
663 | } | |
664 | ||
38034518 WG |
665 | err = register_sja1000dev(dev); |
666 | if (err) { | |
667 | dev_err(&pdev->dev, "failed to register device\n"); | |
e6d9c80b | 668 | goto failure_free_dev; |
38034518 WG |
669 | } |
670 | ||
38034518 WG |
671 | dev_info(&pdev->dev, |
672 | "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n", | |
673 | dev->name, priv->reg_base, chan->cfg_base, dev->irq); | |
674 | } | |
675 | ||
38034518 WG |
676 | /* Enable interrupts */ |
677 | writew(icr, cfg_base + PITA_ICR + 2); | |
678 | ||
679 | return 0; | |
680 | ||
e6d9c80b SG |
681 | failure_free_dev: |
682 | pci_set_drvdata(pdev, chan->prev_dev); | |
683 | free_sja1000dev(dev); | |
684 | ||
38034518 WG |
685 | failure_remove_channels: |
686 | /* Disable interrupts */ | |
687 | writew(0x0, cfg_base + PITA_ICR + 2); | |
688 | ||
e6d9c80b | 689 | chan = NULL; |
29830406 | 690 | for (dev = pci_get_drvdata(pdev); dev; dev = chan->prev_dev) { |
38034518 WG |
691 | unregister_sja1000dev(dev); |
692 | free_sja1000dev(dev); | |
693 | priv = netdev_priv(dev); | |
694 | chan = priv->priv; | |
38034518 WG |
695 | } |
696 | ||
e6d9c80b SG |
697 | /* free any PCIeC resources too */ |
698 | if (chan && chan->pciec_card) | |
699 | peak_pciec_remove(chan->pciec_card); | |
700 | ||
38034518 WG |
701 | pci_iounmap(pdev, reg_base); |
702 | ||
703 | failure_unmap_cfg_base: | |
704 | pci_iounmap(pdev, cfg_base); | |
705 | ||
706 | failure_release_regions: | |
707 | pci_release_regions(pdev); | |
708 | ||
709 | failure_disable_pci: | |
710 | pci_disable_device(pdev); | |
711 | ||
712 | return err; | |
713 | } | |
714 | ||
3c8ac0f2 | 715 | static void peak_pci_remove(struct pci_dev *pdev) |
38034518 | 716 | { |
29830406 | 717 | struct net_device *dev = pci_get_drvdata(pdev); /* Last device */ |
38034518 WG |
718 | struct sja1000_priv *priv = netdev_priv(dev); |
719 | struct peak_pci_chan *chan = priv->priv; | |
720 | void __iomem *cfg_base = chan->cfg_base; | |
721 | void __iomem *reg_base = priv->reg_base; | |
722 | ||
723 | /* Disable interrupts */ | |
724 | writew(0x0, cfg_base + PITA_ICR + 2); | |
725 | ||
726 | /* Loop over all registered devices */ | |
727 | while (1) { | |
728 | dev_info(&pdev->dev, "removing device %s\n", dev->name); | |
729 | unregister_sja1000dev(dev); | |
730 | free_sja1000dev(dev); | |
29830406 | 731 | dev = chan->prev_dev; |
e6d9c80b SG |
732 | |
733 | if (!dev) { | |
734 | /* do that only for first channel */ | |
735 | if (chan->pciec_card) | |
736 | peak_pciec_remove(chan->pciec_card); | |
38034518 | 737 | break; |
e6d9c80b | 738 | } |
38034518 WG |
739 | priv = netdev_priv(dev); |
740 | chan = priv->priv; | |
741 | } | |
742 | ||
743 | pci_iounmap(pdev, reg_base); | |
744 | pci_iounmap(pdev, cfg_base); | |
745 | pci_release_regions(pdev); | |
746 | pci_disable_device(pdev); | |
747 | ||
748 | pci_set_drvdata(pdev, NULL); | |
749 | } | |
750 | ||
751 | static struct pci_driver peak_pci_driver = { | |
752 | .name = DRV_NAME, | |
753 | .id_table = peak_pci_tbl, | |
754 | .probe = peak_pci_probe, | |
3c8ac0f2 | 755 | .remove = peak_pci_remove, |
38034518 WG |
756 | }; |
757 | ||
fb7944b3 | 758 | module_pci_driver(peak_pci_driver); |