Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6
[deliverable/linux.git] / drivers / net / depca.c
CommitLineData
1da177e4
LT
1/* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux.
2
3 Written 1994, 1995 by David C. Davies.
4
5
6 Copyright 1994 David C. Davies
6aa20a22 7 and
1da177e4 8 United States Government
6aa20a22 9 (as represented by the Director, National Security Agency).
1da177e4
LT
10
11 Copyright 1995 Digital Equipment Corporation.
12
13
14 This software may be used and distributed according to the terms of
15 the GNU General Public License, incorporated herein by reference.
16
17 This driver is written for the Digital Equipment Corporation series
18 of DEPCA and EtherWORKS ethernet cards:
19
20 DEPCA (the original)
21 DE100
22 DE101
23 DE200 Turbo
24 DE201 Turbo
25 DE202 Turbo (TP BNC)
26 DE210
27 DE422 (EISA)
28
29 The driver has been tested on DE100, DE200 and DE202 cards in a
30 relatively busy network. The DE422 has been tested a little.
31
32 This driver will NOT work for the DE203, DE204 and DE205 series of
33 cards, since they have a new custom ASIC in place of the AMD LANCE
34 chip. See the 'ewrk3.c' driver in the Linux source tree for running
35 those cards.
36
37 I have benchmarked the driver with a DE100 at 595kB/s to (542kB/s from)
38 a DECstation 5000/200.
39
40 The author may be reached at davies@maniac.ultranet.com
41
42 =========================================================================
43
44 The driver was originally based on the 'lance.c' driver from Donald
45 Becker which is included with the standard driver distribution for
46 linux. V0.4 is a complete re-write with only the kernel interface
47 remaining from the original code.
48
49 1) Lance.c code in /linux/drivers/net/
50 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook",
51 AMD, 1992 [(800) 222-9323].
52 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
53 AMD, Pub. #17881, May 1993.
54 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA",
55 AMD, Pub. #16907, May 1992
56 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual",
57 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003
58 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual",
59 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003
60 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR
61 Digital Equipment Corporation, 1989
62 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual",
63 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001
6aa20a22 64
1da177e4
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65
66 Peter Bauer's depca.c (V0.5) was referred to when debugging V0.1 of this
67 driver.
68
69 The original DEPCA card requires that the ethernet ROM address counter
70 be enabled to count and has an 8 bit NICSR. The ROM counter enabling is
71 only done when a 0x08 is read as the first address octet (to minimise
72 the chances of writing over some other hardware's I/O register). The
73 NICSR accesses have been changed to byte accesses for all the cards
74 supported by this driver, since there is only one useful bit in the MSB
75 (remote boot timeout) and it is not used. Also, there is a maximum of
76 only 48kB network RAM for this card. My thanks to Torbjorn Lindh for
77 help debugging all this (and holding my feet to the fire until I got it
78 right).
79
80 The DE200 series boards have on-board 64kB RAM for use as a shared
81 memory network buffer. Only the DE100 cards make use of a 2kB buffer
82 mode which has not been implemented in this driver (only the 32kB and
83 64kB modes are supported [16kB/48kB for the original DEPCA]).
84
85 At the most only 2 DEPCA cards can be supported on the ISA bus because
86 there is only provision for two I/O base addresses on each card (0x300
87 and 0x200). The I/O address is detected by searching for a byte sequence
88 in the Ethernet station address PROM at the expected I/O address for the
89 Ethernet PROM. The shared memory base address is 'autoprobed' by
90 looking for the self test PROM and detecting the card name. When a
91 second DEPCA is detected, information is placed in the base_addr
92 variable of the next device structure (which is created if necessary),
93 thus enabling ethif_probe initialization for the device. More than 2
94 EISA cards can be supported, but care will be needed assigning the
95 shared memory to ensure that each slot has the correct IRQ, I/O address
96 and shared memory address assigned.
97
98 ************************************************************************
99
100 NOTE: If you are using two ISA DEPCAs, it is important that you assign
101 the base memory addresses correctly. The driver autoprobes I/O 0x300
102 then 0x200. The base memory address for the first device must be less
103 than that of the second so that the auto probe will correctly assign the
104 I/O and memory addresses on the same card. I can't think of a way to do
105 this unambiguously at the moment, since there is nothing on the cards to
106 tie I/O and memory information together.
107
108 I am unable to test 2 cards together for now, so this code is
109 unchecked. All reports, good or bad, are welcome.
110
111 ************************************************************************
112
113 The board IRQ setting must be at an unused IRQ which is auto-probed
114 using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are
115 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is
116 really IRQ9 in machines with 16 IRQ lines.
117
118 No 16MB memory limitation should exist with this driver as DMA is not
119 used and the common memory area is in low memory on the network card (my
120 current system has 20MB and I've not had problems yet).
121
122 The ability to load this driver as a loadable module has been added. To
123 utilise this ability, you have to do <8 things:
124
125 0) have a copy of the loadable modules code installed on your system.
126 1) copy depca.c from the /linux/drivers/net directory to your favourite
127 temporary directory.
128 2) if you wish, edit the source code near line 1530 to reflect the I/O
129 address and IRQ you're using (see also 5).
130 3) compile depca.c, but include -DMODULE in the command line to ensure
131 that the correct bits are compiled (see end of source code).
132 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
133 kernel with the depca configuration turned off and reboot.
134 5) insmod depca.o [irq=7] [io=0x200] [mem=0xd0000] [adapter_name=DE100]
135 [Alan Cox: Changed the code to allow command line irq/io assignments]
136 [Dave Davies: Changed the code to allow command line mem/name
137 assignments]
6aa20a22
JG
138 6) run the net startup bits for your eth?? interface manually
139 (usually /etc/rc.inet[12] at boot time).
1da177e4
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140 7) enjoy!
141
142 Note that autoprobing is not allowed in loadable modules - the system is
143 already up and running and you're messing with interrupts.
144
6aa20a22 145 To unload a module, turn off the associated interface
1da177e4
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146 'ifconfig eth?? down' then 'rmmod depca'.
147
148 To assign a base memory address for the shared memory when running as a
149 loadable module, see 5 above. To include the adapter name (if you have
150 no PROM but know the card name) also see 5 above. Note that this last
6aa20a22 151 option will not work with kernel built-in depca's.
1da177e4
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152
153 The shared memory assignment for a loadable module makes sense to avoid
154 the 'memory autoprobe' picking the wrong shared memory (for the case of
155 2 depca's in a PC).
156
157 ************************************************************************
158 Support for MCA EtherWORKS cards added 11-3-98.
159 Verified to work with up to 2 DE212 cards in a system (although not
6aa20a22 160 fully stress-tested).
1da177e4
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161
162 Currently known bugs/limitations:
163
164 Note: with the MCA stuff as a module, it trusts the MCA configuration,
165 not the command line for IRQ and memory address. You can
166 specify them if you want, but it will throw your values out.
167 You still have to pass the IO address it was configured as
168 though.
169
170 ************************************************************************
171 TO DO:
172 ------
173
174
175 Revision History
176 ----------------
177
178 Version Date Description
6aa20a22 179
1da177e4
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180 0.1 25-jan-94 Initial writing.
181 0.2 27-jan-94 Added LANCE TX hardware buffer chaining.
182 0.3 1-feb-94 Added multiple DEPCA support.
183 0.31 4-feb-94 Added DE202 recognition.
184 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support.
185 0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable.
186 Add jabber packet fix from murf@perftech.com
187 and becker@super.org
188 0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access.
189 0.35 8-mar-94 Added DE201 recognition. Tidied up.
190 0.351 30-apr-94 Added EISA support. Added DE422 recognition.
191 0.36 16-may-94 DE422 fix released.
192 0.37 22-jul-94 Added MODULE support
6aa20a22 193 0.38 15-aug-94 Added DBR ROM switch in depca_close().
1da177e4
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194 Multi DEPCA bug fix.
195 0.38axp 15-sep-94 Special version for Alpha AXP Linux V1.0.
196 0.381 12-dec-94 Added DE101 recognition, fix multicast bug.
197 0.382 9-feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
198 0.383 22-feb-95 Fix for conflict with VESA SCSI reported by
199 <stromain@alf.dec.com>
200 0.384 17-mar-95 Fix a ring full bug reported by <bkm@star.rl.ac.uk>
6aa20a22 201 0.385 3-apr-95 Fix a recognition bug reported by
1da177e4
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202 <ryan.niemi@lastfrontier.com>
203 0.386 21-apr-95 Fix the last fix...sorry, must be galloping senility
204 0.40 25-May-95 Rewrite for portability & updated.
205 ALPHA support from <jestabro@amt.tay1.dec.com>
206 0.41 26-Jun-95 Added verify_area() calls in depca_ioctl() from
207 suggestion by <heiko@colossus.escape.de>
6aa20a22 208 0.42 27-Dec-95 Add 'mem' shared memory assignment for loadable
1da177e4
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209 modules.
210 Add 'adapter_name' for loadable modules when no PROM.
6aa20a22 211 Both above from a suggestion by
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212 <pchen@woodruffs121.residence.gatech.edu>.
213 Add new multicasting code.
214 0.421 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
215 0.422 29-Apr-96 Fix depca_hw_init() bug <jari@markkus2.fimr.fi>
216 0.423 7-Jun-96 Fix module load bug <kmg@barco.be>
217 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
218 0.44 1-Sep-97 Fix *_probe() to test check_region() first - bug
219 reported by <mmogilvi@elbert.uccs.edu>
220 0.45 3-Nov-98 Added support for MCA EtherWORKS (DE210/DE212) cards
6aa20a22 221 by <tymm@computer.org>
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222 0.451 5-Nov-98 Fixed mca stuff cuz I'm a dummy. <tymm@computer.org>
223 0.5 14-Nov-98 Re-spin for 2.1.x kernels.
224 0.51 27-Jun-99 Correct received packet length for CRC from
225 report by <worm@dkik.dk>
226 0.52 16-Oct-00 Fixes for 2.3 io memory accesses
227 Fix show-stopper (ints left masked) in depca_interrupt
228 by <peterd@pnd-pc.demon.co.uk>
229 0.53 12-Jan-01 Release resources on failure, bss tidbits
230 by acme@conectiva.com.br
231 0.54 08-Nov-01 use library crc32 functions
232 by Matt_Domsch@dell.com
233 0.55 01-Mar-03 Use EISA/sysfs framework <maz@wild-wind.fr.eu.org>
234
235 =========================================================================
236*/
237
1da177e4
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238#include <linux/module.h>
239#include <linux/kernel.h>
d43c36dc 240#include <linux/sched.h>
1da177e4
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241#include <linux/string.h>
242#include <linux/errno.h>
243#include <linux/ioport.h>
244#include <linux/slab.h>
245#include <linux/interrupt.h>
246#include <linux/delay.h>
247#include <linux/init.h>
248#include <linux/crc32.h>
249#include <linux/netdevice.h>
250#include <linux/etherdevice.h>
251#include <linux/skbuff.h>
252#include <linux/time.h>
253#include <linux/types.h>
254#include <linux/unistd.h>
255#include <linux/ctype.h>
256#include <linux/moduleparam.h>
d052d1be 257#include <linux/platform_device.h>
1da177e4
LT
258#include <linux/bitops.h>
259
260#include <asm/uaccess.h>
261#include <asm/io.h>
262#include <asm/dma.h>
263
264#ifdef CONFIG_MCA
265#include <linux/mca.h>
266#endif
267
268#ifdef CONFIG_EISA
269#include <linux/eisa.h>
270#endif
271
272#include "depca.h"
273
274static char version[] __initdata = "depca.c:v0.53 2001/1/12 davies@maniac.ultranet.com\n";
275
276#ifdef DEPCA_DEBUG
277static int depca_debug = DEPCA_DEBUG;
278#else
279static int depca_debug = 1;
280#endif
281
282#define DEPCA_NDA 0xffe0 /* No Device Address */
283
284#define TX_TIMEOUT (1*HZ)
285
286/*
287** Ethernet PROM defines
288*/
289#define PROBE_LENGTH 32
290#define ETH_PROM_SIG 0xAA5500FFUL
291
292/*
293** Set the number of Tx and Rx buffers. Ensure that the memory requested
294** here is <= to the amount of shared memory set up by the board switches.
295** The number of descriptors MUST BE A POWER OF 2.
296**
297** total_memory = NUM_RX_DESC*(8+RX_BUFF_SZ) + NUM_TX_DESC*(8+TX_BUFF_SZ)
298*/
299#define NUM_RX_DESC 8 /* Number of RX descriptors */
300#define NUM_TX_DESC 8 /* Number of TX descriptors */
301#define RX_BUFF_SZ 1536 /* Buffer size for each Rx buffer */
302#define TX_BUFF_SZ 1536 /* Buffer size for each Tx buffer */
303
304/*
305** EISA bus defines
306*/
307#define DEPCA_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
308
309/*
310** ISA Bus defines
311*/
312#define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
313#define DEPCA_TOTAL_SIZE 0x10
314
315static struct {
316 u_long iobase;
317 struct platform_device *device;
318} depca_io_ports[] = {
319 { 0x300, NULL },
320 { 0x200, NULL },
321 { 0 , NULL },
322};
323
324/*
325** Name <-> Adapter mapping
326*/
327#define DEPCA_SIGNATURE {"DEPCA",\
328 "DE100","DE101",\
329 "DE200","DE201","DE202",\
330 "DE210","DE212",\
331 "DE422",\
332 ""}
333
e5cb966c 334static const char* const depca_signature[] __devinitconst = DEPCA_SIGNATURE;
1da177e4
LT
335
336enum depca_type {
337 DEPCA, de100, de101, de200, de201, de202, de210, de212, de422, unknown
338};
339
e5cb966c 340static const char depca_string[] = "depca";
1da177e4
LT
341
342static int depca_device_remove (struct device *device);
343
344#ifdef CONFIG_EISA
e5cb966c 345static const struct eisa_device_id depca_eisa_ids[] __devinitconst = {
1da177e4
LT
346 { "DEC4220", de422 },
347 { "" }
348};
349MODULE_DEVICE_TABLE(eisa, depca_eisa_ids);
350
351static int depca_eisa_probe (struct device *device);
352
353static struct eisa_driver depca_eisa_driver = {
354 .id_table = depca_eisa_ids,
355 .driver = {
356 .name = depca_string,
357 .probe = depca_eisa_probe,
358 .remove = __devexit_p (depca_device_remove)
359 }
360};
361#endif
362
363#ifdef CONFIG_MCA
364/*
365** Adapter ID for the MCA EtherWORKS DE210/212 adapter
366*/
367#define DE210_ID 0x628d
368#define DE212_ID 0x6def
369
e5cb966c 370static const short depca_mca_adapter_ids[] __devinitconst = {
1da177e4
LT
371 DE210_ID,
372 DE212_ID,
373 0x0000
374};
375
e5cb966c 376static const char *depca_mca_adapter_name[] = {
1da177e4
LT
377 "DEC EtherWORKS MC Adapter (DE210)",
378 "DEC EtherWORKS MC Adapter (DE212)",
379 NULL
380};
381
e5cb966c 382static const enum depca_type depca_mca_adapter_type[] = {
1da177e4
LT
383 de210,
384 de212,
385 0
386};
387
388static int depca_mca_probe (struct device *);
389
390static struct mca_driver depca_mca_driver = {
391 .id_table = depca_mca_adapter_ids,
392 .driver = {
393 .name = depca_string,
394 .bus = &mca_bus_type,
395 .probe = depca_mca_probe,
396 .remove = __devexit_p(depca_device_remove),
397 },
398};
399#endif
400
3ae5eaec 401static int depca_isa_probe (struct platform_device *);
1da177e4 402
3ae5eaec
RK
403static int __devexit depca_isa_remove(struct platform_device *pdev)
404{
405 return depca_device_remove(&pdev->dev);
406}
407
408static struct platform_driver depca_isa_driver = {
1da177e4 409 .probe = depca_isa_probe,
3ae5eaec
RK
410 .remove = __devexit_p(depca_isa_remove),
411 .driver = {
412 .name = depca_string,
413 },
1da177e4 414};
6aa20a22 415
1da177e4
LT
416/*
417** Miscellaneous info...
418*/
419#define DEPCA_STRLEN 16
420
421/*
422** Memory Alignment. Each descriptor is 4 longwords long. To force a
423** particular alignment on the TX descriptor, adjust DESC_SKIP_LEN and
424** DESC_ALIGN. DEPCA_ALIGN aligns the start address of the private memory area
6aa20a22 425** and hence the RX descriptor ring's first entry.
1da177e4
LT
426*/
427#define DEPCA_ALIGN4 ((u_long)4 - 1) /* 1 longword align */
428#define DEPCA_ALIGN8 ((u_long)8 - 1) /* 2 longword (quadword) align */
429#define DEPCA_ALIGN DEPCA_ALIGN8 /* Keep the LANCE happy... */
430
431/*
6aa20a22 432** The DEPCA Rx and Tx ring descriptors.
1da177e4
LT
433*/
434struct depca_rx_desc {
435 volatile s32 base;
436 s16 buf_length; /* This length is negative 2's complement! */
437 s16 msg_length; /* This length is "normal". */
438};
439
440struct depca_tx_desc {
441 volatile s32 base;
442 s16 length; /* This length is negative 2's complement! */
443 s16 misc; /* Errors and TDR info */
444};
445
446#define LA_MASK 0x0000ffff /* LANCE address mask for mapping network RAM
447 to LANCE memory address space */
448
449/*
450** The Lance initialization block, described in databook, in common memory.
451*/
452struct depca_init {
453 u16 mode; /* Mode register */
454 u8 phys_addr[ETH_ALEN]; /* Physical ethernet address */
455 u8 mcast_table[8]; /* Multicast Hash Table. */
456 u32 rx_ring; /* Rx ring base pointer & ring length */
457 u32 tx_ring; /* Tx ring base pointer & ring length */
458};
459
460#define DEPCA_PKT_STAT_SZ 16
461#define DEPCA_PKT_BIN_SZ 128 /* Should be >=100 unless you
462 increase DEPCA_PKT_STAT_SZ */
463struct depca_private {
464 char adapter_name[DEPCA_STRLEN]; /* /proc/ioports string */
465 enum depca_type adapter; /* Adapter type */
466 enum {
467 DEPCA_BUS_MCA = 1,
468 DEPCA_BUS_ISA,
469 DEPCA_BUS_EISA,
470 } depca_bus; /* type of bus */
471 struct depca_init init_block; /* Shadow Initialization block */
472/* CPU address space fields */
473 struct depca_rx_desc __iomem *rx_ring; /* Pointer to start of RX descriptor ring */
474 struct depca_tx_desc __iomem *tx_ring; /* Pointer to start of TX descriptor ring */
475 void __iomem *rx_buff[NUM_RX_DESC]; /* CPU virt address of sh'd memory buffs */
476 void __iomem *tx_buff[NUM_TX_DESC]; /* CPU virt address of sh'd memory buffs */
477 void __iomem *sh_mem; /* CPU mapped virt address of device RAM */
478 u_long mem_start; /* Bus address of device RAM (before remap) */
479 u_long mem_len; /* device memory size */
480/* Device address space fields */
481 u_long device_ram_start; /* Start of RAM in device addr space */
482/* Offsets used in both address spaces */
483 u_long rx_ring_offset; /* Offset from start of RAM to rx_ring */
484 u_long tx_ring_offset; /* Offset from start of RAM to tx_ring */
485 u_long buffs_offset; /* LANCE Rx and Tx buffers start address. */
486/* Kernel-only (not device) fields */
487 int rx_new, tx_new; /* The next free ring entry */
488 int rx_old, tx_old; /* The ring entries to be free()ed. */
1da177e4
LT
489 spinlock_t lock;
490 struct { /* Private stats counters */
491 u32 bins[DEPCA_PKT_STAT_SZ];
492 u32 unicast;
493 u32 multicast;
494 u32 broadcast;
495 u32 excessive_collisions;
496 u32 tx_underruns;
497 u32 excessive_underruns;
498 } pktStats;
499 int txRingMask; /* TX ring mask */
500 int rxRingMask; /* RX ring mask */
501 s32 rx_rlen; /* log2(rxRingMask+1) for the descriptors */
502 s32 tx_rlen; /* log2(txRingMask+1) for the descriptors */
503};
504
505/*
506** The transmit ring full condition is described by the tx_old and tx_new
507** pointers by:
508** tx_old = tx_new Empty ring
509** tx_old = tx_new+1 Full ring
510** tx_old+txRingMask = tx_new Full ring (wrapped condition)
511*/
512#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
513 lp->tx_old+lp->txRingMask-lp->tx_new:\
514 lp->tx_old -lp->tx_new-1)
515
516/*
517** Public Functions
518*/
519static int depca_open(struct net_device *dev);
61357325
SH
520static netdev_tx_t depca_start_xmit(struct sk_buff *skb,
521 struct net_device *dev);
7d12e780 522static irqreturn_t depca_interrupt(int irq, void *dev_id);
1da177e4
LT
523static int depca_close(struct net_device *dev);
524static int depca_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
525static void depca_tx_timeout(struct net_device *dev);
1da177e4
LT
526static void set_multicast_list(struct net_device *dev);
527
528/*
529** Private functions
530*/
531static void depca_init_ring(struct net_device *dev);
532static int depca_rx(struct net_device *dev);
533static int depca_tx(struct net_device *dev);
534
535static void LoadCSRs(struct net_device *dev);
536static int InitRestartDepca(struct net_device *dev);
537static int DepcaSignature(char *name, u_long paddr);
538static int DevicePresent(u_long ioaddr);
539static int get_hw_addr(struct net_device *dev);
540static void SetMulticastFilter(struct net_device *dev);
541static int load_packet(struct net_device *dev, struct sk_buff *skb);
542static void depca_dbg_open(struct net_device *dev);
543
e5cb966c
MM
544static const u_char de1xx_irq[] __devinitconst = { 2, 3, 4, 5, 7, 9, 0 };
545static const u_char de2xx_irq[] __devinitconst = { 5, 9, 10, 11, 15, 0 };
546static const u_char de422_irq[] __devinitconst = { 5, 9, 10, 11, 0 };
1da177e4
LT
547
548static int irq;
549static int io;
550static char *adapter_name;
551static int mem; /* For loadable module assignment
552 use insmod mem=0x????? .... */
553module_param (irq, int, 0);
554module_param (io, int, 0);
555module_param (adapter_name, charp, 0);
556module_param (mem, int, 0);
557MODULE_PARM_DESC(irq, "DEPCA IRQ number");
558MODULE_PARM_DESC(io, "DEPCA I/O base address");
559MODULE_PARM_DESC(adapter_name, "DEPCA adapter name");
560MODULE_PARM_DESC(mem, "DEPCA shared memory address");
561MODULE_LICENSE("GPL");
562
563/*
564** Miscellaneous defines...
565*/
566#define STOP_DEPCA \
567 outw(CSR0, DEPCA_ADDR);\
568 outw(STOP, DEPCA_DATA)
569
361bc03e
SH
570static const struct net_device_ops depca_netdev_ops = {
571 .ndo_open = depca_open,
572 .ndo_start_xmit = depca_start_xmit,
573 .ndo_stop = depca_close,
574 .ndo_set_multicast_list = set_multicast_list,
575 .ndo_do_ioctl = depca_ioctl,
576 .ndo_tx_timeout = depca_tx_timeout,
577 .ndo_change_mtu = eth_change_mtu,
578 .ndo_set_mac_address = eth_mac_addr,
579 .ndo_validate_addr = eth_validate_addr,
580};
581
e5cb966c 582static int __devinit depca_hw_init (struct net_device *dev, struct device *device)
1da177e4
LT
583{
584 struct depca_private *lp;
585 int i, j, offset, netRAM, mem_len, status = 0;
586 s16 nicsr;
587 u_long ioaddr;
588 u_long mem_start;
589
590 /*
591 * We are now supposed to enter this function with the
592 * following fields filled with proper values :
593 *
594 * dev->base_addr
595 * lp->mem_start
596 * lp->depca_bus
597 * lp->adapter
598 *
599 * dev->irq can be set if known from device configuration (on
600 * MCA or EISA) or module option. Otherwise, it will be auto
601 * detected.
602 */
603
604 ioaddr = dev->base_addr;
6aa20a22 605
1da177e4
LT
606 STOP_DEPCA;
607
608 nicsr = inb(DEPCA_NICSR);
609 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
610 outb(nicsr, DEPCA_NICSR);
611
612 if (inw(DEPCA_DATA) != STOP) {
613 return -ENXIO;
614 }
615
4cf1653a 616 lp = netdev_priv(dev);
1da177e4
LT
617 mem_start = lp->mem_start;
618
619 if (!mem_start || lp->adapter < DEPCA || lp->adapter >=unknown)
620 return -ENXIO;
621
c2313557
KS
622 printk("%s: %s at 0x%04lx",
623 dev_name(device), depca_signature[lp->adapter], ioaddr);
6aa20a22 624
1da177e4
LT
625 switch (lp->depca_bus) {
626#ifdef CONFIG_MCA
627 case DEPCA_BUS_MCA:
628 printk(" (MCA slot %d)", to_mca_device(device)->slot + 1);
629 break;
630#endif
631
632#ifdef CONFIG_EISA
633 case DEPCA_BUS_EISA:
634 printk(" (EISA slot %d)", to_eisa_device(device)->slot);
635 break;
636#endif
637
638 case DEPCA_BUS_ISA:
639 break;
640
641 default:
642 printk("Unknown DEPCA bus %d\n", lp->depca_bus);
643 return -ENXIO;
644 }
645
646 printk(", h/w address ");
647 status = get_hw_addr(dev);
e174961c 648 printk("%pM", dev->dev_addr);
1da177e4
LT
649 if (status != 0) {
650 printk(" which has an Ethernet PROM CRC error.\n");
651 return -ENXIO;
652 }
1da177e4
LT
653
654 /* Set up the maximum amount of network RAM(kB) */
655 netRAM = ((lp->adapter != DEPCA) ? 64 : 48);
656 if ((nicsr & _128KB) && (lp->adapter == de422))
657 netRAM = 128;
658
659 /* Shared Memory Base Address */
660 if (nicsr & BUF) {
661 nicsr &= ~BS; /* DEPCA RAM in top 32k */
662 netRAM -= 32;
663
664 /* Only EISA/ISA needs start address to be re-computed */
665 if (lp->depca_bus != DEPCA_BUS_MCA)
666 mem_start += 0x8000;
667 }
6aa20a22 668
1da177e4
LT
669 if ((mem_len = (NUM_RX_DESC * (sizeof(struct depca_rx_desc) + RX_BUFF_SZ) + NUM_TX_DESC * (sizeof(struct depca_tx_desc) + TX_BUFF_SZ) + sizeof(struct depca_init)))
670 > (netRAM << 10)) {
671 printk(",\n requests %dkB RAM: only %dkB is available!\n", (mem_len >> 10), netRAM);
672 return -ENXIO;
673 }
674
675 printk(",\n has %dkB RAM at 0x%.5lx", netRAM, mem_start);
676
677 /* Enable the shadow RAM. */
678 if (lp->adapter != DEPCA) {
679 nicsr |= SHE;
680 outb(nicsr, DEPCA_NICSR);
681 }
682
683 spin_lock_init(&lp->lock);
684 sprintf(lp->adapter_name, "%s (%s)",
c2313557 685 depca_signature[lp->adapter], dev_name(device));
1da177e4
LT
686 status = -EBUSY;
687
688 /* Initialisation Block */
689 if (!request_mem_region (mem_start, mem_len, lp->adapter_name)) {
690 printk(KERN_ERR "depca: cannot request ISA memory, aborting\n");
691 goto out_priv;
692 }
6aa20a22 693
1da177e4
LT
694 status = -EIO;
695 lp->sh_mem = ioremap(mem_start, mem_len);
696 if (lp->sh_mem == NULL) {
697 printk(KERN_ERR "depca: cannot remap ISA memory, aborting\n");
698 goto out1;
699 }
700
701 lp->mem_start = mem_start;
702 lp->mem_len = mem_len;
703 lp->device_ram_start = mem_start & LA_MASK;
704
705 offset = 0;
706 offset += sizeof(struct depca_init);
707
708 /* Tx & Rx descriptors (aligned to a quadword boundary) */
709 offset = (offset + DEPCA_ALIGN) & ~DEPCA_ALIGN;
710 lp->rx_ring = (struct depca_rx_desc __iomem *) (lp->sh_mem + offset);
711 lp->rx_ring_offset = offset;
712
713 offset += (sizeof(struct depca_rx_desc) * NUM_RX_DESC);
714 lp->tx_ring = (struct depca_tx_desc __iomem *) (lp->sh_mem + offset);
715 lp->tx_ring_offset = offset;
716
717 offset += (sizeof(struct depca_tx_desc) * NUM_TX_DESC);
718
719 lp->buffs_offset = offset;
720
721 /* Finish initialising the ring information. */
722 lp->rxRingMask = NUM_RX_DESC - 1;
723 lp->txRingMask = NUM_TX_DESC - 1;
724
725 /* Calculate Tx/Rx RLEN size for the descriptors. */
726 for (i = 0, j = lp->rxRingMask; j > 0; i++) {
727 j >>= 1;
728 }
729 lp->rx_rlen = (s32) (i << 29);
730 for (i = 0, j = lp->txRingMask; j > 0; i++) {
731 j >>= 1;
732 }
733 lp->tx_rlen = (s32) (i << 29);
734
735 /* Load the initialisation block */
736 depca_init_ring(dev);
737
738 /* Initialise the control and status registers */
739 LoadCSRs(dev);
740
741 /* Enable DEPCA board interrupts for autoprobing */
742 nicsr = ((nicsr & ~IM) | IEN);
743 outb(nicsr, DEPCA_NICSR);
744
745 /* To auto-IRQ we enable the initialization-done and DMA err,
746 interrupts. For now we will always get a DMA error. */
747 if (dev->irq < 2) {
748 unsigned char irqnum;
749 unsigned long irq_mask, delay;
e5cb966c 750 const u_char *depca_irq;
1da177e4
LT
751
752 irq_mask = probe_irq_on();
753
754 /* Assign the correct irq list */
755 switch (lp->adapter) {
756 case DEPCA:
757 case de100:
758 case de101:
759 depca_irq = de1xx_irq;
760 break;
761 case de200:
762 case de201:
763 case de202:
764 case de210:
765 case de212:
766 depca_irq = de2xx_irq;
767 break;
768 case de422:
769 depca_irq = de422_irq;
770 break;
771
772 default:
e5cb966c 773 depca_irq = NULL;
1da177e4
LT
774 break; /* Not reached */
775 }
776
777 /* Trigger an initialization just for the interrupt. */
778 outw(INEA | INIT, DEPCA_DATA);
779
780 delay = jiffies + HZ/50;
781 while (time_before(jiffies, delay))
782 yield();
783
784 irqnum = probe_irq_off(irq_mask);
785
786 status = -ENXIO;
787 if (!irqnum) {
788 printk(" and failed to detect IRQ line.\n");
789 goto out2;
790 } else {
791 for (dev->irq = 0, i = 0; (depca_irq[i]) && (!dev->irq); i++)
792 if (irqnum == depca_irq[i]) {
793 dev->irq = irqnum;
794 printk(" and uses IRQ%d.\n", dev->irq);
795 }
796
797 if (!dev->irq) {
798 printk(" but incorrect IRQ line detected.\n");
799 goto out2;
800 }
801 }
802 } else {
803 printk(" and assigned IRQ%d.\n", dev->irq);
804 }
805
806 if (depca_debug > 1) {
807 printk(version);
808 }
809
810 /* The DEPCA-specific entries in the device structure. */
361bc03e 811 dev->netdev_ops = &depca_netdev_ops;
1da177e4
LT
812 dev->watchdog_timeo = TX_TIMEOUT;
813
814 dev->mem_start = 0;
815
1aec5bdf 816 dev_set_drvdata(device, dev);
1da177e4 817 SET_NETDEV_DEV (dev, device);
6aa20a22 818
1da177e4
LT
819 status = register_netdev(dev);
820 if (status == 0)
821 return 0;
822out2:
823 iounmap(lp->sh_mem);
824out1:
825 release_mem_region (mem_start, mem_len);
826out_priv:
827 return status;
828}
6aa20a22 829
1da177e4
LT
830
831static int depca_open(struct net_device *dev)
832{
4cf1653a 833 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
834 u_long ioaddr = dev->base_addr;
835 s16 nicsr;
836 int status = 0;
837
838 STOP_DEPCA;
839 nicsr = inb(DEPCA_NICSR);
840
841 /* Make sure the shadow RAM is enabled */
842 if (lp->adapter != DEPCA) {
843 nicsr |= SHE;
844 outb(nicsr, DEPCA_NICSR);
845 }
846
847 /* Re-initialize the DEPCA... */
848 depca_init_ring(dev);
849 LoadCSRs(dev);
850
851 depca_dbg_open(dev);
852
a0607fd3 853 if (request_irq(dev->irq, depca_interrupt, 0, lp->adapter_name, dev)) {
1da177e4
LT
854 printk("depca_open(): Requested IRQ%d is busy\n", dev->irq);
855 status = -EAGAIN;
856 } else {
857
858 /* Enable DEPCA board interrupts and turn off LED */
859 nicsr = ((nicsr & ~IM & ~LED) | IEN);
860 outb(nicsr, DEPCA_NICSR);
861 outw(CSR0, DEPCA_ADDR);
862
863 netif_start_queue(dev);
864
865 status = InitRestartDepca(dev);
866
867 if (depca_debug > 1) {
868 printk("CSR0: 0x%4.4x\n", inw(DEPCA_DATA));
869 printk("nicsr: 0x%02x\n", inb(DEPCA_NICSR));
870 }
871 }
872 return status;
873}
874
875/* Initialize the lance Rx and Tx descriptor rings. */
876static void depca_init_ring(struct net_device *dev)
877{
4cf1653a 878 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
879 u_int i;
880 u_long offset;
881
882 /* Lock out other processes whilst setting up the hardware */
883 netif_stop_queue(dev);
884
885 lp->rx_new = lp->tx_new = 0;
886 lp->rx_old = lp->tx_old = 0;
887
888 /* Initialize the base address and length of each buffer in the ring */
889 for (i = 0; i <= lp->rxRingMask; i++) {
890 offset = lp->buffs_offset + i * RX_BUFF_SZ;
891 writel((lp->device_ram_start + offset) | R_OWN, &lp->rx_ring[i].base);
892 writew(-RX_BUFF_SZ, &lp->rx_ring[i].buf_length);
893 lp->rx_buff[i] = lp->sh_mem + offset;
894 }
895
896 for (i = 0; i <= lp->txRingMask; i++) {
897 offset = lp->buffs_offset + (i + lp->rxRingMask + 1) * TX_BUFF_SZ;
898 writel((lp->device_ram_start + offset) & 0x00ffffff, &lp->tx_ring[i].base);
899 lp->tx_buff[i] = lp->sh_mem + offset;
900 }
901
902 /* Set up the initialization block */
903 lp->init_block.rx_ring = (lp->device_ram_start + lp->rx_ring_offset) | lp->rx_rlen;
904 lp->init_block.tx_ring = (lp->device_ram_start + lp->tx_ring_offset) | lp->tx_rlen;
905
906 SetMulticastFilter(dev);
907
908 for (i = 0; i < ETH_ALEN; i++) {
909 lp->init_block.phys_addr[i] = dev->dev_addr[i];
910 }
911
912 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */
913}
914
915
916static void depca_tx_timeout(struct net_device *dev)
917{
918 u_long ioaddr = dev->base_addr;
919
920 printk("%s: transmit timed out, status %04x, resetting.\n", dev->name, inw(DEPCA_DATA));
921
922 STOP_DEPCA;
923 depca_init_ring(dev);
924 LoadCSRs(dev);
1ae5dc34 925 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT
926 netif_wake_queue(dev);
927 InitRestartDepca(dev);
928}
929
930
6aa20a22
JG
931/*
932** Writes a socket buffer to TX descriptor ring and starts transmission
1da177e4 933*/
61357325
SH
934static netdev_tx_t depca_start_xmit(struct sk_buff *skb,
935 struct net_device *dev)
1da177e4 936{
4cf1653a 937 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
938 u_long ioaddr = dev->base_addr;
939 int status = 0;
940
941 /* Transmitter timeout, serious problems. */
942 if (skb->len < 1)
943 goto out;
944
5b057c6b
HX
945 if (skb_padto(skb, ETH_ZLEN))
946 goto out;
6aa20a22 947
1da177e4
LT
948 netif_stop_queue(dev);
949
950 if (TX_BUFFS_AVAIL) { /* Fill in a Tx ring entry */
951 status = load_packet(dev, skb);
952
953 if (!status) {
954 /* Trigger an immediate send demand. */
955 outw(CSR0, DEPCA_ADDR);
956 outw(INEA | TDMD, DEPCA_DATA);
957
1da177e4
LT
958 dev_kfree_skb(skb);
959 }
960 if (TX_BUFFS_AVAIL)
961 netif_start_queue(dev);
962 } else
5b548140 963 status = NETDEV_TX_LOCKED;
1da177e4
LT
964
965 out:
966 return status;
967}
968
969/*
6aa20a22 970** The DEPCA interrupt handler.
1da177e4 971*/
7d12e780 972static irqreturn_t depca_interrupt(int irq, void *dev_id)
1da177e4
LT
973{
974 struct net_device *dev = dev_id;
975 struct depca_private *lp;
976 s16 csr0, nicsr;
977 u_long ioaddr;
978
979 if (dev == NULL) {
980 printk("depca_interrupt(): irq %d for unknown device.\n", irq);
981 return IRQ_NONE;
982 }
983
4cf1653a 984 lp = netdev_priv(dev);
1da177e4
LT
985 ioaddr = dev->base_addr;
986
987 spin_lock(&lp->lock);
988
989 /* mask the DEPCA board interrupts and turn on the LED */
990 nicsr = inb(DEPCA_NICSR);
991 nicsr |= (IM | LED);
992 outb(nicsr, DEPCA_NICSR);
993
994 outw(CSR0, DEPCA_ADDR);
995 csr0 = inw(DEPCA_DATA);
996
997 /* Acknowledge all of the current interrupt sources ASAP. */
998 outw(csr0 & INTE, DEPCA_DATA);
999
1000 if (csr0 & RINT) /* Rx interrupt (packet arrived) */
1001 depca_rx(dev);
1002
1003 if (csr0 & TINT) /* Tx interrupt (packet sent) */
1004 depca_tx(dev);
1005
1006 /* Any resources available? */
1007 if ((TX_BUFFS_AVAIL >= 0) && netif_queue_stopped(dev)) {
1008 netif_wake_queue(dev);
1009 }
1010
1011 /* Unmask the DEPCA board interrupts and turn off the LED */
1012 nicsr = (nicsr & ~IM & ~LED);
1013 outb(nicsr, DEPCA_NICSR);
1014
1015 spin_unlock(&lp->lock);
1016 return IRQ_HANDLED;
1017}
1018
1019/* Called with lp->lock held */
1020static int depca_rx(struct net_device *dev)
1021{
4cf1653a 1022 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
1023 int i, entry;
1024 s32 status;
1025
1026 for (entry = lp->rx_new; !(readl(&lp->rx_ring[entry].base) & R_OWN); entry = lp->rx_new) {
1027 status = readl(&lp->rx_ring[entry].base) >> 16;
1028 if (status & R_STP) { /* Remember start of frame */
1029 lp->rx_old = entry;
1030 }
1031 if (status & R_ENP) { /* Valid frame status */
1032 if (status & R_ERR) { /* There was an error. */
09f75cd7 1033 dev->stats.rx_errors++; /* Update the error stats. */
1da177e4 1034 if (status & R_FRAM)
09f75cd7 1035 dev->stats.rx_frame_errors++;
1da177e4 1036 if (status & R_OFLO)
09f75cd7 1037 dev->stats.rx_over_errors++;
1da177e4 1038 if (status & R_CRC)
09f75cd7 1039 dev->stats.rx_crc_errors++;
1da177e4 1040 if (status & R_BUFF)
09f75cd7 1041 dev->stats.rx_fifo_errors++;
1da177e4
LT
1042 } else {
1043 short len, pkt_len = readw(&lp->rx_ring[entry].msg_length) - 4;
1044 struct sk_buff *skb;
1045
1046 skb = dev_alloc_skb(pkt_len + 2);
1047 if (skb != NULL) {
1048 unsigned char *buf;
1049 skb_reserve(skb, 2); /* 16 byte align the IP header */
1050 buf = skb_put(skb, pkt_len);
1da177e4
LT
1051 if (entry < lp->rx_old) { /* Wrapped buffer */
1052 len = (lp->rxRingMask - lp->rx_old + 1) * RX_BUFF_SZ;
1053 memcpy_fromio(buf, lp->rx_buff[lp->rx_old], len);
1054 memcpy_fromio(buf + len, lp->rx_buff[0], pkt_len - len);
1055 } else { /* Linear buffer */
1056 memcpy_fromio(buf, lp->rx_buff[lp->rx_old], pkt_len);
1057 }
1058
6aa20a22
JG
1059 /*
1060 ** Notify the upper protocol layers that there is another
1da177e4
LT
1061 ** packet to handle
1062 */
1063 skb->protocol = eth_type_trans(skb, dev);
1064 netif_rx(skb);
1065
1066 /*
1067 ** Update stats
1068 */
09f75cd7
JG
1069 dev->stats.rx_packets++;
1070 dev->stats.rx_bytes += pkt_len;
1da177e4
LT
1071 for (i = 1; i < DEPCA_PKT_STAT_SZ - 1; i++) {
1072 if (pkt_len < (i * DEPCA_PKT_BIN_SZ)) {
1073 lp->pktStats.bins[i]++;
1074 i = DEPCA_PKT_STAT_SZ;
1075 }
1076 }
1077 if (buf[0] & 0x01) { /* Multicast/Broadcast */
1078 if ((*(s16 *) & buf[0] == -1) && (*(s16 *) & buf[2] == -1) && (*(s16 *) & buf[4] == -1)) {
1079 lp->pktStats.broadcast++;
1080 } else {
1081 lp->pktStats.multicast++;
1082 }
1083 } else if ((*(s16 *) & buf[0] == *(s16 *) & dev->dev_addr[0]) && (*(s16 *) & buf[2] == *(s16 *) & dev->dev_addr[2]) && (*(s16 *) & buf[4] == *(s16 *) & dev->dev_addr[4])) {
1084 lp->pktStats.unicast++;
1085 }
1086
1087 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1088 if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1089 memset((char *) &lp->pktStats, 0, sizeof(lp->pktStats));
1090 }
1091 } else {
1092 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
09f75cd7 1093 dev->stats.rx_dropped++; /* Really, deferred. */
1da177e4
LT
1094 break;
1095 }
1096 }
1097 /* Change buffer ownership for this last frame, back to the adapter */
f97f3057 1098 for (; lp->rx_old != entry; lp->rx_old = (lp->rx_old + 1) & lp->rxRingMask) {
1da177e4
LT
1099 writel(readl(&lp->rx_ring[lp->rx_old].base) | R_OWN, &lp->rx_ring[lp->rx_old].base);
1100 }
1101 writel(readl(&lp->rx_ring[entry].base) | R_OWN, &lp->rx_ring[entry].base);
1102 }
1103
1104 /*
1105 ** Update entry information
1106 */
f97f3057 1107 lp->rx_new = (lp->rx_new + 1) & lp->rxRingMask;
1da177e4
LT
1108 }
1109
1110 return 0;
1111}
1112
1113/*
1114** Buffer sent - check for buffer errors.
1115** Called with lp->lock held
1116*/
1117static int depca_tx(struct net_device *dev)
1118{
4cf1653a 1119 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
1120 int entry;
1121 s32 status;
1122 u_long ioaddr = dev->base_addr;
1123
1124 for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) {
1125 status = readl(&lp->tx_ring[entry].base) >> 16;
1126
1127 if (status < 0) { /* Packet not yet sent! */
1128 break;
1129 } else if (status & T_ERR) { /* An error occurred. */
1130 status = readl(&lp->tx_ring[entry].misc);
09f75cd7 1131 dev->stats.tx_errors++;
1da177e4 1132 if (status & TMD3_RTRY)
09f75cd7 1133 dev->stats.tx_aborted_errors++;
1da177e4 1134 if (status & TMD3_LCAR)
09f75cd7 1135 dev->stats.tx_carrier_errors++;
1da177e4 1136 if (status & TMD3_LCOL)
09f75cd7 1137 dev->stats.tx_window_errors++;
1da177e4 1138 if (status & TMD3_UFLO)
09f75cd7 1139 dev->stats.tx_fifo_errors++;
1da177e4
LT
1140 if (status & (TMD3_BUFF | TMD3_UFLO)) {
1141 /* Trigger an immediate send demand. */
1142 outw(CSR0, DEPCA_ADDR);
1143 outw(INEA | TDMD, DEPCA_DATA);
1144 }
1145 } else if (status & (T_MORE | T_ONE)) {
09f75cd7 1146 dev->stats.collisions++;
1da177e4 1147 } else {
09f75cd7 1148 dev->stats.tx_packets++;
1da177e4
LT
1149 }
1150
1151 /* Update all the pointers */
f97f3057 1152 lp->tx_old = (lp->tx_old + 1) & lp->txRingMask;
1da177e4
LT
1153 }
1154
1155 return 0;
1156}
1157
1158static int depca_close(struct net_device *dev)
1159{
4cf1653a 1160 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
1161 s16 nicsr;
1162 u_long ioaddr = dev->base_addr;
1163
1164 netif_stop_queue(dev);
1165
1166 outw(CSR0, DEPCA_ADDR);
1167
1168 if (depca_debug > 1) {
1169 printk("%s: Shutting down ethercard, status was %2.2x.\n", dev->name, inw(DEPCA_DATA));
1170 }
1171
6aa20a22 1172 /*
1da177e4 1173 ** We stop the DEPCA here -- it occasionally polls
6aa20a22 1174 ** memory if we don't.
1da177e4
LT
1175 */
1176 outw(STOP, DEPCA_DATA);
1177
1178 /*
1179 ** Give back the ROM in case the user wants to go to DOS
1180 */
1181 if (lp->adapter != DEPCA) {
1182 nicsr = inb(DEPCA_NICSR);
1183 nicsr &= ~SHE;
1184 outb(nicsr, DEPCA_NICSR);
1185 }
1186
1187 /*
1188 ** Free the associated irq
1189 */
1190 free_irq(dev->irq, dev);
1191 return 0;
1192}
1193
1194static void LoadCSRs(struct net_device *dev)
1195{
4cf1653a 1196 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
1197 u_long ioaddr = dev->base_addr;
1198
1199 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */
1200 outw((u16) lp->device_ram_start, DEPCA_DATA);
1201 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */
1202 outw((u16) (lp->device_ram_start >> 16), DEPCA_DATA);
1203 outw(CSR3, DEPCA_ADDR); /* ALE control */
1204 outw(ACON, DEPCA_DATA);
1205
1206 outw(CSR0, DEPCA_ADDR); /* Point back to CSR0 */
1da177e4
LT
1207}
1208
1209static int InitRestartDepca(struct net_device *dev)
1210{
4cf1653a 1211 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
1212 u_long ioaddr = dev->base_addr;
1213 int i, status = 0;
1214
1215 /* Copy the shadow init_block to shared memory */
1216 memcpy_toio(lp->sh_mem, &lp->init_block, sizeof(struct depca_init));
1217
1218 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1219 outw(INIT, DEPCA_DATA); /* initialize DEPCA */
1220
1221 /* wait for lance to complete initialisation */
1222 for (i = 0; (i < 100) && !(inw(DEPCA_DATA) & IDON); i++);
1223
1224 if (i != 100) {
1225 /* clear IDON by writing a "1", enable interrupts and start lance */
1226 outw(IDON | INEA | STRT, DEPCA_DATA);
1227 if (depca_debug > 2) {
1228 printk("%s: DEPCA open after %d ticks, init block 0x%08lx csr0 %4.4x.\n", dev->name, i, lp->mem_start, inw(DEPCA_DATA));
1229 }
1230 } else {
1231 printk("%s: DEPCA unopen after %d ticks, init block 0x%08lx csr0 %4.4x.\n", dev->name, i, lp->mem_start, inw(DEPCA_DATA));
1232 status = -1;
1233 }
1234
1235 return status;
1236}
1237
1da177e4
LT
1238/*
1239** Set or clear the multicast filter for this adaptor.
1240*/
1241static void set_multicast_list(struct net_device *dev)
1242{
4cf1653a 1243 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
1244 u_long ioaddr = dev->base_addr;
1245
107ce6d2
ES
1246 netif_stop_queue(dev);
1247 while (lp->tx_old != lp->tx_new); /* Wait for the ring to empty */
1da177e4 1248
107ce6d2
ES
1249 STOP_DEPCA; /* Temporarily stop the depca. */
1250 depca_init_ring(dev); /* Initialize the descriptor rings */
1da177e4 1251
107ce6d2
ES
1252 if (dev->flags & IFF_PROMISC) { /* Set promiscuous mode */
1253 lp->init_block.mode |= PROM;
1254 } else {
1255 SetMulticastFilter(dev);
1256 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */
1da177e4 1257 }
107ce6d2
ES
1258
1259 LoadCSRs(dev); /* Reload CSR3 */
1260 InitRestartDepca(dev); /* Resume normal operation. */
1261 netif_start_queue(dev); /* Unlock the TX ring */
1da177e4
LT
1262}
1263
1264/*
1265** Calculate the hash code and update the logical address filter
1266** from a list of ethernet multicast addresses.
1267** Big endian crc one liner is mine, all mine, ha ha ha ha!
1268** LANCE calculates its hash codes big endian.
1269*/
1270static void SetMulticastFilter(struct net_device *dev)
1271{
4cf1653a 1272 struct depca_private *lp = netdev_priv(dev);
22bedad3 1273 struct netdev_hw_addr *ha;
1da177e4
LT
1274 char *addrs;
1275 int i, j, bit, byte;
1276 u16 hashcode;
1277 u32 crc;
1278
1279 if (dev->flags & IFF_ALLMULTI) { /* Set all multicast bits */
1280 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1281 lp->init_block.mcast_table[i] = (char) 0xff;
1282 }
1283 } else {
1284 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) { /* Clear the multicast table */
1285 lp->init_block.mcast_table[i] = 0;
1286 }
1287 /* Add multicast addresses */
22bedad3
JP
1288 netdev_for_each_mc_addr(ha, dev) {
1289 addrs = ha->addr;
1da177e4
LT
1290 if ((*addrs & 0x01) == 1) { /* multicast address? */
1291 crc = ether_crc(ETH_ALEN, addrs);
1292 hashcode = (crc & 1); /* hashcode is 6 LSb of CRC ... */
1293 for (j = 0; j < 5; j++) { /* ... in reverse order. */
1294 hashcode = (hashcode << 1) | ((crc >>= 1) & 1);
1295 }
1296
1297
1298 byte = hashcode >> 3; /* bit[3-5] -> byte in filter */
1299 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1300 lp->init_block.mcast_table[byte] |= bit;
1301 }
1302 }
1303 }
1da177e4
LT
1304}
1305
e5cb966c 1306static int __devinit depca_common_init (u_long ioaddr, struct net_device **devp)
1da177e4
LT
1307{
1308 int status = 0;
6aa20a22 1309
1da177e4
LT
1310 if (!request_region (ioaddr, DEPCA_TOTAL_SIZE, depca_string)) {
1311 status = -EBUSY;
1312 goto out;
1313 }
6aa20a22 1314
1da177e4
LT
1315 if (DevicePresent(ioaddr)) {
1316 status = -ENODEV;
1317 goto out_release;
1318 }
1319
1320 if (!(*devp = alloc_etherdev (sizeof (struct depca_private)))) {
1321 status = -ENOMEM;
1322 goto out_release;
1323 }
1324
1325 return 0;
6aa20a22 1326
1da177e4
LT
1327 out_release:
1328 release_region (ioaddr, DEPCA_TOTAL_SIZE);
1329 out:
1330 return status;
1331}
1332
1333#ifdef CONFIG_MCA
1334/*
1335** Microchannel bus I/O device probe
1336*/
e5cb966c 1337static int __devinit depca_mca_probe(struct device *device)
1da177e4
LT
1338{
1339 unsigned char pos[2];
1340 unsigned char where;
1341 unsigned long iobase, mem_start;
1342 int irq, err;
1343 struct mca_device *mdev = to_mca_device (device);
1344 struct net_device *dev;
1345 struct depca_private *lp;
1346
1347 /*
6aa20a22 1348 ** Search for the adapter. If an address has been given, search
1da177e4
LT
1349 ** specifically for the card at that address. Otherwise find the
1350 ** first card in the system.
1351 */
6aa20a22 1352
1da177e4
LT
1353 pos[0] = mca_device_read_stored_pos(mdev, 2);
1354 pos[1] = mca_device_read_stored_pos(mdev, 3);
1355
1356 /*
6aa20a22 1357 ** IO of card is handled by bits 1 and 2 of pos0.
1da177e4
LT
1358 **
1359 ** bit2 bit1 IO
1360 ** 0 0 0x2c00
1361 ** 0 1 0x2c10
1362 ** 1 0 0x2c20
1363 ** 1 1 0x2c30
1364 */
1365 where = (pos[0] & 6) >> 1;
1366 iobase = 0x2c00 + (0x10 * where);
1367
1368 /*
1369 ** Found the adapter we were looking for. Now start setting it up.
6aa20a22 1370 **
1da177e4
LT
1371 ** First work on decoding the IRQ. It's stored in the lower 4 bits
1372 ** of pos1. Bits are as follows (from the ADF file):
1373 **
6aa20a22
JG
1374 ** Bits
1375 ** 3 2 1 0 IRQ
1da177e4
LT
1376 ** --------------------
1377 ** 0 0 1 0 5
1378 ** 0 0 0 1 9
1379 ** 0 1 0 0 10
1380 ** 1 0 0 0 11
1381 */
1382 where = pos[1] & 0x0f;
1383 switch (where) {
1384 case 1:
1385 irq = 9;
1386 break;
1387 case 2:
1388 irq = 5;
1389 break;
1390 case 4:
1391 irq = 10;
1392 break;
1393 case 8:
1394 irq = 11;
1395 break;
1396 default:
6a6bbd29 1397 printk("%s: mca_probe IRQ error. You should never get here (%d).\n", mdev->name, where);
1da177e4
LT
1398 return -EINVAL;
1399 }
1400
1401 /*
1402 ** Shared memory address of adapter is stored in bits 3-5 of pos0.
1403 ** They are mapped as follows:
1404 **
1405 ** Bit
1406 ** 5 4 3 Memory Addresses
1407 ** 0 0 0 C0000-CFFFF (64K)
1408 ** 1 0 0 C8000-CFFFF (32K)
1409 ** 0 0 1 D0000-DFFFF (64K)
1410 ** 1 0 1 D8000-DFFFF (32K)
1411 ** 0 1 0 E0000-EFFFF (64K)
1412 ** 1 1 0 E8000-EFFFF (32K)
1413 */
1414 where = (pos[0] & 0x18) >> 3;
1415 mem_start = 0xc0000 + (where * 0x10000);
1416 if (pos[0] & 0x20) {
1417 mem_start += 0x8000;
1418 }
1419
1420 /* claim the slot */
1421 strncpy(mdev->name, depca_mca_adapter_name[mdev->index],
1422 sizeof(mdev->name));
1423 mca_device_set_claim(mdev, 1);
6aa20a22 1424
1da177e4
LT
1425 /*
1426 ** Get everything allocated and initialized... (almost just
1427 ** like the ISA and EISA probes)
1428 */
1429 irq = mca_device_transform_irq(mdev, irq);
1430 iobase = mca_device_transform_ioport(mdev, iobase);
1431
1432 if ((err = depca_common_init (iobase, &dev)))
1433 goto out_unclaim;
1434
1435 dev->irq = irq;
1436 dev->base_addr = iobase;
4cf1653a 1437 lp = netdev_priv(dev);
1da177e4
LT
1438 lp->depca_bus = DEPCA_BUS_MCA;
1439 lp->adapter = depca_mca_adapter_type[mdev->index];
1440 lp->mem_start = mem_start;
6aa20a22 1441
1da177e4
LT
1442 if ((err = depca_hw_init(dev, device)))
1443 goto out_free;
6aa20a22 1444
1da177e4
LT
1445 return 0;
1446
1447 out_free:
1448 free_netdev (dev);
1449 release_region (iobase, DEPCA_TOTAL_SIZE);
1450 out_unclaim:
1451 mca_device_set_claim(mdev, 0);
1452
1453 return err;
1454}
1455#endif
1456
1457/*
1458** ISA bus I/O device probe
1459*/
1460
e5cb966c 1461static void __devinit depca_platform_probe (void)
1da177e4
LT
1462{
1463 int i;
1464 struct platform_device *pldev;
1465
1466 for (i = 0; depca_io_ports[i].iobase; i++) {
1467 depca_io_ports[i].device = NULL;
6aa20a22 1468
1da177e4
LT
1469 /* if an address has been specified on the command
1470 * line, use it (if valid) */
1471 if (io && io != depca_io_ports[i].iobase)
1472 continue;
5d994b7f
RK
1473
1474 pldev = platform_device_alloc(depca_string, i);
1475 if (!pldev)
1da177e4
LT
1476 continue;
1477
1da177e4 1478 pldev->dev.platform_data = (void *) depca_io_ports[i].iobase;
1da177e4
LT
1479 depca_io_ports[i].device = pldev;
1480
5d994b7f 1481 if (platform_device_add(pldev)) {
1da177e4 1482 depca_io_ports[i].device = NULL;
d91c088b
AR
1483 pldev->dev.platform_data = NULL;
1484 platform_device_put(pldev);
1da177e4
LT
1485 continue;
1486 }
1487
1488 if (!pldev->dev.driver) {
1489 /* The driver was not bound to this device, there was
1490 * no hardware at this address. Unregister it, as the
eef35c2d 1491 * release function will take care of freeing the
1da177e4 1492 * allocated structure */
6aa20a22 1493
1da177e4 1494 depca_io_ports[i].device = NULL;
5d994b7f 1495 pldev->dev.platform_data = NULL;
1da177e4
LT
1496 platform_device_unregister (pldev);
1497 }
1498 }
1499}
1500
e5cb966c 1501static enum depca_type __devinit depca_shmem_probe (ulong *mem_start)
1da177e4
LT
1502{
1503 u_long mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
1504 enum depca_type adapter = unknown;
1505 int i;
1506
1507 for (i = 0; mem_base[i]; i++) {
1508 *mem_start = mem ? mem : mem_base[i];
1509 adapter = DepcaSignature (adapter_name, *mem_start);
1510 if (adapter != unknown)
1511 break;
1512 }
1513
1514 return adapter;
1515}
1516
ebd80880 1517static int __devinit depca_isa_probe (struct platform_device *device)
1da177e4
LT
1518{
1519 struct net_device *dev;
1520 struct depca_private *lp;
1521 u_long ioaddr, mem_start = 0;
1522 enum depca_type adapter = unknown;
1523 int status = 0;
1524
3ae5eaec 1525 ioaddr = (u_long) device->dev.platform_data;
1da177e4
LT
1526
1527 if ((status = depca_common_init (ioaddr, &dev)))
1528 goto out;
1529
1530 adapter = depca_shmem_probe (&mem_start);
6aa20a22 1531
1da177e4
LT
1532 if (adapter == unknown) {
1533 status = -ENODEV;
1534 goto out_free;
1535 }
1536
1537 dev->base_addr = ioaddr;
1538 dev->irq = irq; /* Use whatever value the user gave
1539 * us, and 0 if he didn't. */
4cf1653a 1540 lp = netdev_priv(dev);
1da177e4
LT
1541 lp->depca_bus = DEPCA_BUS_ISA;
1542 lp->adapter = adapter;
1543 lp->mem_start = mem_start;
6aa20a22 1544
3ae5eaec 1545 if ((status = depca_hw_init(dev, &device->dev)))
1da177e4 1546 goto out_free;
6aa20a22 1547
1da177e4
LT
1548 return 0;
1549
1550 out_free:
1551 free_netdev (dev);
1552 release_region (ioaddr, DEPCA_TOTAL_SIZE);
1553 out:
1554 return status;
1555}
1556
1557/*
1558** EISA callbacks from sysfs.
1559*/
1560
1561#ifdef CONFIG_EISA
e5cb966c 1562static int __devinit depca_eisa_probe (struct device *device)
1da177e4 1563{
99da1a8a 1564 enum depca_type adapter = unknown;
1da177e4
LT
1565 struct eisa_device *edev;
1566 struct net_device *dev;
1567 struct depca_private *lp;
1568 u_long ioaddr, mem_start;
1569 int status = 0;
1570
1571 edev = to_eisa_device (device);
1572 ioaddr = edev->base_addr + DEPCA_EISA_IO_PORTS;
1573
1574 if ((status = depca_common_init (ioaddr, &dev)))
1575 goto out;
1576
1577 /* It would have been nice to get card configuration from the
1578 * card. Unfortunately, this register is write-only (shares
1579 * it's address with the ethernet prom)... As we don't parse
1580 * the EISA configuration structures (yet... :-), just rely on
1581 * the ISA probing to sort it out... */
6aa20a22 1582
99da1a8a
IM
1583 adapter = depca_shmem_probe (&mem_start);
1584 if (adapter == unknown) {
1585 status = -ENODEV;
1586 goto out_free;
1587 }
1da177e4
LT
1588
1589 dev->base_addr = ioaddr;
1590 dev->irq = irq;
4cf1653a 1591 lp = netdev_priv(dev);
1da177e4
LT
1592 lp->depca_bus = DEPCA_BUS_EISA;
1593 lp->adapter = edev->id.driver_data;
1594 lp->mem_start = mem_start;
6aa20a22 1595
1da177e4
LT
1596 if ((status = depca_hw_init(dev, device)))
1597 goto out_free;
6aa20a22 1598
1da177e4
LT
1599 return 0;
1600
1601 out_free:
1602 free_netdev (dev);
1603 release_region (ioaddr, DEPCA_TOTAL_SIZE);
1604 out:
1605 return status;
1606}
1607#endif
1608
1609static int __devexit depca_device_remove (struct device *device)
1610{
1611 struct net_device *dev;
1612 struct depca_private *lp;
1613 int bus;
1614
1aec5bdf 1615 dev = dev_get_drvdata(device);
4cf1653a 1616 lp = netdev_priv(dev);
1da177e4
LT
1617
1618 unregister_netdev (dev);
1619 iounmap (lp->sh_mem);
1620 release_mem_region (lp->mem_start, lp->mem_len);
1621 release_region (dev->base_addr, DEPCA_TOTAL_SIZE);
1622 bus = lp->depca_bus;
1623 free_netdev (dev);
1624
1625 return 0;
1626}
1627
1628/*
1629** Look for a particular board name in the on-board Remote Diagnostics
1630** and Boot (readb) ROM. This will also give us a clue to the network RAM
1631** base address.
1632*/
e5cb966c 1633static int __devinit DepcaSignature(char *name, u_long base_addr)
1da177e4
LT
1634{
1635 u_int i, j, k;
1636 void __iomem *ptr;
1637 char tmpstr[16];
1638 u_long prom_addr = base_addr + 0xc000;
1639 u_long mem_addr = base_addr + 0x8000; /* 32KB */
1640
1641 /* Can't reserve the prom region, it is already marked as
1642 * used, at least on x86. Instead, reserve a memory region a
1643 * board would certainly use. If it works, go ahead. If not,
1644 * run like hell... */
6aa20a22 1645
1da177e4
LT
1646 if (!request_mem_region (mem_addr, 16, depca_string))
1647 return unknown;
1648
1649 /* Copy the first 16 bytes of ROM */
1650
1651 ptr = ioremap(prom_addr, 16);
1652 if (ptr == NULL) {
1653 printk(KERN_ERR "depca: I/O remap failed at %lx\n", prom_addr);
1654 return unknown;
1655 }
1656 for (i = 0; i < 16; i++) {
1657 tmpstr[i] = readb(ptr + i);
1658 }
1659 iounmap(ptr);
1660
1661 release_mem_region (mem_addr, 16);
1662
1663 /* Check if PROM contains a valid string */
1664 for (i = 0; *depca_signature[i] != '\0'; i++) {
1665 for (j = 0, k = 0; j < 16 && k < strlen(depca_signature[i]); j++) {
1666 if (depca_signature[i][k] == tmpstr[j]) { /* track signature */
1667 k++;
1668 } else { /* lost signature; begin search again */
1669 k = 0;
1670 }
1671 }
1672 if (k == strlen(depca_signature[i]))
1673 break;
1674 }
1675
1676 /* Check if name string is valid, provided there's no PROM */
1677 if (name && *name && (i == unknown)) {
1678 for (i = 0; *depca_signature[i] != '\0'; i++) {
1679 if (strcmp(name, depca_signature[i]) == 0)
1680 break;
1681 }
1682 }
1683
1684 return i;
1685}
1686
1687/*
1688** Look for a special sequence in the Ethernet station address PROM that
1689** is common across all DEPCA products. Note that the original DEPCA needs
1690** its ROM address counter to be initialized and enabled. Only enable
1691** if the first address octet is a 0x08 - this minimises the chances of
1692** messing around with some other hardware, but it assumes that this DEPCA
1693** card initialized itself correctly.
6aa20a22 1694**
1da177e4
LT
1695** Search the Ethernet address ROM for the signature. Since the ROM address
1696** counter can start at an arbitrary point, the search must include the entire
1697** probe sequence length plus the (length_of_the_signature - 1).
1698** Stop the search IMMEDIATELY after the signature is found so that the
1699** PROM address counter is correctly positioned at the start of the
1700** ethernet address for later read out.
1701*/
1702static int __init DevicePresent(u_long ioaddr)
1703{
1704 union {
1705 struct {
1706 u32 a;
1707 u32 b;
1708 } llsig;
1709 char Sig[sizeof(u32) << 1];
1710 }
1711 dev;
1712 short sigLength = 0;
1713 s8 data;
1714 s16 nicsr;
1715 int i, j, status = 0;
1716
1717 data = inb(DEPCA_PROM); /* clear counter on DEPCA */
1718 data = inb(DEPCA_PROM); /* read data */
1719
1720 if (data == 0x08) { /* Enable counter on DEPCA */
1721 nicsr = inb(DEPCA_NICSR);
1722 nicsr |= AAC;
1723 outb(nicsr, DEPCA_NICSR);
1724 }
1725
1726 dev.llsig.a = ETH_PROM_SIG;
1727 dev.llsig.b = ETH_PROM_SIG;
1728 sigLength = sizeof(u32) << 1;
1729
1730 for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) {
1731 data = inb(DEPCA_PROM);
1732 if (dev.Sig[j] == data) { /* track signature */
1733 j++;
1734 } else { /* lost signature; begin search again */
1735 if (data == dev.Sig[0]) { /* rare case.... */
1736 j = 1;
1737 } else {
1738 j = 0;
1739 }
1740 }
1741 }
1742
1743 if (j != sigLength) {
1744 status = -ENODEV; /* search failed */
1745 }
1746
1747 return status;
1748}
1749
1750/*
1751** The DE100 and DE101 PROM accesses were made non-standard for some bizarre
1752** reason: access the upper half of the PROM with x=0; access the lower half
1753** with x=1.
1754*/
1755static int __init get_hw_addr(struct net_device *dev)
1756{
1757 u_long ioaddr = dev->base_addr;
4cf1653a 1758 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
1759 int i, k, tmp, status = 0;
1760 u_short j, x, chksum;
1761
1762 x = (((lp->adapter == de100) || (lp->adapter == de101)) ? 1 : 0);
1763
1764 for (i = 0, k = 0, j = 0; j < 3; j++) {
1765 k <<= 1;
1766 if (k > 0xffff)
1767 k -= 0xffff;
1768
1769 k += (u_char) (tmp = inb(DEPCA_PROM + x));
1770 dev->dev_addr[i++] = (u_char) tmp;
1771 k += (u_short) ((tmp = inb(DEPCA_PROM + x)) << 8);
1772 dev->dev_addr[i++] = (u_char) tmp;
1773
1774 if (k > 0xffff)
1775 k -= 0xffff;
1776 }
1777 if (k == 0xffff)
1778 k = 0;
1779
1780 chksum = (u_char) inb(DEPCA_PROM + x);
1781 chksum |= (u_short) (inb(DEPCA_PROM + x) << 8);
1782 if (k != chksum)
1783 status = -1;
1784
1785 return status;
1786}
1787
1788/*
1789** Load a packet into the shared memory
1790*/
1791static int load_packet(struct net_device *dev, struct sk_buff *skb)
1792{
4cf1653a 1793 struct depca_private *lp = netdev_priv(dev);
ec634fe3 1794 int i, entry, end, len, status = NETDEV_TX_OK;
1da177e4
LT
1795
1796 entry = lp->tx_new; /* Ring around buffer number. */
1797 end = (entry + (skb->len - 1) / TX_BUFF_SZ) & lp->txRingMask;
1798 if (!(readl(&lp->tx_ring[end].base) & T_OWN)) { /* Enough room? */
6aa20a22 1799 /*
1da177e4
LT
1800 ** Caution: the write order is important here... don't set up the
1801 ** ownership rights until all the other information is in place.
1802 */
1803 if (end < entry) { /* wrapped buffer */
1804 len = (lp->txRingMask - entry + 1) * TX_BUFF_SZ;
1805 memcpy_toio(lp->tx_buff[entry], skb->data, len);
1806 memcpy_toio(lp->tx_buff[0], skb->data + len, skb->len - len);
1807 } else { /* linear buffer */
1808 memcpy_toio(lp->tx_buff[entry], skb->data, skb->len);
1809 }
1810
1811 /* set up the buffer descriptors */
1812 len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
1813 for (i = entry; i != end; i = (i+1) & lp->txRingMask) {
1814 /* clean out flags */
1815 writel(readl(&lp->tx_ring[i].base) & ~T_FLAGS, &lp->tx_ring[i].base);
1816 writew(0x0000, &lp->tx_ring[i].misc); /* clears other error flags */
1817 writew(-TX_BUFF_SZ, &lp->tx_ring[i].length); /* packet length in buffer */
1818 len -= TX_BUFF_SZ;
1819 }
1820 /* clean out flags */
1821 writel(readl(&lp->tx_ring[end].base) & ~T_FLAGS, &lp->tx_ring[end].base);
1822 writew(0x0000, &lp->tx_ring[end].misc); /* clears other error flags */
1823 writew(-len, &lp->tx_ring[end].length); /* packet length in last buff */
1824
1825 /* start of packet */
1826 writel(readl(&lp->tx_ring[entry].base) | T_STP, &lp->tx_ring[entry].base);
1827 /* end of packet */
1828 writel(readl(&lp->tx_ring[end].base) | T_ENP, &lp->tx_ring[end].base);
1829
1830 for (i = end; i != entry; --i) {
1831 /* ownership of packet */
1832 writel(readl(&lp->tx_ring[i].base) | T_OWN, &lp->tx_ring[i].base);
1833 if (i == 0)
1834 i = lp->txRingMask + 1;
1835 }
1836 writel(readl(&lp->tx_ring[entry].base) | T_OWN, &lp->tx_ring[entry].base);
1837
1838 lp->tx_new = (++end) & lp->txRingMask; /* update current pointers */
1839 } else {
5b548140 1840 status = NETDEV_TX_LOCKED;
1da177e4
LT
1841 }
1842
1843 return status;
1844}
1845
1846static void depca_dbg_open(struct net_device *dev)
1847{
4cf1653a 1848 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
1849 u_long ioaddr = dev->base_addr;
1850 struct depca_init *p = &lp->init_block;
1851 int i;
1852
1853 if (depca_debug > 1) {
1854 /* Do not copy the shadow init block into shared memory */
1855 /* Debugging should not affect normal operation! */
1856 /* The shadow init block will get copied across during InitRestartDepca */
1857 printk("%s: depca open with irq %d\n", dev->name, dev->irq);
1858 printk("Descriptor head addresses (CPU):\n");
1859 printk(" 0x%lx 0x%lx\n", (u_long) lp->rx_ring, (u_long) lp->tx_ring);
1860 printk("Descriptor addresses (CPU):\nRX: ");
1861 for (i = 0; i < lp->rxRingMask; i++) {
1862 if (i < 3) {
1863 printk("%p ", &lp->rx_ring[i].base);
1864 }
1865 }
1866 printk("...%p\n", &lp->rx_ring[i].base);
1867 printk("TX: ");
1868 for (i = 0; i < lp->txRingMask; i++) {
1869 if (i < 3) {
1870 printk("%p ", &lp->tx_ring[i].base);
1871 }
1872 }
1873 printk("...%p\n", &lp->tx_ring[i].base);
1874 printk("\nDescriptor buffers (Device):\nRX: ");
1875 for (i = 0; i < lp->rxRingMask; i++) {
1876 if (i < 3) {
1877 printk("0x%8.8x ", readl(&lp->rx_ring[i].base));
1878 }
1879 }
1880 printk("...0x%8.8x\n", readl(&lp->rx_ring[i].base));
1881 printk("TX: ");
1882 for (i = 0; i < lp->txRingMask; i++) {
1883 if (i < 3) {
1884 printk("0x%8.8x ", readl(&lp->tx_ring[i].base));
1885 }
1886 }
1887 printk("...0x%8.8x\n", readl(&lp->tx_ring[i].base));
1888 printk("Initialisation block at 0x%8.8lx(Phys)\n", lp->mem_start);
1889 printk(" mode: 0x%4.4x\n", p->mode);
e174961c 1890 printk(" physical address: %pM\n", p->phys_addr);
1da177e4
LT
1891 printk(" multicast hash table: ");
1892 for (i = 0; i < (HASH_TABLE_LEN >> 3) - 1; i++) {
1893 printk("%2.2x:", p->mcast_table[i]);
1894 }
1895 printk("%2.2x\n", p->mcast_table[i]);
1896 printk(" rx_ring at: 0x%8.8x\n", p->rx_ring);
1897 printk(" tx_ring at: 0x%8.8x\n", p->tx_ring);
1898 printk("buffers (Phys): 0x%8.8lx\n", lp->mem_start + lp->buffs_offset);
1899 printk("Ring size:\nRX: %d Log2(rxRingMask): 0x%8.8x\n", (int) lp->rxRingMask + 1, lp->rx_rlen);
1900 printk("TX: %d Log2(txRingMask): 0x%8.8x\n", (int) lp->txRingMask + 1, lp->tx_rlen);
1901 outw(CSR2, DEPCA_ADDR);
1902 printk("CSR2&1: 0x%4.4x", inw(DEPCA_DATA));
1903 outw(CSR1, DEPCA_ADDR);
1904 printk("%4.4x\n", inw(DEPCA_DATA));
1905 outw(CSR3, DEPCA_ADDR);
1906 printk("CSR3: 0x%4.4x\n", inw(DEPCA_DATA));
1907 }
1da177e4
LT
1908}
1909
1910/*
1911** Perform IOCTL call functions here. Some are privileged operations and the
1912** effective uid is checked in those cases.
1913** All multicast IOCTLs will not work here and are for testing purposes only.
1914*/
1915static int depca_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1916{
4cf1653a 1917 struct depca_private *lp = netdev_priv(dev);
1da177e4
LT
1918 struct depca_ioctl *ioc = (struct depca_ioctl *) &rq->ifr_ifru;
1919 int i, status = 0;
1920 u_long ioaddr = dev->base_addr;
1921 union {
1922 u8 addr[(HASH_TABLE_LEN * ETH_ALEN)];
1923 u16 sval[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1924 u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];
1925 } tmp;
1926 unsigned long flags;
1927 void *buf;
1928
1929 switch (ioc->cmd) {
1930 case DEPCA_GET_HWADDR: /* Get the hardware address */
1931 for (i = 0; i < ETH_ALEN; i++) {
1932 tmp.addr[i] = dev->dev_addr[i];
1933 }
1934 ioc->len = ETH_ALEN;
1935 if (copy_to_user(ioc->data, tmp.addr, ioc->len))
1936 return -EFAULT;
1937 break;
1938
1939 case DEPCA_SET_HWADDR: /* Set the hardware address */
1940 if (!capable(CAP_NET_ADMIN))
1941 return -EPERM;
1942 if (copy_from_user(tmp.addr, ioc->data, ETH_ALEN))
1943 return -EFAULT;
1944 for (i = 0; i < ETH_ALEN; i++) {
1945 dev->dev_addr[i] = tmp.addr[i];
1946 }
1947 netif_stop_queue(dev);
1948 while (lp->tx_old != lp->tx_new)
1949 cpu_relax(); /* Wait for the ring to empty */
1950
1951 STOP_DEPCA; /* Temporarily stop the depca. */
1952 depca_init_ring(dev); /* Initialize the descriptor rings */
1953 LoadCSRs(dev); /* Reload CSR3 */
1954 InitRestartDepca(dev); /* Resume normal operation. */
1955 netif_start_queue(dev); /* Unlock the TX ring */
1956 break;
1957
1958 case DEPCA_SET_PROM: /* Set Promiscuous Mode */
1959 if (!capable(CAP_NET_ADMIN))
1960 return -EPERM;
1961 netif_stop_queue(dev);
1962 while (lp->tx_old != lp->tx_new)
1963 cpu_relax(); /* Wait for the ring to empty */
1964
1965 STOP_DEPCA; /* Temporarily stop the depca. */
1966 depca_init_ring(dev); /* Initialize the descriptor rings */
1967 lp->init_block.mode |= PROM; /* Set promiscuous mode */
1968
1969 LoadCSRs(dev); /* Reload CSR3 */
1970 InitRestartDepca(dev); /* Resume normal operation. */
1971 netif_start_queue(dev); /* Unlock the TX ring */
1972 break;
1973
1974 case DEPCA_CLR_PROM: /* Clear Promiscuous Mode */
1975 if (!capable(CAP_NET_ADMIN))
1976 return -EPERM;
1977 netif_stop_queue(dev);
1978 while (lp->tx_old != lp->tx_new)
1979 cpu_relax(); /* Wait for the ring to empty */
1980
1981 STOP_DEPCA; /* Temporarily stop the depca. */
1982 depca_init_ring(dev); /* Initialize the descriptor rings */
1983 lp->init_block.mode &= ~PROM; /* Clear promiscuous mode */
1984
1985 LoadCSRs(dev); /* Reload CSR3 */
1986 InitRestartDepca(dev); /* Resume normal operation. */
1987 netif_start_queue(dev); /* Unlock the TX ring */
1988 break;
1989
1990 case DEPCA_SAY_BOO: /* Say "Boo!" to the kernel log file */
1991 if(!capable(CAP_NET_ADMIN))
1992 return -EPERM;
1993 printk("%s: Boo!\n", dev->name);
1994 break;
1995
1996 case DEPCA_GET_MCA: /* Get the multicast address table */
1997 ioc->len = (HASH_TABLE_LEN >> 3);
1998 if (copy_to_user(ioc->data, lp->init_block.mcast_table, ioc->len))
1999 return -EFAULT;
2000 break;
2001
2002 case DEPCA_SET_MCA: /* Set a multicast address */
2003 if (!capable(CAP_NET_ADMIN))
2004 return -EPERM;
2005 if (ioc->len >= HASH_TABLE_LEN)
2006 return -EINVAL;
2007 if (copy_from_user(tmp.addr, ioc->data, ETH_ALEN * ioc->len))
2008 return -EFAULT;
2009 set_multicast_list(dev);
2010 break;
2011
2012 case DEPCA_CLR_MCA: /* Clear all multicast addresses */
2013 if (!capable(CAP_NET_ADMIN))
2014 return -EPERM;
2015 set_multicast_list(dev);
2016 break;
2017
2018 case DEPCA_MCA_EN: /* Enable pass all multicast addressing */
2019 if (!capable(CAP_NET_ADMIN))
2020 return -EPERM;
2021 set_multicast_list(dev);
2022 break;
2023
2024 case DEPCA_GET_STATS: /* Get the driver statistics */
2025 ioc->len = sizeof(lp->pktStats);
2026 buf = kmalloc(ioc->len, GFP_KERNEL);
2027 if(!buf)
2028 return -ENOMEM;
2029 spin_lock_irqsave(&lp->lock, flags);
2030 memcpy(buf, &lp->pktStats, ioc->len);
2031 spin_unlock_irqrestore(&lp->lock, flags);
2032 if (copy_to_user(ioc->data, buf, ioc->len))
2033 status = -EFAULT;
2034 kfree(buf);
2035 break;
2036
2037 case DEPCA_CLR_STATS: /* Zero out the driver statistics */
2038 if (!capable(CAP_NET_ADMIN))
2039 return -EPERM;
2040 spin_lock_irqsave(&lp->lock, flags);
2041 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
2042 spin_unlock_irqrestore(&lp->lock, flags);
2043 break;
2044
2045 case DEPCA_GET_REG: /* Get the DEPCA Registers */
2046 i = 0;
2047 tmp.sval[i++] = inw(DEPCA_NICSR);
2048 outw(CSR0, DEPCA_ADDR); /* status register */
2049 tmp.sval[i++] = inw(DEPCA_DATA);
2050 memcpy(&tmp.sval[i], &lp->init_block, sizeof(struct depca_init));
2051 ioc->len = i + sizeof(struct depca_init);
2052 if (copy_to_user(ioc->data, tmp.addr, ioc->len))
2053 return -EFAULT;
2054 break;
2055
2056 default:
2057 return -EOPNOTSUPP;
2058 }
2059
2060 return status;
2061}
2062
2063static int __init depca_module_init (void)
2064{
84c3b972 2065 int err = 0;
1da177e4
LT
2066
2067#ifdef CONFIG_MCA
84c3b972
KV
2068 err = mca_register_driver(&depca_mca_driver);
2069 if (err)
2070 goto err;
1da177e4
LT
2071#endif
2072#ifdef CONFIG_EISA
84c3b972
KV
2073 err = eisa_driver_register(&depca_eisa_driver);
2074 if (err)
2075 goto err_mca;
1da177e4 2076#endif
84c3b972
KV
2077 err = platform_driver_register(&depca_isa_driver);
2078 if (err)
2079 goto err_eisa;
6aa20a22 2080
84c3b972
KV
2081 depca_platform_probe();
2082 return 0;
2083
2084err_eisa:
2085#ifdef CONFIG_EISA
2086 eisa_driver_unregister(&depca_eisa_driver);
2087err_mca:
2088#endif
2089#ifdef CONFIG_MCA
2090 mca_unregister_driver(&depca_mca_driver);
2091err:
2092#endif
2093 return err;
1da177e4
LT
2094}
2095
2096static void __exit depca_module_exit (void)
2097{
2098 int i;
2099#ifdef CONFIG_MCA
2100 mca_unregister_driver (&depca_mca_driver);
2101#endif
2102#ifdef CONFIG_EISA
2103 eisa_driver_unregister (&depca_eisa_driver);
2104#endif
3ae5eaec 2105 platform_driver_unregister (&depca_isa_driver);
1da177e4
LT
2106
2107 for (i = 0; depca_io_ports[i].iobase; i++) {
2108 if (depca_io_ports[i].device) {
5d994b7f 2109 depca_io_ports[i].device->dev.platform_data = NULL;
1da177e4
LT
2110 platform_device_unregister (depca_io_ports[i].device);
2111 depca_io_ports[i].device = NULL;
2112 }
2113 }
2114}
2115
2116module_init (depca_module_init);
2117module_exit (depca_module_exit);
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