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a1365275 SH |
1 | /* |
2 | * dm9000.c: Version 1.2 03/18/2003 | |
3 | * | |
4 | * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux. | |
5 | * Copyright (C) 1997 Sten Wang | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version 2 | |
10 | * of the License, or (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved. | |
18 | * | |
19 | * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match | |
20 | * 06/22/2001 Support DM9801 progrmming | |
21 | * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000 | |
22 | * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200 | |
23 | * R17 = (R17 & 0xfff0) | NF + 3 | |
24 | * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200 | |
25 | * R17 = (R17 & 0xfff0) | NF | |
26 | * | |
27 | * v1.00 modify by simon 2001.9.5 | |
28 | * change for kernel 2.4.x | |
29 | * | |
30 | * v1.1 11/09/2001 fix force mode bug | |
31 | * | |
32 | * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>: | |
33 | * Fixed phy reset. | |
34 | * Added tx/rx 32 bit mode. | |
35 | * Cleaned up for kernel merge. | |
36 | * | |
37 | * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de> | |
38 | * Port to 2.6 kernel | |
39 | * | |
40 | * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk> | |
41 | * Cleanup of code to remove ifdefs | |
42 | * Allowed platform device data to influence access width | |
43 | * Reformatting areas of code | |
44 | * | |
45 | * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de> | |
46 | * * removed 2.4 style module parameters | |
47 | * * removed removed unused stat counter and fixed | |
48 | * net_device_stats | |
49 | * * introduced tx_timeout function | |
50 | * * reworked locking | |
9ef9ac51 BD |
51 | * |
52 | * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk> | |
53 | * * fixed spinlock call without pointer | |
54 | * * ensure spinlock is initialised | |
a1365275 SH |
55 | */ |
56 | ||
57 | #include <linux/module.h> | |
58 | #include <linux/ioport.h> | |
59 | #include <linux/netdevice.h> | |
60 | #include <linux/etherdevice.h> | |
61 | #include <linux/init.h> | |
62 | #include <linux/skbuff.h> | |
a1365275 SH |
63 | #include <linux/spinlock.h> |
64 | #include <linux/crc32.h> | |
65 | #include <linux/mii.h> | |
66 | #include <linux/dm9000.h> | |
67 | #include <linux/delay.h> | |
d052d1be | 68 | #include <linux/platform_device.h> |
a1365275 SH |
69 | |
70 | #include <asm/delay.h> | |
71 | #include <asm/irq.h> | |
72 | #include <asm/io.h> | |
73 | ||
74 | #include "dm9000.h" | |
75 | ||
76 | /* Board/System/Debug information/definition ---------------- */ | |
77 | ||
78 | #define DM9000_PHY 0x40 /* PHY address 0x01 */ | |
79 | ||
80 | #define TRUE 1 | |
81 | #define FALSE 0 | |
82 | ||
83 | #define CARDNAME "dm9000" | |
84 | #define PFX CARDNAME ": " | |
85 | ||
86 | #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */ | |
87 | ||
88 | #define DM9000_DEBUG 0 | |
89 | ||
90 | #if DM9000_DEBUG > 2 | |
91 | #define PRINTK3(args...) printk(CARDNAME ": " args) | |
92 | #else | |
93 | #define PRINTK3(args...) do { } while(0) | |
94 | #endif | |
95 | ||
96 | #if DM9000_DEBUG > 1 | |
97 | #define PRINTK2(args...) printk(CARDNAME ": " args) | |
98 | #else | |
99 | #define PRINTK2(args...) do { } while(0) | |
100 | #endif | |
101 | ||
102 | #if DM9000_DEBUG > 0 | |
103 | #define PRINTK1(args...) printk(CARDNAME ": " args) | |
104 | #define PRINTK(args...) printk(CARDNAME ": " args) | |
105 | #else | |
106 | #define PRINTK1(args...) do { } while(0) | |
107 | #define PRINTK(args...) printk(KERN_DEBUG args) | |
108 | #endif | |
109 | ||
110 | /* | |
111 | * Transmit timeout, default 5 seconds. | |
112 | */ | |
113 | static int watchdog = 5000; | |
114 | module_param(watchdog, int, 0400); | |
115 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | |
116 | ||
117 | /* Structure/enum declaration ------------------------------- */ | |
118 | typedef struct board_info { | |
119 | ||
120 | void __iomem *io_addr; /* Register I/O base address */ | |
121 | void __iomem *io_data; /* Data I/O address */ | |
122 | u16 irq; /* IRQ */ | |
123 | ||
124 | u16 tx_pkt_cnt; | |
125 | u16 queue_pkt_len; | |
126 | u16 queue_start_addr; | |
127 | u16 dbug_cnt; | |
128 | u8 io_mode; /* 0:word, 2:byte */ | |
129 | u8 phy_addr; | |
130 | ||
131 | void (*inblk)(void __iomem *port, void *data, int length); | |
132 | void (*outblk)(void __iomem *port, void *data, int length); | |
133 | void (*dumpblk)(void __iomem *port, int length); | |
134 | ||
135 | struct resource *addr_res; /* resources found */ | |
136 | struct resource *data_res; | |
137 | struct resource *addr_req; /* resources requested */ | |
138 | struct resource *data_req; | |
139 | struct resource *irq_res; | |
140 | ||
141 | struct timer_list timer; | |
142 | struct net_device_stats stats; | |
143 | unsigned char srom[128]; | |
144 | spinlock_t lock; | |
145 | ||
146 | struct mii_if_info mii; | |
147 | u32 msg_enable; | |
148 | } board_info_t; | |
149 | ||
150 | /* function declaration ------------------------------------- */ | |
3ae5eaec | 151 | static int dm9000_probe(struct platform_device *); |
a1365275 SH |
152 | static int dm9000_open(struct net_device *); |
153 | static int dm9000_start_xmit(struct sk_buff *, struct net_device *); | |
154 | static int dm9000_stop(struct net_device *); | |
a1365275 SH |
155 | |
156 | ||
157 | static void dm9000_timer(unsigned long); | |
158 | static void dm9000_init_dm9000(struct net_device *); | |
159 | ||
160 | static struct net_device_stats *dm9000_get_stats(struct net_device *); | |
161 | ||
162 | static irqreturn_t dm9000_interrupt(int, void *, struct pt_regs *); | |
163 | ||
164 | static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg); | |
165 | static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, | |
166 | int value); | |
167 | static u16 read_srom_word(board_info_t *, int); | |
168 | static void dm9000_rx(struct net_device *); | |
169 | static void dm9000_hash_table(struct net_device *); | |
170 | ||
171 | //#define DM9000_PROGRAM_EEPROM | |
172 | #ifdef DM9000_PROGRAM_EEPROM | |
173 | static void program_eeprom(board_info_t * db); | |
174 | #endif | |
175 | /* DM9000 network board routine ---------------------------- */ | |
176 | ||
177 | static void | |
178 | dm9000_reset(board_info_t * db) | |
179 | { | |
180 | PRINTK1("dm9000x: resetting\n"); | |
181 | /* RESET device */ | |
182 | writeb(DM9000_NCR, db->io_addr); | |
183 | udelay(200); | |
184 | writeb(NCR_RST, db->io_data); | |
185 | udelay(200); | |
186 | } | |
187 | ||
188 | /* | |
189 | * Read a byte from I/O port | |
190 | */ | |
191 | static u8 | |
192 | ior(board_info_t * db, int reg) | |
193 | { | |
194 | writeb(reg, db->io_addr); | |
195 | return readb(db->io_data); | |
196 | } | |
197 | ||
198 | /* | |
199 | * Write a byte to I/O port | |
200 | */ | |
201 | ||
202 | static void | |
203 | iow(board_info_t * db, int reg, int value) | |
204 | { | |
205 | writeb(reg, db->io_addr); | |
206 | writeb(value, db->io_data); | |
207 | } | |
208 | ||
209 | /* routines for sending block to chip */ | |
210 | ||
211 | static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count) | |
212 | { | |
213 | writesb(reg, data, count); | |
214 | } | |
215 | ||
216 | static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count) | |
217 | { | |
218 | writesw(reg, data, (count+1) >> 1); | |
219 | } | |
220 | ||
221 | static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count) | |
222 | { | |
223 | writesl(reg, data, (count+3) >> 2); | |
224 | } | |
225 | ||
226 | /* input block from chip to memory */ | |
227 | ||
228 | static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count) | |
229 | { | |
5f6b5517 | 230 | readsb(reg, data, count); |
a1365275 SH |
231 | } |
232 | ||
233 | ||
234 | static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count) | |
235 | { | |
236 | readsw(reg, data, (count+1) >> 1); | |
237 | } | |
238 | ||
239 | static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count) | |
240 | { | |
241 | readsl(reg, data, (count+3) >> 2); | |
242 | } | |
243 | ||
244 | /* dump block from chip to null */ | |
245 | ||
246 | static void dm9000_dumpblk_8bit(void __iomem *reg, int count) | |
247 | { | |
248 | int i; | |
249 | int tmp; | |
250 | ||
251 | for (i = 0; i < count; i++) | |
252 | tmp = readb(reg); | |
253 | } | |
254 | ||
255 | static void dm9000_dumpblk_16bit(void __iomem *reg, int count) | |
256 | { | |
257 | int i; | |
258 | int tmp; | |
259 | ||
260 | count = (count + 1) >> 1; | |
261 | ||
262 | for (i = 0; i < count; i++) | |
263 | tmp = readw(reg); | |
264 | } | |
265 | ||
266 | static void dm9000_dumpblk_32bit(void __iomem *reg, int count) | |
267 | { | |
268 | int i; | |
269 | int tmp; | |
270 | ||
271 | count = (count + 3) >> 2; | |
272 | ||
273 | for (i = 0; i < count; i++) | |
274 | tmp = readl(reg); | |
275 | } | |
276 | ||
277 | /* dm9000_set_io | |
278 | * | |
279 | * select the specified set of io routines to use with the | |
280 | * device | |
281 | */ | |
282 | ||
283 | static void dm9000_set_io(struct board_info *db, int byte_width) | |
284 | { | |
285 | /* use the size of the data resource to work out what IO | |
286 | * routines we want to use | |
287 | */ | |
288 | ||
289 | switch (byte_width) { | |
290 | case 1: | |
291 | db->dumpblk = dm9000_dumpblk_8bit; | |
292 | db->outblk = dm9000_outblk_8bit; | |
293 | db->inblk = dm9000_inblk_8bit; | |
294 | break; | |
295 | ||
296 | case 2: | |
297 | db->dumpblk = dm9000_dumpblk_16bit; | |
298 | db->outblk = dm9000_outblk_16bit; | |
299 | db->inblk = dm9000_inblk_16bit; | |
300 | break; | |
301 | ||
302 | case 3: | |
303 | printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n"); | |
304 | db->dumpblk = dm9000_dumpblk_16bit; | |
305 | db->outblk = dm9000_outblk_16bit; | |
306 | db->inblk = dm9000_inblk_16bit; | |
307 | break; | |
308 | ||
309 | case 4: | |
310 | default: | |
311 | db->dumpblk = dm9000_dumpblk_32bit; | |
312 | db->outblk = dm9000_outblk_32bit; | |
313 | db->inblk = dm9000_inblk_32bit; | |
314 | break; | |
315 | } | |
316 | } | |
317 | ||
318 | ||
319 | /* Our watchdog timed out. Called by the networking layer */ | |
320 | static void dm9000_timeout(struct net_device *dev) | |
321 | { | |
322 | board_info_t *db = (board_info_t *) dev->priv; | |
323 | u8 reg_save; | |
324 | unsigned long flags; | |
325 | ||
326 | /* Save previous register address */ | |
327 | reg_save = readb(db->io_addr); | |
9ef9ac51 | 328 | spin_lock_irqsave(&db->lock,flags); |
a1365275 SH |
329 | |
330 | netif_stop_queue(dev); | |
331 | dm9000_reset(db); | |
332 | dm9000_init_dm9000(dev); | |
333 | /* We can accept TX packets again */ | |
334 | dev->trans_start = jiffies; | |
335 | netif_wake_queue(dev); | |
336 | ||
337 | /* Restore previous register address */ | |
338 | writeb(reg_save, db->io_addr); | |
9ef9ac51 | 339 | spin_unlock_irqrestore(&db->lock,flags); |
a1365275 SH |
340 | } |
341 | ||
2fd0e33f KH |
342 | #ifdef CONFIG_NET_POLL_CONTROLLER |
343 | /* | |
344 | *Used by netconsole | |
345 | */ | |
346 | static void dm9000_poll_controller(struct net_device *dev) | |
347 | { | |
348 | disable_irq(dev->irq); | |
349 | dm9000_interrupt(dev->irq,dev,NULL); | |
350 | enable_irq(dev->irq); | |
351 | } | |
352 | #endif | |
a1365275 SH |
353 | |
354 | /* dm9000_release_board | |
355 | * | |
356 | * release a board, and any mapped resources | |
357 | */ | |
358 | ||
359 | static void | |
360 | dm9000_release_board(struct platform_device *pdev, struct board_info *db) | |
361 | { | |
362 | if (db->data_res == NULL) { | |
363 | if (db->addr_res != NULL) | |
364 | release_mem_region((unsigned long)db->io_addr, 4); | |
365 | return; | |
366 | } | |
367 | ||
368 | /* unmap our resources */ | |
369 | ||
370 | iounmap(db->io_addr); | |
371 | iounmap(db->io_data); | |
372 | ||
373 | /* release the resources */ | |
374 | ||
375 | if (db->data_req != NULL) { | |
376 | release_resource(db->data_req); | |
377 | kfree(db->data_req); | |
378 | } | |
379 | ||
51985487 DO |
380 | if (db->addr_req != NULL) { |
381 | release_resource(db->addr_req); | |
a1365275 SH |
382 | kfree(db->addr_req); |
383 | } | |
384 | } | |
385 | ||
386 | #define res_size(_r) (((_r)->end - (_r)->start) + 1) | |
387 | ||
388 | /* | |
389 | * Search DM9000 board, allocate space and register it | |
390 | */ | |
391 | static int | |
3ae5eaec | 392 | dm9000_probe(struct platform_device *pdev) |
a1365275 | 393 | { |
a1365275 SH |
394 | struct dm9000_plat_data *pdata = pdev->dev.platform_data; |
395 | struct board_info *db; /* Point a board information structure */ | |
396 | struct net_device *ndev; | |
397 | unsigned long base; | |
398 | int ret = 0; | |
399 | int iosize; | |
400 | int i; | |
401 | u32 id_val; | |
402 | ||
a1365275 SH |
403 | /* Init network device */ |
404 | ndev = alloc_etherdev(sizeof (struct board_info)); | |
405 | if (!ndev) { | |
406 | printk("%s: could not allocate device.\n", CARDNAME); | |
407 | return -ENOMEM; | |
408 | } | |
409 | ||
410 | SET_MODULE_OWNER(ndev); | |
3ae5eaec | 411 | SET_NETDEV_DEV(ndev, &pdev->dev); |
a1365275 SH |
412 | |
413 | PRINTK2("dm9000_probe()"); | |
414 | ||
415 | /* setup board info structure */ | |
416 | db = (struct board_info *) ndev->priv; | |
417 | memset(db, 0, sizeof (*db)); | |
418 | ||
9ef9ac51 BD |
419 | spin_lock_init(&db->lock); |
420 | ||
a1365275 SH |
421 | if (pdev->num_resources < 2) { |
422 | ret = -ENODEV; | |
423 | goto out; | |
b4ed03ff | 424 | } else if (pdev->num_resources == 2) { |
a1365275 SH |
425 | base = pdev->resource[0].start; |
426 | ||
427 | if (!request_mem_region(base, 4, ndev->name)) { | |
428 | ret = -EBUSY; | |
429 | goto out; | |
430 | } | |
431 | ||
432 | ndev->base_addr = base; | |
433 | ndev->irq = pdev->resource[1].start; | |
b4ed03ff BD |
434 | db->io_addr = (void __iomem *)base; |
435 | db->io_data = (void __iomem *)(base + 4); | |
a1365275 | 436 | |
b4ed03ff | 437 | } else { |
a1365275 SH |
438 | db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
439 | db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
440 | db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
441 | ||
b4ed03ff BD |
442 | if (db->addr_res == NULL || db->data_res == NULL || |
443 | db->irq_res == NULL) { | |
a1365275 SH |
444 | printk(KERN_ERR PFX "insufficient resources\n"); |
445 | ret = -ENOENT; | |
446 | goto out; | |
447 | } | |
448 | ||
449 | i = res_size(db->addr_res); | |
450 | db->addr_req = request_mem_region(db->addr_res->start, i, | |
451 | pdev->name); | |
452 | ||
453 | if (db->addr_req == NULL) { | |
454 | printk(KERN_ERR PFX "cannot claim address reg area\n"); | |
455 | ret = -EIO; | |
456 | goto out; | |
457 | } | |
458 | ||
459 | db->io_addr = ioremap(db->addr_res->start, i); | |
460 | ||
461 | if (db->io_addr == NULL) { | |
462 | printk(KERN_ERR "failed to ioremap address reg\n"); | |
463 | ret = -EINVAL; | |
464 | goto out; | |
465 | } | |
466 | ||
467 | iosize = res_size(db->data_res); | |
468 | db->data_req = request_mem_region(db->data_res->start, iosize, | |
469 | pdev->name); | |
470 | ||
471 | if (db->data_req == NULL) { | |
472 | printk(KERN_ERR PFX "cannot claim data reg area\n"); | |
473 | ret = -EIO; | |
474 | goto out; | |
475 | } | |
476 | ||
477 | db->io_data = ioremap(db->data_res->start, iosize); | |
478 | ||
479 | if (db->io_data == NULL) { | |
480 | printk(KERN_ERR "failed to ioremap data reg\n"); | |
481 | ret = -EINVAL; | |
482 | goto out; | |
483 | } | |
484 | ||
485 | /* fill in parameters for net-dev structure */ | |
486 | ||
487 | ndev->base_addr = (unsigned long)db->io_addr; | |
488 | ndev->irq = db->irq_res->start; | |
489 | ||
490 | /* ensure at least we have a default set of IO routines */ | |
491 | dm9000_set_io(db, iosize); | |
a1365275 SH |
492 | } |
493 | ||
494 | /* check to see if anything is being over-ridden */ | |
495 | if (pdata != NULL) { | |
496 | /* check to see if the driver wants to over-ride the | |
497 | * default IO width */ | |
498 | ||
499 | if (pdata->flags & DM9000_PLATF_8BITONLY) | |
500 | dm9000_set_io(db, 1); | |
501 | ||
502 | if (pdata->flags & DM9000_PLATF_16BITONLY) | |
503 | dm9000_set_io(db, 2); | |
504 | ||
505 | if (pdata->flags & DM9000_PLATF_32BITONLY) | |
506 | dm9000_set_io(db, 4); | |
507 | ||
508 | /* check to see if there are any IO routine | |
509 | * over-rides */ | |
510 | ||
511 | if (pdata->inblk != NULL) | |
512 | db->inblk = pdata->inblk; | |
513 | ||
514 | if (pdata->outblk != NULL) | |
515 | db->outblk = pdata->outblk; | |
516 | ||
517 | if (pdata->dumpblk != NULL) | |
518 | db->dumpblk = pdata->dumpblk; | |
519 | } | |
520 | ||
521 | dm9000_reset(db); | |
522 | ||
523 | /* try two times, DM9000 sometimes gets the first read wrong */ | |
524 | for (i = 0; i < 2; i++) { | |
525 | id_val = ior(db, DM9000_VIDL); | |
526 | id_val |= (u32)ior(db, DM9000_VIDH) << 8; | |
527 | id_val |= (u32)ior(db, DM9000_PIDL) << 16; | |
528 | id_val |= (u32)ior(db, DM9000_PIDH) << 24; | |
529 | ||
530 | if (id_val == DM9000_ID) | |
531 | break; | |
532 | printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val); | |
533 | } | |
534 | ||
535 | if (id_val != DM9000_ID) { | |
536 | printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val); | |
537 | goto release; | |
538 | } | |
539 | ||
540 | /* from this point we assume that we have found a DM9000 */ | |
541 | ||
542 | /* driver system function */ | |
543 | ether_setup(ndev); | |
544 | ||
545 | ndev->open = &dm9000_open; | |
546 | ndev->hard_start_xmit = &dm9000_start_xmit; | |
547 | ndev->tx_timeout = &dm9000_timeout; | |
548 | ndev->watchdog_timeo = msecs_to_jiffies(watchdog); | |
549 | ndev->stop = &dm9000_stop; | |
550 | ndev->get_stats = &dm9000_get_stats; | |
551 | ndev->set_multicast_list = &dm9000_hash_table; | |
2fd0e33f KH |
552 | #ifdef CONFIG_NET_POLL_CONTROLLER |
553 | ndev->poll_controller = &dm9000_poll_controller; | |
554 | #endif | |
a1365275 SH |
555 | |
556 | #ifdef DM9000_PROGRAM_EEPROM | |
557 | program_eeprom(db); | |
558 | #endif | |
559 | db->msg_enable = NETIF_MSG_LINK; | |
560 | db->mii.phy_id_mask = 0x1f; | |
561 | db->mii.reg_num_mask = 0x1f; | |
562 | db->mii.force_media = 0; | |
563 | db->mii.full_duplex = 0; | |
564 | db->mii.dev = ndev; | |
565 | db->mii.mdio_read = dm9000_phy_read; | |
566 | db->mii.mdio_write = dm9000_phy_write; | |
567 | ||
568 | /* Read SROM content */ | |
569 | for (i = 0; i < 64; i++) | |
570 | ((u16 *) db->srom)[i] = read_srom_word(db, i); | |
571 | ||
572 | /* Set Node Address */ | |
573 | for (i = 0; i < 6; i++) | |
574 | ndev->dev_addr[i] = db->srom[i]; | |
575 | ||
5b55dda6 BD |
576 | if (!is_valid_ether_addr(ndev->dev_addr)) { |
577 | /* try reading from mac */ | |
578 | ||
579 | for (i = 0; i < 6; i++) | |
580 | ndev->dev_addr[i] = ior(db, i+DM9000_PAR); | |
581 | } | |
582 | ||
a1365275 SH |
583 | if (!is_valid_ether_addr(ndev->dev_addr)) |
584 | printk("%s: Invalid ethernet MAC address. Please " | |
585 | "set using ifconfig\n", ndev->name); | |
586 | ||
3ae5eaec | 587 | platform_set_drvdata(pdev, ndev); |
a1365275 SH |
588 | ret = register_netdev(ndev); |
589 | ||
590 | if (ret == 0) { | |
591 | printk("%s: dm9000 at %p,%p IRQ %d MAC: ", | |
592 | ndev->name, db->io_addr, db->io_data, ndev->irq); | |
593 | for (i = 0; i < 5; i++) | |
594 | printk("%02x:", ndev->dev_addr[i]); | |
595 | printk("%02x\n", ndev->dev_addr[5]); | |
596 | } | |
597 | return 0; | |
598 | ||
599 | release: | |
600 | out: | |
601 | printk("%s: not found (%d).\n", CARDNAME, ret); | |
602 | ||
603 | dm9000_release_board(pdev, db); | |
604 | kfree(ndev); | |
605 | ||
606 | return ret; | |
607 | } | |
608 | ||
609 | /* | |
610 | * Open the interface. | |
611 | * The interface is opened whenever "ifconfig" actives it. | |
612 | */ | |
613 | static int | |
614 | dm9000_open(struct net_device *dev) | |
615 | { | |
616 | board_info_t *db = (board_info_t *) dev->priv; | |
617 | ||
618 | PRINTK2("entering dm9000_open\n"); | |
619 | ||
1fb9df5d | 620 | if (request_irq(dev->irq, &dm9000_interrupt, IRQF_SHARED, dev->name, dev)) |
a1365275 SH |
621 | return -EAGAIN; |
622 | ||
623 | /* Initialize DM9000 board */ | |
624 | dm9000_reset(db); | |
625 | dm9000_init_dm9000(dev); | |
626 | ||
627 | /* Init driver variable */ | |
628 | db->dbug_cnt = 0; | |
629 | ||
630 | /* set and active a timer process */ | |
631 | init_timer(&db->timer); | |
9ef9ac51 | 632 | db->timer.expires = DM9000_TIMER_WUT; |
a1365275 SH |
633 | db->timer.data = (unsigned long) dev; |
634 | db->timer.function = &dm9000_timer; | |
635 | add_timer(&db->timer); | |
636 | ||
637 | mii_check_media(&db->mii, netif_msg_link(db), 1); | |
638 | netif_start_queue(dev); | |
639 | ||
640 | return 0; | |
641 | } | |
642 | ||
643 | /* | |
644 | * Initilize dm9000 board | |
645 | */ | |
646 | static void | |
647 | dm9000_init_dm9000(struct net_device *dev) | |
648 | { | |
649 | board_info_t *db = (board_info_t *) dev->priv; | |
650 | ||
651 | PRINTK1("entering %s\n",__FUNCTION__); | |
652 | ||
653 | /* I/O mode */ | |
654 | db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */ | |
655 | ||
656 | /* GPIO0 on pre-activate PHY */ | |
657 | iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ | |
658 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ | |
659 | iow(db, DM9000_GPR, 0); /* Enable PHY */ | |
660 | ||
661 | /* Program operating register */ | |
662 | iow(db, DM9000_TCR, 0); /* TX Polling clear */ | |
663 | iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */ | |
664 | iow(db, DM9000_FCR, 0xff); /* Flow Control */ | |
665 | iow(db, DM9000_SMCR, 0); /* Special Mode */ | |
666 | /* clear TX status */ | |
667 | iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); | |
668 | iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */ | |
669 | ||
670 | /* Set address filter table */ | |
671 | dm9000_hash_table(dev); | |
672 | ||
673 | /* Activate DM9000 */ | |
674 | iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN); | |
675 | /* Enable TX/RX interrupt mask */ | |
676 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
677 | ||
678 | /* Init Driver variable */ | |
679 | db->tx_pkt_cnt = 0; | |
680 | db->queue_pkt_len = 0; | |
681 | dev->trans_start = 0; | |
a1365275 SH |
682 | } |
683 | ||
684 | /* | |
685 | * Hardware start transmission. | |
686 | * Send a packet to media from the upper layer. | |
687 | */ | |
688 | static int | |
689 | dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
690 | { | |
691 | board_info_t *db = (board_info_t *) dev->priv; | |
692 | ||
693 | PRINTK3("dm9000_start_xmit\n"); | |
694 | ||
695 | if (db->tx_pkt_cnt > 1) | |
696 | return 1; | |
697 | ||
698 | netif_stop_queue(dev); | |
699 | ||
700 | /* Disable all interrupts */ | |
701 | iow(db, DM9000_IMR, IMR_PAR); | |
702 | ||
703 | /* Move data to DM9000 TX RAM */ | |
704 | writeb(DM9000_MWCMD, db->io_addr); | |
705 | ||
706 | (db->outblk)(db->io_data, skb->data, skb->len); | |
707 | db->stats.tx_bytes += skb->len; | |
708 | ||
709 | /* TX control: First packet immediately send, second packet queue */ | |
710 | if (db->tx_pkt_cnt == 0) { | |
711 | ||
712 | /* First Packet */ | |
713 | db->tx_pkt_cnt++; | |
714 | ||
715 | /* Set TX length to DM9000 */ | |
716 | iow(db, DM9000_TXPLL, skb->len & 0xff); | |
717 | iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff); | |
718 | ||
719 | /* Issue TX polling command */ | |
720 | iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ | |
721 | ||
722 | dev->trans_start = jiffies; /* save the time stamp */ | |
723 | ||
724 | } else { | |
725 | /* Second packet */ | |
726 | db->tx_pkt_cnt++; | |
727 | db->queue_pkt_len = skb->len; | |
728 | } | |
729 | ||
730 | /* free this SKB */ | |
731 | dev_kfree_skb(skb); | |
732 | ||
733 | /* Re-enable resource check */ | |
734 | if (db->tx_pkt_cnt == 1) | |
735 | netif_wake_queue(dev); | |
736 | ||
737 | /* Re-enable interrupt */ | |
738 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
739 | ||
740 | return 0; | |
741 | } | |
742 | ||
743 | static void | |
744 | dm9000_shutdown(struct net_device *dev) | |
745 | { | |
746 | board_info_t *db = (board_info_t *) dev->priv; | |
747 | ||
748 | /* RESET device */ | |
749 | dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */ | |
750 | iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */ | |
751 | iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */ | |
752 | iow(db, DM9000_RCR, 0x00); /* Disable RX */ | |
753 | } | |
754 | ||
755 | /* | |
756 | * Stop the interface. | |
757 | * The interface is stopped when it is brought. | |
758 | */ | |
759 | static int | |
760 | dm9000_stop(struct net_device *ndev) | |
761 | { | |
762 | board_info_t *db = (board_info_t *) ndev->priv; | |
763 | ||
764 | PRINTK1("entering %s\n",__FUNCTION__); | |
765 | ||
766 | /* deleted timer */ | |
767 | del_timer(&db->timer); | |
768 | ||
769 | netif_stop_queue(ndev); | |
770 | netif_carrier_off(ndev); | |
771 | ||
772 | /* free interrupt */ | |
773 | free_irq(ndev->irq, ndev); | |
774 | ||
775 | dm9000_shutdown(ndev); | |
776 | ||
777 | return 0; | |
778 | } | |
779 | ||
780 | /* | |
781 | * DM9000 interrupt handler | |
782 | * receive the packet to upper layer, free the transmitted packet | |
783 | */ | |
784 | ||
5d22a312 | 785 | static void |
a1365275 SH |
786 | dm9000_tx_done(struct net_device *dev, board_info_t * db) |
787 | { | |
788 | int tx_status = ior(db, DM9000_NSR); /* Got TX status */ | |
789 | ||
790 | if (tx_status & (NSR_TX2END | NSR_TX1END)) { | |
791 | /* One packet sent complete */ | |
792 | db->tx_pkt_cnt--; | |
793 | db->stats.tx_packets++; | |
794 | ||
795 | /* Queue packet check & send */ | |
796 | if (db->tx_pkt_cnt > 0) { | |
797 | iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff); | |
798 | iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff); | |
799 | iow(db, DM9000_TCR, TCR_TXREQ); | |
800 | dev->trans_start = jiffies; | |
801 | } | |
802 | netif_wake_queue(dev); | |
803 | } | |
804 | } | |
805 | ||
806 | static irqreturn_t | |
807 | dm9000_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
808 | { | |
809 | struct net_device *dev = dev_id; | |
810 | board_info_t *db; | |
811 | int int_status; | |
812 | u8 reg_save; | |
813 | ||
814 | PRINTK3("entering %s\n",__FUNCTION__); | |
815 | ||
816 | if (!dev) { | |
817 | PRINTK1("dm9000_interrupt() without DEVICE arg\n"); | |
818 | return IRQ_HANDLED; | |
819 | } | |
820 | ||
821 | /* A real interrupt coming */ | |
822 | db = (board_info_t *) dev->priv; | |
823 | spin_lock(&db->lock); | |
824 | ||
825 | /* Save previous register address */ | |
826 | reg_save = readb(db->io_addr); | |
827 | ||
828 | /* Disable all interrupts */ | |
829 | iow(db, DM9000_IMR, IMR_PAR); | |
830 | ||
831 | /* Got DM9000 interrupt status */ | |
832 | int_status = ior(db, DM9000_ISR); /* Got ISR */ | |
833 | iow(db, DM9000_ISR, int_status); /* Clear ISR status */ | |
834 | ||
835 | /* Received the coming packet */ | |
836 | if (int_status & ISR_PRS) | |
837 | dm9000_rx(dev); | |
838 | ||
839 | /* Trnasmit Interrupt check */ | |
840 | if (int_status & ISR_PTS) | |
841 | dm9000_tx_done(dev, db); | |
842 | ||
843 | /* Re-enable interrupt mask */ | |
844 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
845 | ||
846 | /* Restore previous register address */ | |
847 | writeb(reg_save, db->io_addr); | |
848 | ||
849 | spin_unlock(&db->lock); | |
850 | ||
851 | return IRQ_HANDLED; | |
852 | } | |
853 | ||
854 | /* | |
855 | * Get statistics from driver. | |
856 | */ | |
857 | static struct net_device_stats * | |
858 | dm9000_get_stats(struct net_device *dev) | |
859 | { | |
860 | board_info_t *db = (board_info_t *) dev->priv; | |
861 | return &db->stats; | |
862 | } | |
863 | ||
a1365275 SH |
864 | |
865 | /* | |
866 | * A periodic timer routine | |
867 | * Dynamic media sense, allocated Rx buffer... | |
868 | */ | |
869 | static void | |
870 | dm9000_timer(unsigned long data) | |
871 | { | |
872 | struct net_device *dev = (struct net_device *) data; | |
873 | board_info_t *db = (board_info_t *) dev->priv; | |
a1365275 SH |
874 | |
875 | PRINTK3("dm9000_timer()\n"); | |
876 | ||
a1365275 SH |
877 | mii_check_media(&db->mii, netif_msg_link(db), 0); |
878 | ||
a1365275 SH |
879 | /* Set timer again */ |
880 | db->timer.expires = DM9000_TIMER_WUT; | |
881 | add_timer(&db->timer); | |
882 | } | |
883 | ||
884 | struct dm9000_rxhdr { | |
885 | u16 RxStatus; | |
886 | u16 RxLen; | |
887 | } __attribute__((__packed__)); | |
888 | ||
889 | /* | |
890 | * Received a packet and pass to upper layer | |
891 | */ | |
892 | static void | |
893 | dm9000_rx(struct net_device *dev) | |
894 | { | |
895 | board_info_t *db = (board_info_t *) dev->priv; | |
896 | struct dm9000_rxhdr rxhdr; | |
897 | struct sk_buff *skb; | |
898 | u8 rxbyte, *rdptr; | |
899 | int GoodPacket; | |
900 | int RxLen; | |
901 | ||
902 | /* Check packet ready or not */ | |
903 | do { | |
904 | ior(db, DM9000_MRCMDX); /* Dummy read */ | |
905 | ||
906 | /* Get most updated data */ | |
907 | rxbyte = readb(db->io_data); | |
908 | ||
909 | /* Status check: this byte must be 0 or 1 */ | |
910 | if (rxbyte > DM9000_PKT_RDY) { | |
911 | printk("status check failed: %d\n", rxbyte); | |
912 | iow(db, DM9000_RCR, 0x00); /* Stop Device */ | |
913 | iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */ | |
914 | return; | |
915 | } | |
916 | ||
917 | if (rxbyte != DM9000_PKT_RDY) | |
918 | return; | |
919 | ||
920 | /* A packet ready now & Get status/length */ | |
921 | GoodPacket = TRUE; | |
922 | writeb(DM9000_MRCMD, db->io_addr); | |
923 | ||
924 | (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr)); | |
925 | ||
926 | RxLen = rxhdr.RxLen; | |
927 | ||
928 | /* Packet Status check */ | |
929 | if (RxLen < 0x40) { | |
930 | GoodPacket = FALSE; | |
931 | PRINTK1("Bad Packet received (runt)\n"); | |
932 | } | |
933 | ||
934 | if (RxLen > DM9000_PKT_MAX) { | |
935 | PRINTK1("RST: RX Len:%x\n", RxLen); | |
936 | } | |
937 | ||
938 | if (rxhdr.RxStatus & 0xbf00) { | |
939 | GoodPacket = FALSE; | |
940 | if (rxhdr.RxStatus & 0x100) { | |
941 | PRINTK1("fifo error\n"); | |
942 | db->stats.rx_fifo_errors++; | |
943 | } | |
944 | if (rxhdr.RxStatus & 0x200) { | |
945 | PRINTK1("crc error\n"); | |
946 | db->stats.rx_crc_errors++; | |
947 | } | |
948 | if (rxhdr.RxStatus & 0x8000) { | |
949 | PRINTK1("length error\n"); | |
950 | db->stats.rx_length_errors++; | |
951 | } | |
952 | } | |
953 | ||
954 | /* Move data from DM9000 */ | |
955 | if (GoodPacket | |
956 | && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) { | |
957 | skb->dev = dev; | |
958 | skb_reserve(skb, 2); | |
959 | rdptr = (u8 *) skb_put(skb, RxLen - 4); | |
960 | ||
961 | /* Read received packet from RX SRAM */ | |
962 | ||
963 | (db->inblk)(db->io_data, rdptr, RxLen); | |
964 | db->stats.rx_bytes += RxLen; | |
965 | ||
966 | /* Pass to upper layer */ | |
967 | skb->protocol = eth_type_trans(skb, dev); | |
968 | netif_rx(skb); | |
969 | db->stats.rx_packets++; | |
970 | ||
971 | } else { | |
972 | /* need to dump the packet's data */ | |
973 | ||
974 | (db->dumpblk)(db->io_data, RxLen); | |
975 | } | |
976 | } while (rxbyte == DM9000_PKT_RDY); | |
977 | } | |
978 | ||
979 | /* | |
980 | * Read a word data from SROM | |
981 | */ | |
982 | static u16 | |
983 | read_srom_word(board_info_t * db, int offset) | |
984 | { | |
985 | iow(db, DM9000_EPAR, offset); | |
986 | iow(db, DM9000_EPCR, EPCR_ERPRR); | |
987 | mdelay(8); /* according to the datasheet 200us should be enough, | |
988 | but it doesn't work */ | |
989 | iow(db, DM9000_EPCR, 0x0); | |
990 | return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8)); | |
991 | } | |
992 | ||
993 | #ifdef DM9000_PROGRAM_EEPROM | |
994 | /* | |
995 | * Write a word data to SROM | |
996 | */ | |
997 | static void | |
998 | write_srom_word(board_info_t * db, int offset, u16 val) | |
999 | { | |
1000 | iow(db, DM9000_EPAR, offset); | |
1001 | iow(db, DM9000_EPDRH, ((val >> 8) & 0xff)); | |
1002 | iow(db, DM9000_EPDRL, (val & 0xff)); | |
1003 | iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW); | |
1004 | mdelay(8); /* same shit */ | |
1005 | iow(db, DM9000_EPCR, 0); | |
1006 | } | |
1007 | ||
1008 | /* | |
1009 | * Only for development: | |
1010 | * Here we write static data to the eeprom in case | |
1011 | * we don't have valid content on a new board | |
1012 | */ | |
1013 | static void | |
1014 | program_eeprom(board_info_t * db) | |
1015 | { | |
1016 | u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */ | |
1017 | 0x0000, /* Autoload: accept nothing */ | |
1018 | 0x0a46, 0x9000, /* Vendor / Product ID */ | |
1019 | 0x0000, /* pin control */ | |
1020 | 0x0000, | |
1021 | }; /* Wake-up mode control */ | |
1022 | int i; | |
1023 | for (i = 0; i < 8; i++) | |
1024 | write_srom_word(db, i, eeprom[i]); | |
1025 | } | |
1026 | #endif | |
1027 | ||
1028 | ||
1029 | /* | |
1030 | * Calculate the CRC valude of the Rx packet | |
1031 | * flag = 1 : return the reverse CRC (for the received packet CRC) | |
1032 | * 0 : return the normal CRC (for Hash Table index) | |
1033 | */ | |
1034 | ||
1035 | static unsigned long | |
1036 | cal_CRC(unsigned char *Data, unsigned int Len, u8 flag) | |
1037 | { | |
1038 | ||
1039 | u32 crc = ether_crc_le(Len, Data); | |
1040 | ||
1041 | if (flag) | |
1042 | return ~crc; | |
1043 | ||
1044 | return crc; | |
1045 | } | |
1046 | ||
1047 | /* | |
1048 | * Set DM9000 multicast address | |
1049 | */ | |
1050 | static void | |
1051 | dm9000_hash_table(struct net_device *dev) | |
1052 | { | |
1053 | board_info_t *db = (board_info_t *) dev->priv; | |
1054 | struct dev_mc_list *mcptr = dev->mc_list; | |
1055 | int mc_cnt = dev->mc_count; | |
1056 | u32 hash_val; | |
1057 | u16 i, oft, hash_table[4]; | |
1058 | unsigned long flags; | |
1059 | ||
1060 | PRINTK2("dm9000_hash_table()\n"); | |
1061 | ||
1062 | spin_lock_irqsave(&db->lock,flags); | |
1063 | ||
1064 | for (i = 0, oft = 0x10; i < 6; i++, oft++) | |
1065 | iow(db, oft, dev->dev_addr[i]); | |
1066 | ||
1067 | /* Clear Hash Table */ | |
1068 | for (i = 0; i < 4; i++) | |
1069 | hash_table[i] = 0x0; | |
1070 | ||
1071 | /* broadcast address */ | |
1072 | hash_table[3] = 0x8000; | |
1073 | ||
1074 | /* the multicast address in Hash Table : 64 bits */ | |
1075 | for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { | |
1076 | hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f; | |
1077 | hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16); | |
1078 | } | |
1079 | ||
1080 | /* Write the hash table to MAC MD table */ | |
1081 | for (i = 0, oft = 0x16; i < 4; i++) { | |
1082 | iow(db, oft++, hash_table[i] & 0xff); | |
1083 | iow(db, oft++, (hash_table[i] >> 8) & 0xff); | |
1084 | } | |
1085 | ||
1086 | spin_unlock_irqrestore(&db->lock,flags); | |
1087 | } | |
1088 | ||
1089 | ||
1090 | /* | |
1091 | * Read a word from phyxcer | |
1092 | */ | |
1093 | static int | |
1094 | dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg) | |
1095 | { | |
1096 | board_info_t *db = (board_info_t *) dev->priv; | |
1097 | unsigned long flags; | |
9ef9ac51 | 1098 | unsigned int reg_save; |
a1365275 SH |
1099 | int ret; |
1100 | ||
1101 | spin_lock_irqsave(&db->lock,flags); | |
9ef9ac51 BD |
1102 | |
1103 | /* Save previous register address */ | |
1104 | reg_save = readb(db->io_addr); | |
1105 | ||
a1365275 SH |
1106 | /* Fill the phyxcer register into REG_0C */ |
1107 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | |
1108 | ||
1109 | iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */ | |
1110 | udelay(100); /* Wait read complete */ | |
1111 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */ | |
1112 | ||
1113 | /* The read data keeps on REG_0D & REG_0E */ | |
1114 | ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL); | |
1115 | ||
9ef9ac51 BD |
1116 | /* restore the previous address */ |
1117 | writeb(reg_save, db->io_addr); | |
1118 | ||
a1365275 SH |
1119 | spin_unlock_irqrestore(&db->lock,flags); |
1120 | ||
1121 | return ret; | |
1122 | } | |
1123 | ||
1124 | /* | |
1125 | * Write a word to phyxcer | |
1126 | */ | |
1127 | static void | |
1128 | dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value) | |
1129 | { | |
1130 | board_info_t *db = (board_info_t *) dev->priv; | |
1131 | unsigned long flags; | |
9ef9ac51 | 1132 | unsigned long reg_save; |
a1365275 SH |
1133 | |
1134 | spin_lock_irqsave(&db->lock,flags); | |
1135 | ||
9ef9ac51 BD |
1136 | /* Save previous register address */ |
1137 | reg_save = readb(db->io_addr); | |
1138 | ||
a1365275 SH |
1139 | /* Fill the phyxcer register into REG_0C */ |
1140 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | |
1141 | ||
1142 | /* Fill the written data into REG_0D & REG_0E */ | |
1143 | iow(db, DM9000_EPDRL, (value & 0xff)); | |
1144 | iow(db, DM9000_EPDRH, ((value >> 8) & 0xff)); | |
1145 | ||
1146 | iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */ | |
1147 | udelay(500); /* Wait write complete */ | |
1148 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */ | |
1149 | ||
9ef9ac51 BD |
1150 | /* restore the previous address */ |
1151 | writeb(reg_save, db->io_addr); | |
1152 | ||
a1365275 SH |
1153 | spin_unlock_irqrestore(&db->lock,flags); |
1154 | } | |
1155 | ||
1156 | static int | |
3ae5eaec | 1157 | dm9000_drv_suspend(struct platform_device *dev, pm_message_t state) |
a1365275 | 1158 | { |
3ae5eaec | 1159 | struct net_device *ndev = platform_get_drvdata(dev); |
a1365275 | 1160 | |
9480e307 | 1161 | if (ndev) { |
a1365275 SH |
1162 | if (netif_running(ndev)) { |
1163 | netif_device_detach(ndev); | |
1164 | dm9000_shutdown(ndev); | |
1165 | } | |
1166 | } | |
1167 | return 0; | |
1168 | } | |
1169 | ||
1170 | static int | |
3ae5eaec | 1171 | dm9000_drv_resume(struct platform_device *dev) |
a1365275 | 1172 | { |
3ae5eaec | 1173 | struct net_device *ndev = platform_get_drvdata(dev); |
a1365275 SH |
1174 | board_info_t *db = (board_info_t *) ndev->priv; |
1175 | ||
9480e307 | 1176 | if (ndev) { |
a1365275 SH |
1177 | |
1178 | if (netif_running(ndev)) { | |
1179 | dm9000_reset(db); | |
1180 | dm9000_init_dm9000(ndev); | |
1181 | ||
1182 | netif_device_attach(ndev); | |
1183 | } | |
1184 | } | |
1185 | return 0; | |
1186 | } | |
1187 | ||
1188 | static int | |
3ae5eaec | 1189 | dm9000_drv_remove(struct platform_device *pdev) |
a1365275 | 1190 | { |
3ae5eaec | 1191 | struct net_device *ndev = platform_get_drvdata(pdev); |
a1365275 | 1192 | |
3ae5eaec | 1193 | platform_set_drvdata(pdev, NULL); |
a1365275 SH |
1194 | |
1195 | unregister_netdev(ndev); | |
1196 | dm9000_release_board(pdev, (board_info_t *) ndev->priv); | |
1197 | kfree(ndev); /* free device structure */ | |
1198 | ||
1199 | PRINTK1("clean_module() exit\n"); | |
1200 | ||
1201 | return 0; | |
1202 | } | |
1203 | ||
3ae5eaec | 1204 | static struct platform_driver dm9000_driver = { |
5d22a312 BD |
1205 | .driver = { |
1206 | .name = "dm9000", | |
1207 | .owner = THIS_MODULE, | |
1208 | }, | |
a1365275 SH |
1209 | .probe = dm9000_probe, |
1210 | .remove = dm9000_drv_remove, | |
1211 | .suspend = dm9000_drv_suspend, | |
1212 | .resume = dm9000_drv_resume, | |
1213 | }; | |
1214 | ||
1215 | static int __init | |
1216 | dm9000_init(void) | |
1217 | { | |
2ae2d77c BD |
1218 | printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME); |
1219 | ||
3ae5eaec | 1220 | return platform_driver_register(&dm9000_driver); /* search board and register */ |
a1365275 SH |
1221 | } |
1222 | ||
1223 | static void __exit | |
1224 | dm9000_cleanup(void) | |
1225 | { | |
3ae5eaec | 1226 | platform_driver_unregister(&dm9000_driver); |
a1365275 SH |
1227 | } |
1228 | ||
1229 | module_init(dm9000_init); | |
1230 | module_exit(dm9000_cleanup); | |
1231 | ||
1232 | MODULE_AUTHOR("Sascha Hauer, Ben Dooks"); | |
1233 | MODULE_DESCRIPTION("Davicom DM9000 network driver"); | |
1234 | MODULE_LICENSE("GPL"); |