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a1365275 SH |
1 | /* |
2 | * dm9000.c: Version 1.2 03/18/2003 | |
3 | * | |
4 | * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux. | |
5 | * Copyright (C) 1997 Sten Wang | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version 2 | |
10 | * of the License, or (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved. | |
18 | * | |
19 | * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match | |
20 | * 06/22/2001 Support DM9801 progrmming | |
21 | * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000 | |
22 | * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200 | |
23 | * R17 = (R17 & 0xfff0) | NF + 3 | |
24 | * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200 | |
25 | * R17 = (R17 & 0xfff0) | NF | |
26 | * | |
27 | * v1.00 modify by simon 2001.9.5 | |
28 | * change for kernel 2.4.x | |
29 | * | |
30 | * v1.1 11/09/2001 fix force mode bug | |
31 | * | |
32 | * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>: | |
33 | * Fixed phy reset. | |
34 | * Added tx/rx 32 bit mode. | |
35 | * Cleaned up for kernel merge. | |
36 | * | |
37 | * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de> | |
38 | * Port to 2.6 kernel | |
39 | * | |
40 | * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk> | |
41 | * Cleanup of code to remove ifdefs | |
42 | * Allowed platform device data to influence access width | |
43 | * Reformatting areas of code | |
44 | * | |
45 | * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de> | |
46 | * * removed 2.4 style module parameters | |
47 | * * removed removed unused stat counter and fixed | |
48 | * net_device_stats | |
49 | * * introduced tx_timeout function | |
50 | * * reworked locking | |
9ef9ac51 BD |
51 | * |
52 | * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk> | |
53 | * * fixed spinlock call without pointer | |
54 | * * ensure spinlock is initialised | |
a1365275 SH |
55 | */ |
56 | ||
57 | #include <linux/module.h> | |
58 | #include <linux/ioport.h> | |
59 | #include <linux/netdevice.h> | |
60 | #include <linux/etherdevice.h> | |
61 | #include <linux/init.h> | |
62 | #include <linux/skbuff.h> | |
a1365275 SH |
63 | #include <linux/spinlock.h> |
64 | #include <linux/crc32.h> | |
65 | #include <linux/mii.h> | |
7da99859 | 66 | #include <linux/ethtool.h> |
a1365275 SH |
67 | #include <linux/dm9000.h> |
68 | #include <linux/delay.h> | |
d052d1be | 69 | #include <linux/platform_device.h> |
4e4fc05a | 70 | #include <linux/irq.h> |
a1365275 SH |
71 | |
72 | #include <asm/delay.h> | |
73 | #include <asm/irq.h> | |
74 | #include <asm/io.h> | |
75 | ||
76 | #include "dm9000.h" | |
77 | ||
78 | /* Board/System/Debug information/definition ---------------- */ | |
79 | ||
80 | #define DM9000_PHY 0x40 /* PHY address 0x01 */ | |
81 | ||
a1365275 SH |
82 | #define CARDNAME "dm9000" |
83 | #define PFX CARDNAME ": " | |
7da99859 | 84 | #define DRV_VERSION "1.30" |
a1365275 | 85 | |
f40d24d9 AL |
86 | #ifdef CONFIG_BLACKFIN |
87 | #define readsb insb | |
88 | #define readsw insw | |
89 | #define readsl insl | |
90 | #define writesb outsb | |
91 | #define writesw outsw | |
92 | #define writesl outsl | |
1a5f1c4f | 93 | #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH |
f40d24d9 | 94 | #else |
1a5f1c4f | 95 | #define DEFAULT_TRIGGER (0) |
f40d24d9 AL |
96 | #endif |
97 | ||
a1365275 SH |
98 | /* |
99 | * Transmit timeout, default 5 seconds. | |
100 | */ | |
101 | static int watchdog = 5000; | |
102 | module_param(watchdog, int, 0400); | |
103 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | |
104 | ||
105 | /* Structure/enum declaration ------------------------------- */ | |
106 | typedef struct board_info { | |
107 | ||
108 | void __iomem *io_addr; /* Register I/O base address */ | |
109 | void __iomem *io_data; /* Data I/O address */ | |
110 | u16 irq; /* IRQ */ | |
111 | ||
112 | u16 tx_pkt_cnt; | |
113 | u16 queue_pkt_len; | |
114 | u16 queue_start_addr; | |
115 | u16 dbug_cnt; | |
116 | u8 io_mode; /* 0:word, 2:byte */ | |
117 | u8 phy_addr; | |
33ba5091 | 118 | unsigned int flags; |
a1365275 | 119 | |
5b2b4ff0 BD |
120 | int debug_level; |
121 | ||
a1365275 SH |
122 | void (*inblk)(void __iomem *port, void *data, int length); |
123 | void (*outblk)(void __iomem *port, void *data, int length); | |
124 | void (*dumpblk)(void __iomem *port, int length); | |
125 | ||
a76836f9 BD |
126 | struct device *dev; /* parent device */ |
127 | ||
a1365275 SH |
128 | struct resource *addr_res; /* resources found */ |
129 | struct resource *data_res; | |
130 | struct resource *addr_req; /* resources requested */ | |
131 | struct resource *data_req; | |
132 | struct resource *irq_res; | |
133 | ||
a1365275 SH |
134 | unsigned char srom[128]; |
135 | spinlock_t lock; | |
136 | ||
137 | struct mii_if_info mii; | |
138 | u32 msg_enable; | |
139 | } board_info_t; | |
140 | ||
5b2b4ff0 BD |
141 | /* debug code */ |
142 | ||
143 | #define dm9000_dbg(db, lev, msg...) do { \ | |
144 | if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \ | |
145 | (lev) < db->debug_level) { \ | |
146 | dev_dbg(db->dev, msg); \ | |
147 | } \ | |
148 | } while (0) | |
149 | ||
7da99859 BD |
150 | static inline board_info_t *to_dm9000_board(struct net_device *dev) |
151 | { | |
152 | return dev->priv; | |
153 | } | |
154 | ||
a1365275 | 155 | /* function declaration ------------------------------------- */ |
3ae5eaec | 156 | static int dm9000_probe(struct platform_device *); |
a1365275 SH |
157 | static int dm9000_open(struct net_device *); |
158 | static int dm9000_start_xmit(struct sk_buff *, struct net_device *); | |
159 | static int dm9000_stop(struct net_device *); | |
a1365275 | 160 | |
a1365275 SH |
161 | static void dm9000_init_dm9000(struct net_device *); |
162 | ||
7d12e780 | 163 | static irqreturn_t dm9000_interrupt(int, void *); |
a1365275 SH |
164 | |
165 | static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg); | |
166 | static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, | |
167 | int value); | |
168 | static u16 read_srom_word(board_info_t *, int); | |
169 | static void dm9000_rx(struct net_device *); | |
170 | static void dm9000_hash_table(struct net_device *); | |
171 | ||
172 | //#define DM9000_PROGRAM_EEPROM | |
173 | #ifdef DM9000_PROGRAM_EEPROM | |
174 | static void program_eeprom(board_info_t * db); | |
175 | #endif | |
176 | /* DM9000 network board routine ---------------------------- */ | |
177 | ||
178 | static void | |
179 | dm9000_reset(board_info_t * db) | |
180 | { | |
a76836f9 BD |
181 | dev_dbg(db->dev, "resetting device\n"); |
182 | ||
a1365275 SH |
183 | /* RESET device */ |
184 | writeb(DM9000_NCR, db->io_addr); | |
185 | udelay(200); | |
186 | writeb(NCR_RST, db->io_data); | |
187 | udelay(200); | |
188 | } | |
189 | ||
190 | /* | |
191 | * Read a byte from I/O port | |
192 | */ | |
193 | static u8 | |
194 | ior(board_info_t * db, int reg) | |
195 | { | |
196 | writeb(reg, db->io_addr); | |
197 | return readb(db->io_data); | |
198 | } | |
199 | ||
200 | /* | |
201 | * Write a byte to I/O port | |
202 | */ | |
203 | ||
204 | static void | |
205 | iow(board_info_t * db, int reg, int value) | |
206 | { | |
207 | writeb(reg, db->io_addr); | |
208 | writeb(value, db->io_data); | |
209 | } | |
210 | ||
211 | /* routines for sending block to chip */ | |
212 | ||
213 | static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count) | |
214 | { | |
215 | writesb(reg, data, count); | |
216 | } | |
217 | ||
218 | static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count) | |
219 | { | |
220 | writesw(reg, data, (count+1) >> 1); | |
221 | } | |
222 | ||
223 | static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count) | |
224 | { | |
225 | writesl(reg, data, (count+3) >> 2); | |
226 | } | |
227 | ||
228 | /* input block from chip to memory */ | |
229 | ||
230 | static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count) | |
231 | { | |
5f6b5517 | 232 | readsb(reg, data, count); |
a1365275 SH |
233 | } |
234 | ||
235 | ||
236 | static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count) | |
237 | { | |
238 | readsw(reg, data, (count+1) >> 1); | |
239 | } | |
240 | ||
241 | static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count) | |
242 | { | |
243 | readsl(reg, data, (count+3) >> 2); | |
244 | } | |
245 | ||
246 | /* dump block from chip to null */ | |
247 | ||
248 | static void dm9000_dumpblk_8bit(void __iomem *reg, int count) | |
249 | { | |
250 | int i; | |
251 | int tmp; | |
252 | ||
253 | for (i = 0; i < count; i++) | |
254 | tmp = readb(reg); | |
255 | } | |
256 | ||
257 | static void dm9000_dumpblk_16bit(void __iomem *reg, int count) | |
258 | { | |
259 | int i; | |
260 | int tmp; | |
261 | ||
262 | count = (count + 1) >> 1; | |
263 | ||
264 | for (i = 0; i < count; i++) | |
265 | tmp = readw(reg); | |
266 | } | |
267 | ||
268 | static void dm9000_dumpblk_32bit(void __iomem *reg, int count) | |
269 | { | |
270 | int i; | |
271 | int tmp; | |
272 | ||
273 | count = (count + 3) >> 2; | |
274 | ||
275 | for (i = 0; i < count; i++) | |
276 | tmp = readl(reg); | |
277 | } | |
278 | ||
279 | /* dm9000_set_io | |
280 | * | |
281 | * select the specified set of io routines to use with the | |
282 | * device | |
283 | */ | |
284 | ||
285 | static void dm9000_set_io(struct board_info *db, int byte_width) | |
286 | { | |
287 | /* use the size of the data resource to work out what IO | |
288 | * routines we want to use | |
289 | */ | |
290 | ||
291 | switch (byte_width) { | |
292 | case 1: | |
293 | db->dumpblk = dm9000_dumpblk_8bit; | |
294 | db->outblk = dm9000_outblk_8bit; | |
295 | db->inblk = dm9000_inblk_8bit; | |
296 | break; | |
297 | ||
a1365275 SH |
298 | |
299 | case 3: | |
a76836f9 BD |
300 | dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n"); |
301 | case 2: | |
a1365275 SH |
302 | db->dumpblk = dm9000_dumpblk_16bit; |
303 | db->outblk = dm9000_outblk_16bit; | |
304 | db->inblk = dm9000_inblk_16bit; | |
305 | break; | |
306 | ||
307 | case 4: | |
308 | default: | |
309 | db->dumpblk = dm9000_dumpblk_32bit; | |
310 | db->outblk = dm9000_outblk_32bit; | |
311 | db->inblk = dm9000_inblk_32bit; | |
312 | break; | |
313 | } | |
314 | } | |
315 | ||
316 | ||
317 | /* Our watchdog timed out. Called by the networking layer */ | |
318 | static void dm9000_timeout(struct net_device *dev) | |
319 | { | |
320 | board_info_t *db = (board_info_t *) dev->priv; | |
321 | u8 reg_save; | |
322 | unsigned long flags; | |
323 | ||
324 | /* Save previous register address */ | |
325 | reg_save = readb(db->io_addr); | |
9ef9ac51 | 326 | spin_lock_irqsave(&db->lock,flags); |
a1365275 SH |
327 | |
328 | netif_stop_queue(dev); | |
329 | dm9000_reset(db); | |
330 | dm9000_init_dm9000(dev); | |
331 | /* We can accept TX packets again */ | |
332 | dev->trans_start = jiffies; | |
333 | netif_wake_queue(dev); | |
334 | ||
335 | /* Restore previous register address */ | |
336 | writeb(reg_save, db->io_addr); | |
9ef9ac51 | 337 | spin_unlock_irqrestore(&db->lock,flags); |
a1365275 SH |
338 | } |
339 | ||
2fd0e33f KH |
340 | #ifdef CONFIG_NET_POLL_CONTROLLER |
341 | /* | |
342 | *Used by netconsole | |
343 | */ | |
344 | static void dm9000_poll_controller(struct net_device *dev) | |
345 | { | |
346 | disable_irq(dev->irq); | |
28431146 | 347 | dm9000_interrupt(dev->irq,dev); |
2fd0e33f KH |
348 | enable_irq(dev->irq); |
349 | } | |
350 | #endif | |
a1365275 | 351 | |
7da99859 BD |
352 | /* ethtool ops */ |
353 | ||
354 | static void dm9000_get_drvinfo(struct net_device *dev, | |
355 | struct ethtool_drvinfo *info) | |
356 | { | |
357 | board_info_t *dm = to_dm9000_board(dev); | |
358 | ||
359 | strcpy(info->driver, CARDNAME); | |
360 | strcpy(info->version, DRV_VERSION); | |
361 | strcpy(info->bus_info, to_platform_device(dm->dev)->name); | |
362 | } | |
363 | ||
364 | static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
365 | { | |
366 | board_info_t *dm = to_dm9000_board(dev); | |
367 | unsigned long flags; | |
368 | ||
369 | spin_lock_irqsave(&dm->lock, flags); | |
370 | mii_ethtool_gset(&dm->mii, cmd); | |
371 | spin_lock_irqsave(&dm->lock, flags); | |
372 | ||
373 | return 0; | |
374 | } | |
375 | ||
376 | static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
377 | { | |
378 | board_info_t *dm = to_dm9000_board(dev); | |
379 | unsigned long flags; | |
380 | int rc; | |
381 | ||
382 | spin_lock_irqsave(&dm->lock, flags); | |
383 | rc = mii_ethtool_sset(&dm->mii, cmd); | |
384 | spin_lock_irqsave(&dm->lock, flags); | |
385 | ||
386 | return rc; | |
387 | } | |
388 | ||
389 | static int dm9000_nway_reset(struct net_device *dev) | |
390 | { | |
391 | board_info_t *dm = to_dm9000_board(dev); | |
392 | return mii_nway_restart(&dm->mii); | |
393 | } | |
394 | ||
395 | static u32 dm9000_get_link(struct net_device *dev) | |
396 | { | |
397 | board_info_t *dm = to_dm9000_board(dev); | |
398 | return mii_link_ok(&dm->mii); | |
399 | } | |
400 | ||
401 | static const struct ethtool_ops dm9000_ethtool_ops = { | |
402 | .get_drvinfo = dm9000_get_drvinfo, | |
403 | .get_settings = dm9000_get_settings, | |
404 | .set_settings = dm9000_set_settings, | |
405 | .nway_reset = dm9000_nway_reset, | |
406 | .get_link = dm9000_get_link, | |
407 | }; | |
408 | ||
409 | ||
a1365275 SH |
410 | /* dm9000_release_board |
411 | * | |
412 | * release a board, and any mapped resources | |
413 | */ | |
414 | ||
415 | static void | |
416 | dm9000_release_board(struct platform_device *pdev, struct board_info *db) | |
417 | { | |
418 | if (db->data_res == NULL) { | |
419 | if (db->addr_res != NULL) | |
420 | release_mem_region((unsigned long)db->io_addr, 4); | |
421 | return; | |
422 | } | |
423 | ||
424 | /* unmap our resources */ | |
425 | ||
426 | iounmap(db->io_addr); | |
427 | iounmap(db->io_data); | |
428 | ||
429 | /* release the resources */ | |
430 | ||
431 | if (db->data_req != NULL) { | |
432 | release_resource(db->data_req); | |
433 | kfree(db->data_req); | |
434 | } | |
435 | ||
51985487 DO |
436 | if (db->addr_req != NULL) { |
437 | release_resource(db->addr_req); | |
a1365275 SH |
438 | kfree(db->addr_req); |
439 | } | |
440 | } | |
441 | ||
442 | #define res_size(_r) (((_r)->end - (_r)->start) + 1) | |
443 | ||
444 | /* | |
445 | * Search DM9000 board, allocate space and register it | |
446 | */ | |
447 | static int | |
3ae5eaec | 448 | dm9000_probe(struct platform_device *pdev) |
a1365275 | 449 | { |
a1365275 SH |
450 | struct dm9000_plat_data *pdata = pdev->dev.platform_data; |
451 | struct board_info *db; /* Point a board information structure */ | |
452 | struct net_device *ndev; | |
453 | unsigned long base; | |
454 | int ret = 0; | |
455 | int iosize; | |
456 | int i; | |
457 | u32 id_val; | |
458 | ||
a1365275 SH |
459 | /* Init network device */ |
460 | ndev = alloc_etherdev(sizeof (struct board_info)); | |
461 | if (!ndev) { | |
a76836f9 | 462 | dev_err(&pdev->dev, "could not allocate device.\n"); |
a1365275 SH |
463 | return -ENOMEM; |
464 | } | |
465 | ||
3ae5eaec | 466 | SET_NETDEV_DEV(ndev, &pdev->dev); |
a1365275 | 467 | |
a76836f9 | 468 | dev_dbg(&pdev->dev, "dm9000_probe()"); |
a1365275 SH |
469 | |
470 | /* setup board info structure */ | |
471 | db = (struct board_info *) ndev->priv; | |
472 | memset(db, 0, sizeof (*db)); | |
473 | ||
a76836f9 BD |
474 | db->dev = &pdev->dev; |
475 | ||
9ef9ac51 BD |
476 | spin_lock_init(&db->lock); |
477 | ||
a1365275 SH |
478 | if (pdev->num_resources < 2) { |
479 | ret = -ENODEV; | |
480 | goto out; | |
b4ed03ff | 481 | } else if (pdev->num_resources == 2) { |
a1365275 SH |
482 | base = pdev->resource[0].start; |
483 | ||
484 | if (!request_mem_region(base, 4, ndev->name)) { | |
485 | ret = -EBUSY; | |
486 | goto out; | |
487 | } | |
488 | ||
489 | ndev->base_addr = base; | |
490 | ndev->irq = pdev->resource[1].start; | |
b4ed03ff BD |
491 | db->io_addr = (void __iomem *)base; |
492 | db->io_data = (void __iomem *)(base + 4); | |
a1365275 | 493 | |
f40d24d9 AL |
494 | /* ensure at least we have a default set of IO routines */ |
495 | dm9000_set_io(db, 2); | |
496 | ||
b4ed03ff | 497 | } else { |
a1365275 SH |
498 | db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
499 | db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
500 | db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
501 | ||
b4ed03ff BD |
502 | if (db->addr_res == NULL || db->data_res == NULL || |
503 | db->irq_res == NULL) { | |
a76836f9 | 504 | dev_err(db->dev, "insufficient resources\n"); |
a1365275 SH |
505 | ret = -ENOENT; |
506 | goto out; | |
507 | } | |
508 | ||
509 | i = res_size(db->addr_res); | |
510 | db->addr_req = request_mem_region(db->addr_res->start, i, | |
511 | pdev->name); | |
512 | ||
513 | if (db->addr_req == NULL) { | |
a76836f9 | 514 | dev_err(db->dev, "cannot claim address reg area\n"); |
a1365275 SH |
515 | ret = -EIO; |
516 | goto out; | |
517 | } | |
518 | ||
519 | db->io_addr = ioremap(db->addr_res->start, i); | |
520 | ||
521 | if (db->io_addr == NULL) { | |
a76836f9 | 522 | dev_err(db->dev, "failed to ioremap address reg\n"); |
a1365275 SH |
523 | ret = -EINVAL; |
524 | goto out; | |
525 | } | |
526 | ||
527 | iosize = res_size(db->data_res); | |
528 | db->data_req = request_mem_region(db->data_res->start, iosize, | |
529 | pdev->name); | |
530 | ||
531 | if (db->data_req == NULL) { | |
a76836f9 | 532 | dev_err(db->dev, "cannot claim data reg area\n"); |
a1365275 SH |
533 | ret = -EIO; |
534 | goto out; | |
535 | } | |
536 | ||
537 | db->io_data = ioremap(db->data_res->start, iosize); | |
538 | ||
539 | if (db->io_data == NULL) { | |
a76836f9 | 540 | dev_err(db->dev,"failed to ioremap data reg\n"); |
a1365275 SH |
541 | ret = -EINVAL; |
542 | goto out; | |
543 | } | |
544 | ||
545 | /* fill in parameters for net-dev structure */ | |
546 | ||
547 | ndev->base_addr = (unsigned long)db->io_addr; | |
548 | ndev->irq = db->irq_res->start; | |
549 | ||
550 | /* ensure at least we have a default set of IO routines */ | |
551 | dm9000_set_io(db, iosize); | |
a1365275 SH |
552 | } |
553 | ||
554 | /* check to see if anything is being over-ridden */ | |
555 | if (pdata != NULL) { | |
556 | /* check to see if the driver wants to over-ride the | |
557 | * default IO width */ | |
558 | ||
559 | if (pdata->flags & DM9000_PLATF_8BITONLY) | |
560 | dm9000_set_io(db, 1); | |
561 | ||
562 | if (pdata->flags & DM9000_PLATF_16BITONLY) | |
563 | dm9000_set_io(db, 2); | |
564 | ||
565 | if (pdata->flags & DM9000_PLATF_32BITONLY) | |
566 | dm9000_set_io(db, 4); | |
567 | ||
568 | /* check to see if there are any IO routine | |
569 | * over-rides */ | |
570 | ||
571 | if (pdata->inblk != NULL) | |
572 | db->inblk = pdata->inblk; | |
573 | ||
574 | if (pdata->outblk != NULL) | |
575 | db->outblk = pdata->outblk; | |
576 | ||
577 | if (pdata->dumpblk != NULL) | |
578 | db->dumpblk = pdata->dumpblk; | |
33ba5091 BD |
579 | |
580 | db->flags = pdata->flags; | |
a1365275 SH |
581 | } |
582 | ||
583 | dm9000_reset(db); | |
584 | ||
585 | /* try two times, DM9000 sometimes gets the first read wrong */ | |
586 | for (i = 0; i < 2; i++) { | |
587 | id_val = ior(db, DM9000_VIDL); | |
588 | id_val |= (u32)ior(db, DM9000_VIDH) << 8; | |
589 | id_val |= (u32)ior(db, DM9000_PIDL) << 16; | |
590 | id_val |= (u32)ior(db, DM9000_PIDH) << 24; | |
591 | ||
592 | if (id_val == DM9000_ID) | |
593 | break; | |
a76836f9 | 594 | dev_err(db->dev, "read wrong id 0x%08x\n", id_val); |
a1365275 SH |
595 | } |
596 | ||
597 | if (id_val != DM9000_ID) { | |
a76836f9 | 598 | dev_err(db->dev, "wrong id: 0x%08x\n", id_val); |
418d6f87 MR |
599 | ret = -ENODEV; |
600 | goto out; | |
a1365275 SH |
601 | } |
602 | ||
603 | /* from this point we assume that we have found a DM9000 */ | |
604 | ||
605 | /* driver system function */ | |
606 | ether_setup(ndev); | |
607 | ||
608 | ndev->open = &dm9000_open; | |
609 | ndev->hard_start_xmit = &dm9000_start_xmit; | |
610 | ndev->tx_timeout = &dm9000_timeout; | |
611 | ndev->watchdog_timeo = msecs_to_jiffies(watchdog); | |
612 | ndev->stop = &dm9000_stop; | |
a1365275 | 613 | ndev->set_multicast_list = &dm9000_hash_table; |
7da99859 BD |
614 | ndev->ethtool_ops = &dm9000_ethtool_ops; |
615 | ||
2fd0e33f KH |
616 | #ifdef CONFIG_NET_POLL_CONTROLLER |
617 | ndev->poll_controller = &dm9000_poll_controller; | |
618 | #endif | |
a1365275 SH |
619 | |
620 | #ifdef DM9000_PROGRAM_EEPROM | |
621 | program_eeprom(db); | |
622 | #endif | |
623 | db->msg_enable = NETIF_MSG_LINK; | |
624 | db->mii.phy_id_mask = 0x1f; | |
625 | db->mii.reg_num_mask = 0x1f; | |
626 | db->mii.force_media = 0; | |
627 | db->mii.full_duplex = 0; | |
628 | db->mii.dev = ndev; | |
629 | db->mii.mdio_read = dm9000_phy_read; | |
630 | db->mii.mdio_write = dm9000_phy_write; | |
631 | ||
632 | /* Read SROM content */ | |
633 | for (i = 0; i < 64; i++) | |
634 | ((u16 *) db->srom)[i] = read_srom_word(db, i); | |
635 | ||
636 | /* Set Node Address */ | |
637 | for (i = 0; i < 6; i++) | |
638 | ndev->dev_addr[i] = db->srom[i]; | |
639 | ||
5b55dda6 BD |
640 | if (!is_valid_ether_addr(ndev->dev_addr)) { |
641 | /* try reading from mac */ | |
642 | ||
643 | for (i = 0; i < 6; i++) | |
644 | ndev->dev_addr[i] = ior(db, i+DM9000_PAR); | |
645 | } | |
646 | ||
a1365275 | 647 | if (!is_valid_ether_addr(ndev->dev_addr)) |
a76836f9 BD |
648 | dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please " |
649 | "set using ifconfig\n", ndev->name); | |
a1365275 | 650 | |
3ae5eaec | 651 | platform_set_drvdata(pdev, ndev); |
a1365275 SH |
652 | ret = register_netdev(ndev); |
653 | ||
654 | if (ret == 0) { | |
0795af57 JP |
655 | DECLARE_MAC_BUF(mac); |
656 | printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n", | |
657 | ndev->name, db->io_addr, db->io_data, ndev->irq, | |
658 | print_mac(mac, ndev->dev_addr)); | |
a1365275 SH |
659 | } |
660 | return 0; | |
661 | ||
418d6f87 | 662 | out: |
a76836f9 | 663 | dev_err(db->dev, "not found (%d).\n", ret); |
a1365275 SH |
664 | |
665 | dm9000_release_board(pdev, db); | |
9fd9f9b6 | 666 | free_netdev(ndev); |
a1365275 SH |
667 | |
668 | return ret; | |
669 | } | |
670 | ||
671 | /* | |
672 | * Open the interface. | |
673 | * The interface is opened whenever "ifconfig" actives it. | |
674 | */ | |
675 | static int | |
676 | dm9000_open(struct net_device *dev) | |
677 | { | |
678 | board_info_t *db = (board_info_t *) dev->priv; | |
1a5f1c4f | 679 | unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK; |
a1365275 | 680 | |
a76836f9 | 681 | dev_dbg(db->dev, "entering %s\n", __func__); |
a1365275 | 682 | |
1a5f1c4f BD |
683 | /* If there is no IRQ type specified, default to something that |
684 | * may work, and tell the user that this is a problem */ | |
685 | ||
686 | if (irqflags == IRQF_TRIGGER_NONE) { | |
687 | dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n"); | |
688 | irqflags = DEFAULT_TRIGGER; | |
689 | } | |
690 | ||
691 | irqflags |= IRQF_SHARED; | |
692 | ||
693 | if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev)) | |
a1365275 SH |
694 | return -EAGAIN; |
695 | ||
696 | /* Initialize DM9000 board */ | |
697 | dm9000_reset(db); | |
698 | dm9000_init_dm9000(dev); | |
699 | ||
700 | /* Init driver variable */ | |
701 | db->dbug_cnt = 0; | |
702 | ||
a1365275 SH |
703 | mii_check_media(&db->mii, netif_msg_link(db), 1); |
704 | netif_start_queue(dev); | |
705 | ||
706 | return 0; | |
707 | } | |
708 | ||
709 | /* | |
710 | * Initilize dm9000 board | |
711 | */ | |
712 | static void | |
713 | dm9000_init_dm9000(struct net_device *dev) | |
714 | { | |
715 | board_info_t *db = (board_info_t *) dev->priv; | |
716 | ||
5b2b4ff0 | 717 | dm9000_dbg(db, 1, "entering %s\n", __func__); |
a1365275 SH |
718 | |
719 | /* I/O mode */ | |
720 | db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */ | |
721 | ||
722 | /* GPIO0 on pre-activate PHY */ | |
723 | iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ | |
724 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ | |
725 | iow(db, DM9000_GPR, 0); /* Enable PHY */ | |
726 | ||
33ba5091 BD |
727 | if (db->flags & DM9000_PLATF_EXT_PHY) |
728 | iow(db, DM9000_NCR, NCR_EXT_PHY); | |
729 | ||
a1365275 SH |
730 | /* Program operating register */ |
731 | iow(db, DM9000_TCR, 0); /* TX Polling clear */ | |
732 | iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */ | |
733 | iow(db, DM9000_FCR, 0xff); /* Flow Control */ | |
734 | iow(db, DM9000_SMCR, 0); /* Special Mode */ | |
735 | /* clear TX status */ | |
736 | iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); | |
737 | iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */ | |
738 | ||
739 | /* Set address filter table */ | |
740 | dm9000_hash_table(dev); | |
741 | ||
742 | /* Activate DM9000 */ | |
743 | iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN); | |
744 | /* Enable TX/RX interrupt mask */ | |
745 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
746 | ||
747 | /* Init Driver variable */ | |
748 | db->tx_pkt_cnt = 0; | |
749 | db->queue_pkt_len = 0; | |
750 | dev->trans_start = 0; | |
a1365275 SH |
751 | } |
752 | ||
753 | /* | |
754 | * Hardware start transmission. | |
755 | * Send a packet to media from the upper layer. | |
756 | */ | |
757 | static int | |
758 | dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
759 | { | |
c46ac946 | 760 | unsigned long flags; |
a1365275 SH |
761 | board_info_t *db = (board_info_t *) dev->priv; |
762 | ||
5b2b4ff0 | 763 | dm9000_dbg(db, 3, "%s:\n", __func__); |
a1365275 SH |
764 | |
765 | if (db->tx_pkt_cnt > 1) | |
766 | return 1; | |
767 | ||
c46ac946 | 768 | spin_lock_irqsave(&db->lock, flags); |
a1365275 SH |
769 | |
770 | /* Move data to DM9000 TX RAM */ | |
771 | writeb(DM9000_MWCMD, db->io_addr); | |
772 | ||
773 | (db->outblk)(db->io_data, skb->data, skb->len); | |
09f75cd7 | 774 | dev->stats.tx_bytes += skb->len; |
a1365275 | 775 | |
c46ac946 | 776 | db->tx_pkt_cnt++; |
a1365275 | 777 | /* TX control: First packet immediately send, second packet queue */ |
c46ac946 | 778 | if (db->tx_pkt_cnt == 1) { |
a1365275 SH |
779 | /* Set TX length to DM9000 */ |
780 | iow(db, DM9000_TXPLL, skb->len & 0xff); | |
781 | iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff); | |
782 | ||
783 | /* Issue TX polling command */ | |
784 | iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ | |
785 | ||
786 | dev->trans_start = jiffies; /* save the time stamp */ | |
a1365275 SH |
787 | } else { |
788 | /* Second packet */ | |
a1365275 | 789 | db->queue_pkt_len = skb->len; |
c46ac946 | 790 | netif_stop_queue(dev); |
a1365275 SH |
791 | } |
792 | ||
c46ac946 FW |
793 | spin_unlock_irqrestore(&db->lock, flags); |
794 | ||
a1365275 SH |
795 | /* free this SKB */ |
796 | dev_kfree_skb(skb); | |
797 | ||
a1365275 SH |
798 | return 0; |
799 | } | |
800 | ||
801 | static void | |
802 | dm9000_shutdown(struct net_device *dev) | |
803 | { | |
804 | board_info_t *db = (board_info_t *) dev->priv; | |
805 | ||
806 | /* RESET device */ | |
807 | dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */ | |
808 | iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */ | |
809 | iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */ | |
810 | iow(db, DM9000_RCR, 0x00); /* Disable RX */ | |
811 | } | |
812 | ||
813 | /* | |
814 | * Stop the interface. | |
815 | * The interface is stopped when it is brought. | |
816 | */ | |
817 | static int | |
818 | dm9000_stop(struct net_device *ndev) | |
819 | { | |
820 | board_info_t *db = (board_info_t *) ndev->priv; | |
821 | ||
5b2b4ff0 | 822 | dm9000_dbg(db, 1, "entering %s\n", __func__); |
a1365275 | 823 | |
a1365275 SH |
824 | netif_stop_queue(ndev); |
825 | netif_carrier_off(ndev); | |
826 | ||
827 | /* free interrupt */ | |
828 | free_irq(ndev->irq, ndev); | |
829 | ||
830 | dm9000_shutdown(ndev); | |
831 | ||
832 | return 0; | |
833 | } | |
834 | ||
835 | /* | |
836 | * DM9000 interrupt handler | |
837 | * receive the packet to upper layer, free the transmitted packet | |
838 | */ | |
839 | ||
5d22a312 | 840 | static void |
a1365275 SH |
841 | dm9000_tx_done(struct net_device *dev, board_info_t * db) |
842 | { | |
843 | int tx_status = ior(db, DM9000_NSR); /* Got TX status */ | |
844 | ||
845 | if (tx_status & (NSR_TX2END | NSR_TX1END)) { | |
846 | /* One packet sent complete */ | |
847 | db->tx_pkt_cnt--; | |
09f75cd7 | 848 | dev->stats.tx_packets++; |
a1365275 SH |
849 | |
850 | /* Queue packet check & send */ | |
851 | if (db->tx_pkt_cnt > 0) { | |
852 | iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff); | |
853 | iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff); | |
854 | iow(db, DM9000_TCR, TCR_TXREQ); | |
855 | dev->trans_start = jiffies; | |
856 | } | |
857 | netif_wake_queue(dev); | |
858 | } | |
859 | } | |
860 | ||
861 | static irqreturn_t | |
7d12e780 | 862 | dm9000_interrupt(int irq, void *dev_id) |
a1365275 SH |
863 | { |
864 | struct net_device *dev = dev_id; | |
5b2b4ff0 | 865 | board_info_t *db = (board_info_t *) dev->priv; |
a1365275 SH |
866 | int int_status; |
867 | u8 reg_save; | |
868 | ||
5b2b4ff0 | 869 | dm9000_dbg(db, 3, "entering %s\n", __func__); |
a1365275 SH |
870 | |
871 | /* A real interrupt coming */ | |
5b2b4ff0 | 872 | |
a1365275 SH |
873 | spin_lock(&db->lock); |
874 | ||
875 | /* Save previous register address */ | |
876 | reg_save = readb(db->io_addr); | |
877 | ||
878 | /* Disable all interrupts */ | |
879 | iow(db, DM9000_IMR, IMR_PAR); | |
880 | ||
881 | /* Got DM9000 interrupt status */ | |
882 | int_status = ior(db, DM9000_ISR); /* Got ISR */ | |
883 | iow(db, DM9000_ISR, int_status); /* Clear ISR status */ | |
884 | ||
885 | /* Received the coming packet */ | |
886 | if (int_status & ISR_PRS) | |
887 | dm9000_rx(dev); | |
888 | ||
889 | /* Trnasmit Interrupt check */ | |
890 | if (int_status & ISR_PTS) | |
891 | dm9000_tx_done(dev, db); | |
892 | ||
893 | /* Re-enable interrupt mask */ | |
894 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
895 | ||
896 | /* Restore previous register address */ | |
897 | writeb(reg_save, db->io_addr); | |
898 | ||
899 | spin_unlock(&db->lock); | |
900 | ||
901 | return IRQ_HANDLED; | |
902 | } | |
903 | ||
a1365275 | 904 | struct dm9000_rxhdr { |
93116573 BD |
905 | u8 RxPktReady; |
906 | u8 RxStatus; | |
a1365275 SH |
907 | u16 RxLen; |
908 | } __attribute__((__packed__)); | |
909 | ||
910 | /* | |
911 | * Received a packet and pass to upper layer | |
912 | */ | |
913 | static void | |
914 | dm9000_rx(struct net_device *dev) | |
915 | { | |
916 | board_info_t *db = (board_info_t *) dev->priv; | |
917 | struct dm9000_rxhdr rxhdr; | |
918 | struct sk_buff *skb; | |
919 | u8 rxbyte, *rdptr; | |
6478fac6 | 920 | bool GoodPacket; |
a1365275 SH |
921 | int RxLen; |
922 | ||
923 | /* Check packet ready or not */ | |
924 | do { | |
925 | ior(db, DM9000_MRCMDX); /* Dummy read */ | |
926 | ||
927 | /* Get most updated data */ | |
928 | rxbyte = readb(db->io_data); | |
929 | ||
930 | /* Status check: this byte must be 0 or 1 */ | |
931 | if (rxbyte > DM9000_PKT_RDY) { | |
a76836f9 | 932 | dev_warn(db->dev, "status check fail: %d\n", rxbyte); |
a1365275 SH |
933 | iow(db, DM9000_RCR, 0x00); /* Stop Device */ |
934 | iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */ | |
935 | return; | |
936 | } | |
937 | ||
938 | if (rxbyte != DM9000_PKT_RDY) | |
939 | return; | |
940 | ||
941 | /* A packet ready now & Get status/length */ | |
6478fac6 | 942 | GoodPacket = true; |
a1365275 SH |
943 | writeb(DM9000_MRCMD, db->io_addr); |
944 | ||
945 | (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr)); | |
946 | ||
93116573 | 947 | RxLen = le16_to_cpu(rxhdr.RxLen); |
a1365275 SH |
948 | |
949 | /* Packet Status check */ | |
950 | if (RxLen < 0x40) { | |
6478fac6 | 951 | GoodPacket = false; |
a76836f9 | 952 | dev_dbg(db->dev, "Bad Packet received (runt)\n"); |
a1365275 SH |
953 | } |
954 | ||
955 | if (RxLen > DM9000_PKT_MAX) { | |
a76836f9 | 956 | dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen); |
a1365275 SH |
957 | } |
958 | ||
93116573 | 959 | if (rxhdr.RxStatus & 0xbf) { |
6478fac6 | 960 | GoodPacket = false; |
93116573 | 961 | if (rxhdr.RxStatus & 0x01) { |
a76836f9 | 962 | dev_dbg(db->dev, "fifo error\n"); |
09f75cd7 | 963 | dev->stats.rx_fifo_errors++; |
a1365275 | 964 | } |
93116573 | 965 | if (rxhdr.RxStatus & 0x02) { |
a76836f9 | 966 | dev_dbg(db->dev, "crc error\n"); |
09f75cd7 | 967 | dev->stats.rx_crc_errors++; |
a1365275 | 968 | } |
93116573 | 969 | if (rxhdr.RxStatus & 0x80) { |
a76836f9 | 970 | dev_dbg(db->dev, "length error\n"); |
09f75cd7 | 971 | dev->stats.rx_length_errors++; |
a1365275 SH |
972 | } |
973 | } | |
974 | ||
975 | /* Move data from DM9000 */ | |
976 | if (GoodPacket | |
977 | && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) { | |
a1365275 SH |
978 | skb_reserve(skb, 2); |
979 | rdptr = (u8 *) skb_put(skb, RxLen - 4); | |
980 | ||
981 | /* Read received packet from RX SRAM */ | |
982 | ||
983 | (db->inblk)(db->io_data, rdptr, RxLen); | |
09f75cd7 | 984 | dev->stats.rx_bytes += RxLen; |
a1365275 SH |
985 | |
986 | /* Pass to upper layer */ | |
987 | skb->protocol = eth_type_trans(skb, dev); | |
988 | netif_rx(skb); | |
09f75cd7 | 989 | dev->stats.rx_packets++; |
a1365275 SH |
990 | |
991 | } else { | |
992 | /* need to dump the packet's data */ | |
993 | ||
994 | (db->dumpblk)(db->io_data, RxLen); | |
995 | } | |
996 | } while (rxbyte == DM9000_PKT_RDY); | |
997 | } | |
998 | ||
999 | /* | |
1000 | * Read a word data from SROM | |
1001 | */ | |
1002 | static u16 | |
1003 | read_srom_word(board_info_t * db, int offset) | |
1004 | { | |
1005 | iow(db, DM9000_EPAR, offset); | |
1006 | iow(db, DM9000_EPCR, EPCR_ERPRR); | |
1007 | mdelay(8); /* according to the datasheet 200us should be enough, | |
1008 | but it doesn't work */ | |
1009 | iow(db, DM9000_EPCR, 0x0); | |
1010 | return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8)); | |
1011 | } | |
1012 | ||
1013 | #ifdef DM9000_PROGRAM_EEPROM | |
1014 | /* | |
1015 | * Write a word data to SROM | |
1016 | */ | |
1017 | static void | |
1018 | write_srom_word(board_info_t * db, int offset, u16 val) | |
1019 | { | |
1020 | iow(db, DM9000_EPAR, offset); | |
1021 | iow(db, DM9000_EPDRH, ((val >> 8) & 0xff)); | |
1022 | iow(db, DM9000_EPDRL, (val & 0xff)); | |
1023 | iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW); | |
1024 | mdelay(8); /* same shit */ | |
1025 | iow(db, DM9000_EPCR, 0); | |
1026 | } | |
1027 | ||
1028 | /* | |
1029 | * Only for development: | |
1030 | * Here we write static data to the eeprom in case | |
1031 | * we don't have valid content on a new board | |
1032 | */ | |
1033 | static void | |
1034 | program_eeprom(board_info_t * db) | |
1035 | { | |
1036 | u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */ | |
1037 | 0x0000, /* Autoload: accept nothing */ | |
1038 | 0x0a46, 0x9000, /* Vendor / Product ID */ | |
1039 | 0x0000, /* pin control */ | |
1040 | 0x0000, | |
1041 | }; /* Wake-up mode control */ | |
1042 | int i; | |
1043 | for (i = 0; i < 8; i++) | |
1044 | write_srom_word(db, i, eeprom[i]); | |
1045 | } | |
1046 | #endif | |
1047 | ||
1048 | ||
1049 | /* | |
1050 | * Calculate the CRC valude of the Rx packet | |
1051 | * flag = 1 : return the reverse CRC (for the received packet CRC) | |
1052 | * 0 : return the normal CRC (for Hash Table index) | |
1053 | */ | |
1054 | ||
1055 | static unsigned long | |
1056 | cal_CRC(unsigned char *Data, unsigned int Len, u8 flag) | |
1057 | { | |
1058 | ||
1059 | u32 crc = ether_crc_le(Len, Data); | |
1060 | ||
1061 | if (flag) | |
1062 | return ~crc; | |
1063 | ||
1064 | return crc; | |
1065 | } | |
1066 | ||
1067 | /* | |
1068 | * Set DM9000 multicast address | |
1069 | */ | |
1070 | static void | |
1071 | dm9000_hash_table(struct net_device *dev) | |
1072 | { | |
1073 | board_info_t *db = (board_info_t *) dev->priv; | |
1074 | struct dev_mc_list *mcptr = dev->mc_list; | |
1075 | int mc_cnt = dev->mc_count; | |
1076 | u32 hash_val; | |
1077 | u16 i, oft, hash_table[4]; | |
1078 | unsigned long flags; | |
1079 | ||
5b2b4ff0 | 1080 | dm9000_dbg(db, 1, "entering %s\n", __func__); |
a1365275 SH |
1081 | |
1082 | spin_lock_irqsave(&db->lock,flags); | |
1083 | ||
1084 | for (i = 0, oft = 0x10; i < 6; i++, oft++) | |
1085 | iow(db, oft, dev->dev_addr[i]); | |
1086 | ||
1087 | /* Clear Hash Table */ | |
1088 | for (i = 0; i < 4; i++) | |
1089 | hash_table[i] = 0x0; | |
1090 | ||
1091 | /* broadcast address */ | |
1092 | hash_table[3] = 0x8000; | |
1093 | ||
1094 | /* the multicast address in Hash Table : 64 bits */ | |
1095 | for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { | |
1096 | hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f; | |
1097 | hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16); | |
1098 | } | |
1099 | ||
1100 | /* Write the hash table to MAC MD table */ | |
1101 | for (i = 0, oft = 0x16; i < 4; i++) { | |
1102 | iow(db, oft++, hash_table[i] & 0xff); | |
1103 | iow(db, oft++, (hash_table[i] >> 8) & 0xff); | |
1104 | } | |
1105 | ||
1106 | spin_unlock_irqrestore(&db->lock,flags); | |
1107 | } | |
1108 | ||
1109 | ||
1110 | /* | |
1111 | * Read a word from phyxcer | |
1112 | */ | |
1113 | static int | |
1114 | dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg) | |
1115 | { | |
1116 | board_info_t *db = (board_info_t *) dev->priv; | |
1117 | unsigned long flags; | |
9ef9ac51 | 1118 | unsigned int reg_save; |
a1365275 SH |
1119 | int ret; |
1120 | ||
1121 | spin_lock_irqsave(&db->lock,flags); | |
9ef9ac51 BD |
1122 | |
1123 | /* Save previous register address */ | |
1124 | reg_save = readb(db->io_addr); | |
1125 | ||
a1365275 SH |
1126 | /* Fill the phyxcer register into REG_0C */ |
1127 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | |
1128 | ||
1129 | iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */ | |
1130 | udelay(100); /* Wait read complete */ | |
1131 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */ | |
1132 | ||
1133 | /* The read data keeps on REG_0D & REG_0E */ | |
1134 | ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL); | |
1135 | ||
9ef9ac51 BD |
1136 | /* restore the previous address */ |
1137 | writeb(reg_save, db->io_addr); | |
1138 | ||
a1365275 SH |
1139 | spin_unlock_irqrestore(&db->lock,flags); |
1140 | ||
1141 | return ret; | |
1142 | } | |
1143 | ||
1144 | /* | |
1145 | * Write a word to phyxcer | |
1146 | */ | |
1147 | static void | |
1148 | dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value) | |
1149 | { | |
1150 | board_info_t *db = (board_info_t *) dev->priv; | |
1151 | unsigned long flags; | |
9ef9ac51 | 1152 | unsigned long reg_save; |
a1365275 SH |
1153 | |
1154 | spin_lock_irqsave(&db->lock,flags); | |
1155 | ||
9ef9ac51 BD |
1156 | /* Save previous register address */ |
1157 | reg_save = readb(db->io_addr); | |
1158 | ||
a1365275 SH |
1159 | /* Fill the phyxcer register into REG_0C */ |
1160 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | |
1161 | ||
1162 | /* Fill the written data into REG_0D & REG_0E */ | |
1163 | iow(db, DM9000_EPDRL, (value & 0xff)); | |
1164 | iow(db, DM9000_EPDRH, ((value >> 8) & 0xff)); | |
1165 | ||
1166 | iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */ | |
1167 | udelay(500); /* Wait write complete */ | |
1168 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */ | |
1169 | ||
9ef9ac51 BD |
1170 | /* restore the previous address */ |
1171 | writeb(reg_save, db->io_addr); | |
1172 | ||
a1365275 SH |
1173 | spin_unlock_irqrestore(&db->lock,flags); |
1174 | } | |
1175 | ||
1176 | static int | |
3ae5eaec | 1177 | dm9000_drv_suspend(struct platform_device *dev, pm_message_t state) |
a1365275 | 1178 | { |
3ae5eaec | 1179 | struct net_device *ndev = platform_get_drvdata(dev); |
a1365275 | 1180 | |
9480e307 | 1181 | if (ndev) { |
a1365275 SH |
1182 | if (netif_running(ndev)) { |
1183 | netif_device_detach(ndev); | |
1184 | dm9000_shutdown(ndev); | |
1185 | } | |
1186 | } | |
1187 | return 0; | |
1188 | } | |
1189 | ||
1190 | static int | |
3ae5eaec | 1191 | dm9000_drv_resume(struct platform_device *dev) |
a1365275 | 1192 | { |
3ae5eaec | 1193 | struct net_device *ndev = platform_get_drvdata(dev); |
a1365275 SH |
1194 | board_info_t *db = (board_info_t *) ndev->priv; |
1195 | ||
9480e307 | 1196 | if (ndev) { |
a1365275 SH |
1197 | |
1198 | if (netif_running(ndev)) { | |
1199 | dm9000_reset(db); | |
1200 | dm9000_init_dm9000(ndev); | |
1201 | ||
1202 | netif_device_attach(ndev); | |
1203 | } | |
1204 | } | |
1205 | return 0; | |
1206 | } | |
1207 | ||
1208 | static int | |
3ae5eaec | 1209 | dm9000_drv_remove(struct platform_device *pdev) |
a1365275 | 1210 | { |
3ae5eaec | 1211 | struct net_device *ndev = platform_get_drvdata(pdev); |
a1365275 | 1212 | |
3ae5eaec | 1213 | platform_set_drvdata(pdev, NULL); |
a1365275 SH |
1214 | |
1215 | unregister_netdev(ndev); | |
1216 | dm9000_release_board(pdev, (board_info_t *) ndev->priv); | |
9fd9f9b6 | 1217 | free_netdev(ndev); /* free device structure */ |
a1365275 | 1218 | |
a76836f9 | 1219 | dev_dbg(&pdev->dev, "released and freed device\n"); |
a1365275 SH |
1220 | return 0; |
1221 | } | |
1222 | ||
3ae5eaec | 1223 | static struct platform_driver dm9000_driver = { |
5d22a312 BD |
1224 | .driver = { |
1225 | .name = "dm9000", | |
1226 | .owner = THIS_MODULE, | |
1227 | }, | |
a1365275 SH |
1228 | .probe = dm9000_probe, |
1229 | .remove = dm9000_drv_remove, | |
1230 | .suspend = dm9000_drv_suspend, | |
1231 | .resume = dm9000_drv_resume, | |
1232 | }; | |
1233 | ||
1234 | static int __init | |
1235 | dm9000_init(void) | |
1236 | { | |
7da99859 | 1237 | printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION); |
2ae2d77c | 1238 | |
3ae5eaec | 1239 | return platform_driver_register(&dm9000_driver); /* search board and register */ |
a1365275 SH |
1240 | } |
1241 | ||
1242 | static void __exit | |
1243 | dm9000_cleanup(void) | |
1244 | { | |
3ae5eaec | 1245 | platform_driver_unregister(&dm9000_driver); |
a1365275 SH |
1246 | } |
1247 | ||
1248 | module_init(dm9000_init); | |
1249 | module_exit(dm9000_cleanup); | |
1250 | ||
1251 | MODULE_AUTHOR("Sascha Hauer, Ben Dooks"); | |
1252 | MODULE_DESCRIPTION("Davicom DM9000 network driver"); | |
1253 | MODULE_LICENSE("GPL"); |