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Fix common misspellings
[deliverable/linux.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
1da177e4
LT		 32#include <asm/uaccess.h>
33
8328c38f
AK		 34enum {NETDEV_STATS, E1000_STATS};
35
1da177e4
LT		 36struct e1000_stats {
37 char stat_string[ETH_GSTRING_LEN];
8328c38f 38 int type;
1da177e4
LT		 39 int sizeof_stat;
40 int stat_offset;
41};
42
8328c38f
AK		 43#define E1000_STAT(m) E1000_STATS, \
44 sizeof(((struct e1000_adapter *)0)->m), \
45 offsetof(struct e1000_adapter, m)
46#define E1000_NETDEV_STAT(m) NETDEV_STATS, \
47 sizeof(((struct net_device *)0)->m), \
48 offsetof(struct net_device, m)
49
1da177e4 50static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW		 51 { "rx_packets", E1000_STAT(stats.gprc) },
52 { "tx_packets", E1000_STAT(stats.gptc) },
53 { "rx_bytes", E1000_STAT(stats.gorcl) },
54 { "tx_bytes", E1000_STAT(stats.gotcl) },
55 { "rx_broadcast", E1000_STAT(stats.bprc) },
56 { "tx_broadcast", E1000_STAT(stats.bptc) },
57 { "rx_multicast", E1000_STAT(stats.mprc) },
58 { "tx_multicast", E1000_STAT(stats.mptc) },
59 { "rx_errors", E1000_STAT(stats.rxerrc) },
60 { "tx_errors", E1000_STAT(stats.txerrc) },
5fe31def 61 { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) },
49559854
MW		 62 { "multicast", E1000_STAT(stats.mprc) },
63 { "collisions", E1000_STAT(stats.colc) },
64 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
5fe31def 65 { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) },
49559854 66 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
5fe31def 67 { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) },
2648345f 68 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW		 69 { "rx_missed_errors", E1000_STAT(stats.mpc) },
70 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
71 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
5fe31def
AK		 72 { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) },
73 { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) },
49559854 74 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT		 75 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
76 { "tx_deferred_ok", E1000_STAT(stats.dc) },
77 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
78 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 79 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 80 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT		 81 { "rx_long_length_errors", E1000_STAT(stats.roc) },
82 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
83 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
84 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
85 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
86 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
87 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
88 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
89 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
90 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
91 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9 92 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
6b7660cd 93 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG		 94 { "tx_smbus", E1000_STAT(stats.mgptc) },
95 { "rx_smbus", E1000_STAT(stats.mgprc) },
96 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 97};
7bfa4816 98
7bfa4816 99#define E1000_QUEUE_STATS_LEN 0
ff8ac609 100#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
7bfa4816 101#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT		 102static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
103 "Register test (offline)", "Eeprom test (offline)",
104 "Interrupt test (offline)", "Loopback test (offline)",
105 "Link test (on/offline)"
106};
4c3616cd 107#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
1da177e4 108
64798845
JP		 109static int e1000_get_settings(struct net_device *netdev,
110 struct ethtool_cmd *ecmd)
1da177e4 111{
60490fe0 112 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 113 struct e1000_hw *hw = &adapter->hw;
114
96838a40 115 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 116
117 ecmd->supported = (SUPPORTED_10baseT_Half |
118 SUPPORTED_10baseT_Full |
119 SUPPORTED_100baseT_Half |
120 SUPPORTED_100baseT_Full |
121 SUPPORTED_1000baseT_Full|
122 SUPPORTED_Autoneg |
123 SUPPORTED_TP);
1da177e4
LT		 124 ecmd->advertising = ADVERTISED_TP;
125
96838a40 126 if (hw->autoneg == 1) {
1da177e4 127 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 128 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT		 129 ecmd->advertising |= hw->autoneg_advertised;
130 }
131
132 ecmd->port = PORT_TP;
133 ecmd->phy_address = hw->phy_addr;
134
96838a40 135 if (hw->mac_type == e1000_82543)
1da177e4
LT		 136 ecmd->transceiver = XCVR_EXTERNAL;
137 else
138 ecmd->transceiver = XCVR_INTERNAL;
139
140 } else {
141 ecmd->supported = (SUPPORTED_1000baseT_Full |
142 SUPPORTED_FIBRE |
143 SUPPORTED_Autoneg);
144
012609a8
MC		 145 ecmd->advertising = (ADVERTISED_1000baseT_Full |
146 ADVERTISED_FIBRE |
147 ADVERTISED_Autoneg);
1da177e4
LT		 148
149 ecmd->port = PORT_FIBRE;
150
96838a40 151 if (hw->mac_type >= e1000_82545)
1da177e4
LT		 152 ecmd->transceiver = XCVR_INTERNAL;
153 else
154 ecmd->transceiver = XCVR_EXTERNAL;
155 }
156
1dc32918 157 if (er32(STATUS) & E1000_STATUS_LU) {
1da177e4
LT		 158
159 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
160 &adapter->link_duplex);
161 ecmd->speed = adapter->link_speed;
162
25985edc 163 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
1da177e4
LT		 164 * and HALF_DUPLEX != DUPLEX_HALF */
165
96838a40 166 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT		 167 ecmd->duplex = DUPLEX_FULL;
168 else
169 ecmd->duplex = DUPLEX_HALF;
170 } else {
171 ecmd->speed = -1;
172 ecmd->duplex = -1;
173 }
174
175 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
176 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
177 return 0;
178}
179
64798845
JP		 180static int e1000_set_settings(struct net_device *netdev,
181 struct ethtool_cmd *ecmd)
1da177e4 182{
60490fe0 183 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 184 struct e1000_hw *hw = &adapter->hw;
185
1a821ca5
JB		 186 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
187 msleep(1);
188
57128197 189 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 190 hw->autoneg = 1;
96838a40 191 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC		 192 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
193 ADVERTISED_FIBRE |
194 ADVERTISED_Autoneg;
96838a40 195 else
2f2ca263
JK		 196 hw->autoneg_advertised = ecmd->advertising |
197 ADVERTISED_TP |
198 ADVERTISED_Autoneg;
012609a8 199 ecmd->advertising = hw->autoneg_advertised;
1da177e4 200 } else
1a821ca5
JB		 201 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
202 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 203 return -EINVAL;
1a821ca5 204 }
1da177e4
LT		 205
206 /* reset the link */
207
1a821ca5
JB		 208 if (netif_running(adapter->netdev)) {
209 e1000_down(adapter);
210 e1000_up(adapter);
211 } else
1da177e4
LT		 212 e1000_reset(adapter);
213
1a821ca5 214 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 215 return 0;
216}
217
b548192a
NN		 218static u32 e1000_get_link(struct net_device *netdev)
219{
220 struct e1000_adapter *adapter = netdev_priv(netdev);
221
222 /*
223 * If the link is not reported up to netdev, interrupts are disabled,
224 * and so the physical link state may have changed since we last
225 * looked. Set get_link_status to make sure that the true link
226 * state is interrogated, rather than pulling a cached and possibly
227 * stale link state from the driver.
228 */
229 if (!netif_carrier_ok(netdev))
230 adapter->hw.get_link_status = 1;
231
232 return e1000_has_link(adapter);
233}
234
64798845
JP		 235static void e1000_get_pauseparam(struct net_device *netdev,
236 struct ethtool_pauseparam *pause)
1da177e4 237{
60490fe0 238 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 239 struct e1000_hw *hw = &adapter->hw;
240
96838a40 241 pause->autoneg =
1da177e4 242 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 243
11241b10 244 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 245 pause->rx_pause = 1;
11241b10 246 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 247 pause->tx_pause = 1;
11241b10 248 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT		 249 pause->rx_pause = 1;
250 pause->tx_pause = 1;
251 }
252}
253
64798845
JP		 254static int e1000_set_pauseparam(struct net_device *netdev,
255 struct ethtool_pauseparam *pause)
1da177e4 256{
60490fe0 257 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 258 struct e1000_hw *hw = &adapter->hw;
1a821ca5 259 int retval = 0;
96838a40 260
1da177e4
LT		 261 adapter->fc_autoneg = pause->autoneg;
262
1a821ca5
JB		 263 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
264 msleep(1);
265
96838a40 266 if (pause->rx_pause && pause->tx_pause)
11241b10 267 hw->fc = E1000_FC_FULL;
96838a40 268 else if (pause->rx_pause && !pause->tx_pause)
11241b10 269 hw->fc = E1000_FC_RX_PAUSE;
96838a40 270 else if (!pause->rx_pause && pause->tx_pause)
11241b10 271 hw->fc = E1000_FC_TX_PAUSE;
96838a40 272 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 273 hw->fc = E1000_FC_NONE;
1da177e4
LT		 274
275 hw->original_fc = hw->fc;
276
96838a40 277 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB		 278 if (netif_running(adapter->netdev)) {
279 e1000_down(adapter);
280 e1000_up(adapter);
281 } else
1da177e4 282 e1000_reset(adapter);
96838a40 283 } else
1a821ca5 284 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 285 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 286
1a821ca5
JB		 287 clear_bit(__E1000_RESETTING, &adapter->flags);
288 return retval;
1da177e4
LT		 289}
290
64798845 291static u32 e1000_get_rx_csum(struct net_device *netdev)
1da177e4 292{
60490fe0 293 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 294 return adapter->rx_csum;
295}
296
64798845 297static int e1000_set_rx_csum(struct net_device *netdev, u32 data)
1da177e4 298{
60490fe0 299 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 300 adapter->rx_csum = data;
301
2db10a08
AK		 302 if (netif_running(netdev))
303 e1000_reinit_locked(adapter);
304 else
1da177e4
LT		 305 e1000_reset(adapter);
306 return 0;
307}
96838a40 308
64798845 309static u32 e1000_get_tx_csum(struct net_device *netdev)
1da177e4
LT		 310{
311 return (netdev->features & NETIF_F_HW_CSUM) != 0;
312}
313
64798845 314static int e1000_set_tx_csum(struct net_device *netdev, u32 data)
1da177e4 315{
60490fe0 316 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 317 struct e1000_hw *hw = &adapter->hw;
1da177e4 318
1dc32918 319 if (hw->mac_type < e1000_82543) {
1da177e4
LT		 320 if (!data)
321 return -EINVAL;
322 return 0;
323 }
324
325 if (data)
326 netdev->features |= NETIF_F_HW_CSUM;
327 else
328 netdev->features &= ~NETIF_F_HW_CSUM;
329
330 return 0;
331}
332
64798845 333static int e1000_set_tso(struct net_device *netdev, u32 data)
1da177e4 334{
60490fe0 335 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 336 struct e1000_hw *hw = &adapter->hw;
337
338 if ((hw->mac_type < e1000_82544) ||
339 (hw->mac_type == e1000_82547))
1da177e4
LT		 340 return data ? -EINVAL : 0;
341
342 if (data)
343 netdev->features |= NETIF_F_TSO;
344 else
345 netdev->features &= ~NETIF_F_TSO;
7e6c9861 346
1532ecea 347 netdev->features &= ~NETIF_F_TSO6;
87ca4e5b 348
feb8f478 349 e_info(probe, "TSO is %s\n", data ? "Enabled" : "Disabled");
c3033b01 350 adapter->tso_force = true;
1da177e4 351 return 0;
96838a40 352}
1da177e4 353
64798845 354static u32 e1000_get_msglevel(struct net_device *netdev)
1da177e4 355{
60490fe0 356 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 357 return adapter->msg_enable;
358}
359
64798845 360static void e1000_set_msglevel(struct net_device *netdev, u32 data)
1da177e4 361{
60490fe0 362 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 363 adapter->msg_enable = data;
364}
365
64798845 366static int e1000_get_regs_len(struct net_device *netdev)
1da177e4
LT		 367{
368#define E1000_REGS_LEN 32
406874a7 369 return E1000_REGS_LEN * sizeof(u32);
1da177e4
LT		 370}
371
64798845
JP		 372static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
373 void *p)
1da177e4 374{
60490fe0 375 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 376 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 377 u32 *regs_buff = p;
378 u16 phy_data;
1da177e4 379
406874a7 380 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
1da177e4
LT		 381
382 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
383
1dc32918
JP		 384 regs_buff[0] = er32(CTRL);
385 regs_buff[1] = er32(STATUS);
1da177e4 386
1dc32918
JP		 387 regs_buff[2] = er32(RCTL);
388 regs_buff[3] = er32(RDLEN);
389 regs_buff[4] = er32(RDH);
390 regs_buff[5] = er32(RDT);
391 regs_buff[6] = er32(RDTR);
1da177e4 392
1dc32918
JP		 393 regs_buff[7] = er32(TCTL);
394 regs_buff[8] = er32(TDLEN);
395 regs_buff[9] = er32(TDH);
396 regs_buff[10] = er32(TDT);
397 regs_buff[11] = er32(TIDV);
1da177e4 398
1dc32918 399 regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 400 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT		 401 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
402 IGP01E1000_PHY_AGC_A);
403 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
404 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 405 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT		 406 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
407 IGP01E1000_PHY_AGC_B);
408 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
409 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 410 regs_buff[14] = (u32)phy_data; /* cable length */
1da177e4
LT		 411 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
412 IGP01E1000_PHY_AGC_C);
413 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
414 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 415 regs_buff[15] = (u32)phy_data; /* cable length */
1da177e4
LT		 416 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
417 IGP01E1000_PHY_AGC_D);
418 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
419 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 420 regs_buff[16] = (u32)phy_data; /* cable length */
1da177e4
LT		 421 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
422 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
423 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
424 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 425 regs_buff[18] = (u32)phy_data; /* cable polarity */
1da177e4
LT		 426 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
427 IGP01E1000_PHY_PCS_INIT_REG);
428 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
429 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 430 regs_buff[19] = (u32)phy_data; /* cable polarity */
1da177e4
LT		 431 regs_buff[20] = 0; /* polarity correction enabled (always) */
432 regs_buff[22] = 0; /* phy receive errors (unavailable) */
433 regs_buff[23] = regs_buff[18]; /* mdix mode */
434 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
435 } else {
8fc897b0 436 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
406874a7 437 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT		 438 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
439 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
440 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 441 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
406874a7 442 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
1da177e4
LT		 443 regs_buff[18] = regs_buff[13]; /* cable polarity */
444 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
445 regs_buff[20] = regs_buff[17]; /* polarity correction */
446 /* phy receive errors */
447 regs_buff[22] = adapter->phy_stats.receive_errors;
448 regs_buff[23] = regs_buff[13]; /* mdix mode */
449 }
450 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
451 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
406874a7 452 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
1da177e4 453 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 454 if (hw->mac_type >= e1000_82540 &&
4ccc12ae 455 hw->media_type == e1000_media_type_copper) {
1dc32918 456 regs_buff[26] = er32(MANC);
1da177e4
LT		 457 }
458}
459
64798845 460static int e1000_get_eeprom_len(struct net_device *netdev)
1da177e4 461{
60490fe0 462 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 463 struct e1000_hw *hw = &adapter->hw;
464
465 return hw->eeprom.word_size * 2;
1da177e4
LT		 466}
467
64798845
JP		 468static int e1000_get_eeprom(struct net_device *netdev,
469 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 470{
60490fe0 471 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 472 struct e1000_hw *hw = &adapter->hw;
406874a7 473 u16 *eeprom_buff;
1da177e4
LT		 474 int first_word, last_word;
475 int ret_val = 0;
406874a7 476 u16 i;
1da177e4 477
96838a40 478 if (eeprom->len == 0)
1da177e4
LT		 479 return -EINVAL;
480
481 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
482
483 first_word = eeprom->offset >> 1;
484 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
485
406874a7 486 eeprom_buff = kmalloc(sizeof(u16) *
1da177e4 487 (last_word - first_word + 1), GFP_KERNEL);
96838a40 488 if (!eeprom_buff)
1da177e4
LT		 489 return -ENOMEM;
490
96838a40 491 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT		 492 ret_val = e1000_read_eeprom(hw, first_word,
493 last_word - first_word + 1,
494 eeprom_buff);
495 else {
c7be73bc
JP		 496 for (i = 0; i < last_word - first_word + 1; i++) {
497 ret_val = e1000_read_eeprom(hw, first_word + i, 1,
498 &eeprom_buff[i]);
499 if (ret_val)
1da177e4 500 break;
c7be73bc 501 }
1da177e4
LT		 502 }
503
504 /* Device's eeprom is always little-endian, word addressable */
505 for (i = 0; i < last_word - first_word + 1; i++)
506 le16_to_cpus(&eeprom_buff[i]);
507
406874a7 508 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
1da177e4
LT		 509 eeprom->len);
510 kfree(eeprom_buff);
511
512 return ret_val;
513}
514
64798845
JP		 515static int e1000_set_eeprom(struct net_device *netdev,
516 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 517{
60490fe0 518 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 519 struct e1000_hw *hw = &adapter->hw;
406874a7 520 u16 *eeprom_buff;
1da177e4
LT		 521 void *ptr;
522 int max_len, first_word, last_word, ret_val = 0;
406874a7 523 u16 i;
1da177e4 524
96838a40 525 if (eeprom->len == 0)
1da177e4
LT		 526 return -EOPNOTSUPP;
527
96838a40 528 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT		 529 return -EFAULT;
530
531 max_len = hw->eeprom.word_size * 2;
532
533 first_word = eeprom->offset >> 1;
534 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
535 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 536 if (!eeprom_buff)
1da177e4
LT		 537 return -ENOMEM;
538
539 ptr = (void *)eeprom_buff;
540
96838a40 541 if (eeprom->offset & 1) {
1da177e4
LT		 542 /* need read/modify/write of first changed EEPROM word */
543 /* only the second byte of the word is being modified */
544 ret_val = e1000_read_eeprom(hw, first_word, 1,
545 &eeprom_buff[0]);
546 ptr++;
547 }
96838a40 548 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT		 549 /* need read/modify/write of last changed EEPROM word */
550 /* only the first byte of the word is being modified */
551 ret_val = e1000_read_eeprom(hw, last_word, 1,
552 &eeprom_buff[last_word - first_word]);
553 }
554
555 /* Device's eeprom is always little-endian, word addressable */
556 for (i = 0; i < last_word - first_word + 1; i++)
557 le16_to_cpus(&eeprom_buff[i]);
558
559 memcpy(ptr, bytes, eeprom->len);
560
561 for (i = 0; i < last_word - first_word + 1; i++)
562 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
563
564 ret_val = e1000_write_eeprom(hw, first_word,
565 last_word - first_word + 1, eeprom_buff);
566
1532ecea
JB		 567 /* Update the checksum over the first part of the EEPROM if needed */
568 if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG))
1da177e4
LT		 569 e1000_update_eeprom_checksum(hw);
570
571 kfree(eeprom_buff);
572 return ret_val;
573}
574
64798845
JP		 575static void e1000_get_drvinfo(struct net_device *netdev,
576 struct ethtool_drvinfo *drvinfo)
1da177e4 577{
60490fe0 578 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22 579 char firmware_version[32];
1da177e4
LT		 580
581 strncpy(drvinfo->driver, e1000_driver_name, 32);
582 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22 583
1532ecea 584 sprintf(firmware_version, "N/A");
a2917e22 585 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4 586 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
1da177e4
LT		 587 drvinfo->regdump_len = e1000_get_regs_len(netdev);
588 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
589}
590
64798845
JP		 591static void e1000_get_ringparam(struct net_device *netdev,
592 struct ethtool_ringparam *ring)
1da177e4 593{
60490fe0 594 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 595 struct e1000_hw *hw = &adapter->hw;
596 e1000_mac_type mac_type = hw->mac_type;
581d708e
MC		 597 struct e1000_tx_ring *txdr = adapter->tx_ring;
598 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT		 599
600 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
601 E1000_MAX_82544_RXD;
602 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
603 E1000_MAX_82544_TXD;
604 ring->rx_mini_max_pending = 0;
605 ring->rx_jumbo_max_pending = 0;
606 ring->rx_pending = rxdr->count;
607 ring->tx_pending = txdr->count;
608 ring->rx_mini_pending = 0;
609 ring->rx_jumbo_pending = 0;
610}
611
64798845
JP		 612static int e1000_set_ringparam(struct net_device *netdev,
613 struct ethtool_ringparam *ring)
1da177e4 614{
60490fe0 615 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 616 struct e1000_hw *hw = &adapter->hw;
617 e1000_mac_type mac_type = hw->mac_type;
793fab72
VA		 618 struct e1000_tx_ring *txdr, *tx_old;
619 struct e1000_rx_ring *rxdr, *rx_old;
1c7e5b12 620 int i, err;
581d708e 621
0989aa43
JK		 622 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
623 return -EINVAL;
624
2db10a08
AK		 625 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
626 msleep(1);
627
581d708e
MC		 628 if (netif_running(adapter->netdev))
629 e1000_down(adapter);
1da177e4
LT		 630
631 tx_old = adapter->tx_ring;
632 rx_old = adapter->rx_ring;
633
793fab72 634 err = -ENOMEM;
1c7e5b12 635 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL);
793fab72
VA		 636 if (!txdr)
637 goto err_alloc_tx;
581d708e 638
1c7e5b12 639 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL);
793fab72
VA		 640 if (!rxdr)
641 goto err_alloc_rx;
581d708e 642
793fab72
VA		 643 adapter->tx_ring = txdr;
644 adapter->rx_ring = rxdr;
581d708e 645
406874a7
JP		 646 rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
647 rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 648 E1000_MAX_RXD : E1000_MAX_82544_RXD));
9099cfb9 649 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4 650
406874a7
JP		 651 txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
652 txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 653 E1000_MAX_TXD : E1000_MAX_82544_TXD));
9099cfb9 654 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 655
f56799ea 656 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 657 txdr[i].count = txdr->count;
f56799ea 658 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 659 rxdr[i].count = rxdr->count;
581d708e 660
96838a40 661 if (netif_running(adapter->netdev)) {
1da177e4 662 /* Try to get new resources before deleting old */
c7be73bc
JP		 663 err = e1000_setup_all_rx_resources(adapter);
664 if (err)
1da177e4 665 goto err_setup_rx;
c7be73bc
JP		 666 err = e1000_setup_all_tx_resources(adapter);
667 if (err)
1da177e4
LT		 668 goto err_setup_tx;
669
670 /* save the new, restore the old in order to free it,
671 * then restore the new back again */
672
1da177e4
LT		 673 adapter->rx_ring = rx_old;
674 adapter->tx_ring = tx_old;
581d708e
MC		 675 e1000_free_all_rx_resources(adapter);
676 e1000_free_all_tx_resources(adapter);
677 kfree(tx_old);
678 kfree(rx_old);
793fab72
VA		 679 adapter->rx_ring = rxdr;
680 adapter->tx_ring = txdr;
c7be73bc
JP		 681 err = e1000_up(adapter);
682 if (err)
2db10a08 683 goto err_setup;
1da177e4
LT		 684 }
685
2db10a08 686 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 687 return 0;
688err_setup_tx:
581d708e 689 e1000_free_all_rx_resources(adapter);
1da177e4
LT		 690err_setup_rx:
691 adapter->rx_ring = rx_old;
692 adapter->tx_ring = tx_old;
793fab72
VA		 693 kfree(rxdr);
694err_alloc_rx:
695 kfree(txdr);
696err_alloc_tx:
1da177e4 697 e1000_up(adapter);
2db10a08
AK		 698err_setup:
699 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 700 return err;
701}
702
64798845
JP		 703static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg,
704 u32 mask, u32 write)
7e64300a 705{
1dc32918 706 struct e1000_hw *hw = &adapter->hw;
406874a7 707 static const u32 test[] =
7e64300a 708 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1dc32918 709 u8 __iomem *address = hw->hw_addr + reg;
406874a7 710 u32 read;
7e64300a
JP		 711 int i;
712
713 for (i = 0; i < ARRAY_SIZE(test); i++) {
714 writel(write & test[i], address);
715 read = readl(address);
716 if (read != (write & test[i] & mask)) {
feb8f478
ET		 717 e_err(drv, "pattern test reg %04X failed: "
718 "got 0x%08X expected 0x%08X\n",
719 reg, read, (write & test[i] & mask));
7e64300a
JP		 720 *data = reg;
721 return true;
722 }
723 }
724 return false;
1da177e4
LT		 725}
726
64798845
JP		 727static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg,
728 u32 mask, u32 write)
7e64300a 729{
1dc32918
JP		 730 struct e1000_hw *hw = &adapter->hw;
731 u8 __iomem *address = hw->hw_addr + reg;
406874a7 732 u32 read;
7e64300a
JP		 733
734 writel(write & mask, address);
735 read = readl(address);
736 if ((read & mask) != (write & mask)) {
feb8f478 737 e_err(drv, "set/check reg %04X test failed: "
675ad473
ET		 738 "got 0x%08X expected 0x%08X\n",
739 reg, (read & mask), (write & mask));
7e64300a
JP		 740 *data = reg;
741 return true;
742 }
743 return false;
1da177e4
LT		 744}
745
7e64300a
JP		 746#define REG_PATTERN_TEST(reg, mask, write) \
747 do { \
748 if (reg_pattern_test(adapter, data, \
1dc32918 749 (hw->mac_type >= e1000_82543) \
7e64300a
JP		 750 ? E1000_##reg : E1000_82542_##reg, \
751 mask, write)) \
752 return 1; \
753 } while (0)
754
755#define REG_SET_AND_CHECK(reg, mask, write) \
756 do { \
757 if (reg_set_and_check(adapter, data, \
1dc32918 758 (hw->mac_type >= e1000_82543) \
7e64300a
JP		 759 ? E1000_##reg : E1000_82542_##reg, \
760 mask, write)) \
761 return 1; \
762 } while (0)
763
64798845 764static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 765{
406874a7
JP		 766 u32 value, before, after;
767 u32 i, toggle;
1dc32918 768 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 769
770 /* The status register is Read Only, so a write should fail.
771 * Some bits that get toggled are ignored.
772 */
1532ecea 773
868d5309 774 /* there are several bits on newer hardware that are r/w */
1532ecea 775 toggle = 0xFFFFF833;
b01f6691 776
1dc32918
JP		 777 before = er32(STATUS);
778 value = (er32(STATUS) & toggle);
779 ew32(STATUS, toggle);
780 after = er32(STATUS) & toggle;
96838a40 781 if (value != after) {
feb8f478 782 e_err(drv, "failed STATUS register test got: "
675ad473 783 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT		 784 *data = 1;
785 return 1;
786 }
b01f6691 787 /* restore previous status */
1dc32918 788 ew32(STATUS, before);
90fb5135 789
1532ecea
JB		 790 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
791 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
792 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
793 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
90fb5135 794
1da177e4
LT		 795 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
796 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
797 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
798 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
799 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
800 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
801 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
802 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
803 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
804 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
805
806 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 807
1532ecea 808 before = 0x06DFB3FE;
cd94dd0b 809 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT		 810 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
811
1dc32918 812 if (hw->mac_type >= e1000_82543) {
1da177e4 813
cd94dd0b 814 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 815 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
1532ecea 816 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT		 817 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
818 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
1532ecea 819 value = E1000_RAR_ENTRIES;
cd94dd0b 820 for (i = 0; i < value; i++) {
1da177e4 821 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 822 0xFFFFFFFF);
1da177e4
LT		 823 }
824
825 } else {
826
827 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
828 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
829 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
830 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
831
832 }
833
1532ecea 834 value = E1000_MC_TBL_SIZE;
cd94dd0b 835 for (i = 0; i < value; i++)
1da177e4
LT		 836 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
837
838 *data = 0;
839 return 0;
840}
841
64798845 842static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 843{
1dc32918 844 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 845 u16 temp;
846 u16 checksum = 0;
847 u16 i;
1da177e4
LT		 848
849 *data = 0;
850 /* Read and add up the contents of the EEPROM */
96838a40 851 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
1dc32918 852 if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) {
1da177e4
LT		 853 *data = 1;
854 break;
855 }
856 checksum += temp;
857 }
858
859 /* If Checksum is not Correct return error else test passed */
e982f17c 860 if ((checksum != (u16)EEPROM_SUM) && !(*data))
1da177e4
LT		 861 *data = 2;
862
863 return *data;
864}
865
64798845 866static irqreturn_t e1000_test_intr(int irq, void *data)
1da177e4 867{
e982f17c 868 struct net_device *netdev = (struct net_device *)data;
60490fe0 869 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 870 struct e1000_hw *hw = &adapter->hw;
1da177e4 871
1dc32918 872 adapter->test_icr |= er32(ICR);
1da177e4
LT		 873
874 return IRQ_HANDLED;
875}
876
64798845 877static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
1da177e4
LT		 878{
879 struct net_device *netdev = adapter->netdev;
406874a7 880 u32 mask, i = 0;
c3033b01 881 bool shared_int = true;
406874a7 882 u32 irq = adapter->pdev->irq;
1dc32918 883 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 884
885 *data = 0;
886
8fc897b0 887 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 888 /* Hook up test interrupt handler just for this test */
a0607fd3 889 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
90fb5135 890 netdev))
c3033b01 891 shared_int = false;
a0607fd3 892 else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
90fb5135 893 netdev->name, netdev)) {
1da177e4
LT		 894 *data = 1;
895 return -1;
896 }
feb8f478
ET		 897 e_info(hw, "testing %s interrupt\n", (shared_int ?
898 "shared" : "unshared"));
1da177e4
LT		 899
900 /* Disable all the interrupts */
1dc32918 901 ew32(IMC, 0xFFFFFFFF);
f8ec4733 902 msleep(10);
1da177e4
LT		 903
904 /* Test each interrupt */
96838a40 905 for (; i < 10; i++) {
1da177e4
LT		 906
907 /* Interrupt to test */
908 mask = 1 << i;
909
76c224bc
AK		 910 if (!shared_int) {
911 /* Disable the interrupt to be reported in
912 * the cause register and then force the same
913 * interrupt and see if one gets posted. If
914 * an interrupt was posted to the bus, the
915 * test failed.
916 */
917 adapter->test_icr = 0;
1dc32918
JP		 918 ew32(IMC, mask);
919 ew32(ICS, mask);
f8ec4733 920 msleep(10);
76c224bc
AK		 921
922 if (adapter->test_icr & mask) {
923 *data = 3;
924 break;
925 }
1da177e4
LT		 926 }
927
928 /* Enable the interrupt to be reported in
929 * the cause register and then force the same
930 * interrupt and see if one gets posted. If
931 * an interrupt was not posted to the bus, the
932 * test failed.
933 */
934 adapter->test_icr = 0;
1dc32918
JP		 935 ew32(IMS, mask);
936 ew32(ICS, mask);
f8ec4733 937 msleep(10);
1da177e4 938
96838a40 939 if (!(adapter->test_icr & mask)) {
1da177e4
LT		 940 *data = 4;
941 break;
942 }
943
76c224bc 944 if (!shared_int) {
1da177e4
LT		 945 /* Disable the other interrupts to be reported in
946 * the cause register and then force the other
947 * interrupts and see if any get posted. If
948 * an interrupt was posted to the bus, the
949 * test failed.
950 */
951 adapter->test_icr = 0;
1dc32918
JP		 952 ew32(IMC, ~mask & 0x00007FFF);
953 ew32(ICS, ~mask & 0x00007FFF);
f8ec4733 954 msleep(10);
1da177e4 955
96838a40 956 if (adapter->test_icr) {
1da177e4
LT		 957 *data = 5;
958 break;
959 }
960 }
961 }
962
963 /* Disable all the interrupts */
1dc32918 964 ew32(IMC, 0xFFFFFFFF);
f8ec4733 965 msleep(10);
1da177e4
LT		 966
967 /* Unhook test interrupt handler */
968 free_irq(irq, netdev);
969
970 return *data;
971}
972
64798845 973static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1da177e4 974{
581d708e
MC		 975 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
976 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 977 struct pci_dev *pdev = adapter->pdev;
978 int i;
979
96838a40
JB		 980 if (txdr->desc && txdr->buffer_info) {
981 for (i = 0; i < txdr->count; i++) {
982 if (txdr->buffer_info[i].dma)
b16f53be
NN		 983 dma_unmap_single(&pdev->dev,
984 txdr->buffer_info[i].dma,
1da177e4 985 txdr->buffer_info[i].length,
b16f53be 986 DMA_TO_DEVICE);
96838a40 987 if (txdr->buffer_info[i].skb)
1da177e4
LT		 988 dev_kfree_skb(txdr->buffer_info[i].skb);
989 }
990 }
991
96838a40
JB		 992 if (rxdr->desc && rxdr->buffer_info) {
993 for (i = 0; i < rxdr->count; i++) {
994 if (rxdr->buffer_info[i].dma)
b16f53be
NN		 995 dma_unmap_single(&pdev->dev,
996 rxdr->buffer_info[i].dma,
1da177e4 997 rxdr->buffer_info[i].length,
b16f53be 998 DMA_FROM_DEVICE);
96838a40 999 if (rxdr->buffer_info[i].skb)
1da177e4
LT		 1000 dev_kfree_skb(rxdr->buffer_info[i].skb);
1001 }
1002 }
1003
f5645110 1004 if (txdr->desc) {
b16f53be
NN		 1005 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1006 txdr->dma);
6b27adb6
JL		 1007 txdr->desc = NULL;
1008 }
f5645110 1009 if (rxdr->desc) {
b16f53be
NN		 1010 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1011 rxdr->dma);
6b27adb6
JL		 1012 rxdr->desc = NULL;
1013 }
1da177e4 1014
b4558ea9 1015 kfree(txdr->buffer_info);
6b27adb6 1016 txdr->buffer_info = NULL;
b4558ea9 1017 kfree(rxdr->buffer_info);
6b27adb6 1018 rxdr->buffer_info = NULL;
1da177e4
LT		 1019}
1020
64798845 1021static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1da177e4 1022{
1dc32918 1023 struct e1000_hw *hw = &adapter->hw;
581d708e
MC		 1024 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1025 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1026 struct pci_dev *pdev = adapter->pdev;
406874a7 1027 u32 rctl;
1c7e5b12 1028 int i, ret_val;
1da177e4
LT		 1029
1030 /* Setup Tx descriptor ring and Tx buffers */
1031
96838a40
JB		 1032 if (!txdr->count)
1033 txdr->count = E1000_DEFAULT_TXD;
1da177e4 1034
c7be73bc
JP		 1035 txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_buffer),
1036 GFP_KERNEL);
1037 if (!txdr->buffer_info) {
1da177e4
LT		 1038 ret_val = 1;
1039 goto err_nomem;
1040 }
1da177e4
LT		 1041
1042 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1043 txdr->size = ALIGN(txdr->size, 4096);
b16f53be
NN		 1044 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1045 GFP_KERNEL);
c7be73bc 1046 if (!txdr->desc) {
1da177e4
LT		 1047 ret_val = 2;
1048 goto err_nomem;
1049 }
1050 memset(txdr->desc, 0, txdr->size);
1051 txdr->next_to_use = txdr->next_to_clean = 0;
1052
e982f17c
JP		 1053 ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF));
1054 ew32(TDBAH, ((u64)txdr->dma >> 32));
1dc32918
JP		 1055 ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc));
1056 ew32(TDH, 0);
1057 ew32(TDT, 0);
1058 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN |
1059 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1060 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1da177e4 1061
96838a40 1062 for (i = 0; i < txdr->count; i++) {
1da177e4
LT		 1063 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1064 struct sk_buff *skb;
1065 unsigned int size = 1024;
1066
c7be73bc
JP		 1067 skb = alloc_skb(size, GFP_KERNEL);
1068 if (!skb) {
1da177e4
LT		 1069 ret_val = 3;
1070 goto err_nomem;
1071 }
1072 skb_put(skb, size);
1073 txdr->buffer_info[i].skb = skb;
1074 txdr->buffer_info[i].length = skb->len;
1075 txdr->buffer_info[i].dma =
b16f53be
NN		 1076 dma_map_single(&pdev->dev, skb->data, skb->len,
1077 DMA_TO_DEVICE);
1da177e4
LT		 1078 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1079 tx_desc->lower.data = cpu_to_le32(skb->len);
1080 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1081 E1000_TXD_CMD_IFCS |
1082 E1000_TXD_CMD_RPS);
1083 tx_desc->upper.data = 0;
1084 }
1085
1086 /* Setup Rx descriptor ring and Rx buffers */
1087
96838a40
JB		 1088 if (!rxdr->count)
1089 rxdr->count = E1000_DEFAULT_RXD;
1da177e4 1090
c7be73bc
JP		 1091 rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_buffer),
1092 GFP_KERNEL);
1093 if (!rxdr->buffer_info) {
1da177e4
LT		 1094 ret_val = 4;
1095 goto err_nomem;
1096 }
1da177e4
LT		 1097
1098 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
b16f53be
NN		 1099 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1100 GFP_KERNEL);
c7be73bc 1101 if (!rxdr->desc) {
1da177e4
LT		 1102 ret_val = 5;
1103 goto err_nomem;
1104 }
1105 memset(rxdr->desc, 0, rxdr->size);
1106 rxdr->next_to_use = rxdr->next_to_clean = 0;
1107
1dc32918
JP		 1108 rctl = er32(RCTL);
1109 ew32(RCTL, rctl & ~E1000_RCTL_EN);
e982f17c
JP		 1110 ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF));
1111 ew32(RDBAH, ((u64)rxdr->dma >> 32));
1dc32918
JP		 1112 ew32(RDLEN, rxdr->size);
1113 ew32(RDH, 0);
1114 ew32(RDT, 0);
1da177e4
LT		 1115 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1116 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918
JP		 1117 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1118 ew32(RCTL, rctl);
1da177e4 1119
96838a40 1120 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT		 1121 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1122 struct sk_buff *skb;
1123
c7be73bc
JP		 1124 skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, GFP_KERNEL);
1125 if (!skb) {
1da177e4
LT		 1126 ret_val = 6;
1127 goto err_nomem;
1128 }
1129 skb_reserve(skb, NET_IP_ALIGN);
1130 rxdr->buffer_info[i].skb = skb;
1131 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1132 rxdr->buffer_info[i].dma =
b16f53be
NN		 1133 dma_map_single(&pdev->dev, skb->data,
1134 E1000_RXBUFFER_2048, DMA_FROM_DEVICE);
1da177e4
LT		 1135 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1136 memset(skb->data, 0x00, skb->len);
1137 }
1138
1139 return 0;
1140
1141err_nomem:
1142 e1000_free_desc_rings(adapter);
1143 return ret_val;
1144}
1145
64798845 1146static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1da177e4 1147{
1dc32918
JP		 1148 struct e1000_hw *hw = &adapter->hw;
1149
1da177e4 1150 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1dc32918
JP		 1151 e1000_write_phy_reg(hw, 29, 0x001F);
1152 e1000_write_phy_reg(hw, 30, 0x8FFC);
1153 e1000_write_phy_reg(hw, 29, 0x001A);
1154 e1000_write_phy_reg(hw, 30, 0x8FF0);
1da177e4
LT		 1155}
1156
64798845 1157static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1da177e4 1158{
1dc32918 1159 struct e1000_hw *hw = &adapter->hw;
406874a7 1160 u16 phy_reg;
1da177e4
LT		 1161
1162 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1163 * Extended PHY Specific Control Register to 25MHz clock. This
1164 * value defaults back to a 2.5MHz clock when the PHY is reset.
1165 */
1dc32918 1166 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1167 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1dc32918 1168 e1000_write_phy_reg(hw,
1da177e4
LT		 1169 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1170
1171 /* In addition, because of the s/w reset above, we need to enable
1172 * CRS on TX. This must be set for both full and half duplex
1173 * operation.
1174 */
1dc32918 1175 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1176 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1dc32918 1177 e1000_write_phy_reg(hw,
1da177e4
LT		 1178 M88E1000_PHY_SPEC_CTRL, phy_reg);
1179}
1180
64798845 1181static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1182{
1dc32918 1183 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1184 u32 ctrl_reg;
1185 u16 phy_reg;
1da177e4
LT		 1186
1187 /* Setup the Device Control Register for PHY loopback test. */
1188
1dc32918 1189 ctrl_reg = er32(CTRL);
1da177e4
LT		 1190 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1191 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1192 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1193 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1194 E1000_CTRL_FD); /* Force Duplex to FULL */
1195
1dc32918 1196 ew32(CTRL, ctrl_reg);
1da177e4
LT		 1197
1198 /* Read the PHY Specific Control Register (0x10) */
1dc32918 1199 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4
LT		 1200
1201 /* Clear Auto-Crossover bits in PHY Specific Control Register
1202 * (bits 6:5).
1203 */
1204 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1dc32918 1205 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1da177e4
LT		 1206
1207 /* Perform software reset on the PHY */
1dc32918 1208 e1000_phy_reset(hw);
1da177e4
LT		 1209
1210 /* Have to setup TX_CLK and TX_CRS after software reset */
1211 e1000_phy_reset_clk_and_crs(adapter);
1212
1dc32918 1213 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
1da177e4
LT		 1214
1215 /* Wait for reset to complete. */
1216 udelay(500);
1217
1218 /* Have to setup TX_CLK and TX_CRS after software reset */
1219 e1000_phy_reset_clk_and_crs(adapter);
1220
1221 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1222 e1000_phy_disable_receiver(adapter);
1223
1224 /* Set the loopback bit in the PHY control register. */
1dc32918 1225 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1226 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1227 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT		 1228
1229 /* Setup TX_CLK and TX_CRS one more time. */
1230 e1000_phy_reset_clk_and_crs(adapter);
1231
1232 /* Check Phy Configuration */
1dc32918 1233 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
96838a40 1234 if (phy_reg != 0x4100)
1da177e4
LT		 1235 return 9;
1236
1dc32918 1237 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1238 if (phy_reg != 0x0070)
1da177e4
LT		 1239 return 10;
1240
1dc32918 1241 e1000_read_phy_reg(hw, 29, &phy_reg);
96838a40 1242 if (phy_reg != 0x001A)
1da177e4
LT		 1243 return 11;
1244
1245 return 0;
1246}
1247
64798845 1248static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1249{
1dc32918 1250 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1251 u32 ctrl_reg = 0;
1252 u32 stat_reg = 0;
1da177e4 1253
1dc32918 1254 hw->autoneg = false;
1da177e4 1255
1dc32918 1256 if (hw->phy_type == e1000_phy_m88) {
1da177e4 1257 /* Auto-MDI/MDIX Off */
1dc32918 1258 e1000_write_phy_reg(hw,
1da177e4
LT		 1259 M88E1000_PHY_SPEC_CTRL, 0x0808);
1260 /* reset to update Auto-MDI/MDIX */
1dc32918 1261 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
1da177e4 1262 /* autoneg off */
1dc32918 1263 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
1532ecea 1264 }
1da177e4 1265
1dc32918 1266 ctrl_reg = er32(CTRL);
cd94dd0b 1267
1532ecea
JB		 1268 /* force 1000, set loopback */
1269 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
cd94dd0b 1270
1532ecea
JB		 1271 /* Now set up the MAC to the same speed/duplex as the PHY. */
1272 ctrl_reg = er32(CTRL);
1273 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1274 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1275 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1276 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1277 E1000_CTRL_FD); /* Force Duplex to FULL */
1da177e4 1278
1dc32918
JP		 1279 if (hw->media_type == e1000_media_type_copper &&
1280 hw->phy_type == e1000_phy_m88)
1da177e4 1281 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1282 else {
1da177e4
LT		 1283 /* Set the ILOS bit on the fiber Nic is half
1284 * duplex link is detected. */
1dc32918 1285 stat_reg = er32(STATUS);
96838a40 1286 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT		 1287 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1288 }
1289
1dc32918 1290 ew32(CTRL, ctrl_reg);
1da177e4
LT		 1291
1292 /* Disable the receiver on the PHY so when a cable is plugged in, the
1293 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1294 */
1dc32918 1295 if (hw->phy_type == e1000_phy_m88)
1da177e4
LT		 1296 e1000_phy_disable_receiver(adapter);
1297
1298 udelay(500);
1299
1300 return 0;
1301}
1302
64798845 1303static int e1000_set_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1304{
1dc32918 1305 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1306 u16 phy_reg = 0;
1307 u16 count = 0;
1da177e4 1308
1dc32918 1309 switch (hw->mac_type) {
1da177e4 1310 case e1000_82543:
1dc32918 1311 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1312 /* Attempt to setup Loopback mode on Non-integrated PHY.
1313 * Some PHY registers get corrupted at random, so
1314 * attempt this 10 times.
1315 */
96838a40 1316 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1317 count++ < 10);
96838a40 1318 if (count < 11)
1da177e4
LT		 1319 return 0;
1320 }
1321 break;
1322
1323 case e1000_82544:
1324 case e1000_82540:
1325 case e1000_82545:
1326 case e1000_82545_rev_3:
1327 case e1000_82546:
1328 case e1000_82546_rev_3:
1329 case e1000_82541:
1330 case e1000_82541_rev_2:
1331 case e1000_82547:
1332 case e1000_82547_rev_2:
1333 return e1000_integrated_phy_loopback(adapter);
1334 break;
1da177e4
LT		 1335 default:
1336 /* Default PHY loopback work is to read the MII
1337 * control register and assert bit 14 (loopback mode).
1338 */
1dc32918 1339 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1340 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1341 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT		 1342 return 0;
1343 break;
1344 }
1345
1346 return 8;
1347}
1348
64798845 1349static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1da177e4 1350{
49273163 1351 struct e1000_hw *hw = &adapter->hw;
406874a7 1352 u32 rctl;
1da177e4 1353
49273163
JK		 1354 if (hw->media_type == e1000_media_type_fiber ||
1355 hw->media_type == e1000_media_type_internal_serdes) {
1356 switch (hw->mac_type) {
1357 case e1000_82545:
1358 case e1000_82546:
1359 case e1000_82545_rev_3:
1360 case e1000_82546_rev_3:
1da177e4 1361 return e1000_set_phy_loopback(adapter);
49273163 1362 break;
49273163 1363 default:
1dc32918 1364 rctl = er32(RCTL);
1da177e4 1365 rctl |= E1000_RCTL_LBM_TCVR;
1dc32918 1366 ew32(RCTL, rctl);
1da177e4
LT		 1367 return 0;
1368 }
49273163 1369 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT		 1370 return e1000_set_phy_loopback(adapter);
1371
1372 return 7;
1373}
1374
64798845 1375static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1da177e4 1376{
49273163 1377 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1378 u32 rctl;
1379 u16 phy_reg;
1da177e4 1380
1dc32918 1381 rctl = er32(RCTL);
1da177e4 1382 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1dc32918 1383 ew32(RCTL, rctl);
1da177e4 1384
49273163 1385 switch (hw->mac_type) {
49273163
JK		 1386 case e1000_82545:
1387 case e1000_82546:
1388 case e1000_82545_rev_3:
1389 case e1000_82546_rev_3:
1390 default:
c3033b01 1391 hw->autoneg = true;
49273163
JK		 1392 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1393 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1394 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK		 1395 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1396 e1000_phy_reset(hw);
1da177e4 1397 }
49273163 1398 break;
1da177e4
LT		 1399 }
1400}
1401
64798845
JP		 1402static void e1000_create_lbtest_frame(struct sk_buff *skb,
1403 unsigned int frame_size)
1da177e4
LT		 1404{
1405 memset(skb->data, 0xFF, frame_size);
ce7393b9 1406 frame_size &= ~1;
1da177e4
LT		 1407 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1408 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1409 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1410}
1411
64798845
JP		 1412static int e1000_check_lbtest_frame(struct sk_buff *skb,
1413 unsigned int frame_size)
1da177e4 1414{
ce7393b9 1415 frame_size &= ~1;
96838a40
JB		 1416 if (*(skb->data + 3) == 0xFF) {
1417 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT		 1418 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1419 return 0;
1420 }
1421 }
1422 return 13;
1423}
1424
64798845 1425static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1da177e4 1426{
1dc32918 1427 struct e1000_hw *hw = &adapter->hw;
581d708e
MC		 1428 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1429 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1430 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC		 1431 int i, j, k, l, lc, good_cnt, ret_val=0;
1432 unsigned long time;
1da177e4 1433
1dc32918 1434 ew32(RDT, rxdr->count - 1);
1da177e4 1435
96838a40 1436 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC		 1437 * The idea is to wrap the largest ring a number of times using 64
1438 * send/receive pairs during each loop
1439 */
1da177e4 1440
96838a40 1441 if (rxdr->count <= txdr->count)
e4eff729
MC		 1442 lc = ((txdr->count / 64) * 2) + 1;
1443 else
1444 lc = ((rxdr->count / 64) * 2) + 1;
1445
1446 k = l = 0;
96838a40
JB		 1447 for (j = 0; j <= lc; j++) { /* loop count loop */
1448 for (i = 0; i < 64; i++) { /* send the packets */
1449 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1450 1024);
b16f53be
NN		 1451 dma_sync_single_for_device(&pdev->dev,
1452 txdr->buffer_info[k].dma,
1453 txdr->buffer_info[k].length,
1454 DMA_TO_DEVICE);
96838a40 1455 if (unlikely(++k == txdr->count)) k = 0;
e4eff729 1456 }
1dc32918 1457 ew32(TDT, k);
f8ec4733 1458 msleep(200);
e4eff729
MC		 1459 time = jiffies; /* set the start time for the receive */
1460 good_cnt = 0;
1461 do { /* receive the sent packets */
b16f53be
NN		 1462 dma_sync_single_for_cpu(&pdev->dev,
1463 rxdr->buffer_info[l].dma,
1464 rxdr->buffer_info[l].length,
1465 DMA_FROM_DEVICE);
96838a40 1466
e4eff729
MC		 1467 ret_val = e1000_check_lbtest_frame(
1468 rxdr->buffer_info[l].skb,
1469 1024);
96838a40 1470 if (!ret_val)
e4eff729 1471 good_cnt++;
96838a40
JB		 1472 if (unlikely(++l == rxdr->count)) l = 0;
1473 /* time + 20 msecs (200 msecs on 2.4) is more than
1474 * enough time to complete the receives, if it's
e4eff729
MC		 1475 * exceeded, break and error off
1476 */
1477 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1478 if (good_cnt != 64) {
e4eff729 1479 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1480 break;
e4eff729 1481 }
96838a40 1482 if (jiffies >= (time + 2)) {
e4eff729
MC		 1483 ret_val = 14; /* error code for time out error */
1484 break;
1485 }
1486 } /* end loop count loop */
1da177e4
LT		 1487 return ret_val;
1488}
1489
64798845 1490static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1491{
c7be73bc
JP		 1492 *data = e1000_setup_desc_rings(adapter);
1493 if (*data)
57128197 1494 goto out;
c7be73bc
JP		 1495 *data = e1000_setup_loopback_test(adapter);
1496 if (*data)
57128197 1497 goto err_loopback;
1da177e4
LT		 1498 *data = e1000_run_loopback_test(adapter);
1499 e1000_loopback_cleanup(adapter);
57128197 1500
1da177e4 1501err_loopback:
57128197
JK		 1502 e1000_free_desc_rings(adapter);
1503out:
1da177e4
LT		 1504 return *data;
1505}
1506
64798845 1507static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1508{
1dc32918 1509 struct e1000_hw *hw = &adapter->hw;
1da177e4 1510 *data = 0;
1dc32918 1511 if (hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 1512 int i = 0;
be0f0719 1513 hw->serdes_has_link = false;
1da177e4 1514
2648345f
MC		 1515 /* On some blade server designs, link establishment
1516 * could take as long as 2-3 minutes */
1da177e4 1517 do {
1dc32918 1518 e1000_check_for_link(hw);
be0f0719 1519 if (hw->serdes_has_link)
1da177e4 1520 return *data;
f8ec4733 1521 msleep(20);
1da177e4
LT		 1522 } while (i++ < 3750);
1523
2648345f 1524 *data = 1;
1da177e4 1525 } else {
1dc32918
JP		 1526 e1000_check_for_link(hw);
1527 if (hw->autoneg) /* if auto_neg is set wait for it */
f8ec4733 1528 msleep(4000);
1da177e4 1529
1dc32918 1530 if (!(er32(STATUS) & E1000_STATUS_LU)) {
1da177e4
LT		 1531 *data = 1;
1532 }
1533 }
1534 return *data;
1535}
1536
64798845 1537static int e1000_get_sset_count(struct net_device *netdev, int sset)
1da177e4 1538{
b9f2c044
JG		 1539 switch (sset) {
1540 case ETH_SS_TEST:
1541 return E1000_TEST_LEN;
1542 case ETH_SS_STATS:
1543 return E1000_STATS_LEN;
1544 default:
1545 return -EOPNOTSUPP;
1546 }
1da177e4
LT		 1547}
1548
64798845
JP		 1549static void e1000_diag_test(struct net_device *netdev,
1550 struct ethtool_test *eth_test, u64 *data)
1da177e4 1551{
60490fe0 1552 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1553 struct e1000_hw *hw = &adapter->hw;
c3033b01 1554 bool if_running = netif_running(netdev);
1da177e4 1555
1314bbf3 1556 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1557 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT		 1558 /* Offline tests */
1559
1560 /* save speed, duplex, autoneg settings */
1dc32918
JP		 1561 u16 autoneg_advertised = hw->autoneg_advertised;
1562 u8 forced_speed_duplex = hw->forced_speed_duplex;
1563 u8 autoneg = hw->autoneg;
1da177e4 1564
feb8f478 1565 e_info(hw, "offline testing starting\n");
d658266e 1566
1da177e4
LT		 1567 /* Link test performed before hardware reset so autoneg doesn't
1568 * interfere with test result */
96838a40 1569 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1570 eth_test->flags |= ETH_TEST_FL_FAILED;
1571
96838a40 1572 if (if_running)
2db10a08
AK		 1573 /* indicate we're in test mode */
1574 dev_close(netdev);
1da177e4
LT		 1575 else
1576 e1000_reset(adapter);
1577
96838a40 1578 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT		 1579 eth_test->flags |= ETH_TEST_FL_FAILED;
1580
1581 e1000_reset(adapter);
96838a40 1582 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT		 1583 eth_test->flags |= ETH_TEST_FL_FAILED;
1584
1585 e1000_reset(adapter);
96838a40 1586 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT		 1587 eth_test->flags |= ETH_TEST_FL_FAILED;
1588
1589 e1000_reset(adapter);
d658266e
JB		 1590 /* make sure the phy is powered up */
1591 e1000_power_up_phy(adapter);
96838a40 1592 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT		 1593 eth_test->flags |= ETH_TEST_FL_FAILED;
1594
1595 /* restore speed, duplex, autoneg settings */
1dc32918
JP		 1596 hw->autoneg_advertised = autoneg_advertised;
1597 hw->forced_speed_duplex = forced_speed_duplex;
1598 hw->autoneg = autoneg;
1da177e4
LT		 1599
1600 e1000_reset(adapter);
1314bbf3 1601 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1602 if (if_running)
2db10a08 1603 dev_open(netdev);
1da177e4 1604 } else {
feb8f478 1605 e_info(hw, "online testing starting\n");
1da177e4 1606 /* Online tests */
96838a40 1607 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1608 eth_test->flags |= ETH_TEST_FL_FAILED;
1609
90fb5135 1610 /* Online tests aren't run; pass by default */
1da177e4
LT		 1611 data[0] = 0;
1612 data[1] = 0;
1613 data[2] = 0;
1614 data[3] = 0;
2db10a08 1615
1314bbf3 1616 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1617 }
352c9f85 1618 msleep_interruptible(4 * 1000);
1da177e4
LT		 1619}
1620
64798845
JP		 1621static int e1000_wol_exclusion(struct e1000_adapter *adapter,
1622 struct ethtool_wolinfo *wol)
1da177e4 1623{
1da177e4 1624 struct e1000_hw *hw = &adapter->hw;
120cd576 1625 int retval = 1; /* fail by default */
1da177e4 1626
120cd576 1627 switch (hw->device_id) {
dc1f71f6 1628 case E1000_DEV_ID_82542:
1da177e4
LT		 1629 case E1000_DEV_ID_82543GC_FIBER:
1630 case E1000_DEV_ID_82543GC_COPPER:
1631 case E1000_DEV_ID_82544EI_FIBER:
1632 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1633 case E1000_DEV_ID_82545EM_FIBER:
1634 case E1000_DEV_ID_82545EM_COPPER:
84916829 1635 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB		 1636 case E1000_DEV_ID_82546GB_PCIE:
1637 /* these don't support WoL at all */
1da177e4 1638 wol->supported = 0;
120cd576 1639 break;
1da177e4
LT		 1640 case E1000_DEV_ID_82546EB_FIBER:
1641 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1642 /* Wake events not supported on port B */
1dc32918 1643 if (er32(STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1644 wol->supported = 0;
120cd576 1645 break;
1da177e4 1646 }
120cd576
JB		 1647 /* return success for non excluded adapter ports */
1648 retval = 0;
1649 break;
1650 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1651 /* quad port adapters only support WoL on port A */
1652 if (!adapter->quad_port_a) {
1653 wol->supported = 0;
1654 break;
1655 }
1656 /* return success for non excluded adapter ports */
1657 retval = 0;
1658 break;
1da177e4 1659 default:
120cd576
JB		 1660 /* dual port cards only support WoL on port A from now on
1661 * unless it was enabled in the eeprom for port B
1662 * so exclude FUNC_1 ports from having WoL enabled */
1dc32918 1663 if (er32(STATUS) & E1000_STATUS_FUNC_1 &&
120cd576
JB		 1664 !adapter->eeprom_wol) {
1665 wol->supported = 0;
1666 break;
1667 }
84916829 1668
120cd576
JB		 1669 retval = 0;
1670 }
1671
1672 return retval;
1673}
1674
64798845
JP		 1675static void e1000_get_wol(struct net_device *netdev,
1676 struct ethtool_wolinfo *wol)
120cd576
JB		 1677{
1678 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1679 struct e1000_hw *hw = &adapter->hw;
120cd576
JB		 1680
1681 wol->supported = WAKE_UCAST | WAKE_MCAST |
1682 WAKE_BCAST | WAKE_MAGIC;
1683 wol->wolopts = 0;
1684
1685 /* this function will set ->supported = 0 and return 1 if wol is not
1686 * supported by this hardware */
de126489
RW		 1687 if (e1000_wol_exclusion(adapter, wol) ||
1688 !device_can_wakeup(&adapter->pdev->dev))
1da177e4 1689 return;
120cd576
JB		 1690
1691 /* apply any specific unsupported masks here */
1dc32918 1692 switch (hw->device_id) {
120cd576
JB		 1693 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1694 /* KSP3 does not suppport UCAST wake-ups */
1695 wol->supported &= ~WAKE_UCAST;
1696
1697 if (adapter->wol & E1000_WUFC_EX)
feb8f478
ET		 1698 e_err(drv, "Interface does not support directed "
1699 "(unicast) frame wake-up packets\n");
120cd576
JB		 1700 break;
1701 default:
1702 break;
1da177e4 1703 }
120cd576
JB		 1704
1705 if (adapter->wol & E1000_WUFC_EX)
1706 wol->wolopts |= WAKE_UCAST;
1707 if (adapter->wol & E1000_WUFC_MC)
1708 wol->wolopts |= WAKE_MCAST;
1709 if (adapter->wol & E1000_WUFC_BC)
1710 wol->wolopts |= WAKE_BCAST;
1711 if (adapter->wol & E1000_WUFC_MAG)
1712 wol->wolopts |= WAKE_MAGIC;
1da177e4
LT		 1713}
1714
64798845 1715static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1da177e4 1716{
60490fe0 1717 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1718 struct e1000_hw *hw = &adapter->hw;
1719
120cd576
JB		 1720 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1721 return -EOPNOTSUPP;
1722
de126489
RW		 1723 if (e1000_wol_exclusion(adapter, wol) ||
1724 !device_can_wakeup(&adapter->pdev->dev))
1da177e4
LT		 1725 return wol->wolopts ? -EOPNOTSUPP : 0;
1726
120cd576 1727 switch (hw->device_id) {
84916829 1728 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829 1729 if (wol->wolopts & WAKE_UCAST) {
feb8f478
ET		 1730 e_err(drv, "Interface does not support directed "
1731 "(unicast) frame wake-up packets\n");
84916829
JK		 1732 return -EOPNOTSUPP;
1733 }
120cd576 1734 break;
1da177e4 1735 default:
120cd576 1736 break;
1da177e4
LT		 1737 }
1738
120cd576
JB		 1739 /* these settings will always override what we currently have */
1740 adapter->wol = 0;
1741
1742 if (wol->wolopts & WAKE_UCAST)
1743 adapter->wol |= E1000_WUFC_EX;
1744 if (wol->wolopts & WAKE_MCAST)
1745 adapter->wol |= E1000_WUFC_MC;
1746 if (wol->wolopts & WAKE_BCAST)
1747 adapter->wol |= E1000_WUFC_BC;
1748 if (wol->wolopts & WAKE_MAGIC)
1749 adapter->wol |= E1000_WUFC_MAG;
1750
de126489
RW		 1751 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1752
1da177e4
LT		 1753 return 0;
1754}
1755
1756/* toggle LED 4 times per second = 2 "blinks" per second */
1757#define E1000_ID_INTERVAL (HZ/4)
1758
1759/* bit defines for adapter->led_status */
1760#define E1000_LED_ON 0
1761
64798845 1762static void e1000_led_blink_callback(unsigned long data)
1da177e4
LT		 1763{
1764 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1dc32918 1765 struct e1000_hw *hw = &adapter->hw;
1da177e4 1766
96838a40 1767 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1dc32918 1768 e1000_led_off(hw);
1da177e4 1769 else
1dc32918 1770 e1000_led_on(hw);
1da177e4
LT		 1771
1772 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1773}
1774
64798845 1775static int e1000_phys_id(struct net_device *netdev, u32 data)
1da177e4 1776{
60490fe0 1777 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1778 struct e1000_hw *hw = &adapter->hw;
1da177e4 1779
abec42a4
SH		 1780 if (!data)
1781 data = INT_MAX;
1da177e4 1782
1532ecea
JB		 1783 if (!adapter->blink_timer.function) {
1784 init_timer(&adapter->blink_timer);
1785 adapter->blink_timer.function = e1000_led_blink_callback;
1786 adapter->blink_timer.data = (unsigned long)adapter;
1da177e4 1787 }
1532ecea
JB		 1788 e1000_setup_led(hw);
1789 mod_timer(&adapter->blink_timer, jiffies);
1790 msleep_interruptible(data * 1000);
1791 del_timer_sync(&adapter->blink_timer);
1da177e4 1792
1dc32918 1793 e1000_led_off(hw);
1da177e4 1794 clear_bit(E1000_LED_ON, &adapter->led_status);
1dc32918 1795 e1000_cleanup_led(hw);
1da177e4
LT		 1796
1797 return 0;
1798}
1799
94c9e5a8
JB		 1800static int e1000_get_coalesce(struct net_device *netdev,
1801 struct ethtool_coalesce *ec)
1802{
1803 struct e1000_adapter *adapter = netdev_priv(netdev);
1804
1805 if (adapter->hw.mac_type < e1000_82545)
1806 return -EOPNOTSUPP;
1807
eab2abf5 1808 if (adapter->itr_setting <= 4)
94c9e5a8
JB		 1809 ec->rx_coalesce_usecs = adapter->itr_setting;
1810 else
1811 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1812
1813 return 0;
1814}
1815
1816static int e1000_set_coalesce(struct net_device *netdev,
1817 struct ethtool_coalesce *ec)
1818{
1819 struct e1000_adapter *adapter = netdev_priv(netdev);
1820 struct e1000_hw *hw = &adapter->hw;
1821
1822 if (hw->mac_type < e1000_82545)
1823 return -EOPNOTSUPP;
1824
1825 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 1826 ((ec->rx_coalesce_usecs > 4) &&
94c9e5a8
JB		 1827 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1828 (ec->rx_coalesce_usecs == 2))
1829 return -EINVAL;
1830
eab2abf5
JB		 1831 if (ec->rx_coalesce_usecs == 4) {
1832 adapter->itr = adapter->itr_setting = 4;
1833 } else if (ec->rx_coalesce_usecs <= 3) {
94c9e5a8
JB		 1834 adapter->itr = 20000;
1835 adapter->itr_setting = ec->rx_coalesce_usecs;
1836 } else {
1837 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1838 adapter->itr_setting = adapter->itr & ~3;
1839 }
1840
1841 if (adapter->itr_setting != 0)
1842 ew32(ITR, 1000000000 / (adapter->itr * 256));
1843 else
1844 ew32(ITR, 0);
1845
1846 return 0;
1847}
1848
64798845 1849static int e1000_nway_reset(struct net_device *netdev)
1da177e4 1850{
60490fe0 1851 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK		 1852 if (netif_running(netdev))
1853 e1000_reinit_locked(adapter);
1da177e4
LT		 1854 return 0;
1855}
1856
64798845
JP		 1857static void e1000_get_ethtool_stats(struct net_device *netdev,
1858 struct ethtool_stats *stats, u64 *data)
1da177e4 1859{
60490fe0 1860 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1861 int i;
8328c38f 1862 char *p = NULL;
1da177e4
LT		 1863
1864 e1000_update_stats(adapter);
7bfa4816 1865 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
8328c38f
AK		 1866 switch (e1000_gstrings_stats[i].type) {
1867 case NETDEV_STATS:
1868 p = (char *) netdev +
1869 e1000_gstrings_stats[i].stat_offset;
1870 break;
1871 case E1000_STATS:
1872 p = (char *) adapter +
1873 e1000_gstrings_stats[i].stat_offset;
1874 break;
1875 }
1876
7bfa4816 1877 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
406874a7 1878 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1da177e4 1879 }
7bfa4816 1880/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT		 1881}
1882
64798845
JP		 1883static void e1000_get_strings(struct net_device *netdev, u32 stringset,
1884 u8 *data)
1da177e4 1885{
406874a7 1886 u8 *p = data;
1da177e4
LT		 1887 int i;
1888
96838a40 1889 switch (stringset) {
1da177e4 1890 case ETH_SS_TEST:
96838a40 1891 memcpy(data, *e1000_gstrings_test,
c32bc6e9 1892 sizeof(e1000_gstrings_test));
1da177e4
LT		 1893 break;
1894 case ETH_SS_STATS:
7bfa4816
JK		 1895 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1896 memcpy(p, e1000_gstrings_stats[i].stat_string,
1897 ETH_GSTRING_LEN);
1898 p += ETH_GSTRING_LEN;
1899 }
7bfa4816 1900/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT		 1901 break;
1902 }
1903}
1904
7282d491 1905static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT		 1906 .get_settings = e1000_get_settings,
1907 .set_settings = e1000_set_settings,
1908 .get_drvinfo = e1000_get_drvinfo,
1909 .get_regs_len = e1000_get_regs_len,
1910 .get_regs = e1000_get_regs,
1911 .get_wol = e1000_get_wol,
1912 .set_wol = e1000_set_wol,
8fc897b0
AK		 1913 .get_msglevel = e1000_get_msglevel,
1914 .set_msglevel = e1000_set_msglevel,
1da177e4 1915 .nway_reset = e1000_nway_reset,
b548192a 1916 .get_link = e1000_get_link,
1da177e4
LT		 1917 .get_eeprom_len = e1000_get_eeprom_len,
1918 .get_eeprom = e1000_get_eeprom,
1919 .set_eeprom = e1000_set_eeprom,
1920 .get_ringparam = e1000_get_ringparam,
1921 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK		 1922 .get_pauseparam = e1000_get_pauseparam,
1923 .set_pauseparam = e1000_set_pauseparam,
1924 .get_rx_csum = e1000_get_rx_csum,
1925 .set_rx_csum = e1000_set_rx_csum,
1926 .get_tx_csum = e1000_get_tx_csum,
1927 .set_tx_csum = e1000_set_tx_csum,
8fc897b0 1928 .set_sg = ethtool_op_set_sg,
8fc897b0 1929 .set_tso = e1000_set_tso,
1da177e4
LT		 1930 .self_test = e1000_diag_test,
1931 .get_strings = e1000_get_strings,
1932 .phys_id = e1000_phys_id,
1da177e4 1933 .get_ethtool_stats = e1000_get_ethtool_stats,
94c9e5a8
JB		 1934 .get_sset_count = e1000_get_sset_count,
1935 .get_coalesce = e1000_get_coalesce,
1936 .set_coalesce = e1000_set_coalesce,
1da177e4
LT		 1937};
1938
1939void e1000_set_ethtool_ops(struct net_device *netdev)
1940{
1941 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1942}
Linux kernel - Deliverables
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