e1000: FIX: 82542 doesn't support WoL
[deliverable/linux.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
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3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
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16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
32
33#include <asm/uaccess.h>
34
35574764
NN
35extern char e1000_driver_name[];
36extern char e1000_driver_version[];
37
38extern int e1000_up(struct e1000_adapter *adapter);
39extern void e1000_down(struct e1000_adapter *adapter);
40extern void e1000_reinit_locked(struct e1000_adapter *adapter);
41extern void e1000_reset(struct e1000_adapter *adapter);
42extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
43extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
44extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
45extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
46extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
47extern void e1000_update_stats(struct e1000_adapter *adapter);
48
49
1da177e4
LT
50struct e1000_stats {
51 char stat_string[ETH_GSTRING_LEN];
52 int sizeof_stat;
53 int stat_offset;
54};
55
56#define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
57 offsetof(struct e1000_adapter, m)
58static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW
59 { "rx_packets", E1000_STAT(stats.gprc) },
60 { "tx_packets", E1000_STAT(stats.gptc) },
61 { "rx_bytes", E1000_STAT(stats.gorcl) },
62 { "tx_bytes", E1000_STAT(stats.gotcl) },
63 { "rx_broadcast", E1000_STAT(stats.bprc) },
64 { "tx_broadcast", E1000_STAT(stats.bptc) },
65 { "rx_multicast", E1000_STAT(stats.mprc) },
66 { "tx_multicast", E1000_STAT(stats.mptc) },
67 { "rx_errors", E1000_STAT(stats.rxerrc) },
68 { "tx_errors", E1000_STAT(stats.txerrc) },
1da177e4 69 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
49559854
MW
70 { "multicast", E1000_STAT(stats.mprc) },
71 { "collisions", E1000_STAT(stats.colc) },
72 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
1da177e4 73 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
49559854 74 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
1da177e4 75 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
2648345f 76 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW
77 { "rx_missed_errors", E1000_STAT(stats.mpc) },
78 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
79 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
1da177e4
LT
80 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
81 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
49559854 82 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT
83 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
84 { "tx_deferred_ok", E1000_STAT(stats.dc) },
85 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
86 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 87 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
1da177e4
LT
88 { "rx_long_length_errors", E1000_STAT(stats.roc) },
89 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
90 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
91 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
92 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
93 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
94 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
95 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
96 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
97 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
98 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9
MC
99 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
100 { "rx_header_split", E1000_STAT(rx_hdr_split) },
6b7660cd 101 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
1da177e4 102};
7bfa4816 103
7bfa4816 104#define E1000_QUEUE_STATS_LEN 0
7bfa4816 105#define E1000_GLOBAL_STATS_LEN \
1da177e4 106 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
7bfa4816 107#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT
108static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
109 "Register test (offline)", "Eeprom test (offline)",
110 "Interrupt test (offline)", "Loopback test (offline)",
111 "Link test (on/offline)"
112};
113#define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
114
115static int
116e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
117{
60490fe0 118 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
119 struct e1000_hw *hw = &adapter->hw;
120
96838a40 121 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
122
123 ecmd->supported = (SUPPORTED_10baseT_Half |
124 SUPPORTED_10baseT_Full |
125 SUPPORTED_100baseT_Half |
126 SUPPORTED_100baseT_Full |
127 SUPPORTED_1000baseT_Full|
128 SUPPORTED_Autoneg |
129 SUPPORTED_TP);
cd94dd0b
AK
130 if (hw->phy_type == e1000_phy_ife)
131 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
1da177e4
LT
132 ecmd->advertising = ADVERTISED_TP;
133
96838a40 134 if (hw->autoneg == 1) {
1da177e4
LT
135 ecmd->advertising |= ADVERTISED_Autoneg;
136
137 /* the e1000 autoneg seems to match ethtool nicely */
138
139 ecmd->advertising |= hw->autoneg_advertised;
140 }
141
142 ecmd->port = PORT_TP;
143 ecmd->phy_address = hw->phy_addr;
144
96838a40 145 if (hw->mac_type == e1000_82543)
1da177e4
LT
146 ecmd->transceiver = XCVR_EXTERNAL;
147 else
148 ecmd->transceiver = XCVR_INTERNAL;
149
150 } else {
151 ecmd->supported = (SUPPORTED_1000baseT_Full |
152 SUPPORTED_FIBRE |
153 SUPPORTED_Autoneg);
154
012609a8
MC
155 ecmd->advertising = (ADVERTISED_1000baseT_Full |
156 ADVERTISED_FIBRE |
157 ADVERTISED_Autoneg);
1da177e4
LT
158
159 ecmd->port = PORT_FIBRE;
160
96838a40 161 if (hw->mac_type >= e1000_82545)
1da177e4
LT
162 ecmd->transceiver = XCVR_INTERNAL;
163 else
164 ecmd->transceiver = XCVR_EXTERNAL;
165 }
166
96838a40 167 if (netif_carrier_ok(adapter->netdev)) {
1da177e4
LT
168
169 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
170 &adapter->link_duplex);
171 ecmd->speed = adapter->link_speed;
172
173 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
174 * and HALF_DUPLEX != DUPLEX_HALF */
175
96838a40 176 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT
177 ecmd->duplex = DUPLEX_FULL;
178 else
179 ecmd->duplex = DUPLEX_HALF;
180 } else {
181 ecmd->speed = -1;
182 ecmd->duplex = -1;
183 }
184
185 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
186 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
187 return 0;
188}
189
190static int
191e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
192{
60490fe0 193 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
194 struct e1000_hw *hw = &adapter->hw;
195
57128197
JK
196 /* When SoL/IDER sessions are active, autoneg/speed/duplex
197 * cannot be changed */
198 if (e1000_check_phy_reset_block(hw)) {
199 DPRINTK(DRV, ERR, "Cannot change link characteristics "
200 "when SoL/IDER is active.\n");
201 return -EINVAL;
202 }
203
1a821ca5
JB
204 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
205 msleep(1);
206
57128197 207 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 208 hw->autoneg = 1;
96838a40 209 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC
210 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
211 ADVERTISED_FIBRE |
212 ADVERTISED_Autoneg;
96838a40 213 else
2f2ca263
JK
214 hw->autoneg_advertised = ecmd->advertising |
215 ADVERTISED_TP |
216 ADVERTISED_Autoneg;
012609a8 217 ecmd->advertising = hw->autoneg_advertised;
1da177e4 218 } else
1a821ca5
JB
219 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
220 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 221 return -EINVAL;
1a821ca5 222 }
1da177e4
LT
223
224 /* reset the link */
225
1a821ca5
JB
226 if (netif_running(adapter->netdev)) {
227 e1000_down(adapter);
228 e1000_up(adapter);
229 } else
1da177e4
LT
230 e1000_reset(adapter);
231
1a821ca5 232 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
233 return 0;
234}
235
236static void
237e1000_get_pauseparam(struct net_device *netdev,
238 struct ethtool_pauseparam *pause)
239{
60490fe0 240 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
241 struct e1000_hw *hw = &adapter->hw;
242
96838a40 243 pause->autoneg =
1da177e4 244 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 245
11241b10 246 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 247 pause->rx_pause = 1;
11241b10 248 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 249 pause->tx_pause = 1;
11241b10 250 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT
251 pause->rx_pause = 1;
252 pause->tx_pause = 1;
253 }
254}
255
256static int
257e1000_set_pauseparam(struct net_device *netdev,
258 struct ethtool_pauseparam *pause)
259{
60490fe0 260 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 261 struct e1000_hw *hw = &adapter->hw;
1a821ca5 262 int retval = 0;
96838a40 263
1da177e4
LT
264 adapter->fc_autoneg = pause->autoneg;
265
1a821ca5
JB
266 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
267 msleep(1);
268
96838a40 269 if (pause->rx_pause && pause->tx_pause)
11241b10 270 hw->fc = E1000_FC_FULL;
96838a40 271 else if (pause->rx_pause && !pause->tx_pause)
11241b10 272 hw->fc = E1000_FC_RX_PAUSE;
96838a40 273 else if (!pause->rx_pause && pause->tx_pause)
11241b10 274 hw->fc = E1000_FC_TX_PAUSE;
96838a40 275 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 276 hw->fc = E1000_FC_NONE;
1da177e4
LT
277
278 hw->original_fc = hw->fc;
279
96838a40 280 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB
281 if (netif_running(adapter->netdev)) {
282 e1000_down(adapter);
283 e1000_up(adapter);
284 } else
1da177e4 285 e1000_reset(adapter);
96838a40 286 } else
1a821ca5
JB
287 retval = ((hw->media_type == e1000_media_type_fiber) ?
288 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 289
1a821ca5
JB
290 clear_bit(__E1000_RESETTING, &adapter->flags);
291 return retval;
1da177e4
LT
292}
293
294static uint32_t
295e1000_get_rx_csum(struct net_device *netdev)
296{
60490fe0 297 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
298 return adapter->rx_csum;
299}
300
301static int
302e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
303{
60490fe0 304 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
305 adapter->rx_csum = data;
306
2db10a08
AK
307 if (netif_running(netdev))
308 e1000_reinit_locked(adapter);
309 else
1da177e4
LT
310 e1000_reset(adapter);
311 return 0;
312}
96838a40 313
1da177e4
LT
314static uint32_t
315e1000_get_tx_csum(struct net_device *netdev)
316{
317 return (netdev->features & NETIF_F_HW_CSUM) != 0;
318}
319
320static int
321e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
322{
60490fe0 323 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 324
96838a40 325 if (adapter->hw.mac_type < e1000_82543) {
1da177e4
LT
326 if (!data)
327 return -EINVAL;
328 return 0;
329 }
330
331 if (data)
332 netdev->features |= NETIF_F_HW_CSUM;
333 else
334 netdev->features &= ~NETIF_F_HW_CSUM;
335
336 return 0;
337}
338
339#ifdef NETIF_F_TSO
340static int
341e1000_set_tso(struct net_device *netdev, uint32_t data)
342{
60490fe0 343 struct e1000_adapter *adapter = netdev_priv(netdev);
96838a40
JB
344 if ((adapter->hw.mac_type < e1000_82544) ||
345 (adapter->hw.mac_type == e1000_82547))
1da177e4
LT
346 return data ? -EINVAL : 0;
347
348 if (data)
349 netdev->features |= NETIF_F_TSO;
350 else
351 netdev->features &= ~NETIF_F_TSO;
7e6c9861
JK
352
353 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
354 adapter->tso_force = TRUE;
1da177e4 355 return 0;
96838a40 356}
1da177e4
LT
357#endif /* NETIF_F_TSO */
358
359static uint32_t
360e1000_get_msglevel(struct net_device *netdev)
361{
60490fe0 362 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
363 return adapter->msg_enable;
364}
365
366static void
367e1000_set_msglevel(struct net_device *netdev, uint32_t data)
368{
60490fe0 369 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
370 adapter->msg_enable = data;
371}
372
96838a40 373static int
1da177e4
LT
374e1000_get_regs_len(struct net_device *netdev)
375{
376#define E1000_REGS_LEN 32
377 return E1000_REGS_LEN * sizeof(uint32_t);
378}
379
380static void
381e1000_get_regs(struct net_device *netdev,
382 struct ethtool_regs *regs, void *p)
383{
60490fe0 384 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
385 struct e1000_hw *hw = &adapter->hw;
386 uint32_t *regs_buff = p;
387 uint16_t phy_data;
388
389 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
390
391 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
392
393 regs_buff[0] = E1000_READ_REG(hw, CTRL);
394 regs_buff[1] = E1000_READ_REG(hw, STATUS);
395
396 regs_buff[2] = E1000_READ_REG(hw, RCTL);
397 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
398 regs_buff[4] = E1000_READ_REG(hw, RDH);
399 regs_buff[5] = E1000_READ_REG(hw, RDT);
400 regs_buff[6] = E1000_READ_REG(hw, RDTR);
401
402 regs_buff[7] = E1000_READ_REG(hw, TCTL);
403 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
404 regs_buff[9] = E1000_READ_REG(hw, TDH);
405 regs_buff[10] = E1000_READ_REG(hw, TDT);
406 regs_buff[11] = E1000_READ_REG(hw, TIDV);
407
408 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 409 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT
410 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
411 IGP01E1000_PHY_AGC_A);
412 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
413 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
414 regs_buff[13] = (uint32_t)phy_data; /* cable length */
415 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
416 IGP01E1000_PHY_AGC_B);
417 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
418 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
419 regs_buff[14] = (uint32_t)phy_data; /* cable length */
420 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
421 IGP01E1000_PHY_AGC_C);
422 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
423 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
424 regs_buff[15] = (uint32_t)phy_data; /* cable length */
425 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
426 IGP01E1000_PHY_AGC_D);
427 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
428 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
429 regs_buff[16] = (uint32_t)phy_data; /* cable length */
430 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
431 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
432 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
433 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
434 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
435 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
436 IGP01E1000_PHY_PCS_INIT_REG);
437 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
438 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
439 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
440 regs_buff[20] = 0; /* polarity correction enabled (always) */
441 regs_buff[22] = 0; /* phy receive errors (unavailable) */
442 regs_buff[23] = regs_buff[18]; /* mdix mode */
443 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
444 } else {
8fc897b0 445 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1da177e4
LT
446 regs_buff[13] = (uint32_t)phy_data; /* cable length */
447 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
448 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
449 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 450 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1da177e4
LT
451 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
452 regs_buff[18] = regs_buff[13]; /* cable polarity */
453 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
454 regs_buff[20] = regs_buff[17]; /* polarity correction */
455 /* phy receive errors */
456 regs_buff[22] = adapter->phy_stats.receive_errors;
457 regs_buff[23] = regs_buff[13]; /* mdix mode */
458 }
459 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
460 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
461 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
462 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 463 if (hw->mac_type >= e1000_82540 &&
4ccc12ae
JB
464 hw->mac_type < e1000_82571 &&
465 hw->media_type == e1000_media_type_copper) {
1da177e4
LT
466 regs_buff[26] = E1000_READ_REG(hw, MANC);
467 }
468}
469
470static int
471e1000_get_eeprom_len(struct net_device *netdev)
472{
60490fe0 473 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
474 return adapter->hw.eeprom.word_size * 2;
475}
476
477static int
478e1000_get_eeprom(struct net_device *netdev,
479 struct ethtool_eeprom *eeprom, uint8_t *bytes)
480{
60490fe0 481 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
482 struct e1000_hw *hw = &adapter->hw;
483 uint16_t *eeprom_buff;
484 int first_word, last_word;
485 int ret_val = 0;
486 uint16_t i;
487
96838a40 488 if (eeprom->len == 0)
1da177e4
LT
489 return -EINVAL;
490
491 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
492
493 first_word = eeprom->offset >> 1;
494 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
495
496 eeprom_buff = kmalloc(sizeof(uint16_t) *
497 (last_word - first_word + 1), GFP_KERNEL);
96838a40 498 if (!eeprom_buff)
1da177e4
LT
499 return -ENOMEM;
500
96838a40 501 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT
502 ret_val = e1000_read_eeprom(hw, first_word,
503 last_word - first_word + 1,
504 eeprom_buff);
505 else {
506 for (i = 0; i < last_word - first_word + 1; i++)
96838a40 507 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
1da177e4
LT
508 &eeprom_buff[i])))
509 break;
510 }
511
512 /* Device's eeprom is always little-endian, word addressable */
513 for (i = 0; i < last_word - first_word + 1; i++)
514 le16_to_cpus(&eeprom_buff[i]);
515
516 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
517 eeprom->len);
518 kfree(eeprom_buff);
519
520 return ret_val;
521}
522
523static int
524e1000_set_eeprom(struct net_device *netdev,
525 struct ethtool_eeprom *eeprom, uint8_t *bytes)
526{
60490fe0 527 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
528 struct e1000_hw *hw = &adapter->hw;
529 uint16_t *eeprom_buff;
530 void *ptr;
531 int max_len, first_word, last_word, ret_val = 0;
532 uint16_t i;
533
96838a40 534 if (eeprom->len == 0)
1da177e4
LT
535 return -EOPNOTSUPP;
536
96838a40 537 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT
538 return -EFAULT;
539
540 max_len = hw->eeprom.word_size * 2;
541
542 first_word = eeprom->offset >> 1;
543 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
544 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 545 if (!eeprom_buff)
1da177e4
LT
546 return -ENOMEM;
547
548 ptr = (void *)eeprom_buff;
549
96838a40 550 if (eeprom->offset & 1) {
1da177e4
LT
551 /* need read/modify/write of first changed EEPROM word */
552 /* only the second byte of the word is being modified */
553 ret_val = e1000_read_eeprom(hw, first_word, 1,
554 &eeprom_buff[0]);
555 ptr++;
556 }
96838a40 557 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT
558 /* need read/modify/write of last changed EEPROM word */
559 /* only the first byte of the word is being modified */
560 ret_val = e1000_read_eeprom(hw, last_word, 1,
561 &eeprom_buff[last_word - first_word]);
562 }
563
564 /* Device's eeprom is always little-endian, word addressable */
565 for (i = 0; i < last_word - first_word + 1; i++)
566 le16_to_cpus(&eeprom_buff[i]);
567
568 memcpy(ptr, bytes, eeprom->len);
569
570 for (i = 0; i < last_word - first_word + 1; i++)
571 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
572
573 ret_val = e1000_write_eeprom(hw, first_word,
574 last_word - first_word + 1, eeprom_buff);
575
96838a40 576 /* Update the checksum over the first part of the EEPROM if needed
a7990ba6 577 * and flush shadow RAM for 82573 conrollers */
96838a40 578 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
a7990ba6 579 (hw->mac_type == e1000_82573)))
1da177e4
LT
580 e1000_update_eeprom_checksum(hw);
581
582 kfree(eeprom_buff);
583 return ret_val;
584}
585
586static void
587e1000_get_drvinfo(struct net_device *netdev,
588 struct ethtool_drvinfo *drvinfo)
589{
60490fe0 590 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22
JK
591 char firmware_version[32];
592 uint16_t eeprom_data;
1da177e4
LT
593
594 strncpy(drvinfo->driver, e1000_driver_name, 32);
595 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22
JK
596
597 /* EEPROM image version # is reported as firmware version # for
598 * 8257{1|2|3} controllers */
599 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
600 switch (adapter->hw.mac_type) {
601 case e1000_82571:
602 case e1000_82572:
603 case e1000_82573:
6418ecc6 604 case e1000_80003es2lan:
cd94dd0b 605 case e1000_ich8lan:
a2917e22
JK
606 sprintf(firmware_version, "%d.%d-%d",
607 (eeprom_data & 0xF000) >> 12,
608 (eeprom_data & 0x0FF0) >> 4,
609 eeprom_data & 0x000F);
610 break;
611 default:
612 sprintf(firmware_version, "N/A");
613 }
614
615 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4
LT
616 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
617 drvinfo->n_stats = E1000_STATS_LEN;
618 drvinfo->testinfo_len = E1000_TEST_LEN;
619 drvinfo->regdump_len = e1000_get_regs_len(netdev);
620 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
621}
622
623static void
624e1000_get_ringparam(struct net_device *netdev,
625 struct ethtool_ringparam *ring)
626{
60490fe0 627 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 628 e1000_mac_type mac_type = adapter->hw.mac_type;
581d708e
MC
629 struct e1000_tx_ring *txdr = adapter->tx_ring;
630 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT
631
632 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
633 E1000_MAX_82544_RXD;
634 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
635 E1000_MAX_82544_TXD;
636 ring->rx_mini_max_pending = 0;
637 ring->rx_jumbo_max_pending = 0;
638 ring->rx_pending = rxdr->count;
639 ring->tx_pending = txdr->count;
640 ring->rx_mini_pending = 0;
641 ring->rx_jumbo_pending = 0;
642}
643
96838a40 644static int
1da177e4
LT
645e1000_set_ringparam(struct net_device *netdev,
646 struct ethtool_ringparam *ring)
647{
60490fe0 648 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 649 e1000_mac_type mac_type = adapter->hw.mac_type;
793fab72
VA
650 struct e1000_tx_ring *txdr, *tx_old;
651 struct e1000_rx_ring *rxdr, *rx_old;
581d708e
MC
652 int i, err, tx_ring_size, rx_ring_size;
653
0989aa43
JK
654 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
655 return -EINVAL;
656
f56799ea
JK
657 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
658 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e 659
2db10a08
AK
660 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
661 msleep(1);
662
581d708e
MC
663 if (netif_running(adapter->netdev))
664 e1000_down(adapter);
1da177e4
LT
665
666 tx_old = adapter->tx_ring;
667 rx_old = adapter->rx_ring;
668
793fab72
VA
669 err = -ENOMEM;
670 txdr = kzalloc(tx_ring_size, GFP_KERNEL);
671 if (!txdr)
672 goto err_alloc_tx;
581d708e 673
793fab72
VA
674 rxdr = kzalloc(rx_ring_size, GFP_KERNEL);
675 if (!rxdr)
676 goto err_alloc_rx;
581d708e 677
793fab72
VA
678 adapter->tx_ring = txdr;
679 adapter->rx_ring = rxdr;
581d708e 680
1da177e4
LT
681 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
682 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
683 E1000_MAX_RXD : E1000_MAX_82544_RXD));
96838a40 684 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4
LT
685
686 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
687 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
688 E1000_MAX_TXD : E1000_MAX_82544_TXD));
96838a40 689 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 690
f56799ea 691 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 692 txdr[i].count = txdr->count;
f56799ea 693 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 694 rxdr[i].count = rxdr->count;
581d708e 695
96838a40 696 if (netif_running(adapter->netdev)) {
1da177e4 697 /* Try to get new resources before deleting old */
581d708e 698 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4 699 goto err_setup_rx;
581d708e 700 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT
701 goto err_setup_tx;
702
703 /* save the new, restore the old in order to free it,
704 * then restore the new back again */
705
1da177e4
LT
706 adapter->rx_ring = rx_old;
707 adapter->tx_ring = tx_old;
581d708e
MC
708 e1000_free_all_rx_resources(adapter);
709 e1000_free_all_tx_resources(adapter);
710 kfree(tx_old);
711 kfree(rx_old);
793fab72
VA
712 adapter->rx_ring = rxdr;
713 adapter->tx_ring = txdr;
96838a40 714 if ((err = e1000_up(adapter)))
2db10a08 715 goto err_setup;
1da177e4
LT
716 }
717
2db10a08 718 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
719 return 0;
720err_setup_tx:
581d708e 721 e1000_free_all_rx_resources(adapter);
1da177e4
LT
722err_setup_rx:
723 adapter->rx_ring = rx_old;
724 adapter->tx_ring = tx_old;
793fab72
VA
725 kfree(rxdr);
726err_alloc_rx:
727 kfree(txdr);
728err_alloc_tx:
1da177e4 729 e1000_up(adapter);
2db10a08
AK
730err_setup:
731 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
732 return err;
733}
734
735#define REG_PATTERN_TEST(R, M, W) \
736{ \
737 uint32_t pat, value; \
738 uint32_t test[] = \
739 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
96838a40 740 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
1da177e4
LT
741 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
742 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 743 if (value != (test[pat] & W & M)) { \
b01f6691
MC
744 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
745 "0x%08X expected 0x%08X\n", \
746 E1000_##R, value, (test[pat] & W & M)); \
1da177e4
LT
747 *data = (adapter->hw.mac_type < e1000_82543) ? \
748 E1000_82542_##R : E1000_##R; \
749 return 1; \
750 } \
751 } \
752}
753
754#define REG_SET_AND_CHECK(R, M, W) \
755{ \
756 uint32_t value; \
757 E1000_WRITE_REG(&adapter->hw, R, W & M); \
758 value = E1000_READ_REG(&adapter->hw, R); \
96838a40 759 if ((W & M) != (value & M)) { \
b01f6691
MC
760 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
761 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
1da177e4
LT
762 *data = (adapter->hw.mac_type < e1000_82543) ? \
763 E1000_82542_##R : E1000_##R; \
764 return 1; \
765 } \
766}
767
768static int
769e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
770{
b01f6691
MC
771 uint32_t value, before, after;
772 uint32_t i, toggle;
1da177e4
LT
773
774 /* The status register is Read Only, so a write should fail.
775 * Some bits that get toggled are ignored.
776 */
b01f6691 777 switch (adapter->hw.mac_type) {
868d5309
MC
778 /* there are several bits on newer hardware that are r/w */
779 case e1000_82571:
780 case e1000_82572:
6418ecc6 781 case e1000_80003es2lan:
868d5309
MC
782 toggle = 0x7FFFF3FF;
783 break;
b01f6691 784 case e1000_82573:
cd94dd0b 785 case e1000_ich8lan:
b01f6691
MC
786 toggle = 0x7FFFF033;
787 break;
788 default:
789 toggle = 0xFFFFF833;
790 break;
791 }
792
793 before = E1000_READ_REG(&adapter->hw, STATUS);
794 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
795 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
796 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
96838a40 797 if (value != after) {
b01f6691
MC
798 DPRINTK(DRV, ERR, "failed STATUS register test got: "
799 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT
800 *data = 1;
801 return 1;
802 }
b01f6691
MC
803 /* restore previous status */
804 E1000_WRITE_REG(&adapter->hw, STATUS, before);
cd94dd0b
AK
805 if (adapter->hw.mac_type != e1000_ich8lan) {
806 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
807 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
808 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
809 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
810 }
1da177e4
LT
811 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
812 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
813 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
814 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
815 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
816 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
817 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
818 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
819 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
820 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
821
822 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
cd94dd0b
AK
823 before = (adapter->hw.mac_type == e1000_ich8lan ?
824 0x06C3B33E : 0x06DFB3FE);
825 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT
826 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
827
96838a40 828 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4 829
cd94dd0b 830 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 831 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
cd94dd0b
AK
832 if (adapter->hw.mac_type != e1000_ich8lan)
833 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT
834 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
835 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
cd94dd0b
AK
836 value = (adapter->hw.mac_type == e1000_ich8lan ?
837 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
838 for (i = 0; i < value; i++) {
1da177e4
LT
839 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
840 0xFFFFFFFF);
841 }
842
843 } else {
844
845 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
846 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
847 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
848 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
849
850 }
851
cd94dd0b
AK
852 value = (adapter->hw.mac_type == e1000_ich8lan ?
853 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
854 for (i = 0; i < value; i++)
1da177e4
LT
855 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
856
857 *data = 0;
858 return 0;
859}
860
861static int
862e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
863{
864 uint16_t temp;
865 uint16_t checksum = 0;
866 uint16_t i;
867
868 *data = 0;
869 /* Read and add up the contents of the EEPROM */
96838a40
JB
870 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
871 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
1da177e4
LT
872 *data = 1;
873 break;
874 }
875 checksum += temp;
876 }
877
878 /* If Checksum is not Correct return error else test passed */
96838a40 879 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
1da177e4
LT
880 *data = 2;
881
882 return *data;
883}
884
885static irqreturn_t
886e1000_test_intr(int irq,
7d12e780 887 void *data)
1da177e4
LT
888{
889 struct net_device *netdev = (struct net_device *) data;
60490fe0 890 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
891
892 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
893
894 return IRQ_HANDLED;
895}
896
897static int
898e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
899{
900 struct net_device *netdev = adapter->netdev;
76c224bc
AK
901 uint32_t mask, i=0, shared_int = TRUE;
902 uint32_t irq = adapter->pdev->irq;
1da177e4
LT
903
904 *data = 0;
905
8fc897b0 906 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 907 /* Hook up test interrupt handler just for this test */
1fb9df5d 908 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED,
8fc897b0
AK
909 netdev->name, netdev))
910 shared_int = FALSE;
911 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
912 netdev->name, netdev)) {
1da177e4
LT
913 *data = 1;
914 return -1;
915 }
8fc897b0 916 DPRINTK(HW, INFO, "testing %s interrupt\n",
b9b6e78b 917 (shared_int ? "shared" : "unshared"));
1da177e4
LT
918
919 /* Disable all the interrupts */
920 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 921 msleep(10);
1da177e4
LT
922
923 /* Test each interrupt */
96838a40 924 for (; i < 10; i++) {
1da177e4 925
cd94dd0b
AK
926 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
927 continue;
1da177e4
LT
928 /* Interrupt to test */
929 mask = 1 << i;
930
76c224bc
AK
931 if (!shared_int) {
932 /* Disable the interrupt to be reported in
933 * the cause register and then force the same
934 * interrupt and see if one gets posted. If
935 * an interrupt was posted to the bus, the
936 * test failed.
937 */
938 adapter->test_icr = 0;
939 E1000_WRITE_REG(&adapter->hw, IMC, mask);
940 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 941 msleep(10);
76c224bc
AK
942
943 if (adapter->test_icr & mask) {
944 *data = 3;
945 break;
946 }
1da177e4
LT
947 }
948
949 /* Enable the interrupt to be reported in
950 * the cause register and then force the same
951 * interrupt and see if one gets posted. If
952 * an interrupt was not posted to the bus, the
953 * test failed.
954 */
955 adapter->test_icr = 0;
956 E1000_WRITE_REG(&adapter->hw, IMS, mask);
957 E1000_WRITE_REG(&adapter->hw, ICS, mask);
f8ec4733 958 msleep(10);
1da177e4 959
96838a40 960 if (!(adapter->test_icr & mask)) {
1da177e4
LT
961 *data = 4;
962 break;
963 }
964
76c224bc 965 if (!shared_int) {
1da177e4
LT
966 /* Disable the other interrupts to be reported in
967 * the cause register and then force the other
968 * interrupts and see if any get posted. If
969 * an interrupt was posted to the bus, the
970 * test failed.
971 */
972 adapter->test_icr = 0;
2648345f
MC
973 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
974 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
f8ec4733 975 msleep(10);
1da177e4 976
96838a40 977 if (adapter->test_icr) {
1da177e4
LT
978 *data = 5;
979 break;
980 }
981 }
982 }
983
984 /* Disable all the interrupts */
985 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
f8ec4733 986 msleep(10);
1da177e4
LT
987
988 /* Unhook test interrupt handler */
989 free_irq(irq, netdev);
990
991 return *data;
992}
993
994static void
995e1000_free_desc_rings(struct e1000_adapter *adapter)
996{
581d708e
MC
997 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
998 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
999 struct pci_dev *pdev = adapter->pdev;
1000 int i;
1001
96838a40
JB
1002 if (txdr->desc && txdr->buffer_info) {
1003 for (i = 0; i < txdr->count; i++) {
1004 if (txdr->buffer_info[i].dma)
1da177e4
LT
1005 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
1006 txdr->buffer_info[i].length,
1007 PCI_DMA_TODEVICE);
96838a40 1008 if (txdr->buffer_info[i].skb)
1da177e4
LT
1009 dev_kfree_skb(txdr->buffer_info[i].skb);
1010 }
1011 }
1012
96838a40
JB
1013 if (rxdr->desc && rxdr->buffer_info) {
1014 for (i = 0; i < rxdr->count; i++) {
1015 if (rxdr->buffer_info[i].dma)
1da177e4
LT
1016 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1017 rxdr->buffer_info[i].length,
1018 PCI_DMA_FROMDEVICE);
96838a40 1019 if (rxdr->buffer_info[i].skb)
1da177e4
LT
1020 dev_kfree_skb(rxdr->buffer_info[i].skb);
1021 }
1022 }
1023
f5645110 1024 if (txdr->desc) {
1da177e4 1025 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL
1026 txdr->desc = NULL;
1027 }
f5645110 1028 if (rxdr->desc) {
1da177e4 1029 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL
1030 rxdr->desc = NULL;
1031 }
1da177e4 1032
b4558ea9 1033 kfree(txdr->buffer_info);
6b27adb6 1034 txdr->buffer_info = NULL;
b4558ea9 1035 kfree(rxdr->buffer_info);
6b27adb6 1036 rxdr->buffer_info = NULL;
f5645110 1037
1da177e4
LT
1038 return;
1039}
1040
1041static int
1042e1000_setup_desc_rings(struct e1000_adapter *adapter)
1043{
581d708e
MC
1044 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1045 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
1046 struct pci_dev *pdev = adapter->pdev;
1047 uint32_t rctl;
1048 int size, i, ret_val;
1049
1050 /* Setup Tx descriptor ring and Tx buffers */
1051
96838a40
JB
1052 if (!txdr->count)
1053 txdr->count = E1000_DEFAULT_TXD;
1da177e4
LT
1054
1055 size = txdr->count * sizeof(struct e1000_buffer);
96838a40 1056 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT
1057 ret_val = 1;
1058 goto err_nomem;
1059 }
1060 memset(txdr->buffer_info, 0, size);
1061
1062 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1063 E1000_ROUNDUP(txdr->size, 4096);
96838a40 1064 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1da177e4
LT
1065 ret_val = 2;
1066 goto err_nomem;
1067 }
1068 memset(txdr->desc, 0, txdr->size);
1069 txdr->next_to_use = txdr->next_to_clean = 0;
1070
1071 E1000_WRITE_REG(&adapter->hw, TDBAL,
1072 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1073 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1074 E1000_WRITE_REG(&adapter->hw, TDLEN,
1075 txdr->count * sizeof(struct e1000_tx_desc));
1076 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1077 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1078 E1000_WRITE_REG(&adapter->hw, TCTL,
1079 E1000_TCTL_PSP | E1000_TCTL_EN |
1080 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1081 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1082
96838a40 1083 for (i = 0; i < txdr->count; i++) {
1da177e4
LT
1084 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1085 struct sk_buff *skb;
1086 unsigned int size = 1024;
1087
96838a40 1088 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1da177e4
LT
1089 ret_val = 3;
1090 goto err_nomem;
1091 }
1092 skb_put(skb, size);
1093 txdr->buffer_info[i].skb = skb;
1094 txdr->buffer_info[i].length = skb->len;
1095 txdr->buffer_info[i].dma =
1096 pci_map_single(pdev, skb->data, skb->len,
1097 PCI_DMA_TODEVICE);
1098 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1099 tx_desc->lower.data = cpu_to_le32(skb->len);
1100 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1101 E1000_TXD_CMD_IFCS |
1102 E1000_TXD_CMD_RPS);
1103 tx_desc->upper.data = 0;
1104 }
1105
1106 /* Setup Rx descriptor ring and Rx buffers */
1107
96838a40
JB
1108 if (!rxdr->count)
1109 rxdr->count = E1000_DEFAULT_RXD;
1da177e4
LT
1110
1111 size = rxdr->count * sizeof(struct e1000_buffer);
96838a40 1112 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1da177e4
LT
1113 ret_val = 4;
1114 goto err_nomem;
1115 }
1116 memset(rxdr->buffer_info, 0, size);
1117
1118 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
96838a40 1119 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1da177e4
LT
1120 ret_val = 5;
1121 goto err_nomem;
1122 }
1123 memset(rxdr->desc, 0, rxdr->size);
1124 rxdr->next_to_use = rxdr->next_to_clean = 0;
1125
1126 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1127 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1128 E1000_WRITE_REG(&adapter->hw, RDBAL,
1129 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1130 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1131 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1132 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1133 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1134 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1135 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1136 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1137 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1138
96838a40 1139 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT
1140 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1141 struct sk_buff *skb;
1142
96838a40 1143 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1da177e4
LT
1144 GFP_KERNEL))) {
1145 ret_val = 6;
1146 goto err_nomem;
1147 }
1148 skb_reserve(skb, NET_IP_ALIGN);
1149 rxdr->buffer_info[i].skb = skb;
1150 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1151 rxdr->buffer_info[i].dma =
1152 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1153 PCI_DMA_FROMDEVICE);
1154 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1155 memset(skb->data, 0x00, skb->len);
1156 }
1157
1158 return 0;
1159
1160err_nomem:
1161 e1000_free_desc_rings(adapter);
1162 return ret_val;
1163}
1164
1165static void
1166e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1167{
1168 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1169 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1170 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1171 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1172 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1173}
1174
1175static void
1176e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1177{
1178 uint16_t phy_reg;
1179
1180 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1181 * Extended PHY Specific Control Register to 25MHz clock. This
1182 * value defaults back to a 2.5MHz clock when the PHY is reset.
1183 */
1184 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1185 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1186 e1000_write_phy_reg(&adapter->hw,
1187 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1188
1189 /* In addition, because of the s/w reset above, we need to enable
1190 * CRS on TX. This must be set for both full and half duplex
1191 * operation.
1192 */
1193 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1194 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1195 e1000_write_phy_reg(&adapter->hw,
1196 M88E1000_PHY_SPEC_CTRL, phy_reg);
1197}
1198
1199static int
1200e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1201{
1202 uint32_t ctrl_reg;
1203 uint16_t phy_reg;
1204
1205 /* Setup the Device Control Register for PHY loopback test. */
1206
1207 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1208 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1209 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1210 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1211 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1212 E1000_CTRL_FD); /* Force Duplex to FULL */
1213
1214 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1215
1216 /* Read the PHY Specific Control Register (0x10) */
1217 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1218
1219 /* Clear Auto-Crossover bits in PHY Specific Control Register
1220 * (bits 6:5).
1221 */
1222 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1223 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1224
1225 /* Perform software reset on the PHY */
1226 e1000_phy_reset(&adapter->hw);
1227
1228 /* Have to setup TX_CLK and TX_CRS after software reset */
1229 e1000_phy_reset_clk_and_crs(adapter);
1230
1231 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1232
1233 /* Wait for reset to complete. */
1234 udelay(500);
1235
1236 /* Have to setup TX_CLK and TX_CRS after software reset */
1237 e1000_phy_reset_clk_and_crs(adapter);
1238
1239 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1240 e1000_phy_disable_receiver(adapter);
1241
1242 /* Set the loopback bit in the PHY control register. */
1243 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1244 phy_reg |= MII_CR_LOOPBACK;
1245 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1246
1247 /* Setup TX_CLK and TX_CRS one more time. */
1248 e1000_phy_reset_clk_and_crs(adapter);
1249
1250 /* Check Phy Configuration */
1251 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
96838a40 1252 if (phy_reg != 0x4100)
1da177e4
LT
1253 return 9;
1254
1255 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1256 if (phy_reg != 0x0070)
1da177e4
LT
1257 return 10;
1258
1259 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
96838a40 1260 if (phy_reg != 0x001A)
1da177e4
LT
1261 return 11;
1262
1263 return 0;
1264}
1265
1266static int
1267e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1268{
1269 uint32_t ctrl_reg = 0;
1270 uint32_t stat_reg = 0;
1271
1272 adapter->hw.autoneg = FALSE;
1273
96838a40 1274 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT
1275 /* Auto-MDI/MDIX Off */
1276 e1000_write_phy_reg(&adapter->hw,
1277 M88E1000_PHY_SPEC_CTRL, 0x0808);
1278 /* reset to update Auto-MDI/MDIX */
1279 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1280 /* autoneg off */
1281 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
8fc897b0 1282 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
87041639
JK
1283 e1000_write_phy_reg(&adapter->hw,
1284 GG82563_PHY_KMRN_MODE_CTRL,
acfbc9fd 1285 0x1CC);
1da177e4 1286
1da177e4 1287 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
cd94dd0b
AK
1288
1289 if (adapter->hw.phy_type == e1000_phy_ife) {
1290 /* force 100, set loopback */
1291 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1292
1293 /* Now set up the MAC to the same speed/duplex as the PHY. */
1294 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1295 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1296 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1297 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1298 E1000_CTRL_FD); /* Force Duplex to FULL */
1299 } else {
1300 /* force 1000, set loopback */
1301 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1302
1303 /* Now set up the MAC to the same speed/duplex as the PHY. */
1304 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1305 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1306 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1307 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1308 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1309 E1000_CTRL_FD); /* Force Duplex to FULL */
1310 }
1da177e4 1311
96838a40 1312 if (adapter->hw.media_type == e1000_media_type_copper &&
8fc897b0 1313 adapter->hw.phy_type == e1000_phy_m88)
1da177e4 1314 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1315 else {
1da177e4
LT
1316 /* Set the ILOS bit on the fiber Nic is half
1317 * duplex link is detected. */
1318 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 1319 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT
1320 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1321 }
1322
1323 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1324
1325 /* Disable the receiver on the PHY so when a cable is plugged in, the
1326 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1327 */
96838a40 1328 if (adapter->hw.phy_type == e1000_phy_m88)
1da177e4
LT
1329 e1000_phy_disable_receiver(adapter);
1330
1331 udelay(500);
1332
1333 return 0;
1334}
1335
1336static int
1337e1000_set_phy_loopback(struct e1000_adapter *adapter)
1338{
1339 uint16_t phy_reg = 0;
1340 uint16_t count = 0;
1341
1342 switch (adapter->hw.mac_type) {
1343 case e1000_82543:
96838a40 1344 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT
1345 /* Attempt to setup Loopback mode on Non-integrated PHY.
1346 * Some PHY registers get corrupted at random, so
1347 * attempt this 10 times.
1348 */
96838a40 1349 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1350 count++ < 10);
96838a40 1351 if (count < 11)
1da177e4
LT
1352 return 0;
1353 }
1354 break;
1355
1356 case e1000_82544:
1357 case e1000_82540:
1358 case e1000_82545:
1359 case e1000_82545_rev_3:
1360 case e1000_82546:
1361 case e1000_82546_rev_3:
1362 case e1000_82541:
1363 case e1000_82541_rev_2:
1364 case e1000_82547:
1365 case e1000_82547_rev_2:
868d5309
MC
1366 case e1000_82571:
1367 case e1000_82572:
4564327b 1368 case e1000_82573:
6418ecc6 1369 case e1000_80003es2lan:
cd94dd0b 1370 case e1000_ich8lan:
1da177e4
LT
1371 return e1000_integrated_phy_loopback(adapter);
1372 break;
1373
1374 default:
1375 /* Default PHY loopback work is to read the MII
1376 * control register and assert bit 14 (loopback mode).
1377 */
1378 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1379 phy_reg |= MII_CR_LOOPBACK;
1380 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1381 return 0;
1382 break;
1383 }
1384
1385 return 8;
1386}
1387
1388static int
1389e1000_setup_loopback_test(struct e1000_adapter *adapter)
1390{
49273163 1391 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1392 uint32_t rctl;
1393
49273163
JK
1394 if (hw->media_type == e1000_media_type_fiber ||
1395 hw->media_type == e1000_media_type_internal_serdes) {
1396 switch (hw->mac_type) {
1397 case e1000_82545:
1398 case e1000_82546:
1399 case e1000_82545_rev_3:
1400 case e1000_82546_rev_3:
1da177e4 1401 return e1000_set_phy_loopback(adapter);
49273163
JK
1402 break;
1403 case e1000_82571:
1404 case e1000_82572:
1405#define E1000_SERDES_LB_ON 0x410
1406 e1000_set_phy_loopback(adapter);
1407 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
f8ec4733 1408 msleep(10);
49273163
JK
1409 return 0;
1410 break;
1411 default:
1412 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1413 rctl |= E1000_RCTL_LBM_TCVR;
49273163 1414 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT
1415 return 0;
1416 }
49273163 1417 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT
1418 return e1000_set_phy_loopback(adapter);
1419
1420 return 7;
1421}
1422
1423static void
1424e1000_loopback_cleanup(struct e1000_adapter *adapter)
1425{
49273163 1426 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
1427 uint32_t rctl;
1428 uint16_t phy_reg;
1429
49273163 1430 rctl = E1000_READ_REG(hw, RCTL);
1da177e4 1431 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
49273163 1432 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4 1433
49273163
JK
1434 switch (hw->mac_type) {
1435 case e1000_82571:
1436 case e1000_82572:
1437 if (hw->media_type == e1000_media_type_fiber ||
1438 hw->media_type == e1000_media_type_internal_serdes) {
1439#define E1000_SERDES_LB_OFF 0x400
1440 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
f8ec4733 1441 msleep(10);
49273163
JK
1442 break;
1443 }
1444 /* Fall Through */
1445 case e1000_82545:
1446 case e1000_82546:
1447 case e1000_82545_rev_3:
1448 case e1000_82546_rev_3:
1449 default:
1450 hw->autoneg = TRUE;
8fc897b0 1451 if (hw->phy_type == e1000_phy_gg82563)
87041639
JK
1452 e1000_write_phy_reg(hw,
1453 GG82563_PHY_KMRN_MODE_CTRL,
1454 0x180);
49273163
JK
1455 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1456 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1457 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK
1458 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1459 e1000_phy_reset(hw);
1da177e4 1460 }
49273163 1461 break;
1da177e4
LT
1462 }
1463}
1464
1465static void
1466e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1467{
1468 memset(skb->data, 0xFF, frame_size);
ce7393b9 1469 frame_size &= ~1;
1da177e4
LT
1470 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1471 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1472 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1473}
1474
1475static int
1476e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1477{
ce7393b9 1478 frame_size &= ~1;
96838a40
JB
1479 if (*(skb->data + 3) == 0xFF) {
1480 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT
1481 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1482 return 0;
1483 }
1484 }
1485 return 13;
1486}
1487
1488static int
1489e1000_run_loopback_test(struct e1000_adapter *adapter)
1490{
581d708e
MC
1491 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1492 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1493 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC
1494 int i, j, k, l, lc, good_cnt, ret_val=0;
1495 unsigned long time;
1da177e4
LT
1496
1497 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1498
96838a40 1499 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC
1500 * The idea is to wrap the largest ring a number of times using 64
1501 * send/receive pairs during each loop
1502 */
1da177e4 1503
96838a40 1504 if (rxdr->count <= txdr->count)
e4eff729
MC
1505 lc = ((txdr->count / 64) * 2) + 1;
1506 else
1507 lc = ((rxdr->count / 64) * 2) + 1;
1508
1509 k = l = 0;
96838a40
JB
1510 for (j = 0; j <= lc; j++) { /* loop count loop */
1511 for (i = 0; i < 64; i++) { /* send the packets */
1512 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1513 1024);
96838a40 1514 pci_dma_sync_single_for_device(pdev,
e4eff729
MC
1515 txdr->buffer_info[k].dma,
1516 txdr->buffer_info[k].length,
1517 PCI_DMA_TODEVICE);
96838a40 1518 if (unlikely(++k == txdr->count)) k = 0;
e4eff729
MC
1519 }
1520 E1000_WRITE_REG(&adapter->hw, TDT, k);
f8ec4733 1521 msleep(200);
e4eff729
MC
1522 time = jiffies; /* set the start time for the receive */
1523 good_cnt = 0;
1524 do { /* receive the sent packets */
96838a40 1525 pci_dma_sync_single_for_cpu(pdev,
e4eff729
MC
1526 rxdr->buffer_info[l].dma,
1527 rxdr->buffer_info[l].length,
1528 PCI_DMA_FROMDEVICE);
96838a40 1529
e4eff729
MC
1530 ret_val = e1000_check_lbtest_frame(
1531 rxdr->buffer_info[l].skb,
1532 1024);
96838a40 1533 if (!ret_val)
e4eff729 1534 good_cnt++;
96838a40
JB
1535 if (unlikely(++l == rxdr->count)) l = 0;
1536 /* time + 20 msecs (200 msecs on 2.4) is more than
1537 * enough time to complete the receives, if it's
e4eff729
MC
1538 * exceeded, break and error off
1539 */
1540 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1541 if (good_cnt != 64) {
e4eff729 1542 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1543 break;
e4eff729 1544 }
96838a40 1545 if (jiffies >= (time + 2)) {
e4eff729
MC
1546 ret_val = 14; /* error code for time out error */
1547 break;
1548 }
1549 } /* end loop count loop */
1da177e4
LT
1550 return ret_val;
1551}
1552
1553static int
1554e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1555{
57128197
JK
1556 /* PHY loopback cannot be performed if SoL/IDER
1557 * sessions are active */
1558 if (e1000_check_phy_reset_block(&adapter->hw)) {
1559 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1560 "when SoL/IDER is active.\n");
1561 *data = 0;
1562 goto out;
1563 }
1564
1565 if ((*data = e1000_setup_desc_rings(adapter)))
1566 goto out;
1567 if ((*data = e1000_setup_loopback_test(adapter)))
1568 goto err_loopback;
1da177e4
LT
1569 *data = e1000_run_loopback_test(adapter);
1570 e1000_loopback_cleanup(adapter);
57128197 1571
1da177e4 1572err_loopback:
57128197
JK
1573 e1000_free_desc_rings(adapter);
1574out:
1da177e4
LT
1575 return *data;
1576}
1577
1578static int
1579e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1580{
1581 *data = 0;
1da177e4
LT
1582 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1583 int i = 0;
1584 adapter->hw.serdes_link_down = TRUE;
1585
2648345f
MC
1586 /* On some blade server designs, link establishment
1587 * could take as long as 2-3 minutes */
1da177e4
LT
1588 do {
1589 e1000_check_for_link(&adapter->hw);
1590 if (adapter->hw.serdes_link_down == FALSE)
1591 return *data;
f8ec4733 1592 msleep(20);
1da177e4
LT
1593 } while (i++ < 3750);
1594
2648345f 1595 *data = 1;
1da177e4
LT
1596 } else {
1597 e1000_check_for_link(&adapter->hw);
96838a40 1598 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
f8ec4733 1599 msleep(4000);
1da177e4 1600
96838a40 1601 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1da177e4
LT
1602 *data = 1;
1603 }
1604 }
1605 return *data;
1606}
1607
96838a40 1608static int
1da177e4
LT
1609e1000_diag_test_count(struct net_device *netdev)
1610{
1611 return E1000_TEST_LEN;
1612}
1613
d658266e
JB
1614extern void e1000_power_up_phy(struct e1000_adapter *);
1615
1da177e4
LT
1616static void
1617e1000_diag_test(struct net_device *netdev,
1618 struct ethtool_test *eth_test, uint64_t *data)
1619{
60490fe0 1620 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1621 boolean_t if_running = netif_running(netdev);
1622
1314bbf3 1623 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1624 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT
1625 /* Offline tests */
1626
1627 /* save speed, duplex, autoneg settings */
1628 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1629 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1630 uint8_t autoneg = adapter->hw.autoneg;
1631
d658266e
JB
1632 DPRINTK(HW, INFO, "offline testing starting\n");
1633
1da177e4
LT
1634 /* Link test performed before hardware reset so autoneg doesn't
1635 * interfere with test result */
96838a40 1636 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1637 eth_test->flags |= ETH_TEST_FL_FAILED;
1638
96838a40 1639 if (if_running)
2db10a08
AK
1640 /* indicate we're in test mode */
1641 dev_close(netdev);
1da177e4
LT
1642 else
1643 e1000_reset(adapter);
1644
96838a40 1645 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT
1646 eth_test->flags |= ETH_TEST_FL_FAILED;
1647
1648 e1000_reset(adapter);
96838a40 1649 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT
1650 eth_test->flags |= ETH_TEST_FL_FAILED;
1651
1652 e1000_reset(adapter);
96838a40 1653 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT
1654 eth_test->flags |= ETH_TEST_FL_FAILED;
1655
1656 e1000_reset(adapter);
d658266e
JB
1657 /* make sure the phy is powered up */
1658 e1000_power_up_phy(adapter);
96838a40 1659 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT
1660 eth_test->flags |= ETH_TEST_FL_FAILED;
1661
1662 /* restore speed, duplex, autoneg settings */
1663 adapter->hw.autoneg_advertised = autoneg_advertised;
1664 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1665 adapter->hw.autoneg = autoneg;
1666
1667 e1000_reset(adapter);
1314bbf3 1668 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1669 if (if_running)
2db10a08 1670 dev_open(netdev);
1da177e4 1671 } else {
d658266e 1672 DPRINTK(HW, INFO, "online testing starting\n");
1da177e4 1673 /* Online tests */
96838a40 1674 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1675 eth_test->flags |= ETH_TEST_FL_FAILED;
1676
1677 /* Offline tests aren't run; pass by default */
1678 data[0] = 0;
1679 data[1] = 0;
1680 data[2] = 0;
1681 data[3] = 0;
2db10a08 1682
1314bbf3 1683 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1684 }
352c9f85 1685 msleep_interruptible(4 * 1000);
1da177e4
LT
1686}
1687
120cd576 1688static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1da177e4 1689{
1da177e4 1690 struct e1000_hw *hw = &adapter->hw;
120cd576 1691 int retval = 1; /* fail by default */
1da177e4 1692
120cd576 1693 switch (hw->device_id) {
dc1f71f6 1694 case E1000_DEV_ID_82542:
1da177e4
LT
1695 case E1000_DEV_ID_82543GC_FIBER:
1696 case E1000_DEV_ID_82543GC_COPPER:
1697 case E1000_DEV_ID_82544EI_FIBER:
1698 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1699 case E1000_DEV_ID_82545EM_FIBER:
1700 case E1000_DEV_ID_82545EM_COPPER:
84916829 1701 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB
1702 case E1000_DEV_ID_82546GB_PCIE:
1703 /* these don't support WoL at all */
1da177e4 1704 wol->supported = 0;
120cd576 1705 break;
1da177e4
LT
1706 case E1000_DEV_ID_82546EB_FIBER:
1707 case E1000_DEV_ID_82546GB_FIBER:
b7ee49db 1708 case E1000_DEV_ID_82571EB_FIBER:
120cd576
JB
1709 case E1000_DEV_ID_82571EB_SERDES:
1710 case E1000_DEV_ID_82571EB_COPPER:
1711 /* Wake events not supported on port B */
96838a40 1712 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1713 wol->supported = 0;
120cd576 1714 break;
1da177e4 1715 }
120cd576
JB
1716 /* return success for non excluded adapter ports */
1717 retval = 0;
1718 break;
5881cde8 1719 case E1000_DEV_ID_82571EB_QUAD_COPPER:
120cd576
JB
1720 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1721 /* quad port adapters only support WoL on port A */
1722 if (!adapter->quad_port_a) {
1723 wol->supported = 0;
1724 break;
1725 }
1726 /* return success for non excluded adapter ports */
1727 retval = 0;
1728 break;
1da177e4 1729 default:
120cd576
JB
1730 /* dual port cards only support WoL on port A from now on
1731 * unless it was enabled in the eeprom for port B
1732 * so exclude FUNC_1 ports from having WoL enabled */
1733 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1734 !adapter->eeprom_wol) {
1735 wol->supported = 0;
1736 break;
1737 }
84916829 1738
120cd576
JB
1739 retval = 0;
1740 }
1741
1742 return retval;
1743}
1744
1745static void
1746e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1747{
1748 struct e1000_adapter *adapter = netdev_priv(netdev);
1749
1750 wol->supported = WAKE_UCAST | WAKE_MCAST |
1751 WAKE_BCAST | WAKE_MAGIC;
1752 wol->wolopts = 0;
1753
1754 /* this function will set ->supported = 0 and return 1 if wol is not
1755 * supported by this hardware */
1756 if (e1000_wol_exclusion(adapter, wol))
1da177e4 1757 return;
120cd576
JB
1758
1759 /* apply any specific unsupported masks here */
1760 switch (adapter->hw.device_id) {
1761 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1762 /* KSP3 does not suppport UCAST wake-ups */
1763 wol->supported &= ~WAKE_UCAST;
1764
1765 if (adapter->wol & E1000_WUFC_EX)
1766 DPRINTK(DRV, ERR, "Interface does not support "
1767 "directed (unicast) frame wake-up packets\n");
1768 break;
1769 default:
1770 break;
1da177e4 1771 }
120cd576
JB
1772
1773 if (adapter->wol & E1000_WUFC_EX)
1774 wol->wolopts |= WAKE_UCAST;
1775 if (adapter->wol & E1000_WUFC_MC)
1776 wol->wolopts |= WAKE_MCAST;
1777 if (adapter->wol & E1000_WUFC_BC)
1778 wol->wolopts |= WAKE_BCAST;
1779 if (adapter->wol & E1000_WUFC_MAG)
1780 wol->wolopts |= WAKE_MAGIC;
1781
1782 return;
1da177e4
LT
1783}
1784
1785static int
1786e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1787{
60490fe0 1788 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1789 struct e1000_hw *hw = &adapter->hw;
1790
120cd576
JB
1791 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1792 return -EOPNOTSUPP;
1793
1794 if (e1000_wol_exclusion(adapter, wol))
1da177e4
LT
1795 return wol->wolopts ? -EOPNOTSUPP : 0;
1796
120cd576 1797 switch (hw->device_id) {
84916829 1798 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829
JK
1799 if (wol->wolopts & WAKE_UCAST) {
1800 DPRINTK(DRV, ERR, "Interface does not support "
1801 "directed (unicast) frame wake-up packets\n");
1802 return -EOPNOTSUPP;
1803 }
120cd576 1804 break;
1da177e4 1805 default:
120cd576 1806 break;
1da177e4
LT
1807 }
1808
120cd576
JB
1809 /* these settings will always override what we currently have */
1810 adapter->wol = 0;
1811
1812 if (wol->wolopts & WAKE_UCAST)
1813 adapter->wol |= E1000_WUFC_EX;
1814 if (wol->wolopts & WAKE_MCAST)
1815 adapter->wol |= E1000_WUFC_MC;
1816 if (wol->wolopts & WAKE_BCAST)
1817 adapter->wol |= E1000_WUFC_BC;
1818 if (wol->wolopts & WAKE_MAGIC)
1819 adapter->wol |= E1000_WUFC_MAG;
1820
1da177e4
LT
1821 return 0;
1822}
1823
1824/* toggle LED 4 times per second = 2 "blinks" per second */
1825#define E1000_ID_INTERVAL (HZ/4)
1826
1827/* bit defines for adapter->led_status */
1828#define E1000_LED_ON 0
1829
1830static void
1831e1000_led_blink_callback(unsigned long data)
1832{
1833 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1834
96838a40 1835 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1da177e4
LT
1836 e1000_led_off(&adapter->hw);
1837 else
1838 e1000_led_on(&adapter->hw);
1839
1840 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1841}
1842
1843static int
1844e1000_phys_id(struct net_device *netdev, uint32_t data)
1845{
60490fe0 1846 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1847
96838a40 1848 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1da177e4
LT
1849 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1850
96838a40
JB
1851 if (adapter->hw.mac_type < e1000_82571) {
1852 if (!adapter->blink_timer.function) {
d439d4b7
MC
1853 init_timer(&adapter->blink_timer);
1854 adapter->blink_timer.function = e1000_led_blink_callback;
1855 adapter->blink_timer.data = (unsigned long) adapter;
1856 }
1857 e1000_setup_led(&adapter->hw);
1858 mod_timer(&adapter->blink_timer, jiffies);
1859 msleep_interruptible(data * 1000);
1860 del_timer_sync(&adapter->blink_timer);
cd94dd0b
AK
1861 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1862 if (!adapter->blink_timer.function) {
1863 init_timer(&adapter->blink_timer);
1864 adapter->blink_timer.function = e1000_led_blink_callback;
1865 adapter->blink_timer.data = (unsigned long) adapter;
1866 }
1867 mod_timer(&adapter->blink_timer, jiffies);
d8c2bd3d 1868 msleep_interruptible(data * 1000);
cd94dd0b
AK
1869 del_timer_sync(&adapter->blink_timer);
1870 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
d8c2bd3d 1871 } else {
f1b3a853 1872 e1000_blink_led_start(&adapter->hw);
d439d4b7 1873 msleep_interruptible(data * 1000);
1da177e4
LT
1874 }
1875
1da177e4
LT
1876 e1000_led_off(&adapter->hw);
1877 clear_bit(E1000_LED_ON, &adapter->led_status);
1878 e1000_cleanup_led(&adapter->hw);
1879
1880 return 0;
1881}
1882
1883static int
1884e1000_nway_reset(struct net_device *netdev)
1885{
60490fe0 1886 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK
1887 if (netif_running(netdev))
1888 e1000_reinit_locked(adapter);
1da177e4
LT
1889 return 0;
1890}
1891
96838a40 1892static int
1da177e4
LT
1893e1000_get_stats_count(struct net_device *netdev)
1894{
1895 return E1000_STATS_LEN;
1896}
1897
96838a40
JB
1898static void
1899e1000_get_ethtool_stats(struct net_device *netdev,
1da177e4
LT
1900 struct ethtool_stats *stats, uint64_t *data)
1901{
60490fe0 1902 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1903 int i;
1904
1905 e1000_update_stats(adapter);
7bfa4816
JK
1906 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1907 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1908 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1da177e4
LT
1909 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1910 }
7bfa4816 1911/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT
1912}
1913
96838a40 1914static void
1da177e4
LT
1915e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1916{
7bfa4816 1917 uint8_t *p = data;
1da177e4
LT
1918 int i;
1919
96838a40 1920 switch (stringset) {
1da177e4 1921 case ETH_SS_TEST:
96838a40 1922 memcpy(data, *e1000_gstrings_test,
1da177e4
LT
1923 E1000_TEST_LEN*ETH_GSTRING_LEN);
1924 break;
1925 case ETH_SS_STATS:
7bfa4816
JK
1926 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1927 memcpy(p, e1000_gstrings_stats[i].stat_string,
1928 ETH_GSTRING_LEN);
1929 p += ETH_GSTRING_LEN;
1930 }
7bfa4816 1931/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT
1932 break;
1933 }
1934}
1935
7282d491 1936static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT
1937 .get_settings = e1000_get_settings,
1938 .set_settings = e1000_set_settings,
1939 .get_drvinfo = e1000_get_drvinfo,
1940 .get_regs_len = e1000_get_regs_len,
1941 .get_regs = e1000_get_regs,
1942 .get_wol = e1000_get_wol,
1943 .set_wol = e1000_set_wol,
8fc897b0
AK
1944 .get_msglevel = e1000_get_msglevel,
1945 .set_msglevel = e1000_set_msglevel,
1da177e4
LT
1946 .nway_reset = e1000_nway_reset,
1947 .get_link = ethtool_op_get_link,
1948 .get_eeprom_len = e1000_get_eeprom_len,
1949 .get_eeprom = e1000_get_eeprom,
1950 .set_eeprom = e1000_set_eeprom,
1951 .get_ringparam = e1000_get_ringparam,
1952 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK
1953 .get_pauseparam = e1000_get_pauseparam,
1954 .set_pauseparam = e1000_set_pauseparam,
1955 .get_rx_csum = e1000_get_rx_csum,
1956 .set_rx_csum = e1000_set_rx_csum,
1957 .get_tx_csum = e1000_get_tx_csum,
1958 .set_tx_csum = e1000_set_tx_csum,
1959 .get_sg = ethtool_op_get_sg,
1960 .set_sg = ethtool_op_set_sg,
1da177e4 1961#ifdef NETIF_F_TSO
8fc897b0
AK
1962 .get_tso = ethtool_op_get_tso,
1963 .set_tso = e1000_set_tso,
1da177e4
LT
1964#endif
1965 .self_test_count = e1000_diag_test_count,
1966 .self_test = e1000_diag_test,
1967 .get_strings = e1000_get_strings,
1968 .phys_id = e1000_phys_id,
1969 .get_stats_count = e1000_get_stats_count,
1970 .get_ethtool_stats = e1000_get_ethtool_stats,
8fc897b0 1971 .get_perm_addr = ethtool_op_get_perm_addr,
1da177e4
LT
1972};
1973
1974void e1000_set_ethtool_ops(struct net_device *netdev)
1975{
1976 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1977}
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