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Merge branch 'for-2.6.35' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1532ecea 34#define DRV_VERSION "7.3.21-k5-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
a3aa1884 45static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT		 46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4 127static void e1000_82547_tx_fifo_stall(unsigned long data);
3b29a56d
SH		 128static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
129 struct net_device *netdev);
1da177e4
LT		 130static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
131static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
132static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 133static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
edbbb3ca
JB		 140static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int *work_done, int work_to_do);
581d708e 143static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 144 struct e1000_rx_ring *rx_ring,
72d64a43 145 int cleaned_count);
edbbb3ca
JB		 146static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int cleaned_count);
1da177e4
LT		 149static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
150static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
151 int cmd);
1da177e4
LT		 152static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
153static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
154static void e1000_tx_timeout(struct net_device *dev);
65f27f38 155static void e1000_reset_task(struct work_struct *work);
1da177e4 156static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 157static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
158 struct sk_buff *skb);
1da177e4
LT		 159
160static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 161static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
162static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 163static void e1000_restore_vlan(struct e1000_adapter *adapter);
164
6fdfef16 165#ifdef CONFIG_PM
b43fcd7d 166static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 167static int e1000_resume(struct pci_dev *pdev);
168#endif
c653e635 169static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 170
171#ifdef CONFIG_NET_POLL_CONTROLLER
172/* for netdump / net console */
173static void e1000_netpoll (struct net_device *netdev);
174#endif
175
1f753861
JB		 176#define COPYBREAK_DEFAULT 256
177static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
178module_param(copybreak, uint, 0644);
179MODULE_PARM_DESC(copybreak,
180 "Maximum size of packet that is copied to a new buffer on receive");
181
9026729b
AK		 182static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
183 pci_channel_state_t state);
184static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
185static void e1000_io_resume(struct pci_dev *pdev);
186
187static struct pci_error_handlers e1000_err_handler = {
188 .error_detected = e1000_io_error_detected,
189 .slot_reset = e1000_io_slot_reset,
190 .resume = e1000_io_resume,
191};
24025e4e 192
1da177e4
LT		 193static struct pci_driver e1000_driver = {
194 .name = e1000_driver_name,
195 .id_table = e1000_pci_tbl,
196 .probe = e1000_probe,
197 .remove = __devexit_p(e1000_remove),
c4e24f01 198#ifdef CONFIG_PM
1da177e4 199 /* Power Managment Hooks */
1da177e4 200 .suspend = e1000_suspend,
c653e635 201 .resume = e1000_resume,
1da177e4 202#endif
9026729b
AK		 203 .shutdown = e1000_shutdown,
204 .err_handler = &e1000_err_handler
1da177e4
LT		 205};
206
207MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
208MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
209MODULE_LICENSE("GPL");
210MODULE_VERSION(DRV_VERSION);
211
212static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
213module_param(debug, int, 0);
214MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
215
216/**
217 * e1000_init_module - Driver Registration Routine
218 *
219 * e1000_init_module is the first routine called when the driver is
220 * loaded. All it does is register with the PCI subsystem.
221 **/
222
64798845 223static int __init e1000_init_module(void)
1da177e4
LT		 224{
225 int ret;
226 printk(KERN_INFO "%s - version %s\n",
227 e1000_driver_string, e1000_driver_version);
228
229 printk(KERN_INFO "%s\n", e1000_copyright);
230
29917620 231 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 232 if (copybreak != COPYBREAK_DEFAULT) {
233 if (copybreak == 0)
234 printk(KERN_INFO "e1000: copybreak disabled\n");
235 else
236 printk(KERN_INFO "e1000: copybreak enabled for "
237 "packets <= %u bytes\n", copybreak);
238 }
1da177e4
LT		 239 return ret;
240}
241
242module_init(e1000_init_module);
243
244/**
245 * e1000_exit_module - Driver Exit Cleanup Routine
246 *
247 * e1000_exit_module is called just before the driver is removed
248 * from memory.
249 **/
250
64798845 251static void __exit e1000_exit_module(void)
1da177e4 252{
1da177e4
LT		 253 pci_unregister_driver(&e1000_driver);
254}
255
256module_exit(e1000_exit_module);
257
2db10a08
AK		 258static int e1000_request_irq(struct e1000_adapter *adapter)
259{
260 struct net_device *netdev = adapter->netdev;
3e18826c 261 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 262 int irq_flags = IRQF_SHARED;
263 int err;
2db10a08 264
e94bd23f
AK		 265 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
266 netdev);
267 if (err) {
2db10a08
AK		 268 DPRINTK(PROBE, ERR,
269 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 270 }
2db10a08
AK		 271
272 return err;
273}
274
275static void e1000_free_irq(struct e1000_adapter *adapter)
276{
277 struct net_device *netdev = adapter->netdev;
278
279 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 280}
281
1da177e4
LT		 282/**
283 * e1000_irq_disable - Mask off interrupt generation on the NIC
284 * @adapter: board private structure
285 **/
286
64798845 287static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 288{
1dc32918
JP		 289 struct e1000_hw *hw = &adapter->hw;
290
291 ew32(IMC, ~0);
292 E1000_WRITE_FLUSH();
1da177e4
LT		 293 synchronize_irq(adapter->pdev->irq);
294}
295
296/**
297 * e1000_irq_enable - Enable default interrupt generation settings
298 * @adapter: board private structure
299 **/
300
64798845 301static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 302{
1dc32918
JP		 303 struct e1000_hw *hw = &adapter->hw;
304
305 ew32(IMS, IMS_ENABLE_MASK);
306 E1000_WRITE_FLUSH();
1da177e4 307}
3ad2cc67 308
64798845 309static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 310{
1dc32918 311 struct e1000_hw *hw = &adapter->hw;
2d7edb92 312 struct net_device *netdev = adapter->netdev;
1dc32918 313 u16 vid = hw->mng_cookie.vlan_id;
406874a7 314 u16 old_vid = adapter->mng_vlan_id;
96838a40 315 if (adapter->vlgrp) {
5c15bdec 316 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 317 if (hw->mng_cookie.status &
2d7edb92
MC		 318 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
319 e1000_vlan_rx_add_vid(netdev, vid);
320 adapter->mng_vlan_id = vid;
321 } else
322 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 323
406874a7 324 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 325 (vid != old_vid) &&
5c15bdec 326 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 327 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 328 } else
329 adapter->mng_vlan_id = vid;
2d7edb92
MC		 330 }
331}
b55ccb35 332
64798845 333static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 334{
1dc32918
JP		 335 struct e1000_hw *hw = &adapter->hw;
336
0fccd0e9 337 if (adapter->en_mng_pt) {
1dc32918 338 u32 manc = er32(MANC);
0fccd0e9
JG		 339
340 /* disable hardware interception of ARP */
341 manc &= ~(E1000_MANC_ARP_EN);
342
1dc32918 343 ew32(MANC, manc);
0fccd0e9
JG		 344 }
345}
346
64798845 347static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 348{
1dc32918
JP		 349 struct e1000_hw *hw = &adapter->hw;
350
0fccd0e9 351 if (adapter->en_mng_pt) {
1dc32918 352 u32 manc = er32(MANC);
0fccd0e9
JG		 353
354 /* re-enable hardware interception of ARP */
355 manc |= E1000_MANC_ARP_EN;
356
1dc32918 357 ew32(MANC, manc);
0fccd0e9
JG		 358 }
359}
360
e0aac5a2
AK		 361/**
362 * e1000_configure - configure the hardware for RX and TX
363 * @adapter = private board structure
364 **/
365static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 366{
367 struct net_device *netdev = adapter->netdev;
2db10a08 368 int i;
1da177e4 369
db0ce50d 370 e1000_set_rx_mode(netdev);
1da177e4
LT		 371
372 e1000_restore_vlan(adapter);
0fccd0e9 373 e1000_init_manageability(adapter);
1da177e4
LT		 374
375 e1000_configure_tx(adapter);
376 e1000_setup_rctl(adapter);
377 e1000_configure_rx(adapter);
72d64a43
JK		 378 /* call E1000_DESC_UNUSED which always leaves
379 * at least 1 descriptor unused to make sure
380 * next_to_use != next_to_clean */
f56799ea 381 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 382 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 383 adapter->alloc_rx_buf(adapter, ring,
384 E1000_DESC_UNUSED(ring));
f56799ea 385 }
e0aac5a2
AK		 386}
387
388int e1000_up(struct e1000_adapter *adapter)
389{
1dc32918
JP		 390 struct e1000_hw *hw = &adapter->hw;
391
e0aac5a2
AK		 392 /* hardware has been reset, we need to reload some things */
393 e1000_configure(adapter);
394
395 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 396
bea3348e 397 napi_enable(&adapter->napi);
c3570acb 398
5de55624
MC		 399 e1000_irq_enable(adapter);
400
4cb9be7a
JB		 401 netif_wake_queue(adapter->netdev);
402
79f3d399 403 /* fire a link change interrupt to start the watchdog */
1dc32918 404 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 405 return 0;
406}
407
79f05bf0
AK		 408/**
409 * e1000_power_up_phy - restore link in case the phy was powered down
410 * @adapter: address of board private structure
411 *
412 * The phy may be powered down to save power and turn off link when the
413 * driver is unloaded and wake on lan is not enabled (among others)
414 * *** this routine MUST be followed by a call to e1000_reset ***
415 *
416 **/
417
d658266e 418void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 419{
1dc32918 420 struct e1000_hw *hw = &adapter->hw;
406874a7 421 u16 mii_reg = 0;
79f05bf0
AK		 422
423 /* Just clear the power down bit to wake the phy back up */
1dc32918 424 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 425 /* according to the manual, the phy will retain its
426 * settings across a power-down/up cycle */
1dc32918 427 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 428 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 429 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 430 }
431}
432
433static void e1000_power_down_phy(struct e1000_adapter *adapter)
434{
1dc32918
JP		 435 struct e1000_hw *hw = &adapter->hw;
436
61c2505f 437 /* Power down the PHY so no link is implied when interface is down *
c3033b01 438 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 439 * (a) WoL is enabled
440 * (b) AMT is active
441 * (c) SoL/IDER session is active */
1dc32918
JP		 442 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
443 hw->media_type == e1000_media_type_copper) {
406874a7 444 u16 mii_reg = 0;
61c2505f 445
1dc32918 446 switch (hw->mac_type) {
61c2505f
BA		 447 case e1000_82540:
448 case e1000_82545:
449 case e1000_82545_rev_3:
450 case e1000_82546:
451 case e1000_82546_rev_3:
452 case e1000_82541:
453 case e1000_82541_rev_2:
454 case e1000_82547:
455 case e1000_82547_rev_2:
1dc32918 456 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 457 goto out;
458 break;
61c2505f
BA		 459 default:
460 goto out;
461 }
1dc32918 462 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 463 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 464 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 465 mdelay(1);
466 }
61c2505f
BA		 467out:
468 return;
79f05bf0
AK		 469}
470
64798845 471void e1000_down(struct e1000_adapter *adapter)
1da177e4 472{
a6c42322 473 struct e1000_hw *hw = &adapter->hw;
1da177e4 474 struct net_device *netdev = adapter->netdev;
a6c42322 475 u32 rctl, tctl;
1da177e4 476
1314bbf3
AK		 477 /* signal that we're down so the interrupt handler does not
478 * reschedule our watchdog timer */
479 set_bit(__E1000_DOWN, &adapter->flags);
480
a6c42322
JB		 481 /* disable receives in the hardware */
482 rctl = er32(RCTL);
483 ew32(RCTL, rctl & ~E1000_RCTL_EN);
484 /* flush and sleep below */
485
51851073 486 netif_tx_disable(netdev);
a6c42322
JB		 487
488 /* disable transmits in the hardware */
489 tctl = er32(TCTL);
490 tctl &= ~E1000_TCTL_EN;
491 ew32(TCTL, tctl);
492 /* flush both disables and wait for them to finish */
493 E1000_WRITE_FLUSH();
494 msleep(10);
495
bea3348e 496 napi_disable(&adapter->napi);
c3570acb 497
1da177e4 498 e1000_irq_disable(adapter);
c1605eb3 499
1da177e4
LT		 500 del_timer_sync(&adapter->tx_fifo_stall_timer);
501 del_timer_sync(&adapter->watchdog_timer);
502 del_timer_sync(&adapter->phy_info_timer);
503
1da177e4
LT		 504 adapter->link_speed = 0;
505 adapter->link_duplex = 0;
506 netif_carrier_off(netdev);
1da177e4
LT		 507
508 e1000_reset(adapter);
581d708e
MC		 509 e1000_clean_all_tx_rings(adapter);
510 e1000_clean_all_rx_rings(adapter);
1da177e4 511}
1da177e4 512
64798845 513void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 514{
515 WARN_ON(in_interrupt());
516 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
517 msleep(1);
518 e1000_down(adapter);
519 e1000_up(adapter);
520 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 521}
522
64798845 523void e1000_reset(struct e1000_adapter *adapter)
1da177e4 524{
1dc32918 525 struct e1000_hw *hw = &adapter->hw;
406874a7 526 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 527 bool legacy_pba_adjust = false;
b7cb8c2c 528 u16 hwm;
1da177e4
LT		 529
530 /* Repartition Pba for greater than 9k mtu
531 * To take effect CTRL.RST is required.
532 */
533
1dc32918 534 switch (hw->mac_type) {
018ea44e
BA		 535 case e1000_82542_rev2_0:
536 case e1000_82542_rev2_1:
537 case e1000_82543:
538 case e1000_82544:
539 case e1000_82540:
540 case e1000_82541:
541 case e1000_82541_rev_2:
c3033b01 542 legacy_pba_adjust = true;
018ea44e
BA		 543 pba = E1000_PBA_48K;
544 break;
545 case e1000_82545:
546 case e1000_82545_rev_3:
547 case e1000_82546:
548 case e1000_82546_rev_3:
549 pba = E1000_PBA_48K;
550 break;
2d7edb92 551 case e1000_82547:
0e6ef3e0 552 case e1000_82547_rev_2:
c3033b01 553 legacy_pba_adjust = true;
2d7edb92
MC		 554 pba = E1000_PBA_30K;
555 break;
018ea44e
BA		 556 case e1000_undefined:
557 case e1000_num_macs:
2d7edb92
MC		 558 break;
559 }
560
c3033b01 561 if (legacy_pba_adjust) {
b7cb8c2c 562 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 563 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 564
1dc32918 565 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 566 adapter->tx_fifo_head = 0;
567 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
568 adapter->tx_fifo_size =
569 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
570 atomic_set(&adapter->tx_fifo_stall, 0);
571 }
b7cb8c2c 572 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 573 /* adjust PBA for jumbo frames */
1dc32918 574 ew32(PBA, pba);
018ea44e
BA		 575
576 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 577 * large enough to accommodate two full transmit packets,
018ea44e 578 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 579 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA		 580 * one full receive packet and is similarly rounded up and
581 * expressed in KB. */
1dc32918 582 pba = er32(PBA);
018ea44e
BA		 583 /* upper 16 bits has Tx packet buffer allocation size in KB */
584 tx_space = pba >> 16;
585 /* lower 16 bits has Rx packet buffer allocation size in KB */
586 pba &= 0xffff;
b7cb8c2c
JB		 587 /*
588 * the tx fifo also stores 16 bytes of information about the tx
589 * but don't include ethernet FCS because hardware appends it
590 */
591 min_tx_space = (hw->max_frame_size +
592 sizeof(struct e1000_tx_desc) -
593 ETH_FCS_LEN) * 2;
9099cfb9 594 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 595 min_tx_space >>= 10;
b7cb8c2c
JB		 596 /* software strips receive CRC, so leave room for it */
597 min_rx_space = hw->max_frame_size;
9099cfb9 598 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 599 min_rx_space >>= 10;
600
601 /* If current Tx allocation is less than the min Tx FIFO size,
602 * and the min Tx FIFO size is less than the current Rx FIFO
603 * allocation, take space away from current Rx allocation */
604 if (tx_space < min_tx_space &&
605 ((min_tx_space - tx_space) < pba)) {
606 pba = pba - (min_tx_space - tx_space);
607
608 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 609 switch (hw->mac_type) {
018ea44e
BA		 610 case e1000_82545 ... e1000_82546_rev_3:
611 pba &= ~(E1000_PBA_8K - 1);
612 break;
613 default:
614 break;
615 }
616
617 /* if short on rx space, rx wins and must trump tx
618 * adjustment or use Early Receive if available */
1532ecea
JB		 619 if (pba < min_rx_space)
620 pba = min_rx_space;
018ea44e 621 }
1da177e4 622 }
2d7edb92 623
1dc32918 624 ew32(PBA, pba);
1da177e4 625
b7cb8c2c
JB		 626 /*
627 * flow control settings:
628 * The high water mark must be low enough to fit one full frame
629 * (or the size used for early receive) above it in the Rx FIFO.
630 * Set it to the lower of:
631 * - 90% of the Rx FIFO size, and
632 * - the full Rx FIFO size minus the early receive size (for parts
633 * with ERT support assuming ERT set to E1000_ERT_2048), or
634 * - the full Rx FIFO size minus one full frame
635 */
636 hwm = min(((pba << 10) * 9 / 10),
637 ((pba << 10) - hw->max_frame_size));
638
639 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
640 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 641 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 642 hw->fc_send_xon = 1;
643 hw->fc = hw->original_fc;
1da177e4 644
2d7edb92 645 /* Allow time for pending master requests to run */
1dc32918
JP		 646 e1000_reset_hw(hw);
647 if (hw->mac_type >= e1000_82544)
648 ew32(WUC, 0);
09ae3e88 649
1dc32918 650 if (e1000_init_hw(hw))
1da177e4 651 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 652 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 653
654 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 655 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 656 hw->autoneg == 1 &&
657 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
658 u32 ctrl = er32(CTRL);
3d5460a0
JB		 659 /* clear phy power management bit if we are in gig only mode,
660 * which if enabled will attempt negotiation to 100Mb, which
661 * can cause a loss of link at power off or driver unload */
662 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 663 ew32(CTRL, ctrl);
3d5460a0
JB		 664 }
665
1da177e4 666 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 667 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 668
1dc32918
JP		 669 e1000_reset_adaptive(hw);
670 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 671
0fccd0e9 672 e1000_release_manageability(adapter);
1da177e4
LT		 673}
674
67b3c27c
AK		 675/**
676 * Dump the eeprom for users having checksum issues
677 **/
b4ea895d 678static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 679{
680 struct net_device *netdev = adapter->netdev;
681 struct ethtool_eeprom eeprom;
682 const struct ethtool_ops *ops = netdev->ethtool_ops;
683 u8 *data;
684 int i;
685 u16 csum_old, csum_new = 0;
686
687 eeprom.len = ops->get_eeprom_len(netdev);
688 eeprom.offset = 0;
689
690 data = kmalloc(eeprom.len, GFP_KERNEL);
691 if (!data) {
692 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
693 " data\n");
694 return;
695 }
696
697 ops->get_eeprom(netdev, &eeprom, data);
698
699 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
700 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
701 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
702 csum_new += data[i] + (data[i + 1] << 8);
703 csum_new = EEPROM_SUM - csum_new;
704
705 printk(KERN_ERR "/*********************/\n");
706 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
707 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
708
709 printk(KERN_ERR "Offset Values\n");
710 printk(KERN_ERR "======== ======\n");
711 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
712
713 printk(KERN_ERR "Include this output when contacting your support "
714 "provider.\n");
715 printk(KERN_ERR "This is not a software error! Something bad "
716 "happened to your hardware or\n");
717 printk(KERN_ERR "EEPROM image. Ignoring this "
718 "problem could result in further problems,\n");
719 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
720 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
721 "which is invalid\n");
722 printk(KERN_ERR "and requires you to set the proper MAC "
723 "address manually before continuing\n");
724 printk(KERN_ERR "to enable this network device.\n");
725 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
726 "to your hardware vendor\n");
63cd31f6 727 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 728 printk(KERN_ERR "/*********************/\n");
729
730 kfree(data);
731}
732
81250297
TI		 733/**
734 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
735 * @pdev: PCI device information struct
736 *
737 * Return true if an adapter needs ioport resources
738 **/
739static int e1000_is_need_ioport(struct pci_dev *pdev)
740{
741 switch (pdev->device) {
742 case E1000_DEV_ID_82540EM:
743 case E1000_DEV_ID_82540EM_LOM:
744 case E1000_DEV_ID_82540EP:
745 case E1000_DEV_ID_82540EP_LOM:
746 case E1000_DEV_ID_82540EP_LP:
747 case E1000_DEV_ID_82541EI:
748 case E1000_DEV_ID_82541EI_MOBILE:
749 case E1000_DEV_ID_82541ER:
750 case E1000_DEV_ID_82541ER_LOM:
751 case E1000_DEV_ID_82541GI:
752 case E1000_DEV_ID_82541GI_LF:
753 case E1000_DEV_ID_82541GI_MOBILE:
754 case E1000_DEV_ID_82544EI_COPPER:
755 case E1000_DEV_ID_82544EI_FIBER:
756 case E1000_DEV_ID_82544GC_COPPER:
757 case E1000_DEV_ID_82544GC_LOM:
758 case E1000_DEV_ID_82545EM_COPPER:
759 case E1000_DEV_ID_82545EM_FIBER:
760 case E1000_DEV_ID_82546EB_COPPER:
761 case E1000_DEV_ID_82546EB_FIBER:
762 case E1000_DEV_ID_82546EB_QUAD_COPPER:
763 return true;
764 default:
765 return false;
766 }
767}
768
0e7614bc
SH		 769static const struct net_device_ops e1000_netdev_ops = {
770 .ndo_open = e1000_open,
771 .ndo_stop = e1000_close,
00829823 772 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 773 .ndo_get_stats = e1000_get_stats,
774 .ndo_set_rx_mode = e1000_set_rx_mode,
775 .ndo_set_mac_address = e1000_set_mac,
776 .ndo_tx_timeout = e1000_tx_timeout,
777 .ndo_change_mtu = e1000_change_mtu,
778 .ndo_do_ioctl = e1000_ioctl,
779 .ndo_validate_addr = eth_validate_addr,
780
781 .ndo_vlan_rx_register = e1000_vlan_rx_register,
782 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
783 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
784#ifdef CONFIG_NET_POLL_CONTROLLER
785 .ndo_poll_controller = e1000_netpoll,
786#endif
787};
788
1da177e4
LT		 789/**
790 * e1000_probe - Device Initialization Routine
791 * @pdev: PCI device information struct
792 * @ent: entry in e1000_pci_tbl
793 *
794 * Returns 0 on success, negative on failure
795 *
796 * e1000_probe initializes an adapter identified by a pci_dev structure.
797 * The OS initialization, configuring of the adapter private structure,
798 * and a hardware reset occur.
799 **/
1dc32918
JP		 800static int __devinit e1000_probe(struct pci_dev *pdev,
801 const struct pci_device_id *ent)
1da177e4
LT		 802{
803 struct net_device *netdev;
804 struct e1000_adapter *adapter;
1dc32918 805 struct e1000_hw *hw;
2d7edb92 806
1da177e4 807 static int cards_found = 0;
120cd576 808 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 809 int i, err, pci_using_dac;
406874a7
JP		 810 u16 eeprom_data = 0;
811 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 812 int bars, need_ioport;
0795af57 813
81250297
TI		 814 /* do not allocate ioport bars when not needed */
815 need_ioport = e1000_is_need_ioport(pdev);
816 if (need_ioport) {
817 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
818 err = pci_enable_device(pdev);
819 } else {
820 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 821 err = pci_enable_device_mem(pdev);
81250297 822 }
c7be73bc 823 if (err)
1da177e4
LT		 824 return err;
825
6a35528a
YH		 826 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
827 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1da177e4
LT		 828 pci_using_dac = 1;
829 } else {
284901a9 830 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc 831 if (err) {
284901a9 832 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc
JP		 833 if (err) {
834 E1000_ERR("No usable DMA configuration, "
835 "aborting\n");
836 goto err_dma;
837 }
1da177e4
LT		 838 }
839 pci_using_dac = 0;
840 }
841
81250297 842 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 843 if (err)
6dd62ab0 844 goto err_pci_reg;
1da177e4
LT		 845
846 pci_set_master(pdev);
dbb5aaeb
NN		 847 err = pci_save_state(pdev);
848 if (err)
849 goto err_alloc_etherdev;
1da177e4 850
6dd62ab0 851 err = -ENOMEM;
1da177e4 852 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 853 if (!netdev)
1da177e4 854 goto err_alloc_etherdev;
1da177e4 855
1da177e4
LT		 856 SET_NETDEV_DEV(netdev, &pdev->dev);
857
858 pci_set_drvdata(pdev, netdev);
60490fe0 859 adapter = netdev_priv(netdev);
1da177e4
LT		 860 adapter->netdev = netdev;
861 adapter->pdev = pdev;
1da177e4 862 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 863 adapter->bars = bars;
864 adapter->need_ioport = need_ioport;
1da177e4 865
1dc32918
JP		 866 hw = &adapter->hw;
867 hw->back = adapter;
868
6dd62ab0 869 err = -EIO;
275f165f 870 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 871 if (!hw->hw_addr)
1da177e4 872 goto err_ioremap;
1da177e4 873
81250297
TI		 874 if (adapter->need_ioport) {
875 for (i = BAR_1; i <= BAR_5; i++) {
876 if (pci_resource_len(pdev, i) == 0)
877 continue;
878 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
879 hw->io_base = pci_resource_start(pdev, i);
880 break;
881 }
1da177e4
LT		 882 }
883 }
884
0e7614bc 885 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 886 e1000_set_ethtool_ops(netdev);
1da177e4 887 netdev->watchdog_timeo = 5 * HZ;
bea3348e 888 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 889
0eb5a34c 890 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 891
1da177e4
LT		 892 adapter->bd_number = cards_found;
893
894 /* setup the private structure */
895
c7be73bc
JP		 896 err = e1000_sw_init(adapter);
897 if (err)
1da177e4
LT		 898 goto err_sw_init;
899
6dd62ab0 900 err = -EIO;
2d7edb92 901
1dc32918 902 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 903 netdev->features = NETIF_F_SG |
904 NETIF_F_HW_CSUM |
905 NETIF_F_HW_VLAN_TX |
906 NETIF_F_HW_VLAN_RX |
907 NETIF_F_HW_VLAN_FILTER;
908 }
909
1dc32918
JP		 910 if ((hw->mac_type >= e1000_82544) &&
911 (hw->mac_type != e1000_82547))
1da177e4 912 netdev->features |= NETIF_F_TSO;
2d7edb92 913
96838a40 914 if (pci_using_dac)
1da177e4
LT		 915 netdev->features |= NETIF_F_HIGHDMA;
916
20501a69 917 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM		 918 netdev->vlan_features |= NETIF_F_HW_CSUM;
919 netdev->vlan_features |= NETIF_F_SG;
920
1dc32918 921 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 922
cd94dd0b 923 /* initialize eeprom parameters */
1dc32918 924 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 925 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 926 goto err_eeprom;
cd94dd0b
AK		 927 }
928
96838a40 929 /* before reading the EEPROM, reset the controller to
1da177e4 930 * put the device in a known good starting state */
96838a40 931
1dc32918 932 e1000_reset_hw(hw);
1da177e4
LT		 933
934 /* make sure the EEPROM is good */
1dc32918 935 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 936 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 937 e1000_dump_eeprom(adapter);
938 /*
939 * set MAC address to all zeroes to invalidate and temporary
940 * disable this device for the user. This blocks regular
941 * traffic while still permitting ethtool ioctls from reaching
942 * the hardware as well as allowing the user to run the
943 * interface after manually setting a hw addr using
944 * `ip set address`
945 */
1dc32918 946 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 947 } else {
948 /* copy the MAC address out of the EEPROM */
1dc32918 949 if (e1000_read_mac_addr(hw))
67b3c27c 950 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 951 }
67b3c27c 952 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 953 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
954 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 955
67b3c27c 956 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 957 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 958
1dc32918 959 e1000_get_bus_info(hw);
1da177e4
LT		 960
961 init_timer(&adapter->tx_fifo_stall_timer);
962 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 963 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 964
965 init_timer(&adapter->watchdog_timer);
966 adapter->watchdog_timer.function = &e1000_watchdog;
967 adapter->watchdog_timer.data = (unsigned long) adapter;
968
1da177e4
LT		 969 init_timer(&adapter->phy_info_timer);
970 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 971 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 972
65f27f38 973 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 974
1da177e4
LT		 975 e1000_check_options(adapter);
976
977 /* Initial Wake on LAN setting
978 * If APM wake is enabled in the EEPROM,
979 * enable the ACPI Magic Packet filter
980 */
981
1dc32918 982 switch (hw->mac_type) {
1da177e4
LT		 983 case e1000_82542_rev2_0:
984 case e1000_82542_rev2_1:
985 case e1000_82543:
986 break;
987 case e1000_82544:
1dc32918 988 e1000_read_eeprom(hw,
1da177e4
LT		 989 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
990 eeprom_apme_mask = E1000_EEPROM_82544_APM;
991 break;
992 case e1000_82546:
993 case e1000_82546_rev_3:
1dc32918
JP		 994 if (er32(STATUS) & E1000_STATUS_FUNC_1){
995 e1000_read_eeprom(hw,
1da177e4
LT		 996 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
997 break;
998 }
999 /* Fall Through */
1000 default:
1dc32918 1001 e1000_read_eeprom(hw,
1da177e4
LT		 1002 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1003 break;
1004 }
96838a40 1005 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1006 adapter->eeprom_wol |= E1000_WUFC_MAG;
1007
1008 /* now that we have the eeprom settings, apply the special cases
1009 * where the eeprom may be wrong or the board simply won't support
1010 * wake on lan on a particular port */
1011 switch (pdev->device) {
1012 case E1000_DEV_ID_82546GB_PCIE:
1013 adapter->eeprom_wol = 0;
1014 break;
1015 case E1000_DEV_ID_82546EB_FIBER:
1016 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB		 1017 /* Wake events only supported on port A for dual fiber
1018 * regardless of eeprom setting */
1dc32918 1019 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1020 adapter->eeprom_wol = 0;
1021 break;
1022 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1023 /* if quad port adapter, disable WoL on all but port A */
1024 if (global_quad_port_a != 0)
1025 adapter->eeprom_wol = 0;
1026 else
1027 adapter->quad_port_a = 1;
1028 /* Reset for multiple quad port adapters */
1029 if (++global_quad_port_a == 4)
1030 global_quad_port_a = 0;
1031 break;
1032 }
1033
1034 /* initialize the wol settings based on the eeprom settings */
1035 adapter->wol = adapter->eeprom_wol;
de126489 1036 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1037
fb3d47d4 1038 /* print bus type/speed/width info */
fb3d47d4 1039 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1532ecea
JB		 1040 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1041 ((hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
fb3d47d4
JK		 1042 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1043 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1044 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1532ecea 1045 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : "32-bit"));
fb3d47d4 1046
e174961c 1047 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1048
1da177e4
LT		 1049 /* reset the hardware with the new settings */
1050 e1000_reset(adapter);
1051
416b5d10 1052 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1053 err = register_netdev(netdev);
1054 if (err)
416b5d10 1055 goto err_register;
1314bbf3 1056
eb62efd2
JB		 1057 /* carrier off reporting is important to ethtool even BEFORE open */
1058 netif_carrier_off(netdev);
1059
1da177e4
LT		 1060 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1061
1062 cards_found++;
1063 return 0;
1064
1065err_register:
6dd62ab0 1066err_eeprom:
1532ecea 1067 e1000_phy_hw_reset(hw);
6dd62ab0 1068
1dc32918
JP		 1069 if (hw->flash_address)
1070 iounmap(hw->flash_address);
6dd62ab0
VA		 1071 kfree(adapter->tx_ring);
1072 kfree(adapter->rx_ring);
1da177e4 1073err_sw_init:
1dc32918 1074 iounmap(hw->hw_addr);
1da177e4
LT		 1075err_ioremap:
1076 free_netdev(netdev);
1077err_alloc_etherdev:
81250297 1078 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1079err_pci_reg:
1080err_dma:
1081 pci_disable_device(pdev);
1da177e4
LT		 1082 return err;
1083}
1084
1085/**
1086 * e1000_remove - Device Removal Routine
1087 * @pdev: PCI device information struct
1088 *
1089 * e1000_remove is called by the PCI subsystem to alert the driver
1090 * that it should release a PCI device. The could be caused by a
1091 * Hot-Plug event, or because the driver is going to be removed from
1092 * memory.
1093 **/
1094
64798845 1095static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1096{
1097 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1098 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1099 struct e1000_hw *hw = &adapter->hw;
1da177e4 1100
baa34745
JB		 1101 set_bit(__E1000_DOWN, &adapter->flags);
1102 del_timer_sync(&adapter->tx_fifo_stall_timer);
1103 del_timer_sync(&adapter->watchdog_timer);
1104 del_timer_sync(&adapter->phy_info_timer);
1105
28e53bdd 1106 cancel_work_sync(&adapter->reset_task);
be2b28ed 1107
0fccd0e9 1108 e1000_release_manageability(adapter);
1da177e4 1109
bea3348e
SH		 1110 unregister_netdev(netdev);
1111
1532ecea 1112 e1000_phy_hw_reset(hw);
1da177e4 1113
24025e4e
MC		 1114 kfree(adapter->tx_ring);
1115 kfree(adapter->rx_ring);
24025e4e 1116
1dc32918
JP		 1117 iounmap(hw->hw_addr);
1118 if (hw->flash_address)
1119 iounmap(hw->flash_address);
81250297 1120 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1121
1122 free_netdev(netdev);
1123
1124 pci_disable_device(pdev);
1125}
1126
1127/**
1128 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1129 * @adapter: board private structure to initialize
1130 *
1131 * e1000_sw_init initializes the Adapter private data structure.
1132 * Fields are initialized based on PCI device information and
1133 * OS network device settings (MTU size).
1134 **/
1135
64798845 1136static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1137{
1138 struct e1000_hw *hw = &adapter->hw;
1139 struct net_device *netdev = adapter->netdev;
1140 struct pci_dev *pdev = adapter->pdev;
1141
1142 /* PCI config space info */
1143
1144 hw->vendor_id = pdev->vendor;
1145 hw->device_id = pdev->device;
1146 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1147 hw->subsystem_id = pdev->subsystem_device;
44c10138 1148 hw->revision_id = pdev->revision;
1da177e4
LT		 1149
1150 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1151
eb0f8054 1152 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1153 hw->max_frame_size = netdev->mtu +
1154 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1155 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1156
1157 /* identify the MAC */
1158
96838a40 1159 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1160 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1161 return -EIO;
1162 }
1163
96838a40 1164 switch (hw->mac_type) {
1da177e4
LT		 1165 default:
1166 break;
1167 case e1000_82541:
1168 case e1000_82547:
1169 case e1000_82541_rev_2:
1170 case e1000_82547_rev_2:
1171 hw->phy_init_script = 1;
1172 break;
1173 }
1174
1175 e1000_set_media_type(hw);
1176
c3033b01
JP		 1177 hw->wait_autoneg_complete = false;
1178 hw->tbi_compatibility_en = true;
1179 hw->adaptive_ifs = true;
1da177e4
LT		 1180
1181 /* Copper options */
1182
96838a40 1183 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1184 hw->mdix = AUTO_ALL_MODES;
c3033b01 1185 hw->disable_polarity_correction = false;
1da177e4
LT		 1186 hw->master_slave = E1000_MASTER_SLAVE;
1187 }
1188
f56799ea
JK		 1189 adapter->num_tx_queues = 1;
1190 adapter->num_rx_queues = 1;
581d708e
MC		 1191
1192 if (e1000_alloc_queues(adapter)) {
1193 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1194 return -ENOMEM;
1195 }
1196
47313054 1197 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1198 e1000_irq_disable(adapter);
1199
1da177e4 1200 spin_lock_init(&adapter->stats_lock);
1da177e4 1201
1314bbf3
AK		 1202 set_bit(__E1000_DOWN, &adapter->flags);
1203
1da177e4
LT		 1204 return 0;
1205}
1206
581d708e
MC		 1207/**
1208 * e1000_alloc_queues - Allocate memory for all rings
1209 * @adapter: board private structure to initialize
1210 *
1211 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1212 * number of queues at compile-time.
581d708e
MC		 1213 **/
1214
64798845 1215static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1216{
1c7e5b12
YB		 1217 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1218 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1219 if (!adapter->tx_ring)
1220 return -ENOMEM;
581d708e 1221
1c7e5b12
YB		 1222 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1223 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1224 if (!adapter->rx_ring) {
1225 kfree(adapter->tx_ring);
1226 return -ENOMEM;
1227 }
581d708e 1228
581d708e
MC		 1229 return E1000_SUCCESS;
1230}
1231
1da177e4
LT		 1232/**
1233 * e1000_open - Called when a network interface is made active
1234 * @netdev: network interface device structure
1235 *
1236 * Returns 0 on success, negative value on failure
1237 *
1238 * The open entry point is called when a network interface is made
1239 * active by the system (IFF_UP). At this point all resources needed
1240 * for transmit and receive operations are allocated, the interrupt
1241 * handler is registered with the OS, the watchdog timer is started,
1242 * and the stack is notified that the interface is ready.
1243 **/
1244
64798845 1245static int e1000_open(struct net_device *netdev)
1da177e4 1246{
60490fe0 1247 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1248 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1249 int err;
1250
2db10a08 1251 /* disallow open during test */
1314bbf3 1252 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1253 return -EBUSY;
1254
eb62efd2
JB		 1255 netif_carrier_off(netdev);
1256
1da177e4 1257 /* allocate transmit descriptors */
e0aac5a2
AK		 1258 err = e1000_setup_all_tx_resources(adapter);
1259 if (err)
1da177e4
LT		 1260 goto err_setup_tx;
1261
1262 /* allocate receive descriptors */
e0aac5a2 1263 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1264 if (err)
e0aac5a2 1265 goto err_setup_rx;
b5bf28cd 1266
79f05bf0
AK		 1267 e1000_power_up_phy(adapter);
1268
2d7edb92 1269 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1270 if ((hw->mng_cookie.status &
2d7edb92
MC		 1271 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1272 e1000_update_mng_vlan(adapter);
1273 }
1da177e4 1274
e0aac5a2
AK		 1275 /* before we allocate an interrupt, we must be ready to handle it.
1276 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1277 * as soon as we call pci_request_irq, so we have to setup our
1278 * clean_rx handler before we do so. */
1279 e1000_configure(adapter);
1280
1281 err = e1000_request_irq(adapter);
1282 if (err)
1283 goto err_req_irq;
1284
1285 /* From here on the code is the same as e1000_up() */
1286 clear_bit(__E1000_DOWN, &adapter->flags);
1287
bea3348e 1288 napi_enable(&adapter->napi);
47313054 1289
e0aac5a2
AK		 1290 e1000_irq_enable(adapter);
1291
076152d5
BH		 1292 netif_start_queue(netdev);
1293
e0aac5a2 1294 /* fire a link status change interrupt to start the watchdog */
1dc32918 1295 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1296
1da177e4
LT		 1297 return E1000_SUCCESS;
1298
b5bf28cd 1299err_req_irq:
e0aac5a2 1300 e1000_power_down_phy(adapter);
581d708e 1301 e1000_free_all_rx_resources(adapter);
1da177e4 1302err_setup_rx:
581d708e 1303 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1304err_setup_tx:
1305 e1000_reset(adapter);
1306
1307 return err;
1308}
1309
1310/**
1311 * e1000_close - Disables a network interface
1312 * @netdev: network interface device structure
1313 *
1314 * Returns 0, this is not allowed to fail
1315 *
1316 * The close entry point is called when an interface is de-activated
1317 * by the OS. The hardware is still under the drivers control, but
1318 * needs to be disabled. A global MAC reset is issued to stop the
1319 * hardware, and all transmit and receive resources are freed.
1320 **/
1321
64798845 1322static int e1000_close(struct net_device *netdev)
1da177e4 1323{
60490fe0 1324 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1325 struct e1000_hw *hw = &adapter->hw;
1da177e4 1326
2db10a08 1327 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1328 e1000_down(adapter);
79f05bf0 1329 e1000_power_down_phy(adapter);
2db10a08 1330 e1000_free_irq(adapter);
1da177e4 1331
581d708e
MC		 1332 e1000_free_all_tx_resources(adapter);
1333 e1000_free_all_rx_resources(adapter);
1da177e4 1334
4666560a
BA		 1335 /* kill manageability vlan ID if supported, but not if a vlan with
1336 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1337 if ((hw->mng_cookie.status &
4666560a
BA		 1338 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1339 !(adapter->vlgrp &&
5c15bdec 1340 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1341 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1342 }
b55ccb35 1343
1da177e4
LT		 1344 return 0;
1345}
1346
1347/**
1348 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1349 * @adapter: address of board private structure
2d7edb92
MC		 1350 * @start: address of beginning of memory
1351 * @len: length of memory
1da177e4 1352 **/
64798845
JP		 1353static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1354 unsigned long len)
1da177e4 1355{
1dc32918 1356 struct e1000_hw *hw = &adapter->hw;
e982f17c 1357 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1358 unsigned long end = begin + len;
1359
2648345f
MC		 1360 /* First rev 82545 and 82546 need to not allow any memory
1361 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1362 if (hw->mac_type == e1000_82545 ||
1363 hw->mac_type == e1000_82546) {
c3033b01 1364 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1365 }
1366
c3033b01 1367 return true;
1da177e4
LT		 1368}
1369
1370/**
1371 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1372 * @adapter: board private structure
581d708e 1373 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1374 *
1375 * Return 0 on success, negative on failure
1376 **/
1377
64798845
JP		 1378static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1379 struct e1000_tx_ring *txdr)
1da177e4 1380{
1da177e4
LT		 1381 struct pci_dev *pdev = adapter->pdev;
1382 int size;
1383
1384 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1385 txdr->buffer_info = vmalloc(size);
96838a40 1386 if (!txdr->buffer_info) {
2648345f
MC		 1387 DPRINTK(PROBE, ERR,
1388 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1389 return -ENOMEM;
1390 }
1391 memset(txdr->buffer_info, 0, size);
1392
1393 /* round up to nearest 4K */
1394
1395 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1396 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1397
1398 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1399 if (!txdr->desc) {
1da177e4 1400setup_tx_desc_die:
1da177e4 1401 vfree(txdr->buffer_info);
2648345f
MC		 1402 DPRINTK(PROBE, ERR,
1403 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1404 return -ENOMEM;
1405 }
1406
2648345f 1407 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1408 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1409 void *olddesc = txdr->desc;
1410 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1411 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1412 "at %p\n", txdr->size, txdr->desc);
1413 /* Try again, without freeing the previous */
1da177e4 1414 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1415 /* Failed allocation, critical failure */
96838a40 1416 if (!txdr->desc) {
1da177e4
LT		 1417 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1418 goto setup_tx_desc_die;
1419 }
1420
1421 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1422 /* give up */
2648345f
MC		 1423 pci_free_consistent(pdev, txdr->size, txdr->desc,
1424 txdr->dma);
1da177e4
LT		 1425 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1426 DPRINTK(PROBE, ERR,
2648345f
MC		 1427 "Unable to allocate aligned memory "
1428 "for the transmit descriptor ring\n");
1da177e4
LT		 1429 vfree(txdr->buffer_info);
1430 return -ENOMEM;
1431 } else {
2648345f 1432 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1433 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1434 }
1435 }
1436 memset(txdr->desc, 0, txdr->size);
1437
1438 txdr->next_to_use = 0;
1439 txdr->next_to_clean = 0;
1440
1441 return 0;
1442}
1443
581d708e
MC		 1444/**
1445 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1446 * (Descriptors) for all queues
1447 * @adapter: board private structure
1448 *
581d708e
MC		 1449 * Return 0 on success, negative on failure
1450 **/
1451
64798845 1452int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1453{
1454 int i, err = 0;
1455
f56799ea 1456 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1457 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1458 if (err) {
1459 DPRINTK(PROBE, ERR,
1460 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1461 for (i-- ; i >= 0; i--)
1462 e1000_free_tx_resources(adapter,
1463 &adapter->tx_ring[i]);
581d708e
MC		 1464 break;
1465 }
1466 }
1467
1468 return err;
1469}
1470
1da177e4
LT		 1471/**
1472 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1473 * @adapter: board private structure
1474 *
1475 * Configure the Tx unit of the MAC after a reset.
1476 **/
1477
64798845 1478static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1479{
406874a7 1480 u64 tdba;
581d708e 1481 struct e1000_hw *hw = &adapter->hw;
1532ecea 1482 u32 tdlen, tctl, tipg;
406874a7 1483 u32 ipgr1, ipgr2;
1da177e4
LT		 1484
1485 /* Setup the HW Tx Head and Tail descriptor pointers */
1486
f56799ea 1487 switch (adapter->num_tx_queues) {
24025e4e
MC		 1488 case 1:
1489 default:
581d708e
MC		 1490 tdba = adapter->tx_ring[0].dma;
1491 tdlen = adapter->tx_ring[0].count *
1492 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1493 ew32(TDLEN, tdlen);
1494 ew32(TDBAH, (tdba >> 32));
1495 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1496 ew32(TDT, 0);
1497 ew32(TDH, 0);
6a951698
AK		 1498 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1499 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1500 break;
1501 }
1da177e4
LT		 1502
1503 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1504 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1505 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1506 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1507 else
1508 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1509
581d708e 1510 switch (hw->mac_type) {
1da177e4
LT		 1511 case e1000_82542_rev2_0:
1512 case e1000_82542_rev2_1:
1513 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1514 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1515 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1516 break;
1517 default:
0fadb059
JK		 1518 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1519 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1520 break;
1da177e4 1521 }
0fadb059
JK		 1522 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1523 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1524 ew32(TIPG, tipg);
1da177e4
LT		 1525
1526 /* Set the Tx Interrupt Delay register */
1527
1dc32918 1528 ew32(TIDV, adapter->tx_int_delay);
581d708e 1529 if (hw->mac_type >= e1000_82540)
1dc32918 1530 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1531
1532 /* Program the Transmit Control Register */
1533
1dc32918 1534 tctl = er32(TCTL);
1da177e4 1535 tctl &= ~E1000_TCTL_CT;
7e6c9861 1536 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1537 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1538
581d708e 1539 e1000_config_collision_dist(hw);
1da177e4
LT		 1540
1541 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1542 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1543
1544 /* only set IDE if we are delaying interrupts using the timers */
1545 if (adapter->tx_int_delay)
1546 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1547
581d708e 1548 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1549 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1550 else
1551 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1552
1553 /* Cache if we're 82544 running in PCI-X because we'll
1554 * need this to apply a workaround later in the send path. */
581d708e
MC		 1555 if (hw->mac_type == e1000_82544 &&
1556 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1557 adapter->pcix_82544 = 1;
7e6c9861 1558
1dc32918 1559 ew32(TCTL, tctl);
7e6c9861 1560
1da177e4
LT		 1561}
1562
1563/**
1564 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1565 * @adapter: board private structure
581d708e 1566 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1567 *
1568 * Returns 0 on success, negative on failure
1569 **/
1570
64798845
JP		 1571static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1572 struct e1000_rx_ring *rxdr)
1da177e4 1573{
1da177e4 1574 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1575 int size, desc_len;
1da177e4
LT		 1576
1577 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1578 rxdr->buffer_info = vmalloc(size);
581d708e 1579 if (!rxdr->buffer_info) {
2648345f
MC		 1580 DPRINTK(PROBE, ERR,
1581 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1582 return -ENOMEM;
1583 }
1584 memset(rxdr->buffer_info, 0, size);
1585
1532ecea 1586 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1587
1da177e4
LT		 1588 /* Round up to nearest 4K */
1589
2d7edb92 1590 rxdr->size = rxdr->count * desc_len;
9099cfb9 1591 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1592
1593 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1594
581d708e
MC		 1595 if (!rxdr->desc) {
1596 DPRINTK(PROBE, ERR,
1597 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1598setup_rx_desc_die:
1da177e4
LT		 1599 vfree(rxdr->buffer_info);
1600 return -ENOMEM;
1601 }
1602
2648345f 1603 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1604 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1605 void *olddesc = rxdr->desc;
1606 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1607 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1608 "at %p\n", rxdr->size, rxdr->desc);
1609 /* Try again, without freeing the previous */
1da177e4 1610 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1611 /* Failed allocation, critical failure */
581d708e 1612 if (!rxdr->desc) {
1da177e4 1613 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1614 DPRINTK(PROBE, ERR,
1615 "Unable to allocate memory "
1616 "for the receive descriptor ring\n");
1da177e4
LT		 1617 goto setup_rx_desc_die;
1618 }
1619
1620 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1621 /* give up */
2648345f
MC		 1622 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1623 rxdr->dma);
1da177e4 1624 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1625 DPRINTK(PROBE, ERR,
1626 "Unable to allocate aligned memory "
1627 "for the receive descriptor ring\n");
581d708e 1628 goto setup_rx_desc_die;
1da177e4 1629 } else {
2648345f 1630 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1631 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1632 }
1633 }
1634 memset(rxdr->desc, 0, rxdr->size);
1635
1636 rxdr->next_to_clean = 0;
1637 rxdr->next_to_use = 0;
edbbb3ca 1638 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1639
1640 return 0;
1641}
1642
581d708e
MC		 1643/**
1644 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1645 * (Descriptors) for all queues
1646 * @adapter: board private structure
1647 *
581d708e
MC		 1648 * Return 0 on success, negative on failure
1649 **/
1650
64798845 1651int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1652{
1653 int i, err = 0;
1654
f56799ea 1655 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1656 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1657 if (err) {
1658 DPRINTK(PROBE, ERR,
1659 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1660 for (i-- ; i >= 0; i--)
1661 e1000_free_rx_resources(adapter,
1662 &adapter->rx_ring[i]);
581d708e
MC		 1663 break;
1664 }
1665 }
1666
1667 return err;
1668}
1669
1da177e4 1670/**
2648345f 1671 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1672 * @adapter: Board private structure
1673 **/
64798845 1674static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1675{
1dc32918 1676 struct e1000_hw *hw = &adapter->hw;
630b25cd 1677 u32 rctl;
1da177e4 1678
1dc32918 1679 rctl = er32(RCTL);
1da177e4
LT		 1680
1681 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1682
1683 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1684 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1685 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1686
1dc32918 1687 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1688 rctl |= E1000_RCTL_SBP;
1689 else
1690 rctl &= ~E1000_RCTL_SBP;
1691
2d7edb92
MC		 1692 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1693 rctl &= ~E1000_RCTL_LPE;
1694 else
1695 rctl |= E1000_RCTL_LPE;
1696
1da177e4 1697 /* Setup buffer sizes */
9e2feace
AK		 1698 rctl &= ~E1000_RCTL_SZ_4096;
1699 rctl |= E1000_RCTL_BSEX;
1700 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1701 case E1000_RXBUFFER_2048:
1702 default:
1703 rctl |= E1000_RCTL_SZ_2048;
1704 rctl &= ~E1000_RCTL_BSEX;
1705 break;
1706 case E1000_RXBUFFER_4096:
1707 rctl |= E1000_RCTL_SZ_4096;
1708 break;
1709 case E1000_RXBUFFER_8192:
1710 rctl |= E1000_RCTL_SZ_8192;
1711 break;
1712 case E1000_RXBUFFER_16384:
1713 rctl |= E1000_RCTL_SZ_16384;
1714 break;
2d7edb92
MC		 1715 }
1716
1dc32918 1717 ew32(RCTL, rctl);
1da177e4
LT		 1718}
1719
1720/**
1721 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1722 * @adapter: board private structure
1723 *
1724 * Configure the Rx unit of the MAC after a reset.
1725 **/
1726
64798845 1727static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1728{
406874a7 1729 u64 rdba;
581d708e 1730 struct e1000_hw *hw = &adapter->hw;
1532ecea 1731 u32 rdlen, rctl, rxcsum;
2d7edb92 1732
edbbb3ca
JB		 1733 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1734 rdlen = adapter->rx_ring[0].count *
1735 sizeof(struct e1000_rx_desc);
1736 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1737 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1738 } else {
1739 rdlen = adapter->rx_ring[0].count *
1740 sizeof(struct e1000_rx_desc);
1741 adapter->clean_rx = e1000_clean_rx_irq;
1742 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1743 }
1da177e4
LT		 1744
1745 /* disable receives while setting up the descriptors */
1dc32918
JP		 1746 rctl = er32(RCTL);
1747 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1748
1749 /* set the Receive Delay Timer Register */
1dc32918 1750 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1751
581d708e 1752 if (hw->mac_type >= e1000_82540) {
1dc32918 1753 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1754 if (adapter->itr_setting != 0)
1dc32918 1755 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1756 }
1757
581d708e
MC		 1758 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1759 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1760 switch (adapter->num_rx_queues) {
24025e4e
MC		 1761 case 1:
1762 default:
581d708e 1763 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1764 ew32(RDLEN, rdlen);
1765 ew32(RDBAH, (rdba >> 32));
1766 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1767 ew32(RDT, 0);
1768 ew32(RDH, 0);
6a951698
AK		 1769 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1770 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1771 break;
24025e4e
MC		 1772 }
1773
1da177e4 1774 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1775 if (hw->mac_type >= e1000_82543) {
1dc32918 1776 rxcsum = er32(RXCSUM);
630b25cd 1777 if (adapter->rx_csum)
2d7edb92 1778 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1779 else
2d7edb92 1780 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1781 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1782 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1783 }
1784
1785 /* Enable Receives */
1dc32918 1786 ew32(RCTL, rctl);
1da177e4
LT		 1787}
1788
1789/**
581d708e 1790 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1791 * @adapter: board private structure
581d708e 1792 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1793 *
1794 * Free all transmit software resources
1795 **/
1796
64798845
JP		 1797static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1798 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1799{
1800 struct pci_dev *pdev = adapter->pdev;
1801
581d708e 1802 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1803
581d708e
MC		 1804 vfree(tx_ring->buffer_info);
1805 tx_ring->buffer_info = NULL;
1da177e4 1806
581d708e 1807 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1808
581d708e
MC		 1809 tx_ring->desc = NULL;
1810}
1811
1812/**
1813 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1814 * @adapter: board private structure
1815 *
1816 * Free all transmit software resources
1817 **/
1818
64798845 1819void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1820{
1821 int i;
1822
f56799ea 1823 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1824 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1825}
1826
64798845
JP		 1827static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1828 struct e1000_buffer *buffer_info)
1da177e4 1829{
602c0554
AD		 1830 if (buffer_info->dma) {
1831 if (buffer_info->mapped_as_page)
1832 pci_unmap_page(adapter->pdev, buffer_info->dma,
1833 buffer_info->length, PCI_DMA_TODEVICE);
1834 else
1835 pci_unmap_single(adapter->pdev, buffer_info->dma,
1836 buffer_info->length,
1837 PCI_DMA_TODEVICE);
1838 buffer_info->dma = 0;
1839 }
a9ebadd6 1840 if (buffer_info->skb) {
1da177e4 1841 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1842 buffer_info->skb = NULL;
1843 }
37e73df8 1844 buffer_info->time_stamp = 0;
a9ebadd6 1845 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1846}
1847
1848/**
1849 * e1000_clean_tx_ring - Free Tx Buffers
1850 * @adapter: board private structure
581d708e 1851 * @tx_ring: ring to be cleaned
1da177e4
LT		 1852 **/
1853
64798845
JP		 1854static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1855 struct e1000_tx_ring *tx_ring)
1da177e4 1856{
1dc32918 1857 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1858 struct e1000_buffer *buffer_info;
1859 unsigned long size;
1860 unsigned int i;
1861
1862 /* Free all the Tx ring sk_buffs */
1863
96838a40 1864 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1865 buffer_info = &tx_ring->buffer_info[i];
1866 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1867 }
1868
1869 size = sizeof(struct e1000_buffer) * tx_ring->count;
1870 memset(tx_ring->buffer_info, 0, size);
1871
1872 /* Zero out the descriptor ring */
1873
1874 memset(tx_ring->desc, 0, tx_ring->size);
1875
1876 tx_ring->next_to_use = 0;
1877 tx_ring->next_to_clean = 0;
fd803241 1878 tx_ring->last_tx_tso = 0;
1da177e4 1879
1dc32918
JP		 1880 writel(0, hw->hw_addr + tx_ring->tdh);
1881 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 1882}
1883
1884/**
1885 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1886 * @adapter: board private structure
1887 **/
1888
64798845 1889static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 1890{
1891 int i;
1892
f56799ea 1893 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1894 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1895}
1896
1897/**
1898 * e1000_free_rx_resources - Free Rx Resources
1899 * @adapter: board private structure
581d708e 1900 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1901 *
1902 * Free all receive software resources
1903 **/
1904
64798845
JP		 1905static void e1000_free_rx_resources(struct e1000_adapter *adapter,
1906 struct e1000_rx_ring *rx_ring)
1da177e4 1907{
1da177e4
LT		 1908 struct pci_dev *pdev = adapter->pdev;
1909
581d708e 1910 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1911
1912 vfree(rx_ring->buffer_info);
1913 rx_ring->buffer_info = NULL;
1914
1915 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1916
1917 rx_ring->desc = NULL;
1918}
1919
1920/**
581d708e 1921 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1922 * @adapter: board private structure
581d708e
MC		 1923 *
1924 * Free all receive software resources
1925 **/
1926
64798845 1927void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1928{
1929 int i;
1930
f56799ea 1931 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1932 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1933}
1934
1935/**
1936 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1937 * @adapter: board private structure
1938 * @rx_ring: ring to free buffers from
1da177e4
LT		 1939 **/
1940
64798845
JP		 1941static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
1942 struct e1000_rx_ring *rx_ring)
1da177e4 1943{
1dc32918 1944 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1945 struct e1000_buffer *buffer_info;
1946 struct pci_dev *pdev = adapter->pdev;
1947 unsigned long size;
630b25cd 1948 unsigned int i;
1da177e4
LT		 1949
1950 /* Free all the Rx ring sk_buffs */
96838a40 1951 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1952 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 1953 if (buffer_info->dma &&
1954 adapter->clean_rx == e1000_clean_rx_irq) {
1955 pci_unmap_single(pdev, buffer_info->dma,
1956 buffer_info->length,
1957 PCI_DMA_FROMDEVICE);
1958 } else if (buffer_info->dma &&
1959 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
1960 pci_unmap_page(pdev, buffer_info->dma,
1961 buffer_info->length,
1962 PCI_DMA_FROMDEVICE);
679be3ba 1963 }
1da177e4 1964
679be3ba 1965 buffer_info->dma = 0;
edbbb3ca
JB		 1966 if (buffer_info->page) {
1967 put_page(buffer_info->page);
1968 buffer_info->page = NULL;
1969 }
679be3ba 1970 if (buffer_info->skb) {
1da177e4
LT		 1971 dev_kfree_skb(buffer_info->skb);
1972 buffer_info->skb = NULL;
997f5cbd 1973 }
1da177e4
LT		 1974 }
1975
edbbb3ca
JB		 1976 /* there also may be some cached data from a chained receive */
1977 if (rx_ring->rx_skb_top) {
1978 dev_kfree_skb(rx_ring->rx_skb_top);
1979 rx_ring->rx_skb_top = NULL;
1980 }
1981
1da177e4
LT		 1982 size = sizeof(struct e1000_buffer) * rx_ring->count;
1983 memset(rx_ring->buffer_info, 0, size);
1984
1985 /* Zero out the descriptor ring */
1da177e4
LT		 1986 memset(rx_ring->desc, 0, rx_ring->size);
1987
1988 rx_ring->next_to_clean = 0;
1989 rx_ring->next_to_use = 0;
1990
1dc32918
JP		 1991 writel(0, hw->hw_addr + rx_ring->rdh);
1992 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 1993}
1994
1995/**
1996 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
1997 * @adapter: board private structure
1998 **/
1999
64798845 2000static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2001{
2002 int i;
2003
f56799ea 2004 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2005 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2006}
2007
2008/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2009 * and memory write and invalidate disabled for certain operations
2010 */
64798845 2011static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2012{
1dc32918 2013 struct e1000_hw *hw = &adapter->hw;
1da177e4 2014 struct net_device *netdev = adapter->netdev;
406874a7 2015 u32 rctl;
1da177e4 2016
1dc32918 2017 e1000_pci_clear_mwi(hw);
1da177e4 2018
1dc32918 2019 rctl = er32(RCTL);
1da177e4 2020 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2021 ew32(RCTL, rctl);
2022 E1000_WRITE_FLUSH();
1da177e4
LT		 2023 mdelay(5);
2024
96838a40 2025 if (netif_running(netdev))
581d708e 2026 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2027}
2028
64798845 2029static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2030{
1dc32918 2031 struct e1000_hw *hw = &adapter->hw;
1da177e4 2032 struct net_device *netdev = adapter->netdev;
406874a7 2033 u32 rctl;
1da177e4 2034
1dc32918 2035 rctl = er32(RCTL);
1da177e4 2036 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2037 ew32(RCTL, rctl);
2038 E1000_WRITE_FLUSH();
1da177e4
LT		 2039 mdelay(5);
2040
1dc32918
JP		 2041 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2042 e1000_pci_set_mwi(hw);
1da177e4 2043
96838a40 2044 if (netif_running(netdev)) {
72d64a43
JK		 2045 /* No need to loop, because 82542 supports only 1 queue */
2046 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2047 e1000_configure_rx(adapter);
72d64a43 2048 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2049 }
2050}
2051
2052/**
2053 * e1000_set_mac - Change the Ethernet Address of the NIC
2054 * @netdev: network interface device structure
2055 * @p: pointer to an address structure
2056 *
2057 * Returns 0 on success, negative on failure
2058 **/
2059
64798845 2060static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2061{
60490fe0 2062 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2063 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2064 struct sockaddr *addr = p;
2065
96838a40 2066 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2067 return -EADDRNOTAVAIL;
2068
2069 /* 82542 2.0 needs to be in reset to write receive address registers */
2070
1dc32918 2071 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2072 e1000_enter_82542_rst(adapter);
2073
2074 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2075 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2076
1dc32918 2077 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2078
1dc32918 2079 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2080 e1000_leave_82542_rst(adapter);
2081
2082 return 0;
2083}
2084
2085/**
db0ce50d 2086 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2087 * @netdev: network interface device structure
2088 *
db0ce50d
PM		 2089 * The set_rx_mode entry point is called whenever the unicast or multicast
2090 * address lists or the network interface flags are updated. This routine is
2091 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2092 * promiscuous mode, and all-multi behavior.
2093 **/
2094
64798845 2095static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2096{
60490fe0 2097 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2098 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2099 struct netdev_hw_addr *ha;
2100 bool use_uc = false;
db0ce50d 2101 struct dev_addr_list *mc_ptr;
406874a7
JP		 2102 u32 rctl;
2103 u32 hash_value;
868d5309 2104 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2105 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2106 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2107
2108 if (!mcarray) {
2109 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2110 return;
2111 }
cd94dd0b 2112
2648345f
MC		 2113 /* Check for Promiscuous and All Multicast modes */
2114
1dc32918 2115 rctl = er32(RCTL);
1da177e4 2116
96838a40 2117 if (netdev->flags & IFF_PROMISC) {
1da177e4 2118 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2119 rctl &= ~E1000_RCTL_VFE;
1da177e4 2120 } else {
1532ecea 2121 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2122 rctl |= E1000_RCTL_MPE;
1532ecea 2123 else
746b9f02 2124 rctl &= ~E1000_RCTL_MPE;
1532ecea
JB		 2125 /* Enable VLAN filter if there is a VLAN */
2126 if (adapter->vlgrp)
2127 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2128 }
2129
32e7bfc4 2130 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2131 rctl |= E1000_RCTL_UPE;
2132 } else if (!(netdev->flags & IFF_PROMISC)) {
2133 rctl &= ~E1000_RCTL_UPE;
ccffad25 2134 use_uc = true;
1da177e4
LT		 2135 }
2136
1dc32918 2137 ew32(RCTL, rctl);
1da177e4
LT		 2138
2139 /* 82542 2.0 needs to be in reset to write receive address registers */
2140
96838a40 2141 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2142 e1000_enter_82542_rst(adapter);
2143
db0ce50d
PM		 2144 /* load the first 14 addresses into the exact filters 1-14. Unicast
2145 * addresses take precedence to avoid disabling unicast filtering
2146 * when possible.
2147 *
1da177e4
LT		 2148 * RAR 0 is used for the station MAC adddress
2149 * if there are not 14 addresses, go ahead and clear the filters
2150 */
ccffad25
JP		 2151 i = 1;
2152 if (use_uc)
32e7bfc4 2153 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2154 if (i == rar_entries)
2155 break;
2156 e1000_rar_set(hw, ha->addr, i++);
2157 }
2158
2159 WARN_ON(i == rar_entries);
2160
7a81e9f3
JP		 2161 netdev_for_each_mc_addr(mc_ptr, netdev) {
2162 if (i == rar_entries) {
2163 /* load any remaining addresses into the hash table */
2164 u32 hash_reg, hash_bit, mta;
2165 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2166 hash_reg = (hash_value >> 5) & 0x7F;
2167 hash_bit = hash_value & 0x1F;
2168 mta = (1 << hash_bit);
2169 mcarray[hash_reg] |= mta;
10886af5 2170 } else {
7a81e9f3 2171 e1000_rar_set(hw, mc_ptr->da_addr, i++);
1da177e4
LT		 2172 }
2173 }
2174
7a81e9f3
JP		 2175 for (; i < rar_entries; i++) {
2176 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2177 E1000_WRITE_FLUSH();
2178 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2179 E1000_WRITE_FLUSH();
1da177e4
LT		 2180 }
2181
81c52285
JB		 2182 /* write the hash table completely, write from bottom to avoid
2183 * both stupid write combining chipsets, and flushing each write */
2184 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2185 /*
2186 * If we are on an 82544 has an errata where writing odd
2187 * offsets overwrites the previous even offset, but writing
2188 * backwards over the range solves the issue by always
2189 * writing the odd offset first
2190 */
2191 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2192 }
2193 E1000_WRITE_FLUSH();
2194
96838a40 2195 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2196 e1000_leave_82542_rst(adapter);
81c52285
JB		 2197
2198 kfree(mcarray);
1da177e4
LT		 2199}
2200
2201/* Need to wait a few seconds after link up to get diagnostic information from
2202 * the phy */
2203
64798845 2204static void e1000_update_phy_info(unsigned long data)
1da177e4 2205{
e982f17c 2206 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2207 struct e1000_hw *hw = &adapter->hw;
2208 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2209}
2210
2211/**
2212 * e1000_82547_tx_fifo_stall - Timer Call-back
2213 * @data: pointer to adapter cast into an unsigned long
2214 **/
2215
64798845 2216static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2217{
e982f17c 2218 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2219 struct e1000_hw *hw = &adapter->hw;
1da177e4 2220 struct net_device *netdev = adapter->netdev;
406874a7 2221 u32 tctl;
1da177e4 2222
96838a40 2223 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2224 if ((er32(TDT) == er32(TDH)) &&
2225 (er32(TDFT) == er32(TDFH)) &&
2226 (er32(TDFTS) == er32(TDFHS))) {
2227 tctl = er32(TCTL);
2228 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2229 ew32(TDFT, adapter->tx_head_addr);
2230 ew32(TDFH, adapter->tx_head_addr);
2231 ew32(TDFTS, adapter->tx_head_addr);
2232 ew32(TDFHS, adapter->tx_head_addr);
2233 ew32(TCTL, tctl);
2234 E1000_WRITE_FLUSH();
1da177e4
LT		 2235
2236 adapter->tx_fifo_head = 0;
2237 atomic_set(&adapter->tx_fifo_stall, 0);
2238 netif_wake_queue(netdev);
baa34745 2239 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
1da177e4
LT		 2240 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2241 }
2242 }
2243}
2244
b548192a 2245bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2246{
2247 struct e1000_hw *hw = &adapter->hw;
2248 bool link_active = false;
be0f0719
JB		 2249
2250 /* get_link_status is set on LSC (link status) interrupt or
2251 * rx sequence error interrupt. get_link_status will stay
2252 * false until the e1000_check_for_link establishes link
2253 * for copper adapters ONLY
2254 */
2255 switch (hw->media_type) {
2256 case e1000_media_type_copper:
2257 if (hw->get_link_status) {
120a5d0d 2258 e1000_check_for_link(hw);
be0f0719
JB		 2259 link_active = !hw->get_link_status;
2260 } else {
2261 link_active = true;
2262 }
2263 break;
2264 case e1000_media_type_fiber:
120a5d0d 2265 e1000_check_for_link(hw);
be0f0719
JB		 2266 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2267 break;
2268 case e1000_media_type_internal_serdes:
120a5d0d 2269 e1000_check_for_link(hw);
be0f0719
JB		 2270 link_active = hw->serdes_has_link;
2271 break;
2272 default:
2273 break;
2274 }
2275
2276 return link_active;
2277}
2278
1da177e4
LT		 2279/**
2280 * e1000_watchdog - Timer Call-back
2281 * @data: pointer to adapter cast into an unsigned long
2282 **/
64798845 2283static void e1000_watchdog(unsigned long data)
1da177e4 2284{
e982f17c 2285 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2286 struct e1000_hw *hw = &adapter->hw;
1da177e4 2287 struct net_device *netdev = adapter->netdev;
545c67c0 2288 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2289 u32 link, tctl;
90fb5135 2290
be0f0719
JB		 2291 link = e1000_has_link(adapter);
2292 if ((netif_carrier_ok(netdev)) && link)
2293 goto link_up;
1da177e4 2294
96838a40
JB		 2295 if (link) {
2296 if (!netif_carrier_ok(netdev)) {
406874a7 2297 u32 ctrl;
c3033b01 2298 bool txb2b = true;
be0f0719 2299 /* update snapshot of PHY registers on LSC */
1dc32918 2300 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2301 &adapter->link_speed,
2302 &adapter->link_duplex);
2303
1dc32918 2304 ctrl = er32(CTRL);
b30c4d8f
JK		 2305 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2306 "Flow Control: %s\n",
2307 netdev->name,
2308 adapter->link_speed,
2309 adapter->link_duplex == FULL_DUPLEX ?
9669f53b
AK		 2310 "Full Duplex" : "Half Duplex",
2311 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2312 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2313 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2314 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2315
39ca5f03 2316 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2317 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2318 switch (adapter->link_speed) {
2319 case SPEED_10:
c3033b01 2320 txb2b = false;
be0f0719 2321 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2322 break;
2323 case SPEED_100:
c3033b01 2324 txb2b = false;
7e6c9861
JK		 2325 /* maybe add some timeout factor ? */
2326 break;
2327 }
2328
1532ecea 2329 /* enable transmits in the hardware */
1dc32918 2330 tctl = er32(TCTL);
7e6c9861 2331 tctl |= E1000_TCTL_EN;
1dc32918 2332 ew32(TCTL, tctl);
66a2b0a3 2333
1da177e4 2334 netif_carrier_on(netdev);
baa34745
JB		 2335 if (!test_bit(__E1000_DOWN, &adapter->flags))
2336 mod_timer(&adapter->phy_info_timer,
2337 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2338 adapter->smartspeed = 0;
2339 }
2340 } else {
96838a40 2341 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2342 adapter->link_speed = 0;
2343 adapter->link_duplex = 0;
b30c4d8f
JK		 2344 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2345 netdev->name);
1da177e4 2346 netif_carrier_off(netdev);
baa34745
JB		 2347
2348 if (!test_bit(__E1000_DOWN, &adapter->flags))
2349 mod_timer(&adapter->phy_info_timer,
2350 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2351 }
2352
2353 e1000_smartspeed(adapter);
2354 }
2355
be0f0719 2356link_up:
1da177e4
LT		 2357 e1000_update_stats(adapter);
2358
1dc32918 2359 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2360 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2361 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2362 adapter->colc_old = adapter->stats.colc;
2363
2364 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2365 adapter->gorcl_old = adapter->stats.gorcl;
2366 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2367 adapter->gotcl_old = adapter->stats.gotcl;
2368
1dc32918 2369 e1000_update_adaptive(hw);
1da177e4 2370
f56799ea 2371 if (!netif_carrier_ok(netdev)) {
581d708e 2372 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2373 /* We've lost link, so the controller stops DMA,
2374 * but we've got queued Tx work that's never going
2375 * to get done, so reset controller to flush Tx.
2376 * (Do the reset outside of interrupt context). */
87041639
JK		 2377 adapter->tx_timeout_count++;
2378 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 2379 /* return immediately since reset is imminent */
2380 return;
1da177e4
LT		 2381 }
2382 }
2383
1da177e4 2384 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2385 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2386
2648345f 2387 /* Force detection of hung controller every watchdog period */
c3033b01 2388 adapter->detect_tx_hung = true;
1da177e4
LT		 2389
2390 /* Reset the timer */
baa34745
JB		 2391 if (!test_bit(__E1000_DOWN, &adapter->flags))
2392 mod_timer(&adapter->watchdog_timer,
2393 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2394}
2395
835bb129
JB		 2396enum latency_range {
2397 lowest_latency = 0,
2398 low_latency = 1,
2399 bulk_latency = 2,
2400 latency_invalid = 255
2401};
2402
2403/**
2404 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2405 * @adapter: pointer to adapter
2406 * @itr_setting: current adapter->itr
2407 * @packets: the number of packets during this measurement interval
2408 * @bytes: the number of bytes during this measurement interval
2409 *
835bb129
JB		 2410 * Stores a new ITR value based on packets and byte
2411 * counts during the last interrupt. The advantage of per interrupt
2412 * computation is faster updates and more accurate ITR for the current
2413 * traffic pattern. Constants in this function were computed
2414 * based on theoretical maximum wire speed and thresholds were set based
2415 * on testing data as well as attempting to minimize response time
2416 * while increasing bulk throughput.
2417 * this functionality is controlled by the InterruptThrottleRate module
2418 * parameter (see e1000_param.c)
835bb129
JB		 2419 **/
2420static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2421 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2422{
2423 unsigned int retval = itr_setting;
2424 struct e1000_hw *hw = &adapter->hw;
2425
2426 if (unlikely(hw->mac_type < e1000_82540))
2427 goto update_itr_done;
2428
2429 if (packets == 0)
2430 goto update_itr_done;
2431
835bb129
JB		 2432 switch (itr_setting) {
2433 case lowest_latency:
2b65326e
JB		 2434 /* jumbo frames get bulk treatment*/
2435 if (bytes/packets > 8000)
2436 retval = bulk_latency;
2437 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2438 retval = low_latency;
2439 break;
2440 case low_latency: /* 50 usec aka 20000 ints/s */
2441 if (bytes > 10000) {
2b65326e
JB		 2442 /* jumbo frames need bulk latency setting */
2443 if (bytes/packets > 8000)
2444 retval = bulk_latency;
2445 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2446 retval = bulk_latency;
2447 else if ((packets > 35))
2448 retval = lowest_latency;
2b65326e
JB		 2449 } else if (bytes/packets > 2000)
2450 retval = bulk_latency;
2451 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2452 retval = lowest_latency;
2453 break;
2454 case bulk_latency: /* 250 usec aka 4000 ints/s */
2455 if (bytes > 25000) {
2456 if (packets > 35)
2457 retval = low_latency;
2b65326e
JB		 2458 } else if (bytes < 6000) {
2459 retval = low_latency;
835bb129
JB		 2460 }
2461 break;
2462 }
2463
2464update_itr_done:
2465 return retval;
2466}
2467
2468static void e1000_set_itr(struct e1000_adapter *adapter)
2469{
2470 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2471 u16 current_itr;
2472 u32 new_itr = adapter->itr;
835bb129
JB		 2473
2474 if (unlikely(hw->mac_type < e1000_82540))
2475 return;
2476
2477 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2478 if (unlikely(adapter->link_speed != SPEED_1000)) {
2479 current_itr = 0;
2480 new_itr = 4000;
2481 goto set_itr_now;
2482 }
2483
2484 adapter->tx_itr = e1000_update_itr(adapter,
2485 adapter->tx_itr,
2486 adapter->total_tx_packets,
2487 adapter->total_tx_bytes);
2b65326e
JB		 2488 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2489 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2490 adapter->tx_itr = low_latency;
2491
835bb129
JB		 2492 adapter->rx_itr = e1000_update_itr(adapter,
2493 adapter->rx_itr,
2494 adapter->total_rx_packets,
2495 adapter->total_rx_bytes);
2b65326e
JB		 2496 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2497 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2498 adapter->rx_itr = low_latency;
835bb129
JB		 2499
2500 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2501
835bb129
JB		 2502 switch (current_itr) {
2503 /* counts and packets in update_itr are dependent on these numbers */
2504 case lowest_latency:
2505 new_itr = 70000;
2506 break;
2507 case low_latency:
2508 new_itr = 20000; /* aka hwitr = ~200 */
2509 break;
2510 case bulk_latency:
2511 new_itr = 4000;
2512 break;
2513 default:
2514 break;
2515 }
2516
2517set_itr_now:
2518 if (new_itr != adapter->itr) {
2519 /* this attempts to bias the interrupt rate towards Bulk
2520 * by adding intermediate steps when interrupt rate is
2521 * increasing */
2522 new_itr = new_itr > adapter->itr ?
2523 min(adapter->itr + (new_itr >> 2), new_itr) :
2524 new_itr;
2525 adapter->itr = new_itr;
1dc32918 2526 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2527 }
2528
2529 return;
2530}
2531
1da177e4
LT		 2532#define E1000_TX_FLAGS_CSUM 0x00000001
2533#define E1000_TX_FLAGS_VLAN 0x00000002
2534#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2535#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2536#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2537#define E1000_TX_FLAGS_VLAN_SHIFT 16
2538
64798845
JP		 2539static int e1000_tso(struct e1000_adapter *adapter,
2540 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2541{
1da177e4 2542 struct e1000_context_desc *context_desc;
545c67c0 2543 struct e1000_buffer *buffer_info;
1da177e4 2544 unsigned int i;
406874a7
JP		 2545 u32 cmd_length = 0;
2546 u16 ipcse = 0, tucse, mss;
2547 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2548 int err;
2549
89114afd 2550 if (skb_is_gso(skb)) {
1da177e4
LT		 2551 if (skb_header_cloned(skb)) {
2552 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2553 if (err)
2554 return err;
2555 }
2556
ab6a5bb6 2557 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2558 mss = skb_shinfo(skb)->gso_size;
60828236 2559 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2560 struct iphdr *iph = ip_hdr(skb);
2561 iph->tot_len = 0;
2562 iph->check = 0;
aa8223c7
ACM		 2563 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2564 iph->daddr, 0,
2565 IPPROTO_TCP,
2566 0);
2d7edb92 2567 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2568 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2569 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2570 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2571 tcp_hdr(skb)->check =
0660e03f
ACM		 2572 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2573 &ipv6_hdr(skb)->daddr,
2574 0, IPPROTO_TCP, 0);
2d7edb92 2575 ipcse = 0;
2d7edb92 2576 }
bbe735e4 2577 ipcss = skb_network_offset(skb);
eddc9ec5 2578 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2579 tucss = skb_transport_offset(skb);
aa8223c7 2580 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2581 tucse = 0;
2582
2583 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2584 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2585
581d708e
MC		 2586 i = tx_ring->next_to_use;
2587 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2588 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2589
2590 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2591 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2592 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2593 context_desc->upper_setup.tcp_fields.tucss = tucss;
2594 context_desc->upper_setup.tcp_fields.tucso = tucso;
2595 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2596 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2597 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2598 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2599
545c67c0 2600 buffer_info->time_stamp = jiffies;
a9ebadd6 2601 buffer_info->next_to_watch = i;
545c67c0 2602
581d708e
MC		 2603 if (++i == tx_ring->count) i = 0;
2604 tx_ring->next_to_use = i;
1da177e4 2605
c3033b01 2606 return true;
1da177e4 2607 }
c3033b01 2608 return false;
1da177e4
LT		 2609}
2610
64798845
JP		 2611static bool e1000_tx_csum(struct e1000_adapter *adapter,
2612 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2613{
2614 struct e1000_context_desc *context_desc;
545c67c0 2615 struct e1000_buffer *buffer_info;
1da177e4 2616 unsigned int i;
406874a7 2617 u8 css;
3ed30676 2618 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2619
3ed30676
DG		 2620 if (skb->ip_summed != CHECKSUM_PARTIAL)
2621 return false;
1da177e4 2622
3ed30676 2623 switch (skb->protocol) {
09640e63 2624 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2625 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2626 cmd_len |= E1000_TXD_CMD_TCP;
2627 break;
09640e63 2628 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2629 /* XXX not handling all IPV6 headers */
2630 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2631 cmd_len |= E1000_TXD_CMD_TCP;
2632 break;
2633 default:
2634 if (unlikely(net_ratelimit()))
2635 DPRINTK(DRV, WARNING,
2636 "checksum_partial proto=%x!\n", skb->protocol);
2637 break;
2638 }
1da177e4 2639
3ed30676 2640 css = skb_transport_offset(skb);
1da177e4 2641
3ed30676
DG		 2642 i = tx_ring->next_to_use;
2643 buffer_info = &tx_ring->buffer_info[i];
2644 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2645
3ed30676
DG		 2646 context_desc->lower_setup.ip_config = 0;
2647 context_desc->upper_setup.tcp_fields.tucss = css;
2648 context_desc->upper_setup.tcp_fields.tucso =
2649 css + skb->csum_offset;
2650 context_desc->upper_setup.tcp_fields.tucse = 0;
2651 context_desc->tcp_seg_setup.data = 0;
2652 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2653
3ed30676
DG		 2654 buffer_info->time_stamp = jiffies;
2655 buffer_info->next_to_watch = i;
1da177e4 2656
3ed30676
DG		 2657 if (unlikely(++i == tx_ring->count)) i = 0;
2658 tx_ring->next_to_use = i;
2659
2660 return true;
1da177e4
LT		 2661}
2662
2663#define E1000_MAX_TXD_PWR 12
2664#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2665
64798845
JP		 2666static int e1000_tx_map(struct e1000_adapter *adapter,
2667 struct e1000_tx_ring *tx_ring,
2668 struct sk_buff *skb, unsigned int first,
2669 unsigned int max_per_txd, unsigned int nr_frags,
2670 unsigned int mss)
1da177e4 2671{
1dc32918 2672 struct e1000_hw *hw = &adapter->hw;
602c0554 2673 struct pci_dev *pdev = adapter->pdev;
37e73df8 2674 struct e1000_buffer *buffer_info;
d20b606c 2675 unsigned int len = skb_headlen(skb);
602c0554 2676 unsigned int offset = 0, size, count = 0, i;
1da177e4 2677 unsigned int f;
1da177e4
LT		 2678
2679 i = tx_ring->next_to_use;
2680
96838a40 2681 while (len) {
37e73df8 2682 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2683 size = min(len, max_per_txd);
fd803241
JK		 2684 /* Workaround for Controller erratum --
2685 * descriptor for non-tso packet in a linear SKB that follows a
2686 * tso gets written back prematurely before the data is fully
0f15a8fa 2687 * DMA'd to the controller */
fd803241 2688 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2689 !skb_is_gso(skb)) {
fd803241
JK		 2690 tx_ring->last_tx_tso = 0;
2691 size -= 4;
2692 }
2693
1da177e4
LT		 2694 /* Workaround for premature desc write-backs
2695 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2696 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2697 size -= 4;
97338bde
MC		 2698 /* work-around for errata 10 and it applies
2699 * to all controllers in PCI-X mode
2700 * The fix is to make sure that the first descriptor of a
2701 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2702 */
1dc32918 2703 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2704 (size > 2015) && count == 0))
2705 size = 2015;
96838a40 2706
1da177e4
LT		 2707 /* Workaround for potential 82544 hang in PCI-X. Avoid
2708 * terminating buffers within evenly-aligned dwords. */
96838a40 2709 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2710 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2711 size > 4))
2712 size -= 4;
2713
2714 buffer_info->length = size;
cdd7549e 2715 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2716 buffer_info->time_stamp = jiffies;
602c0554
AD		 2717 buffer_info->mapped_as_page = false;
2718 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
2719 size, PCI_DMA_TODEVICE);
2720 if (pci_dma_mapping_error(pdev, buffer_info->dma))
2721 goto dma_error;
a9ebadd6 2722 buffer_info->next_to_watch = i;
1da177e4
LT		 2723
2724 len -= size;
2725 offset += size;
2726 count++;
37e73df8
AD		 2727 if (len) {
2728 i++;
2729 if (unlikely(i == tx_ring->count))
2730 i = 0;
2731 }
1da177e4
LT		 2732 }
2733
96838a40 2734 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2735 struct skb_frag_struct *frag;
2736
2737 frag = &skb_shinfo(skb)->frags[f];
2738 len = frag->size;
602c0554 2739 offset = frag->page_offset;
1da177e4 2740
96838a40 2741 while (len) {
37e73df8
AD		 2742 i++;
2743 if (unlikely(i == tx_ring->count))
2744 i = 0;
2745
1da177e4
LT		 2746 buffer_info = &tx_ring->buffer_info[i];
2747 size = min(len, max_per_txd);
1da177e4
LT		 2748 /* Workaround for premature desc write-backs
2749 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2750 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2751 size -= 4;
1da177e4
LT		 2752 /* Workaround for potential 82544 hang in PCI-X.
2753 * Avoid terminating buffers within evenly-aligned
2754 * dwords. */
96838a40 2755 if (unlikely(adapter->pcix_82544 &&
8fce4731
JB		 2756 !((unsigned long)(page_to_phys(frag->page) + offset
2757 + size - 1) & 4) &&
2758 size > 4))
1da177e4
LT		 2759 size -= 4;
2760
2761 buffer_info->length = size;
1da177e4 2762 buffer_info->time_stamp = jiffies;
602c0554
AD		 2763 buffer_info->mapped_as_page = true;
2764 buffer_info->dma = pci_map_page(pdev, frag->page,
2765 offset, size,
2766 PCI_DMA_TODEVICE);
2767 if (pci_dma_mapping_error(pdev, buffer_info->dma))
2768 goto dma_error;
a9ebadd6 2769 buffer_info->next_to_watch = i;
1da177e4
LT		 2770
2771 len -= size;
2772 offset += size;
2773 count++;
1da177e4
LT		 2774 }
2775 }
2776
1da177e4
LT		 2777 tx_ring->buffer_info[i].skb = skb;
2778 tx_ring->buffer_info[first].next_to_watch = i;
2779
2780 return count;
602c0554
AD		 2781
2782dma_error:
2783 dev_err(&pdev->dev, "TX DMA map failed\n");
2784 buffer_info->dma = 0;
c1fa347f 2785 if (count)
602c0554 2786 count--;
c1fa347f
RK		 2787
2788 while (count--) {
2789 if (i==0)
602c0554 2790 i += tx_ring->count;
c1fa347f 2791 i--;
602c0554
AD		 2792 buffer_info = &tx_ring->buffer_info[i];
2793 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2794 }
2795
2796 return 0;
1da177e4
LT		 2797}
2798
64798845
JP		 2799static void e1000_tx_queue(struct e1000_adapter *adapter,
2800 struct e1000_tx_ring *tx_ring, int tx_flags,
2801 int count)
1da177e4 2802{
1dc32918 2803 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2804 struct e1000_tx_desc *tx_desc = NULL;
2805 struct e1000_buffer *buffer_info;
406874a7 2806 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2807 unsigned int i;
2808
96838a40 2809 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2810 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2811 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2812 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2813
96838a40 2814 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2815 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2816 }
2817
96838a40 2818 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2819 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2820 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2821 }
2822
96838a40 2823 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2824 txd_lower |= E1000_TXD_CMD_VLE;
2825 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2826 }
2827
2828 i = tx_ring->next_to_use;
2829
96838a40 2830 while (count--) {
1da177e4
LT		 2831 buffer_info = &tx_ring->buffer_info[i];
2832 tx_desc = E1000_TX_DESC(*tx_ring, i);
2833 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2834 tx_desc->lower.data =
2835 cpu_to_le32(txd_lower | buffer_info->length);
2836 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2837 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2838 }
2839
2840 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2841
2842 /* Force memory writes to complete before letting h/w
2843 * know there are new descriptors to fetch. (Only
2844 * applicable for weak-ordered memory model archs,
2845 * such as IA-64). */
2846 wmb();
2847
2848 tx_ring->next_to_use = i;
1dc32918 2849 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 2850 /* we need this if more than one processor can write to our tail
2851 * at a time, it syncronizes IO on IA64/Altix systems */
2852 mmiowb();
1da177e4
LT		 2853}
2854
2855/**
2856 * 82547 workaround to avoid controller hang in half-duplex environment.
2857 * The workaround is to avoid queuing a large packet that would span
2858 * the internal Tx FIFO ring boundary by notifying the stack to resend
2859 * the packet at a later time. This gives the Tx FIFO an opportunity to
2860 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2861 * to the beginning of the Tx FIFO.
2862 **/
2863
2864#define E1000_FIFO_HDR 0x10
2865#define E1000_82547_PAD_LEN 0x3E0
2866
64798845
JP		 2867static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
2868 struct sk_buff *skb)
1da177e4 2869{
406874a7
JP		 2870 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2871 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 2872
9099cfb9 2873 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 2874
96838a40 2875 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2876 goto no_fifo_stall_required;
2877
96838a40 2878 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2879 return 1;
2880
96838a40 2881 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2882 atomic_set(&adapter->tx_fifo_stall, 1);
2883 return 1;
2884 }
2885
2886no_fifo_stall_required:
2887 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2888 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2889 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2890 return 0;
2891}
2892
65c7973f
JB		 2893static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2894{
2895 struct e1000_adapter *adapter = netdev_priv(netdev);
2896 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2897
2898 netif_stop_queue(netdev);
2899 /* Herbert's original patch had:
2900 * smp_mb__after_netif_stop_queue();
2901 * but since that doesn't exist yet, just open code it. */
2902 smp_mb();
2903
2904 /* We need to check again in a case another CPU has just
2905 * made room available. */
2906 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2907 return -EBUSY;
2908
2909 /* A reprieve! */
2910 netif_start_queue(netdev);
fcfb1224 2911 ++adapter->restart_queue;
65c7973f
JB		 2912 return 0;
2913}
2914
2915static int e1000_maybe_stop_tx(struct net_device *netdev,
2916 struct e1000_tx_ring *tx_ring, int size)
2917{
2918 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2919 return 0;
2920 return __e1000_maybe_stop_tx(netdev, size);
2921}
2922
1da177e4 2923#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 2924static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
2925 struct net_device *netdev)
1da177e4 2926{
60490fe0 2927 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2928 struct e1000_hw *hw = &adapter->hw;
581d708e 2929 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2930 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2931 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2932 unsigned int tx_flags = 0;
6d1e3aa7 2933 unsigned int len = skb->len - skb->data_len;
6d1e3aa7
KK		 2934 unsigned int nr_frags;
2935 unsigned int mss;
1da177e4 2936 int count = 0;
76c224bc 2937 int tso;
1da177e4 2938 unsigned int f;
1da177e4 2939
65c7973f
JB		 2940 /* This goes back to the question of how to logically map a tx queue
2941 * to a flow. Right now, performance is impacted slightly negatively
2942 * if using multiple tx queues. If the stack breaks away from a
2943 * single qdisc implementation, we can look at this again. */
581d708e 2944 tx_ring = adapter->tx_ring;
24025e4e 2945
581d708e 2946 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2947 dev_kfree_skb_any(skb);
2948 return NETDEV_TX_OK;
2949 }
2950
7967168c 2951 mss = skb_shinfo(skb)->gso_size;
76c224bc 2952 /* The controller does a simple calculation to
1da177e4
LT		 2953 * make sure there is enough room in the FIFO before
2954 * initiating the DMA for each buffer. The calc is:
2955 * 4 = ceil(buffer len/mss). To make sure we don't
2956 * overrun the FIFO, adjust the max buffer len if mss
2957 * drops. */
96838a40 2958 if (mss) {
406874a7 2959 u8 hdr_len;
1da177e4
LT		 2960 max_per_txd = min(mss << 2, max_per_txd);
2961 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2962
ab6a5bb6 2963 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 2964 if (skb->data_len && hdr_len == len) {
1dc32918 2965 switch (hw->mac_type) {
9f687888 2966 unsigned int pull_size;
683a2aa3
HX		 2967 case e1000_82544:
2968 /* Make sure we have room to chop off 4 bytes,
2969 * and that the end alignment will work out to
2970 * this hardware's requirements
2971 * NOTE: this is a TSO only workaround
2972 * if end byte alignment not correct move us
2973 * into the next dword */
27a884dc 2974 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 2975 break;
2976 /* fall through */
9f687888
JK		 2977 pull_size = min((unsigned int)4, skb->data_len);
2978 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2979 DPRINTK(DRV, ERR,
9f687888
JK		 2980 "__pskb_pull_tail failed.\n");
2981 dev_kfree_skb_any(skb);
749dfc70 2982 return NETDEV_TX_OK;
9f687888
JK		 2983 }
2984 len = skb->len - skb->data_len;
2985 break;
2986 default:
2987 /* do nothing */
2988 break;
d74bbd3b 2989 }
9a3056da 2990 }
1da177e4
LT		 2991 }
2992
9a3056da 2993 /* reserve a descriptor for the offload context */
84fa7933 2994 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 2995 count++;
2648345f 2996 count++;
fd803241 2997
fd803241 2998 /* Controller Erratum workaround */
89114afd 2999 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3000 count++;
fd803241 3001
1da177e4
LT		 3002 count += TXD_USE_COUNT(len, max_txd_pwr);
3003
96838a40 3004 if (adapter->pcix_82544)
1da177e4
LT		 3005 count++;
3006
96838a40 3007 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3008 * in PCI-X mode, so add one more descriptor to the count
3009 */
1dc32918 3010 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3011 (len > 2015)))
3012 count++;
3013
1da177e4 3014 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3015 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3016 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3017 max_txd_pwr);
96838a40 3018 if (adapter->pcix_82544)
1da177e4
LT		 3019 count += nr_frags;
3020
1da177e4
LT		 3021 /* need: count + 2 desc gap to keep tail from touching
3022 * head, otherwise try next time */
8017943e 3023 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3024 return NETDEV_TX_BUSY;
1da177e4 3025
1dc32918 3026 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3027 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3028 netif_stop_queue(netdev);
baa34745
JB		 3029 if (!test_bit(__E1000_DOWN, &adapter->flags))
3030 mod_timer(&adapter->tx_fifo_stall_timer,
3031 jiffies + 1);
1da177e4
LT		 3032 return NETDEV_TX_BUSY;
3033 }
3034 }
3035
96838a40 3036 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3037 tx_flags |= E1000_TX_FLAGS_VLAN;
3038 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3039 }
3040
581d708e 3041 first = tx_ring->next_to_use;
96838a40 3042
581d708e 3043 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3044 if (tso < 0) {
3045 dev_kfree_skb_any(skb);
3046 return NETDEV_TX_OK;
3047 }
3048
fd803241 3049 if (likely(tso)) {
8fce4731
JB		 3050 if (likely(hw->mac_type != e1000_82544))
3051 tx_ring->last_tx_tso = 1;
1da177e4 3052 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3053 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3054 tx_flags |= E1000_TX_FLAGS_CSUM;
3055
60828236 3056 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3057 tx_flags |= E1000_TX_FLAGS_IPV4;
3058
37e73df8
AD		 3059 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3060 nr_frags, mss);
1da177e4 3061
37e73df8
AD		 3062 if (count) {
3063 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3064 /* Make sure there is space in the ring for the next send. */
3065 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3066
37e73df8
AD		 3067 } else {
3068 dev_kfree_skb_any(skb);
3069 tx_ring->buffer_info[first].time_stamp = 0;
3070 tx_ring->next_to_use = first;
3071 }
1da177e4 3072
1da177e4
LT		 3073 return NETDEV_TX_OK;
3074}
3075
3076/**
3077 * e1000_tx_timeout - Respond to a Tx Hang
3078 * @netdev: network interface device structure
3079 **/
3080
64798845 3081static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3082{
60490fe0 3083 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3084
3085 /* Do the reset outside of interrupt context */
87041639
JK		 3086 adapter->tx_timeout_count++;
3087 schedule_work(&adapter->reset_task);
1da177e4
LT		 3088}
3089
64798845 3090static void e1000_reset_task(struct work_struct *work)
1da177e4 3091{
65f27f38
DH		 3092 struct e1000_adapter *adapter =
3093 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3094
2db10a08 3095 e1000_reinit_locked(adapter);
1da177e4
LT		 3096}
3097
3098/**
3099 * e1000_get_stats - Get System Network Statistics
3100 * @netdev: network interface device structure
3101 *
3102 * Returns the address of the device statistics structure.
3103 * The statistics are actually updated from the timer callback.
3104 **/
3105
64798845 3106static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3107{
6b7660cd 3108 /* only return the current stats */
5fe31def 3109 return &netdev->stats;
1da177e4
LT		 3110}
3111
3112/**
3113 * e1000_change_mtu - Change the Maximum Transfer Unit
3114 * @netdev: network interface device structure
3115 * @new_mtu: new value for maximum frame size
3116 *
3117 * Returns 0 on success, negative on failure
3118 **/
3119
64798845 3120static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3121{
60490fe0 3122 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3123 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3124 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3125
96838a40
JB		 3126 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3127 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3128 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3129 return -EINVAL;
2d7edb92 3130 }
1da177e4 3131
997f5cbd 3132 /* Adapter-specific max frame size limits. */
1dc32918 3133 switch (hw->mac_type) {
9e2feace 3134 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3135 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
997f5cbd 3136 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3137 return -EINVAL;
2d7edb92 3138 }
997f5cbd 3139 break;
997f5cbd
JK		 3140 default:
3141 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3142 break;
1da177e4
LT		 3143 }
3144
3d6114e7
JB		 3145 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3146 msleep(1);
3147 /* e1000_down has a dependency on max_frame_size */
3148 hw->max_frame_size = max_frame;
3149 if (netif_running(netdev))
3150 e1000_down(adapter);
3151
87f5032e 3152 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3153 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3154 * larger slab size.
3155 * i.e. RXBUFFER_2048 --> size-4096 slab
3156 * however with the new *_jumbo_rx* routines, jumbo receives will use
3157 * fragmented skbs */
9e2feace 3158
9926146b 3159 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3160 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3161 else
3162#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3163 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3164#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3165 adapter->rx_buffer_len = PAGE_SIZE;
3166#endif
9e2feace
AK		 3167
3168 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3169 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3170 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3171 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3172 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3173
3d6114e7
JB		 3174 printk(KERN_INFO "e1000: %s changing MTU from %d to %d\n",
3175 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3176 netdev->mtu = new_mtu;
3177
2db10a08 3178 if (netif_running(netdev))
3d6114e7
JB		 3179 e1000_up(adapter);
3180 else
3181 e1000_reset(adapter);
3182
3183 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3184
1da177e4
LT		 3185 return 0;
3186}
3187
3188/**
3189 * e1000_update_stats - Update the board statistics counters
3190 * @adapter: board private structure
3191 **/
3192
64798845 3193void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3194{
5fe31def 3195 struct net_device *netdev = adapter->netdev;
1da177e4 3196 struct e1000_hw *hw = &adapter->hw;
282f33c9 3197 struct pci_dev *pdev = adapter->pdev;
1da177e4 3198 unsigned long flags;
406874a7 3199 u16 phy_tmp;
1da177e4
LT		 3200
3201#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3202
282f33c9
LV		 3203 /*
3204 * Prevent stats update while adapter is being reset, or if the pci
3205 * connection is down.
3206 */
9026729b 3207 if (adapter->link_speed == 0)
282f33c9 3208 return;
81b1955e 3209 if (pci_channel_offline(pdev))
9026729b
AK		 3210 return;
3211
1da177e4
LT		 3212 spin_lock_irqsave(&adapter->stats_lock, flags);
3213
828d055f 3214 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3215 * called from the interrupt context, so they must only
3216 * be written while holding adapter->stats_lock
3217 */
3218
1dc32918
JP		 3219 adapter->stats.crcerrs += er32(CRCERRS);
3220 adapter->stats.gprc += er32(GPRC);
3221 adapter->stats.gorcl += er32(GORCL);
3222 adapter->stats.gorch += er32(GORCH);
3223 adapter->stats.bprc += er32(BPRC);
3224 adapter->stats.mprc += er32(MPRC);
3225 adapter->stats.roc += er32(ROC);
3226
1532ecea
JB		 3227 adapter->stats.prc64 += er32(PRC64);
3228 adapter->stats.prc127 += er32(PRC127);
3229 adapter->stats.prc255 += er32(PRC255);
3230 adapter->stats.prc511 += er32(PRC511);
3231 adapter->stats.prc1023 += er32(PRC1023);
3232 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3233
3234 adapter->stats.symerrs += er32(SYMERRS);
3235 adapter->stats.mpc += er32(MPC);
3236 adapter->stats.scc += er32(SCC);
3237 adapter->stats.ecol += er32(ECOL);
3238 adapter->stats.mcc += er32(MCC);
3239 adapter->stats.latecol += er32(LATECOL);
3240 adapter->stats.dc += er32(DC);
3241 adapter->stats.sec += er32(SEC);
3242 adapter->stats.rlec += er32(RLEC);
3243 adapter->stats.xonrxc += er32(XONRXC);
3244 adapter->stats.xontxc += er32(XONTXC);
3245 adapter->stats.xoffrxc += er32(XOFFRXC);
3246 adapter->stats.xofftxc += er32(XOFFTXC);
3247 adapter->stats.fcruc += er32(FCRUC);
3248 adapter->stats.gptc += er32(GPTC);
3249 adapter->stats.gotcl += er32(GOTCL);
3250 adapter->stats.gotch += er32(GOTCH);
3251 adapter->stats.rnbc += er32(RNBC);
3252 adapter->stats.ruc += er32(RUC);
3253 adapter->stats.rfc += er32(RFC);
3254 adapter->stats.rjc += er32(RJC);
3255 adapter->stats.torl += er32(TORL);
3256 adapter->stats.torh += er32(TORH);
3257 adapter->stats.totl += er32(TOTL);
3258 adapter->stats.toth += er32(TOTH);
3259 adapter->stats.tpr += er32(TPR);
3260
1532ecea
JB		 3261 adapter->stats.ptc64 += er32(PTC64);
3262 adapter->stats.ptc127 += er32(PTC127);
3263 adapter->stats.ptc255 += er32(PTC255);
3264 adapter->stats.ptc511 += er32(PTC511);
3265 adapter->stats.ptc1023 += er32(PTC1023);
3266 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3267
3268 adapter->stats.mptc += er32(MPTC);
3269 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3270
3271 /* used for adaptive IFS */
3272
1dc32918 3273 hw->tx_packet_delta = er32(TPT);
1da177e4 3274 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3275 hw->collision_delta = er32(COLC);
1da177e4
LT		 3276 adapter->stats.colc += hw->collision_delta;
3277
96838a40 3278 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3279 adapter->stats.algnerrc += er32(ALGNERRC);
3280 adapter->stats.rxerrc += er32(RXERRC);
3281 adapter->stats.tncrs += er32(TNCRS);
3282 adapter->stats.cexterr += er32(CEXTERR);
3283 adapter->stats.tsctc += er32(TSCTC);
3284 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3285 }
3286
3287 /* Fill out the OS statistics structure */
5fe31def
AK		 3288 netdev->stats.multicast = adapter->stats.mprc;
3289 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3290
3291 /* Rx Errors */
3292
87041639
JK		 3293 /* RLEC on some newer hardware can be incorrect so build
3294 * our own version based on RUC and ROC */
5fe31def 3295 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3296 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3297 adapter->stats.ruc + adapter->stats.roc +
3298 adapter->stats.cexterr;
49559854 3299 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3300 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3301 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3302 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3303 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3304
3305 /* Tx Errors */
49559854 3306 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3307 netdev->stats.tx_errors = adapter->stats.txerrc;
3308 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3309 netdev->stats.tx_window_errors = adapter->stats.latecol;
3310 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3311 if (hw->bad_tx_carr_stats_fd &&
167fb284 3312 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3313 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3314 adapter->stats.tncrs = 0;
3315 }
1da177e4
LT		 3316
3317 /* Tx Dropped needs to be maintained elsewhere */
3318
3319 /* Phy Stats */
96838a40
JB		 3320 if (hw->media_type == e1000_media_type_copper) {
3321 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3322 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3323 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3324 adapter->phy_stats.idle_errors += phy_tmp;
3325 }
3326
96838a40 3327 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3328 (hw->phy_type == e1000_phy_m88) &&
3329 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3330 adapter->phy_stats.receive_errors += phy_tmp;
3331 }
3332
15e376b4 3333 /* Management Stats */
1dc32918
JP		 3334 if (hw->has_smbus) {
3335 adapter->stats.mgptc += er32(MGTPTC);
3336 adapter->stats.mgprc += er32(MGTPRC);
3337 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3338 }
3339
1da177e4
LT		 3340 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3341}
9ac98284 3342
1da177e4
LT		 3343/**
3344 * e1000_intr - Interrupt Handler
3345 * @irq: interrupt number
3346 * @data: pointer to a network interface device structure
1da177e4
LT		 3347 **/
3348
64798845 3349static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3350{
3351 struct net_device *netdev = data;
60490fe0 3352 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3353 struct e1000_hw *hw = &adapter->hw;
1532ecea 3354 u32 icr = er32(ICR);
c3570acb 3355
e151a60a 3356 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
835bb129
JB		 3357 return IRQ_NONE; /* Not our interrupt */
3358
96838a40 3359 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3360 hw->get_link_status = 1;
1314bbf3
AK		 3361 /* guard against interrupt when we're going down */
3362 if (!test_bit(__E1000_DOWN, &adapter->flags))
3363 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3364 }
3365
1532ecea
JB		 3366 /* disable interrupts, without the synchronize_irq bit */
3367 ew32(IMC, ~0);
3368 E1000_WRITE_FLUSH();
3369
288379f0 3370 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3371 adapter->total_tx_bytes = 0;
3372 adapter->total_tx_packets = 0;
3373 adapter->total_rx_bytes = 0;
3374 adapter->total_rx_packets = 0;
288379f0 3375 __napi_schedule(&adapter->napi);
a6c42322 3376 } else {
90fb5135
AK		 3377 /* this really should not happen! if it does it is basically a
3378 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3379 if (!test_bit(__E1000_DOWN, &adapter->flags))
3380 e1000_irq_enable(adapter);
3381 }
1da177e4 3382
1da177e4
LT		 3383 return IRQ_HANDLED;
3384}
3385
1da177e4
LT		 3386/**
3387 * e1000_clean - NAPI Rx polling callback
3388 * @adapter: board private structure
3389 **/
64798845 3390static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3391{
bea3348e 3392 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
650b5a5c 3393 int tx_clean_complete = 0, work_done = 0;
581d708e 3394
650b5a5c 3395 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3396
650b5a5c 3397 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3398
650b5a5c 3399 if (!tx_clean_complete)
d2c7ddd6
DM		 3400 work_done = budget;
3401
53e52c72
DM		 3402 /* If budget not fully consumed, exit the polling mode */
3403 if (work_done < budget) {
835bb129
JB		 3404 if (likely(adapter->itr_setting & 3))
3405 e1000_set_itr(adapter);
288379f0 3406 napi_complete(napi);
a6c42322
JB		 3407 if (!test_bit(__E1000_DOWN, &adapter->flags))
3408 e1000_irq_enable(adapter);
1da177e4
LT		 3409 }
3410
bea3348e 3411 return work_done;
1da177e4
LT		 3412}
3413
1da177e4
LT		 3414/**
3415 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3416 * @adapter: board private structure
3417 **/
64798845
JP		 3418static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3419 struct e1000_tx_ring *tx_ring)
1da177e4 3420{
1dc32918 3421 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3422 struct net_device *netdev = adapter->netdev;
3423 struct e1000_tx_desc *tx_desc, *eop_desc;
3424 struct e1000_buffer *buffer_info;
3425 unsigned int i, eop;
2a1af5d7 3426 unsigned int count = 0;
835bb129 3427 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3428
3429 i = tx_ring->next_to_clean;
3430 eop = tx_ring->buffer_info[i].next_to_watch;
3431 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3432
ccfb342c
AD		 3433 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3434 (count < tx_ring->count)) {
843f4267
JB		 3435 bool cleaned = false;
3436 for ( ; !cleaned; count++) {
1da177e4
LT		 3437 tx_desc = E1000_TX_DESC(*tx_ring, i);
3438 buffer_info = &tx_ring->buffer_info[i];
3439 cleaned = (i == eop);
3440
835bb129 3441 if (cleaned) {
2b65326e 3442 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3443 unsigned int segs, bytecount;
3444 segs = skb_shinfo(skb)->gso_segs ?: 1;
3445 /* multiply data chunks by size of headers */
3446 bytecount = ((segs - 1) * skb_headlen(skb)) +
3447 skb->len;
2b65326e 3448 total_tx_packets += segs;
7753b171 3449 total_tx_bytes += bytecount;
835bb129 3450 }
fd803241 3451 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3452 tx_desc->upper.data = 0;
1da177e4 3453
96838a40 3454 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3455 }
581d708e 3456
1da177e4
LT		 3457 eop = tx_ring->buffer_info[i].next_to_watch;
3458 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3459 }
3460
3461 tx_ring->next_to_clean = i;
3462
77b2aad5 3463#define TX_WAKE_THRESHOLD 32
843f4267 3464 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3465 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3466 /* Make sure that anybody stopping the queue after this
3467 * sees the new next_to_clean.
3468 */
3469 smp_mb();
cdd7549e
JB		 3470
3471 if (netif_queue_stopped(netdev) &&
3472 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3473 netif_wake_queue(netdev);
fcfb1224
JB		 3474 ++adapter->restart_queue;
3475 }
77b2aad5 3476 }
2648345f 3477
581d708e 3478 if (adapter->detect_tx_hung) {
2648345f 3479 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3480 * check with the clearing of time_stamp and movement of i */
c3033b01 3481 adapter->detect_tx_hung = false;
cdd7549e
JB		 3482 if (tx_ring->buffer_info[eop].time_stamp &&
3483 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
8e95a202
JP		 3484 (adapter->tx_timeout_factor * HZ)) &&
3485 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3486
3487 /* detected Tx unit hang */
c6963ef5 3488 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3489 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3490 " TDH <%x>\n"
3491 " TDT <%x>\n"
3492 " next_to_use <%x>\n"
3493 " next_to_clean <%x>\n"
3494 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3495 " time_stamp <%lx>\n"
3496 " next_to_watch <%x>\n"
3497 " jiffies <%lx>\n"
3498 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3499 (unsigned long)((tx_ring - adapter->tx_ring) /
3500 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3501 readl(hw->hw_addr + tx_ring->tdh),
3502 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3503 tx_ring->next_to_use,
392137fa 3504 tx_ring->next_to_clean,
cdd7549e 3505 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3506 eop,
3507 jiffies,
3508 eop_desc->upper.fields.status);
1da177e4 3509 netif_stop_queue(netdev);
70b8f1e1 3510 }
1da177e4 3511 }
835bb129
JB		 3512 adapter->total_tx_bytes += total_tx_bytes;
3513 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3514 netdev->stats.tx_bytes += total_tx_bytes;
3515 netdev->stats.tx_packets += total_tx_packets;
ccfb342c 3516 return (count < tx_ring->count);
1da177e4
LT		 3517}
3518
3519/**
3520 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3521 * @adapter: board private structure
3522 * @status_err: receive descriptor status and error fields
3523 * @csum: receive descriptor csum field
3524 * @sk_buff: socket buffer with received data
1da177e4
LT		 3525 **/
3526
64798845
JP		 3527static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3528 u32 csum, struct sk_buff *skb)
1da177e4 3529{
1dc32918 3530 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3531 u16 status = (u16)status_err;
3532 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3533 skb->ip_summed = CHECKSUM_NONE;
3534
1da177e4 3535 /* 82543 or newer only */
1dc32918 3536 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3537 /* Ignore Checksum bit is set */
96838a40 3538 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3539 /* TCP/UDP checksum error bit is set */
96838a40 3540 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3541 /* let the stack verify checksum errors */
1da177e4 3542 adapter->hw_csum_err++;
2d7edb92
MC		 3543 return;
3544 }
3545 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3546 if (!(status & E1000_RXD_STAT_TCPCS))
3547 return;
3548
2d7edb92
MC		 3549 /* It must be a TCP or UDP packet with a valid checksum */
3550 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3551 /* TCP checksum is good */
3552 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3553 }
2d7edb92 3554 adapter->hw_csum_good++;
1da177e4
LT		 3555}
3556
edbbb3ca
JB		 3557/**
3558 * e1000_consume_page - helper function
3559 **/
3560static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3561 u16 length)
3562{
3563 bi->page = NULL;
3564 skb->len += length;
3565 skb->data_len += length;
3566 skb->truesize += length;
3567}
3568
3569/**
3570 * e1000_receive_skb - helper function to handle rx indications
3571 * @adapter: board private structure
3572 * @status: descriptor status field as written by hardware
3573 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3574 * @skb: pointer to sk_buff to be indicated to stack
3575 */
3576static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3577 __le16 vlan, struct sk_buff *skb)
3578{
3579 if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) {
3580 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3581 le16_to_cpu(vlan) &
3582 E1000_RXD_SPC_VLAN_MASK);
3583 } else {
3584 netif_receive_skb(skb);
3585 }
3586}
3587
3588/**
3589 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3590 * @adapter: board private structure
3591 * @rx_ring: ring to clean
3592 * @work_done: amount of napi work completed this call
3593 * @work_to_do: max amount of work allowed for this call to do
3594 *
3595 * the return value indicates whether actual cleaning was done, there
3596 * is no guarantee that everything was cleaned
3597 */
3598static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3599 struct e1000_rx_ring *rx_ring,
3600 int *work_done, int work_to_do)
3601{
3602 struct e1000_hw *hw = &adapter->hw;
3603 struct net_device *netdev = adapter->netdev;
3604 struct pci_dev *pdev = adapter->pdev;
3605 struct e1000_rx_desc *rx_desc, *next_rxd;
3606 struct e1000_buffer *buffer_info, *next_buffer;
3607 unsigned long irq_flags;
3608 u32 length;
3609 unsigned int i;
3610 int cleaned_count = 0;
3611 bool cleaned = false;
3612 unsigned int total_rx_bytes=0, total_rx_packets=0;
3613
3614 i = rx_ring->next_to_clean;
3615 rx_desc = E1000_RX_DESC(*rx_ring, i);
3616 buffer_info = &rx_ring->buffer_info[i];
3617
3618 while (rx_desc->status & E1000_RXD_STAT_DD) {
3619 struct sk_buff *skb;
3620 u8 status;
3621
3622 if (*work_done >= work_to_do)
3623 break;
3624 (*work_done)++;
3625
3626 status = rx_desc->status;
3627 skb = buffer_info->skb;
3628 buffer_info->skb = NULL;
3629
3630 if (++i == rx_ring->count) i = 0;
3631 next_rxd = E1000_RX_DESC(*rx_ring, i);
3632 prefetch(next_rxd);
3633
3634 next_buffer = &rx_ring->buffer_info[i];
3635
3636 cleaned = true;
3637 cleaned_count++;
3638 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
3639 PCI_DMA_FROMDEVICE);
3640 buffer_info->dma = 0;
3641
3642 length = le16_to_cpu(rx_desc->length);
3643
3644 /* errors is only valid for DD + EOP descriptors */
3645 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3646 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3647 u8 last_byte = *(skb->data + length - 1);
3648 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3649 last_byte)) {
3650 spin_lock_irqsave(&adapter->stats_lock,
3651 irq_flags);
3652 e1000_tbi_adjust_stats(hw, &adapter->stats,
3653 length, skb->data);
3654 spin_unlock_irqrestore(&adapter->stats_lock,
3655 irq_flags);
3656 length--;
3657 } else {
3658 /* recycle both page and skb */
3659 buffer_info->skb = skb;
3660 /* an error means any chain goes out the window
3661 * too */
3662 if (rx_ring->rx_skb_top)
3663 dev_kfree_skb(rx_ring->rx_skb_top);
3664 rx_ring->rx_skb_top = NULL;
3665 goto next_desc;
3666 }
3667 }
3668
3669#define rxtop rx_ring->rx_skb_top
3670 if (!(status & E1000_RXD_STAT_EOP)) {
3671 /* this descriptor is only the beginning (or middle) */
3672 if (!rxtop) {
3673 /* this is the beginning of a chain */
3674 rxtop = skb;
3675 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3676 0, length);
3677 } else {
3678 /* this is the middle of a chain */
3679 skb_fill_page_desc(rxtop,
3680 skb_shinfo(rxtop)->nr_frags,
3681 buffer_info->page, 0, length);
3682 /* re-use the skb, only consumed the page */
3683 buffer_info->skb = skb;
3684 }
3685 e1000_consume_page(buffer_info, rxtop, length);
3686 goto next_desc;
3687 } else {
3688 if (rxtop) {
3689 /* end of the chain */
3690 skb_fill_page_desc(rxtop,
3691 skb_shinfo(rxtop)->nr_frags,
3692 buffer_info->page, 0, length);
3693 /* re-use the current skb, we only consumed the
3694 * page */
3695 buffer_info->skb = skb;
3696 skb = rxtop;
3697 rxtop = NULL;
3698 e1000_consume_page(buffer_info, skb, length);
3699 } else {
3700 /* no chain, got EOP, this buf is the packet
3701 * copybreak to save the put_page/alloc_page */
3702 if (length <= copybreak &&
3703 skb_tailroom(skb) >= length) {
3704 u8 *vaddr;
3705 vaddr = kmap_atomic(buffer_info->page,
3706 KM_SKB_DATA_SOFTIRQ);
3707 memcpy(skb_tail_pointer(skb), vaddr, length);
3708 kunmap_atomic(vaddr,
3709 KM_SKB_DATA_SOFTIRQ);
3710 /* re-use the page, so don't erase
3711 * buffer_info->page */
3712 skb_put(skb, length);
3713 } else {
3714 skb_fill_page_desc(skb, 0,
3715 buffer_info->page, 0,
3716 length);
3717 e1000_consume_page(buffer_info, skb,
3718 length);
3719 }
3720 }
3721 }
3722
3723 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3724 e1000_rx_checksum(adapter,
3725 (u32)(status) |
3726 ((u32)(rx_desc->errors) << 24),
3727 le16_to_cpu(rx_desc->csum), skb);
3728
3729 pskb_trim(skb, skb->len - 4);
3730
3731 /* probably a little skewed due to removing CRC */
3732 total_rx_bytes += skb->len;
3733 total_rx_packets++;
3734
3735 /* eth type trans needs skb->data to point to something */
3736 if (!pskb_may_pull(skb, ETH_HLEN)) {
3737 DPRINTK(DRV, ERR, "pskb_may_pull failed.\n");
3738 dev_kfree_skb(skb);
3739 goto next_desc;
3740 }
3741
3742 skb->protocol = eth_type_trans(skb, netdev);
3743
3744 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3745
3746next_desc:
3747 rx_desc->status = 0;
3748
3749 /* return some buffers to hardware, one at a time is too slow */
3750 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3751 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3752 cleaned_count = 0;
3753 }
3754
3755 /* use prefetched values */
3756 rx_desc = next_rxd;
3757 buffer_info = next_buffer;
3758 }
3759 rx_ring->next_to_clean = i;
3760
3761 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3762 if (cleaned_count)
3763 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3764
3765 adapter->total_rx_packets += total_rx_packets;
3766 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3767 netdev->stats.rx_bytes += total_rx_bytes;
3768 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 3769 return cleaned;
3770}
3771
1da177e4 3772/**
2d7edb92 3773 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3774 * @adapter: board private structure
edbbb3ca
JB		 3775 * @rx_ring: ring to clean
3776 * @work_done: amount of napi work completed this call
3777 * @work_to_do: max amount of work allowed for this call to do
3778 */
64798845
JP		 3779static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3780 struct e1000_rx_ring *rx_ring,
3781 int *work_done, int work_to_do)
1da177e4 3782{
1dc32918 3783 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3784 struct net_device *netdev = adapter->netdev;
3785 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3786 struct e1000_rx_desc *rx_desc, *next_rxd;
3787 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3788 unsigned long flags;
406874a7 3789 u32 length;
1da177e4 3790 unsigned int i;
72d64a43 3791 int cleaned_count = 0;
c3033b01 3792 bool cleaned = false;
835bb129 3793 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3794
3795 i = rx_ring->next_to_clean;
3796 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3797 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3798
b92ff8ee 3799 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3800 struct sk_buff *skb;
a292ca6e 3801 u8 status;
90fb5135 3802
96838a40 3803 if (*work_done >= work_to_do)
1da177e4
LT		 3804 break;
3805 (*work_done)++;
c3570acb 3806
a292ca6e 3807 status = rx_desc->status;
b92ff8ee 3808 skb = buffer_info->skb;
86c3d59f
JB		 3809 buffer_info->skb = NULL;
3810
30320be8
JK		 3811 prefetch(skb->data - NET_IP_ALIGN);
3812
86c3d59f
JB		 3813 if (++i == rx_ring->count) i = 0;
3814 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3815 prefetch(next_rxd);
3816
86c3d59f 3817 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3818
c3033b01 3819 cleaned = true;
72d64a43 3820 cleaned_count++;
edbbb3ca 3821 pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
1da177e4 3822 PCI_DMA_FROMDEVICE);
679be3ba 3823 buffer_info->dma = 0;
1da177e4 3824
1da177e4 3825 length = le16_to_cpu(rx_desc->length);
ea30e119 3826 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 3827 * packet, if thats the case we need to toss it. In fact, we
3828 * to toss every packet with the EOP bit clear and the next
3829 * frame that _does_ have the EOP bit set, as it is by
3830 * definition only a frame fragment
3831 */
3832 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
3833 adapter->discarding = true;
3834
3835 if (adapter->discarding) {
a1415ee6
JK		 3836 /* All receives must fit into a single buffer */
3837 E1000_DBG("%s: Receive packet consumed multiple"
3838 " buffers\n", netdev->name);
864c4e45 3839 /* recycle */
8fc897b0 3840 buffer_info->skb = skb;
40a14dea
JB		 3841 if (status & E1000_RXD_STAT_EOP)
3842 adapter->discarding = false;
1da177e4
LT		 3843 goto next_desc;
3844 }
3845
96838a40 3846 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 3847 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 3848 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3849 last_byte)) {
1da177e4 3850 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 3851 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 3852 length, skb->data);
3853 spin_unlock_irqrestore(&adapter->stats_lock,
3854 flags);
3855 length--;
3856 } else {
9e2feace
AK		 3857 /* recycle */
3858 buffer_info->skb = skb;
1da177e4
LT		 3859 goto next_desc;
3860 }
1cb5821f 3861 }
1da177e4 3862
d2a1e213
JB		 3863 /* adjust length to remove Ethernet CRC, this must be
3864 * done after the TBI_ACCEPT workaround above */
3865 length -= 4;
3866
835bb129
JB		 3867 /* probably a little skewed due to removing CRC */
3868 total_rx_bytes += length;
3869 total_rx_packets++;
3870
a292ca6e
JK		 3871 /* code added for copybreak, this should improve
3872 * performance for small packets with large amounts
3873 * of reassembly being done in the stack */
1f753861 3874 if (length < copybreak) {
a292ca6e 3875 struct sk_buff *new_skb =
89d71a66 3876 netdev_alloc_skb_ip_align(netdev, length);
a292ca6e 3877 if (new_skb) {
27d7ff46
ACM		 3878 skb_copy_to_linear_data_offset(new_skb,
3879 -NET_IP_ALIGN,
3880 (skb->data -
3881 NET_IP_ALIGN),
3882 (length +
3883 NET_IP_ALIGN));
a292ca6e
JK		 3884 /* save the skb in buffer_info as good */
3885 buffer_info->skb = skb;
3886 skb = new_skb;
a292ca6e 3887 }
996695de
AK		 3888 /* else just continue with the old one */
3889 }
a292ca6e 3890 /* end copybreak code */
996695de 3891 skb_put(skb, length);
1da177e4
LT		 3892
3893 /* Receive Checksum Offload */
a292ca6e 3894 e1000_rx_checksum(adapter,
406874a7
JP		 3895 (u32)(status) |
3896 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 3897 le16_to_cpu(rx_desc->csum), skb);
96838a40 3898
1da177e4 3899 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 3900
edbbb3ca 3901 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 3902
1da177e4
LT		 3903next_desc:
3904 rx_desc->status = 0;
1da177e4 3905
72d64a43
JK		 3906 /* return some buffers to hardware, one at a time is too slow */
3907 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3908 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3909 cleaned_count = 0;
3910 }
3911
30320be8 3912 /* use prefetched values */
86c3d59f
JB		 3913 rx_desc = next_rxd;
3914 buffer_info = next_buffer;
1da177e4 3915 }
1da177e4 3916 rx_ring->next_to_clean = i;
72d64a43
JK		 3917
3918 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3919 if (cleaned_count)
3920 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 3921
835bb129
JB		 3922 adapter->total_rx_packets += total_rx_packets;
3923 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3924 netdev->stats.rx_bytes += total_rx_bytes;
3925 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 3926 return cleaned;
3927}
3928
edbbb3ca
JB		 3929/**
3930 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
3931 * @adapter: address of board private structure
3932 * @rx_ring: pointer to receive ring structure
3933 * @cleaned_count: number of buffers to allocate this pass
3934 **/
3935
3936static void
3937e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
3938 struct e1000_rx_ring *rx_ring, int cleaned_count)
3939{
3940 struct net_device *netdev = adapter->netdev;
3941 struct pci_dev *pdev = adapter->pdev;
3942 struct e1000_rx_desc *rx_desc;
3943 struct e1000_buffer *buffer_info;
3944 struct sk_buff *skb;
3945 unsigned int i;
89d71a66 3946 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 3947
3948 i = rx_ring->next_to_use;
3949 buffer_info = &rx_ring->buffer_info[i];
3950
3951 while (cleaned_count--) {
3952 skb = buffer_info->skb;
3953 if (skb) {
3954 skb_trim(skb, 0);
3955 goto check_page;
3956 }
3957
89d71a66 3958 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3959 if (unlikely(!skb)) {
3960 /* Better luck next round */
3961 adapter->alloc_rx_buff_failed++;
3962 break;
3963 }
3964
3965 /* Fix for errata 23, can't cross 64kB boundary */
3966 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3967 struct sk_buff *oldskb = skb;
3968 DPRINTK(PROBE, ERR, "skb align check failed: %u bytes "
3969 "at %p\n", bufsz, skb->data);
3970 /* Try again, without freeing the previous */
89d71a66 3971 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 3972 /* Failed allocation, critical failure */
3973 if (!skb) {
3974 dev_kfree_skb(oldskb);
3975 adapter->alloc_rx_buff_failed++;
3976 break;
3977 }
3978
3979 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3980 /* give up */
3981 dev_kfree_skb(skb);
3982 dev_kfree_skb(oldskb);
3983 break; /* while (cleaned_count--) */
3984 }
3985
3986 /* Use new allocation */
3987 dev_kfree_skb(oldskb);
3988 }
edbbb3ca
JB		 3989 buffer_info->skb = skb;
3990 buffer_info->length = adapter->rx_buffer_len;
3991check_page:
3992 /* allocate a new page if necessary */
3993 if (!buffer_info->page) {
3994 buffer_info->page = alloc_page(GFP_ATOMIC);
3995 if (unlikely(!buffer_info->page)) {
3996 adapter->alloc_rx_buff_failed++;
3997 break;
3998 }
3999 }
4000
b5abb028 4001 if (!buffer_info->dma) {
edbbb3ca
JB		 4002 buffer_info->dma = pci_map_page(pdev,
4003 buffer_info->page, 0,
4004 buffer_info->length,
4005 PCI_DMA_FROMDEVICE);
b5abb028
AB		 4006 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
4007 put_page(buffer_info->page);
4008 dev_kfree_skb(skb);
4009 buffer_info->page = NULL;
4010 buffer_info->skb = NULL;
4011 buffer_info->dma = 0;
4012 adapter->alloc_rx_buff_failed++;
4013 break; /* while !buffer_info->skb */
4014 }
4015 }
edbbb3ca
JB		 4016
4017 rx_desc = E1000_RX_DESC(*rx_ring, i);
4018 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4019
4020 if (unlikely(++i == rx_ring->count))
4021 i = 0;
4022 buffer_info = &rx_ring->buffer_info[i];
4023 }
4024
4025 if (likely(rx_ring->next_to_use != i)) {
4026 rx_ring->next_to_use = i;
4027 if (unlikely(i-- == 0))
4028 i = (rx_ring->count - 1);
4029
4030 /* Force memory writes to complete before letting h/w
4031 * know there are new descriptors to fetch. (Only
4032 * applicable for weak-ordered memory model archs,
4033 * such as IA-64). */
4034 wmb();
4035 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4036 }
4037}
4038
1da177e4 4039/**
2d7edb92 4040 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4041 * @adapter: address of board private structure
4042 **/
4043
64798845
JP		 4044static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4045 struct e1000_rx_ring *rx_ring,
4046 int cleaned_count)
1da177e4 4047{
1dc32918 4048 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4049 struct net_device *netdev = adapter->netdev;
4050 struct pci_dev *pdev = adapter->pdev;
4051 struct e1000_rx_desc *rx_desc;
4052 struct e1000_buffer *buffer_info;
4053 struct sk_buff *skb;
2648345f 4054 unsigned int i;
89d71a66 4055 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4056
4057 i = rx_ring->next_to_use;
4058 buffer_info = &rx_ring->buffer_info[i];
4059
a292ca6e 4060 while (cleaned_count--) {
ca6f7224
CH		 4061 skb = buffer_info->skb;
4062 if (skb) {
a292ca6e
JK		 4063 skb_trim(skb, 0);
4064 goto map_skb;
4065 }
4066
89d71a66 4067 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4068 if (unlikely(!skb)) {
1da177e4 4069 /* Better luck next round */
72d64a43 4070 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4071 break;
4072 }
4073
2648345f 4074 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4075 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4076 struct sk_buff *oldskb = skb;
2648345f
MC		 4077 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4078 "at %p\n", bufsz, skb->data);
4079 /* Try again, without freeing the previous */
89d71a66 4080 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4081 /* Failed allocation, critical failure */
1da177e4
LT		 4082 if (!skb) {
4083 dev_kfree_skb(oldskb);
edbbb3ca 4084 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4085 break;
4086 }
2648345f 4087
1da177e4
LT		 4088 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4089 /* give up */
4090 dev_kfree_skb(skb);
4091 dev_kfree_skb(oldskb);
edbbb3ca 4092 adapter->alloc_rx_buff_failed++;
1da177e4 4093 break; /* while !buffer_info->skb */
1da177e4 4094 }
ca6f7224
CH		 4095
4096 /* Use new allocation */
4097 dev_kfree_skb(oldskb);
1da177e4 4098 }
1da177e4
LT		 4099 buffer_info->skb = skb;
4100 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4101map_skb:
1da177e4
LT		 4102 buffer_info->dma = pci_map_single(pdev,
4103 skb->data,
edbbb3ca 4104 buffer_info->length,
1da177e4 4105 PCI_DMA_FROMDEVICE);
b5abb028
AB		 4106 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
4107 dev_kfree_skb(skb);
4108 buffer_info->skb = NULL;
4109 buffer_info->dma = 0;
4110 adapter->alloc_rx_buff_failed++;
4111 break; /* while !buffer_info->skb */
4112 }
1da177e4 4113
edbbb3ca
JB		 4114 /*
4115 * XXX if it was allocated cleanly it will never map to a
4116 * boundary crossing
4117 */
4118
2648345f
MC		 4119 /* Fix for errata 23, can't cross 64kB boundary */
4120 if (!e1000_check_64k_bound(adapter,
4121 (void *)(unsigned long)buffer_info->dma,
4122 adapter->rx_buffer_len)) {
4123 DPRINTK(RX_ERR, ERR,
4124 "dma align check failed: %u bytes at %p\n",
4125 adapter->rx_buffer_len,
4126 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4127 dev_kfree_skb(skb);
4128 buffer_info->skb = NULL;
4129
2648345f 4130 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4131 adapter->rx_buffer_len,
4132 PCI_DMA_FROMDEVICE);
679be3ba 4133 buffer_info->dma = 0;
1da177e4 4134
edbbb3ca 4135 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4136 break; /* while !buffer_info->skb */
4137 }
1da177e4
LT		 4138 rx_desc = E1000_RX_DESC(*rx_ring, i);
4139 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4140
96838a40
JB		 4141 if (unlikely(++i == rx_ring->count))
4142 i = 0;
1da177e4
LT		 4143 buffer_info = &rx_ring->buffer_info[i];
4144 }
4145
b92ff8ee
JB		 4146 if (likely(rx_ring->next_to_use != i)) {
4147 rx_ring->next_to_use = i;
4148 if (unlikely(i-- == 0))
4149 i = (rx_ring->count - 1);
4150
4151 /* Force memory writes to complete before letting h/w
4152 * know there are new descriptors to fetch. (Only
4153 * applicable for weak-ordered memory model archs,
4154 * such as IA-64). */
4155 wmb();
1dc32918 4156 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4157 }
1da177e4
LT		 4158}
4159
4160/**
4161 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4162 * @adapter:
4163 **/
4164
64798845 4165static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4166{
1dc32918 4167 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4168 u16 phy_status;
4169 u16 phy_ctrl;
1da177e4 4170
1dc32918
JP		 4171 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4172 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4173 return;
4174
96838a40 4175 if (adapter->smartspeed == 0) {
1da177e4
LT		 4176 /* If Master/Slave config fault is asserted twice,
4177 * we assume back-to-back */
1dc32918 4178 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4179 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4180 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4181 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4182 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4183 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4184 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4185 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4186 phy_ctrl);
4187 adapter->smartspeed++;
1dc32918
JP		 4188 if (!e1000_phy_setup_autoneg(hw) &&
4189 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4190 &phy_ctrl)) {
4191 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4192 MII_CR_RESTART_AUTO_NEG);
1dc32918 4193 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4194 phy_ctrl);
4195 }
4196 }
4197 return;
96838a40 4198 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4199 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4200 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4201 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4202 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4203 if (!e1000_phy_setup_autoneg(hw) &&
4204 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4205 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4206 MII_CR_RESTART_AUTO_NEG);
1dc32918 4207 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4208 }
4209 }
4210 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4211 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4212 adapter->smartspeed = 0;
4213}
4214
4215/**
4216 * e1000_ioctl -
4217 * @netdev:
4218 * @ifreq:
4219 * @cmd:
4220 **/
4221
64798845 4222static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4223{
4224 switch (cmd) {
4225 case SIOCGMIIPHY:
4226 case SIOCGMIIREG:
4227 case SIOCSMIIREG:
4228 return e1000_mii_ioctl(netdev, ifr, cmd);
4229 default:
4230 return -EOPNOTSUPP;
4231 }
4232}
4233
4234/**
4235 * e1000_mii_ioctl -
4236 * @netdev:
4237 * @ifreq:
4238 * @cmd:
4239 **/
4240
64798845
JP		 4241static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4242 int cmd)
1da177e4 4243{
60490fe0 4244 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4245 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4246 struct mii_ioctl_data *data = if_mii(ifr);
4247 int retval;
406874a7
JP		 4248 u16 mii_reg;
4249 u16 spddplx;
97876fc6 4250 unsigned long flags;
1da177e4 4251
1dc32918 4252 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4253 return -EOPNOTSUPP;
4254
4255 switch (cmd) {
4256 case SIOCGMIIPHY:
1dc32918 4257 data->phy_id = hw->phy_addr;
1da177e4
LT		 4258 break;
4259 case SIOCGMIIREG:
97876fc6 4260 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4261 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4262 &data->val_out)) {
4263 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4264 return -EIO;
97876fc6
MC		 4265 }
4266 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4267 break;
4268 case SIOCSMIIREG:
96838a40 4269 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4270 return -EFAULT;
4271 mii_reg = data->val_in;
97876fc6 4272 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4273 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4274 mii_reg)) {
4275 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4276 return -EIO;
97876fc6 4277 }
f0163ac4 4278 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4279 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4280 switch (data->reg_num) {
4281 case PHY_CTRL:
96838a40 4282 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4283 break;
96838a40 4284 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4285 hw->autoneg = 1;
4286 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4287 } else {
4288 if (mii_reg & 0x40)
4289 spddplx = SPEED_1000;
4290 else if (mii_reg & 0x2000)
4291 spddplx = SPEED_100;
4292 else
4293 spddplx = SPEED_10;
4294 spddplx += (mii_reg & 0x100)
cb764326
JK		 4295 ? DUPLEX_FULL :
4296 DUPLEX_HALF;
1da177e4
LT		 4297 retval = e1000_set_spd_dplx(adapter,
4298 spddplx);
f0163ac4 4299 if (retval)
1da177e4
LT		 4300 return retval;
4301 }
2db10a08
AK		 4302 if (netif_running(adapter->netdev))
4303 e1000_reinit_locked(adapter);
4304 else
1da177e4
LT		 4305 e1000_reset(adapter);
4306 break;
4307 case M88E1000_PHY_SPEC_CTRL:
4308 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4309 if (e1000_phy_reset(hw))
1da177e4
LT		 4310 return -EIO;
4311 break;
4312 }
4313 } else {
4314 switch (data->reg_num) {
4315 case PHY_CTRL:
96838a40 4316 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4317 break;
2db10a08
AK		 4318 if (netif_running(adapter->netdev))
4319 e1000_reinit_locked(adapter);
4320 else
1da177e4
LT		 4321 e1000_reset(adapter);
4322 break;
4323 }
4324 }
4325 break;
4326 default:
4327 return -EOPNOTSUPP;
4328 }
4329 return E1000_SUCCESS;
4330}
4331
64798845 4332void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4333{
4334 struct e1000_adapter *adapter = hw->back;
2648345f 4335 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4336
96838a40 4337 if (ret_val)
2648345f 4338 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4339}
4340
64798845 4341void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4342{
4343 struct e1000_adapter *adapter = hw->back;
4344
4345 pci_clear_mwi(adapter->pdev);
4346}
4347
64798845 4348int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4349{
4350 struct e1000_adapter *adapter = hw->back;
4351 return pcix_get_mmrbc(adapter->pdev);
4352}
4353
64798845 4354void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4355{
4356 struct e1000_adapter *adapter = hw->back;
4357 pcix_set_mmrbc(adapter->pdev, mmrbc);
4358}
4359
64798845 4360void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4361{
4362 outl(value, port);
4363}
4364
64798845
JP		 4365static void e1000_vlan_rx_register(struct net_device *netdev,
4366 struct vlan_group *grp)
1da177e4 4367{
60490fe0 4368 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4369 struct e1000_hw *hw = &adapter->hw;
406874a7 4370 u32 ctrl, rctl;
1da177e4 4371
9150b76a
JB		 4372 if (!test_bit(__E1000_DOWN, &adapter->flags))
4373 e1000_irq_disable(adapter);
1da177e4
LT		 4374 adapter->vlgrp = grp;
4375
96838a40 4376 if (grp) {
1da177e4 4377 /* enable VLAN tag insert/strip */
1dc32918 4378 ctrl = er32(CTRL);
1da177e4 4379 ctrl |= E1000_CTRL_VME;
1dc32918 4380 ew32(CTRL, ctrl);
1da177e4 4381
1532ecea
JB		 4382 /* enable VLAN receive filtering */
4383 rctl = er32(RCTL);
4384 rctl &= ~E1000_RCTL_CFIEN;
4385 if (!(netdev->flags & IFF_PROMISC))
4386 rctl |= E1000_RCTL_VFE;
4387 ew32(RCTL, rctl);
4388 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4389 } else {
4390 /* disable VLAN tag insert/strip */
1dc32918 4391 ctrl = er32(CTRL);
1da177e4 4392 ctrl &= ~E1000_CTRL_VME;
1dc32918 4393 ew32(CTRL, ctrl);
1da177e4 4394
1532ecea
JB		 4395 /* disable VLAN receive filtering */
4396 rctl = er32(RCTL);
4397 rctl &= ~E1000_RCTL_VFE;
4398 ew32(RCTL, rctl);
fd38d7a0 4399
1532ecea 4400 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
120a5d0d 4401 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1532ecea 4402 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
cd94dd0b 4403 }
1da177e4
LT		 4404 }
4405
9150b76a
JB		 4406 if (!test_bit(__E1000_DOWN, &adapter->flags))
4407 e1000_irq_enable(adapter);
1da177e4
LT		 4408}
4409
64798845 4410static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4411{
60490fe0 4412 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4413 struct e1000_hw *hw = &adapter->hw;
406874a7 4414 u32 vfta, index;
96838a40 4415
1dc32918 4416 if ((hw->mng_cookie.status &
96838a40
JB		 4417 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4418 (vid == adapter->mng_vlan_id))
2d7edb92 4419 return;
1da177e4
LT		 4420 /* add VID to filter table */
4421 index = (vid >> 5) & 0x7F;
1dc32918 4422 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4423 vfta |= (1 << (vid & 0x1F));
1dc32918 4424 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4425}
4426
64798845 4427static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4428{
60490fe0 4429 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4430 struct e1000_hw *hw = &adapter->hw;
406874a7 4431 u32 vfta, index;
1da177e4 4432
9150b76a
JB		 4433 if (!test_bit(__E1000_DOWN, &adapter->flags))
4434 e1000_irq_disable(adapter);
5c15bdec 4435 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4436 if (!test_bit(__E1000_DOWN, &adapter->flags))
4437 e1000_irq_enable(adapter);
1da177e4
LT		 4438
4439 /* remove VID from filter table */
4440 index = (vid >> 5) & 0x7F;
1dc32918 4441 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4442 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4443 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4444}
4445
64798845 4446static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4447{
4448 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4449
96838a40 4450 if (adapter->vlgrp) {
406874a7 4451 u16 vid;
96838a40 4452 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4453 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4454 continue;
4455 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4456 }
4457 }
4458}
4459
64798845 4460int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4461{
1dc32918
JP		 4462 struct e1000_hw *hw = &adapter->hw;
4463
4464 hw->autoneg = 0;
1da177e4 4465
6921368f 4466 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4467 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4468 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4469 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4470 return -EINVAL;
4471 }
4472
96838a40 4473 switch (spddplx) {
1da177e4 4474 case SPEED_10 + DUPLEX_HALF:
1dc32918 4475 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4476 break;
4477 case SPEED_10 + DUPLEX_FULL:
1dc32918 4478 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4479 break;
4480 case SPEED_100 + DUPLEX_HALF:
1dc32918 4481 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4482 break;
4483 case SPEED_100 + DUPLEX_FULL:
1dc32918 4484 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4485 break;
4486 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4487 hw->autoneg = 1;
4488 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4489 break;
4490 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4491 default:
2648345f 4492 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4493 return -EINVAL;
4494 }
4495 return 0;
4496}
4497
b43fcd7d 4498static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4499{
4500 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4501 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4502 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4503 u32 ctrl, ctrl_ext, rctl, status;
4504 u32 wufc = adapter->wol;
6fdfef16 4505#ifdef CONFIG_PM
240b1710 4506 int retval = 0;
6fdfef16 4507#endif
1da177e4
LT		 4508
4509 netif_device_detach(netdev);
4510
2db10a08
AK		 4511 if (netif_running(netdev)) {
4512 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4513 e1000_down(adapter);
2db10a08 4514 }
1da177e4 4515
2f82665f 4516#ifdef CONFIG_PM
1d33e9c6 4517 retval = pci_save_state(pdev);
2f82665f
JB		 4518 if (retval)
4519 return retval;
4520#endif
4521
1dc32918 4522 status = er32(STATUS);
96838a40 4523 if (status & E1000_STATUS_LU)
1da177e4
LT		 4524 wufc &= ~E1000_WUFC_LNKC;
4525
96838a40 4526 if (wufc) {
1da177e4 4527 e1000_setup_rctl(adapter);
db0ce50d 4528 e1000_set_rx_mode(netdev);
1da177e4
LT		 4529
4530 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4531 if (wufc & E1000_WUFC_MC) {
1dc32918 4532 rctl = er32(RCTL);
1da177e4 4533 rctl |= E1000_RCTL_MPE;
1dc32918 4534 ew32(RCTL, rctl);
1da177e4
LT		 4535 }
4536
1dc32918
JP		 4537 if (hw->mac_type >= e1000_82540) {
4538 ctrl = er32(CTRL);
1da177e4
LT		 4539 /* advertise wake from D3Cold */
4540 #define E1000_CTRL_ADVD3WUC 0x00100000
4541 /* phy power management enable */
4542 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4543 ctrl |= E1000_CTRL_ADVD3WUC |
4544 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4545 ew32(CTRL, ctrl);
1da177e4
LT		 4546 }
4547
1dc32918 4548 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4549 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4550 /* keep the laser running in D3 */
1dc32918 4551 ctrl_ext = er32(CTRL_EXT);
1da177e4 4552 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4553 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4554 }
4555
1dc32918
JP		 4556 ew32(WUC, E1000_WUC_PME_EN);
4557 ew32(WUFC, wufc);
1da177e4 4558 } else {
1dc32918
JP		 4559 ew32(WUC, 0);
4560 ew32(WUFC, 0);
1da177e4
LT		 4561 }
4562
0fccd0e9
JG		 4563 e1000_release_manageability(adapter);
4564
b43fcd7d
RW		 4565 *enable_wake = !!wufc;
4566
0fccd0e9 4567 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4568 if (adapter->en_mng_pt)
4569 *enable_wake = true;
1da177e4 4570
edd106fc
AK		 4571 if (netif_running(netdev))
4572 e1000_free_irq(adapter);
4573
1da177e4 4574 pci_disable_device(pdev);
240b1710 4575
1da177e4
LT		 4576 return 0;
4577}
4578
2f82665f 4579#ifdef CONFIG_PM
b43fcd7d
RW		 4580static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4581{
4582 int retval;
4583 bool wake;
4584
4585 retval = __e1000_shutdown(pdev, &wake);
4586 if (retval)
4587 return retval;
4588
4589 if (wake) {
4590 pci_prepare_to_sleep(pdev);
4591 } else {
4592 pci_wake_from_d3(pdev, false);
4593 pci_set_power_state(pdev, PCI_D3hot);
4594 }
4595
4596 return 0;
4597}
4598
64798845 4599static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4600{
4601 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4602 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4603 struct e1000_hw *hw = &adapter->hw;
406874a7 4604 u32 err;
1da177e4 4605
d0e027db 4606 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4607 pci_restore_state(pdev);
dbb5aaeb 4608 pci_save_state(pdev);
81250297
TI		 4609
4610 if (adapter->need_ioport)
4611 err = pci_enable_device(pdev);
4612 else
4613 err = pci_enable_device_mem(pdev);
c7be73bc 4614 if (err) {
3d1dd8cb
AK		 4615 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4616 return err;
4617 }
a4cb847d 4618 pci_set_master(pdev);
1da177e4 4619
d0e027db
AK		 4620 pci_enable_wake(pdev, PCI_D3hot, 0);
4621 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4622
c7be73bc
JP		 4623 if (netif_running(netdev)) {
4624 err = e1000_request_irq(adapter);
4625 if (err)
4626 return err;
4627 }
edd106fc
AK		 4628
4629 e1000_power_up_phy(adapter);
1da177e4 4630 e1000_reset(adapter);
1dc32918 4631 ew32(WUS, ~0);
1da177e4 4632
0fccd0e9
JG		 4633 e1000_init_manageability(adapter);
4634
96838a40 4635 if (netif_running(netdev))
1da177e4
LT		 4636 e1000_up(adapter);
4637
4638 netif_device_attach(netdev);
4639
1da177e4
LT		 4640 return 0;
4641}
4642#endif
c653e635
AK		 4643
4644static void e1000_shutdown(struct pci_dev *pdev)
4645{
b43fcd7d
RW		 4646 bool wake;
4647
4648 __e1000_shutdown(pdev, &wake);
4649
4650 if (system_state == SYSTEM_POWER_OFF) {
4651 pci_wake_from_d3(pdev, wake);
4652 pci_set_power_state(pdev, PCI_D3hot);
4653 }
c653e635
AK		 4654}
4655
1da177e4
LT		 4656#ifdef CONFIG_NET_POLL_CONTROLLER
4657/*
4658 * Polling 'interrupt' - used by things like netconsole to send skbs
4659 * without having to re-enable interrupts. It's not called while
4660 * the interrupt routine is executing.
4661 */
64798845 4662static void e1000_netpoll(struct net_device *netdev)
1da177e4 4663{
60490fe0 4664 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4665
1da177e4 4666 disable_irq(adapter->pdev->irq);
7d12e780 4667 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4668 enable_irq(adapter->pdev->irq);
4669}
4670#endif
4671
9026729b
AK		 4672/**
4673 * e1000_io_error_detected - called when PCI error is detected
4674 * @pdev: Pointer to PCI device
120a5d0d 4675 * @state: The current pci connection state
9026729b
AK		 4676 *
4677 * This function is called after a PCI bus error affecting
4678 * this device has been detected.
4679 */
64798845
JP		 4680static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4681 pci_channel_state_t state)
9026729b
AK		 4682{
4683 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4684 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4685
4686 netif_device_detach(netdev);
4687
eab63302
AD		 4688 if (state == pci_channel_io_perm_failure)
4689 return PCI_ERS_RESULT_DISCONNECT;
4690
9026729b
AK		 4691 if (netif_running(netdev))
4692 e1000_down(adapter);
72e8d6bb 4693 pci_disable_device(pdev);
9026729b
AK		 4694
4695 /* Request a slot slot reset. */
4696 return PCI_ERS_RESULT_NEED_RESET;
4697}
4698
4699/**
4700 * e1000_io_slot_reset - called after the pci bus has been reset.
4701 * @pdev: Pointer to PCI device
4702 *
4703 * Restart the card from scratch, as if from a cold-boot. Implementation
4704 * resembles the first-half of the e1000_resume routine.
4705 */
4706static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4707{
4708 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4709 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4710 struct e1000_hw *hw = &adapter->hw;
81250297 4711 int err;
9026729b 4712
81250297
TI		 4713 if (adapter->need_ioport)
4714 err = pci_enable_device(pdev);
4715 else
4716 err = pci_enable_device_mem(pdev);
4717 if (err) {
9026729b
AK		 4718 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4719 return PCI_ERS_RESULT_DISCONNECT;
4720 }
4721 pci_set_master(pdev);
4722
dbf38c94
LV		 4723 pci_enable_wake(pdev, PCI_D3hot, 0);
4724 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4725
9026729b 4726 e1000_reset(adapter);
1dc32918 4727 ew32(WUS, ~0);
9026729b
AK		 4728
4729 return PCI_ERS_RESULT_RECOVERED;
4730}
4731
4732/**
4733 * e1000_io_resume - called when traffic can start flowing again.
4734 * @pdev: Pointer to PCI device
4735 *
4736 * This callback is called when the error recovery driver tells us that
4737 * its OK to resume normal operation. Implementation resembles the
4738 * second-half of the e1000_resume routine.
4739 */
4740static void e1000_io_resume(struct pci_dev *pdev)
4741{
4742 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4743 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 4744
4745 e1000_init_manageability(adapter);
9026729b
AK		 4746
4747 if (netif_running(netdev)) {
4748 if (e1000_up(adapter)) {
4749 printk("e1000: can't bring device back up after reset\n");
4750 return;
4751 }
4752 }
4753
4754 netif_device_attach(netdev);
9026729b
AK		 4755}
4756
1da177e4 4757/* e1000_main.c */
Linux kernel - Deliverables
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