Commit | Line | Data |
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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
3 | ||
3d41e30a | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
1da177e4 LT |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2 of the License, or (at your option) | |
9 | any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License along with | |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | The full GNU General Public License is included in this distribution in the | |
21 | file called LICENSE. | |
22 | ||
23 | Contact Information: | |
24 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | ||
28 | *******************************************************************************/ | |
29 | ||
30 | #include "e1000.h" | |
31 | ||
1da177e4 | 32 | char e1000_driver_name[] = "e1000"; |
3ad2cc67 | 33 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
1da177e4 LT |
34 | #ifndef CONFIG_E1000_NAPI |
35 | #define DRIVERNAPI | |
36 | #else | |
37 | #define DRIVERNAPI "-NAPI" | |
38 | #endif | |
dc335d97 | 39 | #define DRV_VERSION "7.1.9-k6"DRIVERNAPI |
1da177e4 | 40 | char e1000_driver_version[] = DRV_VERSION; |
3d41e30a | 41 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
1da177e4 LT |
42 | |
43 | /* e1000_pci_tbl - PCI Device ID Table | |
44 | * | |
45 | * Last entry must be all 0s | |
46 | * | |
47 | * Macro expands to... | |
48 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
49 | */ | |
50 | static struct pci_device_id e1000_pci_tbl[] = { | |
1da177e4 LT |
51 | INTEL_E1000_ETHERNET_DEVICE(0x1001), |
52 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
53 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
54 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
55 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
56 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
57 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
58 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
59 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
60 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
61 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
62 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
63 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
64 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
65 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
66 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
67 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
68 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 69 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
70 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
71 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
72 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
73 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
74 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
ae2c3860 AK |
75 | INTEL_E1000_ETHERNET_DEVICE(0x1049), |
76 | INTEL_E1000_ETHERNET_DEVICE(0x104A), | |
77 | INTEL_E1000_ETHERNET_DEVICE(0x104B), | |
78 | INTEL_E1000_ETHERNET_DEVICE(0x104C), | |
79 | INTEL_E1000_ETHERNET_DEVICE(0x104D), | |
07b8fede MC |
80 | INTEL_E1000_ETHERNET_DEVICE(0x105E), |
81 | INTEL_E1000_ETHERNET_DEVICE(0x105F), | |
82 | INTEL_E1000_ETHERNET_DEVICE(0x1060), | |
1da177e4 LT |
83 | INTEL_E1000_ETHERNET_DEVICE(0x1075), |
84 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
85 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
86 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
87 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
88 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
89 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
90 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
07b8fede MC |
91 | INTEL_E1000_ETHERNET_DEVICE(0x107D), |
92 | INTEL_E1000_ETHERNET_DEVICE(0x107E), | |
93 | INTEL_E1000_ETHERNET_DEVICE(0x107F), | |
1da177e4 | 94 | INTEL_E1000_ETHERNET_DEVICE(0x108A), |
2648345f MC |
95 | INTEL_E1000_ETHERNET_DEVICE(0x108B), |
96 | INTEL_E1000_ETHERNET_DEVICE(0x108C), | |
6418ecc6 JK |
97 | INTEL_E1000_ETHERNET_DEVICE(0x1096), |
98 | INTEL_E1000_ETHERNET_DEVICE(0x1098), | |
b7ee49db | 99 | INTEL_E1000_ETHERNET_DEVICE(0x1099), |
07b8fede | 100 | INTEL_E1000_ETHERNET_DEVICE(0x109A), |
b7ee49db | 101 | INTEL_E1000_ETHERNET_DEVICE(0x10B5), |
6418ecc6 | 102 | INTEL_E1000_ETHERNET_DEVICE(0x10B9), |
ae2c3860 AK |
103 | INTEL_E1000_ETHERNET_DEVICE(0x10BA), |
104 | INTEL_E1000_ETHERNET_DEVICE(0x10BB), | |
1da177e4 LT |
105 | /* required last entry */ |
106 | {0,} | |
107 | }; | |
108 | ||
109 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
110 | ||
3ad2cc67 | 111 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 112 | struct e1000_tx_ring *txdr); |
3ad2cc67 | 113 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 114 | struct e1000_rx_ring *rxdr); |
3ad2cc67 | 115 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 116 | struct e1000_tx_ring *tx_ring); |
3ad2cc67 | 117 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 118 | struct e1000_rx_ring *rx_ring); |
1da177e4 LT |
119 | |
120 | /* Local Function Prototypes */ | |
121 | ||
122 | static int e1000_init_module(void); | |
123 | static void e1000_exit_module(void); | |
124 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
125 | static void __devexit e1000_remove(struct pci_dev *pdev); | |
581d708e | 126 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
1da177e4 LT |
127 | static int e1000_sw_init(struct e1000_adapter *adapter); |
128 | static int e1000_open(struct net_device *netdev); | |
129 | static int e1000_close(struct net_device *netdev); | |
130 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
131 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
132 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
133 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
134 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
135 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
136 | struct e1000_tx_ring *tx_ring); | |
137 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, | |
138 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
139 | static void e1000_set_multi(struct net_device *netdev); |
140 | static void e1000_update_phy_info(unsigned long data); | |
141 | static void e1000_watchdog(unsigned long data); | |
1da177e4 LT |
142 | static void e1000_82547_tx_fifo_stall(unsigned long data); |
143 | static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
144 | static struct net_device_stats * e1000_get_stats(struct net_device *netdev); | |
145 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |
146 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
147 | static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs); | |
581d708e MC |
148 | static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, |
149 | struct e1000_tx_ring *tx_ring); | |
1da177e4 | 150 | #ifdef CONFIG_E1000_NAPI |
581d708e | 151 | static int e1000_clean(struct net_device *poll_dev, int *budget); |
1da177e4 | 152 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
581d708e | 153 | struct e1000_rx_ring *rx_ring, |
1da177e4 | 154 | int *work_done, int work_to_do); |
2d7edb92 | 155 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
581d708e | 156 | struct e1000_rx_ring *rx_ring, |
2d7edb92 | 157 | int *work_done, int work_to_do); |
1da177e4 | 158 | #else |
581d708e MC |
159 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
160 | struct e1000_rx_ring *rx_ring); | |
161 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |
162 | struct e1000_rx_ring *rx_ring); | |
1da177e4 | 163 | #endif |
581d708e | 164 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 JK |
165 | struct e1000_rx_ring *rx_ring, |
166 | int cleaned_count); | |
581d708e | 167 | static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
168 | struct e1000_rx_ring *rx_ring, |
169 | int cleaned_count); | |
1da177e4 LT |
170 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
171 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
172 | int cmd); | |
1da177e4 LT |
173 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
174 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
175 | static void e1000_tx_timeout(struct net_device *dev); | |
87041639 | 176 | static void e1000_reset_task(struct net_device *dev); |
1da177e4 | 177 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
e619d523 AK |
178 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
179 | struct sk_buff *skb); | |
1da177e4 LT |
180 | |
181 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | |
182 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | |
183 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | |
184 | static void e1000_restore_vlan(struct e1000_adapter *adapter); | |
185 | ||
977e74b5 | 186 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
6fdfef16 | 187 | #ifdef CONFIG_PM |
1da177e4 LT |
188 | static int e1000_resume(struct pci_dev *pdev); |
189 | #endif | |
c653e635 | 190 | static void e1000_shutdown(struct pci_dev *pdev); |
1da177e4 LT |
191 | |
192 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
193 | /* for netdump / net console */ | |
194 | static void e1000_netpoll (struct net_device *netdev); | |
195 | #endif | |
196 | ||
9026729b AK |
197 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
198 | pci_channel_state_t state); | |
199 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); | |
200 | static void e1000_io_resume(struct pci_dev *pdev); | |
201 | ||
202 | static struct pci_error_handlers e1000_err_handler = { | |
203 | .error_detected = e1000_io_error_detected, | |
204 | .slot_reset = e1000_io_slot_reset, | |
205 | .resume = e1000_io_resume, | |
206 | }; | |
24025e4e | 207 | |
1da177e4 LT |
208 | static struct pci_driver e1000_driver = { |
209 | .name = e1000_driver_name, | |
210 | .id_table = e1000_pci_tbl, | |
211 | .probe = e1000_probe, | |
212 | .remove = __devexit_p(e1000_remove), | |
213 | /* Power Managment Hooks */ | |
1da177e4 | 214 | .suspend = e1000_suspend, |
6fdfef16 | 215 | #ifdef CONFIG_PM |
c653e635 | 216 | .resume = e1000_resume, |
1da177e4 | 217 | #endif |
9026729b AK |
218 | .shutdown = e1000_shutdown, |
219 | .err_handler = &e1000_err_handler | |
1da177e4 LT |
220 | }; |
221 | ||
222 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
223 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
224 | MODULE_LICENSE("GPL"); | |
225 | MODULE_VERSION(DRV_VERSION); | |
226 | ||
227 | static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
228 | module_param(debug, int, 0); | |
229 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
230 | ||
231 | /** | |
232 | * e1000_init_module - Driver Registration Routine | |
233 | * | |
234 | * e1000_init_module is the first routine called when the driver is | |
235 | * loaded. All it does is register with the PCI subsystem. | |
236 | **/ | |
237 | ||
238 | static int __init | |
239 | e1000_init_module(void) | |
240 | { | |
241 | int ret; | |
242 | printk(KERN_INFO "%s - version %s\n", | |
243 | e1000_driver_string, e1000_driver_version); | |
244 | ||
245 | printk(KERN_INFO "%s\n", e1000_copyright); | |
246 | ||
29917620 | 247 | ret = pci_register_driver(&e1000_driver); |
8b378def | 248 | |
1da177e4 LT |
249 | return ret; |
250 | } | |
251 | ||
252 | module_init(e1000_init_module); | |
253 | ||
254 | /** | |
255 | * e1000_exit_module - Driver Exit Cleanup Routine | |
256 | * | |
257 | * e1000_exit_module is called just before the driver is removed | |
258 | * from memory. | |
259 | **/ | |
260 | ||
261 | static void __exit | |
262 | e1000_exit_module(void) | |
263 | { | |
1da177e4 LT |
264 | pci_unregister_driver(&e1000_driver); |
265 | } | |
266 | ||
267 | module_exit(e1000_exit_module); | |
268 | ||
2db10a08 AK |
269 | static int e1000_request_irq(struct e1000_adapter *adapter) |
270 | { | |
271 | struct net_device *netdev = adapter->netdev; | |
272 | int flags, err = 0; | |
273 | ||
c0bc8721 | 274 | flags = IRQF_SHARED; |
2db10a08 AK |
275 | #ifdef CONFIG_PCI_MSI |
276 | if (adapter->hw.mac_type > e1000_82547_rev_2) { | |
277 | adapter->have_msi = TRUE; | |
278 | if ((err = pci_enable_msi(adapter->pdev))) { | |
279 | DPRINTK(PROBE, ERR, | |
280 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
281 | adapter->have_msi = FALSE; | |
282 | } | |
283 | } | |
284 | if (adapter->have_msi) | |
61ef5c00 | 285 | flags &= ~IRQF_SHARED; |
2db10a08 AK |
286 | #endif |
287 | if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags, | |
288 | netdev->name, netdev))) | |
289 | DPRINTK(PROBE, ERR, | |
290 | "Unable to allocate interrupt Error: %d\n", err); | |
291 | ||
292 | return err; | |
293 | } | |
294 | ||
295 | static void e1000_free_irq(struct e1000_adapter *adapter) | |
296 | { | |
297 | struct net_device *netdev = adapter->netdev; | |
298 | ||
299 | free_irq(adapter->pdev->irq, netdev); | |
300 | ||
301 | #ifdef CONFIG_PCI_MSI | |
302 | if (adapter->have_msi) | |
303 | pci_disable_msi(adapter->pdev); | |
304 | #endif | |
305 | } | |
306 | ||
1da177e4 LT |
307 | /** |
308 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
309 | * @adapter: board private structure | |
310 | **/ | |
311 | ||
e619d523 | 312 | static void |
1da177e4 LT |
313 | e1000_irq_disable(struct e1000_adapter *adapter) |
314 | { | |
315 | atomic_inc(&adapter->irq_sem); | |
316 | E1000_WRITE_REG(&adapter->hw, IMC, ~0); | |
317 | E1000_WRITE_FLUSH(&adapter->hw); | |
318 | synchronize_irq(adapter->pdev->irq); | |
319 | } | |
320 | ||
321 | /** | |
322 | * e1000_irq_enable - Enable default interrupt generation settings | |
323 | * @adapter: board private structure | |
324 | **/ | |
325 | ||
e619d523 | 326 | static void |
1da177e4 LT |
327 | e1000_irq_enable(struct e1000_adapter *adapter) |
328 | { | |
96838a40 | 329 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { |
1da177e4 LT |
330 | E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); |
331 | E1000_WRITE_FLUSH(&adapter->hw); | |
332 | } | |
333 | } | |
3ad2cc67 AB |
334 | |
335 | static void | |
2d7edb92 MC |
336 | e1000_update_mng_vlan(struct e1000_adapter *adapter) |
337 | { | |
338 | struct net_device *netdev = adapter->netdev; | |
339 | uint16_t vid = adapter->hw.mng_cookie.vlan_id; | |
340 | uint16_t old_vid = adapter->mng_vlan_id; | |
96838a40 JB |
341 | if (adapter->vlgrp) { |
342 | if (!adapter->vlgrp->vlan_devices[vid]) { | |
343 | if (adapter->hw.mng_cookie.status & | |
2d7edb92 MC |
344 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { |
345 | e1000_vlan_rx_add_vid(netdev, vid); | |
346 | adapter->mng_vlan_id = vid; | |
347 | } else | |
348 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
96838a40 JB |
349 | |
350 | if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && | |
351 | (vid != old_vid) && | |
2d7edb92 MC |
352 | !adapter->vlgrp->vlan_devices[old_vid]) |
353 | e1000_vlan_rx_kill_vid(netdev, old_vid); | |
c5f226fe JK |
354 | } else |
355 | adapter->mng_vlan_id = vid; | |
2d7edb92 MC |
356 | } |
357 | } | |
b55ccb35 JK |
358 | |
359 | /** | |
360 | * e1000_release_hw_control - release control of the h/w to f/w | |
361 | * @adapter: address of board private structure | |
362 | * | |
363 | * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
364 | * For ASF and Pass Through versions of f/w this means that the | |
365 | * driver is no longer loaded. For AMT version (only with 82573) i | |
366 | * of the f/w this means that the netowrk i/f is closed. | |
76c224bc | 367 | * |
b55ccb35 JK |
368 | **/ |
369 | ||
e619d523 | 370 | static void |
b55ccb35 JK |
371 | e1000_release_hw_control(struct e1000_adapter *adapter) |
372 | { | |
373 | uint32_t ctrl_ext; | |
374 | uint32_t swsm; | |
cd94dd0b | 375 | uint32_t extcnf; |
b55ccb35 JK |
376 | |
377 | /* Let firmware taken over control of h/w */ | |
378 | switch (adapter->hw.mac_type) { | |
379 | case e1000_82571: | |
380 | case e1000_82572: | |
4cc15f54 | 381 | case e1000_80003es2lan: |
b55ccb35 JK |
382 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
383 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
384 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
385 | break; | |
386 | case e1000_82573: | |
387 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
388 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
389 | swsm & ~E1000_SWSM_DRV_LOAD); | |
cd94dd0b AK |
390 | case e1000_ich8lan: |
391 | extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
392 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
393 | extcnf & ~E1000_CTRL_EXT_DRV_LOAD); | |
394 | break; | |
b55ccb35 JK |
395 | default: |
396 | break; | |
397 | } | |
398 | } | |
399 | ||
400 | /** | |
401 | * e1000_get_hw_control - get control of the h/w from f/w | |
402 | * @adapter: address of board private structure | |
403 | * | |
404 | * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
76c224bc AK |
405 | * For ASF and Pass Through versions of f/w this means that |
406 | * the driver is loaded. For AMT version (only with 82573) | |
b55ccb35 | 407 | * of the f/w this means that the netowrk i/f is open. |
76c224bc | 408 | * |
b55ccb35 JK |
409 | **/ |
410 | ||
e619d523 | 411 | static void |
b55ccb35 JK |
412 | e1000_get_hw_control(struct e1000_adapter *adapter) |
413 | { | |
414 | uint32_t ctrl_ext; | |
415 | uint32_t swsm; | |
cd94dd0b | 416 | uint32_t extcnf; |
b55ccb35 JK |
417 | /* Let firmware know the driver has taken over */ |
418 | switch (adapter->hw.mac_type) { | |
419 | case e1000_82571: | |
420 | case e1000_82572: | |
4cc15f54 | 421 | case e1000_80003es2lan: |
b55ccb35 JK |
422 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
423 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
424 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
425 | break; | |
426 | case e1000_82573: | |
427 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
428 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
429 | swsm | E1000_SWSM_DRV_LOAD); | |
430 | break; | |
cd94dd0b AK |
431 | case e1000_ich8lan: |
432 | extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL); | |
433 | E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL, | |
434 | extcnf | E1000_EXTCNF_CTRL_SWFLAG); | |
435 | break; | |
b55ccb35 JK |
436 | default: |
437 | break; | |
438 | } | |
439 | } | |
440 | ||
1da177e4 LT |
441 | int |
442 | e1000_up(struct e1000_adapter *adapter) | |
443 | { | |
444 | struct net_device *netdev = adapter->netdev; | |
2db10a08 | 445 | int i; |
1da177e4 LT |
446 | |
447 | /* hardware has been reset, we need to reload some things */ | |
448 | ||
1da177e4 LT |
449 | e1000_set_multi(netdev); |
450 | ||
451 | e1000_restore_vlan(adapter); | |
452 | ||
453 | e1000_configure_tx(adapter); | |
454 | e1000_setup_rctl(adapter); | |
455 | e1000_configure_rx(adapter); | |
72d64a43 JK |
456 | /* call E1000_DESC_UNUSED which always leaves |
457 | * at least 1 descriptor unused to make sure | |
458 | * next_to_use != next_to_clean */ | |
f56799ea | 459 | for (i = 0; i < adapter->num_rx_queues; i++) { |
72d64a43 | 460 | struct e1000_rx_ring *ring = &adapter->rx_ring[i]; |
a292ca6e JK |
461 | adapter->alloc_rx_buf(adapter, ring, |
462 | E1000_DESC_UNUSED(ring)); | |
f56799ea | 463 | } |
1da177e4 | 464 | |
7bfa4816 JK |
465 | adapter->tx_queue_len = netdev->tx_queue_len; |
466 | ||
1da177e4 | 467 | mod_timer(&adapter->watchdog_timer, jiffies); |
1da177e4 LT |
468 | |
469 | #ifdef CONFIG_E1000_NAPI | |
470 | netif_poll_enable(netdev); | |
471 | #endif | |
5de55624 MC |
472 | e1000_irq_enable(adapter); |
473 | ||
1da177e4 LT |
474 | return 0; |
475 | } | |
476 | ||
79f05bf0 AK |
477 | /** |
478 | * e1000_power_up_phy - restore link in case the phy was powered down | |
479 | * @adapter: address of board private structure | |
480 | * | |
481 | * The phy may be powered down to save power and turn off link when the | |
482 | * driver is unloaded and wake on lan is not enabled (among others) | |
483 | * *** this routine MUST be followed by a call to e1000_reset *** | |
484 | * | |
485 | **/ | |
486 | ||
d658266e | 487 | void e1000_power_up_phy(struct e1000_adapter *adapter) |
79f05bf0 AK |
488 | { |
489 | uint16_t mii_reg = 0; | |
490 | ||
491 | /* Just clear the power down bit to wake the phy back up */ | |
492 | if (adapter->hw.media_type == e1000_media_type_copper) { | |
493 | /* according to the manual, the phy will retain its | |
494 | * settings across a power-down/up cycle */ | |
495 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
496 | mii_reg &= ~MII_CR_POWER_DOWN; | |
497 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
498 | } | |
499 | } | |
500 | ||
501 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | |
502 | { | |
503 | boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) && | |
504 | e1000_check_mng_mode(&adapter->hw); | |
505 | /* Power down the PHY so no link is implied when interface is down | |
506 | * The PHY cannot be powered down if any of the following is TRUE | |
507 | * (a) WoL is enabled | |
508 | * (b) AMT is active | |
509 | * (c) SoL/IDER session is active */ | |
510 | if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && | |
cd94dd0b | 511 | adapter->hw.mac_type != e1000_ich8lan && |
79f05bf0 AK |
512 | adapter->hw.media_type == e1000_media_type_copper && |
513 | !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) && | |
514 | !mng_mode_enabled && | |
515 | !e1000_check_phy_reset_block(&adapter->hw)) { | |
516 | uint16_t mii_reg = 0; | |
517 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
518 | mii_reg |= MII_CR_POWER_DOWN; | |
519 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
520 | mdelay(1); | |
521 | } | |
522 | } | |
523 | ||
1da177e4 LT |
524 | void |
525 | e1000_down(struct e1000_adapter *adapter) | |
526 | { | |
527 | struct net_device *netdev = adapter->netdev; | |
528 | ||
529 | e1000_irq_disable(adapter); | |
c1605eb3 | 530 | |
1da177e4 LT |
531 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
532 | del_timer_sync(&adapter->watchdog_timer); | |
533 | del_timer_sync(&adapter->phy_info_timer); | |
534 | ||
535 | #ifdef CONFIG_E1000_NAPI | |
536 | netif_poll_disable(netdev); | |
537 | #endif | |
7bfa4816 | 538 | netdev->tx_queue_len = adapter->tx_queue_len; |
1da177e4 LT |
539 | adapter->link_speed = 0; |
540 | adapter->link_duplex = 0; | |
541 | netif_carrier_off(netdev); | |
542 | netif_stop_queue(netdev); | |
543 | ||
544 | e1000_reset(adapter); | |
581d708e MC |
545 | e1000_clean_all_tx_rings(adapter); |
546 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 | 547 | } |
1da177e4 | 548 | |
2db10a08 AK |
549 | void |
550 | e1000_reinit_locked(struct e1000_adapter *adapter) | |
551 | { | |
552 | WARN_ON(in_interrupt()); | |
553 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) | |
554 | msleep(1); | |
555 | e1000_down(adapter); | |
556 | e1000_up(adapter); | |
557 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
558 | } |
559 | ||
560 | void | |
561 | e1000_reset(struct e1000_adapter *adapter) | |
562 | { | |
2d7edb92 | 563 | uint32_t pba, manc; |
1125ecbc | 564 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
1da177e4 LT |
565 | |
566 | /* Repartition Pba for greater than 9k mtu | |
567 | * To take effect CTRL.RST is required. | |
568 | */ | |
569 | ||
2d7edb92 MC |
570 | switch (adapter->hw.mac_type) { |
571 | case e1000_82547: | |
0e6ef3e0 | 572 | case e1000_82547_rev_2: |
2d7edb92 MC |
573 | pba = E1000_PBA_30K; |
574 | break; | |
868d5309 MC |
575 | case e1000_82571: |
576 | case e1000_82572: | |
6418ecc6 | 577 | case e1000_80003es2lan: |
868d5309 MC |
578 | pba = E1000_PBA_38K; |
579 | break; | |
2d7edb92 MC |
580 | case e1000_82573: |
581 | pba = E1000_PBA_12K; | |
582 | break; | |
cd94dd0b AK |
583 | case e1000_ich8lan: |
584 | pba = E1000_PBA_8K; | |
585 | break; | |
2d7edb92 MC |
586 | default: |
587 | pba = E1000_PBA_48K; | |
588 | break; | |
589 | } | |
590 | ||
96838a40 | 591 | if ((adapter->hw.mac_type != e1000_82573) && |
f11b7f85 | 592 | (adapter->netdev->mtu > E1000_RXBUFFER_8192)) |
1125ecbc | 593 | pba -= 8; /* allocate more FIFO for Tx */ |
2d7edb92 MC |
594 | |
595 | ||
96838a40 | 596 | if (adapter->hw.mac_type == e1000_82547) { |
1da177e4 LT |
597 | adapter->tx_fifo_head = 0; |
598 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
599 | adapter->tx_fifo_size = | |
600 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
601 | atomic_set(&adapter->tx_fifo_stall, 0); | |
602 | } | |
2d7edb92 | 603 | |
1da177e4 LT |
604 | E1000_WRITE_REG(&adapter->hw, PBA, pba); |
605 | ||
606 | /* flow control settings */ | |
f11b7f85 JK |
607 | /* Set the FC high water mark to 90% of the FIFO size. |
608 | * Required to clear last 3 LSB */ | |
609 | fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8; | |
cd94dd0b AK |
610 | /* We can't use 90% on small FIFOs because the remainder |
611 | * would be less than 1 full frame. In this case, we size | |
612 | * it to allow at least a full frame above the high water | |
613 | * mark. */ | |
614 | if (pba < E1000_PBA_16K) | |
615 | fc_high_water_mark = (pba * 1024) - 1600; | |
f11b7f85 JK |
616 | |
617 | adapter->hw.fc_high_water = fc_high_water_mark; | |
618 | adapter->hw.fc_low_water = fc_high_water_mark - 8; | |
87041639 JK |
619 | if (adapter->hw.mac_type == e1000_80003es2lan) |
620 | adapter->hw.fc_pause_time = 0xFFFF; | |
621 | else | |
622 | adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; | |
1da177e4 LT |
623 | adapter->hw.fc_send_xon = 1; |
624 | adapter->hw.fc = adapter->hw.original_fc; | |
625 | ||
2d7edb92 | 626 | /* Allow time for pending master requests to run */ |
1da177e4 | 627 | e1000_reset_hw(&adapter->hw); |
96838a40 | 628 | if (adapter->hw.mac_type >= e1000_82544) |
1da177e4 | 629 | E1000_WRITE_REG(&adapter->hw, WUC, 0); |
96838a40 | 630 | if (e1000_init_hw(&adapter->hw)) |
1da177e4 | 631 | DPRINTK(PROBE, ERR, "Hardware Error\n"); |
2d7edb92 | 632 | e1000_update_mng_vlan(adapter); |
1da177e4 LT |
633 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
634 | E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); | |
635 | ||
636 | e1000_reset_adaptive(&adapter->hw); | |
637 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
9a53a202 AK |
638 | |
639 | if (!adapter->smart_power_down && | |
640 | (adapter->hw.mac_type == e1000_82571 || | |
641 | adapter->hw.mac_type == e1000_82572)) { | |
642 | uint16_t phy_data = 0; | |
643 | /* speed up time to link by disabling smart power down, ignore | |
644 | * the return value of this function because there is nothing | |
645 | * different we would do if it failed */ | |
646 | e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
647 | &phy_data); | |
648 | phy_data &= ~IGP02E1000_PM_SPD; | |
649 | e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, | |
650 | phy_data); | |
651 | } | |
652 | ||
cd94dd0b AK |
653 | if (adapter->hw.mac_type < e1000_ich8lan) |
654 | /* FIXME: this code is duplicate and wrong for PCI Express */ | |
2d7edb92 MC |
655 | if (adapter->en_mng_pt) { |
656 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
657 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); | |
658 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
659 | } | |
1da177e4 LT |
660 | } |
661 | ||
662 | /** | |
663 | * e1000_probe - Device Initialization Routine | |
664 | * @pdev: PCI device information struct | |
665 | * @ent: entry in e1000_pci_tbl | |
666 | * | |
667 | * Returns 0 on success, negative on failure | |
668 | * | |
669 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
670 | * The OS initialization, configuring of the adapter private structure, | |
671 | * and a hardware reset occur. | |
672 | **/ | |
673 | ||
674 | static int __devinit | |
675 | e1000_probe(struct pci_dev *pdev, | |
676 | const struct pci_device_id *ent) | |
677 | { | |
678 | struct net_device *netdev; | |
679 | struct e1000_adapter *adapter; | |
2d7edb92 | 680 | unsigned long mmio_start, mmio_len; |
cd94dd0b | 681 | unsigned long flash_start, flash_len; |
2d7edb92 | 682 | |
1da177e4 | 683 | static int cards_found = 0; |
120cd576 | 684 | static int global_quad_port_a = 0; /* global ksp3 port a indication */ |
2d7edb92 | 685 | int i, err, pci_using_dac; |
120cd576 | 686 | uint16_t eeprom_data = 0; |
1da177e4 | 687 | uint16_t eeprom_apme_mask = E1000_EEPROM_APME; |
96838a40 | 688 | if ((err = pci_enable_device(pdev))) |
1da177e4 LT |
689 | return err; |
690 | ||
cd94dd0b AK |
691 | if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) && |
692 | !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) { | |
1da177e4 LT |
693 | pci_using_dac = 1; |
694 | } else { | |
cd94dd0b AK |
695 | if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) && |
696 | (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) { | |
1da177e4 | 697 | E1000_ERR("No usable DMA configuration, aborting\n"); |
6dd62ab0 | 698 | goto err_dma; |
1da177e4 LT |
699 | } |
700 | pci_using_dac = 0; | |
701 | } | |
702 | ||
96838a40 | 703 | if ((err = pci_request_regions(pdev, e1000_driver_name))) |
6dd62ab0 | 704 | goto err_pci_reg; |
1da177e4 LT |
705 | |
706 | pci_set_master(pdev); | |
707 | ||
6dd62ab0 | 708 | err = -ENOMEM; |
1da177e4 | 709 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); |
6dd62ab0 | 710 | if (!netdev) |
1da177e4 | 711 | goto err_alloc_etherdev; |
1da177e4 LT |
712 | |
713 | SET_MODULE_OWNER(netdev); | |
714 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
715 | ||
716 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 717 | adapter = netdev_priv(netdev); |
1da177e4 LT |
718 | adapter->netdev = netdev; |
719 | adapter->pdev = pdev; | |
720 | adapter->hw.back = adapter; | |
721 | adapter->msg_enable = (1 << debug) - 1; | |
722 | ||
723 | mmio_start = pci_resource_start(pdev, BAR_0); | |
724 | mmio_len = pci_resource_len(pdev, BAR_0); | |
725 | ||
6dd62ab0 | 726 | err = -EIO; |
1da177e4 | 727 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); |
6dd62ab0 | 728 | if (!adapter->hw.hw_addr) |
1da177e4 | 729 | goto err_ioremap; |
1da177e4 | 730 | |
96838a40 JB |
731 | for (i = BAR_1; i <= BAR_5; i++) { |
732 | if (pci_resource_len(pdev, i) == 0) | |
1da177e4 | 733 | continue; |
96838a40 | 734 | if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { |
1da177e4 LT |
735 | adapter->hw.io_base = pci_resource_start(pdev, i); |
736 | break; | |
737 | } | |
738 | } | |
739 | ||
740 | netdev->open = &e1000_open; | |
741 | netdev->stop = &e1000_close; | |
742 | netdev->hard_start_xmit = &e1000_xmit_frame; | |
743 | netdev->get_stats = &e1000_get_stats; | |
744 | netdev->set_multicast_list = &e1000_set_multi; | |
745 | netdev->set_mac_address = &e1000_set_mac; | |
746 | netdev->change_mtu = &e1000_change_mtu; | |
747 | netdev->do_ioctl = &e1000_ioctl; | |
748 | e1000_set_ethtool_ops(netdev); | |
749 | netdev->tx_timeout = &e1000_tx_timeout; | |
750 | netdev->watchdog_timeo = 5 * HZ; | |
751 | #ifdef CONFIG_E1000_NAPI | |
752 | netdev->poll = &e1000_clean; | |
753 | netdev->weight = 64; | |
754 | #endif | |
755 | netdev->vlan_rx_register = e1000_vlan_rx_register; | |
756 | netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; | |
757 | netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; | |
758 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
759 | netdev->poll_controller = e1000_netpoll; | |
760 | #endif | |
761 | strcpy(netdev->name, pci_name(pdev)); | |
762 | ||
763 | netdev->mem_start = mmio_start; | |
764 | netdev->mem_end = mmio_start + mmio_len; | |
765 | netdev->base_addr = adapter->hw.io_base; | |
766 | ||
767 | adapter->bd_number = cards_found; | |
768 | ||
769 | /* setup the private structure */ | |
770 | ||
96838a40 | 771 | if ((err = e1000_sw_init(adapter))) |
1da177e4 LT |
772 | goto err_sw_init; |
773 | ||
6dd62ab0 | 774 | err = -EIO; |
cd94dd0b AK |
775 | /* Flash BAR mapping must happen after e1000_sw_init |
776 | * because it depends on mac_type */ | |
777 | if ((adapter->hw.mac_type == e1000_ich8lan) && | |
778 | (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { | |
779 | flash_start = pci_resource_start(pdev, 1); | |
780 | flash_len = pci_resource_len(pdev, 1); | |
781 | adapter->hw.flash_address = ioremap(flash_start, flash_len); | |
6dd62ab0 | 782 | if (!adapter->hw.flash_address) |
cd94dd0b | 783 | goto err_flashmap; |
cd94dd0b AK |
784 | } |
785 | ||
6dd62ab0 | 786 | if (e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 MC |
787 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); |
788 | ||
96838a40 | 789 | if (adapter->hw.mac_type >= e1000_82543) { |
1da177e4 LT |
790 | netdev->features = NETIF_F_SG | |
791 | NETIF_F_HW_CSUM | | |
792 | NETIF_F_HW_VLAN_TX | | |
793 | NETIF_F_HW_VLAN_RX | | |
794 | NETIF_F_HW_VLAN_FILTER; | |
cd94dd0b AK |
795 | if (adapter->hw.mac_type == e1000_ich8lan) |
796 | netdev->features &= ~NETIF_F_HW_VLAN_FILTER; | |
1da177e4 LT |
797 | } |
798 | ||
799 | #ifdef NETIF_F_TSO | |
96838a40 | 800 | if ((adapter->hw.mac_type >= e1000_82544) && |
1da177e4 LT |
801 | (adapter->hw.mac_type != e1000_82547)) |
802 | netdev->features |= NETIF_F_TSO; | |
2d7edb92 MC |
803 | |
804 | #ifdef NETIF_F_TSO_IPV6 | |
96838a40 | 805 | if (adapter->hw.mac_type > e1000_82547_rev_2) |
2d7edb92 MC |
806 | netdev->features |= NETIF_F_TSO_IPV6; |
807 | #endif | |
1da177e4 | 808 | #endif |
96838a40 | 809 | if (pci_using_dac) |
1da177e4 LT |
810 | netdev->features |= NETIF_F_HIGHDMA; |
811 | ||
76c224bc AK |
812 | netdev->features |= NETIF_F_LLTX; |
813 | ||
2d7edb92 MC |
814 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); |
815 | ||
cd94dd0b AK |
816 | /* initialize eeprom parameters */ |
817 | ||
818 | if (e1000_init_eeprom_params(&adapter->hw)) { | |
819 | E1000_ERR("EEPROM initialization failed\n"); | |
6dd62ab0 | 820 | goto err_eeprom; |
cd94dd0b AK |
821 | } |
822 | ||
96838a40 | 823 | /* before reading the EEPROM, reset the controller to |
1da177e4 | 824 | * put the device in a known good starting state */ |
96838a40 | 825 | |
1da177e4 LT |
826 | e1000_reset_hw(&adapter->hw); |
827 | ||
828 | /* make sure the EEPROM is good */ | |
829 | ||
96838a40 | 830 | if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) { |
1da177e4 | 831 | DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); |
1da177e4 LT |
832 | goto err_eeprom; |
833 | } | |
834 | ||
835 | /* copy the MAC address out of the EEPROM */ | |
836 | ||
96838a40 | 837 | if (e1000_read_mac_addr(&adapter->hw)) |
1da177e4 LT |
838 | DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); |
839 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
9beb0ac1 | 840 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); |
1da177e4 | 841 | |
96838a40 | 842 | if (!is_valid_ether_addr(netdev->perm_addr)) { |
1da177e4 | 843 | DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); |
1da177e4 LT |
844 | goto err_eeprom; |
845 | } | |
846 | ||
1da177e4 LT |
847 | e1000_get_bus_info(&adapter->hw); |
848 | ||
849 | init_timer(&adapter->tx_fifo_stall_timer); | |
850 | adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; | |
851 | adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; | |
852 | ||
853 | init_timer(&adapter->watchdog_timer); | |
854 | adapter->watchdog_timer.function = &e1000_watchdog; | |
855 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
856 | ||
1da177e4 LT |
857 | init_timer(&adapter->phy_info_timer); |
858 | adapter->phy_info_timer.function = &e1000_update_phy_info; | |
859 | adapter->phy_info_timer.data = (unsigned long) adapter; | |
860 | ||
87041639 JK |
861 | INIT_WORK(&adapter->reset_task, |
862 | (void (*)(void *))e1000_reset_task, netdev); | |
1da177e4 LT |
863 | |
864 | /* we're going to reset, so assume we have no link for now */ | |
865 | ||
866 | netif_carrier_off(netdev); | |
867 | netif_stop_queue(netdev); | |
868 | ||
869 | e1000_check_options(adapter); | |
870 | ||
871 | /* Initial Wake on LAN setting | |
872 | * If APM wake is enabled in the EEPROM, | |
873 | * enable the ACPI Magic Packet filter | |
874 | */ | |
875 | ||
96838a40 | 876 | switch (adapter->hw.mac_type) { |
1da177e4 LT |
877 | case e1000_82542_rev2_0: |
878 | case e1000_82542_rev2_1: | |
879 | case e1000_82543: | |
880 | break; | |
881 | case e1000_82544: | |
882 | e1000_read_eeprom(&adapter->hw, | |
883 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); | |
884 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
885 | break; | |
cd94dd0b AK |
886 | case e1000_ich8lan: |
887 | e1000_read_eeprom(&adapter->hw, | |
888 | EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data); | |
889 | eeprom_apme_mask = E1000_EEPROM_ICH8_APME; | |
890 | break; | |
1da177e4 LT |
891 | case e1000_82546: |
892 | case e1000_82546_rev_3: | |
fd803241 | 893 | case e1000_82571: |
6418ecc6 | 894 | case e1000_80003es2lan: |
96838a40 | 895 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){ |
1da177e4 LT |
896 | e1000_read_eeprom(&adapter->hw, |
897 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); | |
898 | break; | |
899 | } | |
900 | /* Fall Through */ | |
901 | default: | |
902 | e1000_read_eeprom(&adapter->hw, | |
903 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); | |
904 | break; | |
905 | } | |
96838a40 | 906 | if (eeprom_data & eeprom_apme_mask) |
120cd576 JB |
907 | adapter->eeprom_wol |= E1000_WUFC_MAG; |
908 | ||
909 | /* now that we have the eeprom settings, apply the special cases | |
910 | * where the eeprom may be wrong or the board simply won't support | |
911 | * wake on lan on a particular port */ | |
912 | switch (pdev->device) { | |
913 | case E1000_DEV_ID_82546GB_PCIE: | |
914 | adapter->eeprom_wol = 0; | |
915 | break; | |
916 | case E1000_DEV_ID_82546EB_FIBER: | |
917 | case E1000_DEV_ID_82546GB_FIBER: | |
918 | case E1000_DEV_ID_82571EB_FIBER: | |
919 | /* Wake events only supported on port A for dual fiber | |
920 | * regardless of eeprom setting */ | |
921 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1) | |
922 | adapter->eeprom_wol = 0; | |
923 | break; | |
924 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: | |
925 | /* if quad port adapter, disable WoL on all but port A */ | |
926 | if (global_quad_port_a != 0) | |
927 | adapter->eeprom_wol = 0; | |
928 | else | |
929 | adapter->quad_port_a = 1; | |
930 | /* Reset for multiple quad port adapters */ | |
931 | if (++global_quad_port_a == 4) | |
932 | global_quad_port_a = 0; | |
933 | break; | |
934 | } | |
935 | ||
936 | /* initialize the wol settings based on the eeprom settings */ | |
937 | adapter->wol = adapter->eeprom_wol; | |
1da177e4 | 938 | |
fb3d47d4 JK |
939 | /* print bus type/speed/width info */ |
940 | { | |
941 | struct e1000_hw *hw = &adapter->hw; | |
942 | DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ", | |
943 | ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : | |
944 | (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")), | |
945 | ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" : | |
946 | (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" : | |
947 | (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" : | |
948 | (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" : | |
949 | (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"), | |
950 | ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : | |
951 | (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" : | |
952 | (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" : | |
953 | "32-bit")); | |
954 | } | |
955 | ||
956 | for (i = 0; i < 6; i++) | |
957 | printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':'); | |
958 | ||
1da177e4 LT |
959 | /* reset the hardware with the new settings */ |
960 | e1000_reset(adapter); | |
961 | ||
b55ccb35 JK |
962 | /* If the controller is 82573 and f/w is AMT, do not set |
963 | * DRV_LOAD until the interface is up. For all other cases, | |
964 | * let the f/w know that the h/w is now under the control | |
965 | * of the driver. */ | |
966 | if (adapter->hw.mac_type != e1000_82573 || | |
967 | !e1000_check_mng_mode(&adapter->hw)) | |
968 | e1000_get_hw_control(adapter); | |
2d7edb92 | 969 | |
1da177e4 | 970 | strcpy(netdev->name, "eth%d"); |
96838a40 | 971 | if ((err = register_netdev(netdev))) |
1da177e4 LT |
972 | goto err_register; |
973 | ||
974 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); | |
975 | ||
976 | cards_found++; | |
977 | return 0; | |
978 | ||
979 | err_register: | |
6dd62ab0 VA |
980 | e1000_release_hw_control(adapter); |
981 | err_eeprom: | |
982 | if (!e1000_check_phy_reset_block(&adapter->hw)) | |
983 | e1000_phy_hw_reset(&adapter->hw); | |
984 | ||
cd94dd0b AK |
985 | if (adapter->hw.flash_address) |
986 | iounmap(adapter->hw.flash_address); | |
987 | err_flashmap: | |
6dd62ab0 VA |
988 | #ifdef CONFIG_E1000_NAPI |
989 | for (i = 0; i < adapter->num_rx_queues; i++) | |
990 | dev_put(&adapter->polling_netdev[i]); | |
991 | #endif | |
992 | ||
993 | kfree(adapter->tx_ring); | |
994 | kfree(adapter->rx_ring); | |
995 | #ifdef CONFIG_E1000_NAPI | |
996 | kfree(adapter->polling_netdev); | |
997 | #endif | |
1da177e4 | 998 | err_sw_init: |
1da177e4 LT |
999 | iounmap(adapter->hw.hw_addr); |
1000 | err_ioremap: | |
1001 | free_netdev(netdev); | |
1002 | err_alloc_etherdev: | |
1003 | pci_release_regions(pdev); | |
6dd62ab0 VA |
1004 | err_pci_reg: |
1005 | err_dma: | |
1006 | pci_disable_device(pdev); | |
1da177e4 LT |
1007 | return err; |
1008 | } | |
1009 | ||
1010 | /** | |
1011 | * e1000_remove - Device Removal Routine | |
1012 | * @pdev: PCI device information struct | |
1013 | * | |
1014 | * e1000_remove is called by the PCI subsystem to alert the driver | |
1015 | * that it should release a PCI device. The could be caused by a | |
1016 | * Hot-Plug event, or because the driver is going to be removed from | |
1017 | * memory. | |
1018 | **/ | |
1019 | ||
1020 | static void __devexit | |
1021 | e1000_remove(struct pci_dev *pdev) | |
1022 | { | |
1023 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 1024 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 1025 | uint32_t manc; |
581d708e MC |
1026 | #ifdef CONFIG_E1000_NAPI |
1027 | int i; | |
1028 | #endif | |
1da177e4 | 1029 | |
be2b28ed JG |
1030 | flush_scheduled_work(); |
1031 | ||
96838a40 | 1032 | if (adapter->hw.mac_type >= e1000_82540 && |
cd94dd0b | 1033 | adapter->hw.mac_type != e1000_ich8lan && |
1da177e4 LT |
1034 | adapter->hw.media_type == e1000_media_type_copper) { |
1035 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 1036 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
1037 | manc |= E1000_MANC_ARP_EN; |
1038 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
1039 | } | |
1040 | } | |
1041 | ||
b55ccb35 JK |
1042 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
1043 | * would have already happened in close and is redundant. */ | |
1044 | e1000_release_hw_control(adapter); | |
2d7edb92 | 1045 | |
1da177e4 | 1046 | unregister_netdev(netdev); |
581d708e | 1047 | #ifdef CONFIG_E1000_NAPI |
f56799ea | 1048 | for (i = 0; i < adapter->num_rx_queues; i++) |
15333061 | 1049 | dev_put(&adapter->polling_netdev[i]); |
581d708e | 1050 | #endif |
1da177e4 | 1051 | |
96838a40 | 1052 | if (!e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 | 1053 | e1000_phy_hw_reset(&adapter->hw); |
1da177e4 | 1054 | |
24025e4e MC |
1055 | kfree(adapter->tx_ring); |
1056 | kfree(adapter->rx_ring); | |
1057 | #ifdef CONFIG_E1000_NAPI | |
1058 | kfree(adapter->polling_netdev); | |
1059 | #endif | |
1060 | ||
1da177e4 | 1061 | iounmap(adapter->hw.hw_addr); |
cd94dd0b AK |
1062 | if (adapter->hw.flash_address) |
1063 | iounmap(adapter->hw.flash_address); | |
1da177e4 LT |
1064 | pci_release_regions(pdev); |
1065 | ||
1066 | free_netdev(netdev); | |
1067 | ||
1068 | pci_disable_device(pdev); | |
1069 | } | |
1070 | ||
1071 | /** | |
1072 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
1073 | * @adapter: board private structure to initialize | |
1074 | * | |
1075 | * e1000_sw_init initializes the Adapter private data structure. | |
1076 | * Fields are initialized based on PCI device information and | |
1077 | * OS network device settings (MTU size). | |
1078 | **/ | |
1079 | ||
1080 | static int __devinit | |
1081 | e1000_sw_init(struct e1000_adapter *adapter) | |
1082 | { | |
1083 | struct e1000_hw *hw = &adapter->hw; | |
1084 | struct net_device *netdev = adapter->netdev; | |
1085 | struct pci_dev *pdev = adapter->pdev; | |
581d708e MC |
1086 | #ifdef CONFIG_E1000_NAPI |
1087 | int i; | |
1088 | #endif | |
1da177e4 LT |
1089 | |
1090 | /* PCI config space info */ | |
1091 | ||
1092 | hw->vendor_id = pdev->vendor; | |
1093 | hw->device_id = pdev->device; | |
1094 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
1095 | hw->subsystem_id = pdev->subsystem_device; | |
1096 | ||
1097 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
1098 | ||
1099 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
1100 | ||
eb0f8054 | 1101 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
9e2feace | 1102 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_128; |
1da177e4 LT |
1103 | hw->max_frame_size = netdev->mtu + |
1104 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
1105 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
1106 | ||
1107 | /* identify the MAC */ | |
1108 | ||
96838a40 | 1109 | if (e1000_set_mac_type(hw)) { |
1da177e4 LT |
1110 | DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); |
1111 | return -EIO; | |
1112 | } | |
1113 | ||
96838a40 | 1114 | switch (hw->mac_type) { |
1da177e4 LT |
1115 | default: |
1116 | break; | |
1117 | case e1000_82541: | |
1118 | case e1000_82547: | |
1119 | case e1000_82541_rev_2: | |
1120 | case e1000_82547_rev_2: | |
1121 | hw->phy_init_script = 1; | |
1122 | break; | |
1123 | } | |
1124 | ||
1125 | e1000_set_media_type(hw); | |
1126 | ||
1127 | hw->wait_autoneg_complete = FALSE; | |
1128 | hw->tbi_compatibility_en = TRUE; | |
1129 | hw->adaptive_ifs = TRUE; | |
1130 | ||
1131 | /* Copper options */ | |
1132 | ||
96838a40 | 1133 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
1134 | hw->mdix = AUTO_ALL_MODES; |
1135 | hw->disable_polarity_correction = FALSE; | |
1136 | hw->master_slave = E1000_MASTER_SLAVE; | |
1137 | } | |
1138 | ||
f56799ea JK |
1139 | adapter->num_tx_queues = 1; |
1140 | adapter->num_rx_queues = 1; | |
581d708e MC |
1141 | |
1142 | if (e1000_alloc_queues(adapter)) { | |
1143 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | |
1144 | return -ENOMEM; | |
1145 | } | |
1146 | ||
1147 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1148 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1149 | adapter->polling_netdev[i].priv = adapter; |
1150 | adapter->polling_netdev[i].poll = &e1000_clean; | |
1151 | adapter->polling_netdev[i].weight = 64; | |
1152 | dev_hold(&adapter->polling_netdev[i]); | |
1153 | set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state); | |
1154 | } | |
7bfa4816 | 1155 | spin_lock_init(&adapter->tx_queue_lock); |
24025e4e MC |
1156 | #endif |
1157 | ||
1da177e4 LT |
1158 | atomic_set(&adapter->irq_sem, 1); |
1159 | spin_lock_init(&adapter->stats_lock); | |
1da177e4 LT |
1160 | |
1161 | return 0; | |
1162 | } | |
1163 | ||
581d708e MC |
1164 | /** |
1165 | * e1000_alloc_queues - Allocate memory for all rings | |
1166 | * @adapter: board private structure to initialize | |
1167 | * | |
1168 | * We allocate one ring per queue at run-time since we don't know the | |
1169 | * number of queues at compile-time. The polling_netdev array is | |
1170 | * intended for Multiqueue, but should work fine with a single queue. | |
1171 | **/ | |
1172 | ||
1173 | static int __devinit | |
1174 | e1000_alloc_queues(struct e1000_adapter *adapter) | |
1175 | { | |
1176 | int size; | |
1177 | ||
f56799ea | 1178 | size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues; |
581d708e MC |
1179 | adapter->tx_ring = kmalloc(size, GFP_KERNEL); |
1180 | if (!adapter->tx_ring) | |
1181 | return -ENOMEM; | |
1182 | memset(adapter->tx_ring, 0, size); | |
1183 | ||
f56799ea | 1184 | size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues; |
581d708e MC |
1185 | adapter->rx_ring = kmalloc(size, GFP_KERNEL); |
1186 | if (!adapter->rx_ring) { | |
1187 | kfree(adapter->tx_ring); | |
1188 | return -ENOMEM; | |
1189 | } | |
1190 | memset(adapter->rx_ring, 0, size); | |
1191 | ||
1192 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1193 | size = sizeof(struct net_device) * adapter->num_rx_queues; |
581d708e MC |
1194 | adapter->polling_netdev = kmalloc(size, GFP_KERNEL); |
1195 | if (!adapter->polling_netdev) { | |
1196 | kfree(adapter->tx_ring); | |
1197 | kfree(adapter->rx_ring); | |
1198 | return -ENOMEM; | |
1199 | } | |
1200 | memset(adapter->polling_netdev, 0, size); | |
1201 | #endif | |
1202 | ||
1203 | return E1000_SUCCESS; | |
1204 | } | |
1205 | ||
1da177e4 LT |
1206 | /** |
1207 | * e1000_open - Called when a network interface is made active | |
1208 | * @netdev: network interface device structure | |
1209 | * | |
1210 | * Returns 0 on success, negative value on failure | |
1211 | * | |
1212 | * The open entry point is called when a network interface is made | |
1213 | * active by the system (IFF_UP). At this point all resources needed | |
1214 | * for transmit and receive operations are allocated, the interrupt | |
1215 | * handler is registered with the OS, the watchdog timer is started, | |
1216 | * and the stack is notified that the interface is ready. | |
1217 | **/ | |
1218 | ||
1219 | static int | |
1220 | e1000_open(struct net_device *netdev) | |
1221 | { | |
60490fe0 | 1222 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1223 | int err; |
1224 | ||
2db10a08 AK |
1225 | /* disallow open during test */ |
1226 | if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags)) | |
1227 | return -EBUSY; | |
1228 | ||
1da177e4 LT |
1229 | /* allocate transmit descriptors */ |
1230 | ||
581d708e | 1231 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
1232 | goto err_setup_tx; |
1233 | ||
1234 | /* allocate receive descriptors */ | |
1235 | ||
581d708e | 1236 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 LT |
1237 | goto err_setup_rx; |
1238 | ||
2db10a08 AK |
1239 | err = e1000_request_irq(adapter); |
1240 | if (err) | |
401a552b | 1241 | goto err_req_irq; |
2db10a08 | 1242 | |
79f05bf0 AK |
1243 | e1000_power_up_phy(adapter); |
1244 | ||
96838a40 | 1245 | if ((err = e1000_up(adapter))) |
1da177e4 | 1246 | goto err_up; |
2d7edb92 | 1247 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
96838a40 | 1248 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1249 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1250 | e1000_update_mng_vlan(adapter); | |
1251 | } | |
1da177e4 | 1252 | |
b55ccb35 JK |
1253 | /* If AMT is enabled, let the firmware know that the network |
1254 | * interface is now open */ | |
1255 | if (adapter->hw.mac_type == e1000_82573 && | |
1256 | e1000_check_mng_mode(&adapter->hw)) | |
1257 | e1000_get_hw_control(adapter); | |
1258 | ||
1da177e4 LT |
1259 | return E1000_SUCCESS; |
1260 | ||
1261 | err_up: | |
401a552b VA |
1262 | e1000_power_down_phy(adapter); |
1263 | e1000_free_irq(adapter); | |
1264 | err_req_irq: | |
581d708e | 1265 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1266 | err_setup_rx: |
581d708e | 1267 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1268 | err_setup_tx: |
1269 | e1000_reset(adapter); | |
1270 | ||
1271 | return err; | |
1272 | } | |
1273 | ||
1274 | /** | |
1275 | * e1000_close - Disables a network interface | |
1276 | * @netdev: network interface device structure | |
1277 | * | |
1278 | * Returns 0, this is not allowed to fail | |
1279 | * | |
1280 | * The close entry point is called when an interface is de-activated | |
1281 | * by the OS. The hardware is still under the drivers control, but | |
1282 | * needs to be disabled. A global MAC reset is issued to stop the | |
1283 | * hardware, and all transmit and receive resources are freed. | |
1284 | **/ | |
1285 | ||
1286 | static int | |
1287 | e1000_close(struct net_device *netdev) | |
1288 | { | |
60490fe0 | 1289 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 1290 | |
2db10a08 | 1291 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); |
1da177e4 | 1292 | e1000_down(adapter); |
79f05bf0 | 1293 | e1000_power_down_phy(adapter); |
2db10a08 | 1294 | e1000_free_irq(adapter); |
1da177e4 | 1295 | |
581d708e MC |
1296 | e1000_free_all_tx_resources(adapter); |
1297 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1298 | |
96838a40 | 1299 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1300 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1301 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
1302 | } | |
b55ccb35 JK |
1303 | |
1304 | /* If AMT is enabled, let the firmware know that the network | |
1305 | * interface is now closed */ | |
1306 | if (adapter->hw.mac_type == e1000_82573 && | |
1307 | e1000_check_mng_mode(&adapter->hw)) | |
1308 | e1000_release_hw_control(adapter); | |
1309 | ||
1da177e4 LT |
1310 | return 0; |
1311 | } | |
1312 | ||
1313 | /** | |
1314 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1315 | * @adapter: address of board private structure | |
2d7edb92 MC |
1316 | * @start: address of beginning of memory |
1317 | * @len: length of memory | |
1da177e4 | 1318 | **/ |
e619d523 | 1319 | static boolean_t |
1da177e4 LT |
1320 | e1000_check_64k_bound(struct e1000_adapter *adapter, |
1321 | void *start, unsigned long len) | |
1322 | { | |
1323 | unsigned long begin = (unsigned long) start; | |
1324 | unsigned long end = begin + len; | |
1325 | ||
2648345f MC |
1326 | /* First rev 82545 and 82546 need to not allow any memory |
1327 | * write location to cross 64k boundary due to errata 23 */ | |
1da177e4 | 1328 | if (adapter->hw.mac_type == e1000_82545 || |
2648345f | 1329 | adapter->hw.mac_type == e1000_82546) { |
1da177e4 LT |
1330 | return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; |
1331 | } | |
1332 | ||
1333 | return TRUE; | |
1334 | } | |
1335 | ||
1336 | /** | |
1337 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1338 | * @adapter: board private structure | |
581d708e | 1339 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1340 | * |
1341 | * Return 0 on success, negative on failure | |
1342 | **/ | |
1343 | ||
3ad2cc67 | 1344 | static int |
581d708e MC |
1345 | e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1346 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1347 | { |
1da177e4 LT |
1348 | struct pci_dev *pdev = adapter->pdev; |
1349 | int size; | |
1350 | ||
1351 | size = sizeof(struct e1000_buffer) * txdr->count; | |
cd94dd0b | 1352 | txdr->buffer_info = vmalloc(size); |
96838a40 | 1353 | if (!txdr->buffer_info) { |
2648345f MC |
1354 | DPRINTK(PROBE, ERR, |
1355 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1356 | return -ENOMEM; |
1357 | } | |
1358 | memset(txdr->buffer_info, 0, size); | |
1359 | ||
1360 | /* round up to nearest 4K */ | |
1361 | ||
1362 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1363 | E1000_ROUNDUP(txdr->size, 4096); | |
1364 | ||
1365 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
96838a40 | 1366 | if (!txdr->desc) { |
1da177e4 | 1367 | setup_tx_desc_die: |
1da177e4 | 1368 | vfree(txdr->buffer_info); |
2648345f MC |
1369 | DPRINTK(PROBE, ERR, |
1370 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1371 | return -ENOMEM; |
1372 | } | |
1373 | ||
2648345f | 1374 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1375 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1376 | void *olddesc = txdr->desc; | |
1377 | dma_addr_t olddma = txdr->dma; | |
2648345f MC |
1378 | DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " |
1379 | "at %p\n", txdr->size, txdr->desc); | |
1380 | /* Try again, without freeing the previous */ | |
1da177e4 | 1381 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); |
2648345f | 1382 | /* Failed allocation, critical failure */ |
96838a40 | 1383 | if (!txdr->desc) { |
1da177e4 LT |
1384 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1385 | goto setup_tx_desc_die; | |
1386 | } | |
1387 | ||
1388 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1389 | /* give up */ | |
2648345f MC |
1390 | pci_free_consistent(pdev, txdr->size, txdr->desc, |
1391 | txdr->dma); | |
1da177e4 LT |
1392 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1393 | DPRINTK(PROBE, ERR, | |
2648345f MC |
1394 | "Unable to allocate aligned memory " |
1395 | "for the transmit descriptor ring\n"); | |
1da177e4 LT |
1396 | vfree(txdr->buffer_info); |
1397 | return -ENOMEM; | |
1398 | } else { | |
2648345f | 1399 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1400 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1401 | } | |
1402 | } | |
1403 | memset(txdr->desc, 0, txdr->size); | |
1404 | ||
1405 | txdr->next_to_use = 0; | |
1406 | txdr->next_to_clean = 0; | |
2ae76d98 | 1407 | spin_lock_init(&txdr->tx_lock); |
1da177e4 LT |
1408 | |
1409 | return 0; | |
1410 | } | |
1411 | ||
581d708e MC |
1412 | /** |
1413 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1414 | * (Descriptors) for all queues | |
1415 | * @adapter: board private structure | |
1416 | * | |
581d708e MC |
1417 | * Return 0 on success, negative on failure |
1418 | **/ | |
1419 | ||
1420 | int | |
1421 | e1000_setup_all_tx_resources(struct e1000_adapter *adapter) | |
1422 | { | |
1423 | int i, err = 0; | |
1424 | ||
f56799ea | 1425 | for (i = 0; i < adapter->num_tx_queues; i++) { |
581d708e MC |
1426 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
1427 | if (err) { | |
1428 | DPRINTK(PROBE, ERR, | |
1429 | "Allocation for Tx Queue %u failed\n", i); | |
3fbbc72e VA |
1430 | for (i-- ; i >= 0; i--) |
1431 | e1000_free_tx_resources(adapter, | |
1432 | &adapter->tx_ring[i]); | |
581d708e MC |
1433 | break; |
1434 | } | |
1435 | } | |
1436 | ||
1437 | return err; | |
1438 | } | |
1439 | ||
1da177e4 LT |
1440 | /** |
1441 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1442 | * @adapter: board private structure | |
1443 | * | |
1444 | * Configure the Tx unit of the MAC after a reset. | |
1445 | **/ | |
1446 | ||
1447 | static void | |
1448 | e1000_configure_tx(struct e1000_adapter *adapter) | |
1449 | { | |
581d708e MC |
1450 | uint64_t tdba; |
1451 | struct e1000_hw *hw = &adapter->hw; | |
1452 | uint32_t tdlen, tctl, tipg, tarc; | |
0fadb059 | 1453 | uint32_t ipgr1, ipgr2; |
1da177e4 LT |
1454 | |
1455 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1456 | ||
f56799ea | 1457 | switch (adapter->num_tx_queues) { |
24025e4e MC |
1458 | case 1: |
1459 | default: | |
581d708e MC |
1460 | tdba = adapter->tx_ring[0].dma; |
1461 | tdlen = adapter->tx_ring[0].count * | |
1462 | sizeof(struct e1000_tx_desc); | |
581d708e | 1463 | E1000_WRITE_REG(hw, TDLEN, tdlen); |
4ca213a6 AK |
1464 | E1000_WRITE_REG(hw, TDBAH, (tdba >> 32)); |
1465 | E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); | |
581d708e | 1466 | E1000_WRITE_REG(hw, TDT, 0); |
4ca213a6 | 1467 | E1000_WRITE_REG(hw, TDH, 0); |
581d708e MC |
1468 | adapter->tx_ring[0].tdh = E1000_TDH; |
1469 | adapter->tx_ring[0].tdt = E1000_TDT; | |
24025e4e MC |
1470 | break; |
1471 | } | |
1da177e4 LT |
1472 | |
1473 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
1474 | ||
0fadb059 JK |
1475 | if (hw->media_type == e1000_media_type_fiber || |
1476 | hw->media_type == e1000_media_type_internal_serdes) | |
1477 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; | |
1478 | else | |
1479 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1480 | ||
581d708e | 1481 | switch (hw->mac_type) { |
1da177e4 LT |
1482 | case e1000_82542_rev2_0: |
1483 | case e1000_82542_rev2_1: | |
1484 | tipg = DEFAULT_82542_TIPG_IPGT; | |
0fadb059 JK |
1485 | ipgr1 = DEFAULT_82542_TIPG_IPGR1; |
1486 | ipgr2 = DEFAULT_82542_TIPG_IPGR2; | |
1da177e4 | 1487 | break; |
87041639 JK |
1488 | case e1000_80003es2lan: |
1489 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; | |
1490 | ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; | |
1491 | break; | |
1da177e4 | 1492 | default: |
0fadb059 JK |
1493 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; |
1494 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; | |
1495 | break; | |
1da177e4 | 1496 | } |
0fadb059 JK |
1497 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; |
1498 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
581d708e | 1499 | E1000_WRITE_REG(hw, TIPG, tipg); |
1da177e4 LT |
1500 | |
1501 | /* Set the Tx Interrupt Delay register */ | |
1502 | ||
581d708e MC |
1503 | E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay); |
1504 | if (hw->mac_type >= e1000_82540) | |
1505 | E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay); | |
1da177e4 LT |
1506 | |
1507 | /* Program the Transmit Control Register */ | |
1508 | ||
581d708e | 1509 | tctl = E1000_READ_REG(hw, TCTL); |
1da177e4 LT |
1510 | |
1511 | tctl &= ~E1000_TCTL_CT; | |
7e6c9861 | 1512 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1513 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1514 | ||
7e6c9861 JK |
1515 | #ifdef DISABLE_MULR |
1516 | /* disable Multiple Reads for debugging */ | |
1517 | tctl &= ~E1000_TCTL_MULR; | |
1518 | #endif | |
1da177e4 | 1519 | |
2ae76d98 MC |
1520 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { |
1521 | tarc = E1000_READ_REG(hw, TARC0); | |
1522 | tarc |= ((1 << 25) | (1 << 21)); | |
1523 | E1000_WRITE_REG(hw, TARC0, tarc); | |
1524 | tarc = E1000_READ_REG(hw, TARC1); | |
1525 | tarc |= (1 << 25); | |
1526 | if (tctl & E1000_TCTL_MULR) | |
1527 | tarc &= ~(1 << 28); | |
1528 | else | |
1529 | tarc |= (1 << 28); | |
1530 | E1000_WRITE_REG(hw, TARC1, tarc); | |
87041639 JK |
1531 | } else if (hw->mac_type == e1000_80003es2lan) { |
1532 | tarc = E1000_READ_REG(hw, TARC0); | |
1533 | tarc |= 1; | |
87041639 JK |
1534 | E1000_WRITE_REG(hw, TARC0, tarc); |
1535 | tarc = E1000_READ_REG(hw, TARC1); | |
1536 | tarc |= 1; | |
1537 | E1000_WRITE_REG(hw, TARC1, tarc); | |
2ae76d98 MC |
1538 | } |
1539 | ||
581d708e | 1540 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1541 | |
1542 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
1543 | adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP | | |
1544 | E1000_TXD_CMD_IFCS; | |
1545 | ||
581d708e | 1546 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1547 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1548 | else | |
1549 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1550 | ||
1551 | /* Cache if we're 82544 running in PCI-X because we'll | |
1552 | * need this to apply a workaround later in the send path. */ | |
581d708e MC |
1553 | if (hw->mac_type == e1000_82544 && |
1554 | hw->bus_type == e1000_bus_type_pcix) | |
1da177e4 | 1555 | adapter->pcix_82544 = 1; |
7e6c9861 JK |
1556 | |
1557 | E1000_WRITE_REG(hw, TCTL, tctl); | |
1558 | ||
1da177e4 LT |
1559 | } |
1560 | ||
1561 | /** | |
1562 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1563 | * @adapter: board private structure | |
581d708e | 1564 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1565 | * |
1566 | * Returns 0 on success, negative on failure | |
1567 | **/ | |
1568 | ||
3ad2cc67 | 1569 | static int |
581d708e MC |
1570 | e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1571 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1572 | { |
1da177e4 | 1573 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1574 | int size, desc_len; |
1da177e4 LT |
1575 | |
1576 | size = sizeof(struct e1000_buffer) * rxdr->count; | |
cd94dd0b | 1577 | rxdr->buffer_info = vmalloc(size); |
581d708e | 1578 | if (!rxdr->buffer_info) { |
2648345f MC |
1579 | DPRINTK(PROBE, ERR, |
1580 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 LT |
1581 | return -ENOMEM; |
1582 | } | |
1583 | memset(rxdr->buffer_info, 0, size); | |
1584 | ||
2d7edb92 MC |
1585 | size = sizeof(struct e1000_ps_page) * rxdr->count; |
1586 | rxdr->ps_page = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1587 | if (!rxdr->ps_page) { |
2d7edb92 MC |
1588 | vfree(rxdr->buffer_info); |
1589 | DPRINTK(PROBE, ERR, | |
1590 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1591 | return -ENOMEM; | |
1592 | } | |
1593 | memset(rxdr->ps_page, 0, size); | |
1594 | ||
1595 | size = sizeof(struct e1000_ps_page_dma) * rxdr->count; | |
1596 | rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1597 | if (!rxdr->ps_page_dma) { |
2d7edb92 MC |
1598 | vfree(rxdr->buffer_info); |
1599 | kfree(rxdr->ps_page); | |
1600 | DPRINTK(PROBE, ERR, | |
1601 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1602 | return -ENOMEM; | |
1603 | } | |
1604 | memset(rxdr->ps_page_dma, 0, size); | |
1605 | ||
96838a40 | 1606 | if (adapter->hw.mac_type <= e1000_82547_rev_2) |
2d7edb92 MC |
1607 | desc_len = sizeof(struct e1000_rx_desc); |
1608 | else | |
1609 | desc_len = sizeof(union e1000_rx_desc_packet_split); | |
1610 | ||
1da177e4 LT |
1611 | /* Round up to nearest 4K */ |
1612 | ||
2d7edb92 | 1613 | rxdr->size = rxdr->count * desc_len; |
1da177e4 LT |
1614 | E1000_ROUNDUP(rxdr->size, 4096); |
1615 | ||
1616 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
1617 | ||
581d708e MC |
1618 | if (!rxdr->desc) { |
1619 | DPRINTK(PROBE, ERR, | |
1620 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 | 1621 | setup_rx_desc_die: |
1da177e4 | 1622 | vfree(rxdr->buffer_info); |
2d7edb92 MC |
1623 | kfree(rxdr->ps_page); |
1624 | kfree(rxdr->ps_page_dma); | |
1da177e4 LT |
1625 | return -ENOMEM; |
1626 | } | |
1627 | ||
2648345f | 1628 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1629 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1630 | void *olddesc = rxdr->desc; | |
1631 | dma_addr_t olddma = rxdr->dma; | |
2648345f MC |
1632 | DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " |
1633 | "at %p\n", rxdr->size, rxdr->desc); | |
1634 | /* Try again, without freeing the previous */ | |
1da177e4 | 1635 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); |
2648345f | 1636 | /* Failed allocation, critical failure */ |
581d708e | 1637 | if (!rxdr->desc) { |
1da177e4 | 1638 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
581d708e MC |
1639 | DPRINTK(PROBE, ERR, |
1640 | "Unable to allocate memory " | |
1641 | "for the receive descriptor ring\n"); | |
1da177e4 LT |
1642 | goto setup_rx_desc_die; |
1643 | } | |
1644 | ||
1645 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1646 | /* give up */ | |
2648345f MC |
1647 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, |
1648 | rxdr->dma); | |
1da177e4 | 1649 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
2648345f MC |
1650 | DPRINTK(PROBE, ERR, |
1651 | "Unable to allocate aligned memory " | |
1652 | "for the receive descriptor ring\n"); | |
581d708e | 1653 | goto setup_rx_desc_die; |
1da177e4 | 1654 | } else { |
2648345f | 1655 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1656 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
1657 | } | |
1658 | } | |
1659 | memset(rxdr->desc, 0, rxdr->size); | |
1660 | ||
1661 | rxdr->next_to_clean = 0; | |
1662 | rxdr->next_to_use = 0; | |
1663 | ||
1664 | return 0; | |
1665 | } | |
1666 | ||
581d708e MC |
1667 | /** |
1668 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1669 | * (Descriptors) for all queues | |
1670 | * @adapter: board private structure | |
1671 | * | |
581d708e MC |
1672 | * Return 0 on success, negative on failure |
1673 | **/ | |
1674 | ||
1675 | int | |
1676 | e1000_setup_all_rx_resources(struct e1000_adapter *adapter) | |
1677 | { | |
1678 | int i, err = 0; | |
1679 | ||
f56799ea | 1680 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1681 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
1682 | if (err) { | |
1683 | DPRINTK(PROBE, ERR, | |
1684 | "Allocation for Rx Queue %u failed\n", i); | |
3fbbc72e VA |
1685 | for (i-- ; i >= 0; i--) |
1686 | e1000_free_rx_resources(adapter, | |
1687 | &adapter->rx_ring[i]); | |
581d708e MC |
1688 | break; |
1689 | } | |
1690 | } | |
1691 | ||
1692 | return err; | |
1693 | } | |
1694 | ||
1da177e4 | 1695 | /** |
2648345f | 1696 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1697 | * @adapter: Board private structure |
1698 | **/ | |
e4c811c9 MC |
1699 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ |
1700 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
1da177e4 LT |
1701 | static void |
1702 | e1000_setup_rctl(struct e1000_adapter *adapter) | |
1703 | { | |
2d7edb92 MC |
1704 | uint32_t rctl, rfctl; |
1705 | uint32_t psrctl = 0; | |
35ec56bb | 1706 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
e4c811c9 MC |
1707 | uint32_t pages = 0; |
1708 | #endif | |
1da177e4 LT |
1709 | |
1710 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1711 | ||
1712 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1713 | ||
1714 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1715 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1716 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1717 | ||
0fadb059 | 1718 | if (adapter->hw.tbi_compatibility_on == 1) |
1da177e4 LT |
1719 | rctl |= E1000_RCTL_SBP; |
1720 | else | |
1721 | rctl &= ~E1000_RCTL_SBP; | |
1722 | ||
2d7edb92 MC |
1723 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1724 | rctl &= ~E1000_RCTL_LPE; | |
1725 | else | |
1726 | rctl |= E1000_RCTL_LPE; | |
1727 | ||
1da177e4 | 1728 | /* Setup buffer sizes */ |
9e2feace AK |
1729 | rctl &= ~E1000_RCTL_SZ_4096; |
1730 | rctl |= E1000_RCTL_BSEX; | |
1731 | switch (adapter->rx_buffer_len) { | |
1732 | case E1000_RXBUFFER_256: | |
1733 | rctl |= E1000_RCTL_SZ_256; | |
1734 | rctl &= ~E1000_RCTL_BSEX; | |
1735 | break; | |
1736 | case E1000_RXBUFFER_512: | |
1737 | rctl |= E1000_RCTL_SZ_512; | |
1738 | rctl &= ~E1000_RCTL_BSEX; | |
1739 | break; | |
1740 | case E1000_RXBUFFER_1024: | |
1741 | rctl |= E1000_RCTL_SZ_1024; | |
1742 | rctl &= ~E1000_RCTL_BSEX; | |
1743 | break; | |
a1415ee6 JK |
1744 | case E1000_RXBUFFER_2048: |
1745 | default: | |
1746 | rctl |= E1000_RCTL_SZ_2048; | |
1747 | rctl &= ~E1000_RCTL_BSEX; | |
1748 | break; | |
1749 | case E1000_RXBUFFER_4096: | |
1750 | rctl |= E1000_RCTL_SZ_4096; | |
1751 | break; | |
1752 | case E1000_RXBUFFER_8192: | |
1753 | rctl |= E1000_RCTL_SZ_8192; | |
1754 | break; | |
1755 | case E1000_RXBUFFER_16384: | |
1756 | rctl |= E1000_RCTL_SZ_16384; | |
1757 | break; | |
2d7edb92 MC |
1758 | } |
1759 | ||
35ec56bb | 1760 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
2d7edb92 MC |
1761 | /* 82571 and greater support packet-split where the protocol |
1762 | * header is placed in skb->data and the packet data is | |
1763 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
1764 | * In the case of a non-split, skb->data is linearly filled, | |
1765 | * followed by the page buffers. Therefore, skb->data is | |
1766 | * sized to hold the largest protocol header. | |
1767 | */ | |
e4c811c9 MC |
1768 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
1769 | if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) && | |
1770 | PAGE_SIZE <= 16384) | |
1771 | adapter->rx_ps_pages = pages; | |
1772 | else | |
1773 | adapter->rx_ps_pages = 0; | |
2d7edb92 | 1774 | #endif |
e4c811c9 | 1775 | if (adapter->rx_ps_pages) { |
2d7edb92 MC |
1776 | /* Configure extra packet-split registers */ |
1777 | rfctl = E1000_READ_REG(&adapter->hw, RFCTL); | |
1778 | rfctl |= E1000_RFCTL_EXTEN; | |
1779 | /* disable IPv6 packet split support */ | |
1780 | rfctl |= E1000_RFCTL_IPV6_DIS; | |
1781 | E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); | |
1782 | ||
7dfee0cb | 1783 | rctl |= E1000_RCTL_DTYP_PS; |
96838a40 | 1784 | |
2d7edb92 MC |
1785 | psrctl |= adapter->rx_ps_bsize0 >> |
1786 | E1000_PSRCTL_BSIZE0_SHIFT; | |
e4c811c9 MC |
1787 | |
1788 | switch (adapter->rx_ps_pages) { | |
1789 | case 3: | |
1790 | psrctl |= PAGE_SIZE << | |
1791 | E1000_PSRCTL_BSIZE3_SHIFT; | |
1792 | case 2: | |
1793 | psrctl |= PAGE_SIZE << | |
1794 | E1000_PSRCTL_BSIZE2_SHIFT; | |
1795 | case 1: | |
1796 | psrctl |= PAGE_SIZE >> | |
1797 | E1000_PSRCTL_BSIZE1_SHIFT; | |
1798 | break; | |
1799 | } | |
2d7edb92 MC |
1800 | |
1801 | E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); | |
1da177e4 LT |
1802 | } |
1803 | ||
1804 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1805 | } | |
1806 | ||
1807 | /** | |
1808 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1809 | * @adapter: board private structure | |
1810 | * | |
1811 | * Configure the Rx unit of the MAC after a reset. | |
1812 | **/ | |
1813 | ||
1814 | static void | |
1815 | e1000_configure_rx(struct e1000_adapter *adapter) | |
1816 | { | |
581d708e MC |
1817 | uint64_t rdba; |
1818 | struct e1000_hw *hw = &adapter->hw; | |
1819 | uint32_t rdlen, rctl, rxcsum, ctrl_ext; | |
2d7edb92 | 1820 | |
e4c811c9 | 1821 | if (adapter->rx_ps_pages) { |
0f15a8fa | 1822 | /* this is a 32 byte descriptor */ |
581d708e | 1823 | rdlen = adapter->rx_ring[0].count * |
2d7edb92 MC |
1824 | sizeof(union e1000_rx_desc_packet_split); |
1825 | adapter->clean_rx = e1000_clean_rx_irq_ps; | |
1826 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | |
1827 | } else { | |
581d708e MC |
1828 | rdlen = adapter->rx_ring[0].count * |
1829 | sizeof(struct e1000_rx_desc); | |
2d7edb92 MC |
1830 | adapter->clean_rx = e1000_clean_rx_irq; |
1831 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
1832 | } | |
1da177e4 LT |
1833 | |
1834 | /* disable receives while setting up the descriptors */ | |
581d708e MC |
1835 | rctl = E1000_READ_REG(hw, RCTL); |
1836 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
1837 | |
1838 | /* set the Receive Delay Timer Register */ | |
581d708e | 1839 | E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay); |
1da177e4 | 1840 | |
581d708e MC |
1841 | if (hw->mac_type >= e1000_82540) { |
1842 | E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay); | |
96838a40 | 1843 | if (adapter->itr > 1) |
581d708e | 1844 | E1000_WRITE_REG(hw, ITR, |
1da177e4 LT |
1845 | 1000000000 / (adapter->itr * 256)); |
1846 | } | |
1847 | ||
2ae76d98 | 1848 | if (hw->mac_type >= e1000_82571) { |
2ae76d98 | 1849 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); |
1e613fd9 | 1850 | /* Reset delay timers after every interrupt */ |
6fc7a7ec | 1851 | ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; |
1e613fd9 JK |
1852 | #ifdef CONFIG_E1000_NAPI |
1853 | /* Auto-Mask interrupts upon ICR read. */ | |
1854 | ctrl_ext |= E1000_CTRL_EXT_IAME; | |
1855 | #endif | |
2ae76d98 | 1856 | E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext); |
1e613fd9 | 1857 | E1000_WRITE_REG(hw, IAM, ~0); |
2ae76d98 MC |
1858 | E1000_WRITE_FLUSH(hw); |
1859 | } | |
1860 | ||
581d708e MC |
1861 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
1862 | * the Base and Length of the Rx Descriptor Ring */ | |
f56799ea | 1863 | switch (adapter->num_rx_queues) { |
24025e4e MC |
1864 | case 1: |
1865 | default: | |
581d708e | 1866 | rdba = adapter->rx_ring[0].dma; |
581d708e | 1867 | E1000_WRITE_REG(hw, RDLEN, rdlen); |
4ca213a6 AK |
1868 | E1000_WRITE_REG(hw, RDBAH, (rdba >> 32)); |
1869 | E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); | |
581d708e | 1870 | E1000_WRITE_REG(hw, RDT, 0); |
4ca213a6 | 1871 | E1000_WRITE_REG(hw, RDH, 0); |
581d708e MC |
1872 | adapter->rx_ring[0].rdh = E1000_RDH; |
1873 | adapter->rx_ring[0].rdt = E1000_RDT; | |
1874 | break; | |
24025e4e MC |
1875 | } |
1876 | ||
1da177e4 | 1877 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
581d708e MC |
1878 | if (hw->mac_type >= e1000_82543) { |
1879 | rxcsum = E1000_READ_REG(hw, RXCSUM); | |
96838a40 | 1880 | if (adapter->rx_csum == TRUE) { |
2d7edb92 MC |
1881 | rxcsum |= E1000_RXCSUM_TUOFL; |
1882 | ||
868d5309 | 1883 | /* Enable 82571 IPv4 payload checksum for UDP fragments |
2d7edb92 | 1884 | * Must be used in conjunction with packet-split. */ |
96838a40 JB |
1885 | if ((hw->mac_type >= e1000_82571) && |
1886 | (adapter->rx_ps_pages)) { | |
2d7edb92 MC |
1887 | rxcsum |= E1000_RXCSUM_IPPCSE; |
1888 | } | |
1889 | } else { | |
1890 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
1891 | /* don't need to clear IPPCSE as it defaults to 0 */ | |
1892 | } | |
581d708e | 1893 | E1000_WRITE_REG(hw, RXCSUM, rxcsum); |
1da177e4 LT |
1894 | } |
1895 | ||
1896 | /* Enable Receives */ | |
581d708e | 1897 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
1898 | } |
1899 | ||
1900 | /** | |
581d708e | 1901 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 1902 | * @adapter: board private structure |
581d708e | 1903 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
1904 | * |
1905 | * Free all transmit software resources | |
1906 | **/ | |
1907 | ||
3ad2cc67 | 1908 | static void |
581d708e MC |
1909 | e1000_free_tx_resources(struct e1000_adapter *adapter, |
1910 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
1911 | { |
1912 | struct pci_dev *pdev = adapter->pdev; | |
1913 | ||
581d708e | 1914 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 1915 | |
581d708e MC |
1916 | vfree(tx_ring->buffer_info); |
1917 | tx_ring->buffer_info = NULL; | |
1da177e4 | 1918 | |
581d708e | 1919 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); |
1da177e4 | 1920 | |
581d708e MC |
1921 | tx_ring->desc = NULL; |
1922 | } | |
1923 | ||
1924 | /** | |
1925 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
1926 | * @adapter: board private structure | |
1927 | * | |
1928 | * Free all transmit software resources | |
1929 | **/ | |
1930 | ||
1931 | void | |
1932 | e1000_free_all_tx_resources(struct e1000_adapter *adapter) | |
1933 | { | |
1934 | int i; | |
1935 | ||
f56799ea | 1936 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1937 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1938 | } |
1939 | ||
e619d523 | 1940 | static void |
1da177e4 LT |
1941 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, |
1942 | struct e1000_buffer *buffer_info) | |
1943 | { | |
96838a40 | 1944 | if (buffer_info->dma) { |
2648345f MC |
1945 | pci_unmap_page(adapter->pdev, |
1946 | buffer_info->dma, | |
1947 | buffer_info->length, | |
1948 | PCI_DMA_TODEVICE); | |
1da177e4 | 1949 | } |
8241e35e | 1950 | if (buffer_info->skb) |
1da177e4 | 1951 | dev_kfree_skb_any(buffer_info->skb); |
8241e35e | 1952 | memset(buffer_info, 0, sizeof(struct e1000_buffer)); |
1da177e4 LT |
1953 | } |
1954 | ||
1955 | /** | |
1956 | * e1000_clean_tx_ring - Free Tx Buffers | |
1957 | * @adapter: board private structure | |
581d708e | 1958 | * @tx_ring: ring to be cleaned |
1da177e4 LT |
1959 | **/ |
1960 | ||
1961 | static void | |
581d708e MC |
1962 | e1000_clean_tx_ring(struct e1000_adapter *adapter, |
1963 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 1964 | { |
1da177e4 LT |
1965 | struct e1000_buffer *buffer_info; |
1966 | unsigned long size; | |
1967 | unsigned int i; | |
1968 | ||
1969 | /* Free all the Tx ring sk_buffs */ | |
1970 | ||
96838a40 | 1971 | for (i = 0; i < tx_ring->count; i++) { |
1da177e4 LT |
1972 | buffer_info = &tx_ring->buffer_info[i]; |
1973 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
1974 | } | |
1975 | ||
1976 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
1977 | memset(tx_ring->buffer_info, 0, size); | |
1978 | ||
1979 | /* Zero out the descriptor ring */ | |
1980 | ||
1981 | memset(tx_ring->desc, 0, tx_ring->size); | |
1982 | ||
1983 | tx_ring->next_to_use = 0; | |
1984 | tx_ring->next_to_clean = 0; | |
fd803241 | 1985 | tx_ring->last_tx_tso = 0; |
1da177e4 | 1986 | |
581d708e MC |
1987 | writel(0, adapter->hw.hw_addr + tx_ring->tdh); |
1988 | writel(0, adapter->hw.hw_addr + tx_ring->tdt); | |
1989 | } | |
1990 | ||
1991 | /** | |
1992 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
1993 | * @adapter: board private structure | |
1994 | **/ | |
1995 | ||
1996 | static void | |
1997 | e1000_clean_all_tx_rings(struct e1000_adapter *adapter) | |
1998 | { | |
1999 | int i; | |
2000 | ||
f56799ea | 2001 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 2002 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
2003 | } |
2004 | ||
2005 | /** | |
2006 | * e1000_free_rx_resources - Free Rx Resources | |
2007 | * @adapter: board private structure | |
581d708e | 2008 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
2009 | * |
2010 | * Free all receive software resources | |
2011 | **/ | |
2012 | ||
3ad2cc67 | 2013 | static void |
581d708e MC |
2014 | e1000_free_rx_resources(struct e1000_adapter *adapter, |
2015 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2016 | { |
1da177e4 LT |
2017 | struct pci_dev *pdev = adapter->pdev; |
2018 | ||
581d708e | 2019 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
2020 | |
2021 | vfree(rx_ring->buffer_info); | |
2022 | rx_ring->buffer_info = NULL; | |
2d7edb92 MC |
2023 | kfree(rx_ring->ps_page); |
2024 | rx_ring->ps_page = NULL; | |
2025 | kfree(rx_ring->ps_page_dma); | |
2026 | rx_ring->ps_page_dma = NULL; | |
1da177e4 LT |
2027 | |
2028 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
2029 | ||
2030 | rx_ring->desc = NULL; | |
2031 | } | |
2032 | ||
2033 | /** | |
581d708e | 2034 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 2035 | * @adapter: board private structure |
581d708e MC |
2036 | * |
2037 | * Free all receive software resources | |
2038 | **/ | |
2039 | ||
2040 | void | |
2041 | e1000_free_all_rx_resources(struct e1000_adapter *adapter) | |
2042 | { | |
2043 | int i; | |
2044 | ||
f56799ea | 2045 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e MC |
2046 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); |
2047 | } | |
2048 | ||
2049 | /** | |
2050 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
2051 | * @adapter: board private structure | |
2052 | * @rx_ring: ring to free buffers from | |
1da177e4 LT |
2053 | **/ |
2054 | ||
2055 | static void | |
581d708e MC |
2056 | e1000_clean_rx_ring(struct e1000_adapter *adapter, |
2057 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 2058 | { |
1da177e4 | 2059 | struct e1000_buffer *buffer_info; |
2d7edb92 MC |
2060 | struct e1000_ps_page *ps_page; |
2061 | struct e1000_ps_page_dma *ps_page_dma; | |
1da177e4 LT |
2062 | struct pci_dev *pdev = adapter->pdev; |
2063 | unsigned long size; | |
2d7edb92 | 2064 | unsigned int i, j; |
1da177e4 LT |
2065 | |
2066 | /* Free all the Rx ring sk_buffs */ | |
96838a40 | 2067 | for (i = 0; i < rx_ring->count; i++) { |
1da177e4 | 2068 | buffer_info = &rx_ring->buffer_info[i]; |
96838a40 | 2069 | if (buffer_info->skb) { |
1da177e4 LT |
2070 | pci_unmap_single(pdev, |
2071 | buffer_info->dma, | |
2072 | buffer_info->length, | |
2073 | PCI_DMA_FROMDEVICE); | |
2074 | ||
2075 | dev_kfree_skb(buffer_info->skb); | |
2076 | buffer_info->skb = NULL; | |
997f5cbd JK |
2077 | } |
2078 | ps_page = &rx_ring->ps_page[i]; | |
2079 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
2080 | for (j = 0; j < adapter->rx_ps_pages; j++) { | |
2081 | if (!ps_page->ps_page[j]) break; | |
2082 | pci_unmap_page(pdev, | |
2083 | ps_page_dma->ps_page_dma[j], | |
2084 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
2085 | ps_page_dma->ps_page_dma[j] = 0; | |
2086 | put_page(ps_page->ps_page[j]); | |
2087 | ps_page->ps_page[j] = NULL; | |
1da177e4 LT |
2088 | } |
2089 | } | |
2090 | ||
2091 | size = sizeof(struct e1000_buffer) * rx_ring->count; | |
2092 | memset(rx_ring->buffer_info, 0, size); | |
2d7edb92 MC |
2093 | size = sizeof(struct e1000_ps_page) * rx_ring->count; |
2094 | memset(rx_ring->ps_page, 0, size); | |
2095 | size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; | |
2096 | memset(rx_ring->ps_page_dma, 0, size); | |
1da177e4 LT |
2097 | |
2098 | /* Zero out the descriptor ring */ | |
2099 | ||
2100 | memset(rx_ring->desc, 0, rx_ring->size); | |
2101 | ||
2102 | rx_ring->next_to_clean = 0; | |
2103 | rx_ring->next_to_use = 0; | |
2104 | ||
581d708e MC |
2105 | writel(0, adapter->hw.hw_addr + rx_ring->rdh); |
2106 | writel(0, adapter->hw.hw_addr + rx_ring->rdt); | |
2107 | } | |
2108 | ||
2109 | /** | |
2110 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
2111 | * @adapter: board private structure | |
2112 | **/ | |
2113 | ||
2114 | static void | |
2115 | e1000_clean_all_rx_rings(struct e1000_adapter *adapter) | |
2116 | { | |
2117 | int i; | |
2118 | ||
f56799ea | 2119 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 2120 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
1da177e4 LT |
2121 | } |
2122 | ||
2123 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
2124 | * and memory write and invalidate disabled for certain operations | |
2125 | */ | |
2126 | static void | |
2127 | e1000_enter_82542_rst(struct e1000_adapter *adapter) | |
2128 | { | |
2129 | struct net_device *netdev = adapter->netdev; | |
2130 | uint32_t rctl; | |
2131 | ||
2132 | e1000_pci_clear_mwi(&adapter->hw); | |
2133 | ||
2134 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2135 | rctl |= E1000_RCTL_RST; | |
2136 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2137 | E1000_WRITE_FLUSH(&adapter->hw); | |
2138 | mdelay(5); | |
2139 | ||
96838a40 | 2140 | if (netif_running(netdev)) |
581d708e | 2141 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
2142 | } |
2143 | ||
2144 | static void | |
2145 | e1000_leave_82542_rst(struct e1000_adapter *adapter) | |
2146 | { | |
2147 | struct net_device *netdev = adapter->netdev; | |
2148 | uint32_t rctl; | |
2149 | ||
2150 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2151 | rctl &= ~E1000_RCTL_RST; | |
2152 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2153 | E1000_WRITE_FLUSH(&adapter->hw); | |
2154 | mdelay(5); | |
2155 | ||
96838a40 | 2156 | if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) |
1da177e4 LT |
2157 | e1000_pci_set_mwi(&adapter->hw); |
2158 | ||
96838a40 | 2159 | if (netif_running(netdev)) { |
72d64a43 JK |
2160 | /* No need to loop, because 82542 supports only 1 queue */ |
2161 | struct e1000_rx_ring *ring = &adapter->rx_ring[0]; | |
7c4d3367 | 2162 | e1000_configure_rx(adapter); |
72d64a43 | 2163 | adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); |
1da177e4 LT |
2164 | } |
2165 | } | |
2166 | ||
2167 | /** | |
2168 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2169 | * @netdev: network interface device structure | |
2170 | * @p: pointer to an address structure | |
2171 | * | |
2172 | * Returns 0 on success, negative on failure | |
2173 | **/ | |
2174 | ||
2175 | static int | |
2176 | e1000_set_mac(struct net_device *netdev, void *p) | |
2177 | { | |
60490fe0 | 2178 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2179 | struct sockaddr *addr = p; |
2180 | ||
96838a40 | 2181 | if (!is_valid_ether_addr(addr->sa_data)) |
1da177e4 LT |
2182 | return -EADDRNOTAVAIL; |
2183 | ||
2184 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2185 | ||
96838a40 | 2186 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2187 | e1000_enter_82542_rst(adapter); |
2188 | ||
2189 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
2190 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
2191 | ||
2192 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2193 | ||
868d5309 MC |
2194 | /* With 82571 controllers, LAA may be overwritten (with the default) |
2195 | * due to controller reset from the other port. */ | |
2196 | if (adapter->hw.mac_type == e1000_82571) { | |
2197 | /* activate the work around */ | |
2198 | adapter->hw.laa_is_present = 1; | |
2199 | ||
96838a40 JB |
2200 | /* Hold a copy of the LAA in RAR[14] This is done so that |
2201 | * between the time RAR[0] gets clobbered and the time it | |
2202 | * gets fixed (in e1000_watchdog), the actual LAA is in one | |
868d5309 | 2203 | * of the RARs and no incoming packets directed to this port |
96838a40 | 2204 | * are dropped. Eventaully the LAA will be in RAR[0] and |
868d5309 | 2205 | * RAR[14] */ |
96838a40 | 2206 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, |
868d5309 MC |
2207 | E1000_RAR_ENTRIES - 1); |
2208 | } | |
2209 | ||
96838a40 | 2210 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2211 | e1000_leave_82542_rst(adapter); |
2212 | ||
2213 | return 0; | |
2214 | } | |
2215 | ||
2216 | /** | |
2217 | * e1000_set_multi - Multicast and Promiscuous mode set | |
2218 | * @netdev: network interface device structure | |
2219 | * | |
2220 | * The set_multi entry point is called whenever the multicast address | |
2221 | * list or the network interface flags are updated. This routine is | |
2222 | * responsible for configuring the hardware for proper multicast, | |
2223 | * promiscuous mode, and all-multi behavior. | |
2224 | **/ | |
2225 | ||
2226 | static void | |
2227 | e1000_set_multi(struct net_device *netdev) | |
2228 | { | |
60490fe0 | 2229 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2230 | struct e1000_hw *hw = &adapter->hw; |
2231 | struct dev_mc_list *mc_ptr; | |
2232 | uint32_t rctl; | |
2233 | uint32_t hash_value; | |
868d5309 | 2234 | int i, rar_entries = E1000_RAR_ENTRIES; |
cd94dd0b AK |
2235 | int mta_reg_count = (hw->mac_type == e1000_ich8lan) ? |
2236 | E1000_NUM_MTA_REGISTERS_ICH8LAN : | |
2237 | E1000_NUM_MTA_REGISTERS; | |
2238 | ||
2239 | if (adapter->hw.mac_type == e1000_ich8lan) | |
2240 | rar_entries = E1000_RAR_ENTRIES_ICH8LAN; | |
1da177e4 | 2241 | |
868d5309 MC |
2242 | /* reserve RAR[14] for LAA over-write work-around */ |
2243 | if (adapter->hw.mac_type == e1000_82571) | |
2244 | rar_entries--; | |
1da177e4 | 2245 | |
2648345f MC |
2246 | /* Check for Promiscuous and All Multicast modes */ |
2247 | ||
1da177e4 LT |
2248 | rctl = E1000_READ_REG(hw, RCTL); |
2249 | ||
96838a40 | 2250 | if (netdev->flags & IFF_PROMISC) { |
1da177e4 | 2251 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
96838a40 | 2252 | } else if (netdev->flags & IFF_ALLMULTI) { |
1da177e4 LT |
2253 | rctl |= E1000_RCTL_MPE; |
2254 | rctl &= ~E1000_RCTL_UPE; | |
2255 | } else { | |
2256 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2257 | } | |
2258 | ||
2259 | E1000_WRITE_REG(hw, RCTL, rctl); | |
2260 | ||
2261 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2262 | ||
96838a40 | 2263 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2264 | e1000_enter_82542_rst(adapter); |
2265 | ||
2266 | /* load the first 14 multicast address into the exact filters 1-14 | |
2267 | * RAR 0 is used for the station MAC adddress | |
2268 | * if there are not 14 addresses, go ahead and clear the filters | |
868d5309 | 2269 | * -- with 82571 controllers only 0-13 entries are filled here |
1da177e4 LT |
2270 | */ |
2271 | mc_ptr = netdev->mc_list; | |
2272 | ||
96838a40 | 2273 | for (i = 1; i < rar_entries; i++) { |
868d5309 | 2274 | if (mc_ptr) { |
1da177e4 LT |
2275 | e1000_rar_set(hw, mc_ptr->dmi_addr, i); |
2276 | mc_ptr = mc_ptr->next; | |
2277 | } else { | |
2278 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
4ca213a6 | 2279 | E1000_WRITE_FLUSH(hw); |
1da177e4 | 2280 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); |
4ca213a6 | 2281 | E1000_WRITE_FLUSH(hw); |
1da177e4 LT |
2282 | } |
2283 | } | |
2284 | ||
2285 | /* clear the old settings from the multicast hash table */ | |
2286 | ||
cd94dd0b | 2287 | for (i = 0; i < mta_reg_count; i++) { |
1da177e4 | 2288 | E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); |
4ca213a6 AK |
2289 | E1000_WRITE_FLUSH(hw); |
2290 | } | |
1da177e4 LT |
2291 | |
2292 | /* load any remaining addresses into the hash table */ | |
2293 | ||
96838a40 | 2294 | for (; mc_ptr; mc_ptr = mc_ptr->next) { |
1da177e4 LT |
2295 | hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr); |
2296 | e1000_mta_set(hw, hash_value); | |
2297 | } | |
2298 | ||
96838a40 | 2299 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 | 2300 | e1000_leave_82542_rst(adapter); |
1da177e4 LT |
2301 | } |
2302 | ||
2303 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2304 | * the phy */ | |
2305 | ||
2306 | static void | |
2307 | e1000_update_phy_info(unsigned long data) | |
2308 | { | |
2309 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2310 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2311 | } | |
2312 | ||
2313 | /** | |
2314 | * e1000_82547_tx_fifo_stall - Timer Call-back | |
2315 | * @data: pointer to adapter cast into an unsigned long | |
2316 | **/ | |
2317 | ||
2318 | static void | |
2319 | e1000_82547_tx_fifo_stall(unsigned long data) | |
2320 | { | |
2321 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2322 | struct net_device *netdev = adapter->netdev; | |
2323 | uint32_t tctl; | |
2324 | ||
96838a40 JB |
2325 | if (atomic_read(&adapter->tx_fifo_stall)) { |
2326 | if ((E1000_READ_REG(&adapter->hw, TDT) == | |
1da177e4 LT |
2327 | E1000_READ_REG(&adapter->hw, TDH)) && |
2328 | (E1000_READ_REG(&adapter->hw, TDFT) == | |
2329 | E1000_READ_REG(&adapter->hw, TDFH)) && | |
2330 | (E1000_READ_REG(&adapter->hw, TDFTS) == | |
2331 | E1000_READ_REG(&adapter->hw, TDFHS))) { | |
2332 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2333 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
2334 | tctl & ~E1000_TCTL_EN); | |
2335 | E1000_WRITE_REG(&adapter->hw, TDFT, | |
2336 | adapter->tx_head_addr); | |
2337 | E1000_WRITE_REG(&adapter->hw, TDFH, | |
2338 | adapter->tx_head_addr); | |
2339 | E1000_WRITE_REG(&adapter->hw, TDFTS, | |
2340 | adapter->tx_head_addr); | |
2341 | E1000_WRITE_REG(&adapter->hw, TDFHS, | |
2342 | adapter->tx_head_addr); | |
2343 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
2344 | E1000_WRITE_FLUSH(&adapter->hw); | |
2345 | ||
2346 | adapter->tx_fifo_head = 0; | |
2347 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2348 | netif_wake_queue(netdev); | |
2349 | } else { | |
2350 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); | |
2351 | } | |
2352 | } | |
2353 | } | |
2354 | ||
2355 | /** | |
2356 | * e1000_watchdog - Timer Call-back | |
2357 | * @data: pointer to adapter cast into an unsigned long | |
2358 | **/ | |
2359 | static void | |
2360 | e1000_watchdog(unsigned long data) | |
2361 | { | |
2362 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
1da177e4 | 2363 | struct net_device *netdev = adapter->netdev; |
545c67c0 | 2364 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
7e6c9861 | 2365 | uint32_t link, tctl; |
cd94dd0b AK |
2366 | int32_t ret_val; |
2367 | ||
2368 | ret_val = e1000_check_for_link(&adapter->hw); | |
2369 | if ((ret_val == E1000_ERR_PHY) && | |
2370 | (adapter->hw.phy_type == e1000_phy_igp_3) && | |
2371 | (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { | |
2372 | /* See e1000_kumeran_lock_loss_workaround() */ | |
2373 | DPRINTK(LINK, INFO, | |
2374 | "Gigabit has been disabled, downgrading speed\n"); | |
2375 | } | |
2d7edb92 MC |
2376 | if (adapter->hw.mac_type == e1000_82573) { |
2377 | e1000_enable_tx_pkt_filtering(&adapter->hw); | |
96838a40 | 2378 | if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) |
2d7edb92 | 2379 | e1000_update_mng_vlan(adapter); |
96838a40 | 2380 | } |
1da177e4 | 2381 | |
96838a40 | 2382 | if ((adapter->hw.media_type == e1000_media_type_internal_serdes) && |
1da177e4 LT |
2383 | !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) |
2384 | link = !adapter->hw.serdes_link_down; | |
2385 | else | |
2386 | link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; | |
2387 | ||
96838a40 JB |
2388 | if (link) { |
2389 | if (!netif_carrier_ok(netdev)) { | |
fe7fe28e | 2390 | boolean_t txb2b = 1; |
1da177e4 LT |
2391 | e1000_get_speed_and_duplex(&adapter->hw, |
2392 | &adapter->link_speed, | |
2393 | &adapter->link_duplex); | |
2394 | ||
2395 | DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n", | |
2396 | adapter->link_speed, | |
2397 | adapter->link_duplex == FULL_DUPLEX ? | |
2398 | "Full Duplex" : "Half Duplex"); | |
2399 | ||
7e6c9861 JK |
2400 | /* tweak tx_queue_len according to speed/duplex |
2401 | * and adjust the timeout factor */ | |
66a2b0a3 JK |
2402 | netdev->tx_queue_len = adapter->tx_queue_len; |
2403 | adapter->tx_timeout_factor = 1; | |
7e6c9861 JK |
2404 | switch (adapter->link_speed) { |
2405 | case SPEED_10: | |
fe7fe28e | 2406 | txb2b = 0; |
7e6c9861 JK |
2407 | netdev->tx_queue_len = 10; |
2408 | adapter->tx_timeout_factor = 8; | |
2409 | break; | |
2410 | case SPEED_100: | |
fe7fe28e | 2411 | txb2b = 0; |
7e6c9861 JK |
2412 | netdev->tx_queue_len = 100; |
2413 | /* maybe add some timeout factor ? */ | |
2414 | break; | |
2415 | } | |
2416 | ||
fe7fe28e | 2417 | if ((adapter->hw.mac_type == e1000_82571 || |
7e6c9861 | 2418 | adapter->hw.mac_type == e1000_82572) && |
fe7fe28e | 2419 | txb2b == 0) { |
7e6c9861 JK |
2420 | #define SPEED_MODE_BIT (1 << 21) |
2421 | uint32_t tarc0; | |
2422 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); | |
2423 | tarc0 &= ~SPEED_MODE_BIT; | |
2424 | E1000_WRITE_REG(&adapter->hw, TARC0, tarc0); | |
2425 | } | |
2426 | ||
2427 | #ifdef NETIF_F_TSO | |
2428 | /* disable TSO for pcie and 10/100 speeds, to avoid | |
2429 | * some hardware issues */ | |
2430 | if (!adapter->tso_force && | |
2431 | adapter->hw.bus_type == e1000_bus_type_pci_express){ | |
66a2b0a3 JK |
2432 | switch (adapter->link_speed) { |
2433 | case SPEED_10: | |
66a2b0a3 | 2434 | case SPEED_100: |
7e6c9861 JK |
2435 | DPRINTK(PROBE,INFO, |
2436 | "10/100 speed: disabling TSO\n"); | |
2437 | netdev->features &= ~NETIF_F_TSO; | |
2438 | break; | |
2439 | case SPEED_1000: | |
2440 | netdev->features |= NETIF_F_TSO; | |
2441 | break; | |
2442 | default: | |
2443 | /* oops */ | |
66a2b0a3 JK |
2444 | break; |
2445 | } | |
2446 | } | |
7e6c9861 JK |
2447 | #endif |
2448 | ||
2449 | /* enable transmits in the hardware, need to do this | |
2450 | * after setting TARC0 */ | |
2451 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2452 | tctl |= E1000_TCTL_EN; | |
2453 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
66a2b0a3 | 2454 | |
1da177e4 LT |
2455 | netif_carrier_on(netdev); |
2456 | netif_wake_queue(netdev); | |
2457 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
2458 | adapter->smartspeed = 0; | |
2459 | } | |
2460 | } else { | |
96838a40 | 2461 | if (netif_carrier_ok(netdev)) { |
1da177e4 LT |
2462 | adapter->link_speed = 0; |
2463 | adapter->link_duplex = 0; | |
2464 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); | |
2465 | netif_carrier_off(netdev); | |
2466 | netif_stop_queue(netdev); | |
2467 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
87041639 JK |
2468 | |
2469 | /* 80003ES2LAN workaround-- | |
2470 | * For packet buffer work-around on link down event; | |
2471 | * disable receives in the ISR and | |
2472 | * reset device here in the watchdog | |
2473 | */ | |
8fc897b0 | 2474 | if (adapter->hw.mac_type == e1000_80003es2lan) |
87041639 JK |
2475 | /* reset device */ |
2476 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2477 | } |
2478 | ||
2479 | e1000_smartspeed(adapter); | |
2480 | } | |
2481 | ||
2482 | e1000_update_stats(adapter); | |
2483 | ||
2484 | adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
2485 | adapter->tpt_old = adapter->stats.tpt; | |
2486 | adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; | |
2487 | adapter->colc_old = adapter->stats.colc; | |
2488 | ||
2489 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2490 | adapter->gorcl_old = adapter->stats.gorcl; | |
2491 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2492 | adapter->gotcl_old = adapter->stats.gotcl; | |
2493 | ||
2494 | e1000_update_adaptive(&adapter->hw); | |
2495 | ||
f56799ea | 2496 | if (!netif_carrier_ok(netdev)) { |
581d708e | 2497 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { |
1da177e4 LT |
2498 | /* We've lost link, so the controller stops DMA, |
2499 | * but we've got queued Tx work that's never going | |
2500 | * to get done, so reset controller to flush Tx. | |
2501 | * (Do the reset outside of interrupt context). */ | |
87041639 JK |
2502 | adapter->tx_timeout_count++; |
2503 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2504 | } |
2505 | } | |
2506 | ||
2507 | /* Dynamic mode for Interrupt Throttle Rate (ITR) */ | |
96838a40 | 2508 | if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) { |
1da177e4 LT |
2509 | /* Symmetric Tx/Rx gets a reduced ITR=2000; Total |
2510 | * asymmetrical Tx or Rx gets ITR=8000; everyone | |
2511 | * else is between 2000-8000. */ | |
2512 | uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000; | |
96838a40 | 2513 | uint32_t dif = (adapter->gotcl > adapter->gorcl ? |
1da177e4 LT |
2514 | adapter->gotcl - adapter->gorcl : |
2515 | adapter->gorcl - adapter->gotcl) / 10000; | |
2516 | uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; | |
2517 | E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256)); | |
2518 | } | |
2519 | ||
2520 | /* Cause software interrupt to ensure rx ring is cleaned */ | |
2521 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); | |
2522 | ||
2648345f | 2523 | /* Force detection of hung controller every watchdog period */ |
1da177e4 LT |
2524 | adapter->detect_tx_hung = TRUE; |
2525 | ||
96838a40 | 2526 | /* With 82571 controllers, LAA may be overwritten due to controller |
868d5309 MC |
2527 | * reset from the other port. Set the appropriate LAA in RAR[0] */ |
2528 | if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present) | |
2529 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2530 | ||
1da177e4 LT |
2531 | /* Reset the timer */ |
2532 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
2533 | } | |
2534 | ||
2535 | #define E1000_TX_FLAGS_CSUM 0x00000001 | |
2536 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2537 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2538 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
1da177e4 LT |
2539 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2540 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2541 | ||
e619d523 | 2542 | static int |
581d708e MC |
2543 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2544 | struct sk_buff *skb) | |
1da177e4 LT |
2545 | { |
2546 | #ifdef NETIF_F_TSO | |
2547 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2548 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2549 | unsigned int i; |
2550 | uint32_t cmd_length = 0; | |
2d7edb92 | 2551 | uint16_t ipcse = 0, tucse, mss; |
1da177e4 LT |
2552 | uint8_t ipcss, ipcso, tucss, tucso, hdr_len; |
2553 | int err; | |
2554 | ||
89114afd | 2555 | if (skb_is_gso(skb)) { |
1da177e4 LT |
2556 | if (skb_header_cloned(skb)) { |
2557 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2558 | if (err) | |
2559 | return err; | |
2560 | } | |
2561 | ||
2562 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
7967168c | 2563 | mss = skb_shinfo(skb)->gso_size; |
60828236 | 2564 | if (skb->protocol == htons(ETH_P_IP)) { |
2d7edb92 MC |
2565 | skb->nh.iph->tot_len = 0; |
2566 | skb->nh.iph->check = 0; | |
2567 | skb->h.th->check = | |
2568 | ~csum_tcpudp_magic(skb->nh.iph->saddr, | |
2569 | skb->nh.iph->daddr, | |
2570 | 0, | |
2571 | IPPROTO_TCP, | |
2572 | 0); | |
2573 | cmd_length = E1000_TXD_CMD_IP; | |
2574 | ipcse = skb->h.raw - skb->data - 1; | |
2575 | #ifdef NETIF_F_TSO_IPV6 | |
e15fdd03 | 2576 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
2d7edb92 MC |
2577 | skb->nh.ipv6h->payload_len = 0; |
2578 | skb->h.th->check = | |
2579 | ~csum_ipv6_magic(&skb->nh.ipv6h->saddr, | |
2580 | &skb->nh.ipv6h->daddr, | |
2581 | 0, | |
2582 | IPPROTO_TCP, | |
2583 | 0); | |
2584 | ipcse = 0; | |
2585 | #endif | |
2586 | } | |
1da177e4 LT |
2587 | ipcss = skb->nh.raw - skb->data; |
2588 | ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; | |
1da177e4 LT |
2589 | tucss = skb->h.raw - skb->data; |
2590 | tucso = (void *)&(skb->h.th->check) - (void *)skb->data; | |
2591 | tucse = 0; | |
2592 | ||
2593 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2594 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2595 | |
581d708e MC |
2596 | i = tx_ring->next_to_use; |
2597 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2598 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 LT |
2599 | |
2600 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2601 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2602 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2603 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2604 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2605 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2606 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2607 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2608 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2609 | ||
545c67c0 JK |
2610 | buffer_info->time_stamp = jiffies; |
2611 | ||
581d708e MC |
2612 | if (++i == tx_ring->count) i = 0; |
2613 | tx_ring->next_to_use = i; | |
1da177e4 | 2614 | |
8241e35e | 2615 | return TRUE; |
1da177e4 LT |
2616 | } |
2617 | #endif | |
2618 | ||
8241e35e | 2619 | return FALSE; |
1da177e4 LT |
2620 | } |
2621 | ||
e619d523 | 2622 | static boolean_t |
581d708e MC |
2623 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2624 | struct sk_buff *skb) | |
1da177e4 LT |
2625 | { |
2626 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2627 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2628 | unsigned int i; |
2629 | uint8_t css; | |
2630 | ||
96838a40 | 2631 | if (likely(skb->ip_summed == CHECKSUM_HW)) { |
1da177e4 LT |
2632 | css = skb->h.raw - skb->data; |
2633 | ||
581d708e | 2634 | i = tx_ring->next_to_use; |
545c67c0 | 2635 | buffer_info = &tx_ring->buffer_info[i]; |
581d708e | 2636 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); |
1da177e4 LT |
2637 | |
2638 | context_desc->upper_setup.tcp_fields.tucss = css; | |
2639 | context_desc->upper_setup.tcp_fields.tucso = css + skb->csum; | |
2640 | context_desc->upper_setup.tcp_fields.tucse = 0; | |
2641 | context_desc->tcp_seg_setup.data = 0; | |
2642 | context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); | |
2643 | ||
545c67c0 JK |
2644 | buffer_info->time_stamp = jiffies; |
2645 | ||
581d708e MC |
2646 | if (unlikely(++i == tx_ring->count)) i = 0; |
2647 | tx_ring->next_to_use = i; | |
1da177e4 LT |
2648 | |
2649 | return TRUE; | |
2650 | } | |
2651 | ||
2652 | return FALSE; | |
2653 | } | |
2654 | ||
2655 | #define E1000_MAX_TXD_PWR 12 | |
2656 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2657 | ||
e619d523 | 2658 | static int |
581d708e MC |
2659 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2660 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, | |
2661 | unsigned int nr_frags, unsigned int mss) | |
1da177e4 | 2662 | { |
1da177e4 LT |
2663 | struct e1000_buffer *buffer_info; |
2664 | unsigned int len = skb->len; | |
2665 | unsigned int offset = 0, size, count = 0, i; | |
2666 | unsigned int f; | |
2667 | len -= skb->data_len; | |
2668 | ||
2669 | i = tx_ring->next_to_use; | |
2670 | ||
96838a40 | 2671 | while (len) { |
1da177e4 LT |
2672 | buffer_info = &tx_ring->buffer_info[i]; |
2673 | size = min(len, max_per_txd); | |
2674 | #ifdef NETIF_F_TSO | |
fd803241 JK |
2675 | /* Workaround for Controller erratum -- |
2676 | * descriptor for non-tso packet in a linear SKB that follows a | |
2677 | * tso gets written back prematurely before the data is fully | |
0f15a8fa | 2678 | * DMA'd to the controller */ |
fd803241 | 2679 | if (!skb->data_len && tx_ring->last_tx_tso && |
89114afd | 2680 | !skb_is_gso(skb)) { |
fd803241 JK |
2681 | tx_ring->last_tx_tso = 0; |
2682 | size -= 4; | |
2683 | } | |
2684 | ||
1da177e4 LT |
2685 | /* Workaround for premature desc write-backs |
2686 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2687 | if (unlikely(mss && !nr_frags && size == len && size > 8)) |
1da177e4 LT |
2688 | size -= 4; |
2689 | #endif | |
97338bde MC |
2690 | /* work-around for errata 10 and it applies |
2691 | * to all controllers in PCI-X mode | |
2692 | * The fix is to make sure that the first descriptor of a | |
2693 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
2694 | */ | |
96838a40 | 2695 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2696 | (size > 2015) && count == 0)) |
2697 | size = 2015; | |
96838a40 | 2698 | |
1da177e4 LT |
2699 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
2700 | * terminating buffers within evenly-aligned dwords. */ | |
96838a40 | 2701 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2702 | !((unsigned long)(skb->data + offset + size - 1) & 4) && |
2703 | size > 4)) | |
2704 | size -= 4; | |
2705 | ||
2706 | buffer_info->length = size; | |
2707 | buffer_info->dma = | |
2708 | pci_map_single(adapter->pdev, | |
2709 | skb->data + offset, | |
2710 | size, | |
2711 | PCI_DMA_TODEVICE); | |
2712 | buffer_info->time_stamp = jiffies; | |
2713 | ||
2714 | len -= size; | |
2715 | offset += size; | |
2716 | count++; | |
96838a40 | 2717 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2718 | } |
2719 | ||
96838a40 | 2720 | for (f = 0; f < nr_frags; f++) { |
1da177e4 LT |
2721 | struct skb_frag_struct *frag; |
2722 | ||
2723 | frag = &skb_shinfo(skb)->frags[f]; | |
2724 | len = frag->size; | |
2725 | offset = frag->page_offset; | |
2726 | ||
96838a40 | 2727 | while (len) { |
1da177e4 LT |
2728 | buffer_info = &tx_ring->buffer_info[i]; |
2729 | size = min(len, max_per_txd); | |
2730 | #ifdef NETIF_F_TSO | |
2731 | /* Workaround for premature desc write-backs | |
2732 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2733 | if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) |
1da177e4 LT |
2734 | size -= 4; |
2735 | #endif | |
2736 | /* Workaround for potential 82544 hang in PCI-X. | |
2737 | * Avoid terminating buffers within evenly-aligned | |
2738 | * dwords. */ | |
96838a40 | 2739 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2740 | !((unsigned long)(frag->page+offset+size-1) & 4) && |
2741 | size > 4)) | |
2742 | size -= 4; | |
2743 | ||
2744 | buffer_info->length = size; | |
2745 | buffer_info->dma = | |
2746 | pci_map_page(adapter->pdev, | |
2747 | frag->page, | |
2748 | offset, | |
2749 | size, | |
2750 | PCI_DMA_TODEVICE); | |
2751 | buffer_info->time_stamp = jiffies; | |
2752 | ||
2753 | len -= size; | |
2754 | offset += size; | |
2755 | count++; | |
96838a40 | 2756 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2757 | } |
2758 | } | |
2759 | ||
2760 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
2761 | tx_ring->buffer_info[i].skb = skb; | |
2762 | tx_ring->buffer_info[first].next_to_watch = i; | |
2763 | ||
2764 | return count; | |
2765 | } | |
2766 | ||
e619d523 | 2767 | static void |
581d708e MC |
2768 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2769 | int tx_flags, int count) | |
1da177e4 | 2770 | { |
1da177e4 LT |
2771 | struct e1000_tx_desc *tx_desc = NULL; |
2772 | struct e1000_buffer *buffer_info; | |
2773 | uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; | |
2774 | unsigned int i; | |
2775 | ||
96838a40 | 2776 | if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { |
1da177e4 LT |
2777 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | |
2778 | E1000_TXD_CMD_TSE; | |
2d7edb92 MC |
2779 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
2780 | ||
96838a40 | 2781 | if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) |
2d7edb92 | 2782 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; |
1da177e4 LT |
2783 | } |
2784 | ||
96838a40 | 2785 | if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { |
1da177e4 LT |
2786 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; |
2787 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
2788 | } | |
2789 | ||
96838a40 | 2790 | if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { |
1da177e4 LT |
2791 | txd_lower |= E1000_TXD_CMD_VLE; |
2792 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
2793 | } | |
2794 | ||
2795 | i = tx_ring->next_to_use; | |
2796 | ||
96838a40 | 2797 | while (count--) { |
1da177e4 LT |
2798 | buffer_info = &tx_ring->buffer_info[i]; |
2799 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
2800 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
2801 | tx_desc->lower.data = | |
2802 | cpu_to_le32(txd_lower | buffer_info->length); | |
2803 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
96838a40 | 2804 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2805 | } |
2806 | ||
2807 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
2808 | ||
2809 | /* Force memory writes to complete before letting h/w | |
2810 | * know there are new descriptors to fetch. (Only | |
2811 | * applicable for weak-ordered memory model archs, | |
2812 | * such as IA-64). */ | |
2813 | wmb(); | |
2814 | ||
2815 | tx_ring->next_to_use = i; | |
581d708e | 2816 | writel(i, adapter->hw.hw_addr + tx_ring->tdt); |
1da177e4 LT |
2817 | } |
2818 | ||
2819 | /** | |
2820 | * 82547 workaround to avoid controller hang in half-duplex environment. | |
2821 | * The workaround is to avoid queuing a large packet that would span | |
2822 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
2823 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
2824 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
2825 | * to the beginning of the Tx FIFO. | |
2826 | **/ | |
2827 | ||
2828 | #define E1000_FIFO_HDR 0x10 | |
2829 | #define E1000_82547_PAD_LEN 0x3E0 | |
2830 | ||
e619d523 | 2831 | static int |
1da177e4 LT |
2832 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) |
2833 | { | |
2834 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; | |
2835 | uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
2836 | ||
2837 | E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR); | |
2838 | ||
96838a40 | 2839 | if (adapter->link_duplex != HALF_DUPLEX) |
1da177e4 LT |
2840 | goto no_fifo_stall_required; |
2841 | ||
96838a40 | 2842 | if (atomic_read(&adapter->tx_fifo_stall)) |
1da177e4 LT |
2843 | return 1; |
2844 | ||
96838a40 | 2845 | if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { |
1da177e4 LT |
2846 | atomic_set(&adapter->tx_fifo_stall, 1); |
2847 | return 1; | |
2848 | } | |
2849 | ||
2850 | no_fifo_stall_required: | |
2851 | adapter->tx_fifo_head += skb_fifo_len; | |
96838a40 | 2852 | if (adapter->tx_fifo_head >= adapter->tx_fifo_size) |
1da177e4 LT |
2853 | adapter->tx_fifo_head -= adapter->tx_fifo_size; |
2854 | return 0; | |
2855 | } | |
2856 | ||
2d7edb92 | 2857 | #define MINIMUM_DHCP_PACKET_SIZE 282 |
e619d523 | 2858 | static int |
2d7edb92 MC |
2859 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) |
2860 | { | |
2861 | struct e1000_hw *hw = &adapter->hw; | |
2862 | uint16_t length, offset; | |
96838a40 JB |
2863 | if (vlan_tx_tag_present(skb)) { |
2864 | if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && | |
2d7edb92 MC |
2865 | ( adapter->hw.mng_cookie.status & |
2866 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) | |
2867 | return 0; | |
2868 | } | |
20a44028 | 2869 | if (skb->len > MINIMUM_DHCP_PACKET_SIZE) { |
2d7edb92 | 2870 | struct ethhdr *eth = (struct ethhdr *) skb->data; |
96838a40 JB |
2871 | if ((htons(ETH_P_IP) == eth->h_proto)) { |
2872 | const struct iphdr *ip = | |
2d7edb92 | 2873 | (struct iphdr *)((uint8_t *)skb->data+14); |
96838a40 JB |
2874 | if (IPPROTO_UDP == ip->protocol) { |
2875 | struct udphdr *udp = | |
2876 | (struct udphdr *)((uint8_t *)ip + | |
2d7edb92 | 2877 | (ip->ihl << 2)); |
96838a40 | 2878 | if (ntohs(udp->dest) == 67) { |
2d7edb92 MC |
2879 | offset = (uint8_t *)udp + 8 - skb->data; |
2880 | length = skb->len - offset; | |
2881 | ||
2882 | return e1000_mng_write_dhcp_info(hw, | |
96838a40 | 2883 | (uint8_t *)udp + 8, |
2d7edb92 MC |
2884 | length); |
2885 | } | |
2886 | } | |
2887 | } | |
2888 | } | |
2889 | return 0; | |
2890 | } | |
2891 | ||
1da177e4 LT |
2892 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
2893 | static int | |
2894 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
2895 | { | |
60490fe0 | 2896 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e | 2897 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
2898 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
2899 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
2900 | unsigned int tx_flags = 0; | |
2901 | unsigned int len = skb->len; | |
2902 | unsigned long flags; | |
2903 | unsigned int nr_frags = 0; | |
2904 | unsigned int mss = 0; | |
2905 | int count = 0; | |
76c224bc | 2906 | int tso; |
1da177e4 LT |
2907 | unsigned int f; |
2908 | len -= skb->data_len; | |
2909 | ||
581d708e | 2910 | tx_ring = adapter->tx_ring; |
24025e4e | 2911 | |
581d708e | 2912 | if (unlikely(skb->len <= 0)) { |
1da177e4 LT |
2913 | dev_kfree_skb_any(skb); |
2914 | return NETDEV_TX_OK; | |
2915 | } | |
2916 | ||
2917 | #ifdef NETIF_F_TSO | |
7967168c | 2918 | mss = skb_shinfo(skb)->gso_size; |
76c224bc | 2919 | /* The controller does a simple calculation to |
1da177e4 LT |
2920 | * make sure there is enough room in the FIFO before |
2921 | * initiating the DMA for each buffer. The calc is: | |
2922 | * 4 = ceil(buffer len/mss). To make sure we don't | |
2923 | * overrun the FIFO, adjust the max buffer len if mss | |
2924 | * drops. */ | |
96838a40 | 2925 | if (mss) { |
9a3056da | 2926 | uint8_t hdr_len; |
1da177e4 LT |
2927 | max_per_txd = min(mss << 2, max_per_txd); |
2928 | max_txd_pwr = fls(max_per_txd) - 1; | |
9a3056da | 2929 | |
9f687888 | 2930 | /* TSO Workaround for 82571/2/3 Controllers -- if skb->data |
9a3056da JK |
2931 | * points to just header, pull a few bytes of payload from |
2932 | * frags into skb->data */ | |
2933 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
9f687888 JK |
2934 | if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) { |
2935 | switch (adapter->hw.mac_type) { | |
2936 | unsigned int pull_size; | |
2937 | case e1000_82571: | |
2938 | case e1000_82572: | |
2939 | case e1000_82573: | |
cd94dd0b | 2940 | case e1000_ich8lan: |
9f687888 JK |
2941 | pull_size = min((unsigned int)4, skb->data_len); |
2942 | if (!__pskb_pull_tail(skb, pull_size)) { | |
a5eafce2 | 2943 | DPRINTK(DRV, ERR, |
9f687888 JK |
2944 | "__pskb_pull_tail failed.\n"); |
2945 | dev_kfree_skb_any(skb); | |
749dfc70 | 2946 | return NETDEV_TX_OK; |
9f687888 JK |
2947 | } |
2948 | len = skb->len - skb->data_len; | |
2949 | break; | |
2950 | default: | |
2951 | /* do nothing */ | |
2952 | break; | |
d74bbd3b | 2953 | } |
9a3056da | 2954 | } |
1da177e4 LT |
2955 | } |
2956 | ||
9a3056da | 2957 | /* reserve a descriptor for the offload context */ |
96838a40 | 2958 | if ((mss) || (skb->ip_summed == CHECKSUM_HW)) |
1da177e4 | 2959 | count++; |
2648345f | 2960 | count++; |
1da177e4 | 2961 | #else |
96838a40 | 2962 | if (skb->ip_summed == CHECKSUM_HW) |
1da177e4 LT |
2963 | count++; |
2964 | #endif | |
fd803241 JK |
2965 | |
2966 | #ifdef NETIF_F_TSO | |
2967 | /* Controller Erratum workaround */ | |
89114afd | 2968 | if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb)) |
fd803241 JK |
2969 | count++; |
2970 | #endif | |
2971 | ||
1da177e4 LT |
2972 | count += TXD_USE_COUNT(len, max_txd_pwr); |
2973 | ||
96838a40 | 2974 | if (adapter->pcix_82544) |
1da177e4 LT |
2975 | count++; |
2976 | ||
96838a40 | 2977 | /* work-around for errata 10 and it applies to all controllers |
97338bde MC |
2978 | * in PCI-X mode, so add one more descriptor to the count |
2979 | */ | |
96838a40 | 2980 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2981 | (len > 2015))) |
2982 | count++; | |
2983 | ||
1da177e4 | 2984 | nr_frags = skb_shinfo(skb)->nr_frags; |
96838a40 | 2985 | for (f = 0; f < nr_frags; f++) |
1da177e4 LT |
2986 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, |
2987 | max_txd_pwr); | |
96838a40 | 2988 | if (adapter->pcix_82544) |
1da177e4 LT |
2989 | count += nr_frags; |
2990 | ||
0f15a8fa JK |
2991 | |
2992 | if (adapter->hw.tx_pkt_filtering && | |
2993 | (adapter->hw.mac_type == e1000_82573)) | |
2d7edb92 MC |
2994 | e1000_transfer_dhcp_info(adapter, skb); |
2995 | ||
581d708e MC |
2996 | local_irq_save(flags); |
2997 | if (!spin_trylock(&tx_ring->tx_lock)) { | |
2998 | /* Collision - tell upper layer to requeue */ | |
2999 | local_irq_restore(flags); | |
3000 | return NETDEV_TX_LOCKED; | |
3001 | } | |
1da177e4 LT |
3002 | |
3003 | /* need: count + 2 desc gap to keep tail from touching | |
3004 | * head, otherwise try next time */ | |
581d708e | 3005 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) { |
1da177e4 | 3006 | netif_stop_queue(netdev); |
581d708e | 3007 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3008 | return NETDEV_TX_BUSY; |
3009 | } | |
3010 | ||
96838a40 JB |
3011 | if (unlikely(adapter->hw.mac_type == e1000_82547)) { |
3012 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { | |
1da177e4 LT |
3013 | netif_stop_queue(netdev); |
3014 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies); | |
581d708e | 3015 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3016 | return NETDEV_TX_BUSY; |
3017 | } | |
3018 | } | |
3019 | ||
96838a40 | 3020 | if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { |
1da177e4 LT |
3021 | tx_flags |= E1000_TX_FLAGS_VLAN; |
3022 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
3023 | } | |
3024 | ||
581d708e | 3025 | first = tx_ring->next_to_use; |
96838a40 | 3026 | |
581d708e | 3027 | tso = e1000_tso(adapter, tx_ring, skb); |
1da177e4 LT |
3028 | if (tso < 0) { |
3029 | dev_kfree_skb_any(skb); | |
581d708e | 3030 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3031 | return NETDEV_TX_OK; |
3032 | } | |
3033 | ||
fd803241 JK |
3034 | if (likely(tso)) { |
3035 | tx_ring->last_tx_tso = 1; | |
1da177e4 | 3036 | tx_flags |= E1000_TX_FLAGS_TSO; |
fd803241 | 3037 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) |
1da177e4 LT |
3038 | tx_flags |= E1000_TX_FLAGS_CSUM; |
3039 | ||
2d7edb92 | 3040 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
868d5309 | 3041 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
2d7edb92 | 3042 | * no longer assume, we must. */ |
60828236 | 3043 | if (likely(skb->protocol == htons(ETH_P_IP))) |
2d7edb92 MC |
3044 | tx_flags |= E1000_TX_FLAGS_IPV4; |
3045 | ||
581d708e MC |
3046 | e1000_tx_queue(adapter, tx_ring, tx_flags, |
3047 | e1000_tx_map(adapter, tx_ring, skb, first, | |
3048 | max_per_txd, nr_frags, mss)); | |
1da177e4 LT |
3049 | |
3050 | netdev->trans_start = jiffies; | |
3051 | ||
3052 | /* Make sure there is space in the ring for the next send. */ | |
581d708e | 3053 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2)) |
1da177e4 LT |
3054 | netif_stop_queue(netdev); |
3055 | ||
581d708e | 3056 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
3057 | return NETDEV_TX_OK; |
3058 | } | |
3059 | ||
3060 | /** | |
3061 | * e1000_tx_timeout - Respond to a Tx Hang | |
3062 | * @netdev: network interface device structure | |
3063 | **/ | |
3064 | ||
3065 | static void | |
3066 | e1000_tx_timeout(struct net_device *netdev) | |
3067 | { | |
60490fe0 | 3068 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
3069 | |
3070 | /* Do the reset outside of interrupt context */ | |
87041639 JK |
3071 | adapter->tx_timeout_count++; |
3072 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
3073 | } |
3074 | ||
3075 | static void | |
87041639 | 3076 | e1000_reset_task(struct net_device *netdev) |
1da177e4 | 3077 | { |
60490fe0 | 3078 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3079 | |
2db10a08 | 3080 | e1000_reinit_locked(adapter); |
1da177e4 LT |
3081 | } |
3082 | ||
3083 | /** | |
3084 | * e1000_get_stats - Get System Network Statistics | |
3085 | * @netdev: network interface device structure | |
3086 | * | |
3087 | * Returns the address of the device statistics structure. | |
3088 | * The statistics are actually updated from the timer callback. | |
3089 | **/ | |
3090 | ||
3091 | static struct net_device_stats * | |
3092 | e1000_get_stats(struct net_device *netdev) | |
3093 | { | |
60490fe0 | 3094 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3095 | |
6b7660cd | 3096 | /* only return the current stats */ |
1da177e4 LT |
3097 | return &adapter->net_stats; |
3098 | } | |
3099 | ||
3100 | /** | |
3101 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
3102 | * @netdev: network interface device structure | |
3103 | * @new_mtu: new value for maximum frame size | |
3104 | * | |
3105 | * Returns 0 on success, negative on failure | |
3106 | **/ | |
3107 | ||
3108 | static int | |
3109 | e1000_change_mtu(struct net_device *netdev, int new_mtu) | |
3110 | { | |
60490fe0 | 3111 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3112 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
85b22eb6 | 3113 | uint16_t eeprom_data = 0; |
1da177e4 | 3114 | |
96838a40 JB |
3115 | if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
3116 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
3117 | DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); | |
1da177e4 | 3118 | return -EINVAL; |
2d7edb92 | 3119 | } |
1da177e4 | 3120 | |
997f5cbd JK |
3121 | /* Adapter-specific max frame size limits. */ |
3122 | switch (adapter->hw.mac_type) { | |
9e2feace | 3123 | case e1000_undefined ... e1000_82542_rev2_1: |
cd94dd0b | 3124 | case e1000_ich8lan: |
997f5cbd JK |
3125 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
3126 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); | |
2d7edb92 | 3127 | return -EINVAL; |
2d7edb92 | 3128 | } |
997f5cbd | 3129 | break; |
85b22eb6 JK |
3130 | case e1000_82573: |
3131 | /* only enable jumbo frames if ASPM is disabled completely | |
3132 | * this means both bits must be zero in 0x1A bits 3:2 */ | |
3133 | e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, | |
3134 | &eeprom_data); | |
3135 | if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) { | |
3136 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { | |
3137 | DPRINTK(PROBE, ERR, | |
3138 | "Jumbo Frames not supported.\n"); | |
3139 | return -EINVAL; | |
3140 | } | |
3141 | break; | |
3142 | } | |
3143 | /* fall through to get support */ | |
997f5cbd JK |
3144 | case e1000_82571: |
3145 | case e1000_82572: | |
87041639 | 3146 | case e1000_80003es2lan: |
997f5cbd JK |
3147 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
3148 | if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { | |
3149 | DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n"); | |
3150 | return -EINVAL; | |
3151 | } | |
3152 | break; | |
3153 | default: | |
3154 | /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ | |
3155 | break; | |
1da177e4 LT |
3156 | } |
3157 | ||
87f5032e | 3158 | /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
9e2feace AK |
3159 | * means we reserve 2 more, this pushes us to allocate from the next |
3160 | * larger slab size | |
3161 | * i.e. RXBUFFER_2048 --> size-4096 slab */ | |
3162 | ||
3163 | if (max_frame <= E1000_RXBUFFER_256) | |
3164 | adapter->rx_buffer_len = E1000_RXBUFFER_256; | |
3165 | else if (max_frame <= E1000_RXBUFFER_512) | |
3166 | adapter->rx_buffer_len = E1000_RXBUFFER_512; | |
3167 | else if (max_frame <= E1000_RXBUFFER_1024) | |
3168 | adapter->rx_buffer_len = E1000_RXBUFFER_1024; | |
3169 | else if (max_frame <= E1000_RXBUFFER_2048) | |
3170 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | |
3171 | else if (max_frame <= E1000_RXBUFFER_4096) | |
3172 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; | |
3173 | else if (max_frame <= E1000_RXBUFFER_8192) | |
3174 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; | |
3175 | else if (max_frame <= E1000_RXBUFFER_16384) | |
3176 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; | |
3177 | ||
3178 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
9e2feace AK |
3179 | if (!adapter->hw.tbi_compatibility_on && |
3180 | ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) || | |
3181 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) | |
3182 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
997f5cbd | 3183 | |
2d7edb92 MC |
3184 | netdev->mtu = new_mtu; |
3185 | ||
2db10a08 AK |
3186 | if (netif_running(netdev)) |
3187 | e1000_reinit_locked(adapter); | |
1da177e4 | 3188 | |
1da177e4 LT |
3189 | adapter->hw.max_frame_size = max_frame; |
3190 | ||
3191 | return 0; | |
3192 | } | |
3193 | ||
3194 | /** | |
3195 | * e1000_update_stats - Update the board statistics counters | |
3196 | * @adapter: board private structure | |
3197 | **/ | |
3198 | ||
3199 | void | |
3200 | e1000_update_stats(struct e1000_adapter *adapter) | |
3201 | { | |
3202 | struct e1000_hw *hw = &adapter->hw; | |
282f33c9 | 3203 | struct pci_dev *pdev = adapter->pdev; |
1da177e4 LT |
3204 | unsigned long flags; |
3205 | uint16_t phy_tmp; | |
3206 | ||
3207 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
3208 | ||
282f33c9 LV |
3209 | /* |
3210 | * Prevent stats update while adapter is being reset, or if the pci | |
3211 | * connection is down. | |
3212 | */ | |
9026729b | 3213 | if (adapter->link_speed == 0) |
282f33c9 LV |
3214 | return; |
3215 | if (pdev->error_state && pdev->error_state != pci_channel_io_normal) | |
9026729b AK |
3216 | return; |
3217 | ||
1da177e4 LT |
3218 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3219 | ||
3220 | /* these counters are modified from e1000_adjust_tbi_stats, | |
3221 | * called from the interrupt context, so they must only | |
3222 | * be written while holding adapter->stats_lock | |
3223 | */ | |
3224 | ||
3225 | adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); | |
3226 | adapter->stats.gprc += E1000_READ_REG(hw, GPRC); | |
3227 | adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); | |
3228 | adapter->stats.gorch += E1000_READ_REG(hw, GORCH); | |
3229 | adapter->stats.bprc += E1000_READ_REG(hw, BPRC); | |
3230 | adapter->stats.mprc += E1000_READ_REG(hw, MPRC); | |
3231 | adapter->stats.roc += E1000_READ_REG(hw, ROC); | |
cd94dd0b AK |
3232 | |
3233 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
1da177e4 LT |
3234 | adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); |
3235 | adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); | |
3236 | adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); | |
3237 | adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); | |
3238 | adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); | |
3239 | adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); | |
cd94dd0b | 3240 | } |
1da177e4 LT |
3241 | |
3242 | adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); | |
3243 | adapter->stats.mpc += E1000_READ_REG(hw, MPC); | |
3244 | adapter->stats.scc += E1000_READ_REG(hw, SCC); | |
3245 | adapter->stats.ecol += E1000_READ_REG(hw, ECOL); | |
3246 | adapter->stats.mcc += E1000_READ_REG(hw, MCC); | |
3247 | adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); | |
3248 | adapter->stats.dc += E1000_READ_REG(hw, DC); | |
3249 | adapter->stats.sec += E1000_READ_REG(hw, SEC); | |
3250 | adapter->stats.rlec += E1000_READ_REG(hw, RLEC); | |
3251 | adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); | |
3252 | adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); | |
3253 | adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); | |
3254 | adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); | |
3255 | adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); | |
3256 | adapter->stats.gptc += E1000_READ_REG(hw, GPTC); | |
3257 | adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); | |
3258 | adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); | |
3259 | adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); | |
3260 | adapter->stats.ruc += E1000_READ_REG(hw, RUC); | |
3261 | adapter->stats.rfc += E1000_READ_REG(hw, RFC); | |
3262 | adapter->stats.rjc += E1000_READ_REG(hw, RJC); | |
3263 | adapter->stats.torl += E1000_READ_REG(hw, TORL); | |
3264 | adapter->stats.torh += E1000_READ_REG(hw, TORH); | |
3265 | adapter->stats.totl += E1000_READ_REG(hw, TOTL); | |
3266 | adapter->stats.toth += E1000_READ_REG(hw, TOTH); | |
3267 | adapter->stats.tpr += E1000_READ_REG(hw, TPR); | |
cd94dd0b AK |
3268 | |
3269 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
1da177e4 LT |
3270 | adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); |
3271 | adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); | |
3272 | adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); | |
3273 | adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); | |
3274 | adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); | |
3275 | adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); | |
cd94dd0b AK |
3276 | } |
3277 | ||
1da177e4 LT |
3278 | adapter->stats.mptc += E1000_READ_REG(hw, MPTC); |
3279 | adapter->stats.bptc += E1000_READ_REG(hw, BPTC); | |
3280 | ||
3281 | /* used for adaptive IFS */ | |
3282 | ||
3283 | hw->tx_packet_delta = E1000_READ_REG(hw, TPT); | |
3284 | adapter->stats.tpt += hw->tx_packet_delta; | |
3285 | hw->collision_delta = E1000_READ_REG(hw, COLC); | |
3286 | adapter->stats.colc += hw->collision_delta; | |
3287 | ||
96838a40 | 3288 | if (hw->mac_type >= e1000_82543) { |
1da177e4 LT |
3289 | adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); |
3290 | adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); | |
3291 | adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); | |
3292 | adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); | |
3293 | adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); | |
3294 | adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); | |
3295 | } | |
96838a40 | 3296 | if (hw->mac_type > e1000_82547_rev_2) { |
2d7edb92 MC |
3297 | adapter->stats.iac += E1000_READ_REG(hw, IAC); |
3298 | adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); | |
cd94dd0b AK |
3299 | |
3300 | if (adapter->hw.mac_type != e1000_ich8lan) { | |
2d7edb92 MC |
3301 | adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); |
3302 | adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); | |
3303 | adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); | |
3304 | adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); | |
3305 | adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); | |
3306 | adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); | |
3307 | adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); | |
cd94dd0b | 3308 | } |
2d7edb92 | 3309 | } |
1da177e4 LT |
3310 | |
3311 | /* Fill out the OS statistics structure */ | |
3312 | ||
3313 | adapter->net_stats.rx_packets = adapter->stats.gprc; | |
3314 | adapter->net_stats.tx_packets = adapter->stats.gptc; | |
3315 | adapter->net_stats.rx_bytes = adapter->stats.gorcl; | |
3316 | adapter->net_stats.tx_bytes = adapter->stats.gotcl; | |
3317 | adapter->net_stats.multicast = adapter->stats.mprc; | |
3318 | adapter->net_stats.collisions = adapter->stats.colc; | |
3319 | ||
3320 | /* Rx Errors */ | |
3321 | ||
87041639 JK |
3322 | /* RLEC on some newer hardware can be incorrect so build |
3323 | * our own version based on RUC and ROC */ | |
1da177e4 LT |
3324 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + |
3325 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
87041639 JK |
3326 | adapter->stats.ruc + adapter->stats.roc + |
3327 | adapter->stats.cexterr; | |
87041639 JK |
3328 | adapter->net_stats.rx_length_errors = adapter->stats.ruc + |
3329 | adapter->stats.roc; | |
1da177e4 LT |
3330 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
3331 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | |
1da177e4 LT |
3332 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; |
3333 | ||
3334 | /* Tx Errors */ | |
3335 | ||
3336 | adapter->net_stats.tx_errors = adapter->stats.ecol + | |
3337 | adapter->stats.latecol; | |
3338 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; | |
3339 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | |
3340 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | |
3341 | ||
3342 | /* Tx Dropped needs to be maintained elsewhere */ | |
3343 | ||
3344 | /* Phy Stats */ | |
3345 | ||
96838a40 JB |
3346 | if (hw->media_type == e1000_media_type_copper) { |
3347 | if ((adapter->link_speed == SPEED_1000) && | |
1da177e4 LT |
3348 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { |
3349 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3350 | adapter->phy_stats.idle_errors += phy_tmp; | |
3351 | } | |
3352 | ||
96838a40 | 3353 | if ((hw->mac_type <= e1000_82546) && |
1da177e4 LT |
3354 | (hw->phy_type == e1000_phy_m88) && |
3355 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3356 | adapter->phy_stats.receive_errors += phy_tmp; | |
3357 | } | |
3358 | ||
3359 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
3360 | } | |
3361 | ||
3362 | /** | |
3363 | * e1000_intr - Interrupt Handler | |
3364 | * @irq: interrupt number | |
3365 | * @data: pointer to a network interface device structure | |
3366 | * @pt_regs: CPU registers structure | |
3367 | **/ | |
3368 | ||
3369 | static irqreturn_t | |
3370 | e1000_intr(int irq, void *data, struct pt_regs *regs) | |
3371 | { | |
3372 | struct net_device *netdev = data; | |
60490fe0 | 3373 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3374 | struct e1000_hw *hw = &adapter->hw; |
87041639 | 3375 | uint32_t rctl, icr = E1000_READ_REG(hw, ICR); |
1e613fd9 | 3376 | #ifndef CONFIG_E1000_NAPI |
581d708e | 3377 | int i; |
1e613fd9 JK |
3378 | #else |
3379 | /* Interrupt Auto-Mask...upon reading ICR, | |
3380 | * interrupts are masked. No need for the | |
3381 | * IMC write, but it does mean we should | |
3382 | * account for it ASAP. */ | |
3383 | if (likely(hw->mac_type >= e1000_82571)) | |
3384 | atomic_inc(&adapter->irq_sem); | |
be2b28ed | 3385 | #endif |
1da177e4 | 3386 | |
1e613fd9 JK |
3387 | if (unlikely(!icr)) { |
3388 | #ifdef CONFIG_E1000_NAPI | |
3389 | if (hw->mac_type >= e1000_82571) | |
3390 | e1000_irq_enable(adapter); | |
3391 | #endif | |
1da177e4 | 3392 | return IRQ_NONE; /* Not our interrupt */ |
1e613fd9 | 3393 | } |
1da177e4 | 3394 | |
96838a40 | 3395 | if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
1da177e4 | 3396 | hw->get_link_status = 1; |
87041639 JK |
3397 | /* 80003ES2LAN workaround-- |
3398 | * For packet buffer work-around on link down event; | |
3399 | * disable receives here in the ISR and | |
3400 | * reset adapter in watchdog | |
3401 | */ | |
3402 | if (netif_carrier_ok(netdev) && | |
3403 | (adapter->hw.mac_type == e1000_80003es2lan)) { | |
3404 | /* disable receives */ | |
3405 | rctl = E1000_READ_REG(hw, RCTL); | |
3406 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
3407 | } | |
1da177e4 LT |
3408 | mod_timer(&adapter->watchdog_timer, jiffies); |
3409 | } | |
3410 | ||
3411 | #ifdef CONFIG_E1000_NAPI | |
1e613fd9 JK |
3412 | if (unlikely(hw->mac_type < e1000_82571)) { |
3413 | atomic_inc(&adapter->irq_sem); | |
3414 | E1000_WRITE_REG(hw, IMC, ~0); | |
3415 | E1000_WRITE_FLUSH(hw); | |
3416 | } | |
d3d9e484 AK |
3417 | if (likely(netif_rx_schedule_prep(netdev))) |
3418 | __netif_rx_schedule(netdev); | |
581d708e MC |
3419 | else |
3420 | e1000_irq_enable(adapter); | |
c1605eb3 | 3421 | #else |
1da177e4 | 3422 | /* Writing IMC and IMS is needed for 82547. |
96838a40 JB |
3423 | * Due to Hub Link bus being occupied, an interrupt |
3424 | * de-assertion message is not able to be sent. | |
3425 | * When an interrupt assertion message is generated later, | |
3426 | * two messages are re-ordered and sent out. | |
3427 | * That causes APIC to think 82547 is in de-assertion | |
3428 | * state, while 82547 is in assertion state, resulting | |
3429 | * in dead lock. Writing IMC forces 82547 into | |
3430 | * de-assertion state. | |
3431 | */ | |
3432 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) { | |
1da177e4 | 3433 | atomic_inc(&adapter->irq_sem); |
2648345f | 3434 | E1000_WRITE_REG(hw, IMC, ~0); |
1da177e4 LT |
3435 | } |
3436 | ||
96838a40 JB |
3437 | for (i = 0; i < E1000_MAX_INTR; i++) |
3438 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | |
581d708e | 3439 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) |
1da177e4 LT |
3440 | break; |
3441 | ||
96838a40 | 3442 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) |
1da177e4 | 3443 | e1000_irq_enable(adapter); |
581d708e | 3444 | |
c1605eb3 | 3445 | #endif |
1da177e4 LT |
3446 | |
3447 | return IRQ_HANDLED; | |
3448 | } | |
3449 | ||
3450 | #ifdef CONFIG_E1000_NAPI | |
3451 | /** | |
3452 | * e1000_clean - NAPI Rx polling callback | |
3453 | * @adapter: board private structure | |
3454 | **/ | |
3455 | ||
3456 | static int | |
581d708e | 3457 | e1000_clean(struct net_device *poll_dev, int *budget) |
1da177e4 | 3458 | { |
581d708e MC |
3459 | struct e1000_adapter *adapter; |
3460 | int work_to_do = min(*budget, poll_dev->quota); | |
d3d9e484 | 3461 | int tx_cleaned = 0, work_done = 0; |
581d708e MC |
3462 | |
3463 | /* Must NOT use netdev_priv macro here. */ | |
3464 | adapter = poll_dev->priv; | |
3465 | ||
3466 | /* Keep link state information with original netdev */ | |
d3d9e484 | 3467 | if (!netif_carrier_ok(poll_dev)) |
581d708e | 3468 | goto quit_polling; |
2648345f | 3469 | |
d3d9e484 AK |
3470 | /* e1000_clean is called per-cpu. This lock protects |
3471 | * tx_ring[0] from being cleaned by multiple cpus | |
3472 | * simultaneously. A failure obtaining the lock means | |
3473 | * tx_ring[0] is currently being cleaned anyway. */ | |
3474 | if (spin_trylock(&adapter->tx_queue_lock)) { | |
3475 | tx_cleaned = e1000_clean_tx_irq(adapter, | |
3476 | &adapter->tx_ring[0]); | |
3477 | spin_unlock(&adapter->tx_queue_lock); | |
581d708e MC |
3478 | } |
3479 | ||
d3d9e484 | 3480 | adapter->clean_rx(adapter, &adapter->rx_ring[0], |
581d708e | 3481 | &work_done, work_to_do); |
1da177e4 LT |
3482 | |
3483 | *budget -= work_done; | |
581d708e | 3484 | poll_dev->quota -= work_done; |
96838a40 | 3485 | |
2b02893e | 3486 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
96838a40 | 3487 | if ((!tx_cleaned && (work_done == 0)) || |
d3d9e484 | 3488 | !netif_running(poll_dev)) { |
581d708e MC |
3489 | quit_polling: |
3490 | netif_rx_complete(poll_dev); | |
1da177e4 LT |
3491 | e1000_irq_enable(adapter); |
3492 | return 0; | |
3493 | } | |
3494 | ||
3495 | return 1; | |
3496 | } | |
3497 | ||
3498 | #endif | |
3499 | /** | |
3500 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3501 | * @adapter: board private structure | |
3502 | **/ | |
3503 | ||
3504 | static boolean_t | |
581d708e MC |
3505 | e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3506 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3507 | { |
1da177e4 LT |
3508 | struct net_device *netdev = adapter->netdev; |
3509 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
3510 | struct e1000_buffer *buffer_info; | |
3511 | unsigned int i, eop; | |
2a1af5d7 JK |
3512 | #ifdef CONFIG_E1000_NAPI |
3513 | unsigned int count = 0; | |
3514 | #endif | |
1da177e4 LT |
3515 | boolean_t cleaned = FALSE; |
3516 | ||
3517 | i = tx_ring->next_to_clean; | |
3518 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3519 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3520 | ||
581d708e | 3521 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { |
96838a40 | 3522 | for (cleaned = FALSE; !cleaned; ) { |
1da177e4 LT |
3523 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
3524 | buffer_info = &tx_ring->buffer_info[i]; | |
3525 | cleaned = (i == eop); | |
3526 | ||
fd803241 | 3527 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); |
8241e35e | 3528 | memset(tx_desc, 0, sizeof(struct e1000_tx_desc)); |
1da177e4 | 3529 | |
96838a40 | 3530 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 | 3531 | } |
581d708e | 3532 | |
7bfa4816 | 3533 | |
1da177e4 LT |
3534 | eop = tx_ring->buffer_info[i].next_to_watch; |
3535 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
2a1af5d7 JK |
3536 | #ifdef CONFIG_E1000_NAPI |
3537 | #define E1000_TX_WEIGHT 64 | |
3538 | /* weight of a sort for tx, to avoid endless transmit cleanup */ | |
3539 | if (count++ == E1000_TX_WEIGHT) break; | |
3540 | #endif | |
1da177e4 LT |
3541 | } |
3542 | ||
3543 | tx_ring->next_to_clean = i; | |
3544 | ||
77b2aad5 | 3545 | #define TX_WAKE_THRESHOLD 32 |
96838a40 | 3546 | if (unlikely(cleaned && netif_queue_stopped(netdev) && |
77b2aad5 AK |
3547 | netif_carrier_ok(netdev))) { |
3548 | spin_lock(&tx_ring->tx_lock); | |
3549 | if (netif_queue_stopped(netdev) && | |
3550 | (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) | |
3551 | netif_wake_queue(netdev); | |
3552 | spin_unlock(&tx_ring->tx_lock); | |
3553 | } | |
2648345f | 3554 | |
581d708e | 3555 | if (adapter->detect_tx_hung) { |
2648345f | 3556 | /* Detect a transmit hang in hardware, this serializes the |
1da177e4 LT |
3557 | * check with the clearing of time_stamp and movement of i */ |
3558 | adapter->detect_tx_hung = FALSE; | |
392137fa JK |
3559 | if (tx_ring->buffer_info[eop].dma && |
3560 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | |
7e6c9861 | 3561 | (adapter->tx_timeout_factor * HZ)) |
70b8f1e1 | 3562 | && !(E1000_READ_REG(&adapter->hw, STATUS) & |
392137fa | 3563 | E1000_STATUS_TXOFF)) { |
70b8f1e1 MC |
3564 | |
3565 | /* detected Tx unit hang */ | |
c6963ef5 | 3566 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" |
7bfa4816 | 3567 | " Tx Queue <%lu>\n" |
70b8f1e1 MC |
3568 | " TDH <%x>\n" |
3569 | " TDT <%x>\n" | |
3570 | " next_to_use <%x>\n" | |
3571 | " next_to_clean <%x>\n" | |
3572 | "buffer_info[next_to_clean]\n" | |
70b8f1e1 MC |
3573 | " time_stamp <%lx>\n" |
3574 | " next_to_watch <%x>\n" | |
3575 | " jiffies <%lx>\n" | |
3576 | " next_to_watch.status <%x>\n", | |
7bfa4816 JK |
3577 | (unsigned long)((tx_ring - adapter->tx_ring) / |
3578 | sizeof(struct e1000_tx_ring)), | |
581d708e MC |
3579 | readl(adapter->hw.hw_addr + tx_ring->tdh), |
3580 | readl(adapter->hw.hw_addr + tx_ring->tdt), | |
70b8f1e1 | 3581 | tx_ring->next_to_use, |
392137fa JK |
3582 | tx_ring->next_to_clean, |
3583 | tx_ring->buffer_info[eop].time_stamp, | |
70b8f1e1 MC |
3584 | eop, |
3585 | jiffies, | |
3586 | eop_desc->upper.fields.status); | |
1da177e4 | 3587 | netif_stop_queue(netdev); |
70b8f1e1 | 3588 | } |
1da177e4 | 3589 | } |
1da177e4 LT |
3590 | return cleaned; |
3591 | } | |
3592 | ||
3593 | /** | |
3594 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
3595 | * @adapter: board private structure |
3596 | * @status_err: receive descriptor status and error fields | |
3597 | * @csum: receive descriptor csum field | |
3598 | * @sk_buff: socket buffer with received data | |
1da177e4 LT |
3599 | **/ |
3600 | ||
e619d523 | 3601 | static void |
1da177e4 | 3602 | e1000_rx_checksum(struct e1000_adapter *adapter, |
2d7edb92 MC |
3603 | uint32_t status_err, uint32_t csum, |
3604 | struct sk_buff *skb) | |
1da177e4 | 3605 | { |
2d7edb92 MC |
3606 | uint16_t status = (uint16_t)status_err; |
3607 | uint8_t errors = (uint8_t)(status_err >> 24); | |
3608 | skb->ip_summed = CHECKSUM_NONE; | |
3609 | ||
1da177e4 | 3610 | /* 82543 or newer only */ |
96838a40 | 3611 | if (unlikely(adapter->hw.mac_type < e1000_82543)) return; |
1da177e4 | 3612 | /* Ignore Checksum bit is set */ |
96838a40 | 3613 | if (unlikely(status & E1000_RXD_STAT_IXSM)) return; |
2d7edb92 | 3614 | /* TCP/UDP checksum error bit is set */ |
96838a40 | 3615 | if (unlikely(errors & E1000_RXD_ERR_TCPE)) { |
1da177e4 | 3616 | /* let the stack verify checksum errors */ |
1da177e4 | 3617 | adapter->hw_csum_err++; |
2d7edb92 MC |
3618 | return; |
3619 | } | |
3620 | /* TCP/UDP Checksum has not been calculated */ | |
96838a40 JB |
3621 | if (adapter->hw.mac_type <= e1000_82547_rev_2) { |
3622 | if (!(status & E1000_RXD_STAT_TCPCS)) | |
2d7edb92 | 3623 | return; |
1da177e4 | 3624 | } else { |
96838a40 | 3625 | if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) |
2d7edb92 MC |
3626 | return; |
3627 | } | |
3628 | /* It must be a TCP or UDP packet with a valid checksum */ | |
3629 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
3630 | /* TCP checksum is good */ |
3631 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
2d7edb92 MC |
3632 | } else if (adapter->hw.mac_type > e1000_82547_rev_2) { |
3633 | /* IP fragment with UDP payload */ | |
3634 | /* Hardware complements the payload checksum, so we undo it | |
3635 | * and then put the value in host order for further stack use. | |
3636 | */ | |
3637 | csum = ntohl(csum ^ 0xFFFF); | |
3638 | skb->csum = csum; | |
3639 | skb->ip_summed = CHECKSUM_HW; | |
1da177e4 | 3640 | } |
2d7edb92 | 3641 | adapter->hw_csum_good++; |
1da177e4 LT |
3642 | } |
3643 | ||
3644 | /** | |
2d7edb92 | 3645 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 LT |
3646 | * @adapter: board private structure |
3647 | **/ | |
3648 | ||
3649 | static boolean_t | |
3650 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3651 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3652 | struct e1000_rx_ring *rx_ring, | |
3653 | int *work_done, int work_to_do) | |
1da177e4 | 3654 | #else |
581d708e MC |
3655 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3656 | struct e1000_rx_ring *rx_ring) | |
1da177e4 LT |
3657 | #endif |
3658 | { | |
1da177e4 LT |
3659 | struct net_device *netdev = adapter->netdev; |
3660 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f JB |
3661 | struct e1000_rx_desc *rx_desc, *next_rxd; |
3662 | struct e1000_buffer *buffer_info, *next_buffer; | |
1da177e4 LT |
3663 | unsigned long flags; |
3664 | uint32_t length; | |
3665 | uint8_t last_byte; | |
3666 | unsigned int i; | |
72d64a43 | 3667 | int cleaned_count = 0; |
a1415ee6 | 3668 | boolean_t cleaned = FALSE; |
1da177e4 LT |
3669 | |
3670 | i = rx_ring->next_to_clean; | |
3671 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
b92ff8ee | 3672 | buffer_info = &rx_ring->buffer_info[i]; |
1da177e4 | 3673 | |
b92ff8ee | 3674 | while (rx_desc->status & E1000_RXD_STAT_DD) { |
24f476ee | 3675 | struct sk_buff *skb; |
a292ca6e | 3676 | u8 status; |
1da177e4 | 3677 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3678 | if (*work_done >= work_to_do) |
1da177e4 LT |
3679 | break; |
3680 | (*work_done)++; | |
3681 | #endif | |
a292ca6e | 3682 | status = rx_desc->status; |
b92ff8ee | 3683 | skb = buffer_info->skb; |
86c3d59f JB |
3684 | buffer_info->skb = NULL; |
3685 | ||
30320be8 JK |
3686 | prefetch(skb->data - NET_IP_ALIGN); |
3687 | ||
86c3d59f JB |
3688 | if (++i == rx_ring->count) i = 0; |
3689 | next_rxd = E1000_RX_DESC(*rx_ring, i); | |
30320be8 JK |
3690 | prefetch(next_rxd); |
3691 | ||
86c3d59f | 3692 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 3693 | |
72d64a43 JK |
3694 | cleaned = TRUE; |
3695 | cleaned_count++; | |
a292ca6e JK |
3696 | pci_unmap_single(pdev, |
3697 | buffer_info->dma, | |
3698 | buffer_info->length, | |
1da177e4 LT |
3699 | PCI_DMA_FROMDEVICE); |
3700 | ||
1da177e4 LT |
3701 | length = le16_to_cpu(rx_desc->length); |
3702 | ||
f235a2ab AK |
3703 | /* adjust length to remove Ethernet CRC */ |
3704 | length -= 4; | |
3705 | ||
a1415ee6 JK |
3706 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) { |
3707 | /* All receives must fit into a single buffer */ | |
3708 | E1000_DBG("%s: Receive packet consumed multiple" | |
3709 | " buffers\n", netdev->name); | |
864c4e45 | 3710 | /* recycle */ |
8fc897b0 | 3711 | buffer_info->skb = skb; |
1da177e4 LT |
3712 | goto next_desc; |
3713 | } | |
3714 | ||
96838a40 | 3715 | if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { |
1da177e4 | 3716 | last_byte = *(skb->data + length - 1); |
b92ff8ee | 3717 | if (TBI_ACCEPT(&adapter->hw, status, |
1da177e4 LT |
3718 | rx_desc->errors, length, last_byte)) { |
3719 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
a292ca6e JK |
3720 | e1000_tbi_adjust_stats(&adapter->hw, |
3721 | &adapter->stats, | |
1da177e4 LT |
3722 | length, skb->data); |
3723 | spin_unlock_irqrestore(&adapter->stats_lock, | |
3724 | flags); | |
3725 | length--; | |
3726 | } else { | |
9e2feace AK |
3727 | /* recycle */ |
3728 | buffer_info->skb = skb; | |
1da177e4 LT |
3729 | goto next_desc; |
3730 | } | |
1cb5821f | 3731 | } |
1da177e4 | 3732 | |
a292ca6e JK |
3733 | /* code added for copybreak, this should improve |
3734 | * performance for small packets with large amounts | |
3735 | * of reassembly being done in the stack */ | |
3736 | #define E1000_CB_LENGTH 256 | |
a1415ee6 | 3737 | if (length < E1000_CB_LENGTH) { |
a292ca6e | 3738 | struct sk_buff *new_skb = |
87f5032e | 3739 | netdev_alloc_skb(netdev, length + NET_IP_ALIGN); |
a292ca6e JK |
3740 | if (new_skb) { |
3741 | skb_reserve(new_skb, NET_IP_ALIGN); | |
3742 | new_skb->dev = netdev; | |
3743 | memcpy(new_skb->data - NET_IP_ALIGN, | |
3744 | skb->data - NET_IP_ALIGN, | |
3745 | length + NET_IP_ALIGN); | |
3746 | /* save the skb in buffer_info as good */ | |
3747 | buffer_info->skb = skb; | |
3748 | skb = new_skb; | |
3749 | skb_put(skb, length); | |
3750 | } | |
a1415ee6 JK |
3751 | } else |
3752 | skb_put(skb, length); | |
a292ca6e JK |
3753 | |
3754 | /* end copybreak code */ | |
1da177e4 LT |
3755 | |
3756 | /* Receive Checksum Offload */ | |
a292ca6e JK |
3757 | e1000_rx_checksum(adapter, |
3758 | (uint32_t)(status) | | |
2d7edb92 | 3759 | ((uint32_t)(rx_desc->errors) << 24), |
c3d7a3a4 | 3760 | le16_to_cpu(rx_desc->csum), skb); |
96838a40 | 3761 | |
1da177e4 LT |
3762 | skb->protocol = eth_type_trans(skb, netdev); |
3763 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3764 | if (unlikely(adapter->vlgrp && |
a292ca6e | 3765 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 | 3766 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
2d7edb92 MC |
3767 | le16_to_cpu(rx_desc->special) & |
3768 | E1000_RXD_SPC_VLAN_MASK); | |
1da177e4 LT |
3769 | } else { |
3770 | netif_receive_skb(skb); | |
3771 | } | |
3772 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3773 | if (unlikely(adapter->vlgrp && |
b92ff8ee | 3774 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 LT |
3775 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
3776 | le16_to_cpu(rx_desc->special) & | |
3777 | E1000_RXD_SPC_VLAN_MASK); | |
3778 | } else { | |
3779 | netif_rx(skb); | |
3780 | } | |
3781 | #endif /* CONFIG_E1000_NAPI */ | |
3782 | netdev->last_rx = jiffies; | |
3783 | ||
3784 | next_desc: | |
3785 | rx_desc->status = 0; | |
1da177e4 | 3786 | |
72d64a43 JK |
3787 | /* return some buffers to hardware, one at a time is too slow */ |
3788 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3789 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3790 | cleaned_count = 0; | |
3791 | } | |
3792 | ||
30320be8 | 3793 | /* use prefetched values */ |
86c3d59f JB |
3794 | rx_desc = next_rxd; |
3795 | buffer_info = next_buffer; | |
1da177e4 | 3796 | } |
1da177e4 | 3797 | rx_ring->next_to_clean = i; |
72d64a43 JK |
3798 | |
3799 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3800 | if (cleaned_count) | |
3801 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
2d7edb92 MC |
3802 | |
3803 | return cleaned; | |
3804 | } | |
3805 | ||
3806 | /** | |
3807 | * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split | |
3808 | * @adapter: board private structure | |
3809 | **/ | |
3810 | ||
3811 | static boolean_t | |
3812 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3813 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3814 | struct e1000_rx_ring *rx_ring, | |
3815 | int *work_done, int work_to_do) | |
2d7edb92 | 3816 | #else |
581d708e MC |
3817 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3818 | struct e1000_rx_ring *rx_ring) | |
2d7edb92 MC |
3819 | #endif |
3820 | { | |
86c3d59f | 3821 | union e1000_rx_desc_packet_split *rx_desc, *next_rxd; |
2d7edb92 MC |
3822 | struct net_device *netdev = adapter->netdev; |
3823 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f | 3824 | struct e1000_buffer *buffer_info, *next_buffer; |
2d7edb92 MC |
3825 | struct e1000_ps_page *ps_page; |
3826 | struct e1000_ps_page_dma *ps_page_dma; | |
24f476ee | 3827 | struct sk_buff *skb; |
2d7edb92 MC |
3828 | unsigned int i, j; |
3829 | uint32_t length, staterr; | |
72d64a43 | 3830 | int cleaned_count = 0; |
2d7edb92 MC |
3831 | boolean_t cleaned = FALSE; |
3832 | ||
3833 | i = rx_ring->next_to_clean; | |
3834 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
683a38f3 | 3835 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
9e2feace | 3836 | buffer_info = &rx_ring->buffer_info[i]; |
2d7edb92 | 3837 | |
96838a40 | 3838 | while (staterr & E1000_RXD_STAT_DD) { |
2d7edb92 MC |
3839 | ps_page = &rx_ring->ps_page[i]; |
3840 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3841 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3842 | if (unlikely(*work_done >= work_to_do)) |
2d7edb92 MC |
3843 | break; |
3844 | (*work_done)++; | |
3845 | #endif | |
86c3d59f JB |
3846 | skb = buffer_info->skb; |
3847 | ||
30320be8 JK |
3848 | /* in the packet split case this is header only */ |
3849 | prefetch(skb->data - NET_IP_ALIGN); | |
3850 | ||
86c3d59f JB |
3851 | if (++i == rx_ring->count) i = 0; |
3852 | next_rxd = E1000_RX_DESC_PS(*rx_ring, i); | |
30320be8 JK |
3853 | prefetch(next_rxd); |
3854 | ||
86c3d59f | 3855 | next_buffer = &rx_ring->buffer_info[i]; |
86c3d59f | 3856 | |
2d7edb92 | 3857 | cleaned = TRUE; |
72d64a43 | 3858 | cleaned_count++; |
2d7edb92 MC |
3859 | pci_unmap_single(pdev, buffer_info->dma, |
3860 | buffer_info->length, | |
3861 | PCI_DMA_FROMDEVICE); | |
3862 | ||
96838a40 | 3863 | if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) { |
2d7edb92 MC |
3864 | E1000_DBG("%s: Packet Split buffers didn't pick up" |
3865 | " the full packet\n", netdev->name); | |
3866 | dev_kfree_skb_irq(skb); | |
3867 | goto next_desc; | |
3868 | } | |
1da177e4 | 3869 | |
96838a40 | 3870 | if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { |
2d7edb92 MC |
3871 | dev_kfree_skb_irq(skb); |
3872 | goto next_desc; | |
3873 | } | |
3874 | ||
3875 | length = le16_to_cpu(rx_desc->wb.middle.length0); | |
3876 | ||
96838a40 | 3877 | if (unlikely(!length)) { |
2d7edb92 MC |
3878 | E1000_DBG("%s: Last part of the packet spanning" |
3879 | " multiple descriptors\n", netdev->name); | |
3880 | dev_kfree_skb_irq(skb); | |
3881 | goto next_desc; | |
3882 | } | |
3883 | ||
3884 | /* Good Receive */ | |
3885 | skb_put(skb, length); | |
3886 | ||
dc7c6add JK |
3887 | { |
3888 | /* this looks ugly, but it seems compiler issues make it | |
3889 | more efficient than reusing j */ | |
3890 | int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); | |
3891 | ||
3892 | /* page alloc/put takes too long and effects small packet | |
3893 | * throughput, so unsplit small packets and save the alloc/put*/ | |
9e2feace | 3894 | if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) { |
dc7c6add | 3895 | u8 *vaddr; |
76c224bc | 3896 | /* there is no documentation about how to call |
dc7c6add JK |
3897 | * kmap_atomic, so we can't hold the mapping |
3898 | * very long */ | |
3899 | pci_dma_sync_single_for_cpu(pdev, | |
3900 | ps_page_dma->ps_page_dma[0], | |
3901 | PAGE_SIZE, | |
3902 | PCI_DMA_FROMDEVICE); | |
3903 | vaddr = kmap_atomic(ps_page->ps_page[0], | |
3904 | KM_SKB_DATA_SOFTIRQ); | |
3905 | memcpy(skb->tail, vaddr, l1); | |
3906 | kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); | |
3907 | pci_dma_sync_single_for_device(pdev, | |
3908 | ps_page_dma->ps_page_dma[0], | |
3909 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
f235a2ab AK |
3910 | /* remove the CRC */ |
3911 | l1 -= 4; | |
dc7c6add | 3912 | skb_put(skb, l1); |
dc7c6add JK |
3913 | goto copydone; |
3914 | } /* if */ | |
3915 | } | |
3916 | ||
96838a40 | 3917 | for (j = 0; j < adapter->rx_ps_pages; j++) { |
30320be8 | 3918 | if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j]))) |
2d7edb92 | 3919 | break; |
2d7edb92 MC |
3920 | pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], |
3921 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
3922 | ps_page_dma->ps_page_dma[j] = 0; | |
329bfd0b JK |
3923 | skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0, |
3924 | length); | |
2d7edb92 | 3925 | ps_page->ps_page[j] = NULL; |
2d7edb92 MC |
3926 | skb->len += length; |
3927 | skb->data_len += length; | |
5d51b80f | 3928 | skb->truesize += length; |
2d7edb92 MC |
3929 | } |
3930 | ||
f235a2ab AK |
3931 | /* strip the ethernet crc, problem is we're using pages now so |
3932 | * this whole operation can get a little cpu intensive */ | |
3933 | pskb_trim(skb, skb->len - 4); | |
3934 | ||
dc7c6add | 3935 | copydone: |
2d7edb92 | 3936 | e1000_rx_checksum(adapter, staterr, |
c3d7a3a4 | 3937 | le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); |
2d7edb92 MC |
3938 | skb->protocol = eth_type_trans(skb, netdev); |
3939 | ||
96838a40 | 3940 | if (likely(rx_desc->wb.upper.header_status & |
c3d7a3a4 | 3941 | cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))) |
e4c811c9 | 3942 | adapter->rx_hdr_split++; |
2d7edb92 | 3943 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3944 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3945 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
683a38f3 MC |
3946 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3947 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3948 | } else { |
3949 | netif_receive_skb(skb); | |
3950 | } | |
3951 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3952 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3953 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
683a38f3 MC |
3954 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3955 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3956 | } else { |
3957 | netif_rx(skb); | |
3958 | } | |
3959 | #endif /* CONFIG_E1000_NAPI */ | |
3960 | netdev->last_rx = jiffies; | |
3961 | ||
3962 | next_desc: | |
c3d7a3a4 | 3963 | rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); |
2d7edb92 | 3964 | buffer_info->skb = NULL; |
2d7edb92 | 3965 | |
72d64a43 JK |
3966 | /* return some buffers to hardware, one at a time is too slow */ |
3967 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3968 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3969 | cleaned_count = 0; | |
3970 | } | |
3971 | ||
30320be8 | 3972 | /* use prefetched values */ |
86c3d59f JB |
3973 | rx_desc = next_rxd; |
3974 | buffer_info = next_buffer; | |
3975 | ||
683a38f3 | 3976 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2d7edb92 MC |
3977 | } |
3978 | rx_ring->next_to_clean = i; | |
72d64a43 JK |
3979 | |
3980 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3981 | if (cleaned_count) | |
3982 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
1da177e4 LT |
3983 | |
3984 | return cleaned; | |
3985 | } | |
3986 | ||
3987 | /** | |
2d7edb92 | 3988 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
3989 | * @adapter: address of board private structure |
3990 | **/ | |
3991 | ||
3992 | static void | |
581d708e | 3993 | e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 | 3994 | struct e1000_rx_ring *rx_ring, |
a292ca6e | 3995 | int cleaned_count) |
1da177e4 | 3996 | { |
1da177e4 LT |
3997 | struct net_device *netdev = adapter->netdev; |
3998 | struct pci_dev *pdev = adapter->pdev; | |
3999 | struct e1000_rx_desc *rx_desc; | |
4000 | struct e1000_buffer *buffer_info; | |
4001 | struct sk_buff *skb; | |
2648345f MC |
4002 | unsigned int i; |
4003 | unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; | |
1da177e4 LT |
4004 | |
4005 | i = rx_ring->next_to_use; | |
4006 | buffer_info = &rx_ring->buffer_info[i]; | |
4007 | ||
a292ca6e JK |
4008 | while (cleaned_count--) { |
4009 | if (!(skb = buffer_info->skb)) | |
87f5032e | 4010 | skb = netdev_alloc_skb(netdev, bufsz); |
a292ca6e JK |
4011 | else { |
4012 | skb_trim(skb, 0); | |
4013 | goto map_skb; | |
4014 | } | |
4015 | ||
96838a40 | 4016 | if (unlikely(!skb)) { |
1da177e4 | 4017 | /* Better luck next round */ |
72d64a43 | 4018 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
4019 | break; |
4020 | } | |
4021 | ||
2648345f | 4022 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
4023 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4024 | struct sk_buff *oldskb = skb; | |
2648345f MC |
4025 | DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " |
4026 | "at %p\n", bufsz, skb->data); | |
4027 | /* Try again, without freeing the previous */ | |
87f5032e | 4028 | skb = netdev_alloc_skb(netdev, bufsz); |
2648345f | 4029 | /* Failed allocation, critical failure */ |
1da177e4 LT |
4030 | if (!skb) { |
4031 | dev_kfree_skb(oldskb); | |
4032 | break; | |
4033 | } | |
2648345f | 4034 | |
1da177e4 LT |
4035 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
4036 | /* give up */ | |
4037 | dev_kfree_skb(skb); | |
4038 | dev_kfree_skb(oldskb); | |
4039 | break; /* while !buffer_info->skb */ | |
4040 | } else { | |
2648345f | 4041 | /* Use new allocation */ |
1da177e4 LT |
4042 | dev_kfree_skb(oldskb); |
4043 | } | |
4044 | } | |
1da177e4 LT |
4045 | /* Make buffer alignment 2 beyond a 16 byte boundary |
4046 | * this will result in a 16 byte aligned IP header after | |
4047 | * the 14 byte MAC header is removed | |
4048 | */ | |
4049 | skb_reserve(skb, NET_IP_ALIGN); | |
4050 | ||
4051 | skb->dev = netdev; | |
4052 | ||
4053 | buffer_info->skb = skb; | |
4054 | buffer_info->length = adapter->rx_buffer_len; | |
a292ca6e | 4055 | map_skb: |
1da177e4 LT |
4056 | buffer_info->dma = pci_map_single(pdev, |
4057 | skb->data, | |
4058 | adapter->rx_buffer_len, | |
4059 | PCI_DMA_FROMDEVICE); | |
4060 | ||
2648345f MC |
4061 | /* Fix for errata 23, can't cross 64kB boundary */ |
4062 | if (!e1000_check_64k_bound(adapter, | |
4063 | (void *)(unsigned long)buffer_info->dma, | |
4064 | adapter->rx_buffer_len)) { | |
4065 | DPRINTK(RX_ERR, ERR, | |
4066 | "dma align check failed: %u bytes at %p\n", | |
4067 | adapter->rx_buffer_len, | |
4068 | (void *)(unsigned long)buffer_info->dma); | |
1da177e4 LT |
4069 | dev_kfree_skb(skb); |
4070 | buffer_info->skb = NULL; | |
4071 | ||
2648345f | 4072 | pci_unmap_single(pdev, buffer_info->dma, |
1da177e4 LT |
4073 | adapter->rx_buffer_len, |
4074 | PCI_DMA_FROMDEVICE); | |
4075 | ||
4076 | break; /* while !buffer_info->skb */ | |
4077 | } | |
1da177e4 LT |
4078 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
4079 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4080 | ||
96838a40 JB |
4081 | if (unlikely(++i == rx_ring->count)) |
4082 | i = 0; | |
1da177e4 LT |
4083 | buffer_info = &rx_ring->buffer_info[i]; |
4084 | } | |
4085 | ||
b92ff8ee JB |
4086 | if (likely(rx_ring->next_to_use != i)) { |
4087 | rx_ring->next_to_use = i; | |
4088 | if (unlikely(i-- == 0)) | |
4089 | i = (rx_ring->count - 1); | |
4090 | ||
4091 | /* Force memory writes to complete before letting h/w | |
4092 | * know there are new descriptors to fetch. (Only | |
4093 | * applicable for weak-ordered memory model archs, | |
4094 | * such as IA-64). */ | |
4095 | wmb(); | |
4096 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); | |
4097 | } | |
1da177e4 LT |
4098 | } |
4099 | ||
2d7edb92 MC |
4100 | /** |
4101 | * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split | |
4102 | * @adapter: address of board private structure | |
4103 | **/ | |
4104 | ||
4105 | static void | |
581d708e | 4106 | e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
4107 | struct e1000_rx_ring *rx_ring, |
4108 | int cleaned_count) | |
2d7edb92 | 4109 | { |
2d7edb92 MC |
4110 | struct net_device *netdev = adapter->netdev; |
4111 | struct pci_dev *pdev = adapter->pdev; | |
4112 | union e1000_rx_desc_packet_split *rx_desc; | |
4113 | struct e1000_buffer *buffer_info; | |
4114 | struct e1000_ps_page *ps_page; | |
4115 | struct e1000_ps_page_dma *ps_page_dma; | |
4116 | struct sk_buff *skb; | |
4117 | unsigned int i, j; | |
4118 | ||
4119 | i = rx_ring->next_to_use; | |
4120 | buffer_info = &rx_ring->buffer_info[i]; | |
4121 | ps_page = &rx_ring->ps_page[i]; | |
4122 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4123 | ||
72d64a43 | 4124 | while (cleaned_count--) { |
2d7edb92 MC |
4125 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
4126 | ||
96838a40 | 4127 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { |
e4c811c9 MC |
4128 | if (j < adapter->rx_ps_pages) { |
4129 | if (likely(!ps_page->ps_page[j])) { | |
4130 | ps_page->ps_page[j] = | |
4131 | alloc_page(GFP_ATOMIC); | |
b92ff8ee JB |
4132 | if (unlikely(!ps_page->ps_page[j])) { |
4133 | adapter->alloc_rx_buff_failed++; | |
e4c811c9 | 4134 | goto no_buffers; |
b92ff8ee | 4135 | } |
e4c811c9 MC |
4136 | ps_page_dma->ps_page_dma[j] = |
4137 | pci_map_page(pdev, | |
4138 | ps_page->ps_page[j], | |
4139 | 0, PAGE_SIZE, | |
4140 | PCI_DMA_FROMDEVICE); | |
4141 | } | |
4142 | /* Refresh the desc even if buffer_addrs didn't | |
96838a40 | 4143 | * change because each write-back erases |
e4c811c9 MC |
4144 | * this info. |
4145 | */ | |
4146 | rx_desc->read.buffer_addr[j+1] = | |
4147 | cpu_to_le64(ps_page_dma->ps_page_dma[j]); | |
4148 | } else | |
4149 | rx_desc->read.buffer_addr[j+1] = ~0; | |
2d7edb92 MC |
4150 | } |
4151 | ||
87f5032e DM |
4152 | skb = netdev_alloc_skb(netdev, |
4153 | adapter->rx_ps_bsize0 + NET_IP_ALIGN); | |
2d7edb92 | 4154 | |
b92ff8ee JB |
4155 | if (unlikely(!skb)) { |
4156 | adapter->alloc_rx_buff_failed++; | |
2d7edb92 | 4157 | break; |
b92ff8ee | 4158 | } |
2d7edb92 MC |
4159 | |
4160 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
4161 | * this will result in a 16 byte aligned IP header after | |
4162 | * the 14 byte MAC header is removed | |
4163 | */ | |
4164 | skb_reserve(skb, NET_IP_ALIGN); | |
4165 | ||
4166 | skb->dev = netdev; | |
4167 | ||
4168 | buffer_info->skb = skb; | |
4169 | buffer_info->length = adapter->rx_ps_bsize0; | |
4170 | buffer_info->dma = pci_map_single(pdev, skb->data, | |
4171 | adapter->rx_ps_bsize0, | |
4172 | PCI_DMA_FROMDEVICE); | |
4173 | ||
4174 | rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); | |
4175 | ||
96838a40 | 4176 | if (unlikely(++i == rx_ring->count)) i = 0; |
2d7edb92 MC |
4177 | buffer_info = &rx_ring->buffer_info[i]; |
4178 | ps_page = &rx_ring->ps_page[i]; | |
4179 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4180 | } | |
4181 | ||
4182 | no_buffers: | |
b92ff8ee JB |
4183 | if (likely(rx_ring->next_to_use != i)) { |
4184 | rx_ring->next_to_use = i; | |
4185 | if (unlikely(i-- == 0)) i = (rx_ring->count - 1); | |
4186 | ||
4187 | /* Force memory writes to complete before letting h/w | |
4188 | * know there are new descriptors to fetch. (Only | |
4189 | * applicable for weak-ordered memory model archs, | |
4190 | * such as IA-64). */ | |
4191 | wmb(); | |
4192 | /* Hardware increments by 16 bytes, but packet split | |
4193 | * descriptors are 32 bytes...so we increment tail | |
4194 | * twice as much. | |
4195 | */ | |
4196 | writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt); | |
4197 | } | |
2d7edb92 MC |
4198 | } |
4199 | ||
1da177e4 LT |
4200 | /** |
4201 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
4202 | * @adapter: | |
4203 | **/ | |
4204 | ||
4205 | static void | |
4206 | e1000_smartspeed(struct e1000_adapter *adapter) | |
4207 | { | |
4208 | uint16_t phy_status; | |
4209 | uint16_t phy_ctrl; | |
4210 | ||
96838a40 | 4211 | if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || |
1da177e4 LT |
4212 | !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) |
4213 | return; | |
4214 | ||
96838a40 | 4215 | if (adapter->smartspeed == 0) { |
1da177e4 LT |
4216 | /* If Master/Slave config fault is asserted twice, |
4217 | * we assume back-to-back */ | |
4218 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); | |
96838a40 | 4219 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4220 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); |
96838a40 | 4221 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4222 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); |
96838a40 | 4223 | if (phy_ctrl & CR_1000T_MS_ENABLE) { |
1da177e4 LT |
4224 | phy_ctrl &= ~CR_1000T_MS_ENABLE; |
4225 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, | |
4226 | phy_ctrl); | |
4227 | adapter->smartspeed++; | |
96838a40 | 4228 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4229 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, |
4230 | &phy_ctrl)) { | |
4231 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4232 | MII_CR_RESTART_AUTO_NEG); | |
4233 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, | |
4234 | phy_ctrl); | |
4235 | } | |
4236 | } | |
4237 | return; | |
96838a40 | 4238 | } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { |
1da177e4 LT |
4239 | /* If still no link, perhaps using 2/3 pair cable */ |
4240 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); | |
4241 | phy_ctrl |= CR_1000T_MS_ENABLE; | |
4242 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); | |
96838a40 | 4243 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4244 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { |
4245 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4246 | MII_CR_RESTART_AUTO_NEG); | |
4247 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); | |
4248 | } | |
4249 | } | |
4250 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
96838a40 | 4251 | if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) |
1da177e4 LT |
4252 | adapter->smartspeed = 0; |
4253 | } | |
4254 | ||
4255 | /** | |
4256 | * e1000_ioctl - | |
4257 | * @netdev: | |
4258 | * @ifreq: | |
4259 | * @cmd: | |
4260 | **/ | |
4261 | ||
4262 | static int | |
4263 | e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4264 | { | |
4265 | switch (cmd) { | |
4266 | case SIOCGMIIPHY: | |
4267 | case SIOCGMIIREG: | |
4268 | case SIOCSMIIREG: | |
4269 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
4270 | default: | |
4271 | return -EOPNOTSUPP; | |
4272 | } | |
4273 | } | |
4274 | ||
4275 | /** | |
4276 | * e1000_mii_ioctl - | |
4277 | * @netdev: | |
4278 | * @ifreq: | |
4279 | * @cmd: | |
4280 | **/ | |
4281 | ||
4282 | static int | |
4283 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4284 | { | |
60490fe0 | 4285 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4286 | struct mii_ioctl_data *data = if_mii(ifr); |
4287 | int retval; | |
4288 | uint16_t mii_reg; | |
4289 | uint16_t spddplx; | |
97876fc6 | 4290 | unsigned long flags; |
1da177e4 | 4291 | |
96838a40 | 4292 | if (adapter->hw.media_type != e1000_media_type_copper) |
1da177e4 LT |
4293 | return -EOPNOTSUPP; |
4294 | ||
4295 | switch (cmd) { | |
4296 | case SIOCGMIIPHY: | |
4297 | data->phy_id = adapter->hw.phy_addr; | |
4298 | break; | |
4299 | case SIOCGMIIREG: | |
96838a40 | 4300 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4301 | return -EPERM; |
97876fc6 | 4302 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4303 | if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, |
97876fc6 MC |
4304 | &data->val_out)) { |
4305 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4306 | return -EIO; |
97876fc6 MC |
4307 | } |
4308 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
4309 | break; |
4310 | case SIOCSMIIREG: | |
96838a40 | 4311 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4312 | return -EPERM; |
96838a40 | 4313 | if (data->reg_num & ~(0x1F)) |
1da177e4 LT |
4314 | return -EFAULT; |
4315 | mii_reg = data->val_in; | |
97876fc6 | 4316 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4317 | if (e1000_write_phy_reg(&adapter->hw, data->reg_num, |
97876fc6 MC |
4318 | mii_reg)) { |
4319 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4320 | return -EIO; |
97876fc6 | 4321 | } |
dc86d32a | 4322 | if (adapter->hw.media_type == e1000_media_type_copper) { |
1da177e4 LT |
4323 | switch (data->reg_num) { |
4324 | case PHY_CTRL: | |
96838a40 | 4325 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4326 | break; |
96838a40 | 4327 | if (mii_reg & MII_CR_AUTO_NEG_EN) { |
1da177e4 LT |
4328 | adapter->hw.autoneg = 1; |
4329 | adapter->hw.autoneg_advertised = 0x2F; | |
4330 | } else { | |
4331 | if (mii_reg & 0x40) | |
4332 | spddplx = SPEED_1000; | |
4333 | else if (mii_reg & 0x2000) | |
4334 | spddplx = SPEED_100; | |
4335 | else | |
4336 | spddplx = SPEED_10; | |
4337 | spddplx += (mii_reg & 0x100) | |
cb764326 JK |
4338 | ? DUPLEX_FULL : |
4339 | DUPLEX_HALF; | |
1da177e4 LT |
4340 | retval = e1000_set_spd_dplx(adapter, |
4341 | spddplx); | |
96838a40 | 4342 | if (retval) { |
97876fc6 | 4343 | spin_unlock_irqrestore( |
96838a40 | 4344 | &adapter->stats_lock, |
97876fc6 | 4345 | flags); |
1da177e4 | 4346 | return retval; |
97876fc6 | 4347 | } |
1da177e4 | 4348 | } |
2db10a08 AK |
4349 | if (netif_running(adapter->netdev)) |
4350 | e1000_reinit_locked(adapter); | |
4351 | else | |
1da177e4 LT |
4352 | e1000_reset(adapter); |
4353 | break; | |
4354 | case M88E1000_PHY_SPEC_CTRL: | |
4355 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
96838a40 | 4356 | if (e1000_phy_reset(&adapter->hw)) { |
97876fc6 MC |
4357 | spin_unlock_irqrestore( |
4358 | &adapter->stats_lock, flags); | |
1da177e4 | 4359 | return -EIO; |
97876fc6 | 4360 | } |
1da177e4 LT |
4361 | break; |
4362 | } | |
4363 | } else { | |
4364 | switch (data->reg_num) { | |
4365 | case PHY_CTRL: | |
96838a40 | 4366 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4367 | break; |
2db10a08 AK |
4368 | if (netif_running(adapter->netdev)) |
4369 | e1000_reinit_locked(adapter); | |
4370 | else | |
1da177e4 LT |
4371 | e1000_reset(adapter); |
4372 | break; | |
4373 | } | |
4374 | } | |
97876fc6 | 4375 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1da177e4 LT |
4376 | break; |
4377 | default: | |
4378 | return -EOPNOTSUPP; | |
4379 | } | |
4380 | return E1000_SUCCESS; | |
4381 | } | |
4382 | ||
4383 | void | |
4384 | e1000_pci_set_mwi(struct e1000_hw *hw) | |
4385 | { | |
4386 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4387 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4388 | |
96838a40 | 4389 | if (ret_val) |
2648345f | 4390 | DPRINTK(PROBE, ERR, "Error in setting MWI\n"); |
1da177e4 LT |
4391 | } |
4392 | ||
4393 | void | |
4394 | e1000_pci_clear_mwi(struct e1000_hw *hw) | |
4395 | { | |
4396 | struct e1000_adapter *adapter = hw->back; | |
4397 | ||
4398 | pci_clear_mwi(adapter->pdev); | |
4399 | } | |
4400 | ||
4401 | void | |
4402 | e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4403 | { | |
4404 | struct e1000_adapter *adapter = hw->back; | |
4405 | ||
4406 | pci_read_config_word(adapter->pdev, reg, value); | |
4407 | } | |
4408 | ||
4409 | void | |
4410 | e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4411 | { | |
4412 | struct e1000_adapter *adapter = hw->back; | |
4413 | ||
4414 | pci_write_config_word(adapter->pdev, reg, *value); | |
4415 | } | |
4416 | ||
e4c780b1 | 4417 | #if 0 |
1da177e4 LT |
4418 | uint32_t |
4419 | e1000_io_read(struct e1000_hw *hw, unsigned long port) | |
4420 | { | |
4421 | return inl(port); | |
4422 | } | |
e4c780b1 | 4423 | #endif /* 0 */ |
1da177e4 LT |
4424 | |
4425 | void | |
4426 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | |
4427 | { | |
4428 | outl(value, port); | |
4429 | } | |
4430 | ||
4431 | static void | |
4432 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
4433 | { | |
60490fe0 | 4434 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4435 | uint32_t ctrl, rctl; |
4436 | ||
4437 | e1000_irq_disable(adapter); | |
4438 | adapter->vlgrp = grp; | |
4439 | ||
96838a40 | 4440 | if (grp) { |
1da177e4 LT |
4441 | /* enable VLAN tag insert/strip */ |
4442 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4443 | ctrl |= E1000_CTRL_VME; | |
4444 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4445 | ||
cd94dd0b | 4446 | if (adapter->hw.mac_type != e1000_ich8lan) { |
1da177e4 LT |
4447 | /* enable VLAN receive filtering */ |
4448 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4449 | rctl |= E1000_RCTL_VFE; | |
4450 | rctl &= ~E1000_RCTL_CFIEN; | |
4451 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2d7edb92 | 4452 | e1000_update_mng_vlan(adapter); |
cd94dd0b | 4453 | } |
1da177e4 LT |
4454 | } else { |
4455 | /* disable VLAN tag insert/strip */ | |
4456 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4457 | ctrl &= ~E1000_CTRL_VME; | |
4458 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4459 | ||
cd94dd0b | 4460 | if (adapter->hw.mac_type != e1000_ich8lan) { |
1da177e4 LT |
4461 | /* disable VLAN filtering */ |
4462 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4463 | rctl &= ~E1000_RCTL_VFE; | |
4464 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
96838a40 | 4465 | if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) { |
2d7edb92 MC |
4466 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
4467 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
4468 | } | |
cd94dd0b | 4469 | } |
1da177e4 LT |
4470 | } |
4471 | ||
4472 | e1000_irq_enable(adapter); | |
4473 | } | |
4474 | ||
4475 | static void | |
4476 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |
4477 | { | |
60490fe0 | 4478 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 4479 | uint32_t vfta, index; |
96838a40 JB |
4480 | |
4481 | if ((adapter->hw.mng_cookie.status & | |
4482 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
4483 | (vid == adapter->mng_vlan_id)) | |
2d7edb92 | 4484 | return; |
1da177e4 LT |
4485 | /* add VID to filter table */ |
4486 | index = (vid >> 5) & 0x7F; | |
4487 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4488 | vfta |= (1 << (vid & 0x1F)); | |
4489 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4490 | } | |
4491 | ||
4492 | static void | |
4493 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | |
4494 | { | |
60490fe0 | 4495 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4496 | uint32_t vfta, index; |
4497 | ||
4498 | e1000_irq_disable(adapter); | |
4499 | ||
96838a40 | 4500 | if (adapter->vlgrp) |
1da177e4 LT |
4501 | adapter->vlgrp->vlan_devices[vid] = NULL; |
4502 | ||
4503 | e1000_irq_enable(adapter); | |
4504 | ||
96838a40 JB |
4505 | if ((adapter->hw.mng_cookie.status & |
4506 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
ff147013 JK |
4507 | (vid == adapter->mng_vlan_id)) { |
4508 | /* release control to f/w */ | |
4509 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4510 | return; |
ff147013 JK |
4511 | } |
4512 | ||
1da177e4 LT |
4513 | /* remove VID from filter table */ |
4514 | index = (vid >> 5) & 0x7F; | |
4515 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4516 | vfta &= ~(1 << (vid & 0x1F)); | |
4517 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4518 | } | |
4519 | ||
4520 | static void | |
4521 | e1000_restore_vlan(struct e1000_adapter *adapter) | |
4522 | { | |
4523 | e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
4524 | ||
96838a40 | 4525 | if (adapter->vlgrp) { |
1da177e4 | 4526 | uint16_t vid; |
96838a40 JB |
4527 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { |
4528 | if (!adapter->vlgrp->vlan_devices[vid]) | |
1da177e4 LT |
4529 | continue; |
4530 | e1000_vlan_rx_add_vid(adapter->netdev, vid); | |
4531 | } | |
4532 | } | |
4533 | } | |
4534 | ||
4535 | int | |
4536 | e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) | |
4537 | { | |
4538 | adapter->hw.autoneg = 0; | |
4539 | ||
6921368f | 4540 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
96838a40 | 4541 | if ((adapter->hw.media_type == e1000_media_type_fiber) && |
6921368f MC |
4542 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { |
4543 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); | |
4544 | return -EINVAL; | |
4545 | } | |
4546 | ||
96838a40 | 4547 | switch (spddplx) { |
1da177e4 LT |
4548 | case SPEED_10 + DUPLEX_HALF: |
4549 | adapter->hw.forced_speed_duplex = e1000_10_half; | |
4550 | break; | |
4551 | case SPEED_10 + DUPLEX_FULL: | |
4552 | adapter->hw.forced_speed_duplex = e1000_10_full; | |
4553 | break; | |
4554 | case SPEED_100 + DUPLEX_HALF: | |
4555 | adapter->hw.forced_speed_duplex = e1000_100_half; | |
4556 | break; | |
4557 | case SPEED_100 + DUPLEX_FULL: | |
4558 | adapter->hw.forced_speed_duplex = e1000_100_full; | |
4559 | break; | |
4560 | case SPEED_1000 + DUPLEX_FULL: | |
4561 | adapter->hw.autoneg = 1; | |
4562 | adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; | |
4563 | break; | |
4564 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
4565 | default: | |
2648345f | 4566 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); |
1da177e4 LT |
4567 | return -EINVAL; |
4568 | } | |
4569 | return 0; | |
4570 | } | |
4571 | ||
b6a1d5f8 | 4572 | #ifdef CONFIG_PM |
0f15a8fa JK |
4573 | /* Save/restore 16 or 64 dwords of PCI config space depending on which |
4574 | * bus we're on (PCI(X) vs. PCI-E) | |
2f82665f JB |
4575 | */ |
4576 | #define PCIE_CONFIG_SPACE_LEN 256 | |
4577 | #define PCI_CONFIG_SPACE_LEN 64 | |
4578 | static int | |
4579 | e1000_pci_save_state(struct e1000_adapter *adapter) | |
4580 | { | |
4581 | struct pci_dev *dev = adapter->pdev; | |
4582 | int size; | |
4583 | int i; | |
0f15a8fa | 4584 | |
2f82665f JB |
4585 | if (adapter->hw.mac_type >= e1000_82571) |
4586 | size = PCIE_CONFIG_SPACE_LEN; | |
4587 | else | |
4588 | size = PCI_CONFIG_SPACE_LEN; | |
4589 | ||
4590 | WARN_ON(adapter->config_space != NULL); | |
4591 | ||
4592 | adapter->config_space = kmalloc(size, GFP_KERNEL); | |
4593 | if (!adapter->config_space) { | |
4594 | DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size); | |
4595 | return -ENOMEM; | |
4596 | } | |
4597 | for (i = 0; i < (size / 4); i++) | |
4598 | pci_read_config_dword(dev, i * 4, &adapter->config_space[i]); | |
4599 | return 0; | |
4600 | } | |
4601 | ||
4602 | static void | |
4603 | e1000_pci_restore_state(struct e1000_adapter *adapter) | |
4604 | { | |
4605 | struct pci_dev *dev = adapter->pdev; | |
4606 | int size; | |
4607 | int i; | |
0f15a8fa | 4608 | |
2f82665f JB |
4609 | if (adapter->config_space == NULL) |
4610 | return; | |
0f15a8fa | 4611 | |
2f82665f JB |
4612 | if (adapter->hw.mac_type >= e1000_82571) |
4613 | size = PCIE_CONFIG_SPACE_LEN; | |
4614 | else | |
4615 | size = PCI_CONFIG_SPACE_LEN; | |
4616 | for (i = 0; i < (size / 4); i++) | |
4617 | pci_write_config_dword(dev, i * 4, adapter->config_space[i]); | |
4618 | kfree(adapter->config_space); | |
4619 | adapter->config_space = NULL; | |
4620 | return; | |
4621 | } | |
4622 | #endif /* CONFIG_PM */ | |
4623 | ||
1da177e4 | 4624 | static int |
829ca9a3 | 4625 | e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
1da177e4 LT |
4626 | { |
4627 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4628 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 4629 | uint32_t ctrl, ctrl_ext, rctl, manc, status; |
1da177e4 | 4630 | uint32_t wufc = adapter->wol; |
6fdfef16 | 4631 | #ifdef CONFIG_PM |
240b1710 | 4632 | int retval = 0; |
6fdfef16 | 4633 | #endif |
1da177e4 LT |
4634 | |
4635 | netif_device_detach(netdev); | |
4636 | ||
2db10a08 AK |
4637 | if (netif_running(netdev)) { |
4638 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); | |
1da177e4 | 4639 | e1000_down(adapter); |
2db10a08 | 4640 | } |
1da177e4 | 4641 | |
2f82665f | 4642 | #ifdef CONFIG_PM |
0f15a8fa JK |
4643 | /* Implement our own version of pci_save_state(pdev) because pci- |
4644 | * express adapters have 256-byte config spaces. */ | |
2f82665f JB |
4645 | retval = e1000_pci_save_state(adapter); |
4646 | if (retval) | |
4647 | return retval; | |
4648 | #endif | |
4649 | ||
1da177e4 | 4650 | status = E1000_READ_REG(&adapter->hw, STATUS); |
96838a40 | 4651 | if (status & E1000_STATUS_LU) |
1da177e4 LT |
4652 | wufc &= ~E1000_WUFC_LNKC; |
4653 | ||
96838a40 | 4654 | if (wufc) { |
1da177e4 LT |
4655 | e1000_setup_rctl(adapter); |
4656 | e1000_set_multi(netdev); | |
4657 | ||
4658 | /* turn on all-multi mode if wake on multicast is enabled */ | |
120cd576 | 4659 | if (wufc & E1000_WUFC_MC) { |
1da177e4 LT |
4660 | rctl = E1000_READ_REG(&adapter->hw, RCTL); |
4661 | rctl |= E1000_RCTL_MPE; | |
4662 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4663 | } | |
4664 | ||
96838a40 | 4665 | if (adapter->hw.mac_type >= e1000_82540) { |
1da177e4 LT |
4666 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); |
4667 | /* advertise wake from D3Cold */ | |
4668 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
4669 | /* phy power management enable */ | |
4670 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
4671 | ctrl |= E1000_CTRL_ADVD3WUC | | |
4672 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
4673 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4674 | } | |
4675 | ||
96838a40 | 4676 | if (adapter->hw.media_type == e1000_media_type_fiber || |
1da177e4 LT |
4677 | adapter->hw.media_type == e1000_media_type_internal_serdes) { |
4678 | /* keep the laser running in D3 */ | |
4679 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
4680 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | |
4681 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); | |
4682 | } | |
4683 | ||
2d7edb92 MC |
4684 | /* Allow time for pending master requests to run */ |
4685 | e1000_disable_pciex_master(&adapter->hw); | |
4686 | ||
1da177e4 LT |
4687 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); |
4688 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); | |
d0e027db AK |
4689 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4690 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4691 | } else { |
4692 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | |
4693 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); | |
d0e027db AK |
4694 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4695 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4696 | } |
4697 | ||
cd94dd0b | 4698 | /* FIXME: this code is incorrect for PCI Express */ |
96838a40 | 4699 | if (adapter->hw.mac_type >= e1000_82540 && |
cd94dd0b | 4700 | adapter->hw.mac_type != e1000_ich8lan && |
1da177e4 LT |
4701 | adapter->hw.media_type == e1000_media_type_copper) { |
4702 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 4703 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
4704 | manc |= E1000_MANC_ARP_EN; |
4705 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
d0e027db AK |
4706 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4707 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4708 | } |
4709 | } | |
4710 | ||
cd94dd0b AK |
4711 | if (adapter->hw.phy_type == e1000_phy_igp_3) |
4712 | e1000_phy_powerdown_workaround(&adapter->hw); | |
4713 | ||
b55ccb35 JK |
4714 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
4715 | * would have already happened in close and is redundant. */ | |
4716 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4717 | |
1da177e4 | 4718 | pci_disable_device(pdev); |
240b1710 | 4719 | |
d0e027db | 4720 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
1da177e4 LT |
4721 | |
4722 | return 0; | |
4723 | } | |
4724 | ||
2f82665f | 4725 | #ifdef CONFIG_PM |
1da177e4 LT |
4726 | static int |
4727 | e1000_resume(struct pci_dev *pdev) | |
4728 | { | |
4729 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4730 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3d1dd8cb | 4731 | uint32_t manc, err; |
1da177e4 | 4732 | |
d0e027db | 4733 | pci_set_power_state(pdev, PCI_D0); |
2f82665f | 4734 | e1000_pci_restore_state(adapter); |
3d1dd8cb AK |
4735 | if ((err = pci_enable_device(pdev))) { |
4736 | printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n"); | |
4737 | return err; | |
4738 | } | |
a4cb847d | 4739 | pci_set_master(pdev); |
1da177e4 | 4740 | |
d0e027db AK |
4741 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4742 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4743 | |
4744 | e1000_reset(adapter); | |
4745 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
4746 | ||
96838a40 | 4747 | if (netif_running(netdev)) |
1da177e4 LT |
4748 | e1000_up(adapter); |
4749 | ||
4750 | netif_device_attach(netdev); | |
4751 | ||
cd94dd0b | 4752 | /* FIXME: this code is incorrect for PCI Express */ |
96838a40 | 4753 | if (adapter->hw.mac_type >= e1000_82540 && |
cd94dd0b | 4754 | adapter->hw.mac_type != e1000_ich8lan && |
1da177e4 LT |
4755 | adapter->hw.media_type == e1000_media_type_copper) { |
4756 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4757 | manc &= ~(E1000_MANC_ARP_EN); | |
4758 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4759 | } | |
4760 | ||
b55ccb35 JK |
4761 | /* If the controller is 82573 and f/w is AMT, do not set |
4762 | * DRV_LOAD until the interface is up. For all other cases, | |
4763 | * let the f/w know that the h/w is now under the control | |
4764 | * of the driver. */ | |
4765 | if (adapter->hw.mac_type != e1000_82573 || | |
4766 | !e1000_check_mng_mode(&adapter->hw)) | |
4767 | e1000_get_hw_control(adapter); | |
2d7edb92 | 4768 | |
1da177e4 LT |
4769 | return 0; |
4770 | } | |
4771 | #endif | |
c653e635 AK |
4772 | |
4773 | static void e1000_shutdown(struct pci_dev *pdev) | |
4774 | { | |
4775 | e1000_suspend(pdev, PMSG_SUSPEND); | |
4776 | } | |
4777 | ||
1da177e4 LT |
4778 | #ifdef CONFIG_NET_POLL_CONTROLLER |
4779 | /* | |
4780 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
4781 | * without having to re-enable interrupts. It's not called while | |
4782 | * the interrupt routine is executing. | |
4783 | */ | |
4784 | static void | |
2648345f | 4785 | e1000_netpoll(struct net_device *netdev) |
1da177e4 | 4786 | { |
60490fe0 | 4787 | struct e1000_adapter *adapter = netdev_priv(netdev); |
d3d9e484 | 4788 | |
1da177e4 LT |
4789 | disable_irq(adapter->pdev->irq); |
4790 | e1000_intr(adapter->pdev->irq, netdev, NULL); | |
c4cfe567 | 4791 | e1000_clean_tx_irq(adapter, adapter->tx_ring); |
e8da8be1 JK |
4792 | #ifndef CONFIG_E1000_NAPI |
4793 | adapter->clean_rx(adapter, adapter->rx_ring); | |
4794 | #endif | |
1da177e4 LT |
4795 | enable_irq(adapter->pdev->irq); |
4796 | } | |
4797 | #endif | |
4798 | ||
9026729b AK |
4799 | /** |
4800 | * e1000_io_error_detected - called when PCI error is detected | |
4801 | * @pdev: Pointer to PCI device | |
4802 | * @state: The current pci conneection state | |
4803 | * | |
4804 | * This function is called after a PCI bus error affecting | |
4805 | * this device has been detected. | |
4806 | */ | |
4807 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
4808 | { | |
4809 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4810 | struct e1000_adapter *adapter = netdev->priv; | |
4811 | ||
4812 | netif_device_detach(netdev); | |
4813 | ||
4814 | if (netif_running(netdev)) | |
4815 | e1000_down(adapter); | |
4816 | ||
4817 | /* Request a slot slot reset. */ | |
4818 | return PCI_ERS_RESULT_NEED_RESET; | |
4819 | } | |
4820 | ||
4821 | /** | |
4822 | * e1000_io_slot_reset - called after the pci bus has been reset. | |
4823 | * @pdev: Pointer to PCI device | |
4824 | * | |
4825 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
4826 | * resembles the first-half of the e1000_resume routine. | |
4827 | */ | |
4828 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |
4829 | { | |
4830 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4831 | struct e1000_adapter *adapter = netdev->priv; | |
4832 | ||
4833 | if (pci_enable_device(pdev)) { | |
4834 | printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n"); | |
4835 | return PCI_ERS_RESULT_DISCONNECT; | |
4836 | } | |
4837 | pci_set_master(pdev); | |
4838 | ||
4839 | pci_enable_wake(pdev, 3, 0); | |
4840 | pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */ | |
4841 | ||
4842 | /* Perform card reset only on one instance of the card */ | |
4843 | if (PCI_FUNC (pdev->devfn) != 0) | |
4844 | return PCI_ERS_RESULT_RECOVERED; | |
4845 | ||
4846 | e1000_reset(adapter); | |
4847 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
4848 | ||
4849 | return PCI_ERS_RESULT_RECOVERED; | |
4850 | } | |
4851 | ||
4852 | /** | |
4853 | * e1000_io_resume - called when traffic can start flowing again. | |
4854 | * @pdev: Pointer to PCI device | |
4855 | * | |
4856 | * This callback is called when the error recovery driver tells us that | |
4857 | * its OK to resume normal operation. Implementation resembles the | |
4858 | * second-half of the e1000_resume routine. | |
4859 | */ | |
4860 | static void e1000_io_resume(struct pci_dev *pdev) | |
4861 | { | |
4862 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4863 | struct e1000_adapter *adapter = netdev->priv; | |
4864 | uint32_t manc, swsm; | |
4865 | ||
4866 | if (netif_running(netdev)) { | |
4867 | if (e1000_up(adapter)) { | |
4868 | printk("e1000: can't bring device back up after reset\n"); | |
4869 | return; | |
4870 | } | |
4871 | } | |
4872 | ||
4873 | netif_device_attach(netdev); | |
4874 | ||
4875 | if (adapter->hw.mac_type >= e1000_82540 && | |
4876 | adapter->hw.media_type == e1000_media_type_copper) { | |
4877 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4878 | manc &= ~(E1000_MANC_ARP_EN); | |
4879 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4880 | } | |
4881 | ||
4882 | switch (adapter->hw.mac_type) { | |
4883 | case e1000_82573: | |
4884 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
4885 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
4886 | swsm | E1000_SWSM_DRV_LOAD); | |
4887 | break; | |
4888 | default: | |
4889 | break; | |
4890 | } | |
4891 | ||
4892 | if (netif_running(netdev)) | |
4893 | mod_timer(&adapter->watchdog_timer, jiffies); | |
4894 | } | |
4895 | ||
1da177e4 | 4896 | /* e1000_main.c */ |