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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
3 | ||
3d41e30a | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
1da177e4 LT |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2 of the License, or (at your option) | |
9 | any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License along with | |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | The full GNU General Public License is included in this distribution in the | |
21 | file called LICENSE. | |
22 | ||
23 | Contact Information: | |
24 | Linux NICS <linux.nics@intel.com> | |
3d41e30a | 25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | ||
28 | *******************************************************************************/ | |
29 | ||
30 | #include "e1000.h" | |
31 | ||
32 | /* Change Log | |
0f15a8fa JK |
33 | * 7.0.33 3-Feb-2006 |
34 | * o Added another fix for the pass false carrier bit | |
35 | * 7.0.32 24-Jan-2006 | |
36 | * o Need to rebuild with noew version number for the pass false carrier | |
37 | * fix in e1000_hw.c | |
38 | * 7.0.30 18-Jan-2006 | |
39 | * o fixup for tso workaround to disable it for pci-x | |
40 | * o fix mem leak on 82542 | |
41 | * o fixes for 10 Mb/s connections and incorrect stats | |
42 | * 7.0.28 01/06/2006 | |
43 | * o hardware workaround to only set "speed mode" bit for 1G link. | |
44 | * 7.0.26 12/23/2005 | |
45 | * o wake on lan support modified for device ID 10B5 | |
46 | * o fix dhcp + vlan issue not making it to the iAMT firmware | |
47 | * 7.0.24 12/9/2005 | |
48 | * o New hardware support for the Gigabit NIC embedded in the south bridge | |
49 | * o Fixes to the recycling logic (skb->tail) from IBM LTC | |
73629bbc JB |
50 | * 6.3.9 12/16/2005 |
51 | * o incorporate fix for recycled skbs from IBM LTC | |
52 | * 6.3.7 11/18/2005 | |
53 | * o Honor eeprom setting for enabling/disabling Wake On Lan | |
54 | * 6.3.5 11/17/2005 | |
55 | * o Fix memory leak in rx ring handling for PCI Express adapters | |
56 | * 6.3.4 11/8/05 | |
57 | * o Patch from Jesper Juhl to remove redundant NULL checks for kfree | |
58 | * 6.3.2 9/20/05 | |
59 | * o Render logic that sets/resets DRV_LOAD as inline functions to | |
60 | * avoid code replication. If f/w is AMT then set DRV_LOAD only when | |
61 | * network interface is open. | |
62 | * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs. | |
63 | * o Adjust PBA partioning for Jumbo frames using MTU size and not | |
64 | * rx_buffer_len | |
65 | * 6.3.1 9/19/05 | |
66 | * o Use adapter->tx_timeout_factor in Tx Hung Detect logic | |
0f15a8fa | 67 | * (e1000_clean_tx_irq) |
73629bbc | 68 | * o Support for 8086:10B5 device (Quad Port) |
1da177e4 LT |
69 | */ |
70 | ||
71 | char e1000_driver_name[] = "e1000"; | |
3ad2cc67 | 72 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
1da177e4 LT |
73 | #ifndef CONFIG_E1000_NAPI |
74 | #define DRIVERNAPI | |
75 | #else | |
76 | #define DRIVERNAPI "-NAPI" | |
77 | #endif | |
3d41e30a | 78 | #define DRV_VERSION "7.0.38-k2"DRIVERNAPI |
1da177e4 | 79 | char e1000_driver_version[] = DRV_VERSION; |
3d41e30a | 80 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
1da177e4 LT |
81 | |
82 | /* e1000_pci_tbl - PCI Device ID Table | |
83 | * | |
84 | * Last entry must be all 0s | |
85 | * | |
86 | * Macro expands to... | |
87 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
88 | */ | |
89 | static struct pci_device_id e1000_pci_tbl[] = { | |
90 | INTEL_E1000_ETHERNET_DEVICE(0x1000), | |
91 | INTEL_E1000_ETHERNET_DEVICE(0x1001), | |
92 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
93 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
94 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
95 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
96 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
97 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
98 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
99 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
100 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
101 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
102 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
103 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
104 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
105 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
106 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
107 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
108 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 109 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
110 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
111 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
112 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
113 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
114 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
07b8fede MC |
115 | INTEL_E1000_ETHERNET_DEVICE(0x105E), |
116 | INTEL_E1000_ETHERNET_DEVICE(0x105F), | |
117 | INTEL_E1000_ETHERNET_DEVICE(0x1060), | |
1da177e4 LT |
118 | INTEL_E1000_ETHERNET_DEVICE(0x1075), |
119 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
120 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
121 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
122 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
123 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
124 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
125 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
07b8fede MC |
126 | INTEL_E1000_ETHERNET_DEVICE(0x107D), |
127 | INTEL_E1000_ETHERNET_DEVICE(0x107E), | |
128 | INTEL_E1000_ETHERNET_DEVICE(0x107F), | |
1da177e4 | 129 | INTEL_E1000_ETHERNET_DEVICE(0x108A), |
2648345f MC |
130 | INTEL_E1000_ETHERNET_DEVICE(0x108B), |
131 | INTEL_E1000_ETHERNET_DEVICE(0x108C), | |
6418ecc6 JK |
132 | INTEL_E1000_ETHERNET_DEVICE(0x1096), |
133 | INTEL_E1000_ETHERNET_DEVICE(0x1098), | |
b7ee49db | 134 | INTEL_E1000_ETHERNET_DEVICE(0x1099), |
07b8fede | 135 | INTEL_E1000_ETHERNET_DEVICE(0x109A), |
b7ee49db | 136 | INTEL_E1000_ETHERNET_DEVICE(0x10B5), |
6418ecc6 | 137 | INTEL_E1000_ETHERNET_DEVICE(0x10B9), |
1da177e4 LT |
138 | /* required last entry */ |
139 | {0,} | |
140 | }; | |
141 | ||
142 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
143 | ||
3ad2cc67 | 144 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 145 | struct e1000_tx_ring *txdr); |
3ad2cc67 | 146 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 147 | struct e1000_rx_ring *rxdr); |
3ad2cc67 | 148 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 149 | struct e1000_tx_ring *tx_ring); |
3ad2cc67 | 150 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
0f15a8fa | 151 | struct e1000_rx_ring *rx_ring); |
1da177e4 LT |
152 | |
153 | /* Local Function Prototypes */ | |
154 | ||
155 | static int e1000_init_module(void); | |
156 | static void e1000_exit_module(void); | |
157 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
158 | static void __devexit e1000_remove(struct pci_dev *pdev); | |
581d708e | 159 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
1da177e4 LT |
160 | static int e1000_sw_init(struct e1000_adapter *adapter); |
161 | static int e1000_open(struct net_device *netdev); | |
162 | static int e1000_close(struct net_device *netdev); | |
163 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
164 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
165 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
166 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
167 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
168 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
169 | struct e1000_tx_ring *tx_ring); | |
170 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, | |
171 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
172 | static void e1000_set_multi(struct net_device *netdev); |
173 | static void e1000_update_phy_info(unsigned long data); | |
174 | static void e1000_watchdog(unsigned long data); | |
175 | static void e1000_watchdog_task(struct e1000_adapter *adapter); | |
176 | static void e1000_82547_tx_fifo_stall(unsigned long data); | |
177 | static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
178 | static struct net_device_stats * e1000_get_stats(struct net_device *netdev); | |
179 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |
180 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
181 | static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs); | |
581d708e MC |
182 | static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, |
183 | struct e1000_tx_ring *tx_ring); | |
1da177e4 | 184 | #ifdef CONFIG_E1000_NAPI |
581d708e | 185 | static int e1000_clean(struct net_device *poll_dev, int *budget); |
1da177e4 | 186 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
581d708e | 187 | struct e1000_rx_ring *rx_ring, |
1da177e4 | 188 | int *work_done, int work_to_do); |
2d7edb92 | 189 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
581d708e | 190 | struct e1000_rx_ring *rx_ring, |
2d7edb92 | 191 | int *work_done, int work_to_do); |
1da177e4 | 192 | #else |
581d708e MC |
193 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
194 | struct e1000_rx_ring *rx_ring); | |
195 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |
196 | struct e1000_rx_ring *rx_ring); | |
1da177e4 | 197 | #endif |
581d708e | 198 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 JK |
199 | struct e1000_rx_ring *rx_ring, |
200 | int cleaned_count); | |
581d708e | 201 | static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
202 | struct e1000_rx_ring *rx_ring, |
203 | int cleaned_count); | |
1da177e4 LT |
204 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
205 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
206 | int cmd); | |
1da177e4 LT |
207 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
208 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
209 | static void e1000_tx_timeout(struct net_device *dev); | |
87041639 | 210 | static void e1000_reset_task(struct net_device *dev); |
1da177e4 | 211 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
e619d523 AK |
212 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
213 | struct sk_buff *skb); | |
1da177e4 LT |
214 | |
215 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | |
216 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | |
217 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | |
218 | static void e1000_restore_vlan(struct e1000_adapter *adapter); | |
219 | ||
1da177e4 | 220 | #ifdef CONFIG_PM |
977e74b5 | 221 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
1da177e4 LT |
222 | static int e1000_resume(struct pci_dev *pdev); |
223 | #endif | |
224 | ||
225 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
226 | /* for netdump / net console */ | |
227 | static void e1000_netpoll (struct net_device *netdev); | |
228 | #endif | |
229 | ||
24025e4e | 230 | |
1da177e4 LT |
231 | static struct pci_driver e1000_driver = { |
232 | .name = e1000_driver_name, | |
233 | .id_table = e1000_pci_tbl, | |
234 | .probe = e1000_probe, | |
235 | .remove = __devexit_p(e1000_remove), | |
236 | /* Power Managment Hooks */ | |
237 | #ifdef CONFIG_PM | |
238 | .suspend = e1000_suspend, | |
239 | .resume = e1000_resume | |
240 | #endif | |
241 | }; | |
242 | ||
243 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
244 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
245 | MODULE_LICENSE("GPL"); | |
246 | MODULE_VERSION(DRV_VERSION); | |
247 | ||
248 | static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
249 | module_param(debug, int, 0); | |
250 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
251 | ||
252 | /** | |
253 | * e1000_init_module - Driver Registration Routine | |
254 | * | |
255 | * e1000_init_module is the first routine called when the driver is | |
256 | * loaded. All it does is register with the PCI subsystem. | |
257 | **/ | |
258 | ||
259 | static int __init | |
260 | e1000_init_module(void) | |
261 | { | |
262 | int ret; | |
263 | printk(KERN_INFO "%s - version %s\n", | |
264 | e1000_driver_string, e1000_driver_version); | |
265 | ||
266 | printk(KERN_INFO "%s\n", e1000_copyright); | |
267 | ||
268 | ret = pci_module_init(&e1000_driver); | |
8b378def | 269 | |
1da177e4 LT |
270 | return ret; |
271 | } | |
272 | ||
273 | module_init(e1000_init_module); | |
274 | ||
275 | /** | |
276 | * e1000_exit_module - Driver Exit Cleanup Routine | |
277 | * | |
278 | * e1000_exit_module is called just before the driver is removed | |
279 | * from memory. | |
280 | **/ | |
281 | ||
282 | static void __exit | |
283 | e1000_exit_module(void) | |
284 | { | |
1da177e4 LT |
285 | pci_unregister_driver(&e1000_driver); |
286 | } | |
287 | ||
288 | module_exit(e1000_exit_module); | |
289 | ||
290 | /** | |
291 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
292 | * @adapter: board private structure | |
293 | **/ | |
294 | ||
e619d523 | 295 | static void |
1da177e4 LT |
296 | e1000_irq_disable(struct e1000_adapter *adapter) |
297 | { | |
298 | atomic_inc(&adapter->irq_sem); | |
299 | E1000_WRITE_REG(&adapter->hw, IMC, ~0); | |
300 | E1000_WRITE_FLUSH(&adapter->hw); | |
301 | synchronize_irq(adapter->pdev->irq); | |
302 | } | |
303 | ||
304 | /** | |
305 | * e1000_irq_enable - Enable default interrupt generation settings | |
306 | * @adapter: board private structure | |
307 | **/ | |
308 | ||
e619d523 | 309 | static void |
1da177e4 LT |
310 | e1000_irq_enable(struct e1000_adapter *adapter) |
311 | { | |
96838a40 | 312 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { |
1da177e4 LT |
313 | E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); |
314 | E1000_WRITE_FLUSH(&adapter->hw); | |
315 | } | |
316 | } | |
3ad2cc67 AB |
317 | |
318 | static void | |
2d7edb92 MC |
319 | e1000_update_mng_vlan(struct e1000_adapter *adapter) |
320 | { | |
321 | struct net_device *netdev = adapter->netdev; | |
322 | uint16_t vid = adapter->hw.mng_cookie.vlan_id; | |
323 | uint16_t old_vid = adapter->mng_vlan_id; | |
96838a40 JB |
324 | if (adapter->vlgrp) { |
325 | if (!adapter->vlgrp->vlan_devices[vid]) { | |
326 | if (adapter->hw.mng_cookie.status & | |
2d7edb92 MC |
327 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { |
328 | e1000_vlan_rx_add_vid(netdev, vid); | |
329 | adapter->mng_vlan_id = vid; | |
330 | } else | |
331 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
96838a40 JB |
332 | |
333 | if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && | |
334 | (vid != old_vid) && | |
2d7edb92 MC |
335 | !adapter->vlgrp->vlan_devices[old_vid]) |
336 | e1000_vlan_rx_kill_vid(netdev, old_vid); | |
c5f226fe JK |
337 | } else |
338 | adapter->mng_vlan_id = vid; | |
2d7edb92 MC |
339 | } |
340 | } | |
b55ccb35 JK |
341 | |
342 | /** | |
343 | * e1000_release_hw_control - release control of the h/w to f/w | |
344 | * @adapter: address of board private structure | |
345 | * | |
346 | * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
347 | * For ASF and Pass Through versions of f/w this means that the | |
348 | * driver is no longer loaded. For AMT version (only with 82573) i | |
349 | * of the f/w this means that the netowrk i/f is closed. | |
350 | * | |
351 | **/ | |
352 | ||
e619d523 | 353 | static void |
b55ccb35 JK |
354 | e1000_release_hw_control(struct e1000_adapter *adapter) |
355 | { | |
356 | uint32_t ctrl_ext; | |
357 | uint32_t swsm; | |
358 | ||
359 | /* Let firmware taken over control of h/w */ | |
360 | switch (adapter->hw.mac_type) { | |
361 | case e1000_82571: | |
362 | case e1000_82572: | |
4cc15f54 | 363 | case e1000_80003es2lan: |
b55ccb35 JK |
364 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
365 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
366 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
367 | break; | |
368 | case e1000_82573: | |
369 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
370 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
371 | swsm & ~E1000_SWSM_DRV_LOAD); | |
372 | default: | |
373 | break; | |
374 | } | |
375 | } | |
376 | ||
377 | /** | |
378 | * e1000_get_hw_control - get control of the h/w from f/w | |
379 | * @adapter: address of board private structure | |
380 | * | |
381 | * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. | |
382 | * For ASF and Pass Through versions of f/w this means that | |
383 | * the driver is loaded. For AMT version (only with 82573) | |
384 | * of the f/w this means that the netowrk i/f is open. | |
385 | * | |
386 | **/ | |
387 | ||
e619d523 | 388 | static void |
b55ccb35 JK |
389 | e1000_get_hw_control(struct e1000_adapter *adapter) |
390 | { | |
391 | uint32_t ctrl_ext; | |
392 | uint32_t swsm; | |
393 | /* Let firmware know the driver has taken over */ | |
394 | switch (adapter->hw.mac_type) { | |
395 | case e1000_82571: | |
396 | case e1000_82572: | |
4cc15f54 | 397 | case e1000_80003es2lan: |
b55ccb35 JK |
398 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
399 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
400 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
401 | break; | |
402 | case e1000_82573: | |
403 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
404 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
405 | swsm | E1000_SWSM_DRV_LOAD); | |
406 | break; | |
407 | default: | |
408 | break; | |
409 | } | |
410 | } | |
411 | ||
1da177e4 LT |
412 | int |
413 | e1000_up(struct e1000_adapter *adapter) | |
414 | { | |
415 | struct net_device *netdev = adapter->netdev; | |
581d708e | 416 | int i, err; |
1da177e4 LT |
417 | |
418 | /* hardware has been reset, we need to reload some things */ | |
419 | ||
420 | /* Reset the PHY if it was previously powered down */ | |
96838a40 | 421 | if (adapter->hw.media_type == e1000_media_type_copper) { |
1da177e4 LT |
422 | uint16_t mii_reg; |
423 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
96838a40 | 424 | if (mii_reg & MII_CR_POWER_DOWN) |
4cc15f54 | 425 | e1000_phy_hw_reset(&adapter->hw); |
1da177e4 LT |
426 | } |
427 | ||
428 | e1000_set_multi(netdev); | |
429 | ||
430 | e1000_restore_vlan(adapter); | |
431 | ||
432 | e1000_configure_tx(adapter); | |
433 | e1000_setup_rctl(adapter); | |
434 | e1000_configure_rx(adapter); | |
72d64a43 JK |
435 | /* call E1000_DESC_UNUSED which always leaves |
436 | * at least 1 descriptor unused to make sure | |
437 | * next_to_use != next_to_clean */ | |
f56799ea | 438 | for (i = 0; i < adapter->num_rx_queues; i++) { |
72d64a43 | 439 | struct e1000_rx_ring *ring = &adapter->rx_ring[i]; |
a292ca6e JK |
440 | adapter->alloc_rx_buf(adapter, ring, |
441 | E1000_DESC_UNUSED(ring)); | |
f56799ea | 442 | } |
1da177e4 | 443 | |
fa4f7ef3 | 444 | #ifdef CONFIG_PCI_MSI |
96838a40 | 445 | if (adapter->hw.mac_type > e1000_82547_rev_2) { |
fa4f7ef3 | 446 | adapter->have_msi = TRUE; |
96838a40 | 447 | if ((err = pci_enable_msi(adapter->pdev))) { |
fa4f7ef3 MC |
448 | DPRINTK(PROBE, ERR, |
449 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
450 | adapter->have_msi = FALSE; | |
451 | } | |
452 | } | |
453 | #endif | |
96838a40 | 454 | if ((err = request_irq(adapter->pdev->irq, &e1000_intr, |
1da177e4 | 455 | SA_SHIRQ | SA_SAMPLE_RANDOM, |
2648345f MC |
456 | netdev->name, netdev))) { |
457 | DPRINTK(PROBE, ERR, | |
458 | "Unable to allocate interrupt Error: %d\n", err); | |
1da177e4 | 459 | return err; |
2648345f | 460 | } |
1da177e4 | 461 | |
7bfa4816 JK |
462 | adapter->tx_queue_len = netdev->tx_queue_len; |
463 | ||
1da177e4 | 464 | mod_timer(&adapter->watchdog_timer, jiffies); |
1da177e4 LT |
465 | |
466 | #ifdef CONFIG_E1000_NAPI | |
467 | netif_poll_enable(netdev); | |
468 | #endif | |
5de55624 MC |
469 | e1000_irq_enable(adapter); |
470 | ||
1da177e4 LT |
471 | return 0; |
472 | } | |
473 | ||
474 | void | |
475 | e1000_down(struct e1000_adapter *adapter) | |
476 | { | |
477 | struct net_device *netdev = adapter->netdev; | |
57128197 JK |
478 | boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) && |
479 | e1000_check_mng_mode(&adapter->hw); | |
1da177e4 LT |
480 | |
481 | e1000_irq_disable(adapter); | |
c1605eb3 | 482 | |
1da177e4 | 483 | free_irq(adapter->pdev->irq, netdev); |
fa4f7ef3 | 484 | #ifdef CONFIG_PCI_MSI |
96838a40 | 485 | if (adapter->hw.mac_type > e1000_82547_rev_2 && |
fa4f7ef3 MC |
486 | adapter->have_msi == TRUE) |
487 | pci_disable_msi(adapter->pdev); | |
488 | #endif | |
1da177e4 LT |
489 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
490 | del_timer_sync(&adapter->watchdog_timer); | |
491 | del_timer_sync(&adapter->phy_info_timer); | |
492 | ||
493 | #ifdef CONFIG_E1000_NAPI | |
494 | netif_poll_disable(netdev); | |
495 | #endif | |
7bfa4816 | 496 | netdev->tx_queue_len = adapter->tx_queue_len; |
1da177e4 LT |
497 | adapter->link_speed = 0; |
498 | adapter->link_duplex = 0; | |
499 | netif_carrier_off(netdev); | |
500 | netif_stop_queue(netdev); | |
501 | ||
502 | e1000_reset(adapter); | |
581d708e MC |
503 | e1000_clean_all_tx_rings(adapter); |
504 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 | 505 | |
57128197 JK |
506 | /* Power down the PHY so no link is implied when interface is down * |
507 | * The PHY cannot be powered down if any of the following is TRUE * | |
508 | * (a) WoL is enabled | |
509 | * (b) AMT is active | |
510 | * (c) SoL/IDER session is active */ | |
511 | if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && | |
2d7edb92 | 512 | adapter->hw.media_type == e1000_media_type_copper && |
57128197 JK |
513 | !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) && |
514 | !mng_mode_enabled && | |
515 | !e1000_check_phy_reset_block(&adapter->hw)) { | |
1da177e4 LT |
516 | uint16_t mii_reg; |
517 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
518 | mii_reg |= MII_CR_POWER_DOWN; | |
519 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
4e48a2b9 | 520 | mdelay(1); |
1da177e4 LT |
521 | } |
522 | } | |
523 | ||
524 | void | |
525 | e1000_reset(struct e1000_adapter *adapter) | |
526 | { | |
2d7edb92 | 527 | uint32_t pba, manc; |
1125ecbc | 528 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
1da177e4 LT |
529 | |
530 | /* Repartition Pba for greater than 9k mtu | |
531 | * To take effect CTRL.RST is required. | |
532 | */ | |
533 | ||
2d7edb92 MC |
534 | switch (adapter->hw.mac_type) { |
535 | case e1000_82547: | |
0e6ef3e0 | 536 | case e1000_82547_rev_2: |
2d7edb92 MC |
537 | pba = E1000_PBA_30K; |
538 | break; | |
868d5309 MC |
539 | case e1000_82571: |
540 | case e1000_82572: | |
6418ecc6 | 541 | case e1000_80003es2lan: |
868d5309 MC |
542 | pba = E1000_PBA_38K; |
543 | break; | |
2d7edb92 MC |
544 | case e1000_82573: |
545 | pba = E1000_PBA_12K; | |
546 | break; | |
547 | default: | |
548 | pba = E1000_PBA_48K; | |
549 | break; | |
550 | } | |
551 | ||
96838a40 | 552 | if ((adapter->hw.mac_type != e1000_82573) && |
f11b7f85 | 553 | (adapter->netdev->mtu > E1000_RXBUFFER_8192)) |
1125ecbc | 554 | pba -= 8; /* allocate more FIFO for Tx */ |
2d7edb92 MC |
555 | |
556 | ||
96838a40 | 557 | if (adapter->hw.mac_type == e1000_82547) { |
1da177e4 LT |
558 | adapter->tx_fifo_head = 0; |
559 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
560 | adapter->tx_fifo_size = | |
561 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
562 | atomic_set(&adapter->tx_fifo_stall, 0); | |
563 | } | |
2d7edb92 | 564 | |
1da177e4 LT |
565 | E1000_WRITE_REG(&adapter->hw, PBA, pba); |
566 | ||
567 | /* flow control settings */ | |
f11b7f85 JK |
568 | /* Set the FC high water mark to 90% of the FIFO size. |
569 | * Required to clear last 3 LSB */ | |
570 | fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8; | |
571 | ||
572 | adapter->hw.fc_high_water = fc_high_water_mark; | |
573 | adapter->hw.fc_low_water = fc_high_water_mark - 8; | |
87041639 JK |
574 | if (adapter->hw.mac_type == e1000_80003es2lan) |
575 | adapter->hw.fc_pause_time = 0xFFFF; | |
576 | else | |
577 | adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; | |
1da177e4 LT |
578 | adapter->hw.fc_send_xon = 1; |
579 | adapter->hw.fc = adapter->hw.original_fc; | |
580 | ||
2d7edb92 | 581 | /* Allow time for pending master requests to run */ |
1da177e4 | 582 | e1000_reset_hw(&adapter->hw); |
96838a40 | 583 | if (adapter->hw.mac_type >= e1000_82544) |
1da177e4 | 584 | E1000_WRITE_REG(&adapter->hw, WUC, 0); |
96838a40 | 585 | if (e1000_init_hw(&adapter->hw)) |
1da177e4 | 586 | DPRINTK(PROBE, ERR, "Hardware Error\n"); |
2d7edb92 | 587 | e1000_update_mng_vlan(adapter); |
1da177e4 LT |
588 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
589 | E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); | |
590 | ||
591 | e1000_reset_adaptive(&adapter->hw); | |
592 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2d7edb92 MC |
593 | if (adapter->en_mng_pt) { |
594 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
595 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); | |
596 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
597 | } | |
1da177e4 LT |
598 | } |
599 | ||
600 | /** | |
601 | * e1000_probe - Device Initialization Routine | |
602 | * @pdev: PCI device information struct | |
603 | * @ent: entry in e1000_pci_tbl | |
604 | * | |
605 | * Returns 0 on success, negative on failure | |
606 | * | |
607 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
608 | * The OS initialization, configuring of the adapter private structure, | |
609 | * and a hardware reset occur. | |
610 | **/ | |
611 | ||
612 | static int __devinit | |
613 | e1000_probe(struct pci_dev *pdev, | |
614 | const struct pci_device_id *ent) | |
615 | { | |
616 | struct net_device *netdev; | |
617 | struct e1000_adapter *adapter; | |
2d7edb92 | 618 | unsigned long mmio_start, mmio_len; |
2d7edb92 | 619 | |
1da177e4 | 620 | static int cards_found = 0; |
84916829 | 621 | static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */ |
2d7edb92 | 622 | int i, err, pci_using_dac; |
1da177e4 LT |
623 | uint16_t eeprom_data; |
624 | uint16_t eeprom_apme_mask = E1000_EEPROM_APME; | |
96838a40 | 625 | if ((err = pci_enable_device(pdev))) |
1da177e4 LT |
626 | return err; |
627 | ||
96838a40 | 628 | if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) { |
1da177e4 LT |
629 | pci_using_dac = 1; |
630 | } else { | |
96838a40 | 631 | if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) { |
1da177e4 LT |
632 | E1000_ERR("No usable DMA configuration, aborting\n"); |
633 | return err; | |
634 | } | |
635 | pci_using_dac = 0; | |
636 | } | |
637 | ||
96838a40 | 638 | if ((err = pci_request_regions(pdev, e1000_driver_name))) |
1da177e4 LT |
639 | return err; |
640 | ||
641 | pci_set_master(pdev); | |
642 | ||
643 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); | |
96838a40 | 644 | if (!netdev) { |
1da177e4 LT |
645 | err = -ENOMEM; |
646 | goto err_alloc_etherdev; | |
647 | } | |
648 | ||
649 | SET_MODULE_OWNER(netdev); | |
650 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
651 | ||
652 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 653 | adapter = netdev_priv(netdev); |
1da177e4 LT |
654 | adapter->netdev = netdev; |
655 | adapter->pdev = pdev; | |
656 | adapter->hw.back = adapter; | |
657 | adapter->msg_enable = (1 << debug) - 1; | |
658 | ||
659 | mmio_start = pci_resource_start(pdev, BAR_0); | |
660 | mmio_len = pci_resource_len(pdev, BAR_0); | |
661 | ||
662 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); | |
96838a40 | 663 | if (!adapter->hw.hw_addr) { |
1da177e4 LT |
664 | err = -EIO; |
665 | goto err_ioremap; | |
666 | } | |
667 | ||
96838a40 JB |
668 | for (i = BAR_1; i <= BAR_5; i++) { |
669 | if (pci_resource_len(pdev, i) == 0) | |
1da177e4 | 670 | continue; |
96838a40 | 671 | if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { |
1da177e4 LT |
672 | adapter->hw.io_base = pci_resource_start(pdev, i); |
673 | break; | |
674 | } | |
675 | } | |
676 | ||
677 | netdev->open = &e1000_open; | |
678 | netdev->stop = &e1000_close; | |
679 | netdev->hard_start_xmit = &e1000_xmit_frame; | |
680 | netdev->get_stats = &e1000_get_stats; | |
681 | netdev->set_multicast_list = &e1000_set_multi; | |
682 | netdev->set_mac_address = &e1000_set_mac; | |
683 | netdev->change_mtu = &e1000_change_mtu; | |
684 | netdev->do_ioctl = &e1000_ioctl; | |
685 | e1000_set_ethtool_ops(netdev); | |
686 | netdev->tx_timeout = &e1000_tx_timeout; | |
687 | netdev->watchdog_timeo = 5 * HZ; | |
688 | #ifdef CONFIG_E1000_NAPI | |
689 | netdev->poll = &e1000_clean; | |
690 | netdev->weight = 64; | |
691 | #endif | |
692 | netdev->vlan_rx_register = e1000_vlan_rx_register; | |
693 | netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; | |
694 | netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; | |
695 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
696 | netdev->poll_controller = e1000_netpoll; | |
697 | #endif | |
698 | strcpy(netdev->name, pci_name(pdev)); | |
699 | ||
700 | netdev->mem_start = mmio_start; | |
701 | netdev->mem_end = mmio_start + mmio_len; | |
702 | netdev->base_addr = adapter->hw.io_base; | |
703 | ||
704 | adapter->bd_number = cards_found; | |
705 | ||
706 | /* setup the private structure */ | |
707 | ||
96838a40 | 708 | if ((err = e1000_sw_init(adapter))) |
1da177e4 LT |
709 | goto err_sw_init; |
710 | ||
96838a40 | 711 | if ((err = e1000_check_phy_reset_block(&adapter->hw))) |
2d7edb92 MC |
712 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); |
713 | ||
84916829 JK |
714 | /* if ksp3, indicate if it's port a being setup */ |
715 | if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 && | |
716 | e1000_ksp3_port_a == 0) | |
717 | adapter->ksp3_port_a = 1; | |
718 | e1000_ksp3_port_a++; | |
719 | /* Reset for multiple KP3 adapters */ | |
720 | if (e1000_ksp3_port_a == 4) | |
721 | e1000_ksp3_port_a = 0; | |
722 | ||
96838a40 | 723 | if (adapter->hw.mac_type >= e1000_82543) { |
1da177e4 LT |
724 | netdev->features = NETIF_F_SG | |
725 | NETIF_F_HW_CSUM | | |
726 | NETIF_F_HW_VLAN_TX | | |
727 | NETIF_F_HW_VLAN_RX | | |
728 | NETIF_F_HW_VLAN_FILTER; | |
729 | } | |
730 | ||
731 | #ifdef NETIF_F_TSO | |
96838a40 | 732 | if ((adapter->hw.mac_type >= e1000_82544) && |
1da177e4 LT |
733 | (adapter->hw.mac_type != e1000_82547)) |
734 | netdev->features |= NETIF_F_TSO; | |
2d7edb92 MC |
735 | |
736 | #ifdef NETIF_F_TSO_IPV6 | |
96838a40 | 737 | if (adapter->hw.mac_type > e1000_82547_rev_2) |
2d7edb92 MC |
738 | netdev->features |= NETIF_F_TSO_IPV6; |
739 | #endif | |
1da177e4 | 740 | #endif |
96838a40 | 741 | if (pci_using_dac) |
1da177e4 LT |
742 | netdev->features |= NETIF_F_HIGHDMA; |
743 | ||
744 | /* hard_start_xmit is safe against parallel locking */ | |
745 | netdev->features |= NETIF_F_LLTX; | |
746 | ||
2d7edb92 MC |
747 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); |
748 | ||
96838a40 | 749 | /* before reading the EEPROM, reset the controller to |
1da177e4 | 750 | * put the device in a known good starting state */ |
96838a40 | 751 | |
1da177e4 LT |
752 | e1000_reset_hw(&adapter->hw); |
753 | ||
754 | /* make sure the EEPROM is good */ | |
755 | ||
96838a40 | 756 | if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) { |
1da177e4 LT |
757 | DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); |
758 | err = -EIO; | |
759 | goto err_eeprom; | |
760 | } | |
761 | ||
762 | /* copy the MAC address out of the EEPROM */ | |
763 | ||
96838a40 | 764 | if (e1000_read_mac_addr(&adapter->hw)) |
1da177e4 LT |
765 | DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); |
766 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
9beb0ac1 | 767 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); |
1da177e4 | 768 | |
96838a40 | 769 | if (!is_valid_ether_addr(netdev->perm_addr)) { |
1da177e4 LT |
770 | DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); |
771 | err = -EIO; | |
772 | goto err_eeprom; | |
773 | } | |
774 | ||
775 | e1000_read_part_num(&adapter->hw, &(adapter->part_num)); | |
776 | ||
777 | e1000_get_bus_info(&adapter->hw); | |
778 | ||
779 | init_timer(&adapter->tx_fifo_stall_timer); | |
780 | adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; | |
781 | adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; | |
782 | ||
783 | init_timer(&adapter->watchdog_timer); | |
784 | adapter->watchdog_timer.function = &e1000_watchdog; | |
785 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
786 | ||
787 | INIT_WORK(&adapter->watchdog_task, | |
788 | (void (*)(void *))e1000_watchdog_task, adapter); | |
789 | ||
790 | init_timer(&adapter->phy_info_timer); | |
791 | adapter->phy_info_timer.function = &e1000_update_phy_info; | |
792 | adapter->phy_info_timer.data = (unsigned long) adapter; | |
793 | ||
87041639 JK |
794 | INIT_WORK(&adapter->reset_task, |
795 | (void (*)(void *))e1000_reset_task, netdev); | |
1da177e4 LT |
796 | |
797 | /* we're going to reset, so assume we have no link for now */ | |
798 | ||
799 | netif_carrier_off(netdev); | |
800 | netif_stop_queue(netdev); | |
801 | ||
802 | e1000_check_options(adapter); | |
803 | ||
804 | /* Initial Wake on LAN setting | |
805 | * If APM wake is enabled in the EEPROM, | |
806 | * enable the ACPI Magic Packet filter | |
807 | */ | |
808 | ||
96838a40 | 809 | switch (adapter->hw.mac_type) { |
1da177e4 LT |
810 | case e1000_82542_rev2_0: |
811 | case e1000_82542_rev2_1: | |
812 | case e1000_82543: | |
813 | break; | |
814 | case e1000_82544: | |
815 | e1000_read_eeprom(&adapter->hw, | |
816 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); | |
817 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
818 | break; | |
819 | case e1000_82546: | |
820 | case e1000_82546_rev_3: | |
fd803241 | 821 | case e1000_82571: |
6418ecc6 | 822 | case e1000_80003es2lan: |
96838a40 | 823 | if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){ |
1da177e4 LT |
824 | e1000_read_eeprom(&adapter->hw, |
825 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); | |
826 | break; | |
827 | } | |
828 | /* Fall Through */ | |
829 | default: | |
830 | e1000_read_eeprom(&adapter->hw, | |
831 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); | |
832 | break; | |
833 | } | |
96838a40 | 834 | if (eeprom_data & eeprom_apme_mask) |
1da177e4 LT |
835 | adapter->wol |= E1000_WUFC_MAG; |
836 | ||
fb3d47d4 JK |
837 | /* print bus type/speed/width info */ |
838 | { | |
839 | struct e1000_hw *hw = &adapter->hw; | |
840 | DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ", | |
841 | ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : | |
842 | (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")), | |
843 | ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" : | |
844 | (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" : | |
845 | (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" : | |
846 | (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" : | |
847 | (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"), | |
848 | ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : | |
849 | (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" : | |
850 | (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" : | |
851 | "32-bit")); | |
852 | } | |
853 | ||
854 | for (i = 0; i < 6; i++) | |
855 | printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':'); | |
856 | ||
1da177e4 LT |
857 | /* reset the hardware with the new settings */ |
858 | e1000_reset(adapter); | |
859 | ||
b55ccb35 JK |
860 | /* If the controller is 82573 and f/w is AMT, do not set |
861 | * DRV_LOAD until the interface is up. For all other cases, | |
862 | * let the f/w know that the h/w is now under the control | |
863 | * of the driver. */ | |
864 | if (adapter->hw.mac_type != e1000_82573 || | |
865 | !e1000_check_mng_mode(&adapter->hw)) | |
866 | e1000_get_hw_control(adapter); | |
2d7edb92 | 867 | |
1da177e4 | 868 | strcpy(netdev->name, "eth%d"); |
96838a40 | 869 | if ((err = register_netdev(netdev))) |
1da177e4 LT |
870 | goto err_register; |
871 | ||
872 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); | |
873 | ||
874 | cards_found++; | |
875 | return 0; | |
876 | ||
877 | err_register: | |
878 | err_sw_init: | |
879 | err_eeprom: | |
880 | iounmap(adapter->hw.hw_addr); | |
881 | err_ioremap: | |
882 | free_netdev(netdev); | |
883 | err_alloc_etherdev: | |
884 | pci_release_regions(pdev); | |
885 | return err; | |
886 | } | |
887 | ||
888 | /** | |
889 | * e1000_remove - Device Removal Routine | |
890 | * @pdev: PCI device information struct | |
891 | * | |
892 | * e1000_remove is called by the PCI subsystem to alert the driver | |
893 | * that it should release a PCI device. The could be caused by a | |
894 | * Hot-Plug event, or because the driver is going to be removed from | |
895 | * memory. | |
896 | **/ | |
897 | ||
898 | static void __devexit | |
899 | e1000_remove(struct pci_dev *pdev) | |
900 | { | |
901 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 902 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 903 | uint32_t manc; |
581d708e MC |
904 | #ifdef CONFIG_E1000_NAPI |
905 | int i; | |
906 | #endif | |
1da177e4 | 907 | |
be2b28ed JG |
908 | flush_scheduled_work(); |
909 | ||
96838a40 | 910 | if (adapter->hw.mac_type >= e1000_82540 && |
1da177e4 LT |
911 | adapter->hw.media_type == e1000_media_type_copper) { |
912 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 913 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
914 | manc |= E1000_MANC_ARP_EN; |
915 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
916 | } | |
917 | } | |
918 | ||
b55ccb35 JK |
919 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
920 | * would have already happened in close and is redundant. */ | |
921 | e1000_release_hw_control(adapter); | |
2d7edb92 | 922 | |
1da177e4 | 923 | unregister_netdev(netdev); |
581d708e | 924 | #ifdef CONFIG_E1000_NAPI |
f56799ea | 925 | for (i = 0; i < adapter->num_rx_queues; i++) |
15333061 | 926 | dev_put(&adapter->polling_netdev[i]); |
581d708e | 927 | #endif |
1da177e4 | 928 | |
96838a40 | 929 | if (!e1000_check_phy_reset_block(&adapter->hw)) |
2d7edb92 | 930 | e1000_phy_hw_reset(&adapter->hw); |
1da177e4 | 931 | |
24025e4e MC |
932 | kfree(adapter->tx_ring); |
933 | kfree(adapter->rx_ring); | |
934 | #ifdef CONFIG_E1000_NAPI | |
935 | kfree(adapter->polling_netdev); | |
936 | #endif | |
937 | ||
1da177e4 LT |
938 | iounmap(adapter->hw.hw_addr); |
939 | pci_release_regions(pdev); | |
940 | ||
941 | free_netdev(netdev); | |
942 | ||
943 | pci_disable_device(pdev); | |
944 | } | |
945 | ||
946 | /** | |
947 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
948 | * @adapter: board private structure to initialize | |
949 | * | |
950 | * e1000_sw_init initializes the Adapter private data structure. | |
951 | * Fields are initialized based on PCI device information and | |
952 | * OS network device settings (MTU size). | |
953 | **/ | |
954 | ||
955 | static int __devinit | |
956 | e1000_sw_init(struct e1000_adapter *adapter) | |
957 | { | |
958 | struct e1000_hw *hw = &adapter->hw; | |
959 | struct net_device *netdev = adapter->netdev; | |
960 | struct pci_dev *pdev = adapter->pdev; | |
581d708e MC |
961 | #ifdef CONFIG_E1000_NAPI |
962 | int i; | |
963 | #endif | |
1da177e4 LT |
964 | |
965 | /* PCI config space info */ | |
966 | ||
967 | hw->vendor_id = pdev->vendor; | |
968 | hw->device_id = pdev->device; | |
969 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
970 | hw->subsystem_id = pdev->subsystem_device; | |
971 | ||
972 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
973 | ||
974 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
975 | ||
9e2feace AK |
976 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE; |
977 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_128; | |
1da177e4 LT |
978 | hw->max_frame_size = netdev->mtu + |
979 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
980 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
981 | ||
982 | /* identify the MAC */ | |
983 | ||
96838a40 | 984 | if (e1000_set_mac_type(hw)) { |
1da177e4 LT |
985 | DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); |
986 | return -EIO; | |
987 | } | |
988 | ||
989 | /* initialize eeprom parameters */ | |
990 | ||
96838a40 | 991 | if (e1000_init_eeprom_params(hw)) { |
2d7edb92 MC |
992 | E1000_ERR("EEPROM initialization failed\n"); |
993 | return -EIO; | |
994 | } | |
1da177e4 | 995 | |
96838a40 | 996 | switch (hw->mac_type) { |
1da177e4 LT |
997 | default: |
998 | break; | |
999 | case e1000_82541: | |
1000 | case e1000_82547: | |
1001 | case e1000_82541_rev_2: | |
1002 | case e1000_82547_rev_2: | |
1003 | hw->phy_init_script = 1; | |
1004 | break; | |
1005 | } | |
1006 | ||
1007 | e1000_set_media_type(hw); | |
1008 | ||
1009 | hw->wait_autoneg_complete = FALSE; | |
1010 | hw->tbi_compatibility_en = TRUE; | |
1011 | hw->adaptive_ifs = TRUE; | |
1012 | ||
1013 | /* Copper options */ | |
1014 | ||
96838a40 | 1015 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
1016 | hw->mdix = AUTO_ALL_MODES; |
1017 | hw->disable_polarity_correction = FALSE; | |
1018 | hw->master_slave = E1000_MASTER_SLAVE; | |
1019 | } | |
1020 | ||
f56799ea JK |
1021 | adapter->num_tx_queues = 1; |
1022 | adapter->num_rx_queues = 1; | |
581d708e MC |
1023 | |
1024 | if (e1000_alloc_queues(adapter)) { | |
1025 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | |
1026 | return -ENOMEM; | |
1027 | } | |
1028 | ||
1029 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1030 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1031 | adapter->polling_netdev[i].priv = adapter; |
1032 | adapter->polling_netdev[i].poll = &e1000_clean; | |
1033 | adapter->polling_netdev[i].weight = 64; | |
1034 | dev_hold(&adapter->polling_netdev[i]); | |
1035 | set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state); | |
1036 | } | |
7bfa4816 | 1037 | spin_lock_init(&adapter->tx_queue_lock); |
24025e4e MC |
1038 | #endif |
1039 | ||
1da177e4 LT |
1040 | atomic_set(&adapter->irq_sem, 1); |
1041 | spin_lock_init(&adapter->stats_lock); | |
1da177e4 LT |
1042 | |
1043 | return 0; | |
1044 | } | |
1045 | ||
581d708e MC |
1046 | /** |
1047 | * e1000_alloc_queues - Allocate memory for all rings | |
1048 | * @adapter: board private structure to initialize | |
1049 | * | |
1050 | * We allocate one ring per queue at run-time since we don't know the | |
1051 | * number of queues at compile-time. The polling_netdev array is | |
1052 | * intended for Multiqueue, but should work fine with a single queue. | |
1053 | **/ | |
1054 | ||
1055 | static int __devinit | |
1056 | e1000_alloc_queues(struct e1000_adapter *adapter) | |
1057 | { | |
1058 | int size; | |
1059 | ||
f56799ea | 1060 | size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues; |
581d708e MC |
1061 | adapter->tx_ring = kmalloc(size, GFP_KERNEL); |
1062 | if (!adapter->tx_ring) | |
1063 | return -ENOMEM; | |
1064 | memset(adapter->tx_ring, 0, size); | |
1065 | ||
f56799ea | 1066 | size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues; |
581d708e MC |
1067 | adapter->rx_ring = kmalloc(size, GFP_KERNEL); |
1068 | if (!adapter->rx_ring) { | |
1069 | kfree(adapter->tx_ring); | |
1070 | return -ENOMEM; | |
1071 | } | |
1072 | memset(adapter->rx_ring, 0, size); | |
1073 | ||
1074 | #ifdef CONFIG_E1000_NAPI | |
f56799ea | 1075 | size = sizeof(struct net_device) * adapter->num_rx_queues; |
581d708e MC |
1076 | adapter->polling_netdev = kmalloc(size, GFP_KERNEL); |
1077 | if (!adapter->polling_netdev) { | |
1078 | kfree(adapter->tx_ring); | |
1079 | kfree(adapter->rx_ring); | |
1080 | return -ENOMEM; | |
1081 | } | |
1082 | memset(adapter->polling_netdev, 0, size); | |
1083 | #endif | |
1084 | ||
1085 | return E1000_SUCCESS; | |
1086 | } | |
1087 | ||
1da177e4 LT |
1088 | /** |
1089 | * e1000_open - Called when a network interface is made active | |
1090 | * @netdev: network interface device structure | |
1091 | * | |
1092 | * Returns 0 on success, negative value on failure | |
1093 | * | |
1094 | * The open entry point is called when a network interface is made | |
1095 | * active by the system (IFF_UP). At this point all resources needed | |
1096 | * for transmit and receive operations are allocated, the interrupt | |
1097 | * handler is registered with the OS, the watchdog timer is started, | |
1098 | * and the stack is notified that the interface is ready. | |
1099 | **/ | |
1100 | ||
1101 | static int | |
1102 | e1000_open(struct net_device *netdev) | |
1103 | { | |
60490fe0 | 1104 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1105 | int err; |
1106 | ||
1107 | /* allocate transmit descriptors */ | |
1108 | ||
581d708e | 1109 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
1110 | goto err_setup_tx; |
1111 | ||
1112 | /* allocate receive descriptors */ | |
1113 | ||
581d708e | 1114 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 LT |
1115 | goto err_setup_rx; |
1116 | ||
96838a40 | 1117 | if ((err = e1000_up(adapter))) |
1da177e4 | 1118 | goto err_up; |
2d7edb92 | 1119 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
96838a40 | 1120 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1121 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1122 | e1000_update_mng_vlan(adapter); | |
1123 | } | |
1da177e4 | 1124 | |
b55ccb35 JK |
1125 | /* If AMT is enabled, let the firmware know that the network |
1126 | * interface is now open */ | |
1127 | if (adapter->hw.mac_type == e1000_82573 && | |
1128 | e1000_check_mng_mode(&adapter->hw)) | |
1129 | e1000_get_hw_control(adapter); | |
1130 | ||
1da177e4 LT |
1131 | return E1000_SUCCESS; |
1132 | ||
1133 | err_up: | |
581d708e | 1134 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1135 | err_setup_rx: |
581d708e | 1136 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1137 | err_setup_tx: |
1138 | e1000_reset(adapter); | |
1139 | ||
1140 | return err; | |
1141 | } | |
1142 | ||
1143 | /** | |
1144 | * e1000_close - Disables a network interface | |
1145 | * @netdev: network interface device structure | |
1146 | * | |
1147 | * Returns 0, this is not allowed to fail | |
1148 | * | |
1149 | * The close entry point is called when an interface is de-activated | |
1150 | * by the OS. The hardware is still under the drivers control, but | |
1151 | * needs to be disabled. A global MAC reset is issued to stop the | |
1152 | * hardware, and all transmit and receive resources are freed. | |
1153 | **/ | |
1154 | ||
1155 | static int | |
1156 | e1000_close(struct net_device *netdev) | |
1157 | { | |
60490fe0 | 1158 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1159 | |
1160 | e1000_down(adapter); | |
1161 | ||
581d708e MC |
1162 | e1000_free_all_tx_resources(adapter); |
1163 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1164 | |
96838a40 | 1165 | if ((adapter->hw.mng_cookie.status & |
2d7edb92 MC |
1166 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { |
1167 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
1168 | } | |
b55ccb35 JK |
1169 | |
1170 | /* If AMT is enabled, let the firmware know that the network | |
1171 | * interface is now closed */ | |
1172 | if (adapter->hw.mac_type == e1000_82573 && | |
1173 | e1000_check_mng_mode(&adapter->hw)) | |
1174 | e1000_release_hw_control(adapter); | |
1175 | ||
1da177e4 LT |
1176 | return 0; |
1177 | } | |
1178 | ||
1179 | /** | |
1180 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1181 | * @adapter: address of board private structure | |
2d7edb92 MC |
1182 | * @start: address of beginning of memory |
1183 | * @len: length of memory | |
1da177e4 | 1184 | **/ |
e619d523 | 1185 | static boolean_t |
1da177e4 LT |
1186 | e1000_check_64k_bound(struct e1000_adapter *adapter, |
1187 | void *start, unsigned long len) | |
1188 | { | |
1189 | unsigned long begin = (unsigned long) start; | |
1190 | unsigned long end = begin + len; | |
1191 | ||
2648345f MC |
1192 | /* First rev 82545 and 82546 need to not allow any memory |
1193 | * write location to cross 64k boundary due to errata 23 */ | |
1da177e4 | 1194 | if (adapter->hw.mac_type == e1000_82545 || |
2648345f | 1195 | adapter->hw.mac_type == e1000_82546) { |
1da177e4 LT |
1196 | return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; |
1197 | } | |
1198 | ||
1199 | return TRUE; | |
1200 | } | |
1201 | ||
1202 | /** | |
1203 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1204 | * @adapter: board private structure | |
581d708e | 1205 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1206 | * |
1207 | * Return 0 on success, negative on failure | |
1208 | **/ | |
1209 | ||
3ad2cc67 | 1210 | static int |
581d708e MC |
1211 | e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1212 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1213 | { |
1da177e4 LT |
1214 | struct pci_dev *pdev = adapter->pdev; |
1215 | int size; | |
1216 | ||
1217 | size = sizeof(struct e1000_buffer) * txdr->count; | |
a7ec15da RT |
1218 | |
1219 | txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus)); | |
96838a40 | 1220 | if (!txdr->buffer_info) { |
2648345f MC |
1221 | DPRINTK(PROBE, ERR, |
1222 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1223 | return -ENOMEM; |
1224 | } | |
1225 | memset(txdr->buffer_info, 0, size); | |
1226 | ||
1227 | /* round up to nearest 4K */ | |
1228 | ||
1229 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1230 | E1000_ROUNDUP(txdr->size, 4096); | |
1231 | ||
1232 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
96838a40 | 1233 | if (!txdr->desc) { |
1da177e4 | 1234 | setup_tx_desc_die: |
1da177e4 | 1235 | vfree(txdr->buffer_info); |
2648345f MC |
1236 | DPRINTK(PROBE, ERR, |
1237 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1238 | return -ENOMEM; |
1239 | } | |
1240 | ||
2648345f | 1241 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1242 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1243 | void *olddesc = txdr->desc; | |
1244 | dma_addr_t olddma = txdr->dma; | |
2648345f MC |
1245 | DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " |
1246 | "at %p\n", txdr->size, txdr->desc); | |
1247 | /* Try again, without freeing the previous */ | |
1da177e4 | 1248 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); |
2648345f | 1249 | /* Failed allocation, critical failure */ |
96838a40 | 1250 | if (!txdr->desc) { |
1da177e4 LT |
1251 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1252 | goto setup_tx_desc_die; | |
1253 | } | |
1254 | ||
1255 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1256 | /* give up */ | |
2648345f MC |
1257 | pci_free_consistent(pdev, txdr->size, txdr->desc, |
1258 | txdr->dma); | |
1da177e4 LT |
1259 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1260 | DPRINTK(PROBE, ERR, | |
2648345f MC |
1261 | "Unable to allocate aligned memory " |
1262 | "for the transmit descriptor ring\n"); | |
1da177e4 LT |
1263 | vfree(txdr->buffer_info); |
1264 | return -ENOMEM; | |
1265 | } else { | |
2648345f | 1266 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1267 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1268 | } | |
1269 | } | |
1270 | memset(txdr->desc, 0, txdr->size); | |
1271 | ||
1272 | txdr->next_to_use = 0; | |
1273 | txdr->next_to_clean = 0; | |
2ae76d98 | 1274 | spin_lock_init(&txdr->tx_lock); |
1da177e4 LT |
1275 | |
1276 | return 0; | |
1277 | } | |
1278 | ||
581d708e MC |
1279 | /** |
1280 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1281 | * (Descriptors) for all queues | |
1282 | * @adapter: board private structure | |
1283 | * | |
1284 | * If this function returns with an error, then it's possible one or | |
1285 | * more of the rings is populated (while the rest are not). It is the | |
1286 | * callers duty to clean those orphaned rings. | |
1287 | * | |
1288 | * Return 0 on success, negative on failure | |
1289 | **/ | |
1290 | ||
1291 | int | |
1292 | e1000_setup_all_tx_resources(struct e1000_adapter *adapter) | |
1293 | { | |
1294 | int i, err = 0; | |
1295 | ||
f56799ea | 1296 | for (i = 0; i < adapter->num_tx_queues; i++) { |
581d708e MC |
1297 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
1298 | if (err) { | |
1299 | DPRINTK(PROBE, ERR, | |
1300 | "Allocation for Tx Queue %u failed\n", i); | |
1301 | break; | |
1302 | } | |
1303 | } | |
1304 | ||
1305 | return err; | |
1306 | } | |
1307 | ||
1da177e4 LT |
1308 | /** |
1309 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1310 | * @adapter: board private structure | |
1311 | * | |
1312 | * Configure the Tx unit of the MAC after a reset. | |
1313 | **/ | |
1314 | ||
1315 | static void | |
1316 | e1000_configure_tx(struct e1000_adapter *adapter) | |
1317 | { | |
581d708e MC |
1318 | uint64_t tdba; |
1319 | struct e1000_hw *hw = &adapter->hw; | |
1320 | uint32_t tdlen, tctl, tipg, tarc; | |
0fadb059 | 1321 | uint32_t ipgr1, ipgr2; |
1da177e4 LT |
1322 | |
1323 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1324 | ||
f56799ea | 1325 | switch (adapter->num_tx_queues) { |
24025e4e MC |
1326 | case 1: |
1327 | default: | |
581d708e MC |
1328 | tdba = adapter->tx_ring[0].dma; |
1329 | tdlen = adapter->tx_ring[0].count * | |
1330 | sizeof(struct e1000_tx_desc); | |
1331 | E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); | |
1332 | E1000_WRITE_REG(hw, TDBAH, (tdba >> 32)); | |
1333 | E1000_WRITE_REG(hw, TDLEN, tdlen); | |
1334 | E1000_WRITE_REG(hw, TDH, 0); | |
1335 | E1000_WRITE_REG(hw, TDT, 0); | |
1336 | adapter->tx_ring[0].tdh = E1000_TDH; | |
1337 | adapter->tx_ring[0].tdt = E1000_TDT; | |
24025e4e MC |
1338 | break; |
1339 | } | |
1da177e4 LT |
1340 | |
1341 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
1342 | ||
0fadb059 JK |
1343 | if (hw->media_type == e1000_media_type_fiber || |
1344 | hw->media_type == e1000_media_type_internal_serdes) | |
1345 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; | |
1346 | else | |
1347 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1348 | ||
581d708e | 1349 | switch (hw->mac_type) { |
1da177e4 LT |
1350 | case e1000_82542_rev2_0: |
1351 | case e1000_82542_rev2_1: | |
1352 | tipg = DEFAULT_82542_TIPG_IPGT; | |
0fadb059 JK |
1353 | ipgr1 = DEFAULT_82542_TIPG_IPGR1; |
1354 | ipgr2 = DEFAULT_82542_TIPG_IPGR2; | |
1da177e4 | 1355 | break; |
87041639 JK |
1356 | case e1000_80003es2lan: |
1357 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; | |
1358 | ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; | |
1359 | break; | |
1da177e4 | 1360 | default: |
0fadb059 JK |
1361 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; |
1362 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; | |
1363 | break; | |
1da177e4 | 1364 | } |
0fadb059 JK |
1365 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; |
1366 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
581d708e | 1367 | E1000_WRITE_REG(hw, TIPG, tipg); |
1da177e4 LT |
1368 | |
1369 | /* Set the Tx Interrupt Delay register */ | |
1370 | ||
581d708e MC |
1371 | E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay); |
1372 | if (hw->mac_type >= e1000_82540) | |
1373 | E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay); | |
1da177e4 LT |
1374 | |
1375 | /* Program the Transmit Control Register */ | |
1376 | ||
581d708e | 1377 | tctl = E1000_READ_REG(hw, TCTL); |
1da177e4 LT |
1378 | |
1379 | tctl &= ~E1000_TCTL_CT; | |
7e6c9861 | 1380 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1381 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1382 | ||
7e6c9861 JK |
1383 | #ifdef DISABLE_MULR |
1384 | /* disable Multiple Reads for debugging */ | |
1385 | tctl &= ~E1000_TCTL_MULR; | |
1386 | #endif | |
1da177e4 | 1387 | |
2ae76d98 MC |
1388 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { |
1389 | tarc = E1000_READ_REG(hw, TARC0); | |
1390 | tarc |= ((1 << 25) | (1 << 21)); | |
1391 | E1000_WRITE_REG(hw, TARC0, tarc); | |
1392 | tarc = E1000_READ_REG(hw, TARC1); | |
1393 | tarc |= (1 << 25); | |
1394 | if (tctl & E1000_TCTL_MULR) | |
1395 | tarc &= ~(1 << 28); | |
1396 | else | |
1397 | tarc |= (1 << 28); | |
1398 | E1000_WRITE_REG(hw, TARC1, tarc); | |
87041639 JK |
1399 | } else if (hw->mac_type == e1000_80003es2lan) { |
1400 | tarc = E1000_READ_REG(hw, TARC0); | |
1401 | tarc |= 1; | |
1402 | if (hw->media_type == e1000_media_type_internal_serdes) | |
1403 | tarc |= (1 << 20); | |
1404 | E1000_WRITE_REG(hw, TARC0, tarc); | |
1405 | tarc = E1000_READ_REG(hw, TARC1); | |
1406 | tarc |= 1; | |
1407 | E1000_WRITE_REG(hw, TARC1, tarc); | |
2ae76d98 MC |
1408 | } |
1409 | ||
581d708e | 1410 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1411 | |
1412 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
1413 | adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP | | |
1414 | E1000_TXD_CMD_IFCS; | |
1415 | ||
581d708e | 1416 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1417 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1418 | else | |
1419 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1420 | ||
1421 | /* Cache if we're 82544 running in PCI-X because we'll | |
1422 | * need this to apply a workaround later in the send path. */ | |
581d708e MC |
1423 | if (hw->mac_type == e1000_82544 && |
1424 | hw->bus_type == e1000_bus_type_pcix) | |
1da177e4 | 1425 | adapter->pcix_82544 = 1; |
7e6c9861 JK |
1426 | |
1427 | E1000_WRITE_REG(hw, TCTL, tctl); | |
1428 | ||
1da177e4 LT |
1429 | } |
1430 | ||
1431 | /** | |
1432 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1433 | * @adapter: board private structure | |
581d708e | 1434 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1435 | * |
1436 | * Returns 0 on success, negative on failure | |
1437 | **/ | |
1438 | ||
3ad2cc67 | 1439 | static int |
581d708e MC |
1440 | e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1441 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1442 | { |
1da177e4 | 1443 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1444 | int size, desc_len; |
1da177e4 LT |
1445 | |
1446 | size = sizeof(struct e1000_buffer) * rxdr->count; | |
a7ec15da | 1447 | rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus)); |
581d708e | 1448 | if (!rxdr->buffer_info) { |
2648345f MC |
1449 | DPRINTK(PROBE, ERR, |
1450 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 LT |
1451 | return -ENOMEM; |
1452 | } | |
1453 | memset(rxdr->buffer_info, 0, size); | |
1454 | ||
2d7edb92 MC |
1455 | size = sizeof(struct e1000_ps_page) * rxdr->count; |
1456 | rxdr->ps_page = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1457 | if (!rxdr->ps_page) { |
2d7edb92 MC |
1458 | vfree(rxdr->buffer_info); |
1459 | DPRINTK(PROBE, ERR, | |
1460 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1461 | return -ENOMEM; | |
1462 | } | |
1463 | memset(rxdr->ps_page, 0, size); | |
1464 | ||
1465 | size = sizeof(struct e1000_ps_page_dma) * rxdr->count; | |
1466 | rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL); | |
96838a40 | 1467 | if (!rxdr->ps_page_dma) { |
2d7edb92 MC |
1468 | vfree(rxdr->buffer_info); |
1469 | kfree(rxdr->ps_page); | |
1470 | DPRINTK(PROBE, ERR, | |
1471 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1472 | return -ENOMEM; | |
1473 | } | |
1474 | memset(rxdr->ps_page_dma, 0, size); | |
1475 | ||
96838a40 | 1476 | if (adapter->hw.mac_type <= e1000_82547_rev_2) |
2d7edb92 MC |
1477 | desc_len = sizeof(struct e1000_rx_desc); |
1478 | else | |
1479 | desc_len = sizeof(union e1000_rx_desc_packet_split); | |
1480 | ||
1da177e4 LT |
1481 | /* Round up to nearest 4K */ |
1482 | ||
2d7edb92 | 1483 | rxdr->size = rxdr->count * desc_len; |
1da177e4 LT |
1484 | E1000_ROUNDUP(rxdr->size, 4096); |
1485 | ||
1486 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
1487 | ||
581d708e MC |
1488 | if (!rxdr->desc) { |
1489 | DPRINTK(PROBE, ERR, | |
1490 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 | 1491 | setup_rx_desc_die: |
1da177e4 | 1492 | vfree(rxdr->buffer_info); |
2d7edb92 MC |
1493 | kfree(rxdr->ps_page); |
1494 | kfree(rxdr->ps_page_dma); | |
1da177e4 LT |
1495 | return -ENOMEM; |
1496 | } | |
1497 | ||
2648345f | 1498 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1499 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1500 | void *olddesc = rxdr->desc; | |
1501 | dma_addr_t olddma = rxdr->dma; | |
2648345f MC |
1502 | DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " |
1503 | "at %p\n", rxdr->size, rxdr->desc); | |
1504 | /* Try again, without freeing the previous */ | |
1da177e4 | 1505 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); |
2648345f | 1506 | /* Failed allocation, critical failure */ |
581d708e | 1507 | if (!rxdr->desc) { |
1da177e4 | 1508 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
581d708e MC |
1509 | DPRINTK(PROBE, ERR, |
1510 | "Unable to allocate memory " | |
1511 | "for the receive descriptor ring\n"); | |
1da177e4 LT |
1512 | goto setup_rx_desc_die; |
1513 | } | |
1514 | ||
1515 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1516 | /* give up */ | |
2648345f MC |
1517 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, |
1518 | rxdr->dma); | |
1da177e4 | 1519 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
2648345f MC |
1520 | DPRINTK(PROBE, ERR, |
1521 | "Unable to allocate aligned memory " | |
1522 | "for the receive descriptor ring\n"); | |
581d708e | 1523 | goto setup_rx_desc_die; |
1da177e4 | 1524 | } else { |
2648345f | 1525 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1526 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
1527 | } | |
1528 | } | |
1529 | memset(rxdr->desc, 0, rxdr->size); | |
1530 | ||
1531 | rxdr->next_to_clean = 0; | |
1532 | rxdr->next_to_use = 0; | |
1533 | ||
1534 | return 0; | |
1535 | } | |
1536 | ||
581d708e MC |
1537 | /** |
1538 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1539 | * (Descriptors) for all queues | |
1540 | * @adapter: board private structure | |
1541 | * | |
1542 | * If this function returns with an error, then it's possible one or | |
1543 | * more of the rings is populated (while the rest are not). It is the | |
1544 | * callers duty to clean those orphaned rings. | |
1545 | * | |
1546 | * Return 0 on success, negative on failure | |
1547 | **/ | |
1548 | ||
1549 | int | |
1550 | e1000_setup_all_rx_resources(struct e1000_adapter *adapter) | |
1551 | { | |
1552 | int i, err = 0; | |
1553 | ||
f56799ea | 1554 | for (i = 0; i < adapter->num_rx_queues; i++) { |
581d708e MC |
1555 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
1556 | if (err) { | |
1557 | DPRINTK(PROBE, ERR, | |
1558 | "Allocation for Rx Queue %u failed\n", i); | |
1559 | break; | |
1560 | } | |
1561 | } | |
1562 | ||
1563 | return err; | |
1564 | } | |
1565 | ||
1da177e4 | 1566 | /** |
2648345f | 1567 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1568 | * @adapter: Board private structure |
1569 | **/ | |
e4c811c9 MC |
1570 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ |
1571 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
1da177e4 LT |
1572 | static void |
1573 | e1000_setup_rctl(struct e1000_adapter *adapter) | |
1574 | { | |
2d7edb92 MC |
1575 | uint32_t rctl, rfctl; |
1576 | uint32_t psrctl = 0; | |
35ec56bb | 1577 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
e4c811c9 MC |
1578 | uint32_t pages = 0; |
1579 | #endif | |
1da177e4 LT |
1580 | |
1581 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1582 | ||
1583 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1584 | ||
1585 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1586 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1587 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1588 | ||
0fadb059 JK |
1589 | if (adapter->hw.mac_type > e1000_82543) |
1590 | rctl |= E1000_RCTL_SECRC; | |
1591 | ||
1592 | if (adapter->hw.tbi_compatibility_on == 1) | |
1da177e4 LT |
1593 | rctl |= E1000_RCTL_SBP; |
1594 | else | |
1595 | rctl &= ~E1000_RCTL_SBP; | |
1596 | ||
2d7edb92 MC |
1597 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1598 | rctl &= ~E1000_RCTL_LPE; | |
1599 | else | |
1600 | rctl |= E1000_RCTL_LPE; | |
1601 | ||
1da177e4 | 1602 | /* Setup buffer sizes */ |
9e2feace AK |
1603 | rctl &= ~E1000_RCTL_SZ_4096; |
1604 | rctl |= E1000_RCTL_BSEX; | |
1605 | switch (adapter->rx_buffer_len) { | |
1606 | case E1000_RXBUFFER_256: | |
1607 | rctl |= E1000_RCTL_SZ_256; | |
1608 | rctl &= ~E1000_RCTL_BSEX; | |
1609 | break; | |
1610 | case E1000_RXBUFFER_512: | |
1611 | rctl |= E1000_RCTL_SZ_512; | |
1612 | rctl &= ~E1000_RCTL_BSEX; | |
1613 | break; | |
1614 | case E1000_RXBUFFER_1024: | |
1615 | rctl |= E1000_RCTL_SZ_1024; | |
1616 | rctl &= ~E1000_RCTL_BSEX; | |
1617 | break; | |
a1415ee6 JK |
1618 | case E1000_RXBUFFER_2048: |
1619 | default: | |
1620 | rctl |= E1000_RCTL_SZ_2048; | |
1621 | rctl &= ~E1000_RCTL_BSEX; | |
1622 | break; | |
1623 | case E1000_RXBUFFER_4096: | |
1624 | rctl |= E1000_RCTL_SZ_4096; | |
1625 | break; | |
1626 | case E1000_RXBUFFER_8192: | |
1627 | rctl |= E1000_RCTL_SZ_8192; | |
1628 | break; | |
1629 | case E1000_RXBUFFER_16384: | |
1630 | rctl |= E1000_RCTL_SZ_16384; | |
1631 | break; | |
2d7edb92 MC |
1632 | } |
1633 | ||
35ec56bb | 1634 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
2d7edb92 MC |
1635 | /* 82571 and greater support packet-split where the protocol |
1636 | * header is placed in skb->data and the packet data is | |
1637 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
1638 | * In the case of a non-split, skb->data is linearly filled, | |
1639 | * followed by the page buffers. Therefore, skb->data is | |
1640 | * sized to hold the largest protocol header. | |
1641 | */ | |
e4c811c9 MC |
1642 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
1643 | if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) && | |
1644 | PAGE_SIZE <= 16384) | |
1645 | adapter->rx_ps_pages = pages; | |
1646 | else | |
1647 | adapter->rx_ps_pages = 0; | |
2d7edb92 | 1648 | #endif |
e4c811c9 | 1649 | if (adapter->rx_ps_pages) { |
2d7edb92 MC |
1650 | /* Configure extra packet-split registers */ |
1651 | rfctl = E1000_READ_REG(&adapter->hw, RFCTL); | |
1652 | rfctl |= E1000_RFCTL_EXTEN; | |
1653 | /* disable IPv6 packet split support */ | |
1654 | rfctl |= E1000_RFCTL_IPV6_DIS; | |
1655 | E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); | |
1656 | ||
1657 | rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC; | |
96838a40 | 1658 | |
2d7edb92 MC |
1659 | psrctl |= adapter->rx_ps_bsize0 >> |
1660 | E1000_PSRCTL_BSIZE0_SHIFT; | |
e4c811c9 MC |
1661 | |
1662 | switch (adapter->rx_ps_pages) { | |
1663 | case 3: | |
1664 | psrctl |= PAGE_SIZE << | |
1665 | E1000_PSRCTL_BSIZE3_SHIFT; | |
1666 | case 2: | |
1667 | psrctl |= PAGE_SIZE << | |
1668 | E1000_PSRCTL_BSIZE2_SHIFT; | |
1669 | case 1: | |
1670 | psrctl |= PAGE_SIZE >> | |
1671 | E1000_PSRCTL_BSIZE1_SHIFT; | |
1672 | break; | |
1673 | } | |
2d7edb92 MC |
1674 | |
1675 | E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); | |
1da177e4 LT |
1676 | } |
1677 | ||
1678 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1679 | } | |
1680 | ||
1681 | /** | |
1682 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1683 | * @adapter: board private structure | |
1684 | * | |
1685 | * Configure the Rx unit of the MAC after a reset. | |
1686 | **/ | |
1687 | ||
1688 | static void | |
1689 | e1000_configure_rx(struct e1000_adapter *adapter) | |
1690 | { | |
581d708e MC |
1691 | uint64_t rdba; |
1692 | struct e1000_hw *hw = &adapter->hw; | |
1693 | uint32_t rdlen, rctl, rxcsum, ctrl_ext; | |
2d7edb92 | 1694 | |
e4c811c9 | 1695 | if (adapter->rx_ps_pages) { |
0f15a8fa | 1696 | /* this is a 32 byte descriptor */ |
581d708e | 1697 | rdlen = adapter->rx_ring[0].count * |
2d7edb92 MC |
1698 | sizeof(union e1000_rx_desc_packet_split); |
1699 | adapter->clean_rx = e1000_clean_rx_irq_ps; | |
1700 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | |
1701 | } else { | |
581d708e MC |
1702 | rdlen = adapter->rx_ring[0].count * |
1703 | sizeof(struct e1000_rx_desc); | |
2d7edb92 MC |
1704 | adapter->clean_rx = e1000_clean_rx_irq; |
1705 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
1706 | } | |
1da177e4 LT |
1707 | |
1708 | /* disable receives while setting up the descriptors */ | |
581d708e MC |
1709 | rctl = E1000_READ_REG(hw, RCTL); |
1710 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
1711 | |
1712 | /* set the Receive Delay Timer Register */ | |
581d708e | 1713 | E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay); |
1da177e4 | 1714 | |
581d708e MC |
1715 | if (hw->mac_type >= e1000_82540) { |
1716 | E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay); | |
96838a40 | 1717 | if (adapter->itr > 1) |
581d708e | 1718 | E1000_WRITE_REG(hw, ITR, |
1da177e4 LT |
1719 | 1000000000 / (adapter->itr * 256)); |
1720 | } | |
1721 | ||
2ae76d98 | 1722 | if (hw->mac_type >= e1000_82571) { |
2ae76d98 | 1723 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); |
1e613fd9 | 1724 | /* Reset delay timers after every interrupt */ |
6fc7a7ec | 1725 | ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; |
1e613fd9 JK |
1726 | #ifdef CONFIG_E1000_NAPI |
1727 | /* Auto-Mask interrupts upon ICR read. */ | |
1728 | ctrl_ext |= E1000_CTRL_EXT_IAME; | |
1729 | #endif | |
2ae76d98 | 1730 | E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext); |
1e613fd9 | 1731 | E1000_WRITE_REG(hw, IAM, ~0); |
2ae76d98 MC |
1732 | E1000_WRITE_FLUSH(hw); |
1733 | } | |
1734 | ||
581d708e MC |
1735 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
1736 | * the Base and Length of the Rx Descriptor Ring */ | |
f56799ea | 1737 | switch (adapter->num_rx_queues) { |
24025e4e MC |
1738 | case 1: |
1739 | default: | |
581d708e MC |
1740 | rdba = adapter->rx_ring[0].dma; |
1741 | E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); | |
1742 | E1000_WRITE_REG(hw, RDBAH, (rdba >> 32)); | |
1743 | E1000_WRITE_REG(hw, RDLEN, rdlen); | |
1744 | E1000_WRITE_REG(hw, RDH, 0); | |
1745 | E1000_WRITE_REG(hw, RDT, 0); | |
1746 | adapter->rx_ring[0].rdh = E1000_RDH; | |
1747 | adapter->rx_ring[0].rdt = E1000_RDT; | |
1748 | break; | |
24025e4e MC |
1749 | } |
1750 | ||
1da177e4 | 1751 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
581d708e MC |
1752 | if (hw->mac_type >= e1000_82543) { |
1753 | rxcsum = E1000_READ_REG(hw, RXCSUM); | |
96838a40 | 1754 | if (adapter->rx_csum == TRUE) { |
2d7edb92 MC |
1755 | rxcsum |= E1000_RXCSUM_TUOFL; |
1756 | ||
868d5309 | 1757 | /* Enable 82571 IPv4 payload checksum for UDP fragments |
2d7edb92 | 1758 | * Must be used in conjunction with packet-split. */ |
96838a40 JB |
1759 | if ((hw->mac_type >= e1000_82571) && |
1760 | (adapter->rx_ps_pages)) { | |
2d7edb92 MC |
1761 | rxcsum |= E1000_RXCSUM_IPPCSE; |
1762 | } | |
1763 | } else { | |
1764 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
1765 | /* don't need to clear IPPCSE as it defaults to 0 */ | |
1766 | } | |
581d708e | 1767 | E1000_WRITE_REG(hw, RXCSUM, rxcsum); |
1da177e4 LT |
1768 | } |
1769 | ||
581d708e MC |
1770 | if (hw->mac_type == e1000_82573) |
1771 | E1000_WRITE_REG(hw, ERT, 0x0100); | |
2d7edb92 | 1772 | |
1da177e4 | 1773 | /* Enable Receives */ |
581d708e | 1774 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
1775 | } |
1776 | ||
1777 | /** | |
581d708e | 1778 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 1779 | * @adapter: board private structure |
581d708e | 1780 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
1781 | * |
1782 | * Free all transmit software resources | |
1783 | **/ | |
1784 | ||
3ad2cc67 | 1785 | static void |
581d708e MC |
1786 | e1000_free_tx_resources(struct e1000_adapter *adapter, |
1787 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
1788 | { |
1789 | struct pci_dev *pdev = adapter->pdev; | |
1790 | ||
581d708e | 1791 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 1792 | |
581d708e MC |
1793 | vfree(tx_ring->buffer_info); |
1794 | tx_ring->buffer_info = NULL; | |
1da177e4 | 1795 | |
581d708e | 1796 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); |
1da177e4 | 1797 | |
581d708e MC |
1798 | tx_ring->desc = NULL; |
1799 | } | |
1800 | ||
1801 | /** | |
1802 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
1803 | * @adapter: board private structure | |
1804 | * | |
1805 | * Free all transmit software resources | |
1806 | **/ | |
1807 | ||
1808 | void | |
1809 | e1000_free_all_tx_resources(struct e1000_adapter *adapter) | |
1810 | { | |
1811 | int i; | |
1812 | ||
f56799ea | 1813 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1814 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1815 | } |
1816 | ||
e619d523 | 1817 | static void |
1da177e4 LT |
1818 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, |
1819 | struct e1000_buffer *buffer_info) | |
1820 | { | |
96838a40 | 1821 | if (buffer_info->dma) { |
2648345f MC |
1822 | pci_unmap_page(adapter->pdev, |
1823 | buffer_info->dma, | |
1824 | buffer_info->length, | |
1825 | PCI_DMA_TODEVICE); | |
1da177e4 | 1826 | } |
8241e35e | 1827 | if (buffer_info->skb) |
1da177e4 | 1828 | dev_kfree_skb_any(buffer_info->skb); |
8241e35e | 1829 | memset(buffer_info, 0, sizeof(struct e1000_buffer)); |
1da177e4 LT |
1830 | } |
1831 | ||
1832 | /** | |
1833 | * e1000_clean_tx_ring - Free Tx Buffers | |
1834 | * @adapter: board private structure | |
581d708e | 1835 | * @tx_ring: ring to be cleaned |
1da177e4 LT |
1836 | **/ |
1837 | ||
1838 | static void | |
581d708e MC |
1839 | e1000_clean_tx_ring(struct e1000_adapter *adapter, |
1840 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 1841 | { |
1da177e4 LT |
1842 | struct e1000_buffer *buffer_info; |
1843 | unsigned long size; | |
1844 | unsigned int i; | |
1845 | ||
1846 | /* Free all the Tx ring sk_buffs */ | |
1847 | ||
96838a40 | 1848 | for (i = 0; i < tx_ring->count; i++) { |
1da177e4 LT |
1849 | buffer_info = &tx_ring->buffer_info[i]; |
1850 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
1851 | } | |
1852 | ||
1853 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
1854 | memset(tx_ring->buffer_info, 0, size); | |
1855 | ||
1856 | /* Zero out the descriptor ring */ | |
1857 | ||
1858 | memset(tx_ring->desc, 0, tx_ring->size); | |
1859 | ||
1860 | tx_ring->next_to_use = 0; | |
1861 | tx_ring->next_to_clean = 0; | |
fd803241 | 1862 | tx_ring->last_tx_tso = 0; |
1da177e4 | 1863 | |
581d708e MC |
1864 | writel(0, adapter->hw.hw_addr + tx_ring->tdh); |
1865 | writel(0, adapter->hw.hw_addr + tx_ring->tdt); | |
1866 | } | |
1867 | ||
1868 | /** | |
1869 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
1870 | * @adapter: board private structure | |
1871 | **/ | |
1872 | ||
1873 | static void | |
1874 | e1000_clean_all_tx_rings(struct e1000_adapter *adapter) | |
1875 | { | |
1876 | int i; | |
1877 | ||
f56799ea | 1878 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 1879 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
1da177e4 LT |
1880 | } |
1881 | ||
1882 | /** | |
1883 | * e1000_free_rx_resources - Free Rx Resources | |
1884 | * @adapter: board private structure | |
581d708e | 1885 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
1886 | * |
1887 | * Free all receive software resources | |
1888 | **/ | |
1889 | ||
3ad2cc67 | 1890 | static void |
581d708e MC |
1891 | e1000_free_rx_resources(struct e1000_adapter *adapter, |
1892 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 1893 | { |
1da177e4 LT |
1894 | struct pci_dev *pdev = adapter->pdev; |
1895 | ||
581d708e | 1896 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
1897 | |
1898 | vfree(rx_ring->buffer_info); | |
1899 | rx_ring->buffer_info = NULL; | |
2d7edb92 MC |
1900 | kfree(rx_ring->ps_page); |
1901 | rx_ring->ps_page = NULL; | |
1902 | kfree(rx_ring->ps_page_dma); | |
1903 | rx_ring->ps_page_dma = NULL; | |
1da177e4 LT |
1904 | |
1905 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
1906 | ||
1907 | rx_ring->desc = NULL; | |
1908 | } | |
1909 | ||
1910 | /** | |
581d708e | 1911 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 1912 | * @adapter: board private structure |
581d708e MC |
1913 | * |
1914 | * Free all receive software resources | |
1915 | **/ | |
1916 | ||
1917 | void | |
1918 | e1000_free_all_rx_resources(struct e1000_adapter *adapter) | |
1919 | { | |
1920 | int i; | |
1921 | ||
f56799ea | 1922 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e MC |
1923 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); |
1924 | } | |
1925 | ||
1926 | /** | |
1927 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
1928 | * @adapter: board private structure | |
1929 | * @rx_ring: ring to free buffers from | |
1da177e4 LT |
1930 | **/ |
1931 | ||
1932 | static void | |
581d708e MC |
1933 | e1000_clean_rx_ring(struct e1000_adapter *adapter, |
1934 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 1935 | { |
1da177e4 | 1936 | struct e1000_buffer *buffer_info; |
2d7edb92 MC |
1937 | struct e1000_ps_page *ps_page; |
1938 | struct e1000_ps_page_dma *ps_page_dma; | |
1da177e4 LT |
1939 | struct pci_dev *pdev = adapter->pdev; |
1940 | unsigned long size; | |
2d7edb92 | 1941 | unsigned int i, j; |
1da177e4 LT |
1942 | |
1943 | /* Free all the Rx ring sk_buffs */ | |
96838a40 | 1944 | for (i = 0; i < rx_ring->count; i++) { |
1da177e4 | 1945 | buffer_info = &rx_ring->buffer_info[i]; |
96838a40 | 1946 | if (buffer_info->skb) { |
1da177e4 LT |
1947 | pci_unmap_single(pdev, |
1948 | buffer_info->dma, | |
1949 | buffer_info->length, | |
1950 | PCI_DMA_FROMDEVICE); | |
1951 | ||
1952 | dev_kfree_skb(buffer_info->skb); | |
1953 | buffer_info->skb = NULL; | |
997f5cbd JK |
1954 | } |
1955 | ps_page = &rx_ring->ps_page[i]; | |
1956 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
1957 | for (j = 0; j < adapter->rx_ps_pages; j++) { | |
1958 | if (!ps_page->ps_page[j]) break; | |
1959 | pci_unmap_page(pdev, | |
1960 | ps_page_dma->ps_page_dma[j], | |
1961 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
1962 | ps_page_dma->ps_page_dma[j] = 0; | |
1963 | put_page(ps_page->ps_page[j]); | |
1964 | ps_page->ps_page[j] = NULL; | |
1da177e4 LT |
1965 | } |
1966 | } | |
1967 | ||
1968 | size = sizeof(struct e1000_buffer) * rx_ring->count; | |
1969 | memset(rx_ring->buffer_info, 0, size); | |
2d7edb92 MC |
1970 | size = sizeof(struct e1000_ps_page) * rx_ring->count; |
1971 | memset(rx_ring->ps_page, 0, size); | |
1972 | size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; | |
1973 | memset(rx_ring->ps_page_dma, 0, size); | |
1da177e4 LT |
1974 | |
1975 | /* Zero out the descriptor ring */ | |
1976 | ||
1977 | memset(rx_ring->desc, 0, rx_ring->size); | |
1978 | ||
1979 | rx_ring->next_to_clean = 0; | |
1980 | rx_ring->next_to_use = 0; | |
1981 | ||
581d708e MC |
1982 | writel(0, adapter->hw.hw_addr + rx_ring->rdh); |
1983 | writel(0, adapter->hw.hw_addr + rx_ring->rdt); | |
1984 | } | |
1985 | ||
1986 | /** | |
1987 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
1988 | * @adapter: board private structure | |
1989 | **/ | |
1990 | ||
1991 | static void | |
1992 | e1000_clean_all_rx_rings(struct e1000_adapter *adapter) | |
1993 | { | |
1994 | int i; | |
1995 | ||
f56799ea | 1996 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 1997 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
1da177e4 LT |
1998 | } |
1999 | ||
2000 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
2001 | * and memory write and invalidate disabled for certain operations | |
2002 | */ | |
2003 | static void | |
2004 | e1000_enter_82542_rst(struct e1000_adapter *adapter) | |
2005 | { | |
2006 | struct net_device *netdev = adapter->netdev; | |
2007 | uint32_t rctl; | |
2008 | ||
2009 | e1000_pci_clear_mwi(&adapter->hw); | |
2010 | ||
2011 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2012 | rctl |= E1000_RCTL_RST; | |
2013 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2014 | E1000_WRITE_FLUSH(&adapter->hw); | |
2015 | mdelay(5); | |
2016 | ||
96838a40 | 2017 | if (netif_running(netdev)) |
581d708e | 2018 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
2019 | } |
2020 | ||
2021 | static void | |
2022 | e1000_leave_82542_rst(struct e1000_adapter *adapter) | |
2023 | { | |
2024 | struct net_device *netdev = adapter->netdev; | |
2025 | uint32_t rctl; | |
2026 | ||
2027 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
2028 | rctl &= ~E1000_RCTL_RST; | |
2029 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2030 | E1000_WRITE_FLUSH(&adapter->hw); | |
2031 | mdelay(5); | |
2032 | ||
96838a40 | 2033 | if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) |
1da177e4 LT |
2034 | e1000_pci_set_mwi(&adapter->hw); |
2035 | ||
96838a40 | 2036 | if (netif_running(netdev)) { |
72d64a43 JK |
2037 | /* No need to loop, because 82542 supports only 1 queue */ |
2038 | struct e1000_rx_ring *ring = &adapter->rx_ring[0]; | |
7c4d3367 | 2039 | e1000_configure_rx(adapter); |
72d64a43 | 2040 | adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); |
1da177e4 LT |
2041 | } |
2042 | } | |
2043 | ||
2044 | /** | |
2045 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2046 | * @netdev: network interface device structure | |
2047 | * @p: pointer to an address structure | |
2048 | * | |
2049 | * Returns 0 on success, negative on failure | |
2050 | **/ | |
2051 | ||
2052 | static int | |
2053 | e1000_set_mac(struct net_device *netdev, void *p) | |
2054 | { | |
60490fe0 | 2055 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2056 | struct sockaddr *addr = p; |
2057 | ||
96838a40 | 2058 | if (!is_valid_ether_addr(addr->sa_data)) |
1da177e4 LT |
2059 | return -EADDRNOTAVAIL; |
2060 | ||
2061 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2062 | ||
96838a40 | 2063 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2064 | e1000_enter_82542_rst(adapter); |
2065 | ||
2066 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
2067 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
2068 | ||
2069 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2070 | ||
868d5309 MC |
2071 | /* With 82571 controllers, LAA may be overwritten (with the default) |
2072 | * due to controller reset from the other port. */ | |
2073 | if (adapter->hw.mac_type == e1000_82571) { | |
2074 | /* activate the work around */ | |
2075 | adapter->hw.laa_is_present = 1; | |
2076 | ||
96838a40 JB |
2077 | /* Hold a copy of the LAA in RAR[14] This is done so that |
2078 | * between the time RAR[0] gets clobbered and the time it | |
2079 | * gets fixed (in e1000_watchdog), the actual LAA is in one | |
868d5309 | 2080 | * of the RARs and no incoming packets directed to this port |
96838a40 | 2081 | * are dropped. Eventaully the LAA will be in RAR[0] and |
868d5309 | 2082 | * RAR[14] */ |
96838a40 | 2083 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, |
868d5309 MC |
2084 | E1000_RAR_ENTRIES - 1); |
2085 | } | |
2086 | ||
96838a40 | 2087 | if (adapter->hw.mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2088 | e1000_leave_82542_rst(adapter); |
2089 | ||
2090 | return 0; | |
2091 | } | |
2092 | ||
2093 | /** | |
2094 | * e1000_set_multi - Multicast and Promiscuous mode set | |
2095 | * @netdev: network interface device structure | |
2096 | * | |
2097 | * The set_multi entry point is called whenever the multicast address | |
2098 | * list or the network interface flags are updated. This routine is | |
2099 | * responsible for configuring the hardware for proper multicast, | |
2100 | * promiscuous mode, and all-multi behavior. | |
2101 | **/ | |
2102 | ||
2103 | static void | |
2104 | e1000_set_multi(struct net_device *netdev) | |
2105 | { | |
60490fe0 | 2106 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2107 | struct e1000_hw *hw = &adapter->hw; |
2108 | struct dev_mc_list *mc_ptr; | |
2109 | uint32_t rctl; | |
2110 | uint32_t hash_value; | |
868d5309 | 2111 | int i, rar_entries = E1000_RAR_ENTRIES; |
1da177e4 | 2112 | |
868d5309 MC |
2113 | /* reserve RAR[14] for LAA over-write work-around */ |
2114 | if (adapter->hw.mac_type == e1000_82571) | |
2115 | rar_entries--; | |
1da177e4 | 2116 | |
2648345f MC |
2117 | /* Check for Promiscuous and All Multicast modes */ |
2118 | ||
1da177e4 LT |
2119 | rctl = E1000_READ_REG(hw, RCTL); |
2120 | ||
96838a40 | 2121 | if (netdev->flags & IFF_PROMISC) { |
1da177e4 | 2122 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
96838a40 | 2123 | } else if (netdev->flags & IFF_ALLMULTI) { |
1da177e4 LT |
2124 | rctl |= E1000_RCTL_MPE; |
2125 | rctl &= ~E1000_RCTL_UPE; | |
2126 | } else { | |
2127 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2128 | } | |
2129 | ||
2130 | E1000_WRITE_REG(hw, RCTL, rctl); | |
2131 | ||
2132 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2133 | ||
96838a40 | 2134 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 LT |
2135 | e1000_enter_82542_rst(adapter); |
2136 | ||
2137 | /* load the first 14 multicast address into the exact filters 1-14 | |
2138 | * RAR 0 is used for the station MAC adddress | |
2139 | * if there are not 14 addresses, go ahead and clear the filters | |
868d5309 | 2140 | * -- with 82571 controllers only 0-13 entries are filled here |
1da177e4 LT |
2141 | */ |
2142 | mc_ptr = netdev->mc_list; | |
2143 | ||
96838a40 | 2144 | for (i = 1; i < rar_entries; i++) { |
868d5309 | 2145 | if (mc_ptr) { |
1da177e4 LT |
2146 | e1000_rar_set(hw, mc_ptr->dmi_addr, i); |
2147 | mc_ptr = mc_ptr->next; | |
2148 | } else { | |
2149 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
2150 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); | |
2151 | } | |
2152 | } | |
2153 | ||
2154 | /* clear the old settings from the multicast hash table */ | |
2155 | ||
96838a40 | 2156 | for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++) |
1da177e4 LT |
2157 | E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); |
2158 | ||
2159 | /* load any remaining addresses into the hash table */ | |
2160 | ||
96838a40 | 2161 | for (; mc_ptr; mc_ptr = mc_ptr->next) { |
1da177e4 LT |
2162 | hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr); |
2163 | e1000_mta_set(hw, hash_value); | |
2164 | } | |
2165 | ||
96838a40 | 2166 | if (hw->mac_type == e1000_82542_rev2_0) |
1da177e4 | 2167 | e1000_leave_82542_rst(adapter); |
1da177e4 LT |
2168 | } |
2169 | ||
2170 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2171 | * the phy */ | |
2172 | ||
2173 | static void | |
2174 | e1000_update_phy_info(unsigned long data) | |
2175 | { | |
2176 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2177 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2178 | } | |
2179 | ||
2180 | /** | |
2181 | * e1000_82547_tx_fifo_stall - Timer Call-back | |
2182 | * @data: pointer to adapter cast into an unsigned long | |
2183 | **/ | |
2184 | ||
2185 | static void | |
2186 | e1000_82547_tx_fifo_stall(unsigned long data) | |
2187 | { | |
2188 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2189 | struct net_device *netdev = adapter->netdev; | |
2190 | uint32_t tctl; | |
2191 | ||
96838a40 JB |
2192 | if (atomic_read(&adapter->tx_fifo_stall)) { |
2193 | if ((E1000_READ_REG(&adapter->hw, TDT) == | |
1da177e4 LT |
2194 | E1000_READ_REG(&adapter->hw, TDH)) && |
2195 | (E1000_READ_REG(&adapter->hw, TDFT) == | |
2196 | E1000_READ_REG(&adapter->hw, TDFH)) && | |
2197 | (E1000_READ_REG(&adapter->hw, TDFTS) == | |
2198 | E1000_READ_REG(&adapter->hw, TDFHS))) { | |
2199 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2200 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
2201 | tctl & ~E1000_TCTL_EN); | |
2202 | E1000_WRITE_REG(&adapter->hw, TDFT, | |
2203 | adapter->tx_head_addr); | |
2204 | E1000_WRITE_REG(&adapter->hw, TDFH, | |
2205 | adapter->tx_head_addr); | |
2206 | E1000_WRITE_REG(&adapter->hw, TDFTS, | |
2207 | adapter->tx_head_addr); | |
2208 | E1000_WRITE_REG(&adapter->hw, TDFHS, | |
2209 | adapter->tx_head_addr); | |
2210 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
2211 | E1000_WRITE_FLUSH(&adapter->hw); | |
2212 | ||
2213 | adapter->tx_fifo_head = 0; | |
2214 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2215 | netif_wake_queue(netdev); | |
2216 | } else { | |
2217 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); | |
2218 | } | |
2219 | } | |
2220 | } | |
2221 | ||
2222 | /** | |
2223 | * e1000_watchdog - Timer Call-back | |
2224 | * @data: pointer to adapter cast into an unsigned long | |
2225 | **/ | |
2226 | static void | |
2227 | e1000_watchdog(unsigned long data) | |
2228 | { | |
2229 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2230 | ||
2231 | /* Do the rest outside of interrupt context */ | |
2232 | schedule_work(&adapter->watchdog_task); | |
2233 | } | |
2234 | ||
2235 | static void | |
2236 | e1000_watchdog_task(struct e1000_adapter *adapter) | |
2237 | { | |
2238 | struct net_device *netdev = adapter->netdev; | |
545c67c0 | 2239 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
7e6c9861 | 2240 | uint32_t link, tctl; |
1da177e4 LT |
2241 | |
2242 | e1000_check_for_link(&adapter->hw); | |
2d7edb92 MC |
2243 | if (adapter->hw.mac_type == e1000_82573) { |
2244 | e1000_enable_tx_pkt_filtering(&adapter->hw); | |
96838a40 | 2245 | if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) |
2d7edb92 | 2246 | e1000_update_mng_vlan(adapter); |
96838a40 | 2247 | } |
1da177e4 | 2248 | |
96838a40 | 2249 | if ((adapter->hw.media_type == e1000_media_type_internal_serdes) && |
1da177e4 LT |
2250 | !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) |
2251 | link = !adapter->hw.serdes_link_down; | |
2252 | else | |
2253 | link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; | |
2254 | ||
96838a40 JB |
2255 | if (link) { |
2256 | if (!netif_carrier_ok(netdev)) { | |
fe7fe28e | 2257 | boolean_t txb2b = 1; |
1da177e4 LT |
2258 | e1000_get_speed_and_duplex(&adapter->hw, |
2259 | &adapter->link_speed, | |
2260 | &adapter->link_duplex); | |
2261 | ||
2262 | DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n", | |
2263 | adapter->link_speed, | |
2264 | adapter->link_duplex == FULL_DUPLEX ? | |
2265 | "Full Duplex" : "Half Duplex"); | |
2266 | ||
7e6c9861 JK |
2267 | /* tweak tx_queue_len according to speed/duplex |
2268 | * and adjust the timeout factor */ | |
66a2b0a3 JK |
2269 | netdev->tx_queue_len = adapter->tx_queue_len; |
2270 | adapter->tx_timeout_factor = 1; | |
7e6c9861 JK |
2271 | switch (adapter->link_speed) { |
2272 | case SPEED_10: | |
fe7fe28e | 2273 | txb2b = 0; |
7e6c9861 JK |
2274 | netdev->tx_queue_len = 10; |
2275 | adapter->tx_timeout_factor = 8; | |
2276 | break; | |
2277 | case SPEED_100: | |
fe7fe28e | 2278 | txb2b = 0; |
7e6c9861 JK |
2279 | netdev->tx_queue_len = 100; |
2280 | /* maybe add some timeout factor ? */ | |
2281 | break; | |
2282 | } | |
2283 | ||
fe7fe28e | 2284 | if ((adapter->hw.mac_type == e1000_82571 || |
7e6c9861 | 2285 | adapter->hw.mac_type == e1000_82572) && |
fe7fe28e | 2286 | txb2b == 0) { |
7e6c9861 JK |
2287 | #define SPEED_MODE_BIT (1 << 21) |
2288 | uint32_t tarc0; | |
2289 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); | |
2290 | tarc0 &= ~SPEED_MODE_BIT; | |
2291 | E1000_WRITE_REG(&adapter->hw, TARC0, tarc0); | |
2292 | } | |
2293 | ||
2294 | #ifdef NETIF_F_TSO | |
2295 | /* disable TSO for pcie and 10/100 speeds, to avoid | |
2296 | * some hardware issues */ | |
2297 | if (!adapter->tso_force && | |
2298 | adapter->hw.bus_type == e1000_bus_type_pci_express){ | |
66a2b0a3 JK |
2299 | switch (adapter->link_speed) { |
2300 | case SPEED_10: | |
66a2b0a3 | 2301 | case SPEED_100: |
7e6c9861 JK |
2302 | DPRINTK(PROBE,INFO, |
2303 | "10/100 speed: disabling TSO\n"); | |
2304 | netdev->features &= ~NETIF_F_TSO; | |
2305 | break; | |
2306 | case SPEED_1000: | |
2307 | netdev->features |= NETIF_F_TSO; | |
2308 | break; | |
2309 | default: | |
2310 | /* oops */ | |
66a2b0a3 JK |
2311 | break; |
2312 | } | |
2313 | } | |
7e6c9861 JK |
2314 | #endif |
2315 | ||
2316 | /* enable transmits in the hardware, need to do this | |
2317 | * after setting TARC0 */ | |
2318 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2319 | tctl |= E1000_TCTL_EN; | |
2320 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
66a2b0a3 | 2321 | |
1da177e4 LT |
2322 | netif_carrier_on(netdev); |
2323 | netif_wake_queue(netdev); | |
2324 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
2325 | adapter->smartspeed = 0; | |
2326 | } | |
2327 | } else { | |
96838a40 | 2328 | if (netif_carrier_ok(netdev)) { |
1da177e4 LT |
2329 | adapter->link_speed = 0; |
2330 | adapter->link_duplex = 0; | |
2331 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); | |
2332 | netif_carrier_off(netdev); | |
2333 | netif_stop_queue(netdev); | |
2334 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
87041639 JK |
2335 | |
2336 | /* 80003ES2LAN workaround-- | |
2337 | * For packet buffer work-around on link down event; | |
2338 | * disable receives in the ISR and | |
2339 | * reset device here in the watchdog | |
2340 | */ | |
2341 | if (adapter->hw.mac_type == e1000_80003es2lan) { | |
2342 | /* reset device */ | |
2343 | schedule_work(&adapter->reset_task); | |
2344 | } | |
1da177e4 LT |
2345 | } |
2346 | ||
2347 | e1000_smartspeed(adapter); | |
2348 | } | |
2349 | ||
2350 | e1000_update_stats(adapter); | |
2351 | ||
2352 | adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
2353 | adapter->tpt_old = adapter->stats.tpt; | |
2354 | adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; | |
2355 | adapter->colc_old = adapter->stats.colc; | |
2356 | ||
2357 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2358 | adapter->gorcl_old = adapter->stats.gorcl; | |
2359 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2360 | adapter->gotcl_old = adapter->stats.gotcl; | |
2361 | ||
2362 | e1000_update_adaptive(&adapter->hw); | |
2363 | ||
f56799ea | 2364 | if (!netif_carrier_ok(netdev)) { |
581d708e | 2365 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { |
1da177e4 LT |
2366 | /* We've lost link, so the controller stops DMA, |
2367 | * but we've got queued Tx work that's never going | |
2368 | * to get done, so reset controller to flush Tx. | |
2369 | * (Do the reset outside of interrupt context). */ | |
87041639 JK |
2370 | adapter->tx_timeout_count++; |
2371 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2372 | } |
2373 | } | |
2374 | ||
2375 | /* Dynamic mode for Interrupt Throttle Rate (ITR) */ | |
96838a40 | 2376 | if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) { |
1da177e4 LT |
2377 | /* Symmetric Tx/Rx gets a reduced ITR=2000; Total |
2378 | * asymmetrical Tx or Rx gets ITR=8000; everyone | |
2379 | * else is between 2000-8000. */ | |
2380 | uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000; | |
96838a40 | 2381 | uint32_t dif = (adapter->gotcl > adapter->gorcl ? |
1da177e4 LT |
2382 | adapter->gotcl - adapter->gorcl : |
2383 | adapter->gorcl - adapter->gotcl) / 10000; | |
2384 | uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; | |
2385 | E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256)); | |
2386 | } | |
2387 | ||
2388 | /* Cause software interrupt to ensure rx ring is cleaned */ | |
2389 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); | |
2390 | ||
2648345f | 2391 | /* Force detection of hung controller every watchdog period */ |
1da177e4 LT |
2392 | adapter->detect_tx_hung = TRUE; |
2393 | ||
96838a40 | 2394 | /* With 82571 controllers, LAA may be overwritten due to controller |
868d5309 MC |
2395 | * reset from the other port. Set the appropriate LAA in RAR[0] */ |
2396 | if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present) | |
2397 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2398 | ||
1da177e4 LT |
2399 | /* Reset the timer */ |
2400 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
2401 | } | |
2402 | ||
2403 | #define E1000_TX_FLAGS_CSUM 0x00000001 | |
2404 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2405 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2406 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
1da177e4 LT |
2407 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2408 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2409 | ||
e619d523 | 2410 | static int |
581d708e MC |
2411 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2412 | struct sk_buff *skb) | |
1da177e4 LT |
2413 | { |
2414 | #ifdef NETIF_F_TSO | |
2415 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2416 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2417 | unsigned int i; |
2418 | uint32_t cmd_length = 0; | |
2d7edb92 | 2419 | uint16_t ipcse = 0, tucse, mss; |
1da177e4 LT |
2420 | uint8_t ipcss, ipcso, tucss, tucso, hdr_len; |
2421 | int err; | |
2422 | ||
96838a40 | 2423 | if (skb_shinfo(skb)->tso_size) { |
1da177e4 LT |
2424 | if (skb_header_cloned(skb)) { |
2425 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2426 | if (err) | |
2427 | return err; | |
2428 | } | |
2429 | ||
2430 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
2431 | mss = skb_shinfo(skb)->tso_size; | |
96838a40 | 2432 | if (skb->protocol == ntohs(ETH_P_IP)) { |
2d7edb92 MC |
2433 | skb->nh.iph->tot_len = 0; |
2434 | skb->nh.iph->check = 0; | |
2435 | skb->h.th->check = | |
2436 | ~csum_tcpudp_magic(skb->nh.iph->saddr, | |
2437 | skb->nh.iph->daddr, | |
2438 | 0, | |
2439 | IPPROTO_TCP, | |
2440 | 0); | |
2441 | cmd_length = E1000_TXD_CMD_IP; | |
2442 | ipcse = skb->h.raw - skb->data - 1; | |
2443 | #ifdef NETIF_F_TSO_IPV6 | |
96838a40 | 2444 | } else if (skb->protocol == ntohs(ETH_P_IPV6)) { |
2d7edb92 MC |
2445 | skb->nh.ipv6h->payload_len = 0; |
2446 | skb->h.th->check = | |
2447 | ~csum_ipv6_magic(&skb->nh.ipv6h->saddr, | |
2448 | &skb->nh.ipv6h->daddr, | |
2449 | 0, | |
2450 | IPPROTO_TCP, | |
2451 | 0); | |
2452 | ipcse = 0; | |
2453 | #endif | |
2454 | } | |
1da177e4 LT |
2455 | ipcss = skb->nh.raw - skb->data; |
2456 | ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; | |
1da177e4 LT |
2457 | tucss = skb->h.raw - skb->data; |
2458 | tucso = (void *)&(skb->h.th->check) - (void *)skb->data; | |
2459 | tucse = 0; | |
2460 | ||
2461 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2462 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2463 | |
581d708e MC |
2464 | i = tx_ring->next_to_use; |
2465 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
545c67c0 | 2466 | buffer_info = &tx_ring->buffer_info[i]; |
1da177e4 LT |
2467 | |
2468 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2469 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2470 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2471 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2472 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2473 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2474 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2475 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2476 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2477 | ||
545c67c0 JK |
2478 | buffer_info->time_stamp = jiffies; |
2479 | ||
581d708e MC |
2480 | if (++i == tx_ring->count) i = 0; |
2481 | tx_ring->next_to_use = i; | |
1da177e4 | 2482 | |
8241e35e | 2483 | return TRUE; |
1da177e4 LT |
2484 | } |
2485 | #endif | |
2486 | ||
8241e35e | 2487 | return FALSE; |
1da177e4 LT |
2488 | } |
2489 | ||
e619d523 | 2490 | static boolean_t |
581d708e MC |
2491 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2492 | struct sk_buff *skb) | |
1da177e4 LT |
2493 | { |
2494 | struct e1000_context_desc *context_desc; | |
545c67c0 | 2495 | struct e1000_buffer *buffer_info; |
1da177e4 LT |
2496 | unsigned int i; |
2497 | uint8_t css; | |
2498 | ||
96838a40 | 2499 | if (likely(skb->ip_summed == CHECKSUM_HW)) { |
1da177e4 LT |
2500 | css = skb->h.raw - skb->data; |
2501 | ||
581d708e | 2502 | i = tx_ring->next_to_use; |
545c67c0 | 2503 | buffer_info = &tx_ring->buffer_info[i]; |
581d708e | 2504 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); |
1da177e4 LT |
2505 | |
2506 | context_desc->upper_setup.tcp_fields.tucss = css; | |
2507 | context_desc->upper_setup.tcp_fields.tucso = css + skb->csum; | |
2508 | context_desc->upper_setup.tcp_fields.tucse = 0; | |
2509 | context_desc->tcp_seg_setup.data = 0; | |
2510 | context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); | |
2511 | ||
545c67c0 JK |
2512 | buffer_info->time_stamp = jiffies; |
2513 | ||
581d708e MC |
2514 | if (unlikely(++i == tx_ring->count)) i = 0; |
2515 | tx_ring->next_to_use = i; | |
1da177e4 LT |
2516 | |
2517 | return TRUE; | |
2518 | } | |
2519 | ||
2520 | return FALSE; | |
2521 | } | |
2522 | ||
2523 | #define E1000_MAX_TXD_PWR 12 | |
2524 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2525 | ||
e619d523 | 2526 | static int |
581d708e MC |
2527 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2528 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, | |
2529 | unsigned int nr_frags, unsigned int mss) | |
1da177e4 | 2530 | { |
1da177e4 LT |
2531 | struct e1000_buffer *buffer_info; |
2532 | unsigned int len = skb->len; | |
2533 | unsigned int offset = 0, size, count = 0, i; | |
2534 | unsigned int f; | |
2535 | len -= skb->data_len; | |
2536 | ||
2537 | i = tx_ring->next_to_use; | |
2538 | ||
96838a40 | 2539 | while (len) { |
1da177e4 LT |
2540 | buffer_info = &tx_ring->buffer_info[i]; |
2541 | size = min(len, max_per_txd); | |
2542 | #ifdef NETIF_F_TSO | |
fd803241 JK |
2543 | /* Workaround for Controller erratum -- |
2544 | * descriptor for non-tso packet in a linear SKB that follows a | |
2545 | * tso gets written back prematurely before the data is fully | |
0f15a8fa | 2546 | * DMA'd to the controller */ |
fd803241 | 2547 | if (!skb->data_len && tx_ring->last_tx_tso && |
0f15a8fa | 2548 | !skb_shinfo(skb)->tso_size) { |
fd803241 JK |
2549 | tx_ring->last_tx_tso = 0; |
2550 | size -= 4; | |
2551 | } | |
2552 | ||
1da177e4 LT |
2553 | /* Workaround for premature desc write-backs |
2554 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2555 | if (unlikely(mss && !nr_frags && size == len && size > 8)) |
1da177e4 LT |
2556 | size -= 4; |
2557 | #endif | |
97338bde MC |
2558 | /* work-around for errata 10 and it applies |
2559 | * to all controllers in PCI-X mode | |
2560 | * The fix is to make sure that the first descriptor of a | |
2561 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
2562 | */ | |
96838a40 | 2563 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2564 | (size > 2015) && count == 0)) |
2565 | size = 2015; | |
96838a40 | 2566 | |
1da177e4 LT |
2567 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
2568 | * terminating buffers within evenly-aligned dwords. */ | |
96838a40 | 2569 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2570 | !((unsigned long)(skb->data + offset + size - 1) & 4) && |
2571 | size > 4)) | |
2572 | size -= 4; | |
2573 | ||
2574 | buffer_info->length = size; | |
2575 | buffer_info->dma = | |
2576 | pci_map_single(adapter->pdev, | |
2577 | skb->data + offset, | |
2578 | size, | |
2579 | PCI_DMA_TODEVICE); | |
2580 | buffer_info->time_stamp = jiffies; | |
2581 | ||
2582 | len -= size; | |
2583 | offset += size; | |
2584 | count++; | |
96838a40 | 2585 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2586 | } |
2587 | ||
96838a40 | 2588 | for (f = 0; f < nr_frags; f++) { |
1da177e4 LT |
2589 | struct skb_frag_struct *frag; |
2590 | ||
2591 | frag = &skb_shinfo(skb)->frags[f]; | |
2592 | len = frag->size; | |
2593 | offset = frag->page_offset; | |
2594 | ||
96838a40 | 2595 | while (len) { |
1da177e4 LT |
2596 | buffer_info = &tx_ring->buffer_info[i]; |
2597 | size = min(len, max_per_txd); | |
2598 | #ifdef NETIF_F_TSO | |
2599 | /* Workaround for premature desc write-backs | |
2600 | * in TSO mode. Append 4-byte sentinel desc */ | |
96838a40 | 2601 | if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) |
1da177e4 LT |
2602 | size -= 4; |
2603 | #endif | |
2604 | /* Workaround for potential 82544 hang in PCI-X. | |
2605 | * Avoid terminating buffers within evenly-aligned | |
2606 | * dwords. */ | |
96838a40 | 2607 | if (unlikely(adapter->pcix_82544 && |
1da177e4 LT |
2608 | !((unsigned long)(frag->page+offset+size-1) & 4) && |
2609 | size > 4)) | |
2610 | size -= 4; | |
2611 | ||
2612 | buffer_info->length = size; | |
2613 | buffer_info->dma = | |
2614 | pci_map_page(adapter->pdev, | |
2615 | frag->page, | |
2616 | offset, | |
2617 | size, | |
2618 | PCI_DMA_TODEVICE); | |
2619 | buffer_info->time_stamp = jiffies; | |
2620 | ||
2621 | len -= size; | |
2622 | offset += size; | |
2623 | count++; | |
96838a40 | 2624 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2625 | } |
2626 | } | |
2627 | ||
2628 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
2629 | tx_ring->buffer_info[i].skb = skb; | |
2630 | tx_ring->buffer_info[first].next_to_watch = i; | |
2631 | ||
2632 | return count; | |
2633 | } | |
2634 | ||
e619d523 | 2635 | static void |
581d708e MC |
2636 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2637 | int tx_flags, int count) | |
1da177e4 | 2638 | { |
1da177e4 LT |
2639 | struct e1000_tx_desc *tx_desc = NULL; |
2640 | struct e1000_buffer *buffer_info; | |
2641 | uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; | |
2642 | unsigned int i; | |
2643 | ||
96838a40 | 2644 | if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { |
1da177e4 LT |
2645 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | |
2646 | E1000_TXD_CMD_TSE; | |
2d7edb92 MC |
2647 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
2648 | ||
96838a40 | 2649 | if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) |
2d7edb92 | 2650 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; |
1da177e4 LT |
2651 | } |
2652 | ||
96838a40 | 2653 | if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { |
1da177e4 LT |
2654 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; |
2655 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
2656 | } | |
2657 | ||
96838a40 | 2658 | if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { |
1da177e4 LT |
2659 | txd_lower |= E1000_TXD_CMD_VLE; |
2660 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
2661 | } | |
2662 | ||
2663 | i = tx_ring->next_to_use; | |
2664 | ||
96838a40 | 2665 | while (count--) { |
1da177e4 LT |
2666 | buffer_info = &tx_ring->buffer_info[i]; |
2667 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
2668 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
2669 | tx_desc->lower.data = | |
2670 | cpu_to_le32(txd_lower | buffer_info->length); | |
2671 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
96838a40 | 2672 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 LT |
2673 | } |
2674 | ||
2675 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
2676 | ||
2677 | /* Force memory writes to complete before letting h/w | |
2678 | * know there are new descriptors to fetch. (Only | |
2679 | * applicable for weak-ordered memory model archs, | |
2680 | * such as IA-64). */ | |
2681 | wmb(); | |
2682 | ||
2683 | tx_ring->next_to_use = i; | |
581d708e | 2684 | writel(i, adapter->hw.hw_addr + tx_ring->tdt); |
1da177e4 LT |
2685 | } |
2686 | ||
2687 | /** | |
2688 | * 82547 workaround to avoid controller hang in half-duplex environment. | |
2689 | * The workaround is to avoid queuing a large packet that would span | |
2690 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
2691 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
2692 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
2693 | * to the beginning of the Tx FIFO. | |
2694 | **/ | |
2695 | ||
2696 | #define E1000_FIFO_HDR 0x10 | |
2697 | #define E1000_82547_PAD_LEN 0x3E0 | |
2698 | ||
e619d523 | 2699 | static int |
1da177e4 LT |
2700 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) |
2701 | { | |
2702 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; | |
2703 | uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
2704 | ||
2705 | E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR); | |
2706 | ||
96838a40 | 2707 | if (adapter->link_duplex != HALF_DUPLEX) |
1da177e4 LT |
2708 | goto no_fifo_stall_required; |
2709 | ||
96838a40 | 2710 | if (atomic_read(&adapter->tx_fifo_stall)) |
1da177e4 LT |
2711 | return 1; |
2712 | ||
96838a40 | 2713 | if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { |
1da177e4 LT |
2714 | atomic_set(&adapter->tx_fifo_stall, 1); |
2715 | return 1; | |
2716 | } | |
2717 | ||
2718 | no_fifo_stall_required: | |
2719 | adapter->tx_fifo_head += skb_fifo_len; | |
96838a40 | 2720 | if (adapter->tx_fifo_head >= adapter->tx_fifo_size) |
1da177e4 LT |
2721 | adapter->tx_fifo_head -= adapter->tx_fifo_size; |
2722 | return 0; | |
2723 | } | |
2724 | ||
2d7edb92 | 2725 | #define MINIMUM_DHCP_PACKET_SIZE 282 |
e619d523 | 2726 | static int |
2d7edb92 MC |
2727 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) |
2728 | { | |
2729 | struct e1000_hw *hw = &adapter->hw; | |
2730 | uint16_t length, offset; | |
96838a40 JB |
2731 | if (vlan_tx_tag_present(skb)) { |
2732 | if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && | |
2d7edb92 MC |
2733 | ( adapter->hw.mng_cookie.status & |
2734 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) | |
2735 | return 0; | |
2736 | } | |
20a44028 | 2737 | if (skb->len > MINIMUM_DHCP_PACKET_SIZE) { |
2d7edb92 | 2738 | struct ethhdr *eth = (struct ethhdr *) skb->data; |
96838a40 JB |
2739 | if ((htons(ETH_P_IP) == eth->h_proto)) { |
2740 | const struct iphdr *ip = | |
2d7edb92 | 2741 | (struct iphdr *)((uint8_t *)skb->data+14); |
96838a40 JB |
2742 | if (IPPROTO_UDP == ip->protocol) { |
2743 | struct udphdr *udp = | |
2744 | (struct udphdr *)((uint8_t *)ip + | |
2d7edb92 | 2745 | (ip->ihl << 2)); |
96838a40 | 2746 | if (ntohs(udp->dest) == 67) { |
2d7edb92 MC |
2747 | offset = (uint8_t *)udp + 8 - skb->data; |
2748 | length = skb->len - offset; | |
2749 | ||
2750 | return e1000_mng_write_dhcp_info(hw, | |
96838a40 | 2751 | (uint8_t *)udp + 8, |
2d7edb92 MC |
2752 | length); |
2753 | } | |
2754 | } | |
2755 | } | |
2756 | } | |
2757 | return 0; | |
2758 | } | |
2759 | ||
1da177e4 LT |
2760 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
2761 | static int | |
2762 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
2763 | { | |
60490fe0 | 2764 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e | 2765 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
2766 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
2767 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
2768 | unsigned int tx_flags = 0; | |
2769 | unsigned int len = skb->len; | |
2770 | unsigned long flags; | |
2771 | unsigned int nr_frags = 0; | |
2772 | unsigned int mss = 0; | |
2773 | int count = 0; | |
96838a40 | 2774 | int tso; |
1da177e4 LT |
2775 | unsigned int f; |
2776 | len -= skb->data_len; | |
2777 | ||
581d708e | 2778 | tx_ring = adapter->tx_ring; |
24025e4e | 2779 | |
581d708e | 2780 | if (unlikely(skb->len <= 0)) { |
1da177e4 LT |
2781 | dev_kfree_skb_any(skb); |
2782 | return NETDEV_TX_OK; | |
2783 | } | |
2784 | ||
2785 | #ifdef NETIF_F_TSO | |
2786 | mss = skb_shinfo(skb)->tso_size; | |
2648345f | 2787 | /* The controller does a simple calculation to |
1da177e4 LT |
2788 | * make sure there is enough room in the FIFO before |
2789 | * initiating the DMA for each buffer. The calc is: | |
2790 | * 4 = ceil(buffer len/mss). To make sure we don't | |
2791 | * overrun the FIFO, adjust the max buffer len if mss | |
2792 | * drops. */ | |
96838a40 | 2793 | if (mss) { |
9a3056da | 2794 | uint8_t hdr_len; |
1da177e4 LT |
2795 | max_per_txd = min(mss << 2, max_per_txd); |
2796 | max_txd_pwr = fls(max_per_txd) - 1; | |
9a3056da | 2797 | |
9f687888 | 2798 | /* TSO Workaround for 82571/2/3 Controllers -- if skb->data |
9a3056da JK |
2799 | * points to just header, pull a few bytes of payload from |
2800 | * frags into skb->data */ | |
2801 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
9f687888 JK |
2802 | if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) { |
2803 | switch (adapter->hw.mac_type) { | |
2804 | unsigned int pull_size; | |
2805 | case e1000_82571: | |
2806 | case e1000_82572: | |
2807 | case e1000_82573: | |
2808 | pull_size = min((unsigned int)4, skb->data_len); | |
2809 | if (!__pskb_pull_tail(skb, pull_size)) { | |
2810 | printk(KERN_ERR | |
2811 | "__pskb_pull_tail failed.\n"); | |
2812 | dev_kfree_skb_any(skb); | |
749dfc70 | 2813 | return NETDEV_TX_OK; |
9f687888 JK |
2814 | } |
2815 | len = skb->len - skb->data_len; | |
2816 | break; | |
2817 | default: | |
2818 | /* do nothing */ | |
2819 | break; | |
d74bbd3b | 2820 | } |
9a3056da | 2821 | } |
1da177e4 LT |
2822 | } |
2823 | ||
9a3056da | 2824 | /* reserve a descriptor for the offload context */ |
96838a40 | 2825 | if ((mss) || (skb->ip_summed == CHECKSUM_HW)) |
1da177e4 | 2826 | count++; |
2648345f | 2827 | count++; |
1da177e4 | 2828 | #else |
96838a40 | 2829 | if (skb->ip_summed == CHECKSUM_HW) |
1da177e4 LT |
2830 | count++; |
2831 | #endif | |
fd803241 JK |
2832 | |
2833 | #ifdef NETIF_F_TSO | |
2834 | /* Controller Erratum workaround */ | |
2835 | if (!skb->data_len && tx_ring->last_tx_tso && | |
0f15a8fa | 2836 | !skb_shinfo(skb)->tso_size) |
fd803241 JK |
2837 | count++; |
2838 | #endif | |
2839 | ||
1da177e4 LT |
2840 | count += TXD_USE_COUNT(len, max_txd_pwr); |
2841 | ||
96838a40 | 2842 | if (adapter->pcix_82544) |
1da177e4 LT |
2843 | count++; |
2844 | ||
96838a40 | 2845 | /* work-around for errata 10 and it applies to all controllers |
97338bde MC |
2846 | * in PCI-X mode, so add one more descriptor to the count |
2847 | */ | |
96838a40 | 2848 | if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && |
97338bde MC |
2849 | (len > 2015))) |
2850 | count++; | |
2851 | ||
1da177e4 | 2852 | nr_frags = skb_shinfo(skb)->nr_frags; |
96838a40 | 2853 | for (f = 0; f < nr_frags; f++) |
1da177e4 LT |
2854 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, |
2855 | max_txd_pwr); | |
96838a40 | 2856 | if (adapter->pcix_82544) |
1da177e4 LT |
2857 | count += nr_frags; |
2858 | ||
0f15a8fa JK |
2859 | |
2860 | if (adapter->hw.tx_pkt_filtering && | |
2861 | (adapter->hw.mac_type == e1000_82573)) | |
2d7edb92 MC |
2862 | e1000_transfer_dhcp_info(adapter, skb); |
2863 | ||
581d708e MC |
2864 | local_irq_save(flags); |
2865 | if (!spin_trylock(&tx_ring->tx_lock)) { | |
2866 | /* Collision - tell upper layer to requeue */ | |
2867 | local_irq_restore(flags); | |
2868 | return NETDEV_TX_LOCKED; | |
2869 | } | |
1da177e4 LT |
2870 | |
2871 | /* need: count + 2 desc gap to keep tail from touching | |
2872 | * head, otherwise try next time */ | |
581d708e | 2873 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) { |
1da177e4 | 2874 | netif_stop_queue(netdev); |
581d708e | 2875 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2876 | return NETDEV_TX_BUSY; |
2877 | } | |
2878 | ||
96838a40 JB |
2879 | if (unlikely(adapter->hw.mac_type == e1000_82547)) { |
2880 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { | |
1da177e4 LT |
2881 | netif_stop_queue(netdev); |
2882 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies); | |
581d708e | 2883 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2884 | return NETDEV_TX_BUSY; |
2885 | } | |
2886 | } | |
2887 | ||
96838a40 | 2888 | if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { |
1da177e4 LT |
2889 | tx_flags |= E1000_TX_FLAGS_VLAN; |
2890 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
2891 | } | |
2892 | ||
581d708e | 2893 | first = tx_ring->next_to_use; |
96838a40 | 2894 | |
581d708e | 2895 | tso = e1000_tso(adapter, tx_ring, skb); |
1da177e4 LT |
2896 | if (tso < 0) { |
2897 | dev_kfree_skb_any(skb); | |
581d708e | 2898 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2899 | return NETDEV_TX_OK; |
2900 | } | |
2901 | ||
fd803241 JK |
2902 | if (likely(tso)) { |
2903 | tx_ring->last_tx_tso = 1; | |
1da177e4 | 2904 | tx_flags |= E1000_TX_FLAGS_TSO; |
fd803241 | 2905 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) |
1da177e4 LT |
2906 | tx_flags |= E1000_TX_FLAGS_CSUM; |
2907 | ||
2d7edb92 | 2908 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
868d5309 | 2909 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
2d7edb92 | 2910 | * no longer assume, we must. */ |
581d708e | 2911 | if (likely(skb->protocol == ntohs(ETH_P_IP))) |
2d7edb92 MC |
2912 | tx_flags |= E1000_TX_FLAGS_IPV4; |
2913 | ||
581d708e MC |
2914 | e1000_tx_queue(adapter, tx_ring, tx_flags, |
2915 | e1000_tx_map(adapter, tx_ring, skb, first, | |
2916 | max_per_txd, nr_frags, mss)); | |
1da177e4 LT |
2917 | |
2918 | netdev->trans_start = jiffies; | |
2919 | ||
2920 | /* Make sure there is space in the ring for the next send. */ | |
581d708e | 2921 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2)) |
1da177e4 LT |
2922 | netif_stop_queue(netdev); |
2923 | ||
581d708e | 2924 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2925 | return NETDEV_TX_OK; |
2926 | } | |
2927 | ||
2928 | /** | |
2929 | * e1000_tx_timeout - Respond to a Tx Hang | |
2930 | * @netdev: network interface device structure | |
2931 | **/ | |
2932 | ||
2933 | static void | |
2934 | e1000_tx_timeout(struct net_device *netdev) | |
2935 | { | |
60490fe0 | 2936 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2937 | |
2938 | /* Do the reset outside of interrupt context */ | |
87041639 JK |
2939 | adapter->tx_timeout_count++; |
2940 | schedule_work(&adapter->reset_task); | |
1da177e4 LT |
2941 | } |
2942 | ||
2943 | static void | |
87041639 | 2944 | e1000_reset_task(struct net_device *netdev) |
1da177e4 | 2945 | { |
60490fe0 | 2946 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2947 | |
2948 | e1000_down(adapter); | |
2949 | e1000_up(adapter); | |
2950 | } | |
2951 | ||
2952 | /** | |
2953 | * e1000_get_stats - Get System Network Statistics | |
2954 | * @netdev: network interface device structure | |
2955 | * | |
2956 | * Returns the address of the device statistics structure. | |
2957 | * The statistics are actually updated from the timer callback. | |
2958 | **/ | |
2959 | ||
2960 | static struct net_device_stats * | |
2961 | e1000_get_stats(struct net_device *netdev) | |
2962 | { | |
60490fe0 | 2963 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 2964 | |
6b7660cd | 2965 | /* only return the current stats */ |
1da177e4 LT |
2966 | return &adapter->net_stats; |
2967 | } | |
2968 | ||
2969 | /** | |
2970 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
2971 | * @netdev: network interface device structure | |
2972 | * @new_mtu: new value for maximum frame size | |
2973 | * | |
2974 | * Returns 0 on success, negative on failure | |
2975 | **/ | |
2976 | ||
2977 | static int | |
2978 | e1000_change_mtu(struct net_device *netdev, int new_mtu) | |
2979 | { | |
60490fe0 | 2980 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 2981 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
85b22eb6 | 2982 | uint16_t eeprom_data = 0; |
1da177e4 | 2983 | |
96838a40 JB |
2984 | if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
2985 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
2986 | DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); | |
1da177e4 | 2987 | return -EINVAL; |
2d7edb92 | 2988 | } |
1da177e4 | 2989 | |
997f5cbd JK |
2990 | /* Adapter-specific max frame size limits. */ |
2991 | switch (adapter->hw.mac_type) { | |
9e2feace | 2992 | case e1000_undefined ... e1000_82542_rev2_1: |
997f5cbd JK |
2993 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
2994 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); | |
2d7edb92 | 2995 | return -EINVAL; |
2d7edb92 | 2996 | } |
997f5cbd | 2997 | break; |
85b22eb6 JK |
2998 | case e1000_82573: |
2999 | /* only enable jumbo frames if ASPM is disabled completely | |
3000 | * this means both bits must be zero in 0x1A bits 3:2 */ | |
3001 | e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, | |
3002 | &eeprom_data); | |
3003 | if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) { | |
3004 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { | |
3005 | DPRINTK(PROBE, ERR, | |
3006 | "Jumbo Frames not supported.\n"); | |
3007 | return -EINVAL; | |
3008 | } | |
3009 | break; | |
3010 | } | |
3011 | /* fall through to get support */ | |
997f5cbd JK |
3012 | case e1000_82571: |
3013 | case e1000_82572: | |
87041639 | 3014 | case e1000_80003es2lan: |
997f5cbd JK |
3015 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
3016 | if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { | |
3017 | DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n"); | |
3018 | return -EINVAL; | |
3019 | } | |
3020 | break; | |
3021 | default: | |
3022 | /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ | |
3023 | break; | |
1da177e4 LT |
3024 | } |
3025 | ||
9e2feace AK |
3026 | /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
3027 | * means we reserve 2 more, this pushes us to allocate from the next | |
3028 | * larger slab size | |
3029 | * i.e. RXBUFFER_2048 --> size-4096 slab */ | |
3030 | ||
3031 | if (max_frame <= E1000_RXBUFFER_256) | |
3032 | adapter->rx_buffer_len = E1000_RXBUFFER_256; | |
3033 | else if (max_frame <= E1000_RXBUFFER_512) | |
3034 | adapter->rx_buffer_len = E1000_RXBUFFER_512; | |
3035 | else if (max_frame <= E1000_RXBUFFER_1024) | |
3036 | adapter->rx_buffer_len = E1000_RXBUFFER_1024; | |
3037 | else if (max_frame <= E1000_RXBUFFER_2048) | |
3038 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | |
3039 | else if (max_frame <= E1000_RXBUFFER_4096) | |
3040 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; | |
3041 | else if (max_frame <= E1000_RXBUFFER_8192) | |
3042 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; | |
3043 | else if (max_frame <= E1000_RXBUFFER_16384) | |
3044 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; | |
3045 | ||
3046 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
3047 | #define MAXIMUM_ETHERNET_VLAN_SIZE 1522 | |
3048 | if (!adapter->hw.tbi_compatibility_on && | |
3049 | ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) || | |
3050 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) | |
3051 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
997f5cbd | 3052 | |
2d7edb92 MC |
3053 | netdev->mtu = new_mtu; |
3054 | ||
96838a40 | 3055 | if (netif_running(netdev)) { |
1da177e4 LT |
3056 | e1000_down(adapter); |
3057 | e1000_up(adapter); | |
3058 | } | |
3059 | ||
1da177e4 LT |
3060 | adapter->hw.max_frame_size = max_frame; |
3061 | ||
3062 | return 0; | |
3063 | } | |
3064 | ||
3065 | /** | |
3066 | * e1000_update_stats - Update the board statistics counters | |
3067 | * @adapter: board private structure | |
3068 | **/ | |
3069 | ||
3070 | void | |
3071 | e1000_update_stats(struct e1000_adapter *adapter) | |
3072 | { | |
3073 | struct e1000_hw *hw = &adapter->hw; | |
3074 | unsigned long flags; | |
3075 | uint16_t phy_tmp; | |
3076 | ||
3077 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
3078 | ||
3079 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
3080 | ||
3081 | /* these counters are modified from e1000_adjust_tbi_stats, | |
3082 | * called from the interrupt context, so they must only | |
3083 | * be written while holding adapter->stats_lock | |
3084 | */ | |
3085 | ||
3086 | adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); | |
3087 | adapter->stats.gprc += E1000_READ_REG(hw, GPRC); | |
3088 | adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); | |
3089 | adapter->stats.gorch += E1000_READ_REG(hw, GORCH); | |
3090 | adapter->stats.bprc += E1000_READ_REG(hw, BPRC); | |
3091 | adapter->stats.mprc += E1000_READ_REG(hw, MPRC); | |
3092 | adapter->stats.roc += E1000_READ_REG(hw, ROC); | |
3093 | adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); | |
3094 | adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); | |
3095 | adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); | |
3096 | adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); | |
3097 | adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); | |
3098 | adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); | |
3099 | ||
3100 | adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); | |
3101 | adapter->stats.mpc += E1000_READ_REG(hw, MPC); | |
3102 | adapter->stats.scc += E1000_READ_REG(hw, SCC); | |
3103 | adapter->stats.ecol += E1000_READ_REG(hw, ECOL); | |
3104 | adapter->stats.mcc += E1000_READ_REG(hw, MCC); | |
3105 | adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); | |
3106 | adapter->stats.dc += E1000_READ_REG(hw, DC); | |
3107 | adapter->stats.sec += E1000_READ_REG(hw, SEC); | |
3108 | adapter->stats.rlec += E1000_READ_REG(hw, RLEC); | |
3109 | adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); | |
3110 | adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); | |
3111 | adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); | |
3112 | adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); | |
3113 | adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); | |
3114 | adapter->stats.gptc += E1000_READ_REG(hw, GPTC); | |
3115 | adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); | |
3116 | adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); | |
3117 | adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); | |
3118 | adapter->stats.ruc += E1000_READ_REG(hw, RUC); | |
3119 | adapter->stats.rfc += E1000_READ_REG(hw, RFC); | |
3120 | adapter->stats.rjc += E1000_READ_REG(hw, RJC); | |
3121 | adapter->stats.torl += E1000_READ_REG(hw, TORL); | |
3122 | adapter->stats.torh += E1000_READ_REG(hw, TORH); | |
3123 | adapter->stats.totl += E1000_READ_REG(hw, TOTL); | |
3124 | adapter->stats.toth += E1000_READ_REG(hw, TOTH); | |
3125 | adapter->stats.tpr += E1000_READ_REG(hw, TPR); | |
3126 | adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); | |
3127 | adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); | |
3128 | adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); | |
3129 | adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); | |
3130 | adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); | |
3131 | adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); | |
3132 | adapter->stats.mptc += E1000_READ_REG(hw, MPTC); | |
3133 | adapter->stats.bptc += E1000_READ_REG(hw, BPTC); | |
3134 | ||
3135 | /* used for adaptive IFS */ | |
3136 | ||
3137 | hw->tx_packet_delta = E1000_READ_REG(hw, TPT); | |
3138 | adapter->stats.tpt += hw->tx_packet_delta; | |
3139 | hw->collision_delta = E1000_READ_REG(hw, COLC); | |
3140 | adapter->stats.colc += hw->collision_delta; | |
3141 | ||
96838a40 | 3142 | if (hw->mac_type >= e1000_82543) { |
1da177e4 LT |
3143 | adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); |
3144 | adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); | |
3145 | adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); | |
3146 | adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); | |
3147 | adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); | |
3148 | adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); | |
3149 | } | |
96838a40 | 3150 | if (hw->mac_type > e1000_82547_rev_2) { |
2d7edb92 MC |
3151 | adapter->stats.iac += E1000_READ_REG(hw, IAC); |
3152 | adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); | |
3153 | adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); | |
3154 | adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); | |
3155 | adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); | |
3156 | adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); | |
3157 | adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); | |
3158 | adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); | |
3159 | adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); | |
3160 | } | |
1da177e4 LT |
3161 | |
3162 | /* Fill out the OS statistics structure */ | |
3163 | ||
3164 | adapter->net_stats.rx_packets = adapter->stats.gprc; | |
3165 | adapter->net_stats.tx_packets = adapter->stats.gptc; | |
3166 | adapter->net_stats.rx_bytes = adapter->stats.gorcl; | |
3167 | adapter->net_stats.tx_bytes = adapter->stats.gotcl; | |
3168 | adapter->net_stats.multicast = adapter->stats.mprc; | |
3169 | adapter->net_stats.collisions = adapter->stats.colc; | |
3170 | ||
3171 | /* Rx Errors */ | |
3172 | ||
87041639 JK |
3173 | /* RLEC on some newer hardware can be incorrect so build |
3174 | * our own version based on RUC and ROC */ | |
1da177e4 LT |
3175 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + |
3176 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
87041639 JK |
3177 | adapter->stats.ruc + adapter->stats.roc + |
3178 | adapter->stats.cexterr; | |
87041639 JK |
3179 | adapter->net_stats.rx_length_errors = adapter->stats.ruc + |
3180 | adapter->stats.roc; | |
1da177e4 LT |
3181 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
3182 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | |
1da177e4 LT |
3183 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; |
3184 | ||
3185 | /* Tx Errors */ | |
3186 | ||
3187 | adapter->net_stats.tx_errors = adapter->stats.ecol + | |
3188 | adapter->stats.latecol; | |
3189 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; | |
3190 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | |
3191 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | |
3192 | ||
3193 | /* Tx Dropped needs to be maintained elsewhere */ | |
3194 | ||
3195 | /* Phy Stats */ | |
3196 | ||
96838a40 JB |
3197 | if (hw->media_type == e1000_media_type_copper) { |
3198 | if ((adapter->link_speed == SPEED_1000) && | |
1da177e4 LT |
3199 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { |
3200 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3201 | adapter->phy_stats.idle_errors += phy_tmp; | |
3202 | } | |
3203 | ||
96838a40 | 3204 | if ((hw->mac_type <= e1000_82546) && |
1da177e4 LT |
3205 | (hw->phy_type == e1000_phy_m88) && |
3206 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3207 | adapter->phy_stats.receive_errors += phy_tmp; | |
3208 | } | |
3209 | ||
3210 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
3211 | } | |
3212 | ||
3213 | /** | |
3214 | * e1000_intr - Interrupt Handler | |
3215 | * @irq: interrupt number | |
3216 | * @data: pointer to a network interface device structure | |
3217 | * @pt_regs: CPU registers structure | |
3218 | **/ | |
3219 | ||
3220 | static irqreturn_t | |
3221 | e1000_intr(int irq, void *data, struct pt_regs *regs) | |
3222 | { | |
3223 | struct net_device *netdev = data; | |
60490fe0 | 3224 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 3225 | struct e1000_hw *hw = &adapter->hw; |
87041639 | 3226 | uint32_t rctl, icr = E1000_READ_REG(hw, ICR); |
1e613fd9 | 3227 | #ifndef CONFIG_E1000_NAPI |
581d708e | 3228 | int i; |
1e613fd9 JK |
3229 | #else |
3230 | /* Interrupt Auto-Mask...upon reading ICR, | |
3231 | * interrupts are masked. No need for the | |
3232 | * IMC write, but it does mean we should | |
3233 | * account for it ASAP. */ | |
3234 | if (likely(hw->mac_type >= e1000_82571)) | |
3235 | atomic_inc(&adapter->irq_sem); | |
be2b28ed | 3236 | #endif |
1da177e4 | 3237 | |
1e613fd9 JK |
3238 | if (unlikely(!icr)) { |
3239 | #ifdef CONFIG_E1000_NAPI | |
3240 | if (hw->mac_type >= e1000_82571) | |
3241 | e1000_irq_enable(adapter); | |
3242 | #endif | |
1da177e4 | 3243 | return IRQ_NONE; /* Not our interrupt */ |
1e613fd9 | 3244 | } |
1da177e4 | 3245 | |
96838a40 | 3246 | if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
1da177e4 | 3247 | hw->get_link_status = 1; |
87041639 JK |
3248 | /* 80003ES2LAN workaround-- |
3249 | * For packet buffer work-around on link down event; | |
3250 | * disable receives here in the ISR and | |
3251 | * reset adapter in watchdog | |
3252 | */ | |
3253 | if (netif_carrier_ok(netdev) && | |
3254 | (adapter->hw.mac_type == e1000_80003es2lan)) { | |
3255 | /* disable receives */ | |
3256 | rctl = E1000_READ_REG(hw, RCTL); | |
3257 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
3258 | } | |
1da177e4 LT |
3259 | mod_timer(&adapter->watchdog_timer, jiffies); |
3260 | } | |
3261 | ||
3262 | #ifdef CONFIG_E1000_NAPI | |
1e613fd9 JK |
3263 | if (unlikely(hw->mac_type < e1000_82571)) { |
3264 | atomic_inc(&adapter->irq_sem); | |
3265 | E1000_WRITE_REG(hw, IMC, ~0); | |
3266 | E1000_WRITE_FLUSH(hw); | |
3267 | } | |
581d708e MC |
3268 | if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0]))) |
3269 | __netif_rx_schedule(&adapter->polling_netdev[0]); | |
3270 | else | |
3271 | e1000_irq_enable(adapter); | |
c1605eb3 | 3272 | #else |
1da177e4 | 3273 | /* Writing IMC and IMS is needed for 82547. |
96838a40 JB |
3274 | * Due to Hub Link bus being occupied, an interrupt |
3275 | * de-assertion message is not able to be sent. | |
3276 | * When an interrupt assertion message is generated later, | |
3277 | * two messages are re-ordered and sent out. | |
3278 | * That causes APIC to think 82547 is in de-assertion | |
3279 | * state, while 82547 is in assertion state, resulting | |
3280 | * in dead lock. Writing IMC forces 82547 into | |
3281 | * de-assertion state. | |
3282 | */ | |
3283 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) { | |
1da177e4 | 3284 | atomic_inc(&adapter->irq_sem); |
2648345f | 3285 | E1000_WRITE_REG(hw, IMC, ~0); |
1da177e4 LT |
3286 | } |
3287 | ||
96838a40 JB |
3288 | for (i = 0; i < E1000_MAX_INTR; i++) |
3289 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | |
581d708e | 3290 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) |
1da177e4 LT |
3291 | break; |
3292 | ||
96838a40 | 3293 | if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) |
1da177e4 | 3294 | e1000_irq_enable(adapter); |
581d708e | 3295 | |
c1605eb3 | 3296 | #endif |
1da177e4 LT |
3297 | |
3298 | return IRQ_HANDLED; | |
3299 | } | |
3300 | ||
3301 | #ifdef CONFIG_E1000_NAPI | |
3302 | /** | |
3303 | * e1000_clean - NAPI Rx polling callback | |
3304 | * @adapter: board private structure | |
3305 | **/ | |
3306 | ||
3307 | static int | |
581d708e | 3308 | e1000_clean(struct net_device *poll_dev, int *budget) |
1da177e4 | 3309 | { |
581d708e MC |
3310 | struct e1000_adapter *adapter; |
3311 | int work_to_do = min(*budget, poll_dev->quota); | |
38bd3b26 | 3312 | int tx_cleaned = 0, i = 0, work_done = 0; |
581d708e MC |
3313 | |
3314 | /* Must NOT use netdev_priv macro here. */ | |
3315 | adapter = poll_dev->priv; | |
3316 | ||
3317 | /* Keep link state information with original netdev */ | |
3318 | if (!netif_carrier_ok(adapter->netdev)) | |
3319 | goto quit_polling; | |
2648345f | 3320 | |
581d708e MC |
3321 | while (poll_dev != &adapter->polling_netdev[i]) { |
3322 | i++; | |
5d9428de | 3323 | BUG_ON(i == adapter->num_rx_queues); |
581d708e MC |
3324 | } |
3325 | ||
8241e35e JK |
3326 | if (likely(adapter->num_tx_queues == 1)) { |
3327 | /* e1000_clean is called per-cpu. This lock protects | |
3328 | * tx_ring[0] from being cleaned by multiple cpus | |
3329 | * simultaneously. A failure obtaining the lock means | |
3330 | * tx_ring[0] is currently being cleaned anyway. */ | |
3331 | if (spin_trylock(&adapter->tx_queue_lock)) { | |
3332 | tx_cleaned = e1000_clean_tx_irq(adapter, | |
3333 | &adapter->tx_ring[0]); | |
3334 | spin_unlock(&adapter->tx_queue_lock); | |
3335 | } | |
3336 | } else | |
3337 | tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]); | |
3338 | ||
581d708e MC |
3339 | adapter->clean_rx(adapter, &adapter->rx_ring[i], |
3340 | &work_done, work_to_do); | |
1da177e4 LT |
3341 | |
3342 | *budget -= work_done; | |
581d708e | 3343 | poll_dev->quota -= work_done; |
96838a40 | 3344 | |
2b02893e | 3345 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
96838a40 | 3346 | if ((!tx_cleaned && (work_done == 0)) || |
581d708e MC |
3347 | !netif_running(adapter->netdev)) { |
3348 | quit_polling: | |
3349 | netif_rx_complete(poll_dev); | |
1da177e4 LT |
3350 | e1000_irq_enable(adapter); |
3351 | return 0; | |
3352 | } | |
3353 | ||
3354 | return 1; | |
3355 | } | |
3356 | ||
3357 | #endif | |
3358 | /** | |
3359 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3360 | * @adapter: board private structure | |
3361 | **/ | |
3362 | ||
3363 | static boolean_t | |
581d708e MC |
3364 | e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3365 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3366 | { |
1da177e4 LT |
3367 | struct net_device *netdev = adapter->netdev; |
3368 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
3369 | struct e1000_buffer *buffer_info; | |
3370 | unsigned int i, eop; | |
2a1af5d7 JK |
3371 | #ifdef CONFIG_E1000_NAPI |
3372 | unsigned int count = 0; | |
3373 | #endif | |
1da177e4 LT |
3374 | boolean_t cleaned = FALSE; |
3375 | ||
3376 | i = tx_ring->next_to_clean; | |
3377 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3378 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3379 | ||
581d708e | 3380 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { |
96838a40 | 3381 | for (cleaned = FALSE; !cleaned; ) { |
1da177e4 LT |
3382 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
3383 | buffer_info = &tx_ring->buffer_info[i]; | |
3384 | cleaned = (i == eop); | |
3385 | ||
fd803241 | 3386 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); |
8241e35e | 3387 | memset(tx_desc, 0, sizeof(struct e1000_tx_desc)); |
1da177e4 | 3388 | |
96838a40 | 3389 | if (unlikely(++i == tx_ring->count)) i = 0; |
1da177e4 | 3390 | } |
581d708e | 3391 | |
7bfa4816 | 3392 | |
1da177e4 LT |
3393 | eop = tx_ring->buffer_info[i].next_to_watch; |
3394 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
2a1af5d7 JK |
3395 | #ifdef CONFIG_E1000_NAPI |
3396 | #define E1000_TX_WEIGHT 64 | |
3397 | /* weight of a sort for tx, to avoid endless transmit cleanup */ | |
3398 | if (count++ == E1000_TX_WEIGHT) break; | |
3399 | #endif | |
1da177e4 LT |
3400 | } |
3401 | ||
3402 | tx_ring->next_to_clean = i; | |
3403 | ||
77b2aad5 | 3404 | #define TX_WAKE_THRESHOLD 32 |
96838a40 | 3405 | if (unlikely(cleaned && netif_queue_stopped(netdev) && |
77b2aad5 AK |
3406 | netif_carrier_ok(netdev))) { |
3407 | spin_lock(&tx_ring->tx_lock); | |
3408 | if (netif_queue_stopped(netdev) && | |
3409 | (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) | |
3410 | netif_wake_queue(netdev); | |
3411 | spin_unlock(&tx_ring->tx_lock); | |
3412 | } | |
2648345f | 3413 | |
581d708e | 3414 | if (adapter->detect_tx_hung) { |
2648345f | 3415 | /* Detect a transmit hang in hardware, this serializes the |
1da177e4 LT |
3416 | * check with the clearing of time_stamp and movement of i */ |
3417 | adapter->detect_tx_hung = FALSE; | |
392137fa JK |
3418 | if (tx_ring->buffer_info[eop].dma && |
3419 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | |
7e6c9861 | 3420 | (adapter->tx_timeout_factor * HZ)) |
70b8f1e1 | 3421 | && !(E1000_READ_REG(&adapter->hw, STATUS) & |
392137fa | 3422 | E1000_STATUS_TXOFF)) { |
70b8f1e1 MC |
3423 | |
3424 | /* detected Tx unit hang */ | |
c6963ef5 | 3425 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" |
7bfa4816 | 3426 | " Tx Queue <%lu>\n" |
70b8f1e1 MC |
3427 | " TDH <%x>\n" |
3428 | " TDT <%x>\n" | |
3429 | " next_to_use <%x>\n" | |
3430 | " next_to_clean <%x>\n" | |
3431 | "buffer_info[next_to_clean]\n" | |
70b8f1e1 MC |
3432 | " time_stamp <%lx>\n" |
3433 | " next_to_watch <%x>\n" | |
3434 | " jiffies <%lx>\n" | |
3435 | " next_to_watch.status <%x>\n", | |
7bfa4816 JK |
3436 | (unsigned long)((tx_ring - adapter->tx_ring) / |
3437 | sizeof(struct e1000_tx_ring)), | |
581d708e MC |
3438 | readl(adapter->hw.hw_addr + tx_ring->tdh), |
3439 | readl(adapter->hw.hw_addr + tx_ring->tdt), | |
70b8f1e1 | 3440 | tx_ring->next_to_use, |
392137fa JK |
3441 | tx_ring->next_to_clean, |
3442 | tx_ring->buffer_info[eop].time_stamp, | |
70b8f1e1 MC |
3443 | eop, |
3444 | jiffies, | |
3445 | eop_desc->upper.fields.status); | |
1da177e4 | 3446 | netif_stop_queue(netdev); |
70b8f1e1 | 3447 | } |
1da177e4 | 3448 | } |
1da177e4 LT |
3449 | return cleaned; |
3450 | } | |
3451 | ||
3452 | /** | |
3453 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
3454 | * @adapter: board private structure |
3455 | * @status_err: receive descriptor status and error fields | |
3456 | * @csum: receive descriptor csum field | |
3457 | * @sk_buff: socket buffer with received data | |
1da177e4 LT |
3458 | **/ |
3459 | ||
e619d523 | 3460 | static void |
1da177e4 | 3461 | e1000_rx_checksum(struct e1000_adapter *adapter, |
2d7edb92 MC |
3462 | uint32_t status_err, uint32_t csum, |
3463 | struct sk_buff *skb) | |
1da177e4 | 3464 | { |
2d7edb92 MC |
3465 | uint16_t status = (uint16_t)status_err; |
3466 | uint8_t errors = (uint8_t)(status_err >> 24); | |
3467 | skb->ip_summed = CHECKSUM_NONE; | |
3468 | ||
1da177e4 | 3469 | /* 82543 or newer only */ |
96838a40 | 3470 | if (unlikely(adapter->hw.mac_type < e1000_82543)) return; |
1da177e4 | 3471 | /* Ignore Checksum bit is set */ |
96838a40 | 3472 | if (unlikely(status & E1000_RXD_STAT_IXSM)) return; |
2d7edb92 | 3473 | /* TCP/UDP checksum error bit is set */ |
96838a40 | 3474 | if (unlikely(errors & E1000_RXD_ERR_TCPE)) { |
1da177e4 | 3475 | /* let the stack verify checksum errors */ |
1da177e4 | 3476 | adapter->hw_csum_err++; |
2d7edb92 MC |
3477 | return; |
3478 | } | |
3479 | /* TCP/UDP Checksum has not been calculated */ | |
96838a40 JB |
3480 | if (adapter->hw.mac_type <= e1000_82547_rev_2) { |
3481 | if (!(status & E1000_RXD_STAT_TCPCS)) | |
2d7edb92 | 3482 | return; |
1da177e4 | 3483 | } else { |
96838a40 | 3484 | if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) |
2d7edb92 MC |
3485 | return; |
3486 | } | |
3487 | /* It must be a TCP or UDP packet with a valid checksum */ | |
3488 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
3489 | /* TCP checksum is good */ |
3490 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
2d7edb92 MC |
3491 | } else if (adapter->hw.mac_type > e1000_82547_rev_2) { |
3492 | /* IP fragment with UDP payload */ | |
3493 | /* Hardware complements the payload checksum, so we undo it | |
3494 | * and then put the value in host order for further stack use. | |
3495 | */ | |
3496 | csum = ntohl(csum ^ 0xFFFF); | |
3497 | skb->csum = csum; | |
3498 | skb->ip_summed = CHECKSUM_HW; | |
1da177e4 | 3499 | } |
2d7edb92 | 3500 | adapter->hw_csum_good++; |
1da177e4 LT |
3501 | } |
3502 | ||
3503 | /** | |
2d7edb92 | 3504 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 LT |
3505 | * @adapter: board private structure |
3506 | **/ | |
3507 | ||
3508 | static boolean_t | |
3509 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3510 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3511 | struct e1000_rx_ring *rx_ring, | |
3512 | int *work_done, int work_to_do) | |
1da177e4 | 3513 | #else |
581d708e MC |
3514 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3515 | struct e1000_rx_ring *rx_ring) | |
1da177e4 LT |
3516 | #endif |
3517 | { | |
1da177e4 LT |
3518 | struct net_device *netdev = adapter->netdev; |
3519 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f JB |
3520 | struct e1000_rx_desc *rx_desc, *next_rxd; |
3521 | struct e1000_buffer *buffer_info, *next_buffer; | |
1da177e4 LT |
3522 | unsigned long flags; |
3523 | uint32_t length; | |
3524 | uint8_t last_byte; | |
3525 | unsigned int i; | |
72d64a43 | 3526 | int cleaned_count = 0; |
a1415ee6 | 3527 | boolean_t cleaned = FALSE; |
1da177e4 LT |
3528 | |
3529 | i = rx_ring->next_to_clean; | |
3530 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
b92ff8ee | 3531 | buffer_info = &rx_ring->buffer_info[i]; |
1da177e4 | 3532 | |
b92ff8ee | 3533 | while (rx_desc->status & E1000_RXD_STAT_DD) { |
86c3d59f | 3534 | struct sk_buff *skb, *next_skb; |
a292ca6e | 3535 | u8 status; |
1da177e4 | 3536 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3537 | if (*work_done >= work_to_do) |
1da177e4 LT |
3538 | break; |
3539 | (*work_done)++; | |
3540 | #endif | |
a292ca6e | 3541 | status = rx_desc->status; |
b92ff8ee | 3542 | skb = buffer_info->skb; |
86c3d59f JB |
3543 | buffer_info->skb = NULL; |
3544 | ||
30320be8 JK |
3545 | prefetch(skb->data - NET_IP_ALIGN); |
3546 | ||
86c3d59f JB |
3547 | if (++i == rx_ring->count) i = 0; |
3548 | next_rxd = E1000_RX_DESC(*rx_ring, i); | |
30320be8 JK |
3549 | prefetch(next_rxd); |
3550 | ||
86c3d59f JB |
3551 | next_buffer = &rx_ring->buffer_info[i]; |
3552 | next_skb = next_buffer->skb; | |
30320be8 | 3553 | prefetch(next_skb->data - NET_IP_ALIGN); |
86c3d59f | 3554 | |
72d64a43 JK |
3555 | cleaned = TRUE; |
3556 | cleaned_count++; | |
a292ca6e JK |
3557 | pci_unmap_single(pdev, |
3558 | buffer_info->dma, | |
3559 | buffer_info->length, | |
1da177e4 LT |
3560 | PCI_DMA_FROMDEVICE); |
3561 | ||
1da177e4 LT |
3562 | length = le16_to_cpu(rx_desc->length); |
3563 | ||
a1415ee6 JK |
3564 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) { |
3565 | /* All receives must fit into a single buffer */ | |
3566 | E1000_DBG("%s: Receive packet consumed multiple" | |
3567 | " buffers\n", netdev->name); | |
3568 | dev_kfree_skb_irq(skb); | |
1da177e4 LT |
3569 | goto next_desc; |
3570 | } | |
3571 | ||
96838a40 | 3572 | if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { |
1da177e4 | 3573 | last_byte = *(skb->data + length - 1); |
b92ff8ee | 3574 | if (TBI_ACCEPT(&adapter->hw, status, |
1da177e4 LT |
3575 | rx_desc->errors, length, last_byte)) { |
3576 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
a292ca6e JK |
3577 | e1000_tbi_adjust_stats(&adapter->hw, |
3578 | &adapter->stats, | |
1da177e4 LT |
3579 | length, skb->data); |
3580 | spin_unlock_irqrestore(&adapter->stats_lock, | |
3581 | flags); | |
3582 | length--; | |
3583 | } else { | |
9e2feace AK |
3584 | /* recycle */ |
3585 | buffer_info->skb = skb; | |
1da177e4 LT |
3586 | goto next_desc; |
3587 | } | |
9e2feace AK |
3588 | } else |
3589 | skb_put(skb, length); | |
1da177e4 | 3590 | |
a292ca6e JK |
3591 | /* code added for copybreak, this should improve |
3592 | * performance for small packets with large amounts | |
3593 | * of reassembly being done in the stack */ | |
3594 | #define E1000_CB_LENGTH 256 | |
a1415ee6 | 3595 | if (length < E1000_CB_LENGTH) { |
a292ca6e JK |
3596 | struct sk_buff *new_skb = |
3597 | dev_alloc_skb(length + NET_IP_ALIGN); | |
3598 | if (new_skb) { | |
3599 | skb_reserve(new_skb, NET_IP_ALIGN); | |
3600 | new_skb->dev = netdev; | |
3601 | memcpy(new_skb->data - NET_IP_ALIGN, | |
3602 | skb->data - NET_IP_ALIGN, | |
3603 | length + NET_IP_ALIGN); | |
3604 | /* save the skb in buffer_info as good */ | |
3605 | buffer_info->skb = skb; | |
3606 | skb = new_skb; | |
3607 | skb_put(skb, length); | |
3608 | } | |
a1415ee6 JK |
3609 | } else |
3610 | skb_put(skb, length); | |
a292ca6e JK |
3611 | |
3612 | /* end copybreak code */ | |
1da177e4 LT |
3613 | |
3614 | /* Receive Checksum Offload */ | |
a292ca6e JK |
3615 | e1000_rx_checksum(adapter, |
3616 | (uint32_t)(status) | | |
2d7edb92 | 3617 | ((uint32_t)(rx_desc->errors) << 24), |
c3d7a3a4 | 3618 | le16_to_cpu(rx_desc->csum), skb); |
96838a40 | 3619 | |
1da177e4 LT |
3620 | skb->protocol = eth_type_trans(skb, netdev); |
3621 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3622 | if (unlikely(adapter->vlgrp && |
a292ca6e | 3623 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 | 3624 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
2d7edb92 MC |
3625 | le16_to_cpu(rx_desc->special) & |
3626 | E1000_RXD_SPC_VLAN_MASK); | |
1da177e4 LT |
3627 | } else { |
3628 | netif_receive_skb(skb); | |
3629 | } | |
3630 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3631 | if (unlikely(adapter->vlgrp && |
b92ff8ee | 3632 | (status & E1000_RXD_STAT_VP))) { |
1da177e4 LT |
3633 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
3634 | le16_to_cpu(rx_desc->special) & | |
3635 | E1000_RXD_SPC_VLAN_MASK); | |
3636 | } else { | |
3637 | netif_rx(skb); | |
3638 | } | |
3639 | #endif /* CONFIG_E1000_NAPI */ | |
3640 | netdev->last_rx = jiffies; | |
3641 | ||
3642 | next_desc: | |
3643 | rx_desc->status = 0; | |
1da177e4 | 3644 | |
72d64a43 JK |
3645 | /* return some buffers to hardware, one at a time is too slow */ |
3646 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3647 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3648 | cleaned_count = 0; | |
3649 | } | |
3650 | ||
30320be8 | 3651 | /* use prefetched values */ |
86c3d59f JB |
3652 | rx_desc = next_rxd; |
3653 | buffer_info = next_buffer; | |
1da177e4 | 3654 | } |
1da177e4 | 3655 | rx_ring->next_to_clean = i; |
72d64a43 JK |
3656 | |
3657 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3658 | if (cleaned_count) | |
3659 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
2d7edb92 MC |
3660 | |
3661 | return cleaned; | |
3662 | } | |
3663 | ||
3664 | /** | |
3665 | * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split | |
3666 | * @adapter: board private structure | |
3667 | **/ | |
3668 | ||
3669 | static boolean_t | |
3670 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3671 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3672 | struct e1000_rx_ring *rx_ring, | |
3673 | int *work_done, int work_to_do) | |
2d7edb92 | 3674 | #else |
581d708e MC |
3675 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3676 | struct e1000_rx_ring *rx_ring) | |
2d7edb92 MC |
3677 | #endif |
3678 | { | |
86c3d59f | 3679 | union e1000_rx_desc_packet_split *rx_desc, *next_rxd; |
2d7edb92 MC |
3680 | struct net_device *netdev = adapter->netdev; |
3681 | struct pci_dev *pdev = adapter->pdev; | |
86c3d59f | 3682 | struct e1000_buffer *buffer_info, *next_buffer; |
2d7edb92 MC |
3683 | struct e1000_ps_page *ps_page; |
3684 | struct e1000_ps_page_dma *ps_page_dma; | |
86c3d59f | 3685 | struct sk_buff *skb, *next_skb; |
2d7edb92 MC |
3686 | unsigned int i, j; |
3687 | uint32_t length, staterr; | |
72d64a43 | 3688 | int cleaned_count = 0; |
2d7edb92 MC |
3689 | boolean_t cleaned = FALSE; |
3690 | ||
3691 | i = rx_ring->next_to_clean; | |
3692 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
683a38f3 | 3693 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
9e2feace | 3694 | buffer_info = &rx_ring->buffer_info[i]; |
2d7edb92 | 3695 | |
96838a40 | 3696 | while (staterr & E1000_RXD_STAT_DD) { |
30320be8 | 3697 | buffer_info = &rx_ring->buffer_info[i]; |
2d7edb92 MC |
3698 | ps_page = &rx_ring->ps_page[i]; |
3699 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3700 | #ifdef CONFIG_E1000_NAPI | |
96838a40 | 3701 | if (unlikely(*work_done >= work_to_do)) |
2d7edb92 MC |
3702 | break; |
3703 | (*work_done)++; | |
3704 | #endif | |
86c3d59f JB |
3705 | skb = buffer_info->skb; |
3706 | ||
30320be8 JK |
3707 | /* in the packet split case this is header only */ |
3708 | prefetch(skb->data - NET_IP_ALIGN); | |
3709 | ||
86c3d59f JB |
3710 | if (++i == rx_ring->count) i = 0; |
3711 | next_rxd = E1000_RX_DESC_PS(*rx_ring, i); | |
30320be8 JK |
3712 | prefetch(next_rxd); |
3713 | ||
86c3d59f JB |
3714 | next_buffer = &rx_ring->buffer_info[i]; |
3715 | next_skb = next_buffer->skb; | |
30320be8 | 3716 | prefetch(next_skb->data - NET_IP_ALIGN); |
86c3d59f | 3717 | |
2d7edb92 | 3718 | cleaned = TRUE; |
72d64a43 | 3719 | cleaned_count++; |
2d7edb92 MC |
3720 | pci_unmap_single(pdev, buffer_info->dma, |
3721 | buffer_info->length, | |
3722 | PCI_DMA_FROMDEVICE); | |
3723 | ||
96838a40 | 3724 | if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) { |
2d7edb92 MC |
3725 | E1000_DBG("%s: Packet Split buffers didn't pick up" |
3726 | " the full packet\n", netdev->name); | |
3727 | dev_kfree_skb_irq(skb); | |
3728 | goto next_desc; | |
3729 | } | |
1da177e4 | 3730 | |
96838a40 | 3731 | if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { |
2d7edb92 MC |
3732 | dev_kfree_skb_irq(skb); |
3733 | goto next_desc; | |
3734 | } | |
3735 | ||
3736 | length = le16_to_cpu(rx_desc->wb.middle.length0); | |
3737 | ||
96838a40 | 3738 | if (unlikely(!length)) { |
2d7edb92 MC |
3739 | E1000_DBG("%s: Last part of the packet spanning" |
3740 | " multiple descriptors\n", netdev->name); | |
3741 | dev_kfree_skb_irq(skb); | |
3742 | goto next_desc; | |
3743 | } | |
3744 | ||
3745 | /* Good Receive */ | |
3746 | skb_put(skb, length); | |
3747 | ||
dc7c6add JK |
3748 | { |
3749 | /* this looks ugly, but it seems compiler issues make it | |
3750 | more efficient than reusing j */ | |
3751 | int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); | |
3752 | ||
3753 | /* page alloc/put takes too long and effects small packet | |
3754 | * throughput, so unsplit small packets and save the alloc/put*/ | |
9e2feace | 3755 | if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) { |
dc7c6add JK |
3756 | u8 *vaddr; |
3757 | /* there is no documentation about how to call | |
3758 | * kmap_atomic, so we can't hold the mapping | |
3759 | * very long */ | |
3760 | pci_dma_sync_single_for_cpu(pdev, | |
3761 | ps_page_dma->ps_page_dma[0], | |
3762 | PAGE_SIZE, | |
3763 | PCI_DMA_FROMDEVICE); | |
3764 | vaddr = kmap_atomic(ps_page->ps_page[0], | |
3765 | KM_SKB_DATA_SOFTIRQ); | |
3766 | memcpy(skb->tail, vaddr, l1); | |
3767 | kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); | |
3768 | pci_dma_sync_single_for_device(pdev, | |
3769 | ps_page_dma->ps_page_dma[0], | |
3770 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
3771 | skb_put(skb, l1); | |
3772 | length += l1; | |
3773 | goto copydone; | |
3774 | } /* if */ | |
3775 | } | |
3776 | ||
96838a40 | 3777 | for (j = 0; j < adapter->rx_ps_pages; j++) { |
30320be8 | 3778 | if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j]))) |
2d7edb92 | 3779 | break; |
2d7edb92 MC |
3780 | pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], |
3781 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
3782 | ps_page_dma->ps_page_dma[j] = 0; | |
329bfd0b JK |
3783 | skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0, |
3784 | length); | |
2d7edb92 | 3785 | ps_page->ps_page[j] = NULL; |
2d7edb92 MC |
3786 | skb->len += length; |
3787 | skb->data_len += length; | |
5d51b80f | 3788 | skb->truesize += length; |
2d7edb92 MC |
3789 | } |
3790 | ||
dc7c6add | 3791 | copydone: |
2d7edb92 | 3792 | e1000_rx_checksum(adapter, staterr, |
c3d7a3a4 | 3793 | le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); |
2d7edb92 MC |
3794 | skb->protocol = eth_type_trans(skb, netdev); |
3795 | ||
96838a40 | 3796 | if (likely(rx_desc->wb.upper.header_status & |
c3d7a3a4 | 3797 | cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))) |
e4c811c9 | 3798 | adapter->rx_hdr_split++; |
2d7edb92 | 3799 | #ifdef CONFIG_E1000_NAPI |
96838a40 | 3800 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3801 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
683a38f3 MC |
3802 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3803 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3804 | } else { |
3805 | netif_receive_skb(skb); | |
3806 | } | |
3807 | #else /* CONFIG_E1000_NAPI */ | |
96838a40 | 3808 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
2d7edb92 | 3809 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
683a38f3 MC |
3810 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3811 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3812 | } else { |
3813 | netif_rx(skb); | |
3814 | } | |
3815 | #endif /* CONFIG_E1000_NAPI */ | |
3816 | netdev->last_rx = jiffies; | |
3817 | ||
3818 | next_desc: | |
c3d7a3a4 | 3819 | rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); |
2d7edb92 | 3820 | buffer_info->skb = NULL; |
2d7edb92 | 3821 | |
72d64a43 JK |
3822 | /* return some buffers to hardware, one at a time is too slow */ |
3823 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
3824 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
3825 | cleaned_count = 0; | |
3826 | } | |
3827 | ||
30320be8 | 3828 | /* use prefetched values */ |
86c3d59f JB |
3829 | rx_desc = next_rxd; |
3830 | buffer_info = next_buffer; | |
3831 | ||
683a38f3 | 3832 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2d7edb92 MC |
3833 | } |
3834 | rx_ring->next_to_clean = i; | |
72d64a43 JK |
3835 | |
3836 | cleaned_count = E1000_DESC_UNUSED(rx_ring); | |
3837 | if (cleaned_count) | |
3838 | adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); | |
1da177e4 LT |
3839 | |
3840 | return cleaned; | |
3841 | } | |
3842 | ||
3843 | /** | |
2d7edb92 | 3844 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
3845 | * @adapter: address of board private structure |
3846 | **/ | |
3847 | ||
3848 | static void | |
581d708e | 3849 | e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
72d64a43 | 3850 | struct e1000_rx_ring *rx_ring, |
a292ca6e | 3851 | int cleaned_count) |
1da177e4 | 3852 | { |
1da177e4 LT |
3853 | struct net_device *netdev = adapter->netdev; |
3854 | struct pci_dev *pdev = adapter->pdev; | |
3855 | struct e1000_rx_desc *rx_desc; | |
3856 | struct e1000_buffer *buffer_info; | |
3857 | struct sk_buff *skb; | |
2648345f MC |
3858 | unsigned int i; |
3859 | unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; | |
1da177e4 LT |
3860 | |
3861 | i = rx_ring->next_to_use; | |
3862 | buffer_info = &rx_ring->buffer_info[i]; | |
3863 | ||
a292ca6e JK |
3864 | while (cleaned_count--) { |
3865 | if (!(skb = buffer_info->skb)) | |
3866 | skb = dev_alloc_skb(bufsz); | |
3867 | else { | |
3868 | skb_trim(skb, 0); | |
3869 | goto map_skb; | |
3870 | } | |
3871 | ||
96838a40 | 3872 | if (unlikely(!skb)) { |
1da177e4 | 3873 | /* Better luck next round */ |
72d64a43 | 3874 | adapter->alloc_rx_buff_failed++; |
1da177e4 LT |
3875 | break; |
3876 | } | |
3877 | ||
2648345f | 3878 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
3879 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
3880 | struct sk_buff *oldskb = skb; | |
2648345f MC |
3881 | DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " |
3882 | "at %p\n", bufsz, skb->data); | |
3883 | /* Try again, without freeing the previous */ | |
1da177e4 | 3884 | skb = dev_alloc_skb(bufsz); |
2648345f | 3885 | /* Failed allocation, critical failure */ |
1da177e4 LT |
3886 | if (!skb) { |
3887 | dev_kfree_skb(oldskb); | |
3888 | break; | |
3889 | } | |
2648345f | 3890 | |
1da177e4 LT |
3891 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
3892 | /* give up */ | |
3893 | dev_kfree_skb(skb); | |
3894 | dev_kfree_skb(oldskb); | |
3895 | break; /* while !buffer_info->skb */ | |
3896 | } else { | |
2648345f | 3897 | /* Use new allocation */ |
1da177e4 LT |
3898 | dev_kfree_skb(oldskb); |
3899 | } | |
3900 | } | |
1da177e4 LT |
3901 | /* Make buffer alignment 2 beyond a 16 byte boundary |
3902 | * this will result in a 16 byte aligned IP header after | |
3903 | * the 14 byte MAC header is removed | |
3904 | */ | |
3905 | skb_reserve(skb, NET_IP_ALIGN); | |
3906 | ||
3907 | skb->dev = netdev; | |
3908 | ||
3909 | buffer_info->skb = skb; | |
3910 | buffer_info->length = adapter->rx_buffer_len; | |
a292ca6e | 3911 | map_skb: |
1da177e4 LT |
3912 | buffer_info->dma = pci_map_single(pdev, |
3913 | skb->data, | |
3914 | adapter->rx_buffer_len, | |
3915 | PCI_DMA_FROMDEVICE); | |
3916 | ||
2648345f MC |
3917 | /* Fix for errata 23, can't cross 64kB boundary */ |
3918 | if (!e1000_check_64k_bound(adapter, | |
3919 | (void *)(unsigned long)buffer_info->dma, | |
3920 | adapter->rx_buffer_len)) { | |
3921 | DPRINTK(RX_ERR, ERR, | |
3922 | "dma align check failed: %u bytes at %p\n", | |
3923 | adapter->rx_buffer_len, | |
3924 | (void *)(unsigned long)buffer_info->dma); | |
1da177e4 LT |
3925 | dev_kfree_skb(skb); |
3926 | buffer_info->skb = NULL; | |
3927 | ||
2648345f | 3928 | pci_unmap_single(pdev, buffer_info->dma, |
1da177e4 LT |
3929 | adapter->rx_buffer_len, |
3930 | PCI_DMA_FROMDEVICE); | |
3931 | ||
3932 | break; /* while !buffer_info->skb */ | |
3933 | } | |
1da177e4 LT |
3934 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
3935 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
3936 | ||
96838a40 JB |
3937 | if (unlikely(++i == rx_ring->count)) |
3938 | i = 0; | |
1da177e4 LT |
3939 | buffer_info = &rx_ring->buffer_info[i]; |
3940 | } | |
3941 | ||
b92ff8ee JB |
3942 | if (likely(rx_ring->next_to_use != i)) { |
3943 | rx_ring->next_to_use = i; | |
3944 | if (unlikely(i-- == 0)) | |
3945 | i = (rx_ring->count - 1); | |
3946 | ||
3947 | /* Force memory writes to complete before letting h/w | |
3948 | * know there are new descriptors to fetch. (Only | |
3949 | * applicable for weak-ordered memory model archs, | |
3950 | * such as IA-64). */ | |
3951 | wmb(); | |
3952 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); | |
3953 | } | |
1da177e4 LT |
3954 | } |
3955 | ||
2d7edb92 MC |
3956 | /** |
3957 | * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split | |
3958 | * @adapter: address of board private structure | |
3959 | **/ | |
3960 | ||
3961 | static void | |
581d708e | 3962 | e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
72d64a43 JK |
3963 | struct e1000_rx_ring *rx_ring, |
3964 | int cleaned_count) | |
2d7edb92 | 3965 | { |
2d7edb92 MC |
3966 | struct net_device *netdev = adapter->netdev; |
3967 | struct pci_dev *pdev = adapter->pdev; | |
3968 | union e1000_rx_desc_packet_split *rx_desc; | |
3969 | struct e1000_buffer *buffer_info; | |
3970 | struct e1000_ps_page *ps_page; | |
3971 | struct e1000_ps_page_dma *ps_page_dma; | |
3972 | struct sk_buff *skb; | |
3973 | unsigned int i, j; | |
3974 | ||
3975 | i = rx_ring->next_to_use; | |
3976 | buffer_info = &rx_ring->buffer_info[i]; | |
3977 | ps_page = &rx_ring->ps_page[i]; | |
3978 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3979 | ||
72d64a43 | 3980 | while (cleaned_count--) { |
2d7edb92 MC |
3981 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
3982 | ||
96838a40 | 3983 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { |
e4c811c9 MC |
3984 | if (j < adapter->rx_ps_pages) { |
3985 | if (likely(!ps_page->ps_page[j])) { | |
3986 | ps_page->ps_page[j] = | |
3987 | alloc_page(GFP_ATOMIC); | |
b92ff8ee JB |
3988 | if (unlikely(!ps_page->ps_page[j])) { |
3989 | adapter->alloc_rx_buff_failed++; | |
e4c811c9 | 3990 | goto no_buffers; |
b92ff8ee | 3991 | } |
e4c811c9 MC |
3992 | ps_page_dma->ps_page_dma[j] = |
3993 | pci_map_page(pdev, | |
3994 | ps_page->ps_page[j], | |
3995 | 0, PAGE_SIZE, | |
3996 | PCI_DMA_FROMDEVICE); | |
3997 | } | |
3998 | /* Refresh the desc even if buffer_addrs didn't | |
96838a40 | 3999 | * change because each write-back erases |
e4c811c9 MC |
4000 | * this info. |
4001 | */ | |
4002 | rx_desc->read.buffer_addr[j+1] = | |
4003 | cpu_to_le64(ps_page_dma->ps_page_dma[j]); | |
4004 | } else | |
4005 | rx_desc->read.buffer_addr[j+1] = ~0; | |
2d7edb92 MC |
4006 | } |
4007 | ||
4008 | skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN); | |
4009 | ||
b92ff8ee JB |
4010 | if (unlikely(!skb)) { |
4011 | adapter->alloc_rx_buff_failed++; | |
2d7edb92 | 4012 | break; |
b92ff8ee | 4013 | } |
2d7edb92 MC |
4014 | |
4015 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
4016 | * this will result in a 16 byte aligned IP header after | |
4017 | * the 14 byte MAC header is removed | |
4018 | */ | |
4019 | skb_reserve(skb, NET_IP_ALIGN); | |
4020 | ||
4021 | skb->dev = netdev; | |
4022 | ||
4023 | buffer_info->skb = skb; | |
4024 | buffer_info->length = adapter->rx_ps_bsize0; | |
4025 | buffer_info->dma = pci_map_single(pdev, skb->data, | |
4026 | adapter->rx_ps_bsize0, | |
4027 | PCI_DMA_FROMDEVICE); | |
4028 | ||
4029 | rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); | |
4030 | ||
96838a40 | 4031 | if (unlikely(++i == rx_ring->count)) i = 0; |
2d7edb92 MC |
4032 | buffer_info = &rx_ring->buffer_info[i]; |
4033 | ps_page = &rx_ring->ps_page[i]; | |
4034 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
4035 | } | |
4036 | ||
4037 | no_buffers: | |
b92ff8ee JB |
4038 | if (likely(rx_ring->next_to_use != i)) { |
4039 | rx_ring->next_to_use = i; | |
4040 | if (unlikely(i-- == 0)) i = (rx_ring->count - 1); | |
4041 | ||
4042 | /* Force memory writes to complete before letting h/w | |
4043 | * know there are new descriptors to fetch. (Only | |
4044 | * applicable for weak-ordered memory model archs, | |
4045 | * such as IA-64). */ | |
4046 | wmb(); | |
4047 | /* Hardware increments by 16 bytes, but packet split | |
4048 | * descriptors are 32 bytes...so we increment tail | |
4049 | * twice as much. | |
4050 | */ | |
4051 | writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt); | |
4052 | } | |
2d7edb92 MC |
4053 | } |
4054 | ||
1da177e4 LT |
4055 | /** |
4056 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
4057 | * @adapter: | |
4058 | **/ | |
4059 | ||
4060 | static void | |
4061 | e1000_smartspeed(struct e1000_adapter *adapter) | |
4062 | { | |
4063 | uint16_t phy_status; | |
4064 | uint16_t phy_ctrl; | |
4065 | ||
96838a40 | 4066 | if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || |
1da177e4 LT |
4067 | !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) |
4068 | return; | |
4069 | ||
96838a40 | 4070 | if (adapter->smartspeed == 0) { |
1da177e4 LT |
4071 | /* If Master/Slave config fault is asserted twice, |
4072 | * we assume back-to-back */ | |
4073 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); | |
96838a40 | 4074 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4075 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); |
96838a40 | 4076 | if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; |
1da177e4 | 4077 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); |
96838a40 | 4078 | if (phy_ctrl & CR_1000T_MS_ENABLE) { |
1da177e4 LT |
4079 | phy_ctrl &= ~CR_1000T_MS_ENABLE; |
4080 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, | |
4081 | phy_ctrl); | |
4082 | adapter->smartspeed++; | |
96838a40 | 4083 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4084 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, |
4085 | &phy_ctrl)) { | |
4086 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4087 | MII_CR_RESTART_AUTO_NEG); | |
4088 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, | |
4089 | phy_ctrl); | |
4090 | } | |
4091 | } | |
4092 | return; | |
96838a40 | 4093 | } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { |
1da177e4 LT |
4094 | /* If still no link, perhaps using 2/3 pair cable */ |
4095 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); | |
4096 | phy_ctrl |= CR_1000T_MS_ENABLE; | |
4097 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); | |
96838a40 | 4098 | if (!e1000_phy_setup_autoneg(&adapter->hw) && |
1da177e4 LT |
4099 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { |
4100 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
4101 | MII_CR_RESTART_AUTO_NEG); | |
4102 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); | |
4103 | } | |
4104 | } | |
4105 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
96838a40 | 4106 | if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) |
1da177e4 LT |
4107 | adapter->smartspeed = 0; |
4108 | } | |
4109 | ||
4110 | /** | |
4111 | * e1000_ioctl - | |
4112 | * @netdev: | |
4113 | * @ifreq: | |
4114 | * @cmd: | |
4115 | **/ | |
4116 | ||
4117 | static int | |
4118 | e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4119 | { | |
4120 | switch (cmd) { | |
4121 | case SIOCGMIIPHY: | |
4122 | case SIOCGMIIREG: | |
4123 | case SIOCSMIIREG: | |
4124 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
4125 | default: | |
4126 | return -EOPNOTSUPP; | |
4127 | } | |
4128 | } | |
4129 | ||
4130 | /** | |
4131 | * e1000_mii_ioctl - | |
4132 | * @netdev: | |
4133 | * @ifreq: | |
4134 | * @cmd: | |
4135 | **/ | |
4136 | ||
4137 | static int | |
4138 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
4139 | { | |
60490fe0 | 4140 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4141 | struct mii_ioctl_data *data = if_mii(ifr); |
4142 | int retval; | |
4143 | uint16_t mii_reg; | |
4144 | uint16_t spddplx; | |
97876fc6 | 4145 | unsigned long flags; |
1da177e4 | 4146 | |
96838a40 | 4147 | if (adapter->hw.media_type != e1000_media_type_copper) |
1da177e4 LT |
4148 | return -EOPNOTSUPP; |
4149 | ||
4150 | switch (cmd) { | |
4151 | case SIOCGMIIPHY: | |
4152 | data->phy_id = adapter->hw.phy_addr; | |
4153 | break; | |
4154 | case SIOCGMIIREG: | |
96838a40 | 4155 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4156 | return -EPERM; |
97876fc6 | 4157 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4158 | if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, |
97876fc6 MC |
4159 | &data->val_out)) { |
4160 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4161 | return -EIO; |
97876fc6 MC |
4162 | } |
4163 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
4164 | break; |
4165 | case SIOCSMIIREG: | |
96838a40 | 4166 | if (!capable(CAP_NET_ADMIN)) |
1da177e4 | 4167 | return -EPERM; |
96838a40 | 4168 | if (data->reg_num & ~(0x1F)) |
1da177e4 LT |
4169 | return -EFAULT; |
4170 | mii_reg = data->val_in; | |
97876fc6 | 4171 | spin_lock_irqsave(&adapter->stats_lock, flags); |
96838a40 | 4172 | if (e1000_write_phy_reg(&adapter->hw, data->reg_num, |
97876fc6 MC |
4173 | mii_reg)) { |
4174 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 4175 | return -EIO; |
97876fc6 | 4176 | } |
cb764326 | 4177 | if (adapter->hw.phy_type == e1000_media_type_copper) { |
1da177e4 LT |
4178 | switch (data->reg_num) { |
4179 | case PHY_CTRL: | |
96838a40 | 4180 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4181 | break; |
96838a40 | 4182 | if (mii_reg & MII_CR_AUTO_NEG_EN) { |
1da177e4 LT |
4183 | adapter->hw.autoneg = 1; |
4184 | adapter->hw.autoneg_advertised = 0x2F; | |
4185 | } else { | |
4186 | if (mii_reg & 0x40) | |
4187 | spddplx = SPEED_1000; | |
4188 | else if (mii_reg & 0x2000) | |
4189 | spddplx = SPEED_100; | |
4190 | else | |
4191 | spddplx = SPEED_10; | |
4192 | spddplx += (mii_reg & 0x100) | |
cb764326 JK |
4193 | ? DUPLEX_FULL : |
4194 | DUPLEX_HALF; | |
1da177e4 LT |
4195 | retval = e1000_set_spd_dplx(adapter, |
4196 | spddplx); | |
96838a40 | 4197 | if (retval) { |
97876fc6 | 4198 | spin_unlock_irqrestore( |
96838a40 | 4199 | &adapter->stats_lock, |
97876fc6 | 4200 | flags); |
1da177e4 | 4201 | return retval; |
97876fc6 | 4202 | } |
1da177e4 | 4203 | } |
96838a40 | 4204 | if (netif_running(adapter->netdev)) { |
1da177e4 LT |
4205 | e1000_down(adapter); |
4206 | e1000_up(adapter); | |
4207 | } else | |
4208 | e1000_reset(adapter); | |
4209 | break; | |
4210 | case M88E1000_PHY_SPEC_CTRL: | |
4211 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
96838a40 | 4212 | if (e1000_phy_reset(&adapter->hw)) { |
97876fc6 MC |
4213 | spin_unlock_irqrestore( |
4214 | &adapter->stats_lock, flags); | |
1da177e4 | 4215 | return -EIO; |
97876fc6 | 4216 | } |
1da177e4 LT |
4217 | break; |
4218 | } | |
4219 | } else { | |
4220 | switch (data->reg_num) { | |
4221 | case PHY_CTRL: | |
96838a40 | 4222 | if (mii_reg & MII_CR_POWER_DOWN) |
1da177e4 | 4223 | break; |
96838a40 | 4224 | if (netif_running(adapter->netdev)) { |
1da177e4 LT |
4225 | e1000_down(adapter); |
4226 | e1000_up(adapter); | |
4227 | } else | |
4228 | e1000_reset(adapter); | |
4229 | break; | |
4230 | } | |
4231 | } | |
97876fc6 | 4232 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1da177e4 LT |
4233 | break; |
4234 | default: | |
4235 | return -EOPNOTSUPP; | |
4236 | } | |
4237 | return E1000_SUCCESS; | |
4238 | } | |
4239 | ||
4240 | void | |
4241 | e1000_pci_set_mwi(struct e1000_hw *hw) | |
4242 | { | |
4243 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4244 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4245 | |
96838a40 | 4246 | if (ret_val) |
2648345f | 4247 | DPRINTK(PROBE, ERR, "Error in setting MWI\n"); |
1da177e4 LT |
4248 | } |
4249 | ||
4250 | void | |
4251 | e1000_pci_clear_mwi(struct e1000_hw *hw) | |
4252 | { | |
4253 | struct e1000_adapter *adapter = hw->back; | |
4254 | ||
4255 | pci_clear_mwi(adapter->pdev); | |
4256 | } | |
4257 | ||
4258 | void | |
4259 | e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4260 | { | |
4261 | struct e1000_adapter *adapter = hw->back; | |
4262 | ||
4263 | pci_read_config_word(adapter->pdev, reg, value); | |
4264 | } | |
4265 | ||
4266 | void | |
4267 | e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4268 | { | |
4269 | struct e1000_adapter *adapter = hw->back; | |
4270 | ||
4271 | pci_write_config_word(adapter->pdev, reg, *value); | |
4272 | } | |
4273 | ||
4274 | uint32_t | |
4275 | e1000_io_read(struct e1000_hw *hw, unsigned long port) | |
4276 | { | |
4277 | return inl(port); | |
4278 | } | |
4279 | ||
4280 | void | |
4281 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | |
4282 | { | |
4283 | outl(value, port); | |
4284 | } | |
4285 | ||
4286 | static void | |
4287 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
4288 | { | |
60490fe0 | 4289 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4290 | uint32_t ctrl, rctl; |
4291 | ||
4292 | e1000_irq_disable(adapter); | |
4293 | adapter->vlgrp = grp; | |
4294 | ||
96838a40 | 4295 | if (grp) { |
1da177e4 LT |
4296 | /* enable VLAN tag insert/strip */ |
4297 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4298 | ctrl |= E1000_CTRL_VME; | |
4299 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4300 | ||
4301 | /* enable VLAN receive filtering */ | |
4302 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4303 | rctl |= E1000_RCTL_VFE; | |
4304 | rctl &= ~E1000_RCTL_CFIEN; | |
4305 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2d7edb92 | 4306 | e1000_update_mng_vlan(adapter); |
1da177e4 LT |
4307 | } else { |
4308 | /* disable VLAN tag insert/strip */ | |
4309 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4310 | ctrl &= ~E1000_CTRL_VME; | |
4311 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4312 | ||
4313 | /* disable VLAN filtering */ | |
4314 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4315 | rctl &= ~E1000_RCTL_VFE; | |
4316 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
96838a40 | 4317 | if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) { |
2d7edb92 MC |
4318 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
4319 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
4320 | } | |
1da177e4 LT |
4321 | } |
4322 | ||
4323 | e1000_irq_enable(adapter); | |
4324 | } | |
4325 | ||
4326 | static void | |
4327 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |
4328 | { | |
60490fe0 | 4329 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 4330 | uint32_t vfta, index; |
96838a40 JB |
4331 | |
4332 | if ((adapter->hw.mng_cookie.status & | |
4333 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
4334 | (vid == adapter->mng_vlan_id)) | |
2d7edb92 | 4335 | return; |
1da177e4 LT |
4336 | /* add VID to filter table */ |
4337 | index = (vid >> 5) & 0x7F; | |
4338 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4339 | vfta |= (1 << (vid & 0x1F)); | |
4340 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4341 | } | |
4342 | ||
4343 | static void | |
4344 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | |
4345 | { | |
60490fe0 | 4346 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4347 | uint32_t vfta, index; |
4348 | ||
4349 | e1000_irq_disable(adapter); | |
4350 | ||
96838a40 | 4351 | if (adapter->vlgrp) |
1da177e4 LT |
4352 | adapter->vlgrp->vlan_devices[vid] = NULL; |
4353 | ||
4354 | e1000_irq_enable(adapter); | |
4355 | ||
96838a40 JB |
4356 | if ((adapter->hw.mng_cookie.status & |
4357 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
ff147013 JK |
4358 | (vid == adapter->mng_vlan_id)) { |
4359 | /* release control to f/w */ | |
4360 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4361 | return; |
ff147013 JK |
4362 | } |
4363 | ||
1da177e4 LT |
4364 | /* remove VID from filter table */ |
4365 | index = (vid >> 5) & 0x7F; | |
4366 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4367 | vfta &= ~(1 << (vid & 0x1F)); | |
4368 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4369 | } | |
4370 | ||
4371 | static void | |
4372 | e1000_restore_vlan(struct e1000_adapter *adapter) | |
4373 | { | |
4374 | e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
4375 | ||
96838a40 | 4376 | if (adapter->vlgrp) { |
1da177e4 | 4377 | uint16_t vid; |
96838a40 JB |
4378 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { |
4379 | if (!adapter->vlgrp->vlan_devices[vid]) | |
1da177e4 LT |
4380 | continue; |
4381 | e1000_vlan_rx_add_vid(adapter->netdev, vid); | |
4382 | } | |
4383 | } | |
4384 | } | |
4385 | ||
4386 | int | |
4387 | e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) | |
4388 | { | |
4389 | adapter->hw.autoneg = 0; | |
4390 | ||
6921368f | 4391 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
96838a40 | 4392 | if ((adapter->hw.media_type == e1000_media_type_fiber) && |
6921368f MC |
4393 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { |
4394 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); | |
4395 | return -EINVAL; | |
4396 | } | |
4397 | ||
96838a40 | 4398 | switch (spddplx) { |
1da177e4 LT |
4399 | case SPEED_10 + DUPLEX_HALF: |
4400 | adapter->hw.forced_speed_duplex = e1000_10_half; | |
4401 | break; | |
4402 | case SPEED_10 + DUPLEX_FULL: | |
4403 | adapter->hw.forced_speed_duplex = e1000_10_full; | |
4404 | break; | |
4405 | case SPEED_100 + DUPLEX_HALF: | |
4406 | adapter->hw.forced_speed_duplex = e1000_100_half; | |
4407 | break; | |
4408 | case SPEED_100 + DUPLEX_FULL: | |
4409 | adapter->hw.forced_speed_duplex = e1000_100_full; | |
4410 | break; | |
4411 | case SPEED_1000 + DUPLEX_FULL: | |
4412 | adapter->hw.autoneg = 1; | |
4413 | adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; | |
4414 | break; | |
4415 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
4416 | default: | |
2648345f | 4417 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); |
1da177e4 LT |
4418 | return -EINVAL; |
4419 | } | |
4420 | return 0; | |
4421 | } | |
4422 | ||
b6a1d5f8 | 4423 | #ifdef CONFIG_PM |
0f15a8fa JK |
4424 | /* Save/restore 16 or 64 dwords of PCI config space depending on which |
4425 | * bus we're on (PCI(X) vs. PCI-E) | |
2f82665f JB |
4426 | */ |
4427 | #define PCIE_CONFIG_SPACE_LEN 256 | |
4428 | #define PCI_CONFIG_SPACE_LEN 64 | |
4429 | static int | |
4430 | e1000_pci_save_state(struct e1000_adapter *adapter) | |
4431 | { | |
4432 | struct pci_dev *dev = adapter->pdev; | |
4433 | int size; | |
4434 | int i; | |
0f15a8fa | 4435 | |
2f82665f JB |
4436 | if (adapter->hw.mac_type >= e1000_82571) |
4437 | size = PCIE_CONFIG_SPACE_LEN; | |
4438 | else | |
4439 | size = PCI_CONFIG_SPACE_LEN; | |
4440 | ||
4441 | WARN_ON(adapter->config_space != NULL); | |
4442 | ||
4443 | adapter->config_space = kmalloc(size, GFP_KERNEL); | |
4444 | if (!adapter->config_space) { | |
4445 | DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size); | |
4446 | return -ENOMEM; | |
4447 | } | |
4448 | for (i = 0; i < (size / 4); i++) | |
4449 | pci_read_config_dword(dev, i * 4, &adapter->config_space[i]); | |
4450 | return 0; | |
4451 | } | |
4452 | ||
4453 | static void | |
4454 | e1000_pci_restore_state(struct e1000_adapter *adapter) | |
4455 | { | |
4456 | struct pci_dev *dev = adapter->pdev; | |
4457 | int size; | |
4458 | int i; | |
0f15a8fa | 4459 | |
2f82665f JB |
4460 | if (adapter->config_space == NULL) |
4461 | return; | |
0f15a8fa | 4462 | |
2f82665f JB |
4463 | if (adapter->hw.mac_type >= e1000_82571) |
4464 | size = PCIE_CONFIG_SPACE_LEN; | |
4465 | else | |
4466 | size = PCI_CONFIG_SPACE_LEN; | |
4467 | for (i = 0; i < (size / 4); i++) | |
4468 | pci_write_config_dword(dev, i * 4, adapter->config_space[i]); | |
4469 | kfree(adapter->config_space); | |
4470 | adapter->config_space = NULL; | |
4471 | return; | |
4472 | } | |
4473 | #endif /* CONFIG_PM */ | |
4474 | ||
1da177e4 | 4475 | static int |
829ca9a3 | 4476 | e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
1da177e4 LT |
4477 | { |
4478 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4479 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 4480 | uint32_t ctrl, ctrl_ext, rctl, manc, status; |
1da177e4 | 4481 | uint32_t wufc = adapter->wol; |
240b1710 | 4482 | int retval = 0; |
1da177e4 LT |
4483 | |
4484 | netif_device_detach(netdev); | |
4485 | ||
96838a40 | 4486 | if (netif_running(netdev)) |
1da177e4 LT |
4487 | e1000_down(adapter); |
4488 | ||
2f82665f | 4489 | #ifdef CONFIG_PM |
0f15a8fa JK |
4490 | /* Implement our own version of pci_save_state(pdev) because pci- |
4491 | * express adapters have 256-byte config spaces. */ | |
2f82665f JB |
4492 | retval = e1000_pci_save_state(adapter); |
4493 | if (retval) | |
4494 | return retval; | |
4495 | #endif | |
4496 | ||
1da177e4 | 4497 | status = E1000_READ_REG(&adapter->hw, STATUS); |
96838a40 | 4498 | if (status & E1000_STATUS_LU) |
1da177e4 LT |
4499 | wufc &= ~E1000_WUFC_LNKC; |
4500 | ||
96838a40 | 4501 | if (wufc) { |
1da177e4 LT |
4502 | e1000_setup_rctl(adapter); |
4503 | e1000_set_multi(netdev); | |
4504 | ||
4505 | /* turn on all-multi mode if wake on multicast is enabled */ | |
96838a40 | 4506 | if (adapter->wol & E1000_WUFC_MC) { |
1da177e4 LT |
4507 | rctl = E1000_READ_REG(&adapter->hw, RCTL); |
4508 | rctl |= E1000_RCTL_MPE; | |
4509 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4510 | } | |
4511 | ||
96838a40 | 4512 | if (adapter->hw.mac_type >= e1000_82540) { |
1da177e4 LT |
4513 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); |
4514 | /* advertise wake from D3Cold */ | |
4515 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
4516 | /* phy power management enable */ | |
4517 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
4518 | ctrl |= E1000_CTRL_ADVD3WUC | | |
4519 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
4520 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4521 | } | |
4522 | ||
96838a40 | 4523 | if (adapter->hw.media_type == e1000_media_type_fiber || |
1da177e4 LT |
4524 | adapter->hw.media_type == e1000_media_type_internal_serdes) { |
4525 | /* keep the laser running in D3 */ | |
4526 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
4527 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | |
4528 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); | |
4529 | } | |
4530 | ||
2d7edb92 MC |
4531 | /* Allow time for pending master requests to run */ |
4532 | e1000_disable_pciex_master(&adapter->hw); | |
4533 | ||
1da177e4 LT |
4534 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); |
4535 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); | |
d0e027db AK |
4536 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4537 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4538 | } else { |
4539 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | |
4540 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); | |
d0e027db AK |
4541 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4542 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4543 | } |
4544 | ||
96838a40 | 4545 | if (adapter->hw.mac_type >= e1000_82540 && |
1da177e4 LT |
4546 | adapter->hw.media_type == e1000_media_type_copper) { |
4547 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
96838a40 | 4548 | if (manc & E1000_MANC_SMBUS_EN) { |
1da177e4 LT |
4549 | manc |= E1000_MANC_ARP_EN; |
4550 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
d0e027db AK |
4551 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4552 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1da177e4 LT |
4553 | } |
4554 | } | |
4555 | ||
b55ccb35 JK |
4556 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
4557 | * would have already happened in close and is redundant. */ | |
4558 | e1000_release_hw_control(adapter); | |
2d7edb92 | 4559 | |
1da177e4 | 4560 | pci_disable_device(pdev); |
240b1710 | 4561 | |
d0e027db | 4562 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
1da177e4 LT |
4563 | |
4564 | return 0; | |
4565 | } | |
4566 | ||
2f82665f | 4567 | #ifdef CONFIG_PM |
1da177e4 LT |
4568 | static int |
4569 | e1000_resume(struct pci_dev *pdev) | |
4570 | { | |
4571 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4572 | struct e1000_adapter *adapter = netdev_priv(netdev); |
b55ccb35 | 4573 | uint32_t manc, ret_val; |
1da177e4 | 4574 | |
d0e027db | 4575 | pci_set_power_state(pdev, PCI_D0); |
2f82665f | 4576 | e1000_pci_restore_state(adapter); |
2b02893e | 4577 | ret_val = pci_enable_device(pdev); |
a4cb847d | 4578 | pci_set_master(pdev); |
1da177e4 | 4579 | |
d0e027db AK |
4580 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4581 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4582 | |
4583 | e1000_reset(adapter); | |
4584 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
4585 | ||
96838a40 | 4586 | if (netif_running(netdev)) |
1da177e4 LT |
4587 | e1000_up(adapter); |
4588 | ||
4589 | netif_device_attach(netdev); | |
4590 | ||
96838a40 | 4591 | if (adapter->hw.mac_type >= e1000_82540 && |
1da177e4 LT |
4592 | adapter->hw.media_type == e1000_media_type_copper) { |
4593 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4594 | manc &= ~(E1000_MANC_ARP_EN); | |
4595 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4596 | } | |
4597 | ||
b55ccb35 JK |
4598 | /* If the controller is 82573 and f/w is AMT, do not set |
4599 | * DRV_LOAD until the interface is up. For all other cases, | |
4600 | * let the f/w know that the h/w is now under the control | |
4601 | * of the driver. */ | |
4602 | if (adapter->hw.mac_type != e1000_82573 || | |
4603 | !e1000_check_mng_mode(&adapter->hw)) | |
4604 | e1000_get_hw_control(adapter); | |
2d7edb92 | 4605 | |
1da177e4 LT |
4606 | return 0; |
4607 | } | |
4608 | #endif | |
1da177e4 LT |
4609 | #ifdef CONFIG_NET_POLL_CONTROLLER |
4610 | /* | |
4611 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
4612 | * without having to re-enable interrupts. It's not called while | |
4613 | * the interrupt routine is executing. | |
4614 | */ | |
4615 | static void | |
2648345f | 4616 | e1000_netpoll(struct net_device *netdev) |
1da177e4 | 4617 | { |
60490fe0 | 4618 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4619 | disable_irq(adapter->pdev->irq); |
4620 | e1000_intr(adapter->pdev->irq, netdev, NULL); | |
c4cfe567 | 4621 | e1000_clean_tx_irq(adapter, adapter->tx_ring); |
e8da8be1 JK |
4622 | #ifndef CONFIG_E1000_NAPI |
4623 | adapter->clean_rx(adapter, adapter->rx_ring); | |
4624 | #endif | |
1da177e4 LT |
4625 | enable_irq(adapter->pdev->irq); |
4626 | } | |
4627 | #endif | |
4628 | ||
4629 | /* e1000_main.c */ |