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[PATCH] e1000: Added firmware version reporting for 8257{1|2|3} controllers
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
2b02893e
MC		 32 * 6.0.58 4/20/05
33 * o Accepted ethtool cleanup patch from Stephen Hemminger
2648345f
MC		 34 * 6.0.44+ 2/15/05
35 * o applied Anton's patch to resolve tx hang in hardware
36 * o Applied Andrew Mortons patch - e1000 stops working after resume
1da177e4
LT		 37 */
38
39char e1000_driver_name[] = "e1000";
3ad2cc67 40static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 41#ifndef CONFIG_E1000_NAPI
42#define DRIVERNAPI
43#else
44#define DRIVERNAPI "-NAPI"
45#endif
4ee9c020 46#define DRV_VERSION "6.3.9-k2"DRIVERNAPI
1da177e4 47char e1000_driver_version[] = DRV_VERSION;
3ad2cc67 48static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 49
50/* e1000_pci_tbl - PCI Device ID Table
51 *
52 * Last entry must be all 0s
53 *
54 * Macro expands to...
55 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
56 */
57static struct pci_device_id e1000_pci_tbl[] = {
58 INTEL_E1000_ETHERNET_DEVICE(0x1000),
59 INTEL_E1000_ETHERNET_DEVICE(0x1001),
60 INTEL_E1000_ETHERNET_DEVICE(0x1004),
61 INTEL_E1000_ETHERNET_DEVICE(0x1008),
62 INTEL_E1000_ETHERNET_DEVICE(0x1009),
63 INTEL_E1000_ETHERNET_DEVICE(0x100C),
64 INTEL_E1000_ETHERNET_DEVICE(0x100D),
65 INTEL_E1000_ETHERNET_DEVICE(0x100E),
66 INTEL_E1000_ETHERNET_DEVICE(0x100F),
67 INTEL_E1000_ETHERNET_DEVICE(0x1010),
68 INTEL_E1000_ETHERNET_DEVICE(0x1011),
69 INTEL_E1000_ETHERNET_DEVICE(0x1012),
70 INTEL_E1000_ETHERNET_DEVICE(0x1013),
71 INTEL_E1000_ETHERNET_DEVICE(0x1014),
72 INTEL_E1000_ETHERNET_DEVICE(0x1015),
73 INTEL_E1000_ETHERNET_DEVICE(0x1016),
74 INTEL_E1000_ETHERNET_DEVICE(0x1017),
75 INTEL_E1000_ETHERNET_DEVICE(0x1018),
76 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 77 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 78 INTEL_E1000_ETHERNET_DEVICE(0x101D),
79 INTEL_E1000_ETHERNET_DEVICE(0x101E),
80 INTEL_E1000_ETHERNET_DEVICE(0x1026),
81 INTEL_E1000_ETHERNET_DEVICE(0x1027),
82 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 83 INTEL_E1000_ETHERNET_DEVICE(0x105E),
84 INTEL_E1000_ETHERNET_DEVICE(0x105F),
85 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 86 INTEL_E1000_ETHERNET_DEVICE(0x1075),
87 INTEL_E1000_ETHERNET_DEVICE(0x1076),
88 INTEL_E1000_ETHERNET_DEVICE(0x1077),
89 INTEL_E1000_ETHERNET_DEVICE(0x1078),
90 INTEL_E1000_ETHERNET_DEVICE(0x1079),
91 INTEL_E1000_ETHERNET_DEVICE(0x107A),
92 INTEL_E1000_ETHERNET_DEVICE(0x107B),
93 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 94 INTEL_E1000_ETHERNET_DEVICE(0x107D),
95 INTEL_E1000_ETHERNET_DEVICE(0x107E),
96 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 97 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 98 INTEL_E1000_ETHERNET_DEVICE(0x108B),
99 INTEL_E1000_ETHERNET_DEVICE(0x108C),
b7ee49db 100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 103 /* required last entry */
104 {0,}
105};
106
107MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
108
109int e1000_up(struct e1000_adapter *adapter);
110void e1000_down(struct e1000_adapter *adapter);
111void e1000_reset(struct e1000_adapter *adapter);
112int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 113int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
114int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
115void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
116void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67
AB		 117static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
118 struct e1000_tx_ring *txdr);
119static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
120 struct e1000_rx_ring *rxdr);
121static void e1000_free_tx_resources(struct e1000_adapter *adapter,
122 struct e1000_tx_ring *tx_ring);
123static void e1000_free_rx_resources(struct e1000_adapter *adapter,
124 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 125void e1000_update_stats(struct e1000_adapter *adapter);
126
127/* Local Function Prototypes */
128
129static int e1000_init_module(void);
130static void e1000_exit_module(void);
131static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
132static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e
MC		 133static int e1000_alloc_queues(struct e1000_adapter *adapter);
134#ifdef CONFIG_E1000_MQ
135static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
136#endif
1da177e4
LT		 137static int e1000_sw_init(struct e1000_adapter *adapter);
138static int e1000_open(struct net_device *netdev);
139static int e1000_close(struct net_device *netdev);
140static void e1000_configure_tx(struct e1000_adapter *adapter);
141static void e1000_configure_rx(struct e1000_adapter *adapter);
142static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 143static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
144static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
145static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
146 struct e1000_tx_ring *tx_ring);
147static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
148 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 149static void e1000_set_multi(struct net_device *netdev);
150static void e1000_update_phy_info(unsigned long data);
151static void e1000_watchdog(unsigned long data);
152static void e1000_watchdog_task(struct e1000_adapter *adapter);
153static void e1000_82547_tx_fifo_stall(unsigned long data);
154static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
155static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
156static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
157static int e1000_set_mac(struct net_device *netdev, void *p);
158static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 159static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
160 struct e1000_tx_ring *tx_ring);
1da177e4 161#ifdef CONFIG_E1000_NAPI
581d708e 162static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 163static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 164 struct e1000_rx_ring *rx_ring,
1da177e4 165 int *work_done, int work_to_do);
2d7edb92 166static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 167 struct e1000_rx_ring *rx_ring,
2d7edb92 168 int *work_done, int work_to_do);
1da177e4 169#else
581d708e
MC		 170static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
172static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
173 struct e1000_rx_ring *rx_ring);
1da177e4 174#endif
581d708e 175static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 176 struct e1000_rx_ring *rx_ring,
177 int cleaned_count);
581d708e 178static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 179 struct e1000_rx_ring *rx_ring,
180 int cleaned_count);
1da177e4
LT		 181static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
182static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
183 int cmd);
184void e1000_set_ethtool_ops(struct net_device *netdev);
185static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
186static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
187static void e1000_tx_timeout(struct net_device *dev);
188static void e1000_tx_timeout_task(struct net_device *dev);
189static void e1000_smartspeed(struct e1000_adapter *adapter);
190static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
191 struct sk_buff *skb);
192
193static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
194static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
195static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
196static void e1000_restore_vlan(struct e1000_adapter *adapter);
197
1da177e4 198#ifdef CONFIG_PM
977e74b5 199static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 200static int e1000_resume(struct pci_dev *pdev);
201#endif
202
203#ifdef CONFIG_NET_POLL_CONTROLLER
204/* for netdump / net console */
205static void e1000_netpoll (struct net_device *netdev);
206#endif
207
24025e4e
MC		 208#ifdef CONFIG_E1000_MQ
209/* for multiple Rx queues */
210void e1000_rx_schedule(void *data);
211#endif
212
1da177e4
LT		 213/* Exported from other modules */
214
215extern void e1000_check_options(struct e1000_adapter *adapter);
216
217static struct pci_driver e1000_driver = {
218 .name = e1000_driver_name,
219 .id_table = e1000_pci_tbl,
220 .probe = e1000_probe,
221 .remove = __devexit_p(e1000_remove),
222 /* Power Managment Hooks */
223#ifdef CONFIG_PM
224 .suspend = e1000_suspend,
225 .resume = e1000_resume
226#endif
227};
228
229MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
230MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
231MODULE_LICENSE("GPL");
232MODULE_VERSION(DRV_VERSION);
233
234static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
235module_param(debug, int, 0);
236MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
237
238/**
239 * e1000_init_module - Driver Registration Routine
240 *
241 * e1000_init_module is the first routine called when the driver is
242 * loaded. All it does is register with the PCI subsystem.
243 **/
244
245static int __init
246e1000_init_module(void)
247{
248 int ret;
249 printk(KERN_INFO "%s - version %s\n",
250 e1000_driver_string, e1000_driver_version);
251
252 printk(KERN_INFO "%s\n", e1000_copyright);
253
254 ret = pci_module_init(&e1000_driver);
8b378def 255
1da177e4
LT		 256 return ret;
257}
258
259module_init(e1000_init_module);
260
261/**
262 * e1000_exit_module - Driver Exit Cleanup Routine
263 *
264 * e1000_exit_module is called just before the driver is removed
265 * from memory.
266 **/
267
268static void __exit
269e1000_exit_module(void)
270{
1da177e4
LT		 271 pci_unregister_driver(&e1000_driver);
272}
273
274module_exit(e1000_exit_module);
275
276/**
277 * e1000_irq_disable - Mask off interrupt generation on the NIC
278 * @adapter: board private structure
279 **/
280
281static inline void
282e1000_irq_disable(struct e1000_adapter *adapter)
283{
284 atomic_inc(&adapter->irq_sem);
285 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
286 E1000_WRITE_FLUSH(&adapter->hw);
287 synchronize_irq(adapter->pdev->irq);
288}
289
290/**
291 * e1000_irq_enable - Enable default interrupt generation settings
292 * @adapter: board private structure
293 **/
294
295static inline void
296e1000_irq_enable(struct e1000_adapter *adapter)
297{
298 if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
299 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
300 E1000_WRITE_FLUSH(&adapter->hw);
301 }
302}
3ad2cc67
AB		 303
304static void
2d7edb92
MC		 305e1000_update_mng_vlan(struct e1000_adapter *adapter)
306{
307 struct net_device *netdev = adapter->netdev;
308 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
309 uint16_t old_vid = adapter->mng_vlan_id;
310 if(adapter->vlgrp) {
311 if(!adapter->vlgrp->vlan_devices[vid]) {
312 if(adapter->hw.mng_cookie.status &
313 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
314 e1000_vlan_rx_add_vid(netdev, vid);
315 adapter->mng_vlan_id = vid;
316 } else
317 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
318
319 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
320 (vid != old_vid) &&
321 !adapter->vlgrp->vlan_devices[old_vid])
322 e1000_vlan_rx_kill_vid(netdev, old_vid);
323 }
324 }
325}
b55ccb35
JK		 326
327/**
328 * e1000_release_hw_control - release control of the h/w to f/w
329 * @adapter: address of board private structure
330 *
331 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
332 * For ASF and Pass Through versions of f/w this means that the
333 * driver is no longer loaded. For AMT version (only with 82573) i
334 * of the f/w this means that the netowrk i/f is closed.
335 *
336 **/
337
338static inline void
339e1000_release_hw_control(struct e1000_adapter *adapter)
340{
341 uint32_t ctrl_ext;
342 uint32_t swsm;
343
344 /* Let firmware taken over control of h/w */
345 switch (adapter->hw.mac_type) {
346 case e1000_82571:
347 case e1000_82572:
348 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
349 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
350 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
351 break;
352 case e1000_82573:
353 swsm = E1000_READ_REG(&adapter->hw, SWSM);
354 E1000_WRITE_REG(&adapter->hw, SWSM,
355 swsm & ~E1000_SWSM_DRV_LOAD);
356 default:
357 break;
358 }
359}
360
361/**
362 * e1000_get_hw_control - get control of the h/w from f/w
363 * @adapter: address of board private structure
364 *
365 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
366 * For ASF and Pass Through versions of f/w this means that
367 * the driver is loaded. For AMT version (only with 82573)
368 * of the f/w this means that the netowrk i/f is open.
369 *
370 **/
371
372static inline void
373e1000_get_hw_control(struct e1000_adapter *adapter)
374{
375 uint32_t ctrl_ext;
376 uint32_t swsm;
377 /* Let firmware know the driver has taken over */
378 switch (adapter->hw.mac_type) {
379 case e1000_82571:
380 case e1000_82572:
381 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
382 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
383 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
384 break;
385 case e1000_82573:
386 swsm = E1000_READ_REG(&adapter->hw, SWSM);
387 E1000_WRITE_REG(&adapter->hw, SWSM,
388 swsm | E1000_SWSM_DRV_LOAD);
389 break;
390 default:
391 break;
392 }
393}
394
1da177e4
LT		 395int
396e1000_up(struct e1000_adapter *adapter)
397{
398 struct net_device *netdev = adapter->netdev;
581d708e 399 int i, err;
1da177e4
LT		 400
401 /* hardware has been reset, we need to reload some things */
402
403 /* Reset the PHY if it was previously powered down */
404 if(adapter->hw.media_type == e1000_media_type_copper) {
405 uint16_t mii_reg;
406 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
407 if(mii_reg & MII_CR_POWER_DOWN)
408 e1000_phy_reset(&adapter->hw);
409 }
410
411 e1000_set_multi(netdev);
412
413 e1000_restore_vlan(adapter);
414
415 e1000_configure_tx(adapter);
416 e1000_setup_rctl(adapter);
417 e1000_configure_rx(adapter);
72d64a43
JK		 418 /* call E1000_DESC_UNUSED which always leaves
419 * at least 1 descriptor unused to make sure
420 * next_to_use != next_to_clean */
f56799ea 421 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43
JK		 422 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
423 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
f56799ea 424 }
1da177e4 425
fa4f7ef3
MC		 426#ifdef CONFIG_PCI_MSI
427 if(adapter->hw.mac_type > e1000_82547_rev_2) {
428 adapter->have_msi = TRUE;
429 if((err = pci_enable_msi(adapter->pdev))) {
430 DPRINTK(PROBE, ERR,
431 "Unable to allocate MSI interrupt Error: %d\n", err);
432 adapter->have_msi = FALSE;
433 }
434 }
435#endif
1da177e4
LT		 436 if((err = request_irq(adapter->pdev->irq, &e1000_intr,
437 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 438 netdev->name, netdev))) {
439 DPRINTK(PROBE, ERR,
440 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 441 return err;
2648345f 442 }
1da177e4 443
7bfa4816
JK		 444#ifdef CONFIG_E1000_MQ
445 e1000_setup_queue_mapping(adapter);
446#endif
447
448 adapter->tx_queue_len = netdev->tx_queue_len;
449
1da177e4 450 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 451
452#ifdef CONFIG_E1000_NAPI
453 netif_poll_enable(netdev);
454#endif
5de55624
MC		 455 e1000_irq_enable(adapter);
456
1da177e4
LT		 457 return 0;
458}
459
460void
461e1000_down(struct e1000_adapter *adapter)
462{
463 struct net_device *netdev = adapter->netdev;
57128197
JK		 464 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
465 e1000_check_mng_mode(&adapter->hw);
1da177e4
LT		 466
467 e1000_irq_disable(adapter);
24025e4e
MC		 468#ifdef CONFIG_E1000_MQ
469 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
470#endif
1da177e4 471 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3
MC		 472#ifdef CONFIG_PCI_MSI
473 if(adapter->hw.mac_type > e1000_82547_rev_2 &&
474 adapter->have_msi == TRUE)
475 pci_disable_msi(adapter->pdev);
476#endif
1da177e4
LT		 477 del_timer_sync(&adapter->tx_fifo_stall_timer);
478 del_timer_sync(&adapter->watchdog_timer);
479 del_timer_sync(&adapter->phy_info_timer);
480
481#ifdef CONFIG_E1000_NAPI
482 netif_poll_disable(netdev);
483#endif
7bfa4816 484 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 485 adapter->link_speed = 0;
486 adapter->link_duplex = 0;
487 netif_carrier_off(netdev);
488 netif_stop_queue(netdev);
489
490 e1000_reset(adapter);
581d708e
MC		 491 e1000_clean_all_tx_rings(adapter);
492 e1000_clean_all_rx_rings(adapter);
1da177e4 493
57128197
JK		 494 /* Power down the PHY so no link is implied when interface is down *
495 * The PHY cannot be powered down if any of the following is TRUE *
496 * (a) WoL is enabled
497 * (b) AMT is active
498 * (c) SoL/IDER session is active */
499 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
2d7edb92 500 adapter->hw.media_type == e1000_media_type_copper &&
57128197
JK		 501 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
502 !mng_mode_enabled &&
503 !e1000_check_phy_reset_block(&adapter->hw)) {
1da177e4
LT		 504 uint16_t mii_reg;
505 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
506 mii_reg |= MII_CR_POWER_DOWN;
507 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 508 mdelay(1);
1da177e4
LT		 509 }
510}
511
512void
513e1000_reset(struct e1000_adapter *adapter)
514{
2d7edb92 515 uint32_t pba, manc;
1125ecbc 516 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 517
518 /* Repartition Pba for greater than 9k mtu
519 * To take effect CTRL.RST is required.
520 */
521
2d7edb92
MC		 522 switch (adapter->hw.mac_type) {
523 case e1000_82547:
0e6ef3e0 524 case e1000_82547_rev_2:
2d7edb92
MC		 525 pba = E1000_PBA_30K;
526 break;
868d5309
MC		 527 case e1000_82571:
528 case e1000_82572:
529 pba = E1000_PBA_38K;
530 break;
2d7edb92
MC		 531 case e1000_82573:
532 pba = E1000_PBA_12K;
533 break;
534 default:
535 pba = E1000_PBA_48K;
536 break;
537 }
538
1125ecbc 539 if((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 540 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 541 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 542
543
544 if(adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 545 adapter->tx_fifo_head = 0;
546 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
547 adapter->tx_fifo_size =
548 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
549 atomic_set(&adapter->tx_fifo_stall, 0);
550 }
2d7edb92 551
1da177e4
LT		 552 E1000_WRITE_REG(&adapter->hw, PBA, pba);
553
554 /* flow control settings */
f11b7f85
JK		 555 /* Set the FC high water mark to 90% of the FIFO size.
556 * Required to clear last 3 LSB */
557 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
558
559 adapter->hw.fc_high_water = fc_high_water_mark;
560 adapter->hw.fc_low_water = fc_high_water_mark - 8;
1da177e4
LT		 561 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
562 adapter->hw.fc_send_xon = 1;
563 adapter->hw.fc = adapter->hw.original_fc;
564
2d7edb92 565 /* Allow time for pending master requests to run */
1da177e4
LT		 566 e1000_reset_hw(&adapter->hw);
567 if(adapter->hw.mac_type >= e1000_82544)
568 E1000_WRITE_REG(&adapter->hw, WUC, 0);
569 if(e1000_init_hw(&adapter->hw))
570 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 571 e1000_update_mng_vlan(adapter);
1da177e4
LT		 572 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
573 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
574
575 e1000_reset_adaptive(&adapter->hw);
576 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 577 if (adapter->en_mng_pt) {
578 manc = E1000_READ_REG(&adapter->hw, MANC);
579 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
580 E1000_WRITE_REG(&adapter->hw, MANC, manc);
581 }
1da177e4
LT		 582}
583
584/**
585 * e1000_probe - Device Initialization Routine
586 * @pdev: PCI device information struct
587 * @ent: entry in e1000_pci_tbl
588 *
589 * Returns 0 on success, negative on failure
590 *
591 * e1000_probe initializes an adapter identified by a pci_dev structure.
592 * The OS initialization, configuring of the adapter private structure,
593 * and a hardware reset occur.
594 **/
595
596static int __devinit
597e1000_probe(struct pci_dev *pdev,
598 const struct pci_device_id *ent)
599{
600 struct net_device *netdev;
601 struct e1000_adapter *adapter;
2d7edb92 602 unsigned long mmio_start, mmio_len;
2d7edb92 603
1da177e4 604 static int cards_found = 0;
2d7edb92 605 int i, err, pci_using_dac;
1da177e4
LT		 606 uint16_t eeprom_data;
607 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
1da177e4
LT		 608 if((err = pci_enable_device(pdev)))
609 return err;
610
611 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
612 pci_using_dac = 1;
613 } else {
614 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
615 E1000_ERR("No usable DMA configuration, aborting\n");
616 return err;
617 }
618 pci_using_dac = 0;
619 }
620
621 if((err = pci_request_regions(pdev, e1000_driver_name)))
622 return err;
623
624 pci_set_master(pdev);
625
626 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
627 if(!netdev) {
628 err = -ENOMEM;
629 goto err_alloc_etherdev;
630 }
631
632 SET_MODULE_OWNER(netdev);
633 SET_NETDEV_DEV(netdev, &pdev->dev);
634
635 pci_set_drvdata(pdev, netdev);
60490fe0 636 adapter = netdev_priv(netdev);
1da177e4
LT		 637 adapter->netdev = netdev;
638 adapter->pdev = pdev;
639 adapter->hw.back = adapter;
640 adapter->msg_enable = (1 << debug) - 1;
641
642 mmio_start = pci_resource_start(pdev, BAR_0);
643 mmio_len = pci_resource_len(pdev, BAR_0);
644
645 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
646 if(!adapter->hw.hw_addr) {
647 err = -EIO;
648 goto err_ioremap;
649 }
650
651 for(i = BAR_1; i <= BAR_5; i++) {
652 if(pci_resource_len(pdev, i) == 0)
653 continue;
654 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
655 adapter->hw.io_base = pci_resource_start(pdev, i);
656 break;
657 }
658 }
659
660 netdev->open = &e1000_open;
661 netdev->stop = &e1000_close;
662 netdev->hard_start_xmit = &e1000_xmit_frame;
663 netdev->get_stats = &e1000_get_stats;
664 netdev->set_multicast_list = &e1000_set_multi;
665 netdev->set_mac_address = &e1000_set_mac;
666 netdev->change_mtu = &e1000_change_mtu;
667 netdev->do_ioctl = &e1000_ioctl;
668 e1000_set_ethtool_ops(netdev);
669 netdev->tx_timeout = &e1000_tx_timeout;
670 netdev->watchdog_timeo = 5 * HZ;
671#ifdef CONFIG_E1000_NAPI
672 netdev->poll = &e1000_clean;
673 netdev->weight = 64;
674#endif
675 netdev->vlan_rx_register = e1000_vlan_rx_register;
676 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
677 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
678#ifdef CONFIG_NET_POLL_CONTROLLER
679 netdev->poll_controller = e1000_netpoll;
680#endif
681 strcpy(netdev->name, pci_name(pdev));
682
683 netdev->mem_start = mmio_start;
684 netdev->mem_end = mmio_start + mmio_len;
685 netdev->base_addr = adapter->hw.io_base;
686
687 adapter->bd_number = cards_found;
688
689 /* setup the private structure */
690
691 if((err = e1000_sw_init(adapter)))
692 goto err_sw_init;
693
2d7edb92
MC		 694 if((err = e1000_check_phy_reset_block(&adapter->hw)))
695 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
696
1da177e4
LT		 697 if(adapter->hw.mac_type >= e1000_82543) {
698 netdev->features = NETIF_F_SG |
699 NETIF_F_HW_CSUM |
700 NETIF_F_HW_VLAN_TX |
701 NETIF_F_HW_VLAN_RX |
702 NETIF_F_HW_VLAN_FILTER;
703 }
704
705#ifdef NETIF_F_TSO
706 if((adapter->hw.mac_type >= e1000_82544) &&
707 (adapter->hw.mac_type != e1000_82547))
708 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 709
710#ifdef NETIF_F_TSO_IPV6
711 if(adapter->hw.mac_type > e1000_82547_rev_2)
712 netdev->features |= NETIF_F_TSO_IPV6;
713#endif
1da177e4
LT		 714#endif
715 if(pci_using_dac)
716 netdev->features |= NETIF_F_HIGHDMA;
717
718 /* hard_start_xmit is safe against parallel locking */
719 netdev->features |= NETIF_F_LLTX;
720
2d7edb92
MC		 721 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
722
1da177e4
LT		 723 /* before reading the EEPROM, reset the controller to
724 * put the device in a known good starting state */
725
726 e1000_reset_hw(&adapter->hw);
727
728 /* make sure the EEPROM is good */
729
730 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
731 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
732 err = -EIO;
733 goto err_eeprom;
734 }
735
736 /* copy the MAC address out of the EEPROM */
737
2648345f 738 if(e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 739 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
740 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 741 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 742
9beb0ac1 743 if(!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 744 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
745 err = -EIO;
746 goto err_eeprom;
747 }
748
749 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
750
751 e1000_get_bus_info(&adapter->hw);
752
753 init_timer(&adapter->tx_fifo_stall_timer);
754 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
755 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
756
757 init_timer(&adapter->watchdog_timer);
758 adapter->watchdog_timer.function = &e1000_watchdog;
759 adapter->watchdog_timer.data = (unsigned long) adapter;
760
761 INIT_WORK(&adapter->watchdog_task,
762 (void (*)(void *))e1000_watchdog_task, adapter);
763
764 init_timer(&adapter->phy_info_timer);
765 adapter->phy_info_timer.function = &e1000_update_phy_info;
766 adapter->phy_info_timer.data = (unsigned long) adapter;
767
768 INIT_WORK(&adapter->tx_timeout_task,
769 (void (*)(void *))e1000_tx_timeout_task, netdev);
770
771 /* we're going to reset, so assume we have no link for now */
772
773 netif_carrier_off(netdev);
774 netif_stop_queue(netdev);
775
776 e1000_check_options(adapter);
777
778 /* Initial Wake on LAN setting
779 * If APM wake is enabled in the EEPROM,
780 * enable the ACPI Magic Packet filter
781 */
782
783 switch(adapter->hw.mac_type) {
784 case e1000_82542_rev2_0:
785 case e1000_82542_rev2_1:
786 case e1000_82543:
787 break;
788 case e1000_82544:
789 e1000_read_eeprom(&adapter->hw,
790 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
791 eeprom_apme_mask = E1000_EEPROM_82544_APM;
792 break;
793 case e1000_82546:
794 case e1000_82546_rev_3:
fd803241 795 case e1000_82571:
b7ee49db 796 if(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 797 e1000_read_eeprom(&adapter->hw,
798 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
799 break;
800 }
801 /* Fall Through */
802 default:
803 e1000_read_eeprom(&adapter->hw,
804 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
805 break;
806 }
807 if(eeprom_data & eeprom_apme_mask)
808 adapter->wol |= E1000_WUFC_MAG;
809
810 /* reset the hardware with the new settings */
811 e1000_reset(adapter);
812
b55ccb35
JK		 813 /* If the controller is 82573 and f/w is AMT, do not set
814 * DRV_LOAD until the interface is up. For all other cases,
815 * let the f/w know that the h/w is now under the control
816 * of the driver. */
817 if (adapter->hw.mac_type != e1000_82573 ||
818 !e1000_check_mng_mode(&adapter->hw))
819 e1000_get_hw_control(adapter);
2d7edb92 820
1da177e4
LT		 821 strcpy(netdev->name, "eth%d");
822 if((err = register_netdev(netdev)))
823 goto err_register;
824
825 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
826
827 cards_found++;
828 return 0;
829
830err_register:
831err_sw_init:
832err_eeprom:
833 iounmap(adapter->hw.hw_addr);
834err_ioremap:
835 free_netdev(netdev);
836err_alloc_etherdev:
837 pci_release_regions(pdev);
838 return err;
839}
840
841/**
842 * e1000_remove - Device Removal Routine
843 * @pdev: PCI device information struct
844 *
845 * e1000_remove is called by the PCI subsystem to alert the driver
846 * that it should release a PCI device. The could be caused by a
847 * Hot-Plug event, or because the driver is going to be removed from
848 * memory.
849 **/
850
851static void __devexit
852e1000_remove(struct pci_dev *pdev)
853{
854 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 855 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 856 uint32_t manc;
581d708e
MC		 857#ifdef CONFIG_E1000_NAPI
858 int i;
859#endif
1da177e4 860
be2b28ed
JG		 861 flush_scheduled_work();
862
1da177e4
LT		 863 if(adapter->hw.mac_type >= e1000_82540 &&
864 adapter->hw.media_type == e1000_media_type_copper) {
865 manc = E1000_READ_REG(&adapter->hw, MANC);
866 if(manc & E1000_MANC_SMBUS_EN) {
867 manc |= E1000_MANC_ARP_EN;
868 E1000_WRITE_REG(&adapter->hw, MANC, manc);
869 }
870 }
871
b55ccb35
JK		 872 /* Release control of h/w to f/w. If f/w is AMT enabled, this
873 * would have already happened in close and is redundant. */
874 e1000_release_hw_control(adapter);
2d7edb92 875
1da177e4 876 unregister_netdev(netdev);
581d708e 877#ifdef CONFIG_E1000_NAPI
f56799ea 878 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 879 __dev_put(&adapter->polling_netdev[i]);
880#endif
1da177e4 881
2d7edb92
MC		 882 if(!e1000_check_phy_reset_block(&adapter->hw))
883 e1000_phy_hw_reset(&adapter->hw);
1da177e4 884
24025e4e
MC		 885 kfree(adapter->tx_ring);
886 kfree(adapter->rx_ring);
887#ifdef CONFIG_E1000_NAPI
888 kfree(adapter->polling_netdev);
889#endif
890
1da177e4
LT		 891 iounmap(adapter->hw.hw_addr);
892 pci_release_regions(pdev);
893
24025e4e
MC		 894#ifdef CONFIG_E1000_MQ
895 free_percpu(adapter->cpu_netdev);
896 free_percpu(adapter->cpu_tx_ring);
897#endif
1da177e4
LT		 898 free_netdev(netdev);
899
900 pci_disable_device(pdev);
901}
902
903/**
904 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
905 * @adapter: board private structure to initialize
906 *
907 * e1000_sw_init initializes the Adapter private data structure.
908 * Fields are initialized based on PCI device information and
909 * OS network device settings (MTU size).
910 **/
911
912static int __devinit
913e1000_sw_init(struct e1000_adapter *adapter)
914{
915 struct e1000_hw *hw = &adapter->hw;
916 struct net_device *netdev = adapter->netdev;
917 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 918#ifdef CONFIG_E1000_NAPI
919 int i;
920#endif
1da177e4
LT		 921
922 /* PCI config space info */
923
924 hw->vendor_id = pdev->vendor;
925 hw->device_id = pdev->device;
926 hw->subsystem_vendor_id = pdev->subsystem_vendor;
927 hw->subsystem_id = pdev->subsystem_device;
928
929 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
930
931 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
932
933 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 934 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 935 hw->max_frame_size = netdev->mtu +
936 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
937 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
938
939 /* identify the MAC */
940
941 if(e1000_set_mac_type(hw)) {
942 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
943 return -EIO;
944 }
945
946 /* initialize eeprom parameters */
947
2d7edb92
MC		 948 if(e1000_init_eeprom_params(hw)) {
949 E1000_ERR("EEPROM initialization failed\n");
950 return -EIO;
951 }
1da177e4
LT		 952
953 switch(hw->mac_type) {
954 default:
955 break;
956 case e1000_82541:
957 case e1000_82547:
958 case e1000_82541_rev_2:
959 case e1000_82547_rev_2:
960 hw->phy_init_script = 1;
961 break;
962 }
963
964 e1000_set_media_type(hw);
965
966 hw->wait_autoneg_complete = FALSE;
967 hw->tbi_compatibility_en = TRUE;
968 hw->adaptive_ifs = TRUE;
969
970 /* Copper options */
971
972 if(hw->media_type == e1000_media_type_copper) {
973 hw->mdix = AUTO_ALL_MODES;
974 hw->disable_polarity_correction = FALSE;
975 hw->master_slave = E1000_MASTER_SLAVE;
976 }
977
24025e4e
MC		 978#ifdef CONFIG_E1000_MQ
979 /* Number of supported queues */
980 switch (hw->mac_type) {
981 case e1000_82571:
982 case e1000_82572:
f56799ea
JK		 983 /* These controllers support 2 tx queues, but with a single
984 * qdisc implementation, multiple tx queues aren't quite as
985 * interesting. If we can find a logical way of mapping
986 * flows to a queue, then perhaps we can up the num_tx_queue
987 * count back to its default. Until then, we run the risk of
988 * terrible performance due to SACK overload. */
989 adapter->num_tx_queues = 1;
990 adapter->num_rx_queues = 2;
24025e4e
MC		 991 break;
992 default:
f56799ea
JK		 993 adapter->num_tx_queues = 1;
994 adapter->num_rx_queues = 1;
24025e4e
MC		 995 break;
996 }
f56799ea
JK		 997 adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
998 adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
7bfa4816
JK		 999 DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
1000 adapter->num_rx_queues,
1001 ((adapter->num_rx_queues == 1)
1002 ? ((num_online_cpus() > 1)
1003 ? "(due to unsupported feature in current adapter)"
1004 : "(due to unsupported system configuration)")
1005 : ""));
1006 DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
1007 adapter->num_tx_queues);
24025e4e 1008#else
f56799ea
JK		 1009 adapter->num_tx_queues = 1;
1010 adapter->num_rx_queues = 1;
24025e4e 1011#endif
581d708e
MC		 1012
1013 if (e1000_alloc_queues(adapter)) {
1014 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1015 return -ENOMEM;
1016 }
1017
1018#ifdef CONFIG_E1000_NAPI
f56799ea 1019 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1020 adapter->polling_netdev[i].priv = adapter;
1021 adapter->polling_netdev[i].poll = &e1000_clean;
1022 adapter->polling_netdev[i].weight = 64;
1023 dev_hold(&adapter->polling_netdev[i]);
1024 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1025 }
7bfa4816 1026 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1027#endif
1028
1da177e4
LT		 1029 atomic_set(&adapter->irq_sem, 1);
1030 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1031
1032 return 0;
1033}
1034
581d708e
MC		 1035/**
1036 * e1000_alloc_queues - Allocate memory for all rings
1037 * @adapter: board private structure to initialize
1038 *
1039 * We allocate one ring per queue at run-time since we don't know the
1040 * number of queues at compile-time. The polling_netdev array is
1041 * intended for Multiqueue, but should work fine with a single queue.
1042 **/
1043
1044static int __devinit
1045e1000_alloc_queues(struct e1000_adapter *adapter)
1046{
1047 int size;
1048
f56799ea 1049 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1050 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1051 if (!adapter->tx_ring)
1052 return -ENOMEM;
1053 memset(adapter->tx_ring, 0, size);
1054
f56799ea 1055 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1056 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1057 if (!adapter->rx_ring) {
1058 kfree(adapter->tx_ring);
1059 return -ENOMEM;
1060 }
1061 memset(adapter->rx_ring, 0, size);
1062
1063#ifdef CONFIG_E1000_NAPI
f56799ea 1064 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1065 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1066 if (!adapter->polling_netdev) {
1067 kfree(adapter->tx_ring);
1068 kfree(adapter->rx_ring);
1069 return -ENOMEM;
1070 }
1071 memset(adapter->polling_netdev, 0, size);
1072#endif
1073
7bfa4816
JK		 1074#ifdef CONFIG_E1000_MQ
1075 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1076 adapter->rx_sched_call_data.info = adapter->netdev;
1077
1078 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1079 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1080#endif
1081
581d708e
MC		 1082 return E1000_SUCCESS;
1083}
1084
24025e4e
MC		 1085#ifdef CONFIG_E1000_MQ
1086static void __devinit
1087e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1088{
1089 int i, cpu;
1090
1091 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1092 adapter->rx_sched_call_data.info = adapter->netdev;
1093 cpus_clear(adapter->rx_sched_call_data.cpumask);
1094
1095 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1096 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1097
1098 lock_cpu_hotplug();
1099 i = 0;
1100 for_each_online_cpu(cpu) {
f56799ea 1101 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
24025e4e
MC		 1102 /* This is incomplete because we'd like to assign separate
1103 * physical cpus to these netdev polling structures and
1104 * avoid saturating a subset of cpus.
1105 */
f56799ea 1106 if (i < adapter->num_rx_queues) {
24025e4e 1107 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
7bfa4816
JK		 1108 adapter->rx_ring[i].cpu = cpu;
1109 cpu_set(cpu, adapter->cpumask);
24025e4e
MC		 1110 } else
1111 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1112
1113 i++;
1114 }
1115 unlock_cpu_hotplug();
1116}
1117#endif
1118
1da177e4
LT		 1119/**
1120 * e1000_open - Called when a network interface is made active
1121 * @netdev: network interface device structure
1122 *
1123 * Returns 0 on success, negative value on failure
1124 *
1125 * The open entry point is called when a network interface is made
1126 * active by the system (IFF_UP). At this point all resources needed
1127 * for transmit and receive operations are allocated, the interrupt
1128 * handler is registered with the OS, the watchdog timer is started,
1129 * and the stack is notified that the interface is ready.
1130 **/
1131
1132static int
1133e1000_open(struct net_device *netdev)
1134{
60490fe0 1135 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1136 int err;
1137
1138 /* allocate transmit descriptors */
1139
581d708e 1140 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1141 goto err_setup_tx;
1142
1143 /* allocate receive descriptors */
1144
581d708e 1145 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1146 goto err_setup_rx;
1147
1148 if((err = e1000_up(adapter)))
1149 goto err_up;
2d7edb92
MC		 1150 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1151 if((adapter->hw.mng_cookie.status &
1152 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1153 e1000_update_mng_vlan(adapter);
1154 }
1da177e4 1155
b55ccb35
JK		 1156 /* If AMT is enabled, let the firmware know that the network
1157 * interface is now open */
1158 if (adapter->hw.mac_type == e1000_82573 &&
1159 e1000_check_mng_mode(&adapter->hw))
1160 e1000_get_hw_control(adapter);
1161
1da177e4
LT		 1162 return E1000_SUCCESS;
1163
1164err_up:
581d708e 1165 e1000_free_all_rx_resources(adapter);
1da177e4 1166err_setup_rx:
581d708e 1167 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1168err_setup_tx:
1169 e1000_reset(adapter);
1170
1171 return err;
1172}
1173
1174/**
1175 * e1000_close - Disables a network interface
1176 * @netdev: network interface device structure
1177 *
1178 * Returns 0, this is not allowed to fail
1179 *
1180 * The close entry point is called when an interface is de-activated
1181 * by the OS. The hardware is still under the drivers control, but
1182 * needs to be disabled. A global MAC reset is issued to stop the
1183 * hardware, and all transmit and receive resources are freed.
1184 **/
1185
1186static int
1187e1000_close(struct net_device *netdev)
1188{
60490fe0 1189 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1190
1191 e1000_down(adapter);
1192
581d708e
MC		 1193 e1000_free_all_tx_resources(adapter);
1194 e1000_free_all_rx_resources(adapter);
1da177e4 1195
2d7edb92
MC		 1196 if((adapter->hw.mng_cookie.status &
1197 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1198 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1199 }
b55ccb35
JK		 1200
1201 /* If AMT is enabled, let the firmware know that the network
1202 * interface is now closed */
1203 if (adapter->hw.mac_type == e1000_82573 &&
1204 e1000_check_mng_mode(&adapter->hw))
1205 e1000_release_hw_control(adapter);
1206
1da177e4
LT		 1207 return 0;
1208}
1209
1210/**
1211 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1212 * @adapter: address of board private structure
2d7edb92
MC		 1213 * @start: address of beginning of memory
1214 * @len: length of memory
1da177e4
LT		 1215 **/
1216static inline boolean_t
1217e1000_check_64k_bound(struct e1000_adapter *adapter,
1218 void *start, unsigned long len)
1219{
1220 unsigned long begin = (unsigned long) start;
1221 unsigned long end = begin + len;
1222
2648345f
MC		 1223 /* First rev 82545 and 82546 need to not allow any memory
1224 * write location to cross 64k boundary due to errata 23 */
1da177e4 1225 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1226 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1227 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1228 }
1229
1230 return TRUE;
1231}
1232
1233/**
1234 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1235 * @adapter: board private structure
581d708e 1236 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1237 *
1238 * Return 0 on success, negative on failure
1239 **/
1240
3ad2cc67 1241static int
581d708e
MC		 1242e1000_setup_tx_resources(struct e1000_adapter *adapter,
1243 struct e1000_tx_ring *txdr)
1da177e4 1244{
1da177e4
LT		 1245 struct pci_dev *pdev = adapter->pdev;
1246 int size;
1247
1248 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1249
1250 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1da177e4 1251 if(!txdr->buffer_info) {
2648345f
MC		 1252 DPRINTK(PROBE, ERR,
1253 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1254 return -ENOMEM;
1255 }
1256 memset(txdr->buffer_info, 0, size);
1257
1258 /* round up to nearest 4K */
1259
1260 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1261 E1000_ROUNDUP(txdr->size, 4096);
1262
1263 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1264 if(!txdr->desc) {
1265setup_tx_desc_die:
1da177e4 1266 vfree(txdr->buffer_info);
2648345f
MC		 1267 DPRINTK(PROBE, ERR,
1268 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1269 return -ENOMEM;
1270 }
1271
2648345f 1272 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1273 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1274 void *olddesc = txdr->desc;
1275 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1276 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1277 "at %p\n", txdr->size, txdr->desc);
1278 /* Try again, without freeing the previous */
1da177e4 1279 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1da177e4 1280 if(!txdr->desc) {
2648345f 1281 /* Failed allocation, critical failure */
1da177e4
LT		 1282 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1283 goto setup_tx_desc_die;
1284 }
1285
1286 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1287 /* give up */
2648345f
MC		 1288 pci_free_consistent(pdev, txdr->size, txdr->desc,
1289 txdr->dma);
1da177e4
LT		 1290 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1291 DPRINTK(PROBE, ERR,
2648345f
MC		 1292 "Unable to allocate aligned memory "
1293 "for the transmit descriptor ring\n");
1da177e4
LT		 1294 vfree(txdr->buffer_info);
1295 return -ENOMEM;
1296 } else {
2648345f 1297 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1298 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1299 }
1300 }
1301 memset(txdr->desc, 0, txdr->size);
1302
1303 txdr->next_to_use = 0;
1304 txdr->next_to_clean = 0;
2ae76d98 1305 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1306
1307 return 0;
1308}
1309
581d708e
MC		 1310/**
1311 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1312 * (Descriptors) for all queues
1313 * @adapter: board private structure
1314 *
1315 * If this function returns with an error, then it's possible one or
1316 * more of the rings is populated (while the rest are not). It is the
1317 * callers duty to clean those orphaned rings.
1318 *
1319 * Return 0 on success, negative on failure
1320 **/
1321
1322int
1323e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1324{
1325 int i, err = 0;
1326
f56799ea 1327 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1328 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1329 if (err) {
1330 DPRINTK(PROBE, ERR,
1331 "Allocation for Tx Queue %u failed\n", i);
1332 break;
1333 }
1334 }
1335
1336 return err;
1337}
1338
1da177e4
LT		 1339/**
1340 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1341 * @adapter: board private structure
1342 *
1343 * Configure the Tx unit of the MAC after a reset.
1344 **/
1345
1346static void
1347e1000_configure_tx(struct e1000_adapter *adapter)
1348{
581d708e
MC		 1349 uint64_t tdba;
1350 struct e1000_hw *hw = &adapter->hw;
1351 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1352 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1353
1354 /* Setup the HW Tx Head and Tail descriptor pointers */
1355
f56799ea 1356 switch (adapter->num_tx_queues) {
24025e4e
MC		 1357 case 2:
1358 tdba = adapter->tx_ring[1].dma;
1359 tdlen = adapter->tx_ring[1].count *
1360 sizeof(struct e1000_tx_desc);
1361 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1362 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1363 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1364 E1000_WRITE_REG(hw, TDH1, 0);
1365 E1000_WRITE_REG(hw, TDT1, 0);
1366 adapter->tx_ring[1].tdh = E1000_TDH1;
1367 adapter->tx_ring[1].tdt = E1000_TDT1;
1368 /* Fall Through */
1369 case 1:
1370 default:
581d708e
MC		 1371 tdba = adapter->tx_ring[0].dma;
1372 tdlen = adapter->tx_ring[0].count *
1373 sizeof(struct e1000_tx_desc);
1374 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1375 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1376 E1000_WRITE_REG(hw, TDLEN, tdlen);
1377 E1000_WRITE_REG(hw, TDH, 0);
1378 E1000_WRITE_REG(hw, TDT, 0);
1379 adapter->tx_ring[0].tdh = E1000_TDH;
1380 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1381 break;
1382 }
1da177e4
LT		 1383
1384 /* Set the default values for the Tx Inter Packet Gap timer */
1385
0fadb059
JK		 1386 if (hw->media_type == e1000_media_type_fiber ||
1387 hw->media_type == e1000_media_type_internal_serdes)
1388 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1389 else
1390 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1391
581d708e 1392 switch (hw->mac_type) {
1da177e4
LT		 1393 case e1000_82542_rev2_0:
1394 case e1000_82542_rev2_1:
1395 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1396 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1397 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1398 break;
1399 default:
0fadb059
JK		 1400 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1401 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1402 break;
1da177e4 1403 }
0fadb059
JK		 1404 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1405 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1406 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1407
1408 /* Set the Tx Interrupt Delay register */
1409
581d708e
MC		 1410 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1411 if (hw->mac_type >= e1000_82540)
1412 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1413
1414 /* Program the Transmit Control Register */
1415
581d708e 1416 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1417
1418 tctl &= ~E1000_TCTL_CT;
24025e4e 1419 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1420 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1421
581d708e 1422 E1000_WRITE_REG(hw, TCTL, tctl);
1da177e4 1423
2ae76d98
MC		 1424 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1425 tarc = E1000_READ_REG(hw, TARC0);
1426 tarc |= ((1 << 25) | (1 << 21));
1427 E1000_WRITE_REG(hw, TARC0, tarc);
1428 tarc = E1000_READ_REG(hw, TARC1);
1429 tarc |= (1 << 25);
1430 if (tctl & E1000_TCTL_MULR)
1431 tarc &= ~(1 << 28);
1432 else
1433 tarc |= (1 << 28);
1434 E1000_WRITE_REG(hw, TARC1, tarc);
1435 }
1436
581d708e 1437 e1000_config_collision_dist(hw);
1da177e4
LT		 1438
1439 /* Setup Transmit Descriptor Settings for eop descriptor */
1440 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1441 E1000_TXD_CMD_IFCS;
1442
581d708e 1443 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1444 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1445 else
1446 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1447
1448 /* Cache if we're 82544 running in PCI-X because we'll
1449 * need this to apply a workaround later in the send path. */
581d708e
MC		 1450 if (hw->mac_type == e1000_82544 &&
1451 hw->bus_type == e1000_bus_type_pcix)
1da177e4
LT		 1452 adapter->pcix_82544 = 1;
1453}
1454
1455/**
1456 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1457 * @adapter: board private structure
581d708e 1458 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1459 *
1460 * Returns 0 on success, negative on failure
1461 **/
1462
3ad2cc67 1463static int
581d708e
MC		 1464e1000_setup_rx_resources(struct e1000_adapter *adapter,
1465 struct e1000_rx_ring *rxdr)
1da177e4 1466{
1da177e4 1467 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1468 int size, desc_len;
1da177e4
LT		 1469
1470 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1471 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1472 if (!rxdr->buffer_info) {
2648345f
MC		 1473 DPRINTK(PROBE, ERR,
1474 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1475 return -ENOMEM;
1476 }
1477 memset(rxdr->buffer_info, 0, size);
1478
2d7edb92
MC		 1479 size = sizeof(struct e1000_ps_page) * rxdr->count;
1480 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1481 if(!rxdr->ps_page) {
1482 vfree(rxdr->buffer_info);
1483 DPRINTK(PROBE, ERR,
1484 "Unable to allocate memory for the receive descriptor ring\n");
1485 return -ENOMEM;
1486 }
1487 memset(rxdr->ps_page, 0, size);
1488
1489 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1490 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1491 if(!rxdr->ps_page_dma) {
1492 vfree(rxdr->buffer_info);
1493 kfree(rxdr->ps_page);
1494 DPRINTK(PROBE, ERR,
1495 "Unable to allocate memory for the receive descriptor ring\n");
1496 return -ENOMEM;
1497 }
1498 memset(rxdr->ps_page_dma, 0, size);
1499
1500 if(adapter->hw.mac_type <= e1000_82547_rev_2)
1501 desc_len = sizeof(struct e1000_rx_desc);
1502 else
1503 desc_len = sizeof(union e1000_rx_desc_packet_split);
1504
1da177e4
LT		 1505 /* Round up to nearest 4K */
1506
2d7edb92 1507 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1508 E1000_ROUNDUP(rxdr->size, 4096);
1509
1510 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1511
581d708e
MC		 1512 if (!rxdr->desc) {
1513 DPRINTK(PROBE, ERR,
1514 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1515setup_rx_desc_die:
1da177e4 1516 vfree(rxdr->buffer_info);
2d7edb92
MC		 1517 kfree(rxdr->ps_page);
1518 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1519 return -ENOMEM;
1520 }
1521
2648345f 1522 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1523 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1524 void *olddesc = rxdr->desc;
1525 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1526 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1527 "at %p\n", rxdr->size, rxdr->desc);
1528 /* Try again, without freeing the previous */
1da177e4 1529 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1530 /* Failed allocation, critical failure */
581d708e 1531 if (!rxdr->desc) {
1da177e4 1532 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1533 DPRINTK(PROBE, ERR,
1534 "Unable to allocate memory "
1535 "for the receive descriptor ring\n");
1da177e4
LT		 1536 goto setup_rx_desc_die;
1537 }
1538
1539 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1540 /* give up */
2648345f
MC		 1541 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1542 rxdr->dma);
1da177e4 1543 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1544 DPRINTK(PROBE, ERR,
1545 "Unable to allocate aligned memory "
1546 "for the receive descriptor ring\n");
581d708e 1547 goto setup_rx_desc_die;
1da177e4 1548 } else {
2648345f 1549 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1550 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1551 }
1552 }
1553 memset(rxdr->desc, 0, rxdr->size);
1554
1555 rxdr->next_to_clean = 0;
1556 rxdr->next_to_use = 0;
997f5cbd
JK		 1557 rxdr->rx_skb_top = NULL;
1558 rxdr->rx_skb_prev = NULL;
1da177e4
LT		 1559
1560 return 0;
1561}
1562
581d708e
MC		 1563/**
1564 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1565 * (Descriptors) for all queues
1566 * @adapter: board private structure
1567 *
1568 * If this function returns with an error, then it's possible one or
1569 * more of the rings is populated (while the rest are not). It is the
1570 * callers duty to clean those orphaned rings.
1571 *
1572 * Return 0 on success, negative on failure
1573 **/
1574
1575int
1576e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1577{
1578 int i, err = 0;
1579
f56799ea 1580 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1581 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1582 if (err) {
1583 DPRINTK(PROBE, ERR,
1584 "Allocation for Rx Queue %u failed\n", i);
1585 break;
1586 }
1587 }
1588
1589 return err;
1590}
1591
1da177e4 1592/**
2648345f 1593 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1594 * @adapter: Board private structure
1595 **/
e4c811c9
MC		 1596#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1597 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1598static void
1599e1000_setup_rctl(struct e1000_adapter *adapter)
1600{
2d7edb92
MC		 1601 uint32_t rctl, rfctl;
1602 uint32_t psrctl = 0;
e4c811c9
MC		 1603#ifdef CONFIG_E1000_PACKET_SPLIT
1604 uint32_t pages = 0;
1605#endif
1da177e4
LT		 1606
1607 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1608
1609 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1610
1611 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1612 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1613 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1614
0fadb059
JK		 1615 if (adapter->hw.mac_type > e1000_82543)
1616 rctl |= E1000_RCTL_SECRC;
1617
1618 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1619 rctl |= E1000_RCTL_SBP;
1620 else
1621 rctl &= ~E1000_RCTL_SBP;
1622
2d7edb92
MC		 1623 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1624 rctl &= ~E1000_RCTL_LPE;
1625 else
1626 rctl |= E1000_RCTL_LPE;
1627
1da177e4 1628 /* Setup buffer sizes */
868d5309 1629 if(adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1630 /* We can now specify buffers in 1K increments.
1631 * BSIZE and BSEX are ignored in this case. */
1632 rctl |= adapter->rx_buffer_len << 0x11;
1633 } else {
1634 rctl &= ~E1000_RCTL_SZ_4096;
1635 rctl |= E1000_RCTL_BSEX;
1636 switch (adapter->rx_buffer_len) {
1637 case E1000_RXBUFFER_2048:
1638 default:
1639 rctl |= E1000_RCTL_SZ_2048;
1640 rctl &= ~E1000_RCTL_BSEX;
1641 break;
1642 case E1000_RXBUFFER_4096:
1643 rctl |= E1000_RCTL_SZ_4096;
1644 break;
1645 case E1000_RXBUFFER_8192:
1646 rctl |= E1000_RCTL_SZ_8192;
1647 break;
1648 case E1000_RXBUFFER_16384:
1649 rctl |= E1000_RCTL_SZ_16384;
1650 break;
1651 }
1652 }
1653
1654#ifdef CONFIG_E1000_PACKET_SPLIT
1655 /* 82571 and greater support packet-split where the protocol
1656 * header is placed in skb->data and the packet data is
1657 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1658 * In the case of a non-split, skb->data is linearly filled,
1659 * followed by the page buffers. Therefore, skb->data is
1660 * sized to hold the largest protocol header.
1661 */
e4c811c9
MC		 1662 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1663 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1664 PAGE_SIZE <= 16384)
1665 adapter->rx_ps_pages = pages;
1666 else
1667 adapter->rx_ps_pages = 0;
2d7edb92 1668#endif
e4c811c9 1669 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1670 /* Configure extra packet-split registers */
1671 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1672 rfctl |= E1000_RFCTL_EXTEN;
1673 /* disable IPv6 packet split support */
1674 rfctl |= E1000_RFCTL_IPV6_DIS;
1675 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1676
1677 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1678
1679 psrctl |= adapter->rx_ps_bsize0 >>
1680 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1681
1682 switch (adapter->rx_ps_pages) {
1683 case 3:
1684 psrctl |= PAGE_SIZE <<
1685 E1000_PSRCTL_BSIZE3_SHIFT;
1686 case 2:
1687 psrctl |= PAGE_SIZE <<
1688 E1000_PSRCTL_BSIZE2_SHIFT;
1689 case 1:
1690 psrctl |= PAGE_SIZE >>
1691 E1000_PSRCTL_BSIZE1_SHIFT;
1692 break;
1693 }
2d7edb92
MC		 1694
1695 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1696 }
1697
1698 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1699}
1700
1701/**
1702 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1703 * @adapter: board private structure
1704 *
1705 * Configure the Rx unit of the MAC after a reset.
1706 **/
1707
1708static void
1709e1000_configure_rx(struct e1000_adapter *adapter)
1710{
581d708e
MC		 1711 uint64_t rdba;
1712 struct e1000_hw *hw = &adapter->hw;
1713 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1714#ifdef CONFIG_E1000_MQ
1715 uint32_t reta, mrqc;
1716 int i;
1717#endif
2d7edb92 1718
e4c811c9 1719 if (adapter->rx_ps_pages) {
581d708e 1720 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1721 sizeof(union e1000_rx_desc_packet_split);
1722 adapter->clean_rx = e1000_clean_rx_irq_ps;
1723 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1724 } else {
581d708e
MC		 1725 rdlen = adapter->rx_ring[0].count *
1726 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1727 adapter->clean_rx = e1000_clean_rx_irq;
1728 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1729 }
1da177e4
LT		 1730
1731 /* disable receives while setting up the descriptors */
581d708e
MC		 1732 rctl = E1000_READ_REG(hw, RCTL);
1733 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1734
1735 /* set the Receive Delay Timer Register */
581d708e 1736 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1737
581d708e
MC		 1738 if (hw->mac_type >= e1000_82540) {
1739 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1da177e4 1740 if(adapter->itr > 1)
581d708e 1741 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1742 1000000000 / (adapter->itr * 256));
1743 }
1744
2ae76d98 1745 if (hw->mac_type >= e1000_82571) {
2ae76d98 1746 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1747 /* Reset delay timers after every interrupt */
2ae76d98 1748 ctrl_ext |= E1000_CTRL_EXT_CANC;
1e613fd9
JK		 1749#ifdef CONFIG_E1000_NAPI
1750 /* Auto-Mask interrupts upon ICR read. */
1751 ctrl_ext |= E1000_CTRL_EXT_IAME;
1752#endif
2ae76d98 1753 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1754 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1755 E1000_WRITE_FLUSH(hw);
1756 }
1757
581d708e
MC		 1758 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1759 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1760 switch (adapter->num_rx_queues) {
24025e4e
MC		 1761#ifdef CONFIG_E1000_MQ
1762 case 2:
1763 rdba = adapter->rx_ring[1].dma;
1764 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1765 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1766 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1767 E1000_WRITE_REG(hw, RDH1, 0);
1768 E1000_WRITE_REG(hw, RDT1, 0);
1769 adapter->rx_ring[1].rdh = E1000_RDH1;
1770 adapter->rx_ring[1].rdt = E1000_RDT1;
1771 /* Fall Through */
1772#endif
1773 case 1:
1774 default:
581d708e
MC		 1775 rdba = adapter->rx_ring[0].dma;
1776 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1777 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1778 E1000_WRITE_REG(hw, RDLEN, rdlen);
1779 E1000_WRITE_REG(hw, RDH, 0);
1780 E1000_WRITE_REG(hw, RDT, 0);
1781 adapter->rx_ring[0].rdh = E1000_RDH;
1782 adapter->rx_ring[0].rdt = E1000_RDT;
1783 break;
24025e4e
MC		 1784 }
1785
1786#ifdef CONFIG_E1000_MQ
f56799ea 1787 if (adapter->num_rx_queues > 1) {
24025e4e
MC		 1788 uint32_t random[10];
1789
1790 get_random_bytes(&random[0], 40);
1791
1792 if (hw->mac_type <= e1000_82572) {
1793 E1000_WRITE_REG(hw, RSSIR, 0);
1794 E1000_WRITE_REG(hw, RSSIM, 0);
1795 }
1796
f56799ea 1797 switch (adapter->num_rx_queues) {
24025e4e
MC		 1798 case 2:
1799 default:
1800 reta = 0x00800080;
1801 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1802 break;
1803 }
1804
1805 /* Fill out redirection table */
1806 for (i = 0; i < 32; i++)
1807 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1808 /* Fill out hash function seeds */
1809 for (i = 0; i < 10; i++)
1810 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1811
1812 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1813 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1814 E1000_WRITE_REG(hw, MRQC, mrqc);
1815 }
1816
1817 /* Multiqueue and packet checksumming are mutually exclusive. */
1818 if (hw->mac_type >= e1000_82571) {
1819 rxcsum = E1000_READ_REG(hw, RXCSUM);
1820 rxcsum |= E1000_RXCSUM_PCSD;
1821 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1822 }
1823
1824#else
1da177e4
LT		 1825
1826 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1827 if (hw->mac_type >= e1000_82543) {
1828 rxcsum = E1000_READ_REG(hw, RXCSUM);
2d7edb92
MC		 1829 if(adapter->rx_csum == TRUE) {
1830 rxcsum |= E1000_RXCSUM_TUOFL;
1831
868d5309 1832 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1833 * Must be used in conjunction with packet-split. */
e4c811c9
MC		 1834 if ((hw->mac_type >= e1000_82571) &&
1835 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1836 rxcsum |= E1000_RXCSUM_IPPCSE;
1837 }
1838 } else {
1839 rxcsum &= ~E1000_RXCSUM_TUOFL;
1840 /* don't need to clear IPPCSE as it defaults to 0 */
1841 }
581d708e 1842 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4 1843 }
24025e4e 1844#endif /* CONFIG_E1000_MQ */
1da177e4 1845
581d708e
MC		 1846 if (hw->mac_type == e1000_82573)
1847 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1848
1da177e4 1849 /* Enable Receives */
581d708e 1850 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1851}
1852
1853/**
581d708e 1854 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1855 * @adapter: board private structure
581d708e 1856 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1857 *
1858 * Free all transmit software resources
1859 **/
1860
3ad2cc67 1861static void
581d708e
MC		 1862e1000_free_tx_resources(struct e1000_adapter *adapter,
1863 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1864{
1865 struct pci_dev *pdev = adapter->pdev;
1866
581d708e 1867 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1868
581d708e
MC		 1869 vfree(tx_ring->buffer_info);
1870 tx_ring->buffer_info = NULL;
1da177e4 1871
581d708e 1872 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1873
581d708e
MC		 1874 tx_ring->desc = NULL;
1875}
1876
1877/**
1878 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1879 * @adapter: board private structure
1880 *
1881 * Free all transmit software resources
1882 **/
1883
1884void
1885e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1886{
1887 int i;
1888
f56799ea 1889 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1890 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1891}
1892
1893static inline void
1894e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1895 struct e1000_buffer *buffer_info)
1896{
1da177e4 1897 if(buffer_info->dma) {
2648345f
MC		 1898 pci_unmap_page(adapter->pdev,
1899 buffer_info->dma,
1900 buffer_info->length,
1901 PCI_DMA_TODEVICE);
1da177e4
LT		 1902 buffer_info->dma = 0;
1903 }
1904 if(buffer_info->skb) {
1905 dev_kfree_skb_any(buffer_info->skb);
1906 buffer_info->skb = NULL;
1907 }
1908}
1909
1910/**
1911 * e1000_clean_tx_ring - Free Tx Buffers
1912 * @adapter: board private structure
581d708e 1913 * @tx_ring: ring to be cleaned
1da177e4
LT		 1914 **/
1915
1916static void
581d708e
MC		 1917e1000_clean_tx_ring(struct e1000_adapter *adapter,
1918 struct e1000_tx_ring *tx_ring)
1da177e4 1919{
1da177e4
LT		 1920 struct e1000_buffer *buffer_info;
1921 unsigned long size;
1922 unsigned int i;
1923
1924 /* Free all the Tx ring sk_buffs */
1925
1da177e4
LT		 1926 for(i = 0; i < tx_ring->count; i++) {
1927 buffer_info = &tx_ring->buffer_info[i];
1928 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1929 }
1930
1931 size = sizeof(struct e1000_buffer) * tx_ring->count;
1932 memset(tx_ring->buffer_info, 0, size);
1933
1934 /* Zero out the descriptor ring */
1935
1936 memset(tx_ring->desc, 0, tx_ring->size);
1937
1938 tx_ring->next_to_use = 0;
1939 tx_ring->next_to_clean = 0;
fd803241 1940 tx_ring->last_tx_tso = 0;
1da177e4 1941
581d708e
MC		 1942 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1943 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1944}
1945
1946/**
1947 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1948 * @adapter: board private structure
1949 **/
1950
1951static void
1952e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1953{
1954 int i;
1955
f56799ea 1956 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1957 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1958}
1959
1960/**
1961 * e1000_free_rx_resources - Free Rx Resources
1962 * @adapter: board private structure
581d708e 1963 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1964 *
1965 * Free all receive software resources
1966 **/
1967
3ad2cc67 1968static void
581d708e
MC		 1969e1000_free_rx_resources(struct e1000_adapter *adapter,
1970 struct e1000_rx_ring *rx_ring)
1da177e4 1971{
1da177e4
LT		 1972 struct pci_dev *pdev = adapter->pdev;
1973
581d708e 1974 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1975
1976 vfree(rx_ring->buffer_info);
1977 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1978 kfree(rx_ring->ps_page);
1979 rx_ring->ps_page = NULL;
1980 kfree(rx_ring->ps_page_dma);
1981 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1982
1983 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1984
1985 rx_ring->desc = NULL;
1986}
1987
1988/**
581d708e 1989 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1990 * @adapter: board private structure
581d708e
MC		 1991 *
1992 * Free all receive software resources
1993 **/
1994
1995void
1996e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1997{
1998 int i;
1999
f56799ea 2000 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2001 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2002}
2003
2004/**
2005 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2006 * @adapter: board private structure
2007 * @rx_ring: ring to free buffers from
1da177e4
LT		 2008 **/
2009
2010static void
581d708e
MC		 2011e1000_clean_rx_ring(struct e1000_adapter *adapter,
2012 struct e1000_rx_ring *rx_ring)
1da177e4 2013{
1da177e4 2014 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2015 struct e1000_ps_page *ps_page;
2016 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2017 struct pci_dev *pdev = adapter->pdev;
2018 unsigned long size;
2d7edb92 2019 unsigned int i, j;
1da177e4
LT		 2020
2021 /* Free all the Rx ring sk_buffs */
2022
2023 for(i = 0; i < rx_ring->count; i++) {
2024 buffer_info = &rx_ring->buffer_info[i];
2025 if(buffer_info->skb) {
2d7edb92
MC		 2026 ps_page = &rx_ring->ps_page[i];
2027 ps_page_dma = &rx_ring->ps_page_dma[i];
1da177e4
LT		 2028 pci_unmap_single(pdev,
2029 buffer_info->dma,
2030 buffer_info->length,
2031 PCI_DMA_FROMDEVICE);
2032
2033 dev_kfree_skb(buffer_info->skb);
2034 buffer_info->skb = NULL;
997f5cbd
JK		 2035 }
2036 ps_page = &rx_ring->ps_page[i];
2037 ps_page_dma = &rx_ring->ps_page_dma[i];
2038 for (j = 0; j < adapter->rx_ps_pages; j++) {
2039 if (!ps_page->ps_page[j]) break;
2040 pci_unmap_page(pdev,
2041 ps_page_dma->ps_page_dma[j],
2042 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2043 ps_page_dma->ps_page_dma[j] = 0;
2044 put_page(ps_page->ps_page[j]);
2045 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2046 }
2047 }
2048
997f5cbd
JK		 2049 /* there also may be some cached data in our adapter */
2050 if (rx_ring->rx_skb_top) {
2051 dev_kfree_skb(rx_ring->rx_skb_top);
2052
2053 /* rx_skb_prev will be wiped out by rx_skb_top */
2054 rx_ring->rx_skb_top = NULL;
2055 rx_ring->rx_skb_prev = NULL;
2056 }
2057
2058
1da177e4
LT		 2059 size = sizeof(struct e1000_buffer) * rx_ring->count;
2060 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2061 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2062 memset(rx_ring->ps_page, 0, size);
2063 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2064 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2065
2066 /* Zero out the descriptor ring */
2067
2068 memset(rx_ring->desc, 0, rx_ring->size);
2069
2070 rx_ring->next_to_clean = 0;
2071 rx_ring->next_to_use = 0;
2072
581d708e
MC		 2073 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2074 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2075}
2076
2077/**
2078 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2079 * @adapter: board private structure
2080 **/
2081
2082static void
2083e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2084{
2085 int i;
2086
f56799ea 2087 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2088 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2089}
2090
2091/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2092 * and memory write and invalidate disabled for certain operations
2093 */
2094static void
2095e1000_enter_82542_rst(struct e1000_adapter *adapter)
2096{
2097 struct net_device *netdev = adapter->netdev;
2098 uint32_t rctl;
2099
2100 e1000_pci_clear_mwi(&adapter->hw);
2101
2102 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2103 rctl |= E1000_RCTL_RST;
2104 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2105 E1000_WRITE_FLUSH(&adapter->hw);
2106 mdelay(5);
2107
2108 if(netif_running(netdev))
581d708e 2109 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2110}
2111
2112static void
2113e1000_leave_82542_rst(struct e1000_adapter *adapter)
2114{
2115 struct net_device *netdev = adapter->netdev;
2116 uint32_t rctl;
2117
2118 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2119 rctl &= ~E1000_RCTL_RST;
2120 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2121 E1000_WRITE_FLUSH(&adapter->hw);
2122 mdelay(5);
2123
2124 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2125 e1000_pci_set_mwi(&adapter->hw);
2126
2127 if(netif_running(netdev)) {
2128 e1000_configure_rx(adapter);
72d64a43
JK		 2129 /* No need to loop, because 82542 supports only 1 queue */
2130 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2131 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2132 }
2133}
2134
2135/**
2136 * e1000_set_mac - Change the Ethernet Address of the NIC
2137 * @netdev: network interface device structure
2138 * @p: pointer to an address structure
2139 *
2140 * Returns 0 on success, negative on failure
2141 **/
2142
2143static int
2144e1000_set_mac(struct net_device *netdev, void *p)
2145{
60490fe0 2146 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2147 struct sockaddr *addr = p;
2148
2149 if(!is_valid_ether_addr(addr->sa_data))
2150 return -EADDRNOTAVAIL;
2151
2152 /* 82542 2.0 needs to be in reset to write receive address registers */
2153
2154 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2155 e1000_enter_82542_rst(adapter);
2156
2157 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2158 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2159
2160 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2161
868d5309
MC		 2162 /* With 82571 controllers, LAA may be overwritten (with the default)
2163 * due to controller reset from the other port. */
2164 if (adapter->hw.mac_type == e1000_82571) {
2165 /* activate the work around */
2166 adapter->hw.laa_is_present = 1;
2167
2168 /* Hold a copy of the LAA in RAR[14] This is done so that
2169 * between the time RAR[0] gets clobbered and the time it
2170 * gets fixed (in e1000_watchdog), the actual LAA is in one
2171 * of the RARs and no incoming packets directed to this port
2172 * are dropped. Eventaully the LAA will be in RAR[0] and
2173 * RAR[14] */
2174 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2175 E1000_RAR_ENTRIES - 1);
2176 }
2177
1da177e4
LT		 2178 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2179 e1000_leave_82542_rst(adapter);
2180
2181 return 0;
2182}
2183
2184/**
2185 * e1000_set_multi - Multicast and Promiscuous mode set
2186 * @netdev: network interface device structure
2187 *
2188 * The set_multi entry point is called whenever the multicast address
2189 * list or the network interface flags are updated. This routine is
2190 * responsible for configuring the hardware for proper multicast,
2191 * promiscuous mode, and all-multi behavior.
2192 **/
2193
2194static void
2195e1000_set_multi(struct net_device *netdev)
2196{
60490fe0 2197 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2198 struct e1000_hw *hw = &adapter->hw;
2199 struct dev_mc_list *mc_ptr;
2200 uint32_t rctl;
2201 uint32_t hash_value;
868d5309 2202 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2203
868d5309
MC		 2204 /* reserve RAR[14] for LAA over-write work-around */
2205 if (adapter->hw.mac_type == e1000_82571)
2206 rar_entries--;
1da177e4 2207
2648345f
MC		 2208 /* Check for Promiscuous and All Multicast modes */
2209
1da177e4
LT		 2210 rctl = E1000_READ_REG(hw, RCTL);
2211
2212 if(netdev->flags & IFF_PROMISC) {
2213 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2214 } else if(netdev->flags & IFF_ALLMULTI) {
2215 rctl |= E1000_RCTL_MPE;
2216 rctl &= ~E1000_RCTL_UPE;
2217 } else {
2218 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2219 }
2220
2221 E1000_WRITE_REG(hw, RCTL, rctl);
2222
2223 /* 82542 2.0 needs to be in reset to write receive address registers */
2224
2225 if(hw->mac_type == e1000_82542_rev2_0)
2226 e1000_enter_82542_rst(adapter);
2227
2228 /* load the first 14 multicast address into the exact filters 1-14
2229 * RAR 0 is used for the station MAC adddress
2230 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2231 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2232 */
2233 mc_ptr = netdev->mc_list;
2234
868d5309
MC		 2235 for(i = 1; i < rar_entries; i++) {
2236 if (mc_ptr) {
1da177e4
LT		 2237 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2238 mc_ptr = mc_ptr->next;
2239 } else {
2240 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2241 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2242 }
2243 }
2244
2245 /* clear the old settings from the multicast hash table */
2246
2247 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2248 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2249
2250 /* load any remaining addresses into the hash table */
2251
2252 for(; mc_ptr; mc_ptr = mc_ptr->next) {
2253 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2254 e1000_mta_set(hw, hash_value);
2255 }
2256
2257 if(hw->mac_type == e1000_82542_rev2_0)
2258 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2259}
2260
2261/* Need to wait a few seconds after link up to get diagnostic information from
2262 * the phy */
2263
2264static void
2265e1000_update_phy_info(unsigned long data)
2266{
2267 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2268 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2269}
2270
2271/**
2272 * e1000_82547_tx_fifo_stall - Timer Call-back
2273 * @data: pointer to adapter cast into an unsigned long
2274 **/
2275
2276static void
2277e1000_82547_tx_fifo_stall(unsigned long data)
2278{
2279 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2280 struct net_device *netdev = adapter->netdev;
2281 uint32_t tctl;
2282
2283 if(atomic_read(&adapter->tx_fifo_stall)) {
2284 if((E1000_READ_REG(&adapter->hw, TDT) ==
2285 E1000_READ_REG(&adapter->hw, TDH)) &&
2286 (E1000_READ_REG(&adapter->hw, TDFT) ==
2287 E1000_READ_REG(&adapter->hw, TDFH)) &&
2288 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2289 E1000_READ_REG(&adapter->hw, TDFHS))) {
2290 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2291 E1000_WRITE_REG(&adapter->hw, TCTL,
2292 tctl & ~E1000_TCTL_EN);
2293 E1000_WRITE_REG(&adapter->hw, TDFT,
2294 adapter->tx_head_addr);
2295 E1000_WRITE_REG(&adapter->hw, TDFH,
2296 adapter->tx_head_addr);
2297 E1000_WRITE_REG(&adapter->hw, TDFTS,
2298 adapter->tx_head_addr);
2299 E1000_WRITE_REG(&adapter->hw, TDFHS,
2300 adapter->tx_head_addr);
2301 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2302 E1000_WRITE_FLUSH(&adapter->hw);
2303
2304 adapter->tx_fifo_head = 0;
2305 atomic_set(&adapter->tx_fifo_stall, 0);
2306 netif_wake_queue(netdev);
2307 } else {
2308 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2309 }
2310 }
2311}
2312
2313/**
2314 * e1000_watchdog - Timer Call-back
2315 * @data: pointer to adapter cast into an unsigned long
2316 **/
2317static void
2318e1000_watchdog(unsigned long data)
2319{
2320 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2321
2322 /* Do the rest outside of interrupt context */
2323 schedule_work(&adapter->watchdog_task);
2324}
2325
2326static void
2327e1000_watchdog_task(struct e1000_adapter *adapter)
2328{
2329 struct net_device *netdev = adapter->netdev;
545c67c0 2330 struct e1000_tx_ring *txdr = adapter->tx_ring;
1da177e4
LT		 2331 uint32_t link;
2332
2333 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2334 if (adapter->hw.mac_type == e1000_82573) {
2335 e1000_enable_tx_pkt_filtering(&adapter->hw);
2336 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2337 e1000_update_mng_vlan(adapter);
2338 }
1da177e4
LT		 2339
2340 if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2341 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2342 link = !adapter->hw.serdes_link_down;
2343 else
2344 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2345
2346 if(link) {
2347 if(!netif_carrier_ok(netdev)) {
2348 e1000_get_speed_and_duplex(&adapter->hw,
2349 &adapter->link_speed,
2350 &adapter->link_duplex);
2351
2352 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2353 adapter->link_speed,
2354 adapter->link_duplex == FULL_DUPLEX ?
2355 "Full Duplex" : "Half Duplex");
2356
66a2b0a3
JK		 2357 /* tweak tx_queue_len according to speed/duplex */
2358 netdev->tx_queue_len = adapter->tx_queue_len;
2359 adapter->tx_timeout_factor = 1;
2360 if (adapter->link_duplex == HALF_DUPLEX) {
2361 switch (adapter->link_speed) {
2362 case SPEED_10:
2363 netdev->tx_queue_len = 10;
2364 adapter->tx_timeout_factor = 8;
2365 break;
2366 case SPEED_100:
2367 netdev->tx_queue_len = 100;
2368 break;
2369 }
2370 }
2371
1da177e4
LT		 2372 netif_carrier_on(netdev);
2373 netif_wake_queue(netdev);
2374 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2375 adapter->smartspeed = 0;
2376 }
2377 } else {
2378 if(netif_carrier_ok(netdev)) {
2379 adapter->link_speed = 0;
2380 adapter->link_duplex = 0;
2381 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2382 netif_carrier_off(netdev);
2383 netif_stop_queue(netdev);
2384 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2385 }
2386
2387 e1000_smartspeed(adapter);
2388 }
2389
2390 e1000_update_stats(adapter);
2391
2392 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2393 adapter->tpt_old = adapter->stats.tpt;
2394 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2395 adapter->colc_old = adapter->stats.colc;
2396
2397 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2398 adapter->gorcl_old = adapter->stats.gorcl;
2399 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2400 adapter->gotcl_old = adapter->stats.gotcl;
2401
2402 e1000_update_adaptive(&adapter->hw);
2403
f56799ea
JK		 2404#ifdef CONFIG_E1000_MQ
2405 txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2406#endif
2407 if (!netif_carrier_ok(netdev)) {
581d708e 2408 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2409 /* We've lost link, so the controller stops DMA,
2410 * but we've got queued Tx work that's never going
2411 * to get done, so reset controller to flush Tx.
2412 * (Do the reset outside of interrupt context). */
2413 schedule_work(&adapter->tx_timeout_task);
2414 }
2415 }
2416
2417 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2418 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2419 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2420 * asymmetrical Tx or Rx gets ITR=8000; everyone
2421 * else is between 2000-8000. */
2422 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2423 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2424 adapter->gotcl - adapter->gorcl :
2425 adapter->gorcl - adapter->gotcl) / 10000;
2426 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2427 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2428 }
2429
2430 /* Cause software interrupt to ensure rx ring is cleaned */
2431 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2432
2648345f 2433 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2434 adapter->detect_tx_hung = TRUE;
2435
868d5309
MC		 2436 /* With 82571 controllers, LAA may be overwritten due to controller
2437 * reset from the other port. Set the appropriate LAA in RAR[0] */
2438 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2439 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2440
1da177e4
LT		 2441 /* Reset the timer */
2442 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2443}
2444
2445#define E1000_TX_FLAGS_CSUM 0x00000001
2446#define E1000_TX_FLAGS_VLAN 0x00000002
2447#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2448#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2449#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2450#define E1000_TX_FLAGS_VLAN_SHIFT 16
2451
2452static inline int
581d708e
MC		 2453e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2454 struct sk_buff *skb)
1da177e4
LT		 2455{
2456#ifdef NETIF_F_TSO
2457 struct e1000_context_desc *context_desc;
545c67c0 2458 struct e1000_buffer *buffer_info;
1da177e4
LT		 2459 unsigned int i;
2460 uint32_t cmd_length = 0;
2d7edb92 2461 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2462 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2463 int err;
2464
2465 if(skb_shinfo(skb)->tso_size) {
2466 if (skb_header_cloned(skb)) {
2467 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2468 if (err)
2469 return err;
2470 }
2471
2472 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2473 mss = skb_shinfo(skb)->tso_size;
2d7edb92
MC		 2474 if(skb->protocol == ntohs(ETH_P_IP)) {
2475 skb->nh.iph->tot_len = 0;
2476 skb->nh.iph->check = 0;
2477 skb->h.th->check =
2478 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2479 skb->nh.iph->daddr,
2480 0,
2481 IPPROTO_TCP,
2482 0);
2483 cmd_length = E1000_TXD_CMD_IP;
2484 ipcse = skb->h.raw - skb->data - 1;
2485#ifdef NETIF_F_TSO_IPV6
2486 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2487 skb->nh.ipv6h->payload_len = 0;
2488 skb->h.th->check =
2489 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2490 &skb->nh.ipv6h->daddr,
2491 0,
2492 IPPROTO_TCP,
2493 0);
2494 ipcse = 0;
2495#endif
2496 }
1da177e4
LT		 2497 ipcss = skb->nh.raw - skb->data;
2498 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2499 tucss = skb->h.raw - skb->data;
2500 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2501 tucse = 0;
2502
2503 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2504 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2505
581d708e
MC		 2506 i = tx_ring->next_to_use;
2507 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2508 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2509
2510 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2511 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2512 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2513 context_desc->upper_setup.tcp_fields.tucss = tucss;
2514 context_desc->upper_setup.tcp_fields.tucso = tucso;
2515 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2516 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2517 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2518 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2519
545c67c0
JK		 2520 buffer_info->time_stamp = jiffies;
2521
581d708e
MC		 2522 if (++i == tx_ring->count) i = 0;
2523 tx_ring->next_to_use = i;
1da177e4
LT		 2524
2525 return 1;
2526 }
2527#endif
2528
2529 return 0;
2530}
2531
2532static inline boolean_t
581d708e
MC		 2533e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2534 struct sk_buff *skb)
1da177e4
LT		 2535{
2536 struct e1000_context_desc *context_desc;
545c67c0 2537 struct e1000_buffer *buffer_info;
1da177e4
LT		 2538 unsigned int i;
2539 uint8_t css;
2540
2541 if(likely(skb->ip_summed == CHECKSUM_HW)) {
2542 css = skb->h.raw - skb->data;
2543
581d708e 2544 i = tx_ring->next_to_use;
545c67c0 2545 buffer_info = &tx_ring->buffer_info[i];
581d708e 2546 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2547
2548 context_desc->upper_setup.tcp_fields.tucss = css;
2549 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2550 context_desc->upper_setup.tcp_fields.tucse = 0;
2551 context_desc->tcp_seg_setup.data = 0;
2552 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2553
545c67c0
JK		 2554 buffer_info->time_stamp = jiffies;
2555
581d708e
MC		 2556 if (unlikely(++i == tx_ring->count)) i = 0;
2557 tx_ring->next_to_use = i;
1da177e4
LT		 2558
2559 return TRUE;
2560 }
2561
2562 return FALSE;
2563}
2564
2565#define E1000_MAX_TXD_PWR 12
2566#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2567
2568static inline int
581d708e
MC		 2569e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2570 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2571 unsigned int nr_frags, unsigned int mss)
1da177e4 2572{
1da177e4
LT		 2573 struct e1000_buffer *buffer_info;
2574 unsigned int len = skb->len;
2575 unsigned int offset = 0, size, count = 0, i;
2576 unsigned int f;
2577 len -= skb->data_len;
2578
2579 i = tx_ring->next_to_use;
2580
2581 while(len) {
2582 buffer_info = &tx_ring->buffer_info[i];
2583 size = min(len, max_per_txd);
2584#ifdef NETIF_F_TSO
fd803241
JK		 2585 /* Workaround for Controller erratum --
2586 * descriptor for non-tso packet in a linear SKB that follows a
2587 * tso gets written back prematurely before the data is fully
2588 * DMAd to the controller */
2589 if (!skb->data_len && tx_ring->last_tx_tso &&
2590 !skb_shinfo(skb)->tso_size) {
2591 tx_ring->last_tx_tso = 0;
2592 size -= 4;
2593 }
2594
1da177e4
LT		 2595 /* Workaround for premature desc write-backs
2596 * in TSO mode. Append 4-byte sentinel desc */
2597 if(unlikely(mss && !nr_frags && size == len && size > 8))
2598 size -= 4;
2599#endif
97338bde
MC		 2600 /* work-around for errata 10 and it applies
2601 * to all controllers in PCI-X mode
2602 * The fix is to make sure that the first descriptor of a
2603 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2604 */
2605 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2606 (size > 2015) && count == 0))
2607 size = 2015;
2608
1da177e4
LT		 2609 /* Workaround for potential 82544 hang in PCI-X. Avoid
2610 * terminating buffers within evenly-aligned dwords. */
2611 if(unlikely(adapter->pcix_82544 &&
2612 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2613 size > 4))
2614 size -= 4;
2615
2616 buffer_info->length = size;
2617 buffer_info->dma =
2618 pci_map_single(adapter->pdev,
2619 skb->data + offset,
2620 size,
2621 PCI_DMA_TODEVICE);
2622 buffer_info->time_stamp = jiffies;
2623
2624 len -= size;
2625 offset += size;
2626 count++;
2627 if(unlikely(++i == tx_ring->count)) i = 0;
2628 }
2629
2630 for(f = 0; f < nr_frags; f++) {
2631 struct skb_frag_struct *frag;
2632
2633 frag = &skb_shinfo(skb)->frags[f];
2634 len = frag->size;
2635 offset = frag->page_offset;
2636
2637 while(len) {
2638 buffer_info = &tx_ring->buffer_info[i];
2639 size = min(len, max_per_txd);
2640#ifdef NETIF_F_TSO
2641 /* Workaround for premature desc write-backs
2642 * in TSO mode. Append 4-byte sentinel desc */
2643 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2644 size -= 4;
2645#endif
2646 /* Workaround for potential 82544 hang in PCI-X.
2647 * Avoid terminating buffers within evenly-aligned
2648 * dwords. */
2649 if(unlikely(adapter->pcix_82544 &&
2650 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2651 size > 4))
2652 size -= 4;
2653
2654 buffer_info->length = size;
2655 buffer_info->dma =
2656 pci_map_page(adapter->pdev,
2657 frag->page,
2658 offset,
2659 size,
2660 PCI_DMA_TODEVICE);
2661 buffer_info->time_stamp = jiffies;
2662
2663 len -= size;
2664 offset += size;
2665 count++;
2666 if(unlikely(++i == tx_ring->count)) i = 0;
2667 }
2668 }
2669
2670 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2671 tx_ring->buffer_info[i].skb = skb;
2672 tx_ring->buffer_info[first].next_to_watch = i;
2673
2674 return count;
2675}
2676
2677static inline void
581d708e
MC		 2678e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2679 int tx_flags, int count)
1da177e4 2680{
1da177e4
LT		 2681 struct e1000_tx_desc *tx_desc = NULL;
2682 struct e1000_buffer *buffer_info;
2683 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2684 unsigned int i;
2685
2686 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2687 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2688 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2689 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2690
2691 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2692 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2693 }
2694
2695 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2696 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2697 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2698 }
2699
2700 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2701 txd_lower |= E1000_TXD_CMD_VLE;
2702 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2703 }
2704
2705 i = tx_ring->next_to_use;
2706
2707 while(count--) {
2708 buffer_info = &tx_ring->buffer_info[i];
2709 tx_desc = E1000_TX_DESC(*tx_ring, i);
2710 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2711 tx_desc->lower.data =
2712 cpu_to_le32(txd_lower | buffer_info->length);
2713 tx_desc->upper.data = cpu_to_le32(txd_upper);
2714 if(unlikely(++i == tx_ring->count)) i = 0;
2715 }
2716
2717 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2718
2719 /* Force memory writes to complete before letting h/w
2720 * know there are new descriptors to fetch. (Only
2721 * applicable for weak-ordered memory model archs,
2722 * such as IA-64). */
2723 wmb();
2724
2725 tx_ring->next_to_use = i;
581d708e 2726 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2727}
2728
2729/**
2730 * 82547 workaround to avoid controller hang in half-duplex environment.
2731 * The workaround is to avoid queuing a large packet that would span
2732 * the internal Tx FIFO ring boundary by notifying the stack to resend
2733 * the packet at a later time. This gives the Tx FIFO an opportunity to
2734 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2735 * to the beginning of the Tx FIFO.
2736 **/
2737
2738#define E1000_FIFO_HDR 0x10
2739#define E1000_82547_PAD_LEN 0x3E0
2740
2741static inline int
2742e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2743{
2744 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2745 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2746
2747 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2748
2749 if(adapter->link_duplex != HALF_DUPLEX)
2750 goto no_fifo_stall_required;
2751
2752 if(atomic_read(&adapter->tx_fifo_stall))
2753 return 1;
2754
2755 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2756 atomic_set(&adapter->tx_fifo_stall, 1);
2757 return 1;
2758 }
2759
2760no_fifo_stall_required:
2761 adapter->tx_fifo_head += skb_fifo_len;
2762 if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2763 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2764 return 0;
2765}
2766
2d7edb92
MC		 2767#define MINIMUM_DHCP_PACKET_SIZE 282
2768static inline int
2769e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2770{
2771 struct e1000_hw *hw = &adapter->hw;
2772 uint16_t length, offset;
2773 if(vlan_tx_tag_present(skb)) {
2774 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2775 ( adapter->hw.mng_cookie.status &
2776 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2777 return 0;
2778 }
a174fd88 2779 if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2d7edb92
MC		 2780 struct ethhdr *eth = (struct ethhdr *) skb->data;
2781 if((htons(ETH_P_IP) == eth->h_proto)) {
2782 const struct iphdr *ip =
2783 (struct iphdr *)((uint8_t *)skb->data+14);
2784 if(IPPROTO_UDP == ip->protocol) {
2785 struct udphdr *udp =
2786 (struct udphdr *)((uint8_t *)ip +
2787 (ip->ihl << 2));
2788 if(ntohs(udp->dest) == 67) {
2789 offset = (uint8_t *)udp + 8 - skb->data;
2790 length = skb->len - offset;
2791
2792 return e1000_mng_write_dhcp_info(hw,
2793 (uint8_t *)udp + 8,
2794 length);
2795 }
2796 }
2797 }
2798 }
2799 return 0;
2800}
2801
1da177e4
LT		 2802#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2803static int
2804e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2805{
60490fe0 2806 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2807 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2808 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2809 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2810 unsigned int tx_flags = 0;
2811 unsigned int len = skb->len;
2812 unsigned long flags;
2813 unsigned int nr_frags = 0;
2814 unsigned int mss = 0;
2815 int count = 0;
2816 int tso;
2817 unsigned int f;
2818 len -= skb->data_len;
2819
24025e4e
MC		 2820#ifdef CONFIG_E1000_MQ
2821 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2822#else
581d708e 2823 tx_ring = adapter->tx_ring;
24025e4e
MC		 2824#endif
2825
581d708e 2826 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2827 dev_kfree_skb_any(skb);
2828 return NETDEV_TX_OK;
2829 }
2830
2831#ifdef NETIF_F_TSO
2832 mss = skb_shinfo(skb)->tso_size;
2648345f 2833 /* The controller does a simple calculation to
1da177e4
LT		 2834 * make sure there is enough room in the FIFO before
2835 * initiating the DMA for each buffer. The calc is:
2836 * 4 = ceil(buffer len/mss). To make sure we don't
2837 * overrun the FIFO, adjust the max buffer len if mss
2838 * drops. */
2839 if(mss) {
9a3056da 2840 uint8_t hdr_len;
1da177e4
LT		 2841 max_per_txd = min(mss << 2, max_per_txd);
2842 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da
JK		 2843
2844 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2845 * points to just header, pull a few bytes of payload from
2846 * frags into skb->data */
2847 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2848 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2849 (adapter->hw.mac_type == e1000_82571 ||
2850 adapter->hw.mac_type == e1000_82572)) {
d74bbd3b
JK		 2851 unsigned int pull_size;
2852 pull_size = min((unsigned int)4, skb->data_len);
2853 if (!__pskb_pull_tail(skb, pull_size)) {
2854 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2855 dev_kfree_skb_any(skb);
2856 return -EFAULT;
2857 }
9a3056da
JK		 2858 len = skb->len - skb->data_len;
2859 }
1da177e4
LT		 2860 }
2861
2862 if((mss) || (skb->ip_summed == CHECKSUM_HW))
9a3056da 2863 /* reserve a descriptor for the offload context */
1da177e4 2864 count++;
2648345f 2865 count++;
1da177e4
LT		 2866#else
2867 if(skb->ip_summed == CHECKSUM_HW)
2868 count++;
2869#endif
fd803241
JK		 2870
2871#ifdef NETIF_F_TSO
2872 /* Controller Erratum workaround */
2873 if (!skb->data_len && tx_ring->last_tx_tso &&
2874 !skb_shinfo(skb)->tso_size)
2875 count++;
2876#endif
2877
1da177e4
LT		 2878 count += TXD_USE_COUNT(len, max_txd_pwr);
2879
2880 if(adapter->pcix_82544)
2881 count++;
2882
97338bde
MC		 2883 /* work-around for errata 10 and it applies to all controllers
2884 * in PCI-X mode, so add one more descriptor to the count
2885 */
2886 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2887 (len > 2015)))
2888 count++;
2889
1da177e4
LT		 2890 nr_frags = skb_shinfo(skb)->nr_frags;
2891 for(f = 0; f < nr_frags; f++)
2892 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2893 max_txd_pwr);
2894 if(adapter->pcix_82544)
2895 count += nr_frags;
2896
2d7edb92
MC		 2897 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2898 e1000_transfer_dhcp_info(adapter, skb);
2899
581d708e
MC		 2900 local_irq_save(flags);
2901 if (!spin_trylock(&tx_ring->tx_lock)) {
2902 /* Collision - tell upper layer to requeue */
2903 local_irq_restore(flags);
2904 return NETDEV_TX_LOCKED;
2905 }
1da177e4
LT		 2906
2907 /* need: count + 2 desc gap to keep tail from touching
2908 * head, otherwise try next time */
581d708e 2909 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2910 netif_stop_queue(netdev);
581d708e 2911 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2912 return NETDEV_TX_BUSY;
2913 }
2914
2915 if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2916 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2917 netif_stop_queue(netdev);
2918 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2919 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2920 return NETDEV_TX_BUSY;
2921 }
2922 }
2923
2924 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2925 tx_flags |= E1000_TX_FLAGS_VLAN;
2926 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2927 }
2928
581d708e 2929 first = tx_ring->next_to_use;
1da177e4 2930
581d708e 2931 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2932 if (tso < 0) {
2933 dev_kfree_skb_any(skb);
581d708e 2934 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2935 return NETDEV_TX_OK;
2936 }
2937
fd803241
JK		 2938 if (likely(tso)) {
2939 tx_ring->last_tx_tso = 1;
1da177e4 2940 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2941 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2942 tx_flags |= E1000_TX_FLAGS_CSUM;
2943
2d7edb92 2944 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2945 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2946 * no longer assume, we must. */
581d708e 2947 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 2948 tx_flags |= E1000_TX_FLAGS_IPV4;
2949
581d708e
MC		 2950 e1000_tx_queue(adapter, tx_ring, tx_flags,
2951 e1000_tx_map(adapter, tx_ring, skb, first,
2952 max_per_txd, nr_frags, mss));
1da177e4
LT		 2953
2954 netdev->trans_start = jiffies;
2955
2956 /* Make sure there is space in the ring for the next send. */
581d708e 2957 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2958 netif_stop_queue(netdev);
2959
581d708e 2960 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2961 return NETDEV_TX_OK;
2962}
2963
2964/**
2965 * e1000_tx_timeout - Respond to a Tx Hang
2966 * @netdev: network interface device structure
2967 **/
2968
2969static void
2970e1000_tx_timeout(struct net_device *netdev)
2971{
60490fe0 2972 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2973
2974 /* Do the reset outside of interrupt context */
2975 schedule_work(&adapter->tx_timeout_task);
2976}
2977
2978static void
2979e1000_tx_timeout_task(struct net_device *netdev)
2980{
60490fe0 2981 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2982
6b7660cd 2983 adapter->tx_timeout_count++;
1da177e4
LT		 2984 e1000_down(adapter);
2985 e1000_up(adapter);
2986}
2987
2988/**
2989 * e1000_get_stats - Get System Network Statistics
2990 * @netdev: network interface device structure
2991 *
2992 * Returns the address of the device statistics structure.
2993 * The statistics are actually updated from the timer callback.
2994 **/
2995
2996static struct net_device_stats *
2997e1000_get_stats(struct net_device *netdev)
2998{
60490fe0 2999 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3000
6b7660cd 3001 /* only return the current stats */
1da177e4
LT		 3002 return &adapter->net_stats;
3003}
3004
3005/**
3006 * e1000_change_mtu - Change the Maximum Transfer Unit
3007 * @netdev: network interface device structure
3008 * @new_mtu: new value for maximum frame size
3009 *
3010 * Returns 0 on success, negative on failure
3011 **/
3012
3013static int
3014e1000_change_mtu(struct net_device *netdev, int new_mtu)
3015{
60490fe0 3016 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3017 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3018
3019 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3020 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3021 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3022 return -EINVAL;
2d7edb92 3023 }
1da177e4 3024
997f5cbd
JK		 3025 /* Adapter-specific max frame size limits. */
3026 switch (adapter->hw.mac_type) {
3027 case e1000_82542_rev2_0:
3028 case e1000_82542_rev2_1:
3029 case e1000_82573:
3030 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3031 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3032 return -EINVAL;
2d7edb92 3033 }
997f5cbd
JK		 3034 break;
3035 case e1000_82571:
3036 case e1000_82572:
3037#define MAX_STD_JUMBO_FRAME_SIZE 9234
3038 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3039 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3040 return -EINVAL;
3041 }
3042 break;
3043 default:
3044 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3045 break;
1da177e4
LT		 3046 }
3047
997f5cbd
JK		 3048 /* since the driver code now supports splitting a packet across
3049 * multiple descriptors, most of the fifo related limitations on
3050 * jumbo frame traffic have gone away.
3051 * simply use 2k descriptors for everything.
3052 *
3053 * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3054 * means we reserve 2 more, this pushes us to allocate from the next
3055 * larger slab size
3056 * i.e. RXBUFFER_2048 --> size-4096 slab */
3057
3058 /* recent hardware supports 1KB granularity */
3059 if (adapter->hw.mac_type > e1000_82547_rev_2) {
3060 adapter->rx_buffer_len =
3061 ((max_frame < E1000_RXBUFFER_2048) ?
3062 max_frame : E1000_RXBUFFER_2048);
3063 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
3064 } else
3065 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3066
2d7edb92
MC		 3067 netdev->mtu = new_mtu;
3068
3069 if(netif_running(netdev)) {
1da177e4
LT		 3070 e1000_down(adapter);
3071 e1000_up(adapter);
3072 }
3073
1da177e4
LT		 3074 adapter->hw.max_frame_size = max_frame;
3075
3076 return 0;
3077}
3078
3079/**
3080 * e1000_update_stats - Update the board statistics counters
3081 * @adapter: board private structure
3082 **/
3083
3084void
3085e1000_update_stats(struct e1000_adapter *adapter)
3086{
3087 struct e1000_hw *hw = &adapter->hw;
3088 unsigned long flags;
3089 uint16_t phy_tmp;
3090
3091#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3092
3093 spin_lock_irqsave(&adapter->stats_lock, flags);
3094
3095 /* these counters are modified from e1000_adjust_tbi_stats,
3096 * called from the interrupt context, so they must only
3097 * be written while holding adapter->stats_lock
3098 */
3099
3100 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3101 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3102 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3103 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3104 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3105 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3106 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3107 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3108 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3109 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3110 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3111 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3112 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3113
3114 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3115 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3116 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3117 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3118 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3119 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3120 adapter->stats.dc += E1000_READ_REG(hw, DC);
3121 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3122 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3123 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3124 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3125 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3126 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3127 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3128 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3129 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3130 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3131 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3132 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3133 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3134 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3135 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3136 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3137 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3138 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3139 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3140 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3141 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3142 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3143 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3144 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3145 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3146 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3147 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3148
3149 /* used for adaptive IFS */
3150
3151 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3152 adapter->stats.tpt += hw->tx_packet_delta;
3153 hw->collision_delta = E1000_READ_REG(hw, COLC);
3154 adapter->stats.colc += hw->collision_delta;
3155
3156 if(hw->mac_type >= e1000_82543) {
3157 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3158 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3159 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3160 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3161 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3162 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3163 }
2d7edb92
MC		 3164 if(hw->mac_type > e1000_82547_rev_2) {
3165 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3166 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3167 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3168 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3169 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3170 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3171 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3172 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3173 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3174 }
1da177e4
LT		 3175
3176 /* Fill out the OS statistics structure */
3177
3178 adapter->net_stats.rx_packets = adapter->stats.gprc;
3179 adapter->net_stats.tx_packets = adapter->stats.gptc;
3180 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3181 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3182 adapter->net_stats.multicast = adapter->stats.mprc;
3183 adapter->net_stats.collisions = adapter->stats.colc;
3184
3185 /* Rx Errors */
3186
3187 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3188 adapter->stats.crcerrs + adapter->stats.algnerrc +
6b7660cd
JK		 3189 adapter->stats.rlec + adapter->stats.cexterr;
3190 adapter->net_stats.rx_dropped = 0;
1da177e4
LT		 3191 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3192 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3193 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3194 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3195
3196 /* Tx Errors */
3197
3198 adapter->net_stats.tx_errors = adapter->stats.ecol +
3199 adapter->stats.latecol;
3200 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3201 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3202 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3203
3204 /* Tx Dropped needs to be maintained elsewhere */
3205
3206 /* Phy Stats */
3207
3208 if(hw->media_type == e1000_media_type_copper) {
3209 if((adapter->link_speed == SPEED_1000) &&
3210 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3211 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3212 adapter->phy_stats.idle_errors += phy_tmp;
3213 }
3214
3215 if((hw->mac_type <= e1000_82546) &&
3216 (hw->phy_type == e1000_phy_m88) &&
3217 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3218 adapter->phy_stats.receive_errors += phy_tmp;
3219 }
3220
3221 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3222}
3223
24025e4e
MC		 3224#ifdef CONFIG_E1000_MQ
3225void
3226e1000_rx_schedule(void *data)
3227{
3228 struct net_device *poll_dev, *netdev = data;
3229 struct e1000_adapter *adapter = netdev->priv;
3230 int this_cpu = get_cpu();
3231
3232 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3233 if (poll_dev == NULL) {
3234 put_cpu();
3235 return;
3236 }
3237
3238 if (likely(netif_rx_schedule_prep(poll_dev)))
3239 __netif_rx_schedule(poll_dev);
3240 else
3241 e1000_irq_enable(adapter);
3242
3243 put_cpu();
3244}
3245#endif
3246
1da177e4
LT		 3247/**
3248 * e1000_intr - Interrupt Handler
3249 * @irq: interrupt number
3250 * @data: pointer to a network interface device structure
3251 * @pt_regs: CPU registers structure
3252 **/
3253
3254static irqreturn_t
3255e1000_intr(int irq, void *data, struct pt_regs *regs)
3256{
3257 struct net_device *netdev = data;
60490fe0 3258 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3259 struct e1000_hw *hw = &adapter->hw;
3260 uint32_t icr = E1000_READ_REG(hw, ICR);
1e613fd9 3261#ifndef CONFIG_E1000_NAPI
581d708e 3262 int i;
1e613fd9
JK		 3263#else
3264 /* Interrupt Auto-Mask...upon reading ICR,
3265 * interrupts are masked. No need for the
3266 * IMC write, but it does mean we should
3267 * account for it ASAP. */
3268 if (likely(hw->mac_type >= e1000_82571))
3269 atomic_inc(&adapter->irq_sem);
be2b28ed 3270#endif
1da177e4 3271
1e613fd9
JK		 3272 if (unlikely(!icr)) {
3273#ifdef CONFIG_E1000_NAPI
3274 if (hw->mac_type >= e1000_82571)
3275 e1000_irq_enable(adapter);
3276#endif
1da177e4 3277 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3278 }
1da177e4
LT		 3279
3280 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3281 hw->get_link_status = 1;
3282 mod_timer(&adapter->watchdog_timer, jiffies);
3283 }
3284
3285#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3286 if (unlikely(hw->mac_type < e1000_82571)) {
3287 atomic_inc(&adapter->irq_sem);
3288 E1000_WRITE_REG(hw, IMC, ~0);
3289 E1000_WRITE_FLUSH(hw);
3290 }
24025e4e
MC		 3291#ifdef CONFIG_E1000_MQ
3292 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
f56799ea
JK		 3293 /* We must setup the cpumask once count == 0 since
3294 * each cpu bit is cleared when the work is done. */
3295 adapter->rx_sched_call_data.cpumask = adapter->cpumask;
3296 atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
3297 atomic_set(&adapter->rx_sched_call_data.count,
3298 adapter->num_rx_queues);
24025e4e
MC		 3299 smp_call_async_mask(&adapter->rx_sched_call_data);
3300 } else {
3301 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
1da177e4 3302 }
be2b28ed 3303#else /* if !CONFIG_E1000_MQ */
581d708e
MC		 3304 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3305 __netif_rx_schedule(&adapter->polling_netdev[0]);
3306 else
3307 e1000_irq_enable(adapter);
be2b28ed
JG		 3308#endif /* CONFIG_E1000_MQ */
3309
3310#else /* if !CONFIG_E1000_NAPI */
1da177e4
LT		 3311 /* Writing IMC and IMS is needed for 82547.
3312 Due to Hub Link bus being occupied, an interrupt
3313 de-assertion message is not able to be sent.
3314 When an interrupt assertion message is generated later,
3315 two messages are re-ordered and sent out.
3316 That causes APIC to think 82547 is in de-assertion
3317 state, while 82547 is in assertion state, resulting
3318 in dead lock. Writing IMC forces 82547 into
3319 de-assertion state.
3320 */
3321 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
3322 atomic_inc(&adapter->irq_sem);
2648345f 3323 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3324 }
3325
3326 for(i = 0; i < E1000_MAX_INTR; i++)
581d708e
MC		 3327 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3328 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3329 break;
3330
3331 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3332 e1000_irq_enable(adapter);
581d708e 3333
be2b28ed 3334#endif /* CONFIG_E1000_NAPI */
1da177e4
LT		 3335
3336 return IRQ_HANDLED;
3337}
3338
3339#ifdef CONFIG_E1000_NAPI
3340/**
3341 * e1000_clean - NAPI Rx polling callback
3342 * @adapter: board private structure
3343 **/
3344
3345static int
581d708e 3346e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3347{
581d708e
MC		 3348 struct e1000_adapter *adapter;
3349 int work_to_do = min(*budget, poll_dev->quota);
3350 int tx_cleaned, i = 0, work_done = 0;
3351
3352 /* Must NOT use netdev_priv macro here. */
3353 adapter = poll_dev->priv;
3354
3355 /* Keep link state information with original netdev */
3356 if (!netif_carrier_ok(adapter->netdev))
3357 goto quit_polling;
2648345f 3358
581d708e
MC		 3359 while (poll_dev != &adapter->polling_netdev[i]) {
3360 i++;
f56799ea 3361 if (unlikely(i == adapter->num_rx_queues))
581d708e
MC		 3362 BUG();
3363 }
3364
3365 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3366 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3367 &work_done, work_to_do);
1da177e4
LT		 3368
3369 *budget -= work_done;
581d708e 3370 poll_dev->quota -= work_done;
1da177e4 3371
2b02893e 3372 /* If no Tx and not enough Rx work done, exit the polling mode */
581d708e
MC		 3373 if((!tx_cleaned && (work_done == 0)) ||
3374 !netif_running(adapter->netdev)) {
3375quit_polling:
3376 netif_rx_complete(poll_dev);
1da177e4
LT		 3377 e1000_irq_enable(adapter);
3378 return 0;
3379 }
3380
3381 return 1;
3382}
3383
3384#endif
3385/**
3386 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3387 * @adapter: board private structure
3388 **/
3389
3390static boolean_t
581d708e
MC		 3391e1000_clean_tx_irq(struct e1000_adapter *adapter,
3392 struct e1000_tx_ring *tx_ring)
1da177e4 3393{
1da177e4
LT		 3394 struct net_device *netdev = adapter->netdev;
3395 struct e1000_tx_desc *tx_desc, *eop_desc;
3396 struct e1000_buffer *buffer_info;
3397 unsigned int i, eop;
3398 boolean_t cleaned = FALSE;
3399
3400 i = tx_ring->next_to_clean;
3401 eop = tx_ring->buffer_info[i].next_to_watch;
3402 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3403
581d708e 3404 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
1da177e4
LT		 3405 for(cleaned = FALSE; !cleaned; ) {
3406 tx_desc = E1000_TX_DESC(*tx_ring, i);
3407 buffer_info = &tx_ring->buffer_info[i];
3408 cleaned = (i == eop);
3409
fd803241 3410 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1da177e4
LT		 3411
3412 tx_desc->buffer_addr = 0;
3413 tx_desc->lower.data = 0;
3414 tx_desc->upper.data = 0;
3415
1da177e4
LT		 3416 if(unlikely(++i == tx_ring->count)) i = 0;
3417 }
581d708e 3418
7bfa4816
JK		 3419#ifdef CONFIG_E1000_MQ
3420 tx_ring->tx_stats.packets++;
3421#endif
3422
1da177e4
LT		 3423 eop = tx_ring->buffer_info[i].next_to_watch;
3424 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3425 }
3426
3427 tx_ring->next_to_clean = i;
3428
581d708e 3429 spin_lock(&tx_ring->tx_lock);
1da177e4
LT		 3430
3431 if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3432 netif_carrier_ok(netdev)))
3433 netif_wake_queue(netdev);
3434
581d708e 3435 spin_unlock(&tx_ring->tx_lock);
2648345f 3436
581d708e 3437 if (adapter->detect_tx_hung) {
2648345f 3438 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3439 * check with the clearing of time_stamp and movement of i */
3440 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3441 if (tx_ring->buffer_info[eop].dma &&
3442 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3443 adapter->tx_timeout_factor * HZ)
70b8f1e1 3444 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3445 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3446
3447 /* detected Tx unit hang */
c6963ef5 3448 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3449 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3450 " TDH <%x>\n"
3451 " TDT <%x>\n"
3452 " next_to_use <%x>\n"
3453 " next_to_clean <%x>\n"
3454 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3455 " time_stamp <%lx>\n"
3456 " next_to_watch <%x>\n"
3457 " jiffies <%lx>\n"
3458 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3459 (unsigned long)((tx_ring - adapter->tx_ring) /
3460 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3461 readl(adapter->hw.hw_addr + tx_ring->tdh),
3462 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3463 tx_ring->next_to_use,
392137fa
JK		 3464 tx_ring->next_to_clean,
3465 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3466 eop,
3467 jiffies,
3468 eop_desc->upper.fields.status);
1da177e4 3469 netif_stop_queue(netdev);
70b8f1e1 3470 }
1da177e4 3471 }
1da177e4
LT		 3472 return cleaned;
3473}
3474
3475/**
3476 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3477 * @adapter: board private structure
3478 * @status_err: receive descriptor status and error fields
3479 * @csum: receive descriptor csum field
3480 * @sk_buff: socket buffer with received data
1da177e4
LT		 3481 **/
3482
3483static inline void
3484e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3485 uint32_t status_err, uint32_t csum,
3486 struct sk_buff *skb)
1da177e4 3487{
2d7edb92
MC		 3488 uint16_t status = (uint16_t)status_err;
3489 uint8_t errors = (uint8_t)(status_err >> 24);
3490 skb->ip_summed = CHECKSUM_NONE;
3491
1da177e4 3492 /* 82543 or newer only */
2d7edb92 3493 if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3494 /* Ignore Checksum bit is set */
2d7edb92
MC		 3495 if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3496 /* TCP/UDP checksum error bit is set */
3497 if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3498 /* let the stack verify checksum errors */
1da177e4 3499 adapter->hw_csum_err++;
2d7edb92
MC		 3500 return;
3501 }
3502 /* TCP/UDP Checksum has not been calculated */
3503 if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3504 if(!(status & E1000_RXD_STAT_TCPCS))
3505 return;
1da177e4 3506 } else {
2d7edb92
MC		 3507 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3508 return;
3509 }
3510 /* It must be a TCP or UDP packet with a valid checksum */
3511 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3512 /* TCP checksum is good */
3513 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3514 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3515 /* IP fragment with UDP payload */
3516 /* Hardware complements the payload checksum, so we undo it
3517 * and then put the value in host order for further stack use.
3518 */
3519 csum = ntohl(csum ^ 0xFFFF);
3520 skb->csum = csum;
3521 skb->ip_summed = CHECKSUM_HW;
1da177e4 3522 }
2d7edb92 3523 adapter->hw_csum_good++;
1da177e4
LT		 3524}
3525
3526/**
2d7edb92 3527 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3528 * @adapter: board private structure
3529 **/
3530
3531static boolean_t
3532#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3533e1000_clean_rx_irq(struct e1000_adapter *adapter,
3534 struct e1000_rx_ring *rx_ring,
3535 int *work_done, int work_to_do)
1da177e4 3536#else
581d708e
MC		 3537e1000_clean_rx_irq(struct e1000_adapter *adapter,
3538 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3539#endif
3540{
1da177e4
LT		 3541 struct net_device *netdev = adapter->netdev;
3542 struct pci_dev *pdev = adapter->pdev;
3543 struct e1000_rx_desc *rx_desc;
3544 struct e1000_buffer *buffer_info;
3545 struct sk_buff *skb;
3546 unsigned long flags;
3547 uint32_t length;
3548 uint8_t last_byte;
3549 unsigned int i;
3550 boolean_t cleaned = FALSE;
72d64a43 3551 int cleaned_count = 0;
1da177e4
LT		 3552
3553 i = rx_ring->next_to_clean;
3554 rx_desc = E1000_RX_DESC(*rx_ring, i);
3555
3556 while(rx_desc->status & E1000_RXD_STAT_DD) {
3557 buffer_info = &rx_ring->buffer_info[i];
3558#ifdef CONFIG_E1000_NAPI
3559 if(*work_done >= work_to_do)
3560 break;
3561 (*work_done)++;
3562#endif
1da177e4 3563
72d64a43
JK		 3564 cleaned = TRUE;
3565 cleaned_count++;
3566 pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
1da177e4
LT		 3567 PCI_DMA_FROMDEVICE);
3568
3569 skb = buffer_info->skb;
3570 length = le16_to_cpu(rx_desc->length);
3571
3572 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3573 /* All receives must fit into a single buffer */
3574 E1000_DBG("%s: Receive packet consumed multiple"
2648345f 3575 " buffers\n", netdev->name);
1da177e4
LT		 3576 dev_kfree_skb_irq(skb);
3577 goto next_desc;
3578 }
3579
3580 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3581 last_byte = *(skb->data + length - 1);
3582 if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3583 rx_desc->errors, length, last_byte)) {
3584 spin_lock_irqsave(&adapter->stats_lock, flags);
72d64a43 3585 e1000_tbi_adjust_stats(&adapter->hw, &adapter->stats,
1da177e4
LT		 3586 length, skb->data);
3587 spin_unlock_irqrestore(&adapter->stats_lock,
3588 flags);
3589 length--;
3590 } else {
3591 dev_kfree_skb_irq(skb);
3592 goto next_desc;
3593 }
3594 }
3595
3596 /* Good Receive */
3597 skb_put(skb, length - ETHERNET_FCS_SIZE);
3598
3599 /* Receive Checksum Offload */
72d64a43 3600 e1000_rx_checksum(adapter, (uint32_t)(rx_desc->status) |
2d7edb92
MC		 3601 ((uint32_t)(rx_desc->errors) << 24),
3602 rx_desc->csum, skb);
1da177e4
LT		 3603 skb->protocol = eth_type_trans(skb, netdev);
3604#ifdef CONFIG_E1000_NAPI
3605 if(unlikely(adapter->vlgrp &&
3606 (rx_desc->status & E1000_RXD_STAT_VP))) {
3607 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3608 le16_to_cpu(rx_desc->special) &
3609 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3610 } else {
3611 netif_receive_skb(skb);
3612 }
3613#else /* CONFIG_E1000_NAPI */
3614 if(unlikely(adapter->vlgrp &&
3615 (rx_desc->status & E1000_RXD_STAT_VP))) {
3616 vlan_hwaccel_rx(skb, adapter->vlgrp,
3617 le16_to_cpu(rx_desc->special) &
3618 E1000_RXD_SPC_VLAN_MASK);
3619 } else {
3620 netif_rx(skb);
3621 }
3622#endif /* CONFIG_E1000_NAPI */
3623 netdev->last_rx = jiffies;
7bfa4816
JK		 3624#ifdef CONFIG_E1000_MQ
3625 rx_ring->rx_stats.packets++;
3626 rx_ring->rx_stats.bytes += length;
3627#endif
1da177e4
LT		 3628
3629next_desc:
3630 rx_desc->status = 0;
1da177e4 3631
72d64a43
JK		 3632 /* return some buffers to hardware, one at a time is too slow */
3633 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3634 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3635 cleaned_count = 0;
3636 }
3637
1da177e4 3638 }
1da177e4 3639 rx_ring->next_to_clean = i;
72d64a43
JK		 3640
3641 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3642 if (cleaned_count)
3643 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3644
3645 return cleaned;
3646}
3647
3648/**
3649 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3650 * @adapter: board private structure
3651 **/
3652
3653static boolean_t
3654#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3655e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3656 struct e1000_rx_ring *rx_ring,
3657 int *work_done, int work_to_do)
2d7edb92 3658#else
581d708e
MC		 3659e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3660 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3661#endif
3662{
2d7edb92
MC		 3663 union e1000_rx_desc_packet_split *rx_desc;
3664 struct net_device *netdev = adapter->netdev;
3665 struct pci_dev *pdev = adapter->pdev;
3666 struct e1000_buffer *buffer_info;
3667 struct e1000_ps_page *ps_page;
3668 struct e1000_ps_page_dma *ps_page_dma;
3669 struct sk_buff *skb;
3670 unsigned int i, j;
3671 uint32_t length, staterr;
72d64a43 3672 int cleaned_count = 0;
2d7edb92
MC		 3673 boolean_t cleaned = FALSE;
3674
3675 i = rx_ring->next_to_clean;
3676 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3677 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3678
3679 while(staterr & E1000_RXD_STAT_DD) {
3680 buffer_info = &rx_ring->buffer_info[i];
3681 ps_page = &rx_ring->ps_page[i];
3682 ps_page_dma = &rx_ring->ps_page_dma[i];
3683#ifdef CONFIG_E1000_NAPI
3684 if(unlikely(*work_done >= work_to_do))
3685 break;
3686 (*work_done)++;
3687#endif
3688 cleaned = TRUE;
72d64a43 3689 cleaned_count++;
2d7edb92
MC		 3690 pci_unmap_single(pdev, buffer_info->dma,
3691 buffer_info->length,
3692 PCI_DMA_FROMDEVICE);
3693
3694 skb = buffer_info->skb;
3695
3696 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3697 E1000_DBG("%s: Packet Split buffers didn't pick up"
3698 " the full packet\n", netdev->name);
3699 dev_kfree_skb_irq(skb);
3700 goto next_desc;
3701 }
1da177e4 3702
2d7edb92
MC		 3703 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3704 dev_kfree_skb_irq(skb);
3705 goto next_desc;
3706 }
3707
3708 length = le16_to_cpu(rx_desc->wb.middle.length0);
3709
3710 if(unlikely(!length)) {
3711 E1000_DBG("%s: Last part of the packet spanning"
3712 " multiple descriptors\n", netdev->name);
3713 dev_kfree_skb_irq(skb);
3714 goto next_desc;
3715 }
3716
3717 /* Good Receive */
3718 skb_put(skb, length);
3719
e4c811c9 3720 for(j = 0; j < adapter->rx_ps_pages; j++) {
2d7edb92
MC		 3721 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3722 break;
3723
3724 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3725 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3726 ps_page_dma->ps_page_dma[j] = 0;
3727 skb_shinfo(skb)->frags[j].page =
3728 ps_page->ps_page[j];
3729 ps_page->ps_page[j] = NULL;
3730 skb_shinfo(skb)->frags[j].page_offset = 0;
3731 skb_shinfo(skb)->frags[j].size = length;
3732 skb_shinfo(skb)->nr_frags++;
3733 skb->len += length;
3734 skb->data_len += length;
3735 }
3736
3737 e1000_rx_checksum(adapter, staterr,
3738 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3739 skb->protocol = eth_type_trans(skb, netdev);
3740
2d7edb92 3741 if(likely(rx_desc->wb.upper.header_status &
e4c811c9
MC		 3742 E1000_RXDPS_HDRSTAT_HDRSP)) {
3743 adapter->rx_hdr_split++;
3744#ifdef HAVE_RX_ZERO_COPY
2d7edb92
MC		 3745 skb_shinfo(skb)->zero_copy = TRUE;
3746#endif
e4c811c9 3747 }
2d7edb92
MC		 3748#ifdef CONFIG_E1000_NAPI
3749 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3750 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3751 le16_to_cpu(rx_desc->wb.middle.vlan) &
3752 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3753 } else {
3754 netif_receive_skb(skb);
3755 }
3756#else /* CONFIG_E1000_NAPI */
3757 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3758 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3759 le16_to_cpu(rx_desc->wb.middle.vlan) &
3760 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3761 } else {
3762 netif_rx(skb);
3763 }
3764#endif /* CONFIG_E1000_NAPI */
3765 netdev->last_rx = jiffies;
7bfa4816
JK		 3766#ifdef CONFIG_E1000_MQ
3767 rx_ring->rx_stats.packets++;
3768 rx_ring->rx_stats.bytes += length;
3769#endif
2d7edb92
MC		 3770
3771next_desc:
3772 rx_desc->wb.middle.status_error &= ~0xFF;
3773 buffer_info->skb = NULL;
2d7edb92 3774
72d64a43
JK		 3775 /* return some buffers to hardware, one at a time is too slow */
3776 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3777 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3778 cleaned_count = 0;
3779 }
3780
683a38f3 3781 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3782 }
3783 rx_ring->next_to_clean = i;
72d64a43
JK		 3784
3785 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3786 if (cleaned_count)
3787 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3788
3789 return cleaned;
3790}
3791
3792/**
2d7edb92 3793 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3794 * @adapter: address of board private structure
3795 **/
3796
3797static void
581d708e 3798e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 3799 struct e1000_rx_ring *rx_ring,
3800 int cleaned_count)
1da177e4 3801{
1da177e4
LT		 3802 struct net_device *netdev = adapter->netdev;
3803 struct pci_dev *pdev = adapter->pdev;
3804 struct e1000_rx_desc *rx_desc;
3805 struct e1000_buffer *buffer_info;
3806 struct sk_buff *skb;
2648345f
MC		 3807 unsigned int i;
3808 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3809
3810 i = rx_ring->next_to_use;
3811 buffer_info = &rx_ring->buffer_info[i];
3812
3813 while(!buffer_info->skb) {
1da177e4 3814 skb = dev_alloc_skb(bufsz);
2648345f 3815
1da177e4
LT		 3816 if(unlikely(!skb)) {
3817 /* Better luck next round */
72d64a43 3818 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3819 break;
3820 }
3821
2648345f 3822 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3823 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3824 struct sk_buff *oldskb = skb;
2648345f
MC		 3825 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3826 "at %p\n", bufsz, skb->data);
3827 /* Try again, without freeing the previous */
1da177e4 3828 skb = dev_alloc_skb(bufsz);
2648345f 3829 /* Failed allocation, critical failure */
1da177e4
LT		 3830 if (!skb) {
3831 dev_kfree_skb(oldskb);
3832 break;
3833 }
2648345f 3834
1da177e4
LT		 3835 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3836 /* give up */
3837 dev_kfree_skb(skb);
3838 dev_kfree_skb(oldskb);
3839 break; /* while !buffer_info->skb */
3840 } else {
2648345f 3841 /* Use new allocation */
1da177e4
LT		 3842 dev_kfree_skb(oldskb);
3843 }
3844 }
1da177e4
LT		 3845 /* Make buffer alignment 2 beyond a 16 byte boundary
3846 * this will result in a 16 byte aligned IP header after
3847 * the 14 byte MAC header is removed
3848 */
3849 skb_reserve(skb, NET_IP_ALIGN);
3850
3851 skb->dev = netdev;
3852
3853 buffer_info->skb = skb;
3854 buffer_info->length = adapter->rx_buffer_len;
3855 buffer_info->dma = pci_map_single(pdev,
3856 skb->data,
3857 adapter->rx_buffer_len,
3858 PCI_DMA_FROMDEVICE);
3859
2648345f
MC		 3860 /* Fix for errata 23, can't cross 64kB boundary */
3861 if (!e1000_check_64k_bound(adapter,
3862 (void *)(unsigned long)buffer_info->dma,
3863 adapter->rx_buffer_len)) {
3864 DPRINTK(RX_ERR, ERR,
3865 "dma align check failed: %u bytes at %p\n",
3866 adapter->rx_buffer_len,
3867 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3868 dev_kfree_skb(skb);
3869 buffer_info->skb = NULL;
3870
2648345f 3871 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3872 adapter->rx_buffer_len,
3873 PCI_DMA_FROMDEVICE);
3874
3875 break; /* while !buffer_info->skb */
3876 }
1da177e4
LT		 3877 rx_desc = E1000_RX_DESC(*rx_ring, i);
3878 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3879
3880 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3881 /* Force memory writes to complete before letting h/w
3882 * know there are new descriptors to fetch. (Only
3883 * applicable for weak-ordered memory model archs,
3884 * such as IA-64). */
3885 wmb();
581d708e 3886 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
1da177e4
LT		 3887 }
3888
3889 if(unlikely(++i == rx_ring->count)) i = 0;
3890 buffer_info = &rx_ring->buffer_info[i];
3891 }
3892
3893 rx_ring->next_to_use = i;
3894}
3895
2d7edb92
MC		 3896/**
3897 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3898 * @adapter: address of board private structure
3899 **/
3900
3901static void
581d708e 3902e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 3903 struct e1000_rx_ring *rx_ring,
3904 int cleaned_count)
2d7edb92 3905{
2d7edb92
MC		 3906 struct net_device *netdev = adapter->netdev;
3907 struct pci_dev *pdev = adapter->pdev;
3908 union e1000_rx_desc_packet_split *rx_desc;
3909 struct e1000_buffer *buffer_info;
3910 struct e1000_ps_page *ps_page;
3911 struct e1000_ps_page_dma *ps_page_dma;
3912 struct sk_buff *skb;
3913 unsigned int i, j;
3914
3915 i = rx_ring->next_to_use;
3916 buffer_info = &rx_ring->buffer_info[i];
3917 ps_page = &rx_ring->ps_page[i];
3918 ps_page_dma = &rx_ring->ps_page_dma[i];
3919
72d64a43 3920 while (cleaned_count--) {
2d7edb92
MC		 3921 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3922
3923 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 3924 if (j < adapter->rx_ps_pages) {
3925 if (likely(!ps_page->ps_page[j])) {
3926 ps_page->ps_page[j] =
3927 alloc_page(GFP_ATOMIC);
3928 if (unlikely(!ps_page->ps_page[j]))
3929 goto no_buffers;
3930 ps_page_dma->ps_page_dma[j] =
3931 pci_map_page(pdev,
3932 ps_page->ps_page[j],
3933 0, PAGE_SIZE,
3934 PCI_DMA_FROMDEVICE);
3935 }
3936 /* Refresh the desc even if buffer_addrs didn't
3937 * change because each write-back erases
3938 * this info.
3939 */
3940 rx_desc->read.buffer_addr[j+1] =
3941 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3942 } else
3943 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 3944 }
3945
3946 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3947
3948 if(unlikely(!skb))
3949 break;
3950
3951 /* Make buffer alignment 2 beyond a 16 byte boundary
3952 * this will result in a 16 byte aligned IP header after
3953 * the 14 byte MAC header is removed
3954 */
3955 skb_reserve(skb, NET_IP_ALIGN);
3956
3957 skb->dev = netdev;
3958
3959 buffer_info->skb = skb;
3960 buffer_info->length = adapter->rx_ps_bsize0;
3961 buffer_info->dma = pci_map_single(pdev, skb->data,
3962 adapter->rx_ps_bsize0,
3963 PCI_DMA_FROMDEVICE);
3964
3965 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3966
3967 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3968 /* Force memory writes to complete before letting h/w
3969 * know there are new descriptors to fetch. (Only
3970 * applicable for weak-ordered memory model archs,
3971 * such as IA-64). */
3972 wmb();
3973 /* Hardware increments by 16 bytes, but packet split
3974 * descriptors are 32 bytes...so we increment tail
3975 * twice as much.
3976 */
581d708e 3977 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
2d7edb92
MC		 3978 }
3979
3980 if(unlikely(++i == rx_ring->count)) i = 0;
3981 buffer_info = &rx_ring->buffer_info[i];
3982 ps_page = &rx_ring->ps_page[i];
3983 ps_page_dma = &rx_ring->ps_page_dma[i];
3984 }
3985
3986no_buffers:
3987 rx_ring->next_to_use = i;
3988}
3989
1da177e4
LT		 3990/**
3991 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3992 * @adapter:
3993 **/
3994
3995static void
3996e1000_smartspeed(struct e1000_adapter *adapter)
3997{
3998 uint16_t phy_status;
3999 uint16_t phy_ctrl;
4000
4001 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4002 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4003 return;
4004
4005 if(adapter->smartspeed == 0) {
4006 /* If Master/Slave config fault is asserted twice,
4007 * we assume back-to-back */
4008 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4009 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4010 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4011 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4012 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4013 if(phy_ctrl & CR_1000T_MS_ENABLE) {
4014 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4015 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4016 phy_ctrl);
4017 adapter->smartspeed++;
4018 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
4019 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4020 &phy_ctrl)) {
4021 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4022 MII_CR_RESTART_AUTO_NEG);
4023 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4024 phy_ctrl);
4025 }
4026 }
4027 return;
4028 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4029 /* If still no link, perhaps using 2/3 pair cable */
4030 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4031 phy_ctrl |= CR_1000T_MS_ENABLE;
4032 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4033 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
4034 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4035 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4036 MII_CR_RESTART_AUTO_NEG);
4037 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4038 }
4039 }
4040 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4041 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4042 adapter->smartspeed = 0;
4043}
4044
4045/**
4046 * e1000_ioctl -
4047 * @netdev:
4048 * @ifreq:
4049 * @cmd:
4050 **/
4051
4052static int
4053e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4054{
4055 switch (cmd) {
4056 case SIOCGMIIPHY:
4057 case SIOCGMIIREG:
4058 case SIOCSMIIREG:
4059 return e1000_mii_ioctl(netdev, ifr, cmd);
4060 default:
4061 return -EOPNOTSUPP;
4062 }
4063}
4064
4065/**
4066 * e1000_mii_ioctl -
4067 * @netdev:
4068 * @ifreq:
4069 * @cmd:
4070 **/
4071
4072static int
4073e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4074{
60490fe0 4075 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4076 struct mii_ioctl_data *data = if_mii(ifr);
4077 int retval;
4078 uint16_t mii_reg;
4079 uint16_t spddplx;
97876fc6 4080 unsigned long flags;
1da177e4
LT		 4081
4082 if(adapter->hw.media_type != e1000_media_type_copper)
4083 return -EOPNOTSUPP;
4084
4085 switch (cmd) {
4086 case SIOCGMIIPHY:
4087 data->phy_id = adapter->hw.phy_addr;
4088 break;
4089 case SIOCGMIIREG:
97876fc6 4090 if(!capable(CAP_NET_ADMIN))
1da177e4 4091 return -EPERM;
97876fc6
MC		 4092 spin_lock_irqsave(&adapter->stats_lock, flags);
4093 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4094 &data->val_out)) {
4095 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4096 return -EIO;
97876fc6
MC		 4097 }
4098 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4099 break;
4100 case SIOCSMIIREG:
97876fc6 4101 if(!capable(CAP_NET_ADMIN))
1da177e4 4102 return -EPERM;
97876fc6 4103 if(data->reg_num & ~(0x1F))
1da177e4
LT		 4104 return -EFAULT;
4105 mii_reg = data->val_in;
97876fc6
MC		 4106 spin_lock_irqsave(&adapter->stats_lock, flags);
4107 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
4108 mii_reg)) {
4109 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4110 return -EIO;
97876fc6
MC		 4111 }
4112 if(adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 4113 switch (data->reg_num) {
4114 case PHY_CTRL:
4115 if(mii_reg & MII_CR_POWER_DOWN)
4116 break;
4117 if(mii_reg & MII_CR_AUTO_NEG_EN) {
4118 adapter->hw.autoneg = 1;
4119 adapter->hw.autoneg_advertised = 0x2F;
4120 } else {
4121 if (mii_reg & 0x40)
4122 spddplx = SPEED_1000;
4123 else if (mii_reg & 0x2000)
4124 spddplx = SPEED_100;
4125 else
4126 spddplx = SPEED_10;
4127 spddplx += (mii_reg & 0x100)
4128 ? FULL_DUPLEX :
4129 HALF_DUPLEX;
4130 retval = e1000_set_spd_dplx(adapter,
4131 spddplx);
97876fc6
MC		 4132 if(retval) {
4133 spin_unlock_irqrestore(
4134 &adapter->stats_lock,
4135 flags);
1da177e4 4136 return retval;
97876fc6 4137 }
1da177e4
LT		 4138 }
4139 if(netif_running(adapter->netdev)) {
4140 e1000_down(adapter);
4141 e1000_up(adapter);
4142 } else
4143 e1000_reset(adapter);
4144 break;
4145 case M88E1000_PHY_SPEC_CTRL:
4146 case M88E1000_EXT_PHY_SPEC_CTRL:
97876fc6
MC		 4147 if(e1000_phy_reset(&adapter->hw)) {
4148 spin_unlock_irqrestore(
4149 &adapter->stats_lock, flags);
1da177e4 4150 return -EIO;
97876fc6 4151 }
1da177e4
LT		 4152 break;
4153 }
4154 } else {
4155 switch (data->reg_num) {
4156 case PHY_CTRL:
4157 if(mii_reg & MII_CR_POWER_DOWN)
4158 break;
4159 if(netif_running(adapter->netdev)) {
4160 e1000_down(adapter);
4161 e1000_up(adapter);
4162 } else
4163 e1000_reset(adapter);
4164 break;
4165 }
4166 }
97876fc6 4167 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4168 break;
4169 default:
4170 return -EOPNOTSUPP;
4171 }
4172 return E1000_SUCCESS;
4173}
4174
4175void
4176e1000_pci_set_mwi(struct e1000_hw *hw)
4177{
4178 struct e1000_adapter *adapter = hw->back;
2648345f 4179 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4180
2648345f
MC		 4181 if(ret_val)
4182 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4183}
4184
4185void
4186e1000_pci_clear_mwi(struct e1000_hw *hw)
4187{
4188 struct e1000_adapter *adapter = hw->back;
4189
4190 pci_clear_mwi(adapter->pdev);
4191}
4192
4193void
4194e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4195{
4196 struct e1000_adapter *adapter = hw->back;
4197
4198 pci_read_config_word(adapter->pdev, reg, value);
4199}
4200
4201void
4202e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4203{
4204 struct e1000_adapter *adapter = hw->back;
4205
4206 pci_write_config_word(adapter->pdev, reg, *value);
4207}
4208
4209uint32_t
4210e1000_io_read(struct e1000_hw *hw, unsigned long port)
4211{
4212 return inl(port);
4213}
4214
4215void
4216e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4217{
4218 outl(value, port);
4219}
4220
4221static void
4222e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4223{
60490fe0 4224 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4225 uint32_t ctrl, rctl;
4226
4227 e1000_irq_disable(adapter);
4228 adapter->vlgrp = grp;
4229
4230 if(grp) {
4231 /* enable VLAN tag insert/strip */
4232 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4233 ctrl |= E1000_CTRL_VME;
4234 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4235
4236 /* enable VLAN receive filtering */
4237 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4238 rctl |= E1000_RCTL_VFE;
4239 rctl &= ~E1000_RCTL_CFIEN;
4240 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4241 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4242 } else {
4243 /* disable VLAN tag insert/strip */
4244 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4245 ctrl &= ~E1000_CTRL_VME;
4246 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4247
4248 /* disable VLAN filtering */
4249 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4250 rctl &= ~E1000_RCTL_VFE;
4251 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92
MC		 4252 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4253 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4254 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4255 }
1da177e4
LT		 4256 }
4257
4258 e1000_irq_enable(adapter);
4259}
4260
4261static void
4262e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4263{
60490fe0 4264 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4265 uint32_t vfta, index;
2d7edb92
MC		 4266 if((adapter->hw.mng_cookie.status &
4267 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4268 (vid == adapter->mng_vlan_id))
4269 return;
1da177e4
LT		 4270 /* add VID to filter table */
4271 index = (vid >> 5) & 0x7F;
4272 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4273 vfta |= (1 << (vid & 0x1F));
4274 e1000_write_vfta(&adapter->hw, index, vfta);
4275}
4276
4277static void
4278e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4279{
60490fe0 4280 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4281 uint32_t vfta, index;
4282
4283 e1000_irq_disable(adapter);
4284
4285 if(adapter->vlgrp)
4286 adapter->vlgrp->vlan_devices[vid] = NULL;
4287
4288 e1000_irq_enable(adapter);
4289
2d7edb92
MC		 4290 if((adapter->hw.mng_cookie.status &
4291 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4292 (vid == adapter->mng_vlan_id)) {
4293 /* release control to f/w */
4294 e1000_release_hw_control(adapter);
2d7edb92 4295 return;
ff147013
JK		 4296 }
4297
1da177e4
LT		 4298 /* remove VID from filter table */
4299 index = (vid >> 5) & 0x7F;
4300 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4301 vfta &= ~(1 << (vid & 0x1F));
4302 e1000_write_vfta(&adapter->hw, index, vfta);
4303}
4304
4305static void
4306e1000_restore_vlan(struct e1000_adapter *adapter)
4307{
4308 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4309
4310 if(adapter->vlgrp) {
4311 uint16_t vid;
4312 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4313 if(!adapter->vlgrp->vlan_devices[vid])
4314 continue;
4315 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4316 }
4317 }
4318}
4319
4320int
4321e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4322{
4323 adapter->hw.autoneg = 0;
4324
6921368f
MC		 4325 /* Fiber NICs only allow 1000 gbps Full duplex */
4326 if((adapter->hw.media_type == e1000_media_type_fiber) &&
4327 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4328 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4329 return -EINVAL;
4330 }
4331
1da177e4
LT		 4332 switch(spddplx) {
4333 case SPEED_10 + DUPLEX_HALF:
4334 adapter->hw.forced_speed_duplex = e1000_10_half;
4335 break;
4336 case SPEED_10 + DUPLEX_FULL:
4337 adapter->hw.forced_speed_duplex = e1000_10_full;
4338 break;
4339 case SPEED_100 + DUPLEX_HALF:
4340 adapter->hw.forced_speed_duplex = e1000_100_half;
4341 break;
4342 case SPEED_100 + DUPLEX_FULL:
4343 adapter->hw.forced_speed_duplex = e1000_100_full;
4344 break;
4345 case SPEED_1000 + DUPLEX_FULL:
4346 adapter->hw.autoneg = 1;
4347 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4348 break;
4349 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4350 default:
2648345f 4351 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4352 return -EINVAL;
4353 }
4354 return 0;
4355}
4356
b6a1d5f8 4357#ifdef CONFIG_PM
1da177e4 4358static int
829ca9a3 4359e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4360{
4361 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4362 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4363 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4
LT		 4364 uint32_t wufc = adapter->wol;
4365
4366 netif_device_detach(netdev);
4367
4368 if(netif_running(netdev))
4369 e1000_down(adapter);
4370
4371 status = E1000_READ_REG(&adapter->hw, STATUS);
4372 if(status & E1000_STATUS_LU)
4373 wufc &= ~E1000_WUFC_LNKC;
4374
4375 if(wufc) {
4376 e1000_setup_rctl(adapter);
4377 e1000_set_multi(netdev);
4378
4379 /* turn on all-multi mode if wake on multicast is enabled */
4380 if(adapter->wol & E1000_WUFC_MC) {
4381 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4382 rctl |= E1000_RCTL_MPE;
4383 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4384 }
4385
4386 if(adapter->hw.mac_type >= e1000_82540) {
4387 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4388 /* advertise wake from D3Cold */
4389 #define E1000_CTRL_ADVD3WUC 0x00100000
4390 /* phy power management enable */
4391 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4392 ctrl |= E1000_CTRL_ADVD3WUC |
4393 E1000_CTRL_EN_PHY_PWR_MGMT;
4394 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4395 }
4396
4397 if(adapter->hw.media_type == e1000_media_type_fiber ||
4398 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4399 /* keep the laser running in D3 */
4400 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4401 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4402 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4403 }
4404
2d7edb92
MC		 4405 /* Allow time for pending master requests to run */
4406 e1000_disable_pciex_master(&adapter->hw);
4407
1da177e4
LT		 4408 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4409 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4410 pci_enable_wake(pdev, 3, 1);
4411 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4412 } else {
4413 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4414 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4415 pci_enable_wake(pdev, 3, 0);
4416 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4417 }
4418
4419 pci_save_state(pdev);
4420
4421 if(adapter->hw.mac_type >= e1000_82540 &&
4422 adapter->hw.media_type == e1000_media_type_copper) {
4423 manc = E1000_READ_REG(&adapter->hw, MANC);
4424 if(manc & E1000_MANC_SMBUS_EN) {
4425 manc |= E1000_MANC_ARP_EN;
4426 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4427 pci_enable_wake(pdev, 3, 1);
4428 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4429 }
4430 }
4431
b55ccb35
JK		 4432 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4433 * would have already happened in close and is redundant. */
4434 e1000_release_hw_control(adapter);
2d7edb92 4435
1da177e4 4436 pci_disable_device(pdev);
829ca9a3 4437 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4438
4439 return 0;
4440}
4441
1da177e4
LT		 4442static int
4443e1000_resume(struct pci_dev *pdev)
4444{
4445 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4446 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4447 uint32_t manc, ret_val;
1da177e4 4448
829ca9a3 4449 pci_set_power_state(pdev, PCI_D0);
1da177e4 4450 pci_restore_state(pdev);
2b02893e 4451 ret_val = pci_enable_device(pdev);
a4cb847d 4452 pci_set_master(pdev);
1da177e4 4453
829ca9a3
PM		 4454 pci_enable_wake(pdev, PCI_D3hot, 0);
4455 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4456
4457 e1000_reset(adapter);
4458 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4459
4460 if(netif_running(netdev))
4461 e1000_up(adapter);
4462
4463 netif_device_attach(netdev);
4464
4465 if(adapter->hw.mac_type >= e1000_82540 &&
4466 adapter->hw.media_type == e1000_media_type_copper) {
4467 manc = E1000_READ_REG(&adapter->hw, MANC);
4468 manc &= ~(E1000_MANC_ARP_EN);
4469 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4470 }
4471
b55ccb35
JK		 4472 /* If the controller is 82573 and f/w is AMT, do not set
4473 * DRV_LOAD until the interface is up. For all other cases,
4474 * let the f/w know that the h/w is now under the control
4475 * of the driver. */
4476 if (adapter->hw.mac_type != e1000_82573 ||
4477 !e1000_check_mng_mode(&adapter->hw))
4478 e1000_get_hw_control(adapter);
2d7edb92 4479
1da177e4
LT		 4480 return 0;
4481}
4482#endif
1da177e4
LT		 4483#ifdef CONFIG_NET_POLL_CONTROLLER
4484/*
4485 * Polling 'interrupt' - used by things like netconsole to send skbs
4486 * without having to re-enable interrupts. It's not called while
4487 * the interrupt routine is executing.
4488 */
4489static void
2648345f 4490e1000_netpoll(struct net_device *netdev)
1da177e4 4491{
60490fe0 4492 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4493 disable_irq(adapter->pdev->irq);
4494 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4495 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4496#ifndef CONFIG_E1000_NAPI
4497 adapter->clean_rx(adapter, adapter->rx_ring);
4498#endif
1da177e4
LT		 4499 enable_irq(adapter->pdev->irq);
4500}
4501#endif
4502
4503/* e1000_main.c */
Linux kernel - Deliverables
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