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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
3 | ||
2648345f | 4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. |
1da177e4 LT |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2 of the License, or (at your option) | |
9 | any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License along with | |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | The full GNU General Public License is included in this distribution in the | |
21 | file called LICENSE. | |
22 | ||
23 | Contact Information: | |
24 | Linux NICS <linux.nics@intel.com> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "e1000.h" | |
30 | ||
31 | /* Change Log | |
2b02893e MC |
32 | * 6.0.58 4/20/05 |
33 | * o Accepted ethtool cleanup patch from Stephen Hemminger | |
2648345f MC |
34 | * 6.0.44+ 2/15/05 |
35 | * o applied Anton's patch to resolve tx hang in hardware | |
36 | * o Applied Andrew Mortons patch - e1000 stops working after resume | |
1da177e4 LT |
37 | */ |
38 | ||
39 | char e1000_driver_name[] = "e1000"; | |
40 | char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; | |
41 | #ifndef CONFIG_E1000_NAPI | |
42 | #define DRIVERNAPI | |
43 | #else | |
44 | #define DRIVERNAPI "-NAPI" | |
45 | #endif | |
2b02893e | 46 | #define DRV_VERSION "6.0.60-k2"DRIVERNAPI |
1da177e4 | 47 | char e1000_driver_version[] = DRV_VERSION; |
2b02893e | 48 | char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation."; |
1da177e4 LT |
49 | |
50 | /* e1000_pci_tbl - PCI Device ID Table | |
51 | * | |
52 | * Last entry must be all 0s | |
53 | * | |
54 | * Macro expands to... | |
55 | * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} | |
56 | */ | |
57 | static struct pci_device_id e1000_pci_tbl[] = { | |
58 | INTEL_E1000_ETHERNET_DEVICE(0x1000), | |
59 | INTEL_E1000_ETHERNET_DEVICE(0x1001), | |
60 | INTEL_E1000_ETHERNET_DEVICE(0x1004), | |
61 | INTEL_E1000_ETHERNET_DEVICE(0x1008), | |
62 | INTEL_E1000_ETHERNET_DEVICE(0x1009), | |
63 | INTEL_E1000_ETHERNET_DEVICE(0x100C), | |
64 | INTEL_E1000_ETHERNET_DEVICE(0x100D), | |
65 | INTEL_E1000_ETHERNET_DEVICE(0x100E), | |
66 | INTEL_E1000_ETHERNET_DEVICE(0x100F), | |
67 | INTEL_E1000_ETHERNET_DEVICE(0x1010), | |
68 | INTEL_E1000_ETHERNET_DEVICE(0x1011), | |
69 | INTEL_E1000_ETHERNET_DEVICE(0x1012), | |
70 | INTEL_E1000_ETHERNET_DEVICE(0x1013), | |
71 | INTEL_E1000_ETHERNET_DEVICE(0x1014), | |
72 | INTEL_E1000_ETHERNET_DEVICE(0x1015), | |
73 | INTEL_E1000_ETHERNET_DEVICE(0x1016), | |
74 | INTEL_E1000_ETHERNET_DEVICE(0x1017), | |
75 | INTEL_E1000_ETHERNET_DEVICE(0x1018), | |
76 | INTEL_E1000_ETHERNET_DEVICE(0x1019), | |
2648345f | 77 | INTEL_E1000_ETHERNET_DEVICE(0x101A), |
1da177e4 LT |
78 | INTEL_E1000_ETHERNET_DEVICE(0x101D), |
79 | INTEL_E1000_ETHERNET_DEVICE(0x101E), | |
80 | INTEL_E1000_ETHERNET_DEVICE(0x1026), | |
81 | INTEL_E1000_ETHERNET_DEVICE(0x1027), | |
82 | INTEL_E1000_ETHERNET_DEVICE(0x1028), | |
83 | INTEL_E1000_ETHERNET_DEVICE(0x1075), | |
84 | INTEL_E1000_ETHERNET_DEVICE(0x1076), | |
85 | INTEL_E1000_ETHERNET_DEVICE(0x1077), | |
86 | INTEL_E1000_ETHERNET_DEVICE(0x1078), | |
87 | INTEL_E1000_ETHERNET_DEVICE(0x1079), | |
88 | INTEL_E1000_ETHERNET_DEVICE(0x107A), | |
89 | INTEL_E1000_ETHERNET_DEVICE(0x107B), | |
90 | INTEL_E1000_ETHERNET_DEVICE(0x107C), | |
91 | INTEL_E1000_ETHERNET_DEVICE(0x108A), | |
2648345f MC |
92 | INTEL_E1000_ETHERNET_DEVICE(0x108B), |
93 | INTEL_E1000_ETHERNET_DEVICE(0x108C), | |
94 | INTEL_E1000_ETHERNET_DEVICE(0x1099), | |
1da177e4 LT |
95 | /* required last entry */ |
96 | {0,} | |
97 | }; | |
98 | ||
99 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
100 | ||
101 | int e1000_up(struct e1000_adapter *adapter); | |
102 | void e1000_down(struct e1000_adapter *adapter); | |
103 | void e1000_reset(struct e1000_adapter *adapter); | |
104 | int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); | |
581d708e MC |
105 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); |
106 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | |
107 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | |
108 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | |
109 | int e1000_setup_tx_resources(struct e1000_adapter *adapter, | |
110 | struct e1000_tx_ring *txdr); | |
111 | int e1000_setup_rx_resources(struct e1000_adapter *adapter, | |
112 | struct e1000_rx_ring *rxdr); | |
113 | void e1000_free_tx_resources(struct e1000_adapter *adapter, | |
114 | struct e1000_tx_ring *tx_ring); | |
115 | void e1000_free_rx_resources(struct e1000_adapter *adapter, | |
116 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
117 | void e1000_update_stats(struct e1000_adapter *adapter); |
118 | ||
119 | /* Local Function Prototypes */ | |
120 | ||
121 | static int e1000_init_module(void); | |
122 | static void e1000_exit_module(void); | |
123 | static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
124 | static void __devexit e1000_remove(struct pci_dev *pdev); | |
581d708e MC |
125 | static int e1000_alloc_queues(struct e1000_adapter *adapter); |
126 | #ifdef CONFIG_E1000_MQ | |
127 | static void e1000_setup_queue_mapping(struct e1000_adapter *adapter); | |
128 | #endif | |
1da177e4 LT |
129 | static int e1000_sw_init(struct e1000_adapter *adapter); |
130 | static int e1000_open(struct net_device *netdev); | |
131 | static int e1000_close(struct net_device *netdev); | |
132 | static void e1000_configure_tx(struct e1000_adapter *adapter); | |
133 | static void e1000_configure_rx(struct e1000_adapter *adapter); | |
134 | static void e1000_setup_rctl(struct e1000_adapter *adapter); | |
581d708e MC |
135 | static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); |
136 | static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); | |
137 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter, | |
138 | struct e1000_tx_ring *tx_ring); | |
139 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter, | |
140 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
141 | static void e1000_set_multi(struct net_device *netdev); |
142 | static void e1000_update_phy_info(unsigned long data); | |
143 | static void e1000_watchdog(unsigned long data); | |
144 | static void e1000_watchdog_task(struct e1000_adapter *adapter); | |
145 | static void e1000_82547_tx_fifo_stall(unsigned long data); | |
146 | static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
147 | static struct net_device_stats * e1000_get_stats(struct net_device *netdev); | |
148 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |
149 | static int e1000_set_mac(struct net_device *netdev, void *p); | |
150 | static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs); | |
581d708e MC |
151 | static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, |
152 | struct e1000_tx_ring *tx_ring); | |
1da177e4 | 153 | #ifdef CONFIG_E1000_NAPI |
581d708e | 154 | static int e1000_clean(struct net_device *poll_dev, int *budget); |
1da177e4 | 155 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
581d708e | 156 | struct e1000_rx_ring *rx_ring, |
1da177e4 | 157 | int *work_done, int work_to_do); |
2d7edb92 | 158 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
581d708e | 159 | struct e1000_rx_ring *rx_ring, |
2d7edb92 | 160 | int *work_done, int work_to_do); |
1da177e4 | 161 | #else |
581d708e MC |
162 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, |
163 | struct e1000_rx_ring *rx_ring); | |
164 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |
165 | struct e1000_rx_ring *rx_ring); | |
1da177e4 | 166 | #endif |
581d708e MC |
167 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
168 | struct e1000_rx_ring *rx_ring); | |
169 | static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, | |
170 | struct e1000_rx_ring *rx_ring); | |
1da177e4 LT |
171 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
172 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
173 | int cmd); | |
174 | void e1000_set_ethtool_ops(struct net_device *netdev); | |
175 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); | |
176 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |
177 | static void e1000_tx_timeout(struct net_device *dev); | |
178 | static void e1000_tx_timeout_task(struct net_device *dev); | |
179 | static void e1000_smartspeed(struct e1000_adapter *adapter); | |
180 | static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, | |
181 | struct sk_buff *skb); | |
182 | ||
183 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | |
184 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | |
185 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | |
186 | static void e1000_restore_vlan(struct e1000_adapter *adapter); | |
187 | ||
829ca9a3 | 188 | static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); |
1da177e4 LT |
189 | #ifdef CONFIG_PM |
190 | static int e1000_resume(struct pci_dev *pdev); | |
191 | #endif | |
192 | ||
193 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
194 | /* for netdump / net console */ | |
195 | static void e1000_netpoll (struct net_device *netdev); | |
196 | #endif | |
197 | ||
24025e4e MC |
198 | #ifdef CONFIG_E1000_MQ |
199 | /* for multiple Rx queues */ | |
200 | void e1000_rx_schedule(void *data); | |
201 | #endif | |
202 | ||
1da177e4 LT |
203 | /* Exported from other modules */ |
204 | ||
205 | extern void e1000_check_options(struct e1000_adapter *adapter); | |
206 | ||
207 | static struct pci_driver e1000_driver = { | |
208 | .name = e1000_driver_name, | |
209 | .id_table = e1000_pci_tbl, | |
210 | .probe = e1000_probe, | |
211 | .remove = __devexit_p(e1000_remove), | |
212 | /* Power Managment Hooks */ | |
213 | #ifdef CONFIG_PM | |
214 | .suspend = e1000_suspend, | |
215 | .resume = e1000_resume | |
216 | #endif | |
217 | }; | |
218 | ||
219 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
220 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
221 | MODULE_LICENSE("GPL"); | |
222 | MODULE_VERSION(DRV_VERSION); | |
223 | ||
224 | static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
225 | module_param(debug, int, 0); | |
226 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
227 | ||
228 | /** | |
229 | * e1000_init_module - Driver Registration Routine | |
230 | * | |
231 | * e1000_init_module is the first routine called when the driver is | |
232 | * loaded. All it does is register with the PCI subsystem. | |
233 | **/ | |
234 | ||
235 | static int __init | |
236 | e1000_init_module(void) | |
237 | { | |
238 | int ret; | |
239 | printk(KERN_INFO "%s - version %s\n", | |
240 | e1000_driver_string, e1000_driver_version); | |
241 | ||
242 | printk(KERN_INFO "%s\n", e1000_copyright); | |
243 | ||
244 | ret = pci_module_init(&e1000_driver); | |
8b378def | 245 | |
1da177e4 LT |
246 | return ret; |
247 | } | |
248 | ||
249 | module_init(e1000_init_module); | |
250 | ||
251 | /** | |
252 | * e1000_exit_module - Driver Exit Cleanup Routine | |
253 | * | |
254 | * e1000_exit_module is called just before the driver is removed | |
255 | * from memory. | |
256 | **/ | |
257 | ||
258 | static void __exit | |
259 | e1000_exit_module(void) | |
260 | { | |
1da177e4 LT |
261 | pci_unregister_driver(&e1000_driver); |
262 | } | |
263 | ||
264 | module_exit(e1000_exit_module); | |
265 | ||
266 | /** | |
267 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
268 | * @adapter: board private structure | |
269 | **/ | |
270 | ||
271 | static inline void | |
272 | e1000_irq_disable(struct e1000_adapter *adapter) | |
273 | { | |
274 | atomic_inc(&adapter->irq_sem); | |
275 | E1000_WRITE_REG(&adapter->hw, IMC, ~0); | |
276 | E1000_WRITE_FLUSH(&adapter->hw); | |
277 | synchronize_irq(adapter->pdev->irq); | |
278 | } | |
279 | ||
280 | /** | |
281 | * e1000_irq_enable - Enable default interrupt generation settings | |
282 | * @adapter: board private structure | |
283 | **/ | |
284 | ||
285 | static inline void | |
286 | e1000_irq_enable(struct e1000_adapter *adapter) | |
287 | { | |
288 | if(likely(atomic_dec_and_test(&adapter->irq_sem))) { | |
289 | E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); | |
290 | E1000_WRITE_FLUSH(&adapter->hw); | |
291 | } | |
292 | } | |
2d7edb92 MC |
293 | void |
294 | e1000_update_mng_vlan(struct e1000_adapter *adapter) | |
295 | { | |
296 | struct net_device *netdev = adapter->netdev; | |
297 | uint16_t vid = adapter->hw.mng_cookie.vlan_id; | |
298 | uint16_t old_vid = adapter->mng_vlan_id; | |
299 | if(adapter->vlgrp) { | |
300 | if(!adapter->vlgrp->vlan_devices[vid]) { | |
301 | if(adapter->hw.mng_cookie.status & | |
302 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { | |
303 | e1000_vlan_rx_add_vid(netdev, vid); | |
304 | adapter->mng_vlan_id = vid; | |
305 | } else | |
306 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
307 | ||
308 | if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && | |
309 | (vid != old_vid) && | |
310 | !adapter->vlgrp->vlan_devices[old_vid]) | |
311 | e1000_vlan_rx_kill_vid(netdev, old_vid); | |
312 | } | |
313 | } | |
314 | } | |
315 | ||
1da177e4 LT |
316 | int |
317 | e1000_up(struct e1000_adapter *adapter) | |
318 | { | |
319 | struct net_device *netdev = adapter->netdev; | |
581d708e | 320 | int i, err; |
1da177e4 LT |
321 | |
322 | /* hardware has been reset, we need to reload some things */ | |
323 | ||
324 | /* Reset the PHY if it was previously powered down */ | |
325 | if(adapter->hw.media_type == e1000_media_type_copper) { | |
326 | uint16_t mii_reg; | |
327 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
328 | if(mii_reg & MII_CR_POWER_DOWN) | |
329 | e1000_phy_reset(&adapter->hw); | |
330 | } | |
331 | ||
332 | e1000_set_multi(netdev); | |
333 | ||
334 | e1000_restore_vlan(adapter); | |
335 | ||
336 | e1000_configure_tx(adapter); | |
337 | e1000_setup_rctl(adapter); | |
338 | e1000_configure_rx(adapter); | |
581d708e MC |
339 | for (i = 0; i < adapter->num_queues; i++) |
340 | adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]); | |
1da177e4 | 341 | |
fa4f7ef3 MC |
342 | #ifdef CONFIG_PCI_MSI |
343 | if(adapter->hw.mac_type > e1000_82547_rev_2) { | |
344 | adapter->have_msi = TRUE; | |
345 | if((err = pci_enable_msi(adapter->pdev))) { | |
346 | DPRINTK(PROBE, ERR, | |
347 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
348 | adapter->have_msi = FALSE; | |
349 | } | |
350 | } | |
351 | #endif | |
1da177e4 LT |
352 | if((err = request_irq(adapter->pdev->irq, &e1000_intr, |
353 | SA_SHIRQ | SA_SAMPLE_RANDOM, | |
2648345f MC |
354 | netdev->name, netdev))) { |
355 | DPRINTK(PROBE, ERR, | |
356 | "Unable to allocate interrupt Error: %d\n", err); | |
1da177e4 | 357 | return err; |
2648345f | 358 | } |
1da177e4 LT |
359 | |
360 | mod_timer(&adapter->watchdog_timer, jiffies); | |
1da177e4 LT |
361 | |
362 | #ifdef CONFIG_E1000_NAPI | |
363 | netif_poll_enable(netdev); | |
364 | #endif | |
5de55624 MC |
365 | e1000_irq_enable(adapter); |
366 | ||
1da177e4 LT |
367 | return 0; |
368 | } | |
369 | ||
370 | void | |
371 | e1000_down(struct e1000_adapter *adapter) | |
372 | { | |
373 | struct net_device *netdev = adapter->netdev; | |
374 | ||
375 | e1000_irq_disable(adapter); | |
24025e4e MC |
376 | #ifdef CONFIG_E1000_MQ |
377 | while (atomic_read(&adapter->rx_sched_call_data.count) != 0); | |
378 | #endif | |
1da177e4 | 379 | free_irq(adapter->pdev->irq, netdev); |
fa4f7ef3 MC |
380 | #ifdef CONFIG_PCI_MSI |
381 | if(adapter->hw.mac_type > e1000_82547_rev_2 && | |
382 | adapter->have_msi == TRUE) | |
383 | pci_disable_msi(adapter->pdev); | |
384 | #endif | |
1da177e4 LT |
385 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
386 | del_timer_sync(&adapter->watchdog_timer); | |
387 | del_timer_sync(&adapter->phy_info_timer); | |
388 | ||
389 | #ifdef CONFIG_E1000_NAPI | |
390 | netif_poll_disable(netdev); | |
391 | #endif | |
392 | adapter->link_speed = 0; | |
393 | adapter->link_duplex = 0; | |
394 | netif_carrier_off(netdev); | |
395 | netif_stop_queue(netdev); | |
396 | ||
397 | e1000_reset(adapter); | |
581d708e MC |
398 | e1000_clean_all_tx_rings(adapter); |
399 | e1000_clean_all_rx_rings(adapter); | |
1da177e4 LT |
400 | |
401 | /* If WoL is not enabled | |
2d7edb92 | 402 | * and management mode is not IAMT |
1da177e4 | 403 | * Power down the PHY so no link is implied when interface is down */ |
2d7edb92 MC |
404 | if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 && |
405 | adapter->hw.media_type == e1000_media_type_copper && | |
406 | !e1000_check_mng_mode(&adapter->hw) && | |
407 | !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) { | |
1da177e4 LT |
408 | uint16_t mii_reg; |
409 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | |
410 | mii_reg |= MII_CR_POWER_DOWN; | |
411 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | |
4e48a2b9 | 412 | mdelay(1); |
1da177e4 LT |
413 | } |
414 | } | |
415 | ||
416 | void | |
417 | e1000_reset(struct e1000_adapter *adapter) | |
418 | { | |
1125ecbc | 419 | struct net_device *netdev = adapter->netdev; |
2d7edb92 | 420 | uint32_t pba, manc; |
1125ecbc MC |
421 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
422 | uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF; | |
1da177e4 LT |
423 | |
424 | /* Repartition Pba for greater than 9k mtu | |
425 | * To take effect CTRL.RST is required. | |
426 | */ | |
427 | ||
2d7edb92 MC |
428 | switch (adapter->hw.mac_type) { |
429 | case e1000_82547: | |
0e6ef3e0 | 430 | case e1000_82547_rev_2: |
2d7edb92 MC |
431 | pba = E1000_PBA_30K; |
432 | break; | |
868d5309 MC |
433 | case e1000_82571: |
434 | case e1000_82572: | |
435 | pba = E1000_PBA_38K; | |
436 | break; | |
2d7edb92 MC |
437 | case e1000_82573: |
438 | pba = E1000_PBA_12K; | |
439 | break; | |
440 | default: | |
441 | pba = E1000_PBA_48K; | |
442 | break; | |
443 | } | |
444 | ||
1125ecbc MC |
445 | if((adapter->hw.mac_type != e1000_82573) && |
446 | (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) { | |
447 | pba -= 8; /* allocate more FIFO for Tx */ | |
448 | /* send an XOFF when there is enough space in the | |
449 | * Rx FIFO to hold one extra full size Rx packet | |
450 | */ | |
451 | fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE + | |
452 | ETHERNET_FCS_SIZE + 1; | |
453 | fc_low_water_mark = fc_high_water_mark + 8; | |
454 | } | |
2d7edb92 MC |
455 | |
456 | ||
457 | if(adapter->hw.mac_type == e1000_82547) { | |
1da177e4 LT |
458 | adapter->tx_fifo_head = 0; |
459 | adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; | |
460 | adapter->tx_fifo_size = | |
461 | (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; | |
462 | atomic_set(&adapter->tx_fifo_stall, 0); | |
463 | } | |
2d7edb92 | 464 | |
1da177e4 LT |
465 | E1000_WRITE_REG(&adapter->hw, PBA, pba); |
466 | ||
467 | /* flow control settings */ | |
468 | adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) - | |
1125ecbc | 469 | fc_high_water_mark; |
1da177e4 | 470 | adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) - |
1125ecbc | 471 | fc_low_water_mark; |
1da177e4 LT |
472 | adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; |
473 | adapter->hw.fc_send_xon = 1; | |
474 | adapter->hw.fc = adapter->hw.original_fc; | |
475 | ||
2d7edb92 | 476 | /* Allow time for pending master requests to run */ |
1da177e4 LT |
477 | e1000_reset_hw(&adapter->hw); |
478 | if(adapter->hw.mac_type >= e1000_82544) | |
479 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | |
480 | if(e1000_init_hw(&adapter->hw)) | |
481 | DPRINTK(PROBE, ERR, "Hardware Error\n"); | |
2d7edb92 | 482 | e1000_update_mng_vlan(adapter); |
1da177e4 LT |
483 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
484 | E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); | |
485 | ||
486 | e1000_reset_adaptive(&adapter->hw); | |
487 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2d7edb92 MC |
488 | if (adapter->en_mng_pt) { |
489 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
490 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); | |
491 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
492 | } | |
1da177e4 LT |
493 | } |
494 | ||
495 | /** | |
496 | * e1000_probe - Device Initialization Routine | |
497 | * @pdev: PCI device information struct | |
498 | * @ent: entry in e1000_pci_tbl | |
499 | * | |
500 | * Returns 0 on success, negative on failure | |
501 | * | |
502 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
503 | * The OS initialization, configuring of the adapter private structure, | |
504 | * and a hardware reset occur. | |
505 | **/ | |
506 | ||
507 | static int __devinit | |
508 | e1000_probe(struct pci_dev *pdev, | |
509 | const struct pci_device_id *ent) | |
510 | { | |
511 | struct net_device *netdev; | |
512 | struct e1000_adapter *adapter; | |
2d7edb92 | 513 | unsigned long mmio_start, mmio_len; |
868d5309 | 514 | uint32_t ctrl_ext; |
2d7edb92 MC |
515 | uint32_t swsm; |
516 | ||
1da177e4 | 517 | static int cards_found = 0; |
2d7edb92 | 518 | int i, err, pci_using_dac; |
1da177e4 LT |
519 | uint16_t eeprom_data; |
520 | uint16_t eeprom_apme_mask = E1000_EEPROM_APME; | |
1da177e4 LT |
521 | if((err = pci_enable_device(pdev))) |
522 | return err; | |
523 | ||
524 | if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) { | |
525 | pci_using_dac = 1; | |
526 | } else { | |
527 | if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) { | |
528 | E1000_ERR("No usable DMA configuration, aborting\n"); | |
529 | return err; | |
530 | } | |
531 | pci_using_dac = 0; | |
532 | } | |
533 | ||
534 | if((err = pci_request_regions(pdev, e1000_driver_name))) | |
535 | return err; | |
536 | ||
537 | pci_set_master(pdev); | |
538 | ||
539 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); | |
540 | if(!netdev) { | |
541 | err = -ENOMEM; | |
542 | goto err_alloc_etherdev; | |
543 | } | |
544 | ||
545 | SET_MODULE_OWNER(netdev); | |
546 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
547 | ||
548 | pci_set_drvdata(pdev, netdev); | |
60490fe0 | 549 | adapter = netdev_priv(netdev); |
1da177e4 LT |
550 | adapter->netdev = netdev; |
551 | adapter->pdev = pdev; | |
552 | adapter->hw.back = adapter; | |
553 | adapter->msg_enable = (1 << debug) - 1; | |
554 | ||
555 | mmio_start = pci_resource_start(pdev, BAR_0); | |
556 | mmio_len = pci_resource_len(pdev, BAR_0); | |
557 | ||
558 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); | |
559 | if(!adapter->hw.hw_addr) { | |
560 | err = -EIO; | |
561 | goto err_ioremap; | |
562 | } | |
563 | ||
564 | for(i = BAR_1; i <= BAR_5; i++) { | |
565 | if(pci_resource_len(pdev, i) == 0) | |
566 | continue; | |
567 | if(pci_resource_flags(pdev, i) & IORESOURCE_IO) { | |
568 | adapter->hw.io_base = pci_resource_start(pdev, i); | |
569 | break; | |
570 | } | |
571 | } | |
572 | ||
573 | netdev->open = &e1000_open; | |
574 | netdev->stop = &e1000_close; | |
575 | netdev->hard_start_xmit = &e1000_xmit_frame; | |
576 | netdev->get_stats = &e1000_get_stats; | |
577 | netdev->set_multicast_list = &e1000_set_multi; | |
578 | netdev->set_mac_address = &e1000_set_mac; | |
579 | netdev->change_mtu = &e1000_change_mtu; | |
580 | netdev->do_ioctl = &e1000_ioctl; | |
581 | e1000_set_ethtool_ops(netdev); | |
582 | netdev->tx_timeout = &e1000_tx_timeout; | |
583 | netdev->watchdog_timeo = 5 * HZ; | |
584 | #ifdef CONFIG_E1000_NAPI | |
585 | netdev->poll = &e1000_clean; | |
586 | netdev->weight = 64; | |
587 | #endif | |
588 | netdev->vlan_rx_register = e1000_vlan_rx_register; | |
589 | netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; | |
590 | netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; | |
591 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
592 | netdev->poll_controller = e1000_netpoll; | |
593 | #endif | |
594 | strcpy(netdev->name, pci_name(pdev)); | |
595 | ||
596 | netdev->mem_start = mmio_start; | |
597 | netdev->mem_end = mmio_start + mmio_len; | |
598 | netdev->base_addr = adapter->hw.io_base; | |
599 | ||
600 | adapter->bd_number = cards_found; | |
601 | ||
602 | /* setup the private structure */ | |
603 | ||
604 | if((err = e1000_sw_init(adapter))) | |
605 | goto err_sw_init; | |
606 | ||
2d7edb92 MC |
607 | if((err = e1000_check_phy_reset_block(&adapter->hw))) |
608 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); | |
609 | ||
1da177e4 LT |
610 | if(adapter->hw.mac_type >= e1000_82543) { |
611 | netdev->features = NETIF_F_SG | | |
612 | NETIF_F_HW_CSUM | | |
613 | NETIF_F_HW_VLAN_TX | | |
614 | NETIF_F_HW_VLAN_RX | | |
615 | NETIF_F_HW_VLAN_FILTER; | |
616 | } | |
617 | ||
618 | #ifdef NETIF_F_TSO | |
619 | if((adapter->hw.mac_type >= e1000_82544) && | |
620 | (adapter->hw.mac_type != e1000_82547)) | |
621 | netdev->features |= NETIF_F_TSO; | |
2d7edb92 MC |
622 | |
623 | #ifdef NETIF_F_TSO_IPV6 | |
624 | if(adapter->hw.mac_type > e1000_82547_rev_2) | |
625 | netdev->features |= NETIF_F_TSO_IPV6; | |
626 | #endif | |
1da177e4 LT |
627 | #endif |
628 | if(pci_using_dac) | |
629 | netdev->features |= NETIF_F_HIGHDMA; | |
630 | ||
631 | /* hard_start_xmit is safe against parallel locking */ | |
632 | netdev->features |= NETIF_F_LLTX; | |
633 | ||
2d7edb92 MC |
634 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); |
635 | ||
1da177e4 LT |
636 | /* before reading the EEPROM, reset the controller to |
637 | * put the device in a known good starting state */ | |
638 | ||
639 | e1000_reset_hw(&adapter->hw); | |
640 | ||
641 | /* make sure the EEPROM is good */ | |
642 | ||
643 | if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) { | |
644 | DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); | |
645 | err = -EIO; | |
646 | goto err_eeprom; | |
647 | } | |
648 | ||
649 | /* copy the MAC address out of the EEPROM */ | |
650 | ||
2648345f | 651 | if(e1000_read_mac_addr(&adapter->hw)) |
1da177e4 LT |
652 | DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); |
653 | memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); | |
9beb0ac1 | 654 | memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); |
1da177e4 | 655 | |
9beb0ac1 | 656 | if(!is_valid_ether_addr(netdev->perm_addr)) { |
1da177e4 LT |
657 | DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); |
658 | err = -EIO; | |
659 | goto err_eeprom; | |
660 | } | |
661 | ||
662 | e1000_read_part_num(&adapter->hw, &(adapter->part_num)); | |
663 | ||
664 | e1000_get_bus_info(&adapter->hw); | |
665 | ||
666 | init_timer(&adapter->tx_fifo_stall_timer); | |
667 | adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; | |
668 | adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; | |
669 | ||
670 | init_timer(&adapter->watchdog_timer); | |
671 | adapter->watchdog_timer.function = &e1000_watchdog; | |
672 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
673 | ||
674 | INIT_WORK(&adapter->watchdog_task, | |
675 | (void (*)(void *))e1000_watchdog_task, adapter); | |
676 | ||
677 | init_timer(&adapter->phy_info_timer); | |
678 | adapter->phy_info_timer.function = &e1000_update_phy_info; | |
679 | adapter->phy_info_timer.data = (unsigned long) adapter; | |
680 | ||
681 | INIT_WORK(&adapter->tx_timeout_task, | |
682 | (void (*)(void *))e1000_tx_timeout_task, netdev); | |
683 | ||
684 | /* we're going to reset, so assume we have no link for now */ | |
685 | ||
686 | netif_carrier_off(netdev); | |
687 | netif_stop_queue(netdev); | |
688 | ||
689 | e1000_check_options(adapter); | |
690 | ||
691 | /* Initial Wake on LAN setting | |
692 | * If APM wake is enabled in the EEPROM, | |
693 | * enable the ACPI Magic Packet filter | |
694 | */ | |
695 | ||
696 | switch(adapter->hw.mac_type) { | |
697 | case e1000_82542_rev2_0: | |
698 | case e1000_82542_rev2_1: | |
699 | case e1000_82543: | |
700 | break; | |
701 | case e1000_82544: | |
702 | e1000_read_eeprom(&adapter->hw, | |
703 | EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); | |
704 | eeprom_apme_mask = E1000_EEPROM_82544_APM; | |
705 | break; | |
706 | case e1000_82546: | |
707 | case e1000_82546_rev_3: | |
708 | if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1) | |
709 | && (adapter->hw.media_type == e1000_media_type_copper)) { | |
710 | e1000_read_eeprom(&adapter->hw, | |
711 | EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); | |
712 | break; | |
713 | } | |
714 | /* Fall Through */ | |
715 | default: | |
716 | e1000_read_eeprom(&adapter->hw, | |
717 | EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); | |
718 | break; | |
719 | } | |
720 | if(eeprom_data & eeprom_apme_mask) | |
721 | adapter->wol |= E1000_WUFC_MAG; | |
722 | ||
723 | /* reset the hardware with the new settings */ | |
724 | e1000_reset(adapter); | |
725 | ||
2d7edb92 MC |
726 | /* Let firmware know the driver has taken over */ |
727 | switch(adapter->hw.mac_type) { | |
868d5309 MC |
728 | case e1000_82571: |
729 | case e1000_82572: | |
730 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
731 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
732 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
733 | break; | |
2d7edb92 MC |
734 | case e1000_82573: |
735 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
736 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
737 | swsm | E1000_SWSM_DRV_LOAD); | |
738 | break; | |
739 | default: | |
740 | break; | |
741 | } | |
742 | ||
1da177e4 LT |
743 | strcpy(netdev->name, "eth%d"); |
744 | if((err = register_netdev(netdev))) | |
745 | goto err_register; | |
746 | ||
747 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); | |
748 | ||
749 | cards_found++; | |
750 | return 0; | |
751 | ||
752 | err_register: | |
753 | err_sw_init: | |
754 | err_eeprom: | |
755 | iounmap(adapter->hw.hw_addr); | |
756 | err_ioremap: | |
757 | free_netdev(netdev); | |
758 | err_alloc_etherdev: | |
759 | pci_release_regions(pdev); | |
760 | return err; | |
761 | } | |
762 | ||
763 | /** | |
764 | * e1000_remove - Device Removal Routine | |
765 | * @pdev: PCI device information struct | |
766 | * | |
767 | * e1000_remove is called by the PCI subsystem to alert the driver | |
768 | * that it should release a PCI device. The could be caused by a | |
769 | * Hot-Plug event, or because the driver is going to be removed from | |
770 | * memory. | |
771 | **/ | |
772 | ||
773 | static void __devexit | |
774 | e1000_remove(struct pci_dev *pdev) | |
775 | { | |
776 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 777 | struct e1000_adapter *adapter = netdev_priv(netdev); |
868d5309 | 778 | uint32_t ctrl_ext; |
2d7edb92 | 779 | uint32_t manc, swsm; |
581d708e MC |
780 | #ifdef CONFIG_E1000_NAPI |
781 | int i; | |
782 | #endif | |
1da177e4 | 783 | |
be2b28ed JG |
784 | flush_scheduled_work(); |
785 | ||
1da177e4 LT |
786 | if(adapter->hw.mac_type >= e1000_82540 && |
787 | adapter->hw.media_type == e1000_media_type_copper) { | |
788 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
789 | if(manc & E1000_MANC_SMBUS_EN) { | |
790 | manc |= E1000_MANC_ARP_EN; | |
791 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
792 | } | |
793 | } | |
794 | ||
2d7edb92 | 795 | switch(adapter->hw.mac_type) { |
868d5309 MC |
796 | case e1000_82571: |
797 | case e1000_82572: | |
798 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
799 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
800 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
801 | break; | |
2d7edb92 MC |
802 | case e1000_82573: |
803 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
804 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
805 | swsm & ~E1000_SWSM_DRV_LOAD); | |
806 | break; | |
807 | ||
808 | default: | |
809 | break; | |
810 | } | |
811 | ||
1da177e4 | 812 | unregister_netdev(netdev); |
581d708e MC |
813 | #ifdef CONFIG_E1000_NAPI |
814 | for (i = 0; i < adapter->num_queues; i++) | |
815 | __dev_put(&adapter->polling_netdev[i]); | |
816 | #endif | |
1da177e4 | 817 | |
2d7edb92 MC |
818 | if(!e1000_check_phy_reset_block(&adapter->hw)) |
819 | e1000_phy_hw_reset(&adapter->hw); | |
1da177e4 | 820 | |
24025e4e MC |
821 | kfree(adapter->tx_ring); |
822 | kfree(adapter->rx_ring); | |
823 | #ifdef CONFIG_E1000_NAPI | |
824 | kfree(adapter->polling_netdev); | |
825 | #endif | |
826 | ||
1da177e4 LT |
827 | iounmap(adapter->hw.hw_addr); |
828 | pci_release_regions(pdev); | |
829 | ||
24025e4e MC |
830 | #ifdef CONFIG_E1000_MQ |
831 | free_percpu(adapter->cpu_netdev); | |
832 | free_percpu(adapter->cpu_tx_ring); | |
833 | #endif | |
1da177e4 LT |
834 | free_netdev(netdev); |
835 | ||
836 | pci_disable_device(pdev); | |
837 | } | |
838 | ||
839 | /** | |
840 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
841 | * @adapter: board private structure to initialize | |
842 | * | |
843 | * e1000_sw_init initializes the Adapter private data structure. | |
844 | * Fields are initialized based on PCI device information and | |
845 | * OS network device settings (MTU size). | |
846 | **/ | |
847 | ||
848 | static int __devinit | |
849 | e1000_sw_init(struct e1000_adapter *adapter) | |
850 | { | |
851 | struct e1000_hw *hw = &adapter->hw; | |
852 | struct net_device *netdev = adapter->netdev; | |
853 | struct pci_dev *pdev = adapter->pdev; | |
581d708e MC |
854 | #ifdef CONFIG_E1000_NAPI |
855 | int i; | |
856 | #endif | |
1da177e4 LT |
857 | |
858 | /* PCI config space info */ | |
859 | ||
860 | hw->vendor_id = pdev->vendor; | |
861 | hw->device_id = pdev->device; | |
862 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
863 | hw->subsystem_id = pdev->subsystem_device; | |
864 | ||
865 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
866 | ||
867 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | |
868 | ||
869 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | |
2d7edb92 | 870 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_256; |
1da177e4 LT |
871 | hw->max_frame_size = netdev->mtu + |
872 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | |
873 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | |
874 | ||
875 | /* identify the MAC */ | |
876 | ||
877 | if(e1000_set_mac_type(hw)) { | |
878 | DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); | |
879 | return -EIO; | |
880 | } | |
881 | ||
882 | /* initialize eeprom parameters */ | |
883 | ||
2d7edb92 MC |
884 | if(e1000_init_eeprom_params(hw)) { |
885 | E1000_ERR("EEPROM initialization failed\n"); | |
886 | return -EIO; | |
887 | } | |
1da177e4 LT |
888 | |
889 | switch(hw->mac_type) { | |
890 | default: | |
891 | break; | |
892 | case e1000_82541: | |
893 | case e1000_82547: | |
894 | case e1000_82541_rev_2: | |
895 | case e1000_82547_rev_2: | |
896 | hw->phy_init_script = 1; | |
897 | break; | |
898 | } | |
899 | ||
900 | e1000_set_media_type(hw); | |
901 | ||
902 | hw->wait_autoneg_complete = FALSE; | |
903 | hw->tbi_compatibility_en = TRUE; | |
904 | hw->adaptive_ifs = TRUE; | |
905 | ||
906 | /* Copper options */ | |
907 | ||
908 | if(hw->media_type == e1000_media_type_copper) { | |
909 | hw->mdix = AUTO_ALL_MODES; | |
910 | hw->disable_polarity_correction = FALSE; | |
911 | hw->master_slave = E1000_MASTER_SLAVE; | |
912 | } | |
913 | ||
24025e4e MC |
914 | #ifdef CONFIG_E1000_MQ |
915 | /* Number of supported queues */ | |
916 | switch (hw->mac_type) { | |
917 | case e1000_82571: | |
918 | case e1000_82572: | |
919 | adapter->num_queues = 2; | |
920 | break; | |
921 | default: | |
922 | adapter->num_queues = 1; | |
923 | break; | |
924 | } | |
925 | adapter->num_queues = min(adapter->num_queues, num_online_cpus()); | |
926 | #else | |
581d708e | 927 | adapter->num_queues = 1; |
24025e4e | 928 | #endif |
581d708e MC |
929 | |
930 | if (e1000_alloc_queues(adapter)) { | |
931 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | |
932 | return -ENOMEM; | |
933 | } | |
934 | ||
935 | #ifdef CONFIG_E1000_NAPI | |
936 | for (i = 0; i < adapter->num_queues; i++) { | |
937 | adapter->polling_netdev[i].priv = adapter; | |
938 | adapter->polling_netdev[i].poll = &e1000_clean; | |
939 | adapter->polling_netdev[i].weight = 64; | |
940 | dev_hold(&adapter->polling_netdev[i]); | |
941 | set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state); | |
942 | } | |
943 | #endif | |
24025e4e MC |
944 | |
945 | #ifdef CONFIG_E1000_MQ | |
946 | e1000_setup_queue_mapping(adapter); | |
947 | #endif | |
948 | ||
1da177e4 LT |
949 | atomic_set(&adapter->irq_sem, 1); |
950 | spin_lock_init(&adapter->stats_lock); | |
1da177e4 LT |
951 | |
952 | return 0; | |
953 | } | |
954 | ||
581d708e MC |
955 | /** |
956 | * e1000_alloc_queues - Allocate memory for all rings | |
957 | * @adapter: board private structure to initialize | |
958 | * | |
959 | * We allocate one ring per queue at run-time since we don't know the | |
960 | * number of queues at compile-time. The polling_netdev array is | |
961 | * intended for Multiqueue, but should work fine with a single queue. | |
962 | **/ | |
963 | ||
964 | static int __devinit | |
965 | e1000_alloc_queues(struct e1000_adapter *adapter) | |
966 | { | |
967 | int size; | |
968 | ||
969 | size = sizeof(struct e1000_tx_ring) * adapter->num_queues; | |
970 | adapter->tx_ring = kmalloc(size, GFP_KERNEL); | |
971 | if (!adapter->tx_ring) | |
972 | return -ENOMEM; | |
973 | memset(adapter->tx_ring, 0, size); | |
974 | ||
975 | size = sizeof(struct e1000_rx_ring) * adapter->num_queues; | |
976 | adapter->rx_ring = kmalloc(size, GFP_KERNEL); | |
977 | if (!adapter->rx_ring) { | |
978 | kfree(adapter->tx_ring); | |
979 | return -ENOMEM; | |
980 | } | |
981 | memset(adapter->rx_ring, 0, size); | |
982 | ||
983 | #ifdef CONFIG_E1000_NAPI | |
984 | size = sizeof(struct net_device) * adapter->num_queues; | |
985 | adapter->polling_netdev = kmalloc(size, GFP_KERNEL); | |
986 | if (!adapter->polling_netdev) { | |
987 | kfree(adapter->tx_ring); | |
988 | kfree(adapter->rx_ring); | |
989 | return -ENOMEM; | |
990 | } | |
991 | memset(adapter->polling_netdev, 0, size); | |
992 | #endif | |
993 | ||
994 | return E1000_SUCCESS; | |
995 | } | |
996 | ||
24025e4e MC |
997 | #ifdef CONFIG_E1000_MQ |
998 | static void __devinit | |
999 | e1000_setup_queue_mapping(struct e1000_adapter *adapter) | |
1000 | { | |
1001 | int i, cpu; | |
1002 | ||
1003 | adapter->rx_sched_call_data.func = e1000_rx_schedule; | |
1004 | adapter->rx_sched_call_data.info = adapter->netdev; | |
1005 | cpus_clear(adapter->rx_sched_call_data.cpumask); | |
1006 | ||
1007 | adapter->cpu_netdev = alloc_percpu(struct net_device *); | |
1008 | adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *); | |
1009 | ||
1010 | lock_cpu_hotplug(); | |
1011 | i = 0; | |
1012 | for_each_online_cpu(cpu) { | |
1013 | *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_queues]; | |
1014 | /* This is incomplete because we'd like to assign separate | |
1015 | * physical cpus to these netdev polling structures and | |
1016 | * avoid saturating a subset of cpus. | |
1017 | */ | |
1018 | if (i < adapter->num_queues) { | |
1019 | *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i]; | |
1020 | adapter->cpu_for_queue[i] = cpu; | |
1021 | } else | |
1022 | *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL; | |
1023 | ||
1024 | i++; | |
1025 | } | |
1026 | unlock_cpu_hotplug(); | |
1027 | } | |
1028 | #endif | |
1029 | ||
1da177e4 LT |
1030 | /** |
1031 | * e1000_open - Called when a network interface is made active | |
1032 | * @netdev: network interface device structure | |
1033 | * | |
1034 | * Returns 0 on success, negative value on failure | |
1035 | * | |
1036 | * The open entry point is called when a network interface is made | |
1037 | * active by the system (IFF_UP). At this point all resources needed | |
1038 | * for transmit and receive operations are allocated, the interrupt | |
1039 | * handler is registered with the OS, the watchdog timer is started, | |
1040 | * and the stack is notified that the interface is ready. | |
1041 | **/ | |
1042 | ||
1043 | static int | |
1044 | e1000_open(struct net_device *netdev) | |
1045 | { | |
60490fe0 | 1046 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1047 | int err; |
1048 | ||
1049 | /* allocate transmit descriptors */ | |
1050 | ||
581d708e | 1051 | if ((err = e1000_setup_all_tx_resources(adapter))) |
1da177e4 LT |
1052 | goto err_setup_tx; |
1053 | ||
1054 | /* allocate receive descriptors */ | |
1055 | ||
581d708e | 1056 | if ((err = e1000_setup_all_rx_resources(adapter))) |
1da177e4 LT |
1057 | goto err_setup_rx; |
1058 | ||
1059 | if((err = e1000_up(adapter))) | |
1060 | goto err_up; | |
2d7edb92 MC |
1061 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; |
1062 | if((adapter->hw.mng_cookie.status & | |
1063 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { | |
1064 | e1000_update_mng_vlan(adapter); | |
1065 | } | |
1da177e4 LT |
1066 | |
1067 | return E1000_SUCCESS; | |
1068 | ||
1069 | err_up: | |
581d708e | 1070 | e1000_free_all_rx_resources(adapter); |
1da177e4 | 1071 | err_setup_rx: |
581d708e | 1072 | e1000_free_all_tx_resources(adapter); |
1da177e4 LT |
1073 | err_setup_tx: |
1074 | e1000_reset(adapter); | |
1075 | ||
1076 | return err; | |
1077 | } | |
1078 | ||
1079 | /** | |
1080 | * e1000_close - Disables a network interface | |
1081 | * @netdev: network interface device structure | |
1082 | * | |
1083 | * Returns 0, this is not allowed to fail | |
1084 | * | |
1085 | * The close entry point is called when an interface is de-activated | |
1086 | * by the OS. The hardware is still under the drivers control, but | |
1087 | * needs to be disabled. A global MAC reset is issued to stop the | |
1088 | * hardware, and all transmit and receive resources are freed. | |
1089 | **/ | |
1090 | ||
1091 | static int | |
1092 | e1000_close(struct net_device *netdev) | |
1093 | { | |
60490fe0 | 1094 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1095 | |
1096 | e1000_down(adapter); | |
1097 | ||
581d708e MC |
1098 | e1000_free_all_tx_resources(adapter); |
1099 | e1000_free_all_rx_resources(adapter); | |
1da177e4 | 1100 | |
2d7edb92 MC |
1101 | if((adapter->hw.mng_cookie.status & |
1102 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { | |
1103 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
1104 | } | |
1da177e4 LT |
1105 | return 0; |
1106 | } | |
1107 | ||
1108 | /** | |
1109 | * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary | |
1110 | * @adapter: address of board private structure | |
2d7edb92 MC |
1111 | * @start: address of beginning of memory |
1112 | * @len: length of memory | |
1da177e4 LT |
1113 | **/ |
1114 | static inline boolean_t | |
1115 | e1000_check_64k_bound(struct e1000_adapter *adapter, | |
1116 | void *start, unsigned long len) | |
1117 | { | |
1118 | unsigned long begin = (unsigned long) start; | |
1119 | unsigned long end = begin + len; | |
1120 | ||
2648345f MC |
1121 | /* First rev 82545 and 82546 need to not allow any memory |
1122 | * write location to cross 64k boundary due to errata 23 */ | |
1da177e4 | 1123 | if (adapter->hw.mac_type == e1000_82545 || |
2648345f | 1124 | adapter->hw.mac_type == e1000_82546) { |
1da177e4 LT |
1125 | return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; |
1126 | } | |
1127 | ||
1128 | return TRUE; | |
1129 | } | |
1130 | ||
1131 | /** | |
1132 | * e1000_setup_tx_resources - allocate Tx resources (Descriptors) | |
1133 | * @adapter: board private structure | |
581d708e | 1134 | * @txdr: tx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1135 | * |
1136 | * Return 0 on success, negative on failure | |
1137 | **/ | |
1138 | ||
1139 | int | |
581d708e MC |
1140 | e1000_setup_tx_resources(struct e1000_adapter *adapter, |
1141 | struct e1000_tx_ring *txdr) | |
1da177e4 | 1142 | { |
1da177e4 LT |
1143 | struct pci_dev *pdev = adapter->pdev; |
1144 | int size; | |
1145 | ||
1146 | size = sizeof(struct e1000_buffer) * txdr->count; | |
1147 | txdr->buffer_info = vmalloc(size); | |
1148 | if(!txdr->buffer_info) { | |
2648345f MC |
1149 | DPRINTK(PROBE, ERR, |
1150 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1151 | return -ENOMEM; |
1152 | } | |
1153 | memset(txdr->buffer_info, 0, size); | |
2ae76d98 | 1154 | memset(&txdr->previous_buffer_info, 0, sizeof(struct e1000_buffer)); |
1da177e4 LT |
1155 | |
1156 | /* round up to nearest 4K */ | |
1157 | ||
1158 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
1159 | E1000_ROUNDUP(txdr->size, 4096); | |
1160 | ||
1161 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
1162 | if(!txdr->desc) { | |
1163 | setup_tx_desc_die: | |
1da177e4 | 1164 | vfree(txdr->buffer_info); |
2648345f MC |
1165 | DPRINTK(PROBE, ERR, |
1166 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1da177e4 LT |
1167 | return -ENOMEM; |
1168 | } | |
1169 | ||
2648345f | 1170 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1171 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { |
1172 | void *olddesc = txdr->desc; | |
1173 | dma_addr_t olddma = txdr->dma; | |
2648345f MC |
1174 | DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " |
1175 | "at %p\n", txdr->size, txdr->desc); | |
1176 | /* Try again, without freeing the previous */ | |
1da177e4 | 1177 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); |
1da177e4 | 1178 | if(!txdr->desc) { |
2648345f | 1179 | /* Failed allocation, critical failure */ |
1da177e4 LT |
1180 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1181 | goto setup_tx_desc_die; | |
1182 | } | |
1183 | ||
1184 | if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { | |
1185 | /* give up */ | |
2648345f MC |
1186 | pci_free_consistent(pdev, txdr->size, txdr->desc, |
1187 | txdr->dma); | |
1da177e4 LT |
1188 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1189 | DPRINTK(PROBE, ERR, | |
2648345f MC |
1190 | "Unable to allocate aligned memory " |
1191 | "for the transmit descriptor ring\n"); | |
1da177e4 LT |
1192 | vfree(txdr->buffer_info); |
1193 | return -ENOMEM; | |
1194 | } else { | |
2648345f | 1195 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1196 | pci_free_consistent(pdev, txdr->size, olddesc, olddma); |
1197 | } | |
1198 | } | |
1199 | memset(txdr->desc, 0, txdr->size); | |
1200 | ||
1201 | txdr->next_to_use = 0; | |
1202 | txdr->next_to_clean = 0; | |
2ae76d98 | 1203 | spin_lock_init(&txdr->tx_lock); |
1da177e4 LT |
1204 | |
1205 | return 0; | |
1206 | } | |
1207 | ||
581d708e MC |
1208 | /** |
1209 | * e1000_setup_all_tx_resources - wrapper to allocate Tx resources | |
1210 | * (Descriptors) for all queues | |
1211 | * @adapter: board private structure | |
1212 | * | |
1213 | * If this function returns with an error, then it's possible one or | |
1214 | * more of the rings is populated (while the rest are not). It is the | |
1215 | * callers duty to clean those orphaned rings. | |
1216 | * | |
1217 | * Return 0 on success, negative on failure | |
1218 | **/ | |
1219 | ||
1220 | int | |
1221 | e1000_setup_all_tx_resources(struct e1000_adapter *adapter) | |
1222 | { | |
1223 | int i, err = 0; | |
1224 | ||
1225 | for (i = 0; i < adapter->num_queues; i++) { | |
1226 | err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); | |
1227 | if (err) { | |
1228 | DPRINTK(PROBE, ERR, | |
1229 | "Allocation for Tx Queue %u failed\n", i); | |
1230 | break; | |
1231 | } | |
1232 | } | |
1233 | ||
1234 | return err; | |
1235 | } | |
1236 | ||
1da177e4 LT |
1237 | /** |
1238 | * e1000_configure_tx - Configure 8254x Transmit Unit after Reset | |
1239 | * @adapter: board private structure | |
1240 | * | |
1241 | * Configure the Tx unit of the MAC after a reset. | |
1242 | **/ | |
1243 | ||
1244 | static void | |
1245 | e1000_configure_tx(struct e1000_adapter *adapter) | |
1246 | { | |
581d708e MC |
1247 | uint64_t tdba; |
1248 | struct e1000_hw *hw = &adapter->hw; | |
1249 | uint32_t tdlen, tctl, tipg, tarc; | |
1da177e4 LT |
1250 | |
1251 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1252 | ||
24025e4e MC |
1253 | switch (adapter->num_queues) { |
1254 | case 2: | |
1255 | tdba = adapter->tx_ring[1].dma; | |
1256 | tdlen = adapter->tx_ring[1].count * | |
1257 | sizeof(struct e1000_tx_desc); | |
1258 | E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL)); | |
1259 | E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32)); | |
1260 | E1000_WRITE_REG(hw, TDLEN1, tdlen); | |
1261 | E1000_WRITE_REG(hw, TDH1, 0); | |
1262 | E1000_WRITE_REG(hw, TDT1, 0); | |
1263 | adapter->tx_ring[1].tdh = E1000_TDH1; | |
1264 | adapter->tx_ring[1].tdt = E1000_TDT1; | |
1265 | /* Fall Through */ | |
1266 | case 1: | |
1267 | default: | |
581d708e MC |
1268 | tdba = adapter->tx_ring[0].dma; |
1269 | tdlen = adapter->tx_ring[0].count * | |
1270 | sizeof(struct e1000_tx_desc); | |
1271 | E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); | |
1272 | E1000_WRITE_REG(hw, TDBAH, (tdba >> 32)); | |
1273 | E1000_WRITE_REG(hw, TDLEN, tdlen); | |
1274 | E1000_WRITE_REG(hw, TDH, 0); | |
1275 | E1000_WRITE_REG(hw, TDT, 0); | |
1276 | adapter->tx_ring[0].tdh = E1000_TDH; | |
1277 | adapter->tx_ring[0].tdt = E1000_TDT; | |
24025e4e MC |
1278 | break; |
1279 | } | |
1da177e4 LT |
1280 | |
1281 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
1282 | ||
581d708e | 1283 | switch (hw->mac_type) { |
1da177e4 LT |
1284 | case e1000_82542_rev2_0: |
1285 | case e1000_82542_rev2_1: | |
1286 | tipg = DEFAULT_82542_TIPG_IPGT; | |
1287 | tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; | |
1288 | tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; | |
1289 | break; | |
1290 | default: | |
581d708e MC |
1291 | if (hw->media_type == e1000_media_type_fiber || |
1292 | hw->media_type == e1000_media_type_internal_serdes) | |
1da177e4 LT |
1293 | tipg = DEFAULT_82543_TIPG_IPGT_FIBER; |
1294 | else | |
1295 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; | |
1296 | tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; | |
1297 | tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; | |
1298 | } | |
581d708e | 1299 | E1000_WRITE_REG(hw, TIPG, tipg); |
1da177e4 LT |
1300 | |
1301 | /* Set the Tx Interrupt Delay register */ | |
1302 | ||
581d708e MC |
1303 | E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay); |
1304 | if (hw->mac_type >= e1000_82540) | |
1305 | E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay); | |
1da177e4 LT |
1306 | |
1307 | /* Program the Transmit Control Register */ | |
1308 | ||
581d708e | 1309 | tctl = E1000_READ_REG(hw, TCTL); |
1da177e4 LT |
1310 | |
1311 | tctl &= ~E1000_TCTL_CT; | |
24025e4e | 1312 | tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1da177e4 LT |
1313 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1314 | ||
581d708e | 1315 | E1000_WRITE_REG(hw, TCTL, tctl); |
1da177e4 | 1316 | |
2ae76d98 MC |
1317 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { |
1318 | tarc = E1000_READ_REG(hw, TARC0); | |
1319 | tarc |= ((1 << 25) | (1 << 21)); | |
1320 | E1000_WRITE_REG(hw, TARC0, tarc); | |
1321 | tarc = E1000_READ_REG(hw, TARC1); | |
1322 | tarc |= (1 << 25); | |
1323 | if (tctl & E1000_TCTL_MULR) | |
1324 | tarc &= ~(1 << 28); | |
1325 | else | |
1326 | tarc |= (1 << 28); | |
1327 | E1000_WRITE_REG(hw, TARC1, tarc); | |
1328 | } | |
1329 | ||
581d708e | 1330 | e1000_config_collision_dist(hw); |
1da177e4 LT |
1331 | |
1332 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
1333 | adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP | | |
1334 | E1000_TXD_CMD_IFCS; | |
1335 | ||
581d708e | 1336 | if (hw->mac_type < e1000_82543) |
1da177e4 LT |
1337 | adapter->txd_cmd |= E1000_TXD_CMD_RPS; |
1338 | else | |
1339 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
1340 | ||
1341 | /* Cache if we're 82544 running in PCI-X because we'll | |
1342 | * need this to apply a workaround later in the send path. */ | |
581d708e MC |
1343 | if (hw->mac_type == e1000_82544 && |
1344 | hw->bus_type == e1000_bus_type_pcix) | |
1da177e4 LT |
1345 | adapter->pcix_82544 = 1; |
1346 | } | |
1347 | ||
1348 | /** | |
1349 | * e1000_setup_rx_resources - allocate Rx resources (Descriptors) | |
1350 | * @adapter: board private structure | |
581d708e | 1351 | * @rxdr: rx descriptor ring (for a specific queue) to setup |
1da177e4 LT |
1352 | * |
1353 | * Returns 0 on success, negative on failure | |
1354 | **/ | |
1355 | ||
1356 | int | |
581d708e MC |
1357 | e1000_setup_rx_resources(struct e1000_adapter *adapter, |
1358 | struct e1000_rx_ring *rxdr) | |
1da177e4 | 1359 | { |
1da177e4 | 1360 | struct pci_dev *pdev = adapter->pdev; |
2d7edb92 | 1361 | int size, desc_len; |
1da177e4 LT |
1362 | |
1363 | size = sizeof(struct e1000_buffer) * rxdr->count; | |
1364 | rxdr->buffer_info = vmalloc(size); | |
581d708e | 1365 | if (!rxdr->buffer_info) { |
2648345f MC |
1366 | DPRINTK(PROBE, ERR, |
1367 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 LT |
1368 | return -ENOMEM; |
1369 | } | |
1370 | memset(rxdr->buffer_info, 0, size); | |
1371 | ||
2d7edb92 MC |
1372 | size = sizeof(struct e1000_ps_page) * rxdr->count; |
1373 | rxdr->ps_page = kmalloc(size, GFP_KERNEL); | |
1374 | if(!rxdr->ps_page) { | |
1375 | vfree(rxdr->buffer_info); | |
1376 | DPRINTK(PROBE, ERR, | |
1377 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1378 | return -ENOMEM; | |
1379 | } | |
1380 | memset(rxdr->ps_page, 0, size); | |
1381 | ||
1382 | size = sizeof(struct e1000_ps_page_dma) * rxdr->count; | |
1383 | rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL); | |
1384 | if(!rxdr->ps_page_dma) { | |
1385 | vfree(rxdr->buffer_info); | |
1386 | kfree(rxdr->ps_page); | |
1387 | DPRINTK(PROBE, ERR, | |
1388 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1389 | return -ENOMEM; | |
1390 | } | |
1391 | memset(rxdr->ps_page_dma, 0, size); | |
1392 | ||
1393 | if(adapter->hw.mac_type <= e1000_82547_rev_2) | |
1394 | desc_len = sizeof(struct e1000_rx_desc); | |
1395 | else | |
1396 | desc_len = sizeof(union e1000_rx_desc_packet_split); | |
1397 | ||
1da177e4 LT |
1398 | /* Round up to nearest 4K */ |
1399 | ||
2d7edb92 | 1400 | rxdr->size = rxdr->count * desc_len; |
1da177e4 LT |
1401 | E1000_ROUNDUP(rxdr->size, 4096); |
1402 | ||
1403 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
1404 | ||
581d708e MC |
1405 | if (!rxdr->desc) { |
1406 | DPRINTK(PROBE, ERR, | |
1407 | "Unable to allocate memory for the receive descriptor ring\n"); | |
1da177e4 | 1408 | setup_rx_desc_die: |
1da177e4 | 1409 | vfree(rxdr->buffer_info); |
2d7edb92 MC |
1410 | kfree(rxdr->ps_page); |
1411 | kfree(rxdr->ps_page_dma); | |
1da177e4 LT |
1412 | return -ENOMEM; |
1413 | } | |
1414 | ||
2648345f | 1415 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
1416 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { |
1417 | void *olddesc = rxdr->desc; | |
1418 | dma_addr_t olddma = rxdr->dma; | |
2648345f MC |
1419 | DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " |
1420 | "at %p\n", rxdr->size, rxdr->desc); | |
1421 | /* Try again, without freeing the previous */ | |
1da177e4 | 1422 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); |
2648345f | 1423 | /* Failed allocation, critical failure */ |
581d708e | 1424 | if (!rxdr->desc) { |
1da177e4 | 1425 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
581d708e MC |
1426 | DPRINTK(PROBE, ERR, |
1427 | "Unable to allocate memory " | |
1428 | "for the receive descriptor ring\n"); | |
1da177e4 LT |
1429 | goto setup_rx_desc_die; |
1430 | } | |
1431 | ||
1432 | if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { | |
1433 | /* give up */ | |
2648345f MC |
1434 | pci_free_consistent(pdev, rxdr->size, rxdr->desc, |
1435 | rxdr->dma); | |
1da177e4 | 1436 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
2648345f MC |
1437 | DPRINTK(PROBE, ERR, |
1438 | "Unable to allocate aligned memory " | |
1439 | "for the receive descriptor ring\n"); | |
581d708e | 1440 | goto setup_rx_desc_die; |
1da177e4 | 1441 | } else { |
2648345f | 1442 | /* Free old allocation, new allocation was successful */ |
1da177e4 LT |
1443 | pci_free_consistent(pdev, rxdr->size, olddesc, olddma); |
1444 | } | |
1445 | } | |
1446 | memset(rxdr->desc, 0, rxdr->size); | |
1447 | ||
1448 | rxdr->next_to_clean = 0; | |
1449 | rxdr->next_to_use = 0; | |
1450 | ||
1451 | return 0; | |
1452 | } | |
1453 | ||
581d708e MC |
1454 | /** |
1455 | * e1000_setup_all_rx_resources - wrapper to allocate Rx resources | |
1456 | * (Descriptors) for all queues | |
1457 | * @adapter: board private structure | |
1458 | * | |
1459 | * If this function returns with an error, then it's possible one or | |
1460 | * more of the rings is populated (while the rest are not). It is the | |
1461 | * callers duty to clean those orphaned rings. | |
1462 | * | |
1463 | * Return 0 on success, negative on failure | |
1464 | **/ | |
1465 | ||
1466 | int | |
1467 | e1000_setup_all_rx_resources(struct e1000_adapter *adapter) | |
1468 | { | |
1469 | int i, err = 0; | |
1470 | ||
1471 | for (i = 0; i < adapter->num_queues; i++) { | |
1472 | err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); | |
1473 | if (err) { | |
1474 | DPRINTK(PROBE, ERR, | |
1475 | "Allocation for Rx Queue %u failed\n", i); | |
1476 | break; | |
1477 | } | |
1478 | } | |
1479 | ||
1480 | return err; | |
1481 | } | |
1482 | ||
1da177e4 | 1483 | /** |
2648345f | 1484 | * e1000_setup_rctl - configure the receive control registers |
1da177e4 LT |
1485 | * @adapter: Board private structure |
1486 | **/ | |
e4c811c9 MC |
1487 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ |
1488 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
1da177e4 LT |
1489 | static void |
1490 | e1000_setup_rctl(struct e1000_adapter *adapter) | |
1491 | { | |
2d7edb92 MC |
1492 | uint32_t rctl, rfctl; |
1493 | uint32_t psrctl = 0; | |
e4c811c9 MC |
1494 | #ifdef CONFIG_E1000_PACKET_SPLIT |
1495 | uint32_t pages = 0; | |
1496 | #endif | |
1da177e4 LT |
1497 | |
1498 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1499 | ||
1500 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1501 | ||
1502 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1503 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1504 | (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1505 | ||
1506 | if(adapter->hw.tbi_compatibility_on == 1) | |
1507 | rctl |= E1000_RCTL_SBP; | |
1508 | else | |
1509 | rctl &= ~E1000_RCTL_SBP; | |
1510 | ||
2d7edb92 MC |
1511 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
1512 | rctl &= ~E1000_RCTL_LPE; | |
1513 | else | |
1514 | rctl |= E1000_RCTL_LPE; | |
1515 | ||
1da177e4 | 1516 | /* Setup buffer sizes */ |
868d5309 | 1517 | if(adapter->hw.mac_type >= e1000_82571) { |
2d7edb92 MC |
1518 | /* We can now specify buffers in 1K increments. |
1519 | * BSIZE and BSEX are ignored in this case. */ | |
1520 | rctl |= adapter->rx_buffer_len << 0x11; | |
1521 | } else { | |
1522 | rctl &= ~E1000_RCTL_SZ_4096; | |
1523 | rctl |= E1000_RCTL_BSEX; | |
1524 | switch (adapter->rx_buffer_len) { | |
1525 | case E1000_RXBUFFER_2048: | |
1526 | default: | |
1527 | rctl |= E1000_RCTL_SZ_2048; | |
1528 | rctl &= ~E1000_RCTL_BSEX; | |
1529 | break; | |
1530 | case E1000_RXBUFFER_4096: | |
1531 | rctl |= E1000_RCTL_SZ_4096; | |
1532 | break; | |
1533 | case E1000_RXBUFFER_8192: | |
1534 | rctl |= E1000_RCTL_SZ_8192; | |
1535 | break; | |
1536 | case E1000_RXBUFFER_16384: | |
1537 | rctl |= E1000_RCTL_SZ_16384; | |
1538 | break; | |
1539 | } | |
1540 | } | |
1541 | ||
1542 | #ifdef CONFIG_E1000_PACKET_SPLIT | |
1543 | /* 82571 and greater support packet-split where the protocol | |
1544 | * header is placed in skb->data and the packet data is | |
1545 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
1546 | * In the case of a non-split, skb->data is linearly filled, | |
1547 | * followed by the page buffers. Therefore, skb->data is | |
1548 | * sized to hold the largest protocol header. | |
1549 | */ | |
e4c811c9 MC |
1550 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
1551 | if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) && | |
1552 | PAGE_SIZE <= 16384) | |
1553 | adapter->rx_ps_pages = pages; | |
1554 | else | |
1555 | adapter->rx_ps_pages = 0; | |
2d7edb92 | 1556 | #endif |
e4c811c9 | 1557 | if (adapter->rx_ps_pages) { |
2d7edb92 MC |
1558 | /* Configure extra packet-split registers */ |
1559 | rfctl = E1000_READ_REG(&adapter->hw, RFCTL); | |
1560 | rfctl |= E1000_RFCTL_EXTEN; | |
1561 | /* disable IPv6 packet split support */ | |
1562 | rfctl |= E1000_RFCTL_IPV6_DIS; | |
1563 | E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); | |
1564 | ||
1565 | rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC; | |
1566 | ||
1567 | psrctl |= adapter->rx_ps_bsize0 >> | |
1568 | E1000_PSRCTL_BSIZE0_SHIFT; | |
e4c811c9 MC |
1569 | |
1570 | switch (adapter->rx_ps_pages) { | |
1571 | case 3: | |
1572 | psrctl |= PAGE_SIZE << | |
1573 | E1000_PSRCTL_BSIZE3_SHIFT; | |
1574 | case 2: | |
1575 | psrctl |= PAGE_SIZE << | |
1576 | E1000_PSRCTL_BSIZE2_SHIFT; | |
1577 | case 1: | |
1578 | psrctl |= PAGE_SIZE >> | |
1579 | E1000_PSRCTL_BSIZE1_SHIFT; | |
1580 | break; | |
1581 | } | |
2d7edb92 MC |
1582 | |
1583 | E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); | |
1da177e4 LT |
1584 | } |
1585 | ||
1586 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1587 | } | |
1588 | ||
1589 | /** | |
1590 | * e1000_configure_rx - Configure 8254x Receive Unit after Reset | |
1591 | * @adapter: board private structure | |
1592 | * | |
1593 | * Configure the Rx unit of the MAC after a reset. | |
1594 | **/ | |
1595 | ||
1596 | static void | |
1597 | e1000_configure_rx(struct e1000_adapter *adapter) | |
1598 | { | |
581d708e MC |
1599 | uint64_t rdba; |
1600 | struct e1000_hw *hw = &adapter->hw; | |
1601 | uint32_t rdlen, rctl, rxcsum, ctrl_ext; | |
1602 | #ifdef CONFIG_E1000_MQ | |
1603 | uint32_t reta, mrqc; | |
1604 | int i; | |
1605 | #endif | |
2d7edb92 | 1606 | |
e4c811c9 | 1607 | if (adapter->rx_ps_pages) { |
581d708e | 1608 | rdlen = adapter->rx_ring[0].count * |
2d7edb92 MC |
1609 | sizeof(union e1000_rx_desc_packet_split); |
1610 | adapter->clean_rx = e1000_clean_rx_irq_ps; | |
1611 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | |
1612 | } else { | |
581d708e MC |
1613 | rdlen = adapter->rx_ring[0].count * |
1614 | sizeof(struct e1000_rx_desc); | |
2d7edb92 MC |
1615 | adapter->clean_rx = e1000_clean_rx_irq; |
1616 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
1617 | } | |
1da177e4 LT |
1618 | |
1619 | /* disable receives while setting up the descriptors */ | |
581d708e MC |
1620 | rctl = E1000_READ_REG(hw, RCTL); |
1621 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | |
1da177e4 LT |
1622 | |
1623 | /* set the Receive Delay Timer Register */ | |
581d708e | 1624 | E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay); |
1da177e4 | 1625 | |
581d708e MC |
1626 | if (hw->mac_type >= e1000_82540) { |
1627 | E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay); | |
1da177e4 | 1628 | if(adapter->itr > 1) |
581d708e | 1629 | E1000_WRITE_REG(hw, ITR, |
1da177e4 LT |
1630 | 1000000000 / (adapter->itr * 256)); |
1631 | } | |
1632 | ||
2ae76d98 MC |
1633 | if (hw->mac_type >= e1000_82571) { |
1634 | /* Reset delay timers after every interrupt */ | |
1635 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); | |
1636 | ctrl_ext |= E1000_CTRL_EXT_CANC; | |
1637 | E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext); | |
1638 | E1000_WRITE_FLUSH(hw); | |
1639 | } | |
1640 | ||
581d708e MC |
1641 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
1642 | * the Base and Length of the Rx Descriptor Ring */ | |
24025e4e MC |
1643 | switch (adapter->num_queues) { |
1644 | #ifdef CONFIG_E1000_MQ | |
1645 | case 2: | |
1646 | rdba = adapter->rx_ring[1].dma; | |
1647 | E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL)); | |
1648 | E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32)); | |
1649 | E1000_WRITE_REG(hw, RDLEN1, rdlen); | |
1650 | E1000_WRITE_REG(hw, RDH1, 0); | |
1651 | E1000_WRITE_REG(hw, RDT1, 0); | |
1652 | adapter->rx_ring[1].rdh = E1000_RDH1; | |
1653 | adapter->rx_ring[1].rdt = E1000_RDT1; | |
1654 | /* Fall Through */ | |
1655 | #endif | |
1656 | case 1: | |
1657 | default: | |
581d708e MC |
1658 | rdba = adapter->rx_ring[0].dma; |
1659 | E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); | |
1660 | E1000_WRITE_REG(hw, RDBAH, (rdba >> 32)); | |
1661 | E1000_WRITE_REG(hw, RDLEN, rdlen); | |
1662 | E1000_WRITE_REG(hw, RDH, 0); | |
1663 | E1000_WRITE_REG(hw, RDT, 0); | |
1664 | adapter->rx_ring[0].rdh = E1000_RDH; | |
1665 | adapter->rx_ring[0].rdt = E1000_RDT; | |
1666 | break; | |
24025e4e MC |
1667 | } |
1668 | ||
1669 | #ifdef CONFIG_E1000_MQ | |
1670 | if (adapter->num_queues > 1) { | |
1671 | uint32_t random[10]; | |
1672 | ||
1673 | get_random_bytes(&random[0], 40); | |
1674 | ||
1675 | if (hw->mac_type <= e1000_82572) { | |
1676 | E1000_WRITE_REG(hw, RSSIR, 0); | |
1677 | E1000_WRITE_REG(hw, RSSIM, 0); | |
1678 | } | |
1679 | ||
1680 | switch (adapter->num_queues) { | |
1681 | case 2: | |
1682 | default: | |
1683 | reta = 0x00800080; | |
1684 | mrqc = E1000_MRQC_ENABLE_RSS_2Q; | |
1685 | break; | |
1686 | } | |
1687 | ||
1688 | /* Fill out redirection table */ | |
1689 | for (i = 0; i < 32; i++) | |
1690 | E1000_WRITE_REG_ARRAY(hw, RETA, i, reta); | |
1691 | /* Fill out hash function seeds */ | |
1692 | for (i = 0; i < 10; i++) | |
1693 | E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]); | |
1694 | ||
1695 | mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 | | |
1696 | E1000_MRQC_RSS_FIELD_IPV4_TCP); | |
1697 | E1000_WRITE_REG(hw, MRQC, mrqc); | |
1698 | } | |
1699 | ||
1700 | /* Multiqueue and packet checksumming are mutually exclusive. */ | |
1701 | if (hw->mac_type >= e1000_82571) { | |
1702 | rxcsum = E1000_READ_REG(hw, RXCSUM); | |
1703 | rxcsum |= E1000_RXCSUM_PCSD; | |
1704 | E1000_WRITE_REG(hw, RXCSUM, rxcsum); | |
1705 | } | |
1706 | ||
1707 | #else | |
1da177e4 LT |
1708 | |
1709 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ | |
581d708e MC |
1710 | if (hw->mac_type >= e1000_82543) { |
1711 | rxcsum = E1000_READ_REG(hw, RXCSUM); | |
2d7edb92 MC |
1712 | if(adapter->rx_csum == TRUE) { |
1713 | rxcsum |= E1000_RXCSUM_TUOFL; | |
1714 | ||
868d5309 | 1715 | /* Enable 82571 IPv4 payload checksum for UDP fragments |
2d7edb92 | 1716 | * Must be used in conjunction with packet-split. */ |
e4c811c9 MC |
1717 | if ((hw->mac_type >= e1000_82571) && |
1718 | (adapter->rx_ps_pages)) { | |
2d7edb92 MC |
1719 | rxcsum |= E1000_RXCSUM_IPPCSE; |
1720 | } | |
1721 | } else { | |
1722 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
1723 | /* don't need to clear IPPCSE as it defaults to 0 */ | |
1724 | } | |
581d708e | 1725 | E1000_WRITE_REG(hw, RXCSUM, rxcsum); |
1da177e4 | 1726 | } |
24025e4e | 1727 | #endif /* CONFIG_E1000_MQ */ |
1da177e4 | 1728 | |
581d708e MC |
1729 | if (hw->mac_type == e1000_82573) |
1730 | E1000_WRITE_REG(hw, ERT, 0x0100); | |
2d7edb92 | 1731 | |
1da177e4 | 1732 | /* Enable Receives */ |
581d708e | 1733 | E1000_WRITE_REG(hw, RCTL, rctl); |
1da177e4 LT |
1734 | } |
1735 | ||
1736 | /** | |
581d708e | 1737 | * e1000_free_tx_resources - Free Tx Resources per Queue |
1da177e4 | 1738 | * @adapter: board private structure |
581d708e | 1739 | * @tx_ring: Tx descriptor ring for a specific queue |
1da177e4 LT |
1740 | * |
1741 | * Free all transmit software resources | |
1742 | **/ | |
1743 | ||
1744 | void | |
581d708e MC |
1745 | e1000_free_tx_resources(struct e1000_adapter *adapter, |
1746 | struct e1000_tx_ring *tx_ring) | |
1da177e4 LT |
1747 | { |
1748 | struct pci_dev *pdev = adapter->pdev; | |
1749 | ||
581d708e | 1750 | e1000_clean_tx_ring(adapter, tx_ring); |
1da177e4 | 1751 | |
581d708e MC |
1752 | vfree(tx_ring->buffer_info); |
1753 | tx_ring->buffer_info = NULL; | |
1da177e4 | 1754 | |
581d708e | 1755 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); |
1da177e4 | 1756 | |
581d708e MC |
1757 | tx_ring->desc = NULL; |
1758 | } | |
1759 | ||
1760 | /** | |
1761 | * e1000_free_all_tx_resources - Free Tx Resources for All Queues | |
1762 | * @adapter: board private structure | |
1763 | * | |
1764 | * Free all transmit software resources | |
1765 | **/ | |
1766 | ||
1767 | void | |
1768 | e1000_free_all_tx_resources(struct e1000_adapter *adapter) | |
1769 | { | |
1770 | int i; | |
1771 | ||
1772 | for (i = 0; i < adapter->num_queues; i++) | |
1773 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); | |
1da177e4 LT |
1774 | } |
1775 | ||
1776 | static inline void | |
1777 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, | |
1778 | struct e1000_buffer *buffer_info) | |
1779 | { | |
1da177e4 | 1780 | if(buffer_info->dma) { |
2648345f MC |
1781 | pci_unmap_page(adapter->pdev, |
1782 | buffer_info->dma, | |
1783 | buffer_info->length, | |
1784 | PCI_DMA_TODEVICE); | |
1da177e4 LT |
1785 | buffer_info->dma = 0; |
1786 | } | |
1787 | if(buffer_info->skb) { | |
1788 | dev_kfree_skb_any(buffer_info->skb); | |
1789 | buffer_info->skb = NULL; | |
1790 | } | |
1791 | } | |
1792 | ||
1793 | /** | |
1794 | * e1000_clean_tx_ring - Free Tx Buffers | |
1795 | * @adapter: board private structure | |
581d708e | 1796 | * @tx_ring: ring to be cleaned |
1da177e4 LT |
1797 | **/ |
1798 | ||
1799 | static void | |
581d708e MC |
1800 | e1000_clean_tx_ring(struct e1000_adapter *adapter, |
1801 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 1802 | { |
1da177e4 LT |
1803 | struct e1000_buffer *buffer_info; |
1804 | unsigned long size; | |
1805 | unsigned int i; | |
1806 | ||
1807 | /* Free all the Tx ring sk_buffs */ | |
1808 | ||
581d708e | 1809 | if (likely(tx_ring->previous_buffer_info.skb != NULL)) { |
2648345f | 1810 | e1000_unmap_and_free_tx_resource(adapter, |
581d708e | 1811 | &tx_ring->previous_buffer_info); |
1da177e4 LT |
1812 | } |
1813 | ||
1814 | for(i = 0; i < tx_ring->count; i++) { | |
1815 | buffer_info = &tx_ring->buffer_info[i]; | |
1816 | e1000_unmap_and_free_tx_resource(adapter, buffer_info); | |
1817 | } | |
1818 | ||
1819 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
1820 | memset(tx_ring->buffer_info, 0, size); | |
1821 | ||
1822 | /* Zero out the descriptor ring */ | |
1823 | ||
1824 | memset(tx_ring->desc, 0, tx_ring->size); | |
1825 | ||
1826 | tx_ring->next_to_use = 0; | |
1827 | tx_ring->next_to_clean = 0; | |
1828 | ||
581d708e MC |
1829 | writel(0, adapter->hw.hw_addr + tx_ring->tdh); |
1830 | writel(0, adapter->hw.hw_addr + tx_ring->tdt); | |
1831 | } | |
1832 | ||
1833 | /** | |
1834 | * e1000_clean_all_tx_rings - Free Tx Buffers for all queues | |
1835 | * @adapter: board private structure | |
1836 | **/ | |
1837 | ||
1838 | static void | |
1839 | e1000_clean_all_tx_rings(struct e1000_adapter *adapter) | |
1840 | { | |
1841 | int i; | |
1842 | ||
1843 | for (i = 0; i < adapter->num_queues; i++) | |
1844 | e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); | |
1da177e4 LT |
1845 | } |
1846 | ||
1847 | /** | |
1848 | * e1000_free_rx_resources - Free Rx Resources | |
1849 | * @adapter: board private structure | |
581d708e | 1850 | * @rx_ring: ring to clean the resources from |
1da177e4 LT |
1851 | * |
1852 | * Free all receive software resources | |
1853 | **/ | |
1854 | ||
1855 | void | |
581d708e MC |
1856 | e1000_free_rx_resources(struct e1000_adapter *adapter, |
1857 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 1858 | { |
1da177e4 LT |
1859 | struct pci_dev *pdev = adapter->pdev; |
1860 | ||
581d708e | 1861 | e1000_clean_rx_ring(adapter, rx_ring); |
1da177e4 LT |
1862 | |
1863 | vfree(rx_ring->buffer_info); | |
1864 | rx_ring->buffer_info = NULL; | |
2d7edb92 MC |
1865 | kfree(rx_ring->ps_page); |
1866 | rx_ring->ps_page = NULL; | |
1867 | kfree(rx_ring->ps_page_dma); | |
1868 | rx_ring->ps_page_dma = NULL; | |
1da177e4 LT |
1869 | |
1870 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
1871 | ||
1872 | rx_ring->desc = NULL; | |
1873 | } | |
1874 | ||
1875 | /** | |
581d708e | 1876 | * e1000_free_all_rx_resources - Free Rx Resources for All Queues |
1da177e4 | 1877 | * @adapter: board private structure |
581d708e MC |
1878 | * |
1879 | * Free all receive software resources | |
1880 | **/ | |
1881 | ||
1882 | void | |
1883 | e1000_free_all_rx_resources(struct e1000_adapter *adapter) | |
1884 | { | |
1885 | int i; | |
1886 | ||
1887 | for (i = 0; i < adapter->num_queues; i++) | |
1888 | e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); | |
1889 | } | |
1890 | ||
1891 | /** | |
1892 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
1893 | * @adapter: board private structure | |
1894 | * @rx_ring: ring to free buffers from | |
1da177e4 LT |
1895 | **/ |
1896 | ||
1897 | static void | |
581d708e MC |
1898 | e1000_clean_rx_ring(struct e1000_adapter *adapter, |
1899 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 1900 | { |
1da177e4 | 1901 | struct e1000_buffer *buffer_info; |
2d7edb92 MC |
1902 | struct e1000_ps_page *ps_page; |
1903 | struct e1000_ps_page_dma *ps_page_dma; | |
1da177e4 LT |
1904 | struct pci_dev *pdev = adapter->pdev; |
1905 | unsigned long size; | |
2d7edb92 | 1906 | unsigned int i, j; |
1da177e4 LT |
1907 | |
1908 | /* Free all the Rx ring sk_buffs */ | |
1909 | ||
1910 | for(i = 0; i < rx_ring->count; i++) { | |
1911 | buffer_info = &rx_ring->buffer_info[i]; | |
1912 | if(buffer_info->skb) { | |
2d7edb92 MC |
1913 | ps_page = &rx_ring->ps_page[i]; |
1914 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
1da177e4 LT |
1915 | pci_unmap_single(pdev, |
1916 | buffer_info->dma, | |
1917 | buffer_info->length, | |
1918 | PCI_DMA_FROMDEVICE); | |
1919 | ||
1920 | dev_kfree_skb(buffer_info->skb); | |
1921 | buffer_info->skb = NULL; | |
2d7edb92 | 1922 | |
e4c811c9 | 1923 | for(j = 0; j < adapter->rx_ps_pages; j++) { |
2d7edb92 MC |
1924 | if(!ps_page->ps_page[j]) break; |
1925 | pci_unmap_single(pdev, | |
1926 | ps_page_dma->ps_page_dma[j], | |
1927 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
1928 | ps_page_dma->ps_page_dma[j] = 0; | |
1929 | put_page(ps_page->ps_page[j]); | |
1930 | ps_page->ps_page[j] = NULL; | |
1931 | } | |
1da177e4 LT |
1932 | } |
1933 | } | |
1934 | ||
1935 | size = sizeof(struct e1000_buffer) * rx_ring->count; | |
1936 | memset(rx_ring->buffer_info, 0, size); | |
2d7edb92 MC |
1937 | size = sizeof(struct e1000_ps_page) * rx_ring->count; |
1938 | memset(rx_ring->ps_page, 0, size); | |
1939 | size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; | |
1940 | memset(rx_ring->ps_page_dma, 0, size); | |
1da177e4 LT |
1941 | |
1942 | /* Zero out the descriptor ring */ | |
1943 | ||
1944 | memset(rx_ring->desc, 0, rx_ring->size); | |
1945 | ||
1946 | rx_ring->next_to_clean = 0; | |
1947 | rx_ring->next_to_use = 0; | |
1948 | ||
581d708e MC |
1949 | writel(0, adapter->hw.hw_addr + rx_ring->rdh); |
1950 | writel(0, adapter->hw.hw_addr + rx_ring->rdt); | |
1951 | } | |
1952 | ||
1953 | /** | |
1954 | * e1000_clean_all_rx_rings - Free Rx Buffers for all queues | |
1955 | * @adapter: board private structure | |
1956 | **/ | |
1957 | ||
1958 | static void | |
1959 | e1000_clean_all_rx_rings(struct e1000_adapter *adapter) | |
1960 | { | |
1961 | int i; | |
1962 | ||
1963 | for (i = 0; i < adapter->num_queues; i++) | |
1964 | e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); | |
1da177e4 LT |
1965 | } |
1966 | ||
1967 | /* The 82542 2.0 (revision 2) needs to have the receive unit in reset | |
1968 | * and memory write and invalidate disabled for certain operations | |
1969 | */ | |
1970 | static void | |
1971 | e1000_enter_82542_rst(struct e1000_adapter *adapter) | |
1972 | { | |
1973 | struct net_device *netdev = adapter->netdev; | |
1974 | uint32_t rctl; | |
1975 | ||
1976 | e1000_pci_clear_mwi(&adapter->hw); | |
1977 | ||
1978 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1979 | rctl |= E1000_RCTL_RST; | |
1980 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1981 | E1000_WRITE_FLUSH(&adapter->hw); | |
1982 | mdelay(5); | |
1983 | ||
1984 | if(netif_running(netdev)) | |
581d708e | 1985 | e1000_clean_all_rx_rings(adapter); |
1da177e4 LT |
1986 | } |
1987 | ||
1988 | static void | |
1989 | e1000_leave_82542_rst(struct e1000_adapter *adapter) | |
1990 | { | |
1991 | struct net_device *netdev = adapter->netdev; | |
1992 | uint32_t rctl; | |
1993 | ||
1994 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
1995 | rctl &= ~E1000_RCTL_RST; | |
1996 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
1997 | E1000_WRITE_FLUSH(&adapter->hw); | |
1998 | mdelay(5); | |
1999 | ||
2000 | if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) | |
2001 | e1000_pci_set_mwi(&adapter->hw); | |
2002 | ||
2003 | if(netif_running(netdev)) { | |
2004 | e1000_configure_rx(adapter); | |
581d708e | 2005 | e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]); |
1da177e4 LT |
2006 | } |
2007 | } | |
2008 | ||
2009 | /** | |
2010 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
2011 | * @netdev: network interface device structure | |
2012 | * @p: pointer to an address structure | |
2013 | * | |
2014 | * Returns 0 on success, negative on failure | |
2015 | **/ | |
2016 | ||
2017 | static int | |
2018 | e1000_set_mac(struct net_device *netdev, void *p) | |
2019 | { | |
60490fe0 | 2020 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2021 | struct sockaddr *addr = p; |
2022 | ||
2023 | if(!is_valid_ether_addr(addr->sa_data)) | |
2024 | return -EADDRNOTAVAIL; | |
2025 | ||
2026 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2027 | ||
2028 | if(adapter->hw.mac_type == e1000_82542_rev2_0) | |
2029 | e1000_enter_82542_rst(adapter); | |
2030 | ||
2031 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
2032 | memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); | |
2033 | ||
2034 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2035 | ||
868d5309 MC |
2036 | /* With 82571 controllers, LAA may be overwritten (with the default) |
2037 | * due to controller reset from the other port. */ | |
2038 | if (adapter->hw.mac_type == e1000_82571) { | |
2039 | /* activate the work around */ | |
2040 | adapter->hw.laa_is_present = 1; | |
2041 | ||
2042 | /* Hold a copy of the LAA in RAR[14] This is done so that | |
2043 | * between the time RAR[0] gets clobbered and the time it | |
2044 | * gets fixed (in e1000_watchdog), the actual LAA is in one | |
2045 | * of the RARs and no incoming packets directed to this port | |
2046 | * are dropped. Eventaully the LAA will be in RAR[0] and | |
2047 | * RAR[14] */ | |
2048 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, | |
2049 | E1000_RAR_ENTRIES - 1); | |
2050 | } | |
2051 | ||
1da177e4 LT |
2052 | if(adapter->hw.mac_type == e1000_82542_rev2_0) |
2053 | e1000_leave_82542_rst(adapter); | |
2054 | ||
2055 | return 0; | |
2056 | } | |
2057 | ||
2058 | /** | |
2059 | * e1000_set_multi - Multicast and Promiscuous mode set | |
2060 | * @netdev: network interface device structure | |
2061 | * | |
2062 | * The set_multi entry point is called whenever the multicast address | |
2063 | * list or the network interface flags are updated. This routine is | |
2064 | * responsible for configuring the hardware for proper multicast, | |
2065 | * promiscuous mode, and all-multi behavior. | |
2066 | **/ | |
2067 | ||
2068 | static void | |
2069 | e1000_set_multi(struct net_device *netdev) | |
2070 | { | |
60490fe0 | 2071 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2072 | struct e1000_hw *hw = &adapter->hw; |
2073 | struct dev_mc_list *mc_ptr; | |
2074 | uint32_t rctl; | |
2075 | uint32_t hash_value; | |
868d5309 | 2076 | int i, rar_entries = E1000_RAR_ENTRIES; |
1da177e4 | 2077 | |
868d5309 MC |
2078 | /* reserve RAR[14] for LAA over-write work-around */ |
2079 | if (adapter->hw.mac_type == e1000_82571) | |
2080 | rar_entries--; | |
1da177e4 | 2081 | |
2648345f MC |
2082 | /* Check for Promiscuous and All Multicast modes */ |
2083 | ||
1da177e4 LT |
2084 | rctl = E1000_READ_REG(hw, RCTL); |
2085 | ||
2086 | if(netdev->flags & IFF_PROMISC) { | |
2087 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2088 | } else if(netdev->flags & IFF_ALLMULTI) { | |
2089 | rctl |= E1000_RCTL_MPE; | |
2090 | rctl &= ~E1000_RCTL_UPE; | |
2091 | } else { | |
2092 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2093 | } | |
2094 | ||
2095 | E1000_WRITE_REG(hw, RCTL, rctl); | |
2096 | ||
2097 | /* 82542 2.0 needs to be in reset to write receive address registers */ | |
2098 | ||
2099 | if(hw->mac_type == e1000_82542_rev2_0) | |
2100 | e1000_enter_82542_rst(adapter); | |
2101 | ||
2102 | /* load the first 14 multicast address into the exact filters 1-14 | |
2103 | * RAR 0 is used for the station MAC adddress | |
2104 | * if there are not 14 addresses, go ahead and clear the filters | |
868d5309 | 2105 | * -- with 82571 controllers only 0-13 entries are filled here |
1da177e4 LT |
2106 | */ |
2107 | mc_ptr = netdev->mc_list; | |
2108 | ||
868d5309 MC |
2109 | for(i = 1; i < rar_entries; i++) { |
2110 | if (mc_ptr) { | |
1da177e4 LT |
2111 | e1000_rar_set(hw, mc_ptr->dmi_addr, i); |
2112 | mc_ptr = mc_ptr->next; | |
2113 | } else { | |
2114 | E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); | |
2115 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); | |
2116 | } | |
2117 | } | |
2118 | ||
2119 | /* clear the old settings from the multicast hash table */ | |
2120 | ||
2121 | for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++) | |
2122 | E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); | |
2123 | ||
2124 | /* load any remaining addresses into the hash table */ | |
2125 | ||
2126 | for(; mc_ptr; mc_ptr = mc_ptr->next) { | |
2127 | hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr); | |
2128 | e1000_mta_set(hw, hash_value); | |
2129 | } | |
2130 | ||
2131 | if(hw->mac_type == e1000_82542_rev2_0) | |
2132 | e1000_leave_82542_rst(adapter); | |
1da177e4 LT |
2133 | } |
2134 | ||
2135 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2136 | * the phy */ | |
2137 | ||
2138 | static void | |
2139 | e1000_update_phy_info(unsigned long data) | |
2140 | { | |
2141 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2142 | e1000_phy_get_info(&adapter->hw, &adapter->phy_info); | |
2143 | } | |
2144 | ||
2145 | /** | |
2146 | * e1000_82547_tx_fifo_stall - Timer Call-back | |
2147 | * @data: pointer to adapter cast into an unsigned long | |
2148 | **/ | |
2149 | ||
2150 | static void | |
2151 | e1000_82547_tx_fifo_stall(unsigned long data) | |
2152 | { | |
2153 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2154 | struct net_device *netdev = adapter->netdev; | |
2155 | uint32_t tctl; | |
2156 | ||
2157 | if(atomic_read(&adapter->tx_fifo_stall)) { | |
2158 | if((E1000_READ_REG(&adapter->hw, TDT) == | |
2159 | E1000_READ_REG(&adapter->hw, TDH)) && | |
2160 | (E1000_READ_REG(&adapter->hw, TDFT) == | |
2161 | E1000_READ_REG(&adapter->hw, TDFH)) && | |
2162 | (E1000_READ_REG(&adapter->hw, TDFTS) == | |
2163 | E1000_READ_REG(&adapter->hw, TDFHS))) { | |
2164 | tctl = E1000_READ_REG(&adapter->hw, TCTL); | |
2165 | E1000_WRITE_REG(&adapter->hw, TCTL, | |
2166 | tctl & ~E1000_TCTL_EN); | |
2167 | E1000_WRITE_REG(&adapter->hw, TDFT, | |
2168 | adapter->tx_head_addr); | |
2169 | E1000_WRITE_REG(&adapter->hw, TDFH, | |
2170 | adapter->tx_head_addr); | |
2171 | E1000_WRITE_REG(&adapter->hw, TDFTS, | |
2172 | adapter->tx_head_addr); | |
2173 | E1000_WRITE_REG(&adapter->hw, TDFHS, | |
2174 | adapter->tx_head_addr); | |
2175 | E1000_WRITE_REG(&adapter->hw, TCTL, tctl); | |
2176 | E1000_WRITE_FLUSH(&adapter->hw); | |
2177 | ||
2178 | adapter->tx_fifo_head = 0; | |
2179 | atomic_set(&adapter->tx_fifo_stall, 0); | |
2180 | netif_wake_queue(netdev); | |
2181 | } else { | |
2182 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); | |
2183 | } | |
2184 | } | |
2185 | } | |
2186 | ||
2187 | /** | |
2188 | * e1000_watchdog - Timer Call-back | |
2189 | * @data: pointer to adapter cast into an unsigned long | |
2190 | **/ | |
2191 | static void | |
2192 | e1000_watchdog(unsigned long data) | |
2193 | { | |
2194 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
2195 | ||
2196 | /* Do the rest outside of interrupt context */ | |
2197 | schedule_work(&adapter->watchdog_task); | |
2198 | } | |
2199 | ||
2200 | static void | |
2201 | e1000_watchdog_task(struct e1000_adapter *adapter) | |
2202 | { | |
2203 | struct net_device *netdev = adapter->netdev; | |
581d708e | 2204 | struct e1000_tx_ring *txdr = &adapter->tx_ring[0]; |
1da177e4 LT |
2205 | uint32_t link; |
2206 | ||
2207 | e1000_check_for_link(&adapter->hw); | |
2d7edb92 MC |
2208 | if (adapter->hw.mac_type == e1000_82573) { |
2209 | e1000_enable_tx_pkt_filtering(&adapter->hw); | |
2210 | if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) | |
2211 | e1000_update_mng_vlan(adapter); | |
2212 | } | |
1da177e4 LT |
2213 | |
2214 | if((adapter->hw.media_type == e1000_media_type_internal_serdes) && | |
2215 | !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) | |
2216 | link = !adapter->hw.serdes_link_down; | |
2217 | else | |
2218 | link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; | |
2219 | ||
2220 | if(link) { | |
2221 | if(!netif_carrier_ok(netdev)) { | |
2222 | e1000_get_speed_and_duplex(&adapter->hw, | |
2223 | &adapter->link_speed, | |
2224 | &adapter->link_duplex); | |
2225 | ||
2226 | DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n", | |
2227 | adapter->link_speed, | |
2228 | adapter->link_duplex == FULL_DUPLEX ? | |
2229 | "Full Duplex" : "Half Duplex"); | |
2230 | ||
2231 | netif_carrier_on(netdev); | |
2232 | netif_wake_queue(netdev); | |
2233 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
2234 | adapter->smartspeed = 0; | |
2235 | } | |
2236 | } else { | |
2237 | if(netif_carrier_ok(netdev)) { | |
2238 | adapter->link_speed = 0; | |
2239 | adapter->link_duplex = 0; | |
2240 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); | |
2241 | netif_carrier_off(netdev); | |
2242 | netif_stop_queue(netdev); | |
2243 | mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ); | |
2244 | } | |
2245 | ||
2246 | e1000_smartspeed(adapter); | |
2247 | } | |
2248 | ||
2249 | e1000_update_stats(adapter); | |
2250 | ||
2251 | adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
2252 | adapter->tpt_old = adapter->stats.tpt; | |
2253 | adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; | |
2254 | adapter->colc_old = adapter->stats.colc; | |
2255 | ||
2256 | adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; | |
2257 | adapter->gorcl_old = adapter->stats.gorcl; | |
2258 | adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; | |
2259 | adapter->gotcl_old = adapter->stats.gotcl; | |
2260 | ||
2261 | e1000_update_adaptive(&adapter->hw); | |
2262 | ||
581d708e MC |
2263 | if (adapter->num_queues == 1 && !netif_carrier_ok(netdev)) { |
2264 | if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { | |
1da177e4 LT |
2265 | /* We've lost link, so the controller stops DMA, |
2266 | * but we've got queued Tx work that's never going | |
2267 | * to get done, so reset controller to flush Tx. | |
2268 | * (Do the reset outside of interrupt context). */ | |
2269 | schedule_work(&adapter->tx_timeout_task); | |
2270 | } | |
2271 | } | |
2272 | ||
2273 | /* Dynamic mode for Interrupt Throttle Rate (ITR) */ | |
2274 | if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) { | |
2275 | /* Symmetric Tx/Rx gets a reduced ITR=2000; Total | |
2276 | * asymmetrical Tx or Rx gets ITR=8000; everyone | |
2277 | * else is between 2000-8000. */ | |
2278 | uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000; | |
2279 | uint32_t dif = (adapter->gotcl > adapter->gorcl ? | |
2280 | adapter->gotcl - adapter->gorcl : | |
2281 | adapter->gorcl - adapter->gotcl) / 10000; | |
2282 | uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; | |
2283 | E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256)); | |
2284 | } | |
2285 | ||
2286 | /* Cause software interrupt to ensure rx ring is cleaned */ | |
2287 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); | |
2288 | ||
2648345f | 2289 | /* Force detection of hung controller every watchdog period */ |
1da177e4 LT |
2290 | adapter->detect_tx_hung = TRUE; |
2291 | ||
868d5309 MC |
2292 | /* With 82571 controllers, LAA may be overwritten due to controller |
2293 | * reset from the other port. Set the appropriate LAA in RAR[0] */ | |
2294 | if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present) | |
2295 | e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); | |
2296 | ||
1da177e4 LT |
2297 | /* Reset the timer */ |
2298 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
2299 | } | |
2300 | ||
2301 | #define E1000_TX_FLAGS_CSUM 0x00000001 | |
2302 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
2303 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
2d7edb92 | 2304 | #define E1000_TX_FLAGS_IPV4 0x00000008 |
1da177e4 LT |
2305 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2306 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
2307 | ||
2308 | static inline int | |
581d708e MC |
2309 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2310 | struct sk_buff *skb) | |
1da177e4 LT |
2311 | { |
2312 | #ifdef NETIF_F_TSO | |
2313 | struct e1000_context_desc *context_desc; | |
2314 | unsigned int i; | |
2315 | uint32_t cmd_length = 0; | |
2d7edb92 | 2316 | uint16_t ipcse = 0, tucse, mss; |
1da177e4 LT |
2317 | uint8_t ipcss, ipcso, tucss, tucso, hdr_len; |
2318 | int err; | |
2319 | ||
2320 | if(skb_shinfo(skb)->tso_size) { | |
2321 | if (skb_header_cloned(skb)) { | |
2322 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2323 | if (err) | |
2324 | return err; | |
2325 | } | |
2326 | ||
2327 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
2328 | mss = skb_shinfo(skb)->tso_size; | |
2d7edb92 MC |
2329 | if(skb->protocol == ntohs(ETH_P_IP)) { |
2330 | skb->nh.iph->tot_len = 0; | |
2331 | skb->nh.iph->check = 0; | |
2332 | skb->h.th->check = | |
2333 | ~csum_tcpudp_magic(skb->nh.iph->saddr, | |
2334 | skb->nh.iph->daddr, | |
2335 | 0, | |
2336 | IPPROTO_TCP, | |
2337 | 0); | |
2338 | cmd_length = E1000_TXD_CMD_IP; | |
2339 | ipcse = skb->h.raw - skb->data - 1; | |
2340 | #ifdef NETIF_F_TSO_IPV6 | |
2341 | } else if(skb->protocol == ntohs(ETH_P_IPV6)) { | |
2342 | skb->nh.ipv6h->payload_len = 0; | |
2343 | skb->h.th->check = | |
2344 | ~csum_ipv6_magic(&skb->nh.ipv6h->saddr, | |
2345 | &skb->nh.ipv6h->daddr, | |
2346 | 0, | |
2347 | IPPROTO_TCP, | |
2348 | 0); | |
2349 | ipcse = 0; | |
2350 | #endif | |
2351 | } | |
1da177e4 LT |
2352 | ipcss = skb->nh.raw - skb->data; |
2353 | ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; | |
1da177e4 LT |
2354 | tucss = skb->h.raw - skb->data; |
2355 | tucso = (void *)&(skb->h.th->check) - (void *)skb->data; | |
2356 | tucse = 0; | |
2357 | ||
2358 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
2d7edb92 | 2359 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); |
1da177e4 | 2360 | |
581d708e MC |
2361 | i = tx_ring->next_to_use; |
2362 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
1da177e4 LT |
2363 | |
2364 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
2365 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
2366 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
2367 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
2368 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
2369 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
2370 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
2371 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
2372 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
2373 | ||
581d708e MC |
2374 | if (++i == tx_ring->count) i = 0; |
2375 | tx_ring->next_to_use = i; | |
1da177e4 LT |
2376 | |
2377 | return 1; | |
2378 | } | |
2379 | #endif | |
2380 | ||
2381 | return 0; | |
2382 | } | |
2383 | ||
2384 | static inline boolean_t | |
581d708e MC |
2385 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2386 | struct sk_buff *skb) | |
1da177e4 LT |
2387 | { |
2388 | struct e1000_context_desc *context_desc; | |
2389 | unsigned int i; | |
2390 | uint8_t css; | |
2391 | ||
2392 | if(likely(skb->ip_summed == CHECKSUM_HW)) { | |
2393 | css = skb->h.raw - skb->data; | |
2394 | ||
581d708e MC |
2395 | i = tx_ring->next_to_use; |
2396 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
1da177e4 LT |
2397 | |
2398 | context_desc->upper_setup.tcp_fields.tucss = css; | |
2399 | context_desc->upper_setup.tcp_fields.tucso = css + skb->csum; | |
2400 | context_desc->upper_setup.tcp_fields.tucse = 0; | |
2401 | context_desc->tcp_seg_setup.data = 0; | |
2402 | context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); | |
2403 | ||
581d708e MC |
2404 | if (unlikely(++i == tx_ring->count)) i = 0; |
2405 | tx_ring->next_to_use = i; | |
1da177e4 LT |
2406 | |
2407 | return TRUE; | |
2408 | } | |
2409 | ||
2410 | return FALSE; | |
2411 | } | |
2412 | ||
2413 | #define E1000_MAX_TXD_PWR 12 | |
2414 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | |
2415 | ||
2416 | static inline int | |
581d708e MC |
2417 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2418 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, | |
2419 | unsigned int nr_frags, unsigned int mss) | |
1da177e4 | 2420 | { |
1da177e4 LT |
2421 | struct e1000_buffer *buffer_info; |
2422 | unsigned int len = skb->len; | |
2423 | unsigned int offset = 0, size, count = 0, i; | |
2424 | unsigned int f; | |
2425 | len -= skb->data_len; | |
2426 | ||
2427 | i = tx_ring->next_to_use; | |
2428 | ||
2429 | while(len) { | |
2430 | buffer_info = &tx_ring->buffer_info[i]; | |
2431 | size = min(len, max_per_txd); | |
2432 | #ifdef NETIF_F_TSO | |
2433 | /* Workaround for premature desc write-backs | |
2434 | * in TSO mode. Append 4-byte sentinel desc */ | |
2435 | if(unlikely(mss && !nr_frags && size == len && size > 8)) | |
2436 | size -= 4; | |
2437 | #endif | |
97338bde MC |
2438 | /* work-around for errata 10 and it applies |
2439 | * to all controllers in PCI-X mode | |
2440 | * The fix is to make sure that the first descriptor of a | |
2441 | * packet is smaller than 2048 - 16 - 16 (or 2016) bytes | |
2442 | */ | |
2443 | if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && | |
2444 | (size > 2015) && count == 0)) | |
2445 | size = 2015; | |
2446 | ||
1da177e4 LT |
2447 | /* Workaround for potential 82544 hang in PCI-X. Avoid |
2448 | * terminating buffers within evenly-aligned dwords. */ | |
2449 | if(unlikely(adapter->pcix_82544 && | |
2450 | !((unsigned long)(skb->data + offset + size - 1) & 4) && | |
2451 | size > 4)) | |
2452 | size -= 4; | |
2453 | ||
2454 | buffer_info->length = size; | |
2455 | buffer_info->dma = | |
2456 | pci_map_single(adapter->pdev, | |
2457 | skb->data + offset, | |
2458 | size, | |
2459 | PCI_DMA_TODEVICE); | |
2460 | buffer_info->time_stamp = jiffies; | |
2461 | ||
2462 | len -= size; | |
2463 | offset += size; | |
2464 | count++; | |
2465 | if(unlikely(++i == tx_ring->count)) i = 0; | |
2466 | } | |
2467 | ||
2468 | for(f = 0; f < nr_frags; f++) { | |
2469 | struct skb_frag_struct *frag; | |
2470 | ||
2471 | frag = &skb_shinfo(skb)->frags[f]; | |
2472 | len = frag->size; | |
2473 | offset = frag->page_offset; | |
2474 | ||
2475 | while(len) { | |
2476 | buffer_info = &tx_ring->buffer_info[i]; | |
2477 | size = min(len, max_per_txd); | |
2478 | #ifdef NETIF_F_TSO | |
2479 | /* Workaround for premature desc write-backs | |
2480 | * in TSO mode. Append 4-byte sentinel desc */ | |
2481 | if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) | |
2482 | size -= 4; | |
2483 | #endif | |
2484 | /* Workaround for potential 82544 hang in PCI-X. | |
2485 | * Avoid terminating buffers within evenly-aligned | |
2486 | * dwords. */ | |
2487 | if(unlikely(adapter->pcix_82544 && | |
2488 | !((unsigned long)(frag->page+offset+size-1) & 4) && | |
2489 | size > 4)) | |
2490 | size -= 4; | |
2491 | ||
2492 | buffer_info->length = size; | |
2493 | buffer_info->dma = | |
2494 | pci_map_page(adapter->pdev, | |
2495 | frag->page, | |
2496 | offset, | |
2497 | size, | |
2498 | PCI_DMA_TODEVICE); | |
2499 | buffer_info->time_stamp = jiffies; | |
2500 | ||
2501 | len -= size; | |
2502 | offset += size; | |
2503 | count++; | |
2504 | if(unlikely(++i == tx_ring->count)) i = 0; | |
2505 | } | |
2506 | } | |
2507 | ||
2508 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
2509 | tx_ring->buffer_info[i].skb = skb; | |
2510 | tx_ring->buffer_info[first].next_to_watch = i; | |
2511 | ||
2512 | return count; | |
2513 | } | |
2514 | ||
2515 | static inline void | |
581d708e MC |
2516 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2517 | int tx_flags, int count) | |
1da177e4 | 2518 | { |
1da177e4 LT |
2519 | struct e1000_tx_desc *tx_desc = NULL; |
2520 | struct e1000_buffer *buffer_info; | |
2521 | uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; | |
2522 | unsigned int i; | |
2523 | ||
2524 | if(likely(tx_flags & E1000_TX_FLAGS_TSO)) { | |
2525 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | | |
2526 | E1000_TXD_CMD_TSE; | |
2d7edb92 MC |
2527 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; |
2528 | ||
2529 | if(likely(tx_flags & E1000_TX_FLAGS_IPV4)) | |
2530 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; | |
1da177e4 LT |
2531 | } |
2532 | ||
2533 | if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) { | |
2534 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; | |
2535 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
2536 | } | |
2537 | ||
2538 | if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { | |
2539 | txd_lower |= E1000_TXD_CMD_VLE; | |
2540 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
2541 | } | |
2542 | ||
2543 | i = tx_ring->next_to_use; | |
2544 | ||
2545 | while(count--) { | |
2546 | buffer_info = &tx_ring->buffer_info[i]; | |
2547 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
2548 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
2549 | tx_desc->lower.data = | |
2550 | cpu_to_le32(txd_lower | buffer_info->length); | |
2551 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
2552 | if(unlikely(++i == tx_ring->count)) i = 0; | |
2553 | } | |
2554 | ||
2555 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
2556 | ||
2557 | /* Force memory writes to complete before letting h/w | |
2558 | * know there are new descriptors to fetch. (Only | |
2559 | * applicable for weak-ordered memory model archs, | |
2560 | * such as IA-64). */ | |
2561 | wmb(); | |
2562 | ||
2563 | tx_ring->next_to_use = i; | |
581d708e | 2564 | writel(i, adapter->hw.hw_addr + tx_ring->tdt); |
1da177e4 LT |
2565 | } |
2566 | ||
2567 | /** | |
2568 | * 82547 workaround to avoid controller hang in half-duplex environment. | |
2569 | * The workaround is to avoid queuing a large packet that would span | |
2570 | * the internal Tx FIFO ring boundary by notifying the stack to resend | |
2571 | * the packet at a later time. This gives the Tx FIFO an opportunity to | |
2572 | * flush all packets. When that occurs, we reset the Tx FIFO pointers | |
2573 | * to the beginning of the Tx FIFO. | |
2574 | **/ | |
2575 | ||
2576 | #define E1000_FIFO_HDR 0x10 | |
2577 | #define E1000_82547_PAD_LEN 0x3E0 | |
2578 | ||
2579 | static inline int | |
2580 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) | |
2581 | { | |
2582 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; | |
2583 | uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; | |
2584 | ||
2585 | E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR); | |
2586 | ||
2587 | if(adapter->link_duplex != HALF_DUPLEX) | |
2588 | goto no_fifo_stall_required; | |
2589 | ||
2590 | if(atomic_read(&adapter->tx_fifo_stall)) | |
2591 | return 1; | |
2592 | ||
2593 | if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { | |
2594 | atomic_set(&adapter->tx_fifo_stall, 1); | |
2595 | return 1; | |
2596 | } | |
2597 | ||
2598 | no_fifo_stall_required: | |
2599 | adapter->tx_fifo_head += skb_fifo_len; | |
2600 | if(adapter->tx_fifo_head >= adapter->tx_fifo_size) | |
2601 | adapter->tx_fifo_head -= adapter->tx_fifo_size; | |
2602 | return 0; | |
2603 | } | |
2604 | ||
2d7edb92 MC |
2605 | #define MINIMUM_DHCP_PACKET_SIZE 282 |
2606 | static inline int | |
2607 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) | |
2608 | { | |
2609 | struct e1000_hw *hw = &adapter->hw; | |
2610 | uint16_t length, offset; | |
2611 | if(vlan_tx_tag_present(skb)) { | |
2612 | if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && | |
2613 | ( adapter->hw.mng_cookie.status & | |
2614 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) | |
2615 | return 0; | |
2616 | } | |
2617 | if(htons(ETH_P_IP) == skb->protocol) { | |
2618 | const struct iphdr *ip = skb->nh.iph; | |
2619 | if(IPPROTO_UDP == ip->protocol) { | |
2620 | struct udphdr *udp = (struct udphdr *)(skb->h.uh); | |
2621 | if(ntohs(udp->dest) == 67) { | |
2622 | offset = (uint8_t *)udp + 8 - skb->data; | |
2623 | length = skb->len - offset; | |
2624 | ||
2625 | return e1000_mng_write_dhcp_info(hw, | |
2626 | (uint8_t *)udp + 8, length); | |
2627 | } | |
2628 | } | |
2629 | } else if((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) { | |
2630 | struct ethhdr *eth = (struct ethhdr *) skb->data; | |
2631 | if((htons(ETH_P_IP) == eth->h_proto)) { | |
2632 | const struct iphdr *ip = | |
2633 | (struct iphdr *)((uint8_t *)skb->data+14); | |
2634 | if(IPPROTO_UDP == ip->protocol) { | |
2635 | struct udphdr *udp = | |
2636 | (struct udphdr *)((uint8_t *)ip + | |
2637 | (ip->ihl << 2)); | |
2638 | if(ntohs(udp->dest) == 67) { | |
2639 | offset = (uint8_t *)udp + 8 - skb->data; | |
2640 | length = skb->len - offset; | |
2641 | ||
2642 | return e1000_mng_write_dhcp_info(hw, | |
2643 | (uint8_t *)udp + 8, | |
2644 | length); | |
2645 | } | |
2646 | } | |
2647 | } | |
2648 | } | |
2649 | return 0; | |
2650 | } | |
2651 | ||
1da177e4 LT |
2652 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
2653 | static int | |
2654 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
2655 | { | |
60490fe0 | 2656 | struct e1000_adapter *adapter = netdev_priv(netdev); |
581d708e | 2657 | struct e1000_tx_ring *tx_ring; |
1da177e4 LT |
2658 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
2659 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
2660 | unsigned int tx_flags = 0; | |
2661 | unsigned int len = skb->len; | |
2662 | unsigned long flags; | |
2663 | unsigned int nr_frags = 0; | |
2664 | unsigned int mss = 0; | |
2665 | int count = 0; | |
2666 | int tso; | |
2667 | unsigned int f; | |
2668 | len -= skb->data_len; | |
2669 | ||
24025e4e MC |
2670 | #ifdef CONFIG_E1000_MQ |
2671 | tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id()); | |
2672 | #else | |
581d708e | 2673 | tx_ring = adapter->tx_ring; |
24025e4e MC |
2674 | #endif |
2675 | ||
581d708e | 2676 | if (unlikely(skb->len <= 0)) { |
1da177e4 LT |
2677 | dev_kfree_skb_any(skb); |
2678 | return NETDEV_TX_OK; | |
2679 | } | |
2680 | ||
2681 | #ifdef NETIF_F_TSO | |
2682 | mss = skb_shinfo(skb)->tso_size; | |
2648345f | 2683 | /* The controller does a simple calculation to |
1da177e4 LT |
2684 | * make sure there is enough room in the FIFO before |
2685 | * initiating the DMA for each buffer. The calc is: | |
2686 | * 4 = ceil(buffer len/mss). To make sure we don't | |
2687 | * overrun the FIFO, adjust the max buffer len if mss | |
2688 | * drops. */ | |
2689 | if(mss) { | |
2690 | max_per_txd = min(mss << 2, max_per_txd); | |
2691 | max_txd_pwr = fls(max_per_txd) - 1; | |
2692 | } | |
2693 | ||
2694 | if((mss) || (skb->ip_summed == CHECKSUM_HW)) | |
2695 | count++; | |
2648345f | 2696 | count++; |
1da177e4 LT |
2697 | #else |
2698 | if(skb->ip_summed == CHECKSUM_HW) | |
2699 | count++; | |
2700 | #endif | |
2701 | count += TXD_USE_COUNT(len, max_txd_pwr); | |
2702 | ||
2703 | if(adapter->pcix_82544) | |
2704 | count++; | |
2705 | ||
97338bde MC |
2706 | /* work-around for errata 10 and it applies to all controllers |
2707 | * in PCI-X mode, so add one more descriptor to the count | |
2708 | */ | |
2709 | if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && | |
2710 | (len > 2015))) | |
2711 | count++; | |
2712 | ||
1da177e4 LT |
2713 | nr_frags = skb_shinfo(skb)->nr_frags; |
2714 | for(f = 0; f < nr_frags; f++) | |
2715 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, | |
2716 | max_txd_pwr); | |
2717 | if(adapter->pcix_82544) | |
2718 | count += nr_frags; | |
2719 | ||
868d5309 MC |
2720 | #ifdef NETIF_F_TSO |
2721 | /* TSO Workaround for 82571/2 Controllers -- if skb->data | |
2722 | * points to just header, pull a few bytes of payload from | |
2723 | * frags into skb->data */ | |
2724 | if (skb_shinfo(skb)->tso_size) { | |
2725 | uint8_t hdr_len; | |
2726 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
2727 | if (skb->data_len && (hdr_len < (skb->len - skb->data_len)) && | |
2728 | (adapter->hw.mac_type == e1000_82571 || | |
2729 | adapter->hw.mac_type == e1000_82572)) { | |
2730 | unsigned int pull_size; | |
2731 | pull_size = min((unsigned int)4, skb->data_len); | |
2732 | if (!__pskb_pull_tail(skb, pull_size)) { | |
2733 | printk(KERN_ERR "__pskb_pull_tail failed.\n"); | |
2734 | dev_kfree_skb_any(skb); | |
2735 | return -EFAULT; | |
2736 | } | |
2737 | } | |
2738 | } | |
2739 | #endif | |
2740 | ||
2d7edb92 MC |
2741 | if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) ) |
2742 | e1000_transfer_dhcp_info(adapter, skb); | |
2743 | ||
581d708e MC |
2744 | local_irq_save(flags); |
2745 | if (!spin_trylock(&tx_ring->tx_lock)) { | |
2746 | /* Collision - tell upper layer to requeue */ | |
2747 | local_irq_restore(flags); | |
2748 | return NETDEV_TX_LOCKED; | |
2749 | } | |
1da177e4 LT |
2750 | |
2751 | /* need: count + 2 desc gap to keep tail from touching | |
2752 | * head, otherwise try next time */ | |
581d708e | 2753 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) { |
1da177e4 | 2754 | netif_stop_queue(netdev); |
581d708e | 2755 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2756 | return NETDEV_TX_BUSY; |
2757 | } | |
2758 | ||
2759 | if(unlikely(adapter->hw.mac_type == e1000_82547)) { | |
2760 | if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) { | |
2761 | netif_stop_queue(netdev); | |
2762 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies); | |
581d708e | 2763 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2764 | return NETDEV_TX_BUSY; |
2765 | } | |
2766 | } | |
2767 | ||
2768 | if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { | |
2769 | tx_flags |= E1000_TX_FLAGS_VLAN; | |
2770 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
2771 | } | |
2772 | ||
581d708e | 2773 | first = tx_ring->next_to_use; |
1da177e4 | 2774 | |
581d708e | 2775 | tso = e1000_tso(adapter, tx_ring, skb); |
1da177e4 LT |
2776 | if (tso < 0) { |
2777 | dev_kfree_skb_any(skb); | |
581d708e | 2778 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2779 | return NETDEV_TX_OK; |
2780 | } | |
2781 | ||
2782 | if (likely(tso)) | |
2783 | tx_flags |= E1000_TX_FLAGS_TSO; | |
581d708e | 2784 | else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) |
1da177e4 LT |
2785 | tx_flags |= E1000_TX_FLAGS_CSUM; |
2786 | ||
2d7edb92 | 2787 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
868d5309 | 2788 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
2d7edb92 | 2789 | * no longer assume, we must. */ |
581d708e | 2790 | if (likely(skb->protocol == ntohs(ETH_P_IP))) |
2d7edb92 MC |
2791 | tx_flags |= E1000_TX_FLAGS_IPV4; |
2792 | ||
581d708e MC |
2793 | e1000_tx_queue(adapter, tx_ring, tx_flags, |
2794 | e1000_tx_map(adapter, tx_ring, skb, first, | |
2795 | max_per_txd, nr_frags, mss)); | |
1da177e4 LT |
2796 | |
2797 | netdev->trans_start = jiffies; | |
2798 | ||
2799 | /* Make sure there is space in the ring for the next send. */ | |
581d708e | 2800 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2)) |
1da177e4 LT |
2801 | netif_stop_queue(netdev); |
2802 | ||
581d708e | 2803 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
1da177e4 LT |
2804 | return NETDEV_TX_OK; |
2805 | } | |
2806 | ||
2807 | /** | |
2808 | * e1000_tx_timeout - Respond to a Tx Hang | |
2809 | * @netdev: network interface device structure | |
2810 | **/ | |
2811 | ||
2812 | static void | |
2813 | e1000_tx_timeout(struct net_device *netdev) | |
2814 | { | |
60490fe0 | 2815 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2816 | |
2817 | /* Do the reset outside of interrupt context */ | |
2818 | schedule_work(&adapter->tx_timeout_task); | |
2819 | } | |
2820 | ||
2821 | static void | |
2822 | e1000_tx_timeout_task(struct net_device *netdev) | |
2823 | { | |
60490fe0 | 2824 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2825 | |
2826 | e1000_down(adapter); | |
2827 | e1000_up(adapter); | |
2828 | } | |
2829 | ||
2830 | /** | |
2831 | * e1000_get_stats - Get System Network Statistics | |
2832 | * @netdev: network interface device structure | |
2833 | * | |
2834 | * Returns the address of the device statistics structure. | |
2835 | * The statistics are actually updated from the timer callback. | |
2836 | **/ | |
2837 | ||
2838 | static struct net_device_stats * | |
2839 | e1000_get_stats(struct net_device *netdev) | |
2840 | { | |
60490fe0 | 2841 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2842 | |
2843 | e1000_update_stats(adapter); | |
2844 | return &adapter->net_stats; | |
2845 | } | |
2846 | ||
2847 | /** | |
2848 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
2849 | * @netdev: network interface device structure | |
2850 | * @new_mtu: new value for maximum frame size | |
2851 | * | |
2852 | * Returns 0 on success, negative on failure | |
2853 | **/ | |
2854 | ||
2855 | static int | |
2856 | e1000_change_mtu(struct net_device *netdev, int new_mtu) | |
2857 | { | |
60490fe0 | 2858 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2859 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
2860 | ||
2861 | if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || | |
2862 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
2863 | DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); | |
2864 | return -EINVAL; | |
2865 | } | |
2866 | ||
868d5309 | 2867 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
2d7edb92 | 2868 | /* might want this to be bigger enum check... */ |
868d5309 MC |
2869 | /* 82571 controllers limit jumbo frame size to 10500 bytes */ |
2870 | if ((adapter->hw.mac_type == e1000_82571 || | |
2871 | adapter->hw.mac_type == e1000_82572) && | |
2872 | max_frame > MAX_STD_JUMBO_FRAME_SIZE) { | |
2873 | DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported " | |
2874 | "on 82571 and 82572 controllers.\n"); | |
2875 | return -EINVAL; | |
2876 | } | |
2877 | ||
2878 | if(adapter->hw.mac_type == e1000_82573 && | |
2d7edb92 MC |
2879 | max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
2880 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported " | |
2881 | "on 82573\n"); | |
1da177e4 | 2882 | return -EINVAL; |
2d7edb92 | 2883 | } |
1da177e4 | 2884 | |
2d7edb92 MC |
2885 | if(adapter->hw.mac_type > e1000_82547_rev_2) { |
2886 | adapter->rx_buffer_len = max_frame; | |
2887 | E1000_ROUNDUP(adapter->rx_buffer_len, 1024); | |
1da177e4 | 2888 | } else { |
2d7edb92 MC |
2889 | if(unlikely((adapter->hw.mac_type < e1000_82543) && |
2890 | (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) { | |
2891 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported " | |
2892 | "on 82542\n"); | |
2893 | return -EINVAL; | |
2894 | ||
2895 | } else { | |
2896 | if(max_frame <= E1000_RXBUFFER_2048) { | |
2897 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | |
2898 | } else if(max_frame <= E1000_RXBUFFER_4096) { | |
2899 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; | |
2900 | } else if(max_frame <= E1000_RXBUFFER_8192) { | |
2901 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; | |
2902 | } else if(max_frame <= E1000_RXBUFFER_16384) { | |
2903 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; | |
2904 | } | |
2905 | } | |
1da177e4 LT |
2906 | } |
2907 | ||
2d7edb92 MC |
2908 | netdev->mtu = new_mtu; |
2909 | ||
2910 | if(netif_running(netdev)) { | |
1da177e4 LT |
2911 | e1000_down(adapter); |
2912 | e1000_up(adapter); | |
2913 | } | |
2914 | ||
1da177e4 LT |
2915 | adapter->hw.max_frame_size = max_frame; |
2916 | ||
2917 | return 0; | |
2918 | } | |
2919 | ||
2920 | /** | |
2921 | * e1000_update_stats - Update the board statistics counters | |
2922 | * @adapter: board private structure | |
2923 | **/ | |
2924 | ||
2925 | void | |
2926 | e1000_update_stats(struct e1000_adapter *adapter) | |
2927 | { | |
2928 | struct e1000_hw *hw = &adapter->hw; | |
2929 | unsigned long flags; | |
2930 | uint16_t phy_tmp; | |
2931 | ||
2932 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
2933 | ||
2934 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
2935 | ||
2936 | /* these counters are modified from e1000_adjust_tbi_stats, | |
2937 | * called from the interrupt context, so they must only | |
2938 | * be written while holding adapter->stats_lock | |
2939 | */ | |
2940 | ||
2941 | adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); | |
2942 | adapter->stats.gprc += E1000_READ_REG(hw, GPRC); | |
2943 | adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); | |
2944 | adapter->stats.gorch += E1000_READ_REG(hw, GORCH); | |
2945 | adapter->stats.bprc += E1000_READ_REG(hw, BPRC); | |
2946 | adapter->stats.mprc += E1000_READ_REG(hw, MPRC); | |
2947 | adapter->stats.roc += E1000_READ_REG(hw, ROC); | |
2948 | adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); | |
2949 | adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); | |
2950 | adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); | |
2951 | adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); | |
2952 | adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); | |
2953 | adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); | |
2954 | ||
2955 | adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); | |
2956 | adapter->stats.mpc += E1000_READ_REG(hw, MPC); | |
2957 | adapter->stats.scc += E1000_READ_REG(hw, SCC); | |
2958 | adapter->stats.ecol += E1000_READ_REG(hw, ECOL); | |
2959 | adapter->stats.mcc += E1000_READ_REG(hw, MCC); | |
2960 | adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); | |
2961 | adapter->stats.dc += E1000_READ_REG(hw, DC); | |
2962 | adapter->stats.sec += E1000_READ_REG(hw, SEC); | |
2963 | adapter->stats.rlec += E1000_READ_REG(hw, RLEC); | |
2964 | adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); | |
2965 | adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); | |
2966 | adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); | |
2967 | adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); | |
2968 | adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); | |
2969 | adapter->stats.gptc += E1000_READ_REG(hw, GPTC); | |
2970 | adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); | |
2971 | adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); | |
2972 | adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); | |
2973 | adapter->stats.ruc += E1000_READ_REG(hw, RUC); | |
2974 | adapter->stats.rfc += E1000_READ_REG(hw, RFC); | |
2975 | adapter->stats.rjc += E1000_READ_REG(hw, RJC); | |
2976 | adapter->stats.torl += E1000_READ_REG(hw, TORL); | |
2977 | adapter->stats.torh += E1000_READ_REG(hw, TORH); | |
2978 | adapter->stats.totl += E1000_READ_REG(hw, TOTL); | |
2979 | adapter->stats.toth += E1000_READ_REG(hw, TOTH); | |
2980 | adapter->stats.tpr += E1000_READ_REG(hw, TPR); | |
2981 | adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); | |
2982 | adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); | |
2983 | adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); | |
2984 | adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); | |
2985 | adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); | |
2986 | adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); | |
2987 | adapter->stats.mptc += E1000_READ_REG(hw, MPTC); | |
2988 | adapter->stats.bptc += E1000_READ_REG(hw, BPTC); | |
2989 | ||
2990 | /* used for adaptive IFS */ | |
2991 | ||
2992 | hw->tx_packet_delta = E1000_READ_REG(hw, TPT); | |
2993 | adapter->stats.tpt += hw->tx_packet_delta; | |
2994 | hw->collision_delta = E1000_READ_REG(hw, COLC); | |
2995 | adapter->stats.colc += hw->collision_delta; | |
2996 | ||
2997 | if(hw->mac_type >= e1000_82543) { | |
2998 | adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); | |
2999 | adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); | |
3000 | adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); | |
3001 | adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); | |
3002 | adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); | |
3003 | adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); | |
3004 | } | |
2d7edb92 MC |
3005 | if(hw->mac_type > e1000_82547_rev_2) { |
3006 | adapter->stats.iac += E1000_READ_REG(hw, IAC); | |
3007 | adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); | |
3008 | adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); | |
3009 | adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); | |
3010 | adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); | |
3011 | adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); | |
3012 | adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); | |
3013 | adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); | |
3014 | adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); | |
3015 | } | |
1da177e4 LT |
3016 | |
3017 | /* Fill out the OS statistics structure */ | |
3018 | ||
3019 | adapter->net_stats.rx_packets = adapter->stats.gprc; | |
3020 | adapter->net_stats.tx_packets = adapter->stats.gptc; | |
3021 | adapter->net_stats.rx_bytes = adapter->stats.gorcl; | |
3022 | adapter->net_stats.tx_bytes = adapter->stats.gotcl; | |
3023 | adapter->net_stats.multicast = adapter->stats.mprc; | |
3024 | adapter->net_stats.collisions = adapter->stats.colc; | |
3025 | ||
3026 | /* Rx Errors */ | |
3027 | ||
3028 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + | |
3029 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
6d915757 MC |
3030 | adapter->stats.rlec + adapter->stats.mpc + |
3031 | adapter->stats.cexterr; | |
1da177e4 LT |
3032 | adapter->net_stats.rx_length_errors = adapter->stats.rlec; |
3033 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; | |
3034 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | |
3035 | adapter->net_stats.rx_fifo_errors = adapter->stats.mpc; | |
3036 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; | |
3037 | ||
3038 | /* Tx Errors */ | |
3039 | ||
3040 | adapter->net_stats.tx_errors = adapter->stats.ecol + | |
3041 | adapter->stats.latecol; | |
3042 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; | |
3043 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | |
3044 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | |
3045 | ||
3046 | /* Tx Dropped needs to be maintained elsewhere */ | |
3047 | ||
3048 | /* Phy Stats */ | |
3049 | ||
3050 | if(hw->media_type == e1000_media_type_copper) { | |
3051 | if((adapter->link_speed == SPEED_1000) && | |
3052 | (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { | |
3053 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
3054 | adapter->phy_stats.idle_errors += phy_tmp; | |
3055 | } | |
3056 | ||
3057 | if((hw->mac_type <= e1000_82546) && | |
3058 | (hw->phy_type == e1000_phy_m88) && | |
3059 | !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) | |
3060 | adapter->phy_stats.receive_errors += phy_tmp; | |
3061 | } | |
3062 | ||
3063 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
3064 | } | |
3065 | ||
24025e4e MC |
3066 | #ifdef CONFIG_E1000_MQ |
3067 | void | |
3068 | e1000_rx_schedule(void *data) | |
3069 | { | |
3070 | struct net_device *poll_dev, *netdev = data; | |
3071 | struct e1000_adapter *adapter = netdev->priv; | |
3072 | int this_cpu = get_cpu(); | |
3073 | ||
3074 | poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu); | |
3075 | if (poll_dev == NULL) { | |
3076 | put_cpu(); | |
3077 | return; | |
3078 | } | |
3079 | ||
3080 | if (likely(netif_rx_schedule_prep(poll_dev))) | |
3081 | __netif_rx_schedule(poll_dev); | |
3082 | else | |
3083 | e1000_irq_enable(adapter); | |
3084 | ||
3085 | put_cpu(); | |
3086 | } | |
3087 | #endif | |
3088 | ||
1da177e4 LT |
3089 | /** |
3090 | * e1000_intr - Interrupt Handler | |
3091 | * @irq: interrupt number | |
3092 | * @data: pointer to a network interface device structure | |
3093 | * @pt_regs: CPU registers structure | |
3094 | **/ | |
3095 | ||
3096 | static irqreturn_t | |
3097 | e1000_intr(int irq, void *data, struct pt_regs *regs) | |
3098 | { | |
3099 | struct net_device *netdev = data; | |
60490fe0 | 3100 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
3101 | struct e1000_hw *hw = &adapter->hw; |
3102 | uint32_t icr = E1000_READ_REG(hw, ICR); | |
be2b28ed | 3103 | #ifdef CONFIG_E1000_MQ |
581d708e | 3104 | int i; |
be2b28ed | 3105 | #endif |
1da177e4 LT |
3106 | |
3107 | if(unlikely(!icr)) | |
3108 | return IRQ_NONE; /* Not our interrupt */ | |
3109 | ||
3110 | if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { | |
3111 | hw->get_link_status = 1; | |
3112 | mod_timer(&adapter->watchdog_timer, jiffies); | |
3113 | } | |
3114 | ||
3115 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3116 | atomic_inc(&adapter->irq_sem); |
3117 | E1000_WRITE_REG(hw, IMC, ~0); | |
3118 | E1000_WRITE_FLUSH(hw); | |
24025e4e MC |
3119 | #ifdef CONFIG_E1000_MQ |
3120 | if (atomic_read(&adapter->rx_sched_call_data.count) == 0) { | |
3121 | cpu_set(adapter->cpu_for_queue[0], | |
3122 | adapter->rx_sched_call_data.cpumask); | |
3123 | for (i = 1; i < adapter->num_queues; i++) { | |
3124 | cpu_set(adapter->cpu_for_queue[i], | |
3125 | adapter->rx_sched_call_data.cpumask); | |
3126 | atomic_inc(&adapter->irq_sem); | |
3127 | } | |
3128 | atomic_set(&adapter->rx_sched_call_data.count, i); | |
3129 | smp_call_async_mask(&adapter->rx_sched_call_data); | |
3130 | } else { | |
3131 | printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count)); | |
1da177e4 | 3132 | } |
be2b28ed | 3133 | #else /* if !CONFIG_E1000_MQ */ |
581d708e MC |
3134 | if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0]))) |
3135 | __netif_rx_schedule(&adapter->polling_netdev[0]); | |
3136 | else | |
3137 | e1000_irq_enable(adapter); | |
be2b28ed JG |
3138 | #endif /* CONFIG_E1000_MQ */ |
3139 | ||
3140 | #else /* if !CONFIG_E1000_NAPI */ | |
1da177e4 LT |
3141 | /* Writing IMC and IMS is needed for 82547. |
3142 | Due to Hub Link bus being occupied, an interrupt | |
3143 | de-assertion message is not able to be sent. | |
3144 | When an interrupt assertion message is generated later, | |
3145 | two messages are re-ordered and sent out. | |
3146 | That causes APIC to think 82547 is in de-assertion | |
3147 | state, while 82547 is in assertion state, resulting | |
3148 | in dead lock. Writing IMC forces 82547 into | |
3149 | de-assertion state. | |
3150 | */ | |
3151 | if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){ | |
3152 | atomic_inc(&adapter->irq_sem); | |
2648345f | 3153 | E1000_WRITE_REG(hw, IMC, ~0); |
1da177e4 LT |
3154 | } |
3155 | ||
3156 | for(i = 0; i < E1000_MAX_INTR; i++) | |
581d708e MC |
3157 | if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & |
3158 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) | |
1da177e4 LT |
3159 | break; |
3160 | ||
3161 | if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) | |
3162 | e1000_irq_enable(adapter); | |
581d708e | 3163 | |
be2b28ed | 3164 | #endif /* CONFIG_E1000_NAPI */ |
1da177e4 LT |
3165 | |
3166 | return IRQ_HANDLED; | |
3167 | } | |
3168 | ||
3169 | #ifdef CONFIG_E1000_NAPI | |
3170 | /** | |
3171 | * e1000_clean - NAPI Rx polling callback | |
3172 | * @adapter: board private structure | |
3173 | **/ | |
3174 | ||
3175 | static int | |
581d708e | 3176 | e1000_clean(struct net_device *poll_dev, int *budget) |
1da177e4 | 3177 | { |
581d708e MC |
3178 | struct e1000_adapter *adapter; |
3179 | int work_to_do = min(*budget, poll_dev->quota); | |
3180 | int tx_cleaned, i = 0, work_done = 0; | |
3181 | ||
3182 | /* Must NOT use netdev_priv macro here. */ | |
3183 | adapter = poll_dev->priv; | |
3184 | ||
3185 | /* Keep link state information with original netdev */ | |
3186 | if (!netif_carrier_ok(adapter->netdev)) | |
3187 | goto quit_polling; | |
2648345f | 3188 | |
581d708e MC |
3189 | while (poll_dev != &adapter->polling_netdev[i]) { |
3190 | i++; | |
3191 | if (unlikely(i == adapter->num_queues)) | |
3192 | BUG(); | |
3193 | } | |
3194 | ||
3195 | tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]); | |
3196 | adapter->clean_rx(adapter, &adapter->rx_ring[i], | |
3197 | &work_done, work_to_do); | |
1da177e4 LT |
3198 | |
3199 | *budget -= work_done; | |
581d708e | 3200 | poll_dev->quota -= work_done; |
1da177e4 | 3201 | |
2b02893e | 3202 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
581d708e MC |
3203 | if((!tx_cleaned && (work_done == 0)) || |
3204 | !netif_running(adapter->netdev)) { | |
3205 | quit_polling: | |
3206 | netif_rx_complete(poll_dev); | |
1da177e4 LT |
3207 | e1000_irq_enable(adapter); |
3208 | return 0; | |
3209 | } | |
3210 | ||
3211 | return 1; | |
3212 | } | |
3213 | ||
3214 | #endif | |
3215 | /** | |
3216 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
3217 | * @adapter: board private structure | |
3218 | **/ | |
3219 | ||
3220 | static boolean_t | |
581d708e MC |
3221 | e1000_clean_tx_irq(struct e1000_adapter *adapter, |
3222 | struct e1000_tx_ring *tx_ring) | |
1da177e4 | 3223 | { |
1da177e4 LT |
3224 | struct net_device *netdev = adapter->netdev; |
3225 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
3226 | struct e1000_buffer *buffer_info; | |
3227 | unsigned int i, eop; | |
3228 | boolean_t cleaned = FALSE; | |
3229 | ||
3230 | i = tx_ring->next_to_clean; | |
3231 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3232 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3233 | ||
581d708e | 3234 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { |
2701234f MC |
3235 | /* Premature writeback of Tx descriptors clear (free buffers |
3236 | * and unmap pci_mapping) previous_buffer_info */ | |
581d708e | 3237 | if (likely(tx_ring->previous_buffer_info.skb != NULL)) { |
2701234f | 3238 | e1000_unmap_and_free_tx_resource(adapter, |
581d708e | 3239 | &tx_ring->previous_buffer_info); |
1da177e4 LT |
3240 | } |
3241 | ||
3242 | for(cleaned = FALSE; !cleaned; ) { | |
3243 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
3244 | buffer_info = &tx_ring->buffer_info[i]; | |
3245 | cleaned = (i == eop); | |
3246 | ||
2701234f MC |
3247 | #ifdef NETIF_F_TSO |
3248 | if (!(netdev->features & NETIF_F_TSO)) { | |
3249 | #endif | |
3250 | e1000_unmap_and_free_tx_resource(adapter, | |
3251 | buffer_info); | |
3252 | #ifdef NETIF_F_TSO | |
1da177e4 | 3253 | } else { |
2701234f | 3254 | if (cleaned) { |
581d708e | 3255 | memcpy(&tx_ring->previous_buffer_info, |
2701234f MC |
3256 | buffer_info, |
3257 | sizeof(struct e1000_buffer)); | |
3258 | memset(buffer_info, 0, | |
3259 | sizeof(struct e1000_buffer)); | |
3260 | } else { | |
3261 | e1000_unmap_and_free_tx_resource( | |
3262 | adapter, buffer_info); | |
3263 | } | |
1da177e4 | 3264 | } |
2701234f | 3265 | #endif |
1da177e4 LT |
3266 | |
3267 | tx_desc->buffer_addr = 0; | |
3268 | tx_desc->lower.data = 0; | |
3269 | tx_desc->upper.data = 0; | |
3270 | ||
1da177e4 LT |
3271 | if(unlikely(++i == tx_ring->count)) i = 0; |
3272 | } | |
581d708e MC |
3273 | |
3274 | tx_ring->pkt++; | |
1da177e4 LT |
3275 | |
3276 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3277 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
3278 | } | |
3279 | ||
3280 | tx_ring->next_to_clean = i; | |
3281 | ||
581d708e | 3282 | spin_lock(&tx_ring->tx_lock); |
1da177e4 LT |
3283 | |
3284 | if(unlikely(cleaned && netif_queue_stopped(netdev) && | |
3285 | netif_carrier_ok(netdev))) | |
3286 | netif_wake_queue(netdev); | |
3287 | ||
581d708e | 3288 | spin_unlock(&tx_ring->tx_lock); |
2648345f | 3289 | |
581d708e | 3290 | if (adapter->detect_tx_hung) { |
2648345f | 3291 | /* Detect a transmit hang in hardware, this serializes the |
1da177e4 LT |
3292 | * check with the clearing of time_stamp and movement of i */ |
3293 | adapter->detect_tx_hung = FALSE; | |
70b8f1e1 MC |
3294 | if (tx_ring->buffer_info[i].dma && |
3295 | time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ) | |
3296 | && !(E1000_READ_REG(&adapter->hw, STATUS) & | |
3297 | E1000_STATUS_TXOFF)) { | |
3298 | ||
3299 | /* detected Tx unit hang */ | |
3300 | i = tx_ring->next_to_clean; | |
3301 | eop = tx_ring->buffer_info[i].next_to_watch; | |
3302 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
c6963ef5 | 3303 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" |
70b8f1e1 MC |
3304 | " TDH <%x>\n" |
3305 | " TDT <%x>\n" | |
3306 | " next_to_use <%x>\n" | |
3307 | " next_to_clean <%x>\n" | |
3308 | "buffer_info[next_to_clean]\n" | |
b4ee21f4 | 3309 | " dma <%llx>\n" |
70b8f1e1 MC |
3310 | " time_stamp <%lx>\n" |
3311 | " next_to_watch <%x>\n" | |
3312 | " jiffies <%lx>\n" | |
3313 | " next_to_watch.status <%x>\n", | |
581d708e MC |
3314 | readl(adapter->hw.hw_addr + tx_ring->tdh), |
3315 | readl(adapter->hw.hw_addr + tx_ring->tdt), | |
70b8f1e1 MC |
3316 | tx_ring->next_to_use, |
3317 | i, | |
b4ee21f4 | 3318 | (unsigned long long)tx_ring->buffer_info[i].dma, |
70b8f1e1 MC |
3319 | tx_ring->buffer_info[i].time_stamp, |
3320 | eop, | |
3321 | jiffies, | |
3322 | eop_desc->upper.fields.status); | |
1da177e4 | 3323 | netif_stop_queue(netdev); |
70b8f1e1 | 3324 | } |
1da177e4 | 3325 | } |
2701234f | 3326 | #ifdef NETIF_F_TSO |
581d708e MC |
3327 | if (unlikely(!(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && |
3328 | time_after(jiffies, tx_ring->previous_buffer_info.time_stamp + HZ))) | |
2701234f | 3329 | e1000_unmap_and_free_tx_resource( |
581d708e | 3330 | adapter, &tx_ring->previous_buffer_info); |
2701234f | 3331 | #endif |
1da177e4 LT |
3332 | return cleaned; |
3333 | } | |
3334 | ||
3335 | /** | |
3336 | * e1000_rx_checksum - Receive Checksum Offload for 82543 | |
2d7edb92 MC |
3337 | * @adapter: board private structure |
3338 | * @status_err: receive descriptor status and error fields | |
3339 | * @csum: receive descriptor csum field | |
3340 | * @sk_buff: socket buffer with received data | |
1da177e4 LT |
3341 | **/ |
3342 | ||
3343 | static inline void | |
3344 | e1000_rx_checksum(struct e1000_adapter *adapter, | |
2d7edb92 MC |
3345 | uint32_t status_err, uint32_t csum, |
3346 | struct sk_buff *skb) | |
1da177e4 | 3347 | { |
2d7edb92 MC |
3348 | uint16_t status = (uint16_t)status_err; |
3349 | uint8_t errors = (uint8_t)(status_err >> 24); | |
3350 | skb->ip_summed = CHECKSUM_NONE; | |
3351 | ||
1da177e4 | 3352 | /* 82543 or newer only */ |
2d7edb92 | 3353 | if(unlikely(adapter->hw.mac_type < e1000_82543)) return; |
1da177e4 | 3354 | /* Ignore Checksum bit is set */ |
2d7edb92 MC |
3355 | if(unlikely(status & E1000_RXD_STAT_IXSM)) return; |
3356 | /* TCP/UDP checksum error bit is set */ | |
3357 | if(unlikely(errors & E1000_RXD_ERR_TCPE)) { | |
1da177e4 | 3358 | /* let the stack verify checksum errors */ |
1da177e4 | 3359 | adapter->hw_csum_err++; |
2d7edb92 MC |
3360 | return; |
3361 | } | |
3362 | /* TCP/UDP Checksum has not been calculated */ | |
3363 | if(adapter->hw.mac_type <= e1000_82547_rev_2) { | |
3364 | if(!(status & E1000_RXD_STAT_TCPCS)) | |
3365 | return; | |
1da177e4 | 3366 | } else { |
2d7edb92 MC |
3367 | if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) |
3368 | return; | |
3369 | } | |
3370 | /* It must be a TCP or UDP packet with a valid checksum */ | |
3371 | if (likely(status & E1000_RXD_STAT_TCPCS)) { | |
1da177e4 LT |
3372 | /* TCP checksum is good */ |
3373 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
2d7edb92 MC |
3374 | } else if (adapter->hw.mac_type > e1000_82547_rev_2) { |
3375 | /* IP fragment with UDP payload */ | |
3376 | /* Hardware complements the payload checksum, so we undo it | |
3377 | * and then put the value in host order for further stack use. | |
3378 | */ | |
3379 | csum = ntohl(csum ^ 0xFFFF); | |
3380 | skb->csum = csum; | |
3381 | skb->ip_summed = CHECKSUM_HW; | |
1da177e4 | 3382 | } |
2d7edb92 | 3383 | adapter->hw_csum_good++; |
1da177e4 LT |
3384 | } |
3385 | ||
3386 | /** | |
2d7edb92 | 3387 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
1da177e4 LT |
3388 | * @adapter: board private structure |
3389 | **/ | |
3390 | ||
3391 | static boolean_t | |
3392 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3393 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3394 | struct e1000_rx_ring *rx_ring, | |
3395 | int *work_done, int work_to_do) | |
1da177e4 | 3396 | #else |
581d708e MC |
3397 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
3398 | struct e1000_rx_ring *rx_ring) | |
1da177e4 LT |
3399 | #endif |
3400 | { | |
1da177e4 LT |
3401 | struct net_device *netdev = adapter->netdev; |
3402 | struct pci_dev *pdev = adapter->pdev; | |
3403 | struct e1000_rx_desc *rx_desc; | |
3404 | struct e1000_buffer *buffer_info; | |
3405 | struct sk_buff *skb; | |
3406 | unsigned long flags; | |
3407 | uint32_t length; | |
3408 | uint8_t last_byte; | |
3409 | unsigned int i; | |
3410 | boolean_t cleaned = FALSE; | |
3411 | ||
3412 | i = rx_ring->next_to_clean; | |
3413 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
3414 | ||
3415 | while(rx_desc->status & E1000_RXD_STAT_DD) { | |
3416 | buffer_info = &rx_ring->buffer_info[i]; | |
3417 | #ifdef CONFIG_E1000_NAPI | |
3418 | if(*work_done >= work_to_do) | |
3419 | break; | |
3420 | (*work_done)++; | |
3421 | #endif | |
3422 | cleaned = TRUE; | |
3423 | ||
3424 | pci_unmap_single(pdev, | |
3425 | buffer_info->dma, | |
3426 | buffer_info->length, | |
3427 | PCI_DMA_FROMDEVICE); | |
3428 | ||
3429 | skb = buffer_info->skb; | |
3430 | length = le16_to_cpu(rx_desc->length); | |
3431 | ||
3432 | if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) { | |
3433 | /* All receives must fit into a single buffer */ | |
3434 | E1000_DBG("%s: Receive packet consumed multiple" | |
2648345f | 3435 | " buffers\n", netdev->name); |
1da177e4 LT |
3436 | dev_kfree_skb_irq(skb); |
3437 | goto next_desc; | |
3438 | } | |
3439 | ||
3440 | if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { | |
3441 | last_byte = *(skb->data + length - 1); | |
3442 | if(TBI_ACCEPT(&adapter->hw, rx_desc->status, | |
3443 | rx_desc->errors, length, last_byte)) { | |
3444 | spin_lock_irqsave(&adapter->stats_lock, flags); | |
3445 | e1000_tbi_adjust_stats(&adapter->hw, | |
3446 | &adapter->stats, | |
3447 | length, skb->data); | |
3448 | spin_unlock_irqrestore(&adapter->stats_lock, | |
3449 | flags); | |
3450 | length--; | |
3451 | } else { | |
3452 | dev_kfree_skb_irq(skb); | |
3453 | goto next_desc; | |
3454 | } | |
3455 | } | |
3456 | ||
3457 | /* Good Receive */ | |
3458 | skb_put(skb, length - ETHERNET_FCS_SIZE); | |
3459 | ||
3460 | /* Receive Checksum Offload */ | |
2d7edb92 MC |
3461 | e1000_rx_checksum(adapter, |
3462 | (uint32_t)(rx_desc->status) | | |
3463 | ((uint32_t)(rx_desc->errors) << 24), | |
3464 | rx_desc->csum, skb); | |
1da177e4 LT |
3465 | skb->protocol = eth_type_trans(skb, netdev); |
3466 | #ifdef CONFIG_E1000_NAPI | |
3467 | if(unlikely(adapter->vlgrp && | |
3468 | (rx_desc->status & E1000_RXD_STAT_VP))) { | |
3469 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, | |
2d7edb92 MC |
3470 | le16_to_cpu(rx_desc->special) & |
3471 | E1000_RXD_SPC_VLAN_MASK); | |
1da177e4 LT |
3472 | } else { |
3473 | netif_receive_skb(skb); | |
3474 | } | |
3475 | #else /* CONFIG_E1000_NAPI */ | |
3476 | if(unlikely(adapter->vlgrp && | |
3477 | (rx_desc->status & E1000_RXD_STAT_VP))) { | |
3478 | vlan_hwaccel_rx(skb, adapter->vlgrp, | |
3479 | le16_to_cpu(rx_desc->special) & | |
3480 | E1000_RXD_SPC_VLAN_MASK); | |
3481 | } else { | |
3482 | netif_rx(skb); | |
3483 | } | |
3484 | #endif /* CONFIG_E1000_NAPI */ | |
3485 | netdev->last_rx = jiffies; | |
581d708e | 3486 | rx_ring->pkt++; |
1da177e4 LT |
3487 | |
3488 | next_desc: | |
3489 | rx_desc->status = 0; | |
3490 | buffer_info->skb = NULL; | |
3491 | if(unlikely(++i == rx_ring->count)) i = 0; | |
3492 | ||
3493 | rx_desc = E1000_RX_DESC(*rx_ring, i); | |
3494 | } | |
1da177e4 | 3495 | rx_ring->next_to_clean = i; |
581d708e | 3496 | adapter->alloc_rx_buf(adapter, rx_ring); |
2d7edb92 MC |
3497 | |
3498 | return cleaned; | |
3499 | } | |
3500 | ||
3501 | /** | |
3502 | * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split | |
3503 | * @adapter: board private structure | |
3504 | **/ | |
3505 | ||
3506 | static boolean_t | |
3507 | #ifdef CONFIG_E1000_NAPI | |
581d708e MC |
3508 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3509 | struct e1000_rx_ring *rx_ring, | |
3510 | int *work_done, int work_to_do) | |
2d7edb92 | 3511 | #else |
581d708e MC |
3512 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
3513 | struct e1000_rx_ring *rx_ring) | |
2d7edb92 MC |
3514 | #endif |
3515 | { | |
2d7edb92 MC |
3516 | union e1000_rx_desc_packet_split *rx_desc; |
3517 | struct net_device *netdev = adapter->netdev; | |
3518 | struct pci_dev *pdev = adapter->pdev; | |
3519 | struct e1000_buffer *buffer_info; | |
3520 | struct e1000_ps_page *ps_page; | |
3521 | struct e1000_ps_page_dma *ps_page_dma; | |
3522 | struct sk_buff *skb; | |
3523 | unsigned int i, j; | |
3524 | uint32_t length, staterr; | |
3525 | boolean_t cleaned = FALSE; | |
3526 | ||
3527 | i = rx_ring->next_to_clean; | |
3528 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
683a38f3 | 3529 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2d7edb92 MC |
3530 | |
3531 | while(staterr & E1000_RXD_STAT_DD) { | |
3532 | buffer_info = &rx_ring->buffer_info[i]; | |
3533 | ps_page = &rx_ring->ps_page[i]; | |
3534 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3535 | #ifdef CONFIG_E1000_NAPI | |
3536 | if(unlikely(*work_done >= work_to_do)) | |
3537 | break; | |
3538 | (*work_done)++; | |
3539 | #endif | |
3540 | cleaned = TRUE; | |
3541 | pci_unmap_single(pdev, buffer_info->dma, | |
3542 | buffer_info->length, | |
3543 | PCI_DMA_FROMDEVICE); | |
3544 | ||
3545 | skb = buffer_info->skb; | |
3546 | ||
3547 | if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) { | |
3548 | E1000_DBG("%s: Packet Split buffers didn't pick up" | |
3549 | " the full packet\n", netdev->name); | |
3550 | dev_kfree_skb_irq(skb); | |
3551 | goto next_desc; | |
3552 | } | |
1da177e4 | 3553 | |
2d7edb92 MC |
3554 | if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { |
3555 | dev_kfree_skb_irq(skb); | |
3556 | goto next_desc; | |
3557 | } | |
3558 | ||
3559 | length = le16_to_cpu(rx_desc->wb.middle.length0); | |
3560 | ||
3561 | if(unlikely(!length)) { | |
3562 | E1000_DBG("%s: Last part of the packet spanning" | |
3563 | " multiple descriptors\n", netdev->name); | |
3564 | dev_kfree_skb_irq(skb); | |
3565 | goto next_desc; | |
3566 | } | |
3567 | ||
3568 | /* Good Receive */ | |
3569 | skb_put(skb, length); | |
3570 | ||
e4c811c9 | 3571 | for(j = 0; j < adapter->rx_ps_pages; j++) { |
2d7edb92 MC |
3572 | if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j]))) |
3573 | break; | |
3574 | ||
3575 | pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], | |
3576 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
3577 | ps_page_dma->ps_page_dma[j] = 0; | |
3578 | skb_shinfo(skb)->frags[j].page = | |
3579 | ps_page->ps_page[j]; | |
3580 | ps_page->ps_page[j] = NULL; | |
3581 | skb_shinfo(skb)->frags[j].page_offset = 0; | |
3582 | skb_shinfo(skb)->frags[j].size = length; | |
3583 | skb_shinfo(skb)->nr_frags++; | |
3584 | skb->len += length; | |
3585 | skb->data_len += length; | |
3586 | } | |
3587 | ||
3588 | e1000_rx_checksum(adapter, staterr, | |
3589 | rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); | |
3590 | skb->protocol = eth_type_trans(skb, netdev); | |
3591 | ||
2d7edb92 | 3592 | if(likely(rx_desc->wb.upper.header_status & |
e4c811c9 MC |
3593 | E1000_RXDPS_HDRSTAT_HDRSP)) { |
3594 | adapter->rx_hdr_split++; | |
3595 | #ifdef HAVE_RX_ZERO_COPY | |
2d7edb92 MC |
3596 | skb_shinfo(skb)->zero_copy = TRUE; |
3597 | #endif | |
e4c811c9 | 3598 | } |
2d7edb92 MC |
3599 | #ifdef CONFIG_E1000_NAPI |
3600 | if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { | |
3601 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, | |
683a38f3 MC |
3602 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3603 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3604 | } else { |
3605 | netif_receive_skb(skb); | |
3606 | } | |
3607 | #else /* CONFIG_E1000_NAPI */ | |
3608 | if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { | |
3609 | vlan_hwaccel_rx(skb, adapter->vlgrp, | |
683a38f3 MC |
3610 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3611 | E1000_RXD_SPC_VLAN_MASK); | |
2d7edb92 MC |
3612 | } else { |
3613 | netif_rx(skb); | |
3614 | } | |
3615 | #endif /* CONFIG_E1000_NAPI */ | |
3616 | netdev->last_rx = jiffies; | |
581d708e | 3617 | rx_ring->pkt++; |
2d7edb92 MC |
3618 | |
3619 | next_desc: | |
3620 | rx_desc->wb.middle.status_error &= ~0xFF; | |
3621 | buffer_info->skb = NULL; | |
3622 | if(unlikely(++i == rx_ring->count)) i = 0; | |
3623 | ||
3624 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
683a38f3 | 3625 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2d7edb92 MC |
3626 | } |
3627 | rx_ring->next_to_clean = i; | |
581d708e | 3628 | adapter->alloc_rx_buf(adapter, rx_ring); |
1da177e4 LT |
3629 | |
3630 | return cleaned; | |
3631 | } | |
3632 | ||
3633 | /** | |
2d7edb92 | 3634 | * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended |
1da177e4 LT |
3635 | * @adapter: address of board private structure |
3636 | **/ | |
3637 | ||
3638 | static void | |
581d708e MC |
3639 | e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
3640 | struct e1000_rx_ring *rx_ring) | |
1da177e4 | 3641 | { |
1da177e4 LT |
3642 | struct net_device *netdev = adapter->netdev; |
3643 | struct pci_dev *pdev = adapter->pdev; | |
3644 | struct e1000_rx_desc *rx_desc; | |
3645 | struct e1000_buffer *buffer_info; | |
3646 | struct sk_buff *skb; | |
2648345f MC |
3647 | unsigned int i; |
3648 | unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; | |
1da177e4 LT |
3649 | |
3650 | i = rx_ring->next_to_use; | |
3651 | buffer_info = &rx_ring->buffer_info[i]; | |
3652 | ||
3653 | while(!buffer_info->skb) { | |
1da177e4 | 3654 | skb = dev_alloc_skb(bufsz); |
2648345f | 3655 | |
1da177e4 LT |
3656 | if(unlikely(!skb)) { |
3657 | /* Better luck next round */ | |
3658 | break; | |
3659 | } | |
3660 | ||
2648345f | 3661 | /* Fix for errata 23, can't cross 64kB boundary */ |
1da177e4 LT |
3662 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
3663 | struct sk_buff *oldskb = skb; | |
2648345f MC |
3664 | DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " |
3665 | "at %p\n", bufsz, skb->data); | |
3666 | /* Try again, without freeing the previous */ | |
1da177e4 | 3667 | skb = dev_alloc_skb(bufsz); |
2648345f | 3668 | /* Failed allocation, critical failure */ |
1da177e4 LT |
3669 | if (!skb) { |
3670 | dev_kfree_skb(oldskb); | |
3671 | break; | |
3672 | } | |
2648345f | 3673 | |
1da177e4 LT |
3674 | if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { |
3675 | /* give up */ | |
3676 | dev_kfree_skb(skb); | |
3677 | dev_kfree_skb(oldskb); | |
3678 | break; /* while !buffer_info->skb */ | |
3679 | } else { | |
2648345f | 3680 | /* Use new allocation */ |
1da177e4 LT |
3681 | dev_kfree_skb(oldskb); |
3682 | } | |
3683 | } | |
1da177e4 LT |
3684 | /* Make buffer alignment 2 beyond a 16 byte boundary |
3685 | * this will result in a 16 byte aligned IP header after | |
3686 | * the 14 byte MAC header is removed | |
3687 | */ | |
3688 | skb_reserve(skb, NET_IP_ALIGN); | |
3689 | ||
3690 | skb->dev = netdev; | |
3691 | ||
3692 | buffer_info->skb = skb; | |
3693 | buffer_info->length = adapter->rx_buffer_len; | |
3694 | buffer_info->dma = pci_map_single(pdev, | |
3695 | skb->data, | |
3696 | adapter->rx_buffer_len, | |
3697 | PCI_DMA_FROMDEVICE); | |
3698 | ||
2648345f MC |
3699 | /* Fix for errata 23, can't cross 64kB boundary */ |
3700 | if (!e1000_check_64k_bound(adapter, | |
3701 | (void *)(unsigned long)buffer_info->dma, | |
3702 | adapter->rx_buffer_len)) { | |
3703 | DPRINTK(RX_ERR, ERR, | |
3704 | "dma align check failed: %u bytes at %p\n", | |
3705 | adapter->rx_buffer_len, | |
3706 | (void *)(unsigned long)buffer_info->dma); | |
1da177e4 LT |
3707 | dev_kfree_skb(skb); |
3708 | buffer_info->skb = NULL; | |
3709 | ||
2648345f | 3710 | pci_unmap_single(pdev, buffer_info->dma, |
1da177e4 LT |
3711 | adapter->rx_buffer_len, |
3712 | PCI_DMA_FROMDEVICE); | |
3713 | ||
3714 | break; /* while !buffer_info->skb */ | |
3715 | } | |
1da177e4 LT |
3716 | rx_desc = E1000_RX_DESC(*rx_ring, i); |
3717 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
3718 | ||
3719 | if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) { | |
3720 | /* Force memory writes to complete before letting h/w | |
3721 | * know there are new descriptors to fetch. (Only | |
3722 | * applicable for weak-ordered memory model archs, | |
3723 | * such as IA-64). */ | |
3724 | wmb(); | |
581d708e | 3725 | writel(i, adapter->hw.hw_addr + rx_ring->rdt); |
1da177e4 LT |
3726 | } |
3727 | ||
3728 | if(unlikely(++i == rx_ring->count)) i = 0; | |
3729 | buffer_info = &rx_ring->buffer_info[i]; | |
3730 | } | |
3731 | ||
3732 | rx_ring->next_to_use = i; | |
3733 | } | |
3734 | ||
2d7edb92 MC |
3735 | /** |
3736 | * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split | |
3737 | * @adapter: address of board private structure | |
3738 | **/ | |
3739 | ||
3740 | static void | |
581d708e MC |
3741 | e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, |
3742 | struct e1000_rx_ring *rx_ring) | |
2d7edb92 | 3743 | { |
2d7edb92 MC |
3744 | struct net_device *netdev = adapter->netdev; |
3745 | struct pci_dev *pdev = adapter->pdev; | |
3746 | union e1000_rx_desc_packet_split *rx_desc; | |
3747 | struct e1000_buffer *buffer_info; | |
3748 | struct e1000_ps_page *ps_page; | |
3749 | struct e1000_ps_page_dma *ps_page_dma; | |
3750 | struct sk_buff *skb; | |
3751 | unsigned int i, j; | |
3752 | ||
3753 | i = rx_ring->next_to_use; | |
3754 | buffer_info = &rx_ring->buffer_info[i]; | |
3755 | ps_page = &rx_ring->ps_page[i]; | |
3756 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3757 | ||
3758 | while(!buffer_info->skb) { | |
3759 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
3760 | ||
3761 | for(j = 0; j < PS_PAGE_BUFFERS; j++) { | |
e4c811c9 MC |
3762 | if (j < adapter->rx_ps_pages) { |
3763 | if (likely(!ps_page->ps_page[j])) { | |
3764 | ps_page->ps_page[j] = | |
3765 | alloc_page(GFP_ATOMIC); | |
3766 | if (unlikely(!ps_page->ps_page[j])) | |
3767 | goto no_buffers; | |
3768 | ps_page_dma->ps_page_dma[j] = | |
3769 | pci_map_page(pdev, | |
3770 | ps_page->ps_page[j], | |
3771 | 0, PAGE_SIZE, | |
3772 | PCI_DMA_FROMDEVICE); | |
3773 | } | |
3774 | /* Refresh the desc even if buffer_addrs didn't | |
3775 | * change because each write-back erases | |
3776 | * this info. | |
3777 | */ | |
3778 | rx_desc->read.buffer_addr[j+1] = | |
3779 | cpu_to_le64(ps_page_dma->ps_page_dma[j]); | |
3780 | } else | |
3781 | rx_desc->read.buffer_addr[j+1] = ~0; | |
2d7edb92 MC |
3782 | } |
3783 | ||
3784 | skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN); | |
3785 | ||
3786 | if(unlikely(!skb)) | |
3787 | break; | |
3788 | ||
3789 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
3790 | * this will result in a 16 byte aligned IP header after | |
3791 | * the 14 byte MAC header is removed | |
3792 | */ | |
3793 | skb_reserve(skb, NET_IP_ALIGN); | |
3794 | ||
3795 | skb->dev = netdev; | |
3796 | ||
3797 | buffer_info->skb = skb; | |
3798 | buffer_info->length = adapter->rx_ps_bsize0; | |
3799 | buffer_info->dma = pci_map_single(pdev, skb->data, | |
3800 | adapter->rx_ps_bsize0, | |
3801 | PCI_DMA_FROMDEVICE); | |
3802 | ||
3803 | rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); | |
3804 | ||
3805 | if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) { | |
3806 | /* Force memory writes to complete before letting h/w | |
3807 | * know there are new descriptors to fetch. (Only | |
3808 | * applicable for weak-ordered memory model archs, | |
3809 | * such as IA-64). */ | |
3810 | wmb(); | |
3811 | /* Hardware increments by 16 bytes, but packet split | |
3812 | * descriptors are 32 bytes...so we increment tail | |
3813 | * twice as much. | |
3814 | */ | |
581d708e | 3815 | writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt); |
2d7edb92 MC |
3816 | } |
3817 | ||
3818 | if(unlikely(++i == rx_ring->count)) i = 0; | |
3819 | buffer_info = &rx_ring->buffer_info[i]; | |
3820 | ps_page = &rx_ring->ps_page[i]; | |
3821 | ps_page_dma = &rx_ring->ps_page_dma[i]; | |
3822 | } | |
3823 | ||
3824 | no_buffers: | |
3825 | rx_ring->next_to_use = i; | |
3826 | } | |
3827 | ||
1da177e4 LT |
3828 | /** |
3829 | * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. | |
3830 | * @adapter: | |
3831 | **/ | |
3832 | ||
3833 | static void | |
3834 | e1000_smartspeed(struct e1000_adapter *adapter) | |
3835 | { | |
3836 | uint16_t phy_status; | |
3837 | uint16_t phy_ctrl; | |
3838 | ||
3839 | if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || | |
3840 | !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) | |
3841 | return; | |
3842 | ||
3843 | if(adapter->smartspeed == 0) { | |
3844 | /* If Master/Slave config fault is asserted twice, | |
3845 | * we assume back-to-back */ | |
3846 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); | |
3847 | if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; | |
3848 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); | |
3849 | if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; | |
3850 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); | |
3851 | if(phy_ctrl & CR_1000T_MS_ENABLE) { | |
3852 | phy_ctrl &= ~CR_1000T_MS_ENABLE; | |
3853 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, | |
3854 | phy_ctrl); | |
3855 | adapter->smartspeed++; | |
3856 | if(!e1000_phy_setup_autoneg(&adapter->hw) && | |
3857 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, | |
3858 | &phy_ctrl)) { | |
3859 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
3860 | MII_CR_RESTART_AUTO_NEG); | |
3861 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, | |
3862 | phy_ctrl); | |
3863 | } | |
3864 | } | |
3865 | return; | |
3866 | } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { | |
3867 | /* If still no link, perhaps using 2/3 pair cable */ | |
3868 | e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); | |
3869 | phy_ctrl |= CR_1000T_MS_ENABLE; | |
3870 | e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); | |
3871 | if(!e1000_phy_setup_autoneg(&adapter->hw) && | |
3872 | !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { | |
3873 | phy_ctrl |= (MII_CR_AUTO_NEG_EN | | |
3874 | MII_CR_RESTART_AUTO_NEG); | |
3875 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); | |
3876 | } | |
3877 | } | |
3878 | /* Restart process after E1000_SMARTSPEED_MAX iterations */ | |
3879 | if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX) | |
3880 | adapter->smartspeed = 0; | |
3881 | } | |
3882 | ||
3883 | /** | |
3884 | * e1000_ioctl - | |
3885 | * @netdev: | |
3886 | * @ifreq: | |
3887 | * @cmd: | |
3888 | **/ | |
3889 | ||
3890 | static int | |
3891 | e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
3892 | { | |
3893 | switch (cmd) { | |
3894 | case SIOCGMIIPHY: | |
3895 | case SIOCGMIIREG: | |
3896 | case SIOCSMIIREG: | |
3897 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
3898 | default: | |
3899 | return -EOPNOTSUPP; | |
3900 | } | |
3901 | } | |
3902 | ||
3903 | /** | |
3904 | * e1000_mii_ioctl - | |
3905 | * @netdev: | |
3906 | * @ifreq: | |
3907 | * @cmd: | |
3908 | **/ | |
3909 | ||
3910 | static int | |
3911 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
3912 | { | |
60490fe0 | 3913 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
3914 | struct mii_ioctl_data *data = if_mii(ifr); |
3915 | int retval; | |
3916 | uint16_t mii_reg; | |
3917 | uint16_t spddplx; | |
97876fc6 | 3918 | unsigned long flags; |
1da177e4 LT |
3919 | |
3920 | if(adapter->hw.media_type != e1000_media_type_copper) | |
3921 | return -EOPNOTSUPP; | |
3922 | ||
3923 | switch (cmd) { | |
3924 | case SIOCGMIIPHY: | |
3925 | data->phy_id = adapter->hw.phy_addr; | |
3926 | break; | |
3927 | case SIOCGMIIREG: | |
97876fc6 | 3928 | if(!capable(CAP_NET_ADMIN)) |
1da177e4 | 3929 | return -EPERM; |
97876fc6 MC |
3930 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3931 | if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, | |
3932 | &data->val_out)) { | |
3933 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 3934 | return -EIO; |
97876fc6 MC |
3935 | } |
3936 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 LT |
3937 | break; |
3938 | case SIOCSMIIREG: | |
97876fc6 | 3939 | if(!capable(CAP_NET_ADMIN)) |
1da177e4 | 3940 | return -EPERM; |
97876fc6 | 3941 | if(data->reg_num & ~(0x1F)) |
1da177e4 LT |
3942 | return -EFAULT; |
3943 | mii_reg = data->val_in; | |
97876fc6 MC |
3944 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3945 | if(e1000_write_phy_reg(&adapter->hw, data->reg_num, | |
3946 | mii_reg)) { | |
3947 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | |
1da177e4 | 3948 | return -EIO; |
97876fc6 MC |
3949 | } |
3950 | if(adapter->hw.phy_type == e1000_phy_m88) { | |
1da177e4 LT |
3951 | switch (data->reg_num) { |
3952 | case PHY_CTRL: | |
3953 | if(mii_reg & MII_CR_POWER_DOWN) | |
3954 | break; | |
3955 | if(mii_reg & MII_CR_AUTO_NEG_EN) { | |
3956 | adapter->hw.autoneg = 1; | |
3957 | adapter->hw.autoneg_advertised = 0x2F; | |
3958 | } else { | |
3959 | if (mii_reg & 0x40) | |
3960 | spddplx = SPEED_1000; | |
3961 | else if (mii_reg & 0x2000) | |
3962 | spddplx = SPEED_100; | |
3963 | else | |
3964 | spddplx = SPEED_10; | |
3965 | spddplx += (mii_reg & 0x100) | |
3966 | ? FULL_DUPLEX : | |
3967 | HALF_DUPLEX; | |
3968 | retval = e1000_set_spd_dplx(adapter, | |
3969 | spddplx); | |
97876fc6 MC |
3970 | if(retval) { |
3971 | spin_unlock_irqrestore( | |
3972 | &adapter->stats_lock, | |
3973 | flags); | |
1da177e4 | 3974 | return retval; |
97876fc6 | 3975 | } |
1da177e4 LT |
3976 | } |
3977 | if(netif_running(adapter->netdev)) { | |
3978 | e1000_down(adapter); | |
3979 | e1000_up(adapter); | |
3980 | } else | |
3981 | e1000_reset(adapter); | |
3982 | break; | |
3983 | case M88E1000_PHY_SPEC_CTRL: | |
3984 | case M88E1000_EXT_PHY_SPEC_CTRL: | |
97876fc6 MC |
3985 | if(e1000_phy_reset(&adapter->hw)) { |
3986 | spin_unlock_irqrestore( | |
3987 | &adapter->stats_lock, flags); | |
1da177e4 | 3988 | return -EIO; |
97876fc6 | 3989 | } |
1da177e4 LT |
3990 | break; |
3991 | } | |
3992 | } else { | |
3993 | switch (data->reg_num) { | |
3994 | case PHY_CTRL: | |
3995 | if(mii_reg & MII_CR_POWER_DOWN) | |
3996 | break; | |
3997 | if(netif_running(adapter->netdev)) { | |
3998 | e1000_down(adapter); | |
3999 | e1000_up(adapter); | |
4000 | } else | |
4001 | e1000_reset(adapter); | |
4002 | break; | |
4003 | } | |
4004 | } | |
97876fc6 | 4005 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1da177e4 LT |
4006 | break; |
4007 | default: | |
4008 | return -EOPNOTSUPP; | |
4009 | } | |
4010 | return E1000_SUCCESS; | |
4011 | } | |
4012 | ||
4013 | void | |
4014 | e1000_pci_set_mwi(struct e1000_hw *hw) | |
4015 | { | |
4016 | struct e1000_adapter *adapter = hw->back; | |
2648345f | 4017 | int ret_val = pci_set_mwi(adapter->pdev); |
1da177e4 | 4018 | |
2648345f MC |
4019 | if(ret_val) |
4020 | DPRINTK(PROBE, ERR, "Error in setting MWI\n"); | |
1da177e4 LT |
4021 | } |
4022 | ||
4023 | void | |
4024 | e1000_pci_clear_mwi(struct e1000_hw *hw) | |
4025 | { | |
4026 | struct e1000_adapter *adapter = hw->back; | |
4027 | ||
4028 | pci_clear_mwi(adapter->pdev); | |
4029 | } | |
4030 | ||
4031 | void | |
4032 | e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4033 | { | |
4034 | struct e1000_adapter *adapter = hw->back; | |
4035 | ||
4036 | pci_read_config_word(adapter->pdev, reg, value); | |
4037 | } | |
4038 | ||
4039 | void | |
4040 | e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |
4041 | { | |
4042 | struct e1000_adapter *adapter = hw->back; | |
4043 | ||
4044 | pci_write_config_word(adapter->pdev, reg, *value); | |
4045 | } | |
4046 | ||
4047 | uint32_t | |
4048 | e1000_io_read(struct e1000_hw *hw, unsigned long port) | |
4049 | { | |
4050 | return inl(port); | |
4051 | } | |
4052 | ||
4053 | void | |
4054 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | |
4055 | { | |
4056 | outl(value, port); | |
4057 | } | |
4058 | ||
4059 | static void | |
4060 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
4061 | { | |
60490fe0 | 4062 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4063 | uint32_t ctrl, rctl; |
4064 | ||
4065 | e1000_irq_disable(adapter); | |
4066 | adapter->vlgrp = grp; | |
4067 | ||
4068 | if(grp) { | |
4069 | /* enable VLAN tag insert/strip */ | |
4070 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4071 | ctrl |= E1000_CTRL_VME; | |
4072 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4073 | ||
4074 | /* enable VLAN receive filtering */ | |
4075 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4076 | rctl |= E1000_RCTL_VFE; | |
4077 | rctl &= ~E1000_RCTL_CFIEN; | |
4078 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2d7edb92 | 4079 | e1000_update_mng_vlan(adapter); |
1da177e4 LT |
4080 | } else { |
4081 | /* disable VLAN tag insert/strip */ | |
4082 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4083 | ctrl &= ~E1000_CTRL_VME; | |
4084 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4085 | ||
4086 | /* disable VLAN filtering */ | |
4087 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4088 | rctl &= ~E1000_RCTL_VFE; | |
4089 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2d7edb92 MC |
4090 | if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) { |
4091 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
4092 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
4093 | } | |
1da177e4 LT |
4094 | } |
4095 | ||
4096 | e1000_irq_enable(adapter); | |
4097 | } | |
4098 | ||
4099 | static void | |
4100 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |
4101 | { | |
60490fe0 | 4102 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 4103 | uint32_t vfta, index; |
2d7edb92 MC |
4104 | if((adapter->hw.mng_cookie.status & |
4105 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
4106 | (vid == adapter->mng_vlan_id)) | |
4107 | return; | |
1da177e4 LT |
4108 | /* add VID to filter table */ |
4109 | index = (vid >> 5) & 0x7F; | |
4110 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4111 | vfta |= (1 << (vid & 0x1F)); | |
4112 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4113 | } | |
4114 | ||
4115 | static void | |
4116 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | |
4117 | { | |
60490fe0 | 4118 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4119 | uint32_t vfta, index; |
4120 | ||
4121 | e1000_irq_disable(adapter); | |
4122 | ||
4123 | if(adapter->vlgrp) | |
4124 | adapter->vlgrp->vlan_devices[vid] = NULL; | |
4125 | ||
4126 | e1000_irq_enable(adapter); | |
4127 | ||
2d7edb92 MC |
4128 | if((adapter->hw.mng_cookie.status & |
4129 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | |
4130 | (vid == adapter->mng_vlan_id)) | |
4131 | return; | |
1da177e4 LT |
4132 | /* remove VID from filter table */ |
4133 | index = (vid >> 5) & 0x7F; | |
4134 | vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
4135 | vfta &= ~(1 << (vid & 0x1F)); | |
4136 | e1000_write_vfta(&adapter->hw, index, vfta); | |
4137 | } | |
4138 | ||
4139 | static void | |
4140 | e1000_restore_vlan(struct e1000_adapter *adapter) | |
4141 | { | |
4142 | e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
4143 | ||
4144 | if(adapter->vlgrp) { | |
4145 | uint16_t vid; | |
4146 | for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { | |
4147 | if(!adapter->vlgrp->vlan_devices[vid]) | |
4148 | continue; | |
4149 | e1000_vlan_rx_add_vid(adapter->netdev, vid); | |
4150 | } | |
4151 | } | |
4152 | } | |
4153 | ||
4154 | int | |
4155 | e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) | |
4156 | { | |
4157 | adapter->hw.autoneg = 0; | |
4158 | ||
6921368f MC |
4159 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
4160 | if((adapter->hw.media_type == e1000_media_type_fiber) && | |
4161 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { | |
4162 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); | |
4163 | return -EINVAL; | |
4164 | } | |
4165 | ||
1da177e4 LT |
4166 | switch(spddplx) { |
4167 | case SPEED_10 + DUPLEX_HALF: | |
4168 | adapter->hw.forced_speed_duplex = e1000_10_half; | |
4169 | break; | |
4170 | case SPEED_10 + DUPLEX_FULL: | |
4171 | adapter->hw.forced_speed_duplex = e1000_10_full; | |
4172 | break; | |
4173 | case SPEED_100 + DUPLEX_HALF: | |
4174 | adapter->hw.forced_speed_duplex = e1000_100_half; | |
4175 | break; | |
4176 | case SPEED_100 + DUPLEX_FULL: | |
4177 | adapter->hw.forced_speed_duplex = e1000_100_full; | |
4178 | break; | |
4179 | case SPEED_1000 + DUPLEX_FULL: | |
4180 | adapter->hw.autoneg = 1; | |
4181 | adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; | |
4182 | break; | |
4183 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
4184 | default: | |
2648345f | 4185 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); |
1da177e4 LT |
4186 | return -EINVAL; |
4187 | } | |
4188 | return 0; | |
4189 | } | |
4190 | ||
1da177e4 | 4191 | static int |
829ca9a3 | 4192 | e1000_suspend(struct pci_dev *pdev, pm_message_t state) |
1da177e4 LT |
4193 | { |
4194 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4195 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2d7edb92 | 4196 | uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm; |
1da177e4 LT |
4197 | uint32_t wufc = adapter->wol; |
4198 | ||
4199 | netif_device_detach(netdev); | |
4200 | ||
4201 | if(netif_running(netdev)) | |
4202 | e1000_down(adapter); | |
4203 | ||
4204 | status = E1000_READ_REG(&adapter->hw, STATUS); | |
4205 | if(status & E1000_STATUS_LU) | |
4206 | wufc &= ~E1000_WUFC_LNKC; | |
4207 | ||
4208 | if(wufc) { | |
4209 | e1000_setup_rctl(adapter); | |
4210 | e1000_set_multi(netdev); | |
4211 | ||
4212 | /* turn on all-multi mode if wake on multicast is enabled */ | |
4213 | if(adapter->wol & E1000_WUFC_MC) { | |
4214 | rctl = E1000_READ_REG(&adapter->hw, RCTL); | |
4215 | rctl |= E1000_RCTL_MPE; | |
4216 | E1000_WRITE_REG(&adapter->hw, RCTL, rctl); | |
4217 | } | |
4218 | ||
4219 | if(adapter->hw.mac_type >= e1000_82540) { | |
4220 | ctrl = E1000_READ_REG(&adapter->hw, CTRL); | |
4221 | /* advertise wake from D3Cold */ | |
4222 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
4223 | /* phy power management enable */ | |
4224 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
4225 | ctrl |= E1000_CTRL_ADVD3WUC | | |
4226 | E1000_CTRL_EN_PHY_PWR_MGMT; | |
4227 | E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); | |
4228 | } | |
4229 | ||
4230 | if(adapter->hw.media_type == e1000_media_type_fiber || | |
4231 | adapter->hw.media_type == e1000_media_type_internal_serdes) { | |
4232 | /* keep the laser running in D3 */ | |
4233 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
4234 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | |
4235 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); | |
4236 | } | |
4237 | ||
2d7edb92 MC |
4238 | /* Allow time for pending master requests to run */ |
4239 | e1000_disable_pciex_master(&adapter->hw); | |
4240 | ||
1da177e4 LT |
4241 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); |
4242 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); | |
4243 | pci_enable_wake(pdev, 3, 1); | |
4244 | pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */ | |
4245 | } else { | |
4246 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | |
4247 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); | |
4248 | pci_enable_wake(pdev, 3, 0); | |
4249 | pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */ | |
4250 | } | |
4251 | ||
4252 | pci_save_state(pdev); | |
4253 | ||
4254 | if(adapter->hw.mac_type >= e1000_82540 && | |
4255 | adapter->hw.media_type == e1000_media_type_copper) { | |
4256 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4257 | if(manc & E1000_MANC_SMBUS_EN) { | |
4258 | manc |= E1000_MANC_ARP_EN; | |
4259 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4260 | pci_enable_wake(pdev, 3, 1); | |
4261 | pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */ | |
4262 | } | |
4263 | } | |
4264 | ||
2d7edb92 | 4265 | switch(adapter->hw.mac_type) { |
868d5309 MC |
4266 | case e1000_82571: |
4267 | case e1000_82572: | |
4268 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
4269 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
4270 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
4271 | break; | |
2d7edb92 MC |
4272 | case e1000_82573: |
4273 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
4274 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
4275 | swsm & ~E1000_SWSM_DRV_LOAD); | |
4276 | break; | |
4277 | default: | |
4278 | break; | |
4279 | } | |
4280 | ||
1da177e4 | 4281 | pci_disable_device(pdev); |
829ca9a3 | 4282 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
1da177e4 LT |
4283 | |
4284 | return 0; | |
4285 | } | |
4286 | ||
4287 | #ifdef CONFIG_PM | |
4288 | static int | |
4289 | e1000_resume(struct pci_dev *pdev) | |
4290 | { | |
4291 | struct net_device *netdev = pci_get_drvdata(pdev); | |
60490fe0 | 4292 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2b02893e | 4293 | uint32_t manc, ret_val, swsm; |
868d5309 | 4294 | uint32_t ctrl_ext; |
1da177e4 | 4295 | |
829ca9a3 | 4296 | pci_set_power_state(pdev, PCI_D0); |
1da177e4 | 4297 | pci_restore_state(pdev); |
2b02893e | 4298 | ret_val = pci_enable_device(pdev); |
a4cb847d | 4299 | pci_set_master(pdev); |
1da177e4 | 4300 | |
829ca9a3 PM |
4301 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4302 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1da177e4 LT |
4303 | |
4304 | e1000_reset(adapter); | |
4305 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | |
4306 | ||
4307 | if(netif_running(netdev)) | |
4308 | e1000_up(adapter); | |
4309 | ||
4310 | netif_device_attach(netdev); | |
4311 | ||
4312 | if(adapter->hw.mac_type >= e1000_82540 && | |
4313 | adapter->hw.media_type == e1000_media_type_copper) { | |
4314 | manc = E1000_READ_REG(&adapter->hw, MANC); | |
4315 | manc &= ~(E1000_MANC_ARP_EN); | |
4316 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | |
4317 | } | |
4318 | ||
2d7edb92 | 4319 | switch(adapter->hw.mac_type) { |
868d5309 MC |
4320 | case e1000_82571: |
4321 | case e1000_82572: | |
4322 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | |
4323 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | |
4324 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
4325 | break; | |
2d7edb92 MC |
4326 | case e1000_82573: |
4327 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | |
4328 | E1000_WRITE_REG(&adapter->hw, SWSM, | |
4329 | swsm | E1000_SWSM_DRV_LOAD); | |
4330 | break; | |
4331 | default: | |
4332 | break; | |
4333 | } | |
4334 | ||
1da177e4 LT |
4335 | return 0; |
4336 | } | |
4337 | #endif | |
1da177e4 LT |
4338 | #ifdef CONFIG_NET_POLL_CONTROLLER |
4339 | /* | |
4340 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
4341 | * without having to re-enable interrupts. It's not called while | |
4342 | * the interrupt routine is executing. | |
4343 | */ | |
4344 | static void | |
2648345f | 4345 | e1000_netpoll(struct net_device *netdev) |
1da177e4 | 4346 | { |
60490fe0 | 4347 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
4348 | disable_irq(adapter->pdev->irq); |
4349 | e1000_intr(adapter->pdev->irq, netdev, NULL); | |
6b0b3157 | 4350 | e1000_clean_tx_irq(adapter); |
1da177e4 LT |
4351 | enable_irq(adapter->pdev->irq); |
4352 | } | |
4353 | #endif | |
4354 | ||
4355 | /* e1000_main.c */ |