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ixgbe: fix build error with FCOE_CONFIG without DCB_CONFIG
[deliverable/linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
451152d9 4 Copyright(c) 1999 - 2010 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
57#define DRV_VERSION "1.2.7" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* RX Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* TX Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
174
175/*
176 * e1000e_dump - Print registers, tx-ring and rx-ring
177 */
178static void e1000e_dump(struct e1000_adapter *adapter)
179{
180 struct net_device *netdev = adapter->netdev;
181 struct e1000_hw *hw = &adapter->hw;
182 struct e1000_reg_info *reginfo;
183 struct e1000_ring *tx_ring = adapter->tx_ring;
184 struct e1000_tx_desc *tx_desc;
185 struct my_u0 { u64 a; u64 b; } *u0;
186 struct e1000_buffer *buffer_info;
187 struct e1000_ring *rx_ring = adapter->rx_ring;
188 union e1000_rx_desc_packet_split *rx_desc_ps;
189 struct e1000_rx_desc *rx_desc;
190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
191 u32 staterr;
192 int i = 0;
193
194 if (!netif_msg_hw(adapter))
195 return;
196
197 /* Print netdevice Info */
198 if (netdev) {
199 dev_info(&adapter->pdev->dev, "Net device Info\n");
200 printk(KERN_INFO "Device Name state "
201 "trans_start last_rx\n");
202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
203 netdev->name,
204 netdev->state,
205 netdev->trans_start,
206 netdev->last_rx);
207 }
208
209 /* Print Registers */
210 dev_info(&adapter->pdev->dev, "Register Dump\n");
211 printk(KERN_INFO " Register Name Value\n");
212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
213 reginfo->name; reginfo++) {
214 e1000_regdump(hw, reginfo);
215 }
216
217 /* Print TX Ring Summary */
218 if (!netdev || !netif_running(netdev))
219 goto exit;
220
221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
223 " leng ntw timestamp\n");
224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
226 0, tx_ring->next_to_use, tx_ring->next_to_clean,
8eb64e6b 227 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 228 buffer_info->length,
229 buffer_info->next_to_watch,
8eb64e6b 230 (unsigned long long)buffer_info->time_stamp);
84f4ee90
TI		 231
232 /* Print TX Rings */
233 if (!netif_msg_tx_done(adapter))
234 goto rx_ring_summary;
235
236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
237
238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
239 *
240 * Legacy Transmit Descriptor
241 * +--------------------------------------------------------------+
242 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
243 * +--------------------------------------------------------------+
244 * 8 | Special | CSS | Status | CMD | CSO | Length |
245 * +--------------------------------------------------------------+
246 * 63 48 47 36 35 32 31 24 23 16 15 0
247 *
248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
249 * 63 48 47 40 39 32 31 16 15 8 7 0
250 * +----------------------------------------------------------------+
251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
252 * +----------------------------------------------------------------+
253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
254 * +----------------------------------------------------------------+
255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
256 *
257 * Extended Data Descriptor (DTYP=0x1)
258 * +----------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] |
260 * +----------------------------------------------------------------+
261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 */
265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Legacy format\n");
268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Context format\n");
271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
272 " [bi->dma ] leng ntw timestamp bi->skb "
273 "<-- Ext Data format\n");
274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
275 tx_desc = E1000_TX_DESC(*tx_ring, i);
276 buffer_info = &tx_ring->buffer_info[i];
277 u0 = (struct my_u0 *)tx_desc;
278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
279 "%04X %3X %016llX %p",
280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 282 (unsigned long long)le64_to_cpu(u0->a),
283 (unsigned long long)le64_to_cpu(u0->b),
284 (unsigned long long)buffer_info->dma,
285 buffer_info->length, buffer_info->next_to_watch,
286 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 287 buffer_info->skb);
288 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
289 printk(KERN_CONT " NTC/U\n");
290 else if (i == tx_ring->next_to_use)
291 printk(KERN_CONT " NTU\n");
292 else if (i == tx_ring->next_to_clean)
293 printk(KERN_CONT " NTC\n");
294 else
295 printk(KERN_CONT "\n");
296
297 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
299 16, 1, phys_to_virt(buffer_info->dma),
300 buffer_info->length, true);
301 }
302
303 /* Print RX Rings Summary */
304rx_ring_summary:
305 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
306 printk(KERN_INFO "Queue [NTU] [NTC]\n");
307 printk(KERN_INFO " %5d %5X %5X\n", 0,
308 rx_ring->next_to_use, rx_ring->next_to_clean);
309
310 /* Print RX Rings */
311 if (!netif_msg_rx_status(adapter))
312 goto exit;
313
314 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
315 switch (adapter->rx_ps_pages) {
316 case 1:
317 case 2:
318 case 3:
319 /* [Extended] Packet Split Receive Descriptor Format
320 *
321 * +-----------------------------------------------------+
322 * 0 | Buffer Address 0 [63:0] |
323 * +-----------------------------------------------------+
324 * 8 | Buffer Address 1 [63:0] |
325 * +-----------------------------------------------------+
326 * 16 | Buffer Address 2 [63:0] |
327 * +-----------------------------------------------------+
328 * 24 | Buffer Address 3 [63:0] |
329 * +-----------------------------------------------------+
330 */
331 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
332 "[buffer 1 63:0 ] "
333 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
334 "[bi->skb] <-- Ext Pkt Split format\n");
335 /* [Extended] Receive Descriptor (Write-Back) Format
336 *
337 * 63 48 47 32 31 13 12 8 7 4 3 0
338 * +------------------------------------------------------+
339 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
340 * | Checksum | Ident | | Queue | | Type |
341 * +------------------------------------------------------+
342 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
343 * +------------------------------------------------------+
344 * 63 48 47 32 31 20 19 0
345 */
346 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
347 "[vl l0 ee es] "
348 "[ l3 l2 l1 hs] [reserved ] ---------------- "
349 "[bi->skb] <-- Ext Rx Write-Back format\n");
350 for (i = 0; i < rx_ring->count; i++) {
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356 if (staterr & E1000_RXD_STAT_DD) {
357 /* Descriptor Done */
358 printk(KERN_INFO "RWB[0x%03X] %016llX "
359 "%016llX %016llX %016llX "
360 "---------------- %p", i,
8eb64e6b
BA		 361 (unsigned long long)le64_to_cpu(u1->a),
362 (unsigned long long)le64_to_cpu(u1->b),
363 (unsigned long long)le64_to_cpu(u1->c),
364 (unsigned long long)le64_to_cpu(u1->d),
84f4ee90
TI		 365 buffer_info->skb);
366 } else {
367 printk(KERN_INFO "R [0x%03X] %016llX "
368 "%016llX %016llX %016llX %016llX %p", i,
8eb64e6b
BA		 369 (unsigned long long)le64_to_cpu(u1->a),
370 (unsigned long long)le64_to_cpu(u1->b),
371 (unsigned long long)le64_to_cpu(u1->c),
372 (unsigned long long)le64_to_cpu(u1->d),
373 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 374 buffer_info->skb);
375
376 if (netif_msg_pktdata(adapter))
377 print_hex_dump(KERN_INFO, "",
378 DUMP_PREFIX_ADDRESS, 16, 1,
379 phys_to_virt(buffer_info->dma),
380 adapter->rx_ps_bsize0, true);
381 }
382
383 if (i == rx_ring->next_to_use)
384 printk(KERN_CONT " NTU\n");
385 else if (i == rx_ring->next_to_clean)
386 printk(KERN_CONT " NTC\n");
387 else
388 printk(KERN_CONT "\n");
389 }
390 break;
391 default:
392 case 0:
393 /* Legacy Receive Descriptor Format
394 *
395 * +-----------------------------------------------------+
396 * | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
399 * +-----------------------------------------------------+
400 * 63 48 47 40 39 32 31 16 15 0
401 */
402 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
403 "[vl er S cks ln] [bi->dma ] [bi->skb] "
404 "<-- Legacy format\n");
405 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 buffer_info = &rx_ring->buffer_info[i];
408 u0 = (struct my_u0 *)rx_desc;
409 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
8eb64e6b
BA		 410 "%016llX %p", i,
411 (unsigned long long)le64_to_cpu(u0->a),
412 (unsigned long long)le64_to_cpu(u0->b),
413 (unsigned long long)buffer_info->dma,
414 buffer_info->skb);
84f4ee90
TI		 415 if (i == rx_ring->next_to_use)
416 printk(KERN_CONT " NTU\n");
417 else if (i == rx_ring->next_to_clean)
418 printk(KERN_CONT " NTC\n");
419 else
420 printk(KERN_CONT "\n");
421
422 if (netif_msg_pktdata(adapter))
423 print_hex_dump(KERN_INFO, "",
424 DUMP_PREFIX_ADDRESS,
425 16, 1, phys_to_virt(buffer_info->dma),
426 adapter->rx_buffer_len, true);
427 }
428 }
429
430exit:
431 return;
432}
433
bc7f75fa
AK		 434/**
435 * e1000_desc_unused - calculate if we have unused descriptors
436 **/
437static int e1000_desc_unused(struct e1000_ring *ring)
438{
439 if (ring->next_to_clean > ring->next_to_use)
440 return ring->next_to_clean - ring->next_to_use - 1;
441
442 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
443}
444
445/**
ad68076e 446 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 447 * @adapter: board private structure
448 * @status: descriptor status field as written by hardware
449 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
450 * @skb: pointer to sk_buff to be indicated to stack
451 **/
452static void e1000_receive_skb(struct e1000_adapter *adapter,
453 struct net_device *netdev,
454 struct sk_buff *skb,
a39fe742 455 u8 status, __le16 vlan)
bc7f75fa
AK		 456{
457 skb->protocol = eth_type_trans(skb, netdev);
458
459 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 460 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
461 le16_to_cpu(vlan), skb);
bc7f75fa 462 else
89c88b16 463 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 464}
465
466/**
467 * e1000_rx_checksum - Receive Checksum Offload for 82543
468 * @adapter: board private structure
469 * @status_err: receive descriptor status and error fields
470 * @csum: receive descriptor csum field
471 * @sk_buff: socket buffer with received data
472 **/
473static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
474 u32 csum, struct sk_buff *skb)
475{
476 u16 status = (u16)status_err;
477 u8 errors = (u8)(status_err >> 24);
478 skb->ip_summed = CHECKSUM_NONE;
479
480 /* Ignore Checksum bit is set */
481 if (status & E1000_RXD_STAT_IXSM)
482 return;
483 /* TCP/UDP checksum error bit is set */
484 if (errors & E1000_RXD_ERR_TCPE) {
485 /* let the stack verify checksum errors */
486 adapter->hw_csum_err++;
487 return;
488 }
489
490 /* TCP/UDP Checksum has not been calculated */
491 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
492 return;
493
494 /* It must be a TCP or UDP packet with a valid checksum */
495 if (status & E1000_RXD_STAT_TCPCS) {
496 /* TCP checksum is good */
497 skb->ip_summed = CHECKSUM_UNNECESSARY;
498 } else {
ad68076e
BA		 499 /*
500 * IP fragment with UDP payload
501 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 502 * and then put the value in host order for further stack use.
503 */
a39fe742
AV		 504 __sum16 sum = (__force __sum16)htons(csum);
505 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 506 skb->ip_summed = CHECKSUM_COMPLETE;
507 }
508 adapter->hw_csum_good++;
509}
510
511/**
512 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
513 * @adapter: address of board private structure
514 **/
515static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
516 int cleaned_count)
517{
518 struct net_device *netdev = adapter->netdev;
519 struct pci_dev *pdev = adapter->pdev;
520 struct e1000_ring *rx_ring = adapter->rx_ring;
521 struct e1000_rx_desc *rx_desc;
522 struct e1000_buffer *buffer_info;
523 struct sk_buff *skb;
524 unsigned int i;
89d71a66 525 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 526
527 i = rx_ring->next_to_use;
528 buffer_info = &rx_ring->buffer_info[i];
529
530 while (cleaned_count--) {
531 skb = buffer_info->skb;
532 if (skb) {
533 skb_trim(skb, 0);
534 goto map_skb;
535 }
536
89d71a66 537 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 538 if (!skb) {
539 /* Better luck next round */
540 adapter->alloc_rx_buff_failed++;
541 break;
542 }
543
bc7f75fa
AK		 544 buffer_info->skb = skb;
545map_skb:
0be3f55f 546 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 547 adapter->rx_buffer_len,
0be3f55f
NN		 548 DMA_FROM_DEVICE);
549 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 550 dev_err(&pdev->dev, "RX DMA map failed\n");
551 adapter->rx_dma_failed++;
552 break;
553 }
554
555 rx_desc = E1000_RX_DESC(*rx_ring, i);
556 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
557
50849d79
TH		 558 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
559 /*
560 * Force memory writes to complete before letting h/w
561 * know there are new descriptors to fetch. (Only
562 * applicable for weak-ordered memory model archs,
563 * such as IA-64).
564 */
565 wmb();
566 writel(i, adapter->hw.hw_addr + rx_ring->tail);
567 }
bc7f75fa
AK		 568 i++;
569 if (i == rx_ring->count)
570 i = 0;
571 buffer_info = &rx_ring->buffer_info[i];
572 }
573
50849d79 574 rx_ring->next_to_use = i;
bc7f75fa
AK		 575}
576
577/**
578 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
579 * @adapter: address of board private structure
580 **/
581static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
582 int cleaned_count)
583{
584 struct net_device *netdev = adapter->netdev;
585 struct pci_dev *pdev = adapter->pdev;
586 union e1000_rx_desc_packet_split *rx_desc;
587 struct e1000_ring *rx_ring = adapter->rx_ring;
588 struct e1000_buffer *buffer_info;
589 struct e1000_ps_page *ps_page;
590 struct sk_buff *skb;
591 unsigned int i, j;
592
593 i = rx_ring->next_to_use;
594 buffer_info = &rx_ring->buffer_info[i];
595
596 while (cleaned_count--) {
597 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
598
599 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 600 ps_page = &buffer_info->ps_pages[j];
601 if (j >= adapter->rx_ps_pages) {
602 /* all unused desc entries get hw null ptr */
a39fe742 603 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 604 continue;
605 }
606 if (!ps_page->page) {
607 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 608 if (!ps_page->page) {
47f44e40
AK		 609 adapter->alloc_rx_buff_failed++;
610 goto no_buffers;
611 }
0be3f55f
NN		 612 ps_page->dma = dma_map_page(&pdev->dev,
613 ps_page->page,
614 0, PAGE_SIZE,
615 DMA_FROM_DEVICE);
616 if (dma_mapping_error(&pdev->dev,
617 ps_page->dma)) {
47f44e40
AK		 618 dev_err(&adapter->pdev->dev,
619 "RX DMA page map failed\n");
620 adapter->rx_dma_failed++;
621 goto no_buffers;
bc7f75fa 622 }
bc7f75fa 623 }
47f44e40
AK		 624 /*
625 * Refresh the desc even if buffer_addrs
626 * didn't change because each write-back
627 * erases this info.
628 */
629 rx_desc->read.buffer_addr[j+1] =
630 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 631 }
632
89d71a66
ED		 633 skb = netdev_alloc_skb_ip_align(netdev,
634 adapter->rx_ps_bsize0);
bc7f75fa
AK		 635
636 if (!skb) {
637 adapter->alloc_rx_buff_failed++;
638 break;
639 }
640
bc7f75fa 641 buffer_info->skb = skb;
0be3f55f 642 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 643 adapter->rx_ps_bsize0,
0be3f55f
NN		 644 DMA_FROM_DEVICE);
645 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 646 dev_err(&pdev->dev, "RX DMA map failed\n");
647 adapter->rx_dma_failed++;
648 /* cleanup skb */
649 dev_kfree_skb_any(skb);
650 buffer_info->skb = NULL;
651 break;
652 }
653
654 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
655
50849d79
TH		 656 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
657 /*
658 * Force memory writes to complete before letting h/w
659 * know there are new descriptors to fetch. (Only
660 * applicable for weak-ordered memory model archs,
661 * such as IA-64).
662 */
663 wmb();
664 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
665 }
666
bc7f75fa
AK		 667 i++;
668 if (i == rx_ring->count)
669 i = 0;
670 buffer_info = &rx_ring->buffer_info[i];
671 }
672
673no_buffers:
50849d79 674 rx_ring->next_to_use = i;
bc7f75fa
AK		 675}
676
97ac8cae
BA		 677/**
678 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
679 * @adapter: address of board private structure
97ac8cae
BA		 680 * @cleaned_count: number of buffers to allocate this pass
681 **/
682
683static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
684 int cleaned_count)
685{
686 struct net_device *netdev = adapter->netdev;
687 struct pci_dev *pdev = adapter->pdev;
688 struct e1000_rx_desc *rx_desc;
689 struct e1000_ring *rx_ring = adapter->rx_ring;
690 struct e1000_buffer *buffer_info;
691 struct sk_buff *skb;
692 unsigned int i;
89d71a66 693 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 694
695 i = rx_ring->next_to_use;
696 buffer_info = &rx_ring->buffer_info[i];
697
698 while (cleaned_count--) {
699 skb = buffer_info->skb;
700 if (skb) {
701 skb_trim(skb, 0);
702 goto check_page;
703 }
704
89d71a66 705 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 706 if (unlikely(!skb)) {
707 /* Better luck next round */
708 adapter->alloc_rx_buff_failed++;
709 break;
710 }
711
97ac8cae
BA		 712 buffer_info->skb = skb;
713check_page:
714 /* allocate a new page if necessary */
715 if (!buffer_info->page) {
716 buffer_info->page = alloc_page(GFP_ATOMIC);
717 if (unlikely(!buffer_info->page)) {
718 adapter->alloc_rx_buff_failed++;
719 break;
720 }
721 }
722
723 if (!buffer_info->dma)
0be3f55f 724 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 725 buffer_info->page, 0,
726 PAGE_SIZE,
0be3f55f 727 DMA_FROM_DEVICE);
97ac8cae
BA		 728
729 rx_desc = E1000_RX_DESC(*rx_ring, i);
730 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
731
732 if (unlikely(++i == rx_ring->count))
733 i = 0;
734 buffer_info = &rx_ring->buffer_info[i];
735 }
736
737 if (likely(rx_ring->next_to_use != i)) {
738 rx_ring->next_to_use = i;
739 if (unlikely(i-- == 0))
740 i = (rx_ring->count - 1);
741
742 /* Force memory writes to complete before letting h/w
743 * know there are new descriptors to fetch. (Only
744 * applicable for weak-ordered memory model archs,
745 * such as IA-64). */
746 wmb();
747 writel(i, adapter->hw.hw_addr + rx_ring->tail);
748 }
749}
750
bc7f75fa
AK		 751/**
752 * e1000_clean_rx_irq - Send received data up the network stack; legacy
753 * @adapter: board private structure
754 *
755 * the return value indicates whether actual cleaning was done, there
756 * is no guarantee that everything was cleaned
757 **/
758static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
759 int *work_done, int work_to_do)
760{
761 struct net_device *netdev = adapter->netdev;
762 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 763 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 764 struct e1000_ring *rx_ring = adapter->rx_ring;
765 struct e1000_rx_desc *rx_desc, *next_rxd;
766 struct e1000_buffer *buffer_info, *next_buffer;
767 u32 length;
768 unsigned int i;
769 int cleaned_count = 0;
770 bool cleaned = 0;
771 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
772
773 i = rx_ring->next_to_clean;
774 rx_desc = E1000_RX_DESC(*rx_ring, i);
775 buffer_info = &rx_ring->buffer_info[i];
776
777 while (rx_desc->status & E1000_RXD_STAT_DD) {
778 struct sk_buff *skb;
779 u8 status;
780
781 if (*work_done >= work_to_do)
782 break;
783 (*work_done)++;
784
785 status = rx_desc->status;
786 skb = buffer_info->skb;
787 buffer_info->skb = NULL;
788
789 prefetch(skb->data - NET_IP_ALIGN);
790
791 i++;
792 if (i == rx_ring->count)
793 i = 0;
794 next_rxd = E1000_RX_DESC(*rx_ring, i);
795 prefetch(next_rxd);
796
797 next_buffer = &rx_ring->buffer_info[i];
798
799 cleaned = 1;
800 cleaned_count++;
0be3f55f 801 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 802 buffer_info->dma,
803 adapter->rx_buffer_len,
0be3f55f 804 DMA_FROM_DEVICE);
bc7f75fa
AK		 805 buffer_info->dma = 0;
806
807 length = le16_to_cpu(rx_desc->length);
808
b94b5028
JB		 809 /*
810 * !EOP means multiple descriptors were used to store a single
811 * packet, if that's the case we need to toss it. In fact, we
812 * need to toss every packet with the EOP bit clear and the
813 * next frame that _does_ have the EOP bit set, as it is by
814 * definition only a frame fragment
815 */
816 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
817 adapter->flags2 |= FLAG2_IS_DISCARDING;
818
819 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 820 /* All receives must fit into a single buffer */
3bb99fe2 821 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 822 /* recycle */
823 buffer_info->skb = skb;
b94b5028
JB		 824 if (status & E1000_RXD_STAT_EOP)
825 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 826 goto next_desc;
827 }
828
829 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
830 /* recycle */
831 buffer_info->skb = skb;
832 goto next_desc;
833 }
834
eb7c3adb
JK		 835 /* adjust length to remove Ethernet CRC */
836 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
837 length -= 4;
838
bc7f75fa
AK		 839 total_rx_bytes += length;
840 total_rx_packets++;
841
ad68076e
BA		 842 /*
843 * code added for copybreak, this should improve
bc7f75fa 844 * performance for small packets with large amounts
ad68076e
BA		 845 * of reassembly being done in the stack
846 */
bc7f75fa
AK		 847 if (length < copybreak) {
848 struct sk_buff *new_skb =
89d71a66 849 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 850 if (new_skb) {
808ff676
BA		 851 skb_copy_to_linear_data_offset(new_skb,
852 -NET_IP_ALIGN,
853 (skb->data -
854 NET_IP_ALIGN),
855 (length +
856 NET_IP_ALIGN));
bc7f75fa
AK		 857 /* save the skb in buffer_info as good */
858 buffer_info->skb = skb;
859 skb = new_skb;
860 }
861 /* else just continue with the old one */
862 }
863 /* end copybreak code */
864 skb_put(skb, length);
865
866 /* Receive Checksum Offload */
867 e1000_rx_checksum(adapter,
868 (u32)(status) |
869 ((u32)(rx_desc->errors) << 24),
870 le16_to_cpu(rx_desc->csum), skb);
871
872 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
873
874next_desc:
875 rx_desc->status = 0;
876
877 /* return some buffers to hardware, one at a time is too slow */
878 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
879 adapter->alloc_rx_buf(adapter, cleaned_count);
880 cleaned_count = 0;
881 }
882
883 /* use prefetched values */
884 rx_desc = next_rxd;
885 buffer_info = next_buffer;
886 }
887 rx_ring->next_to_clean = i;
888
889 cleaned_count = e1000_desc_unused(rx_ring);
890 if (cleaned_count)
891 adapter->alloc_rx_buf(adapter, cleaned_count);
892
bc7f75fa 893 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 894 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 895 netdev->stats.rx_bytes += total_rx_bytes;
896 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 897 return cleaned;
898}
899
bc7f75fa
AK		 900static void e1000_put_txbuf(struct e1000_adapter *adapter,
901 struct e1000_buffer *buffer_info)
902{
03b1320d
AD		 903 if (buffer_info->dma) {
904 if (buffer_info->mapped_as_page)
0be3f55f
NN		 905 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
906 buffer_info->length, DMA_TO_DEVICE);
03b1320d 907 else
0be3f55f
NN		 908 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
909 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 910 buffer_info->dma = 0;
911 }
bc7f75fa
AK		 912 if (buffer_info->skb) {
913 dev_kfree_skb_any(buffer_info->skb);
914 buffer_info->skb = NULL;
915 }
1b7719c4 916 buffer_info->time_stamp = 0;
bc7f75fa
AK		 917}
918
41cec6f1 919static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 920{
41cec6f1
BA		 921 struct e1000_adapter *adapter = container_of(work,
922 struct e1000_adapter,
923 print_hang_task);
bc7f75fa
AK		 924 struct e1000_ring *tx_ring = adapter->tx_ring;
925 unsigned int i = tx_ring->next_to_clean;
926 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
927 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 928 struct e1000_hw *hw = &adapter->hw;
929 u16 phy_status, phy_1000t_status, phy_ext_status;
930 u16 pci_status;
931
932 e1e_rphy(hw, PHY_STATUS, &phy_status);
933 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
934 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 935
41cec6f1
BA		 936 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
937
938 /* detected Hardware unit hang */
939 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 940 " TDH <%x>\n"
941 " TDT <%x>\n"
942 " next_to_use <%x>\n"
943 " next_to_clean <%x>\n"
944 "buffer_info[next_to_clean]:\n"
945 " time_stamp <%lx>\n"
946 " next_to_watch <%x>\n"
947 " jiffies <%lx>\n"
41cec6f1
BA		 948 " next_to_watch.status <%x>\n"
949 "MAC Status <%x>\n"
950 "PHY Status <%x>\n"
951 "PHY 1000BASE-T Status <%x>\n"
952 "PHY Extended Status <%x>\n"
953 "PCI Status <%x>\n",
44defeb3
JK		 954 readl(adapter->hw.hw_addr + tx_ring->head),
955 readl(adapter->hw.hw_addr + tx_ring->tail),
956 tx_ring->next_to_use,
957 tx_ring->next_to_clean,
958 tx_ring->buffer_info[eop].time_stamp,
959 eop,
960 jiffies,
41cec6f1
BA		 961 eop_desc->upper.fields.status,
962 er32(STATUS),
963 phy_status,
964 phy_1000t_status,
965 phy_ext_status,
966 pci_status);
bc7f75fa
AK		 967}
968
969/**
970 * e1000_clean_tx_irq - Reclaim resources after transmit completes
971 * @adapter: board private structure
972 *
973 * the return value indicates whether actual cleaning was done, there
974 * is no guarantee that everything was cleaned
975 **/
976static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
977{
978 struct net_device *netdev = adapter->netdev;
979 struct e1000_hw *hw = &adapter->hw;
980 struct e1000_ring *tx_ring = adapter->tx_ring;
981 struct e1000_tx_desc *tx_desc, *eop_desc;
982 struct e1000_buffer *buffer_info;
983 unsigned int i, eop;
984 unsigned int count = 0;
bc7f75fa
AK		 985 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
986
987 i = tx_ring->next_to_clean;
988 eop = tx_ring->buffer_info[i].next_to_watch;
989 eop_desc = E1000_TX_DESC(*tx_ring, eop);
990
12d04a3c
AD		 991 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
992 (count < tx_ring->count)) {
a86043c2
JB		 993 bool cleaned = false;
994 for (; !cleaned; count++) {
bc7f75fa
AK		 995 tx_desc = E1000_TX_DESC(*tx_ring, i);
996 buffer_info = &tx_ring->buffer_info[i];
997 cleaned = (i == eop);
998
999 if (cleaned) {
9ed318d5
TH		 1000 total_tx_packets += buffer_info->segs;
1001 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1002 }
1003
1004 e1000_put_txbuf(adapter, buffer_info);
1005 tx_desc->upper.data = 0;
1006
1007 i++;
1008 if (i == tx_ring->count)
1009 i = 0;
1010 }
1011
dac87619
TL		 1012 if (i == tx_ring->next_to_use)
1013 break;
bc7f75fa
AK		 1014 eop = tx_ring->buffer_info[i].next_to_watch;
1015 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1016 }
1017
1018 tx_ring->next_to_clean = i;
1019
1020#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1021 if (count && netif_carrier_ok(netdev) &&
1022 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1023 /* Make sure that anybody stopping the queue after this
1024 * sees the new next_to_clean.
1025 */
1026 smp_mb();
1027
1028 if (netif_queue_stopped(netdev) &&
1029 !(test_bit(__E1000_DOWN, &adapter->state))) {
1030 netif_wake_queue(netdev);
1031 ++adapter->restart_queue;
1032 }
1033 }
1034
1035 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1036 /*
1037 * Detect a transmit hang in hardware, this serializes the
1038 * check with the clearing of time_stamp and movement of i
1039 */
bc7f75fa 1040 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1041 if (tx_ring->buffer_info[i].time_stamp &&
1042 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1043 + (adapter->tx_timeout_factor * HZ)) &&
1044 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1045 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1046 netif_stop_queue(netdev);
1047 }
1048 }
1049 adapter->total_tx_bytes += total_tx_bytes;
1050 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1051 netdev->stats.tx_bytes += total_tx_bytes;
1052 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 1053 return (count < tx_ring->count);
bc7f75fa
AK		 1054}
1055
bc7f75fa
AK		 1056/**
1057 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1058 * @adapter: board private structure
1059 *
1060 * the return value indicates whether actual cleaning was done, there
1061 * is no guarantee that everything was cleaned
1062 **/
1063static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1064 int *work_done, int work_to_do)
1065{
3bb99fe2 1066 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1067 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1068 struct net_device *netdev = adapter->netdev;
1069 struct pci_dev *pdev = adapter->pdev;
1070 struct e1000_ring *rx_ring = adapter->rx_ring;
1071 struct e1000_buffer *buffer_info, *next_buffer;
1072 struct e1000_ps_page *ps_page;
1073 struct sk_buff *skb;
1074 unsigned int i, j;
1075 u32 length, staterr;
1076 int cleaned_count = 0;
1077 bool cleaned = 0;
1078 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1079
1080 i = rx_ring->next_to_clean;
1081 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1082 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1083 buffer_info = &rx_ring->buffer_info[i];
1084
1085 while (staterr & E1000_RXD_STAT_DD) {
1086 if (*work_done >= work_to_do)
1087 break;
1088 (*work_done)++;
1089 skb = buffer_info->skb;
1090
1091 /* in the packet split case this is header only */
1092 prefetch(skb->data - NET_IP_ALIGN);
1093
1094 i++;
1095 if (i == rx_ring->count)
1096 i = 0;
1097 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1098 prefetch(next_rxd);
1099
1100 next_buffer = &rx_ring->buffer_info[i];
1101
1102 cleaned = 1;
1103 cleaned_count++;
0be3f55f 1104 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1105 adapter->rx_ps_bsize0,
0be3f55f 1106 DMA_FROM_DEVICE);
bc7f75fa
AK		 1107 buffer_info->dma = 0;
1108
b94b5028
JB		 1109 /* see !EOP comment in other rx routine */
1110 if (!(staterr & E1000_RXD_STAT_EOP))
1111 adapter->flags2 |= FLAG2_IS_DISCARDING;
1112
1113 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1114 e_dbg("Packet Split buffers didn't pick up the full "
1115 "packet\n");
bc7f75fa 1116 dev_kfree_skb_irq(skb);
b94b5028
JB		 1117 if (staterr & E1000_RXD_STAT_EOP)
1118 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1119 goto next_desc;
1120 }
1121
1122 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1123 dev_kfree_skb_irq(skb);
1124 goto next_desc;
1125 }
1126
1127 length = le16_to_cpu(rx_desc->wb.middle.length0);
1128
1129 if (!length) {
3bb99fe2
BA		 1130 e_dbg("Last part of the packet spanning multiple "
1131 "descriptors\n");
bc7f75fa
AK		 1132 dev_kfree_skb_irq(skb);
1133 goto next_desc;
1134 }
1135
1136 /* Good Receive */
1137 skb_put(skb, length);
1138
1139 {
ad68076e
BA		 1140 /*
1141 * this looks ugly, but it seems compiler issues make it
1142 * more efficient than reusing j
1143 */
bc7f75fa
AK		 1144 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1145
ad68076e
BA		 1146 /*
1147 * page alloc/put takes too long and effects small packet
1148 * throughput, so unsplit small packets and save the alloc/put
1149 * only valid in softirq (napi) context to call kmap_*
1150 */
bc7f75fa
AK		 1151 if (l1 && (l1 <= copybreak) &&
1152 ((length + l1) <= adapter->rx_ps_bsize0)) {
1153 u8 *vaddr;
1154
47f44e40 1155 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1156
ad68076e
BA		 1157 /*
1158 * there is no documentation about how to call
bc7f75fa 1159 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1160 * very long
1161 */
0be3f55f
NN		 1162 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1163 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1164 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1165 memcpy(skb_tail_pointer(skb), vaddr, l1);
1166 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1167 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1168 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1169
eb7c3adb
JK		 1170 /* remove the CRC */
1171 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1172 l1 -= 4;
1173
bc7f75fa
AK		 1174 skb_put(skb, l1);
1175 goto copydone;
1176 } /* if */
1177 }
1178
1179 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1180 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1181 if (!length)
1182 break;
1183
47f44e40 1184 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1185 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1186 DMA_FROM_DEVICE);
bc7f75fa
AK		 1187 ps_page->dma = 0;
1188 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1189 ps_page->page = NULL;
1190 skb->len += length;
1191 skb->data_len += length;
1192 skb->truesize += length;
1193 }
1194
eb7c3adb
JK		 1195 /* strip the ethernet crc, problem is we're using pages now so
1196 * this whole operation can get a little cpu intensive
1197 */
1198 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1199 pskb_trim(skb, skb->len - 4);
1200
bc7f75fa
AK		 1201copydone:
1202 total_rx_bytes += skb->len;
1203 total_rx_packets++;
1204
1205 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1206 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1207
1208 if (rx_desc->wb.upper.header_status &
1209 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1210 adapter->rx_hdr_split++;
1211
1212 e1000_receive_skb(adapter, netdev, skb,
1213 staterr, rx_desc->wb.middle.vlan);
1214
1215next_desc:
1216 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1217 buffer_info->skb = NULL;
1218
1219 /* return some buffers to hardware, one at a time is too slow */
1220 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1221 adapter->alloc_rx_buf(adapter, cleaned_count);
1222 cleaned_count = 0;
1223 }
1224
1225 /* use prefetched values */
1226 rx_desc = next_rxd;
1227 buffer_info = next_buffer;
1228
1229 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1230 }
1231 rx_ring->next_to_clean = i;
1232
1233 cleaned_count = e1000_desc_unused(rx_ring);
1234 if (cleaned_count)
1235 adapter->alloc_rx_buf(adapter, cleaned_count);
1236
bc7f75fa 1237 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1238 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1239 netdev->stats.rx_bytes += total_rx_bytes;
1240 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1241 return cleaned;
1242}
1243
97ac8cae
BA		 1244/**
1245 * e1000_consume_page - helper function
1246 **/
1247static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1248 u16 length)
1249{
1250 bi->page = NULL;
1251 skb->len += length;
1252 skb->data_len += length;
1253 skb->truesize += length;
1254}
1255
1256/**
1257 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1258 * @adapter: board private structure
1259 *
1260 * the return value indicates whether actual cleaning was done, there
1261 * is no guarantee that everything was cleaned
1262 **/
1263
1264static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1265 int *work_done, int work_to_do)
1266{
1267 struct net_device *netdev = adapter->netdev;
1268 struct pci_dev *pdev = adapter->pdev;
1269 struct e1000_ring *rx_ring = adapter->rx_ring;
1270 struct e1000_rx_desc *rx_desc, *next_rxd;
1271 struct e1000_buffer *buffer_info, *next_buffer;
1272 u32 length;
1273 unsigned int i;
1274 int cleaned_count = 0;
1275 bool cleaned = false;
1276 unsigned int total_rx_bytes=0, total_rx_packets=0;
1277
1278 i = rx_ring->next_to_clean;
1279 rx_desc = E1000_RX_DESC(*rx_ring, i);
1280 buffer_info = &rx_ring->buffer_info[i];
1281
1282 while (rx_desc->status & E1000_RXD_STAT_DD) {
1283 struct sk_buff *skb;
1284 u8 status;
1285
1286 if (*work_done >= work_to_do)
1287 break;
1288 (*work_done)++;
1289
1290 status = rx_desc->status;
1291 skb = buffer_info->skb;
1292 buffer_info->skb = NULL;
1293
1294 ++i;
1295 if (i == rx_ring->count)
1296 i = 0;
1297 next_rxd = E1000_RX_DESC(*rx_ring, i);
1298 prefetch(next_rxd);
1299
1300 next_buffer = &rx_ring->buffer_info[i];
1301
1302 cleaned = true;
1303 cleaned_count++;
0be3f55f
NN		 1304 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1305 DMA_FROM_DEVICE);
97ac8cae
BA		 1306 buffer_info->dma = 0;
1307
1308 length = le16_to_cpu(rx_desc->length);
1309
1310 /* errors is only valid for DD + EOP descriptors */
1311 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1312 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1313 /* recycle both page and skb */
1314 buffer_info->skb = skb;
1315 /* an error means any chain goes out the window
1316 * too */
1317 if (rx_ring->rx_skb_top)
1318 dev_kfree_skb(rx_ring->rx_skb_top);
1319 rx_ring->rx_skb_top = NULL;
1320 goto next_desc;
1321 }
1322
1323#define rxtop rx_ring->rx_skb_top
1324 if (!(status & E1000_RXD_STAT_EOP)) {
1325 /* this descriptor is only the beginning (or middle) */
1326 if (!rxtop) {
1327 /* this is the beginning of a chain */
1328 rxtop = skb;
1329 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1330 0, length);
1331 } else {
1332 /* this is the middle of a chain */
1333 skb_fill_page_desc(rxtop,
1334 skb_shinfo(rxtop)->nr_frags,
1335 buffer_info->page, 0, length);
1336 /* re-use the skb, only consumed the page */
1337 buffer_info->skb = skb;
1338 }
1339 e1000_consume_page(buffer_info, rxtop, length);
1340 goto next_desc;
1341 } else {
1342 if (rxtop) {
1343 /* end of the chain */
1344 skb_fill_page_desc(rxtop,
1345 skb_shinfo(rxtop)->nr_frags,
1346 buffer_info->page, 0, length);
1347 /* re-use the current skb, we only consumed the
1348 * page */
1349 buffer_info->skb = skb;
1350 skb = rxtop;
1351 rxtop = NULL;
1352 e1000_consume_page(buffer_info, skb, length);
1353 } else {
1354 /* no chain, got EOP, this buf is the packet
1355 * copybreak to save the put_page/alloc_page */
1356 if (length <= copybreak &&
1357 skb_tailroom(skb) >= length) {
1358 u8 *vaddr;
1359 vaddr = kmap_atomic(buffer_info->page,
1360 KM_SKB_DATA_SOFTIRQ);
1361 memcpy(skb_tail_pointer(skb), vaddr,
1362 length);
1363 kunmap_atomic(vaddr,
1364 KM_SKB_DATA_SOFTIRQ);
1365 /* re-use the page, so don't erase
1366 * buffer_info->page */
1367 skb_put(skb, length);
1368 } else {
1369 skb_fill_page_desc(skb, 0,
1370 buffer_info->page, 0,
1371 length);
1372 e1000_consume_page(buffer_info, skb,
1373 length);
1374 }
1375 }
1376 }
1377
1378 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1379 e1000_rx_checksum(adapter,
1380 (u32)(status) |
1381 ((u32)(rx_desc->errors) << 24),
1382 le16_to_cpu(rx_desc->csum), skb);
1383
1384 /* probably a little skewed due to removing CRC */
1385 total_rx_bytes += skb->len;
1386 total_rx_packets++;
1387
1388 /* eth type trans needs skb->data to point to something */
1389 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1390 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1391 dev_kfree_skb(skb);
1392 goto next_desc;
1393 }
1394
1395 e1000_receive_skb(adapter, netdev, skb, status,
1396 rx_desc->special);
1397
1398next_desc:
1399 rx_desc->status = 0;
1400
1401 /* return some buffers to hardware, one at a time is too slow */
1402 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1403 adapter->alloc_rx_buf(adapter, cleaned_count);
1404 cleaned_count = 0;
1405 }
1406
1407 /* use prefetched values */
1408 rx_desc = next_rxd;
1409 buffer_info = next_buffer;
1410 }
1411 rx_ring->next_to_clean = i;
1412
1413 cleaned_count = e1000_desc_unused(rx_ring);
1414 if (cleaned_count)
1415 adapter->alloc_rx_buf(adapter, cleaned_count);
1416
1417 adapter->total_rx_bytes += total_rx_bytes;
1418 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1419 netdev->stats.rx_bytes += total_rx_bytes;
1420 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1421 return cleaned;
1422}
1423
bc7f75fa
AK		 1424/**
1425 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1426 * @adapter: board private structure
1427 **/
1428static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1429{
1430 struct e1000_ring *rx_ring = adapter->rx_ring;
1431 struct e1000_buffer *buffer_info;
1432 struct e1000_ps_page *ps_page;
1433 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1434 unsigned int i, j;
1435
1436 /* Free all the Rx ring sk_buffs */
1437 for (i = 0; i < rx_ring->count; i++) {
1438 buffer_info = &rx_ring->buffer_info[i];
1439 if (buffer_info->dma) {
1440 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1441 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1442 adapter->rx_buffer_len,
0be3f55f 1443 DMA_FROM_DEVICE);
97ac8cae 1444 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1445 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1446 PAGE_SIZE,
0be3f55f 1447 DMA_FROM_DEVICE);
bc7f75fa 1448 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1449 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1450 adapter->rx_ps_bsize0,
0be3f55f 1451 DMA_FROM_DEVICE);
bc7f75fa
AK		 1452 buffer_info->dma = 0;
1453 }
1454
97ac8cae
BA		 1455 if (buffer_info->page) {
1456 put_page(buffer_info->page);
1457 buffer_info->page = NULL;
1458 }
1459
bc7f75fa
AK		 1460 if (buffer_info->skb) {
1461 dev_kfree_skb(buffer_info->skb);
1462 buffer_info->skb = NULL;
1463 }
1464
1465 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1466 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1467 if (!ps_page->page)
1468 break;
0be3f55f
NN		 1469 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1470 DMA_FROM_DEVICE);
bc7f75fa
AK		 1471 ps_page->dma = 0;
1472 put_page(ps_page->page);
1473 ps_page->page = NULL;
1474 }
1475 }
1476
1477 /* there also may be some cached data from a chained receive */
1478 if (rx_ring->rx_skb_top) {
1479 dev_kfree_skb(rx_ring->rx_skb_top);
1480 rx_ring->rx_skb_top = NULL;
1481 }
1482
bc7f75fa
AK		 1483 /* Zero out the descriptor ring */
1484 memset(rx_ring->desc, 0, rx_ring->size);
1485
1486 rx_ring->next_to_clean = 0;
1487 rx_ring->next_to_use = 0;
b94b5028 1488 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1489
1490 writel(0, adapter->hw.hw_addr + rx_ring->head);
1491 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1492}
1493
a8f88ff5
JB		 1494static void e1000e_downshift_workaround(struct work_struct *work)
1495{
1496 struct e1000_adapter *adapter = container_of(work,
1497 struct e1000_adapter, downshift_task);
1498
1499 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1500}
1501
bc7f75fa
AK		 1502/**
1503 * e1000_intr_msi - Interrupt Handler
1504 * @irq: interrupt number
1505 * @data: pointer to a network interface device structure
1506 **/
1507static irqreturn_t e1000_intr_msi(int irq, void *data)
1508{
1509 struct net_device *netdev = data;
1510 struct e1000_adapter *adapter = netdev_priv(netdev);
1511 struct e1000_hw *hw = &adapter->hw;
1512 u32 icr = er32(ICR);
1513
ad68076e
BA		 1514 /*
1515 * read ICR disables interrupts using IAM
1516 */
bc7f75fa 1517
573cca8c 1518 if (icr & E1000_ICR_LSC) {
bc7f75fa 1519 hw->mac.get_link_status = 1;
ad68076e
BA		 1520 /*
1521 * ICH8 workaround-- Call gig speed drop workaround on cable
1522 * disconnect (LSC) before accessing any PHY registers
1523 */
bc7f75fa
AK		 1524 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1525 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1526 schedule_work(&adapter->downshift_task);
bc7f75fa 1527
ad68076e
BA		 1528 /*
1529 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1530 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1531 * adapter in watchdog
1532 */
bc7f75fa
AK		 1533 if (netif_carrier_ok(netdev) &&
1534 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1535 /* disable receives */
1536 u32 rctl = er32(RCTL);
1537 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1538 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1539 }
1540 /* guard against interrupt when we're going down */
1541 if (!test_bit(__E1000_DOWN, &adapter->state))
1542 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1543 }
1544
288379f0 1545 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1546 adapter->total_tx_bytes = 0;
1547 adapter->total_tx_packets = 0;
1548 adapter->total_rx_bytes = 0;
1549 adapter->total_rx_packets = 0;
288379f0 1550 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1551 }
1552
1553 return IRQ_HANDLED;
1554}
1555
1556/**
1557 * e1000_intr - Interrupt Handler
1558 * @irq: interrupt number
1559 * @data: pointer to a network interface device structure
1560 **/
1561static irqreturn_t e1000_intr(int irq, void *data)
1562{
1563 struct net_device *netdev = data;
1564 struct e1000_adapter *adapter = netdev_priv(netdev);
1565 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1566 u32 rctl, icr = er32(ICR);
4662e82b 1567
a68ea775 1568 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1569 return IRQ_NONE; /* Not our interrupt */
1570
ad68076e
BA		 1571 /*
1572 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1573 * not set, then the adapter didn't send an interrupt
1574 */
bc7f75fa
AK		 1575 if (!(icr & E1000_ICR_INT_ASSERTED))
1576 return IRQ_NONE;
1577
ad68076e
BA		 1578 /*
1579 * Interrupt Auto-Mask...upon reading ICR,
1580 * interrupts are masked. No need for the
1581 * IMC write
1582 */
bc7f75fa 1583
573cca8c 1584 if (icr & E1000_ICR_LSC) {
bc7f75fa 1585 hw->mac.get_link_status = 1;
ad68076e
BA		 1586 /*
1587 * ICH8 workaround-- Call gig speed drop workaround on cable
1588 * disconnect (LSC) before accessing any PHY registers
1589 */
bc7f75fa
AK		 1590 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1591 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1592 schedule_work(&adapter->downshift_task);
bc7f75fa 1593
ad68076e
BA		 1594 /*
1595 * 80003ES2LAN workaround--
bc7f75fa
AK		 1596 * For packet buffer work-around on link down event;
1597 * disable receives here in the ISR and
1598 * reset adapter in watchdog
1599 */
1600 if (netif_carrier_ok(netdev) &&
1601 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1602 /* disable receives */
1603 rctl = er32(RCTL);
1604 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1605 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1606 }
1607 /* guard against interrupt when we're going down */
1608 if (!test_bit(__E1000_DOWN, &adapter->state))
1609 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1610 }
1611
288379f0 1612 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1613 adapter->total_tx_bytes = 0;
1614 adapter->total_tx_packets = 0;
1615 adapter->total_rx_bytes = 0;
1616 adapter->total_rx_packets = 0;
288379f0 1617 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1618 }
1619
1620 return IRQ_HANDLED;
1621}
1622
4662e82b
BA		 1623static irqreturn_t e1000_msix_other(int irq, void *data)
1624{
1625 struct net_device *netdev = data;
1626 struct e1000_adapter *adapter = netdev_priv(netdev);
1627 struct e1000_hw *hw = &adapter->hw;
1628 u32 icr = er32(ICR);
1629
1630 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1631 if (!test_bit(__E1000_DOWN, &adapter->state))
1632 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1633 return IRQ_NONE;
1634 }
1635
1636 if (icr & adapter->eiac_mask)
1637 ew32(ICS, (icr & adapter->eiac_mask));
1638
1639 if (icr & E1000_ICR_OTHER) {
1640 if (!(icr & E1000_ICR_LSC))
1641 goto no_link_interrupt;
1642 hw->mac.get_link_status = 1;
1643 /* guard against interrupt when we're going down */
1644 if (!test_bit(__E1000_DOWN, &adapter->state))
1645 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1646 }
1647
1648no_link_interrupt:
a3c69fef
JB		 1649 if (!test_bit(__E1000_DOWN, &adapter->state))
1650 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1651
1652 return IRQ_HANDLED;
1653}
1654
1655
1656static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1657{
1658 struct net_device *netdev = data;
1659 struct e1000_adapter *adapter = netdev_priv(netdev);
1660 struct e1000_hw *hw = &adapter->hw;
1661 struct e1000_ring *tx_ring = adapter->tx_ring;
1662
1663
1664 adapter->total_tx_bytes = 0;
1665 adapter->total_tx_packets = 0;
1666
1667 if (!e1000_clean_tx_irq(adapter))
1668 /* Ring was not completely cleaned, so fire another interrupt */
1669 ew32(ICS, tx_ring->ims_val);
1670
1671 return IRQ_HANDLED;
1672}
1673
1674static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1675{
1676 struct net_device *netdev = data;
1677 struct e1000_adapter *adapter = netdev_priv(netdev);
1678
1679 /* Write the ITR value calculated at the end of the
1680 * previous interrupt.
1681 */
1682 if (adapter->rx_ring->set_itr) {
1683 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1684 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1685 adapter->rx_ring->set_itr = 0;
1686 }
1687
288379f0 1688 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1689 adapter->total_rx_bytes = 0;
1690 adapter->total_rx_packets = 0;
288379f0 1691 __napi_schedule(&adapter->napi);
4662e82b
BA		 1692 }
1693 return IRQ_HANDLED;
1694}
1695
1696/**
1697 * e1000_configure_msix - Configure MSI-X hardware
1698 *
1699 * e1000_configure_msix sets up the hardware to properly
1700 * generate MSI-X interrupts.
1701 **/
1702static void e1000_configure_msix(struct e1000_adapter *adapter)
1703{
1704 struct e1000_hw *hw = &adapter->hw;
1705 struct e1000_ring *rx_ring = adapter->rx_ring;
1706 struct e1000_ring *tx_ring = adapter->tx_ring;
1707 int vector = 0;
1708 u32 ctrl_ext, ivar = 0;
1709
1710 adapter->eiac_mask = 0;
1711
1712 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1713 if (hw->mac.type == e1000_82574) {
1714 u32 rfctl = er32(RFCTL);
1715 rfctl |= E1000_RFCTL_ACK_DIS;
1716 ew32(RFCTL, rfctl);
1717 }
1718
1719#define E1000_IVAR_INT_ALLOC_VALID 0x8
1720 /* Configure Rx vector */
1721 rx_ring->ims_val = E1000_IMS_RXQ0;
1722 adapter->eiac_mask |= rx_ring->ims_val;
1723 if (rx_ring->itr_val)
1724 writel(1000000000 / (rx_ring->itr_val * 256),
1725 hw->hw_addr + rx_ring->itr_register);
1726 else
1727 writel(1, hw->hw_addr + rx_ring->itr_register);
1728 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1729
1730 /* Configure Tx vector */
1731 tx_ring->ims_val = E1000_IMS_TXQ0;
1732 vector++;
1733 if (tx_ring->itr_val)
1734 writel(1000000000 / (tx_ring->itr_val * 256),
1735 hw->hw_addr + tx_ring->itr_register);
1736 else
1737 writel(1, hw->hw_addr + tx_ring->itr_register);
1738 adapter->eiac_mask |= tx_ring->ims_val;
1739 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1740
1741 /* set vector for Other Causes, e.g. link changes */
1742 vector++;
1743 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1744 if (rx_ring->itr_val)
1745 writel(1000000000 / (rx_ring->itr_val * 256),
1746 hw->hw_addr + E1000_EITR_82574(vector));
1747 else
1748 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1749
1750 /* Cause Tx interrupts on every write back */
1751 ivar |= (1 << 31);
1752
1753 ew32(IVAR, ivar);
1754
1755 /* enable MSI-X PBA support */
1756 ctrl_ext = er32(CTRL_EXT);
1757 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1758
1759 /* Auto-Mask Other interrupts upon ICR read */
1760#define E1000_EIAC_MASK_82574 0x01F00000
1761 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1762 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1763 ew32(CTRL_EXT, ctrl_ext);
1764 e1e_flush();
1765}
1766
1767void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1768{
1769 if (adapter->msix_entries) {
1770 pci_disable_msix(adapter->pdev);
1771 kfree(adapter->msix_entries);
1772 adapter->msix_entries = NULL;
1773 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1774 pci_disable_msi(adapter->pdev);
1775 adapter->flags &= ~FLAG_MSI_ENABLED;
1776 }
4662e82b
BA		 1777}
1778
1779/**
1780 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1781 *
1782 * Attempt to configure interrupts using the best available
1783 * capabilities of the hardware and kernel.
1784 **/
1785void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1786{
1787 int err;
8e86acd7 1788 int i;
4662e82b
BA		 1789
1790 switch (adapter->int_mode) {
1791 case E1000E_INT_MODE_MSIX:
1792 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1793 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1794 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1795 sizeof(struct msix_entry),
1796 GFP_KERNEL);
1797 if (adapter->msix_entries) {
8e86acd7 1798 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1799 adapter->msix_entries[i].entry = i;
1800
1801 err = pci_enable_msix(adapter->pdev,
1802 adapter->msix_entries,
8e86acd7
JK		 1803 adapter->num_vectors);
1804 if (err == 0) {
4662e82b 1805 return;
8e86acd7 1806 }
4662e82b
BA		 1807 }
1808 /* MSI-X failed, so fall through and try MSI */
1809 e_err("Failed to initialize MSI-X interrupts. "
1810 "Falling back to MSI interrupts.\n");
1811 e1000e_reset_interrupt_capability(adapter);
1812 }
1813 adapter->int_mode = E1000E_INT_MODE_MSI;
1814 /* Fall through */
1815 case E1000E_INT_MODE_MSI:
1816 if (!pci_enable_msi(adapter->pdev)) {
1817 adapter->flags |= FLAG_MSI_ENABLED;
1818 } else {
1819 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1820 e_err("Failed to initialize MSI interrupts. Falling "
1821 "back to legacy interrupts.\n");
1822 }
1823 /* Fall through */
1824 case E1000E_INT_MODE_LEGACY:
1825 /* Don't do anything; this is the system default */
1826 break;
1827 }
8e86acd7
JK		 1828
1829 /* store the number of vectors being used */
1830 adapter->num_vectors = 1;
4662e82b
BA		 1831}
1832
1833/**
1834 * e1000_request_msix - Initialize MSI-X interrupts
1835 *
1836 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1837 * kernel.
1838 **/
1839static int e1000_request_msix(struct e1000_adapter *adapter)
1840{
1841 struct net_device *netdev = adapter->netdev;
1842 int err = 0, vector = 0;
1843
1844 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1845 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1846 else
1847 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1848 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1849 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1850 netdev);
1851 if (err)
1852 goto out;
1853 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1854 adapter->rx_ring->itr_val = adapter->itr;
1855 vector++;
1856
1857 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1858 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1859 else
1860 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1861 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1862 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1863 netdev);
1864 if (err)
1865 goto out;
1866 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1867 adapter->tx_ring->itr_val = adapter->itr;
1868 vector++;
1869
1870 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1871 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1872 if (err)
1873 goto out;
1874
1875 e1000_configure_msix(adapter);
1876 return 0;
1877out:
1878 return err;
1879}
1880
f8d59f78
BA		 1881/**
1882 * e1000_request_irq - initialize interrupts
1883 *
1884 * Attempts to configure interrupts using the best available
1885 * capabilities of the hardware and kernel.
1886 **/
bc7f75fa
AK		 1887static int e1000_request_irq(struct e1000_adapter *adapter)
1888{
1889 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1890 int err;
1891
4662e82b
BA		 1892 if (adapter->msix_entries) {
1893 err = e1000_request_msix(adapter);
1894 if (!err)
1895 return err;
1896 /* fall back to MSI */
1897 e1000e_reset_interrupt_capability(adapter);
1898 adapter->int_mode = E1000E_INT_MODE_MSI;
1899 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1900 }
4662e82b 1901 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1902 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1903 netdev->name, netdev);
1904 if (!err)
1905 return err;
bc7f75fa 1906
4662e82b
BA		 1907 /* fall back to legacy interrupt */
1908 e1000e_reset_interrupt_capability(adapter);
1909 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1910 }
1911
a0607fd3 1912 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1913 netdev->name, netdev);
1914 if (err)
1915 e_err("Unable to allocate interrupt, Error: %d\n", err);
1916
bc7f75fa
AK		 1917 return err;
1918}
1919
1920static void e1000_free_irq(struct e1000_adapter *adapter)
1921{
1922 struct net_device *netdev = adapter->netdev;
1923
4662e82b
BA		 1924 if (adapter->msix_entries) {
1925 int vector = 0;
1926
1927 free_irq(adapter->msix_entries[vector].vector, netdev);
1928 vector++;
1929
1930 free_irq(adapter->msix_entries[vector].vector, netdev);
1931 vector++;
1932
1933 /* Other Causes interrupt vector */
1934 free_irq(adapter->msix_entries[vector].vector, netdev);
1935 return;
bc7f75fa 1936 }
4662e82b
BA		 1937
1938 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1939}
1940
1941/**
1942 * e1000_irq_disable - Mask off interrupt generation on the NIC
1943 **/
1944static void e1000_irq_disable(struct e1000_adapter *adapter)
1945{
1946 struct e1000_hw *hw = &adapter->hw;
1947
bc7f75fa 1948 ew32(IMC, ~0);
4662e82b
BA		 1949 if (adapter->msix_entries)
1950 ew32(EIAC_82574, 0);
bc7f75fa 1951 e1e_flush();
8e86acd7
JK		 1952
1953 if (adapter->msix_entries) {
1954 int i;
1955 for (i = 0; i < adapter->num_vectors; i++)
1956 synchronize_irq(adapter->msix_entries[i].vector);
1957 } else {
1958 synchronize_irq(adapter->pdev->irq);
1959 }
bc7f75fa
AK		 1960}
1961
1962/**
1963 * e1000_irq_enable - Enable default interrupt generation settings
1964 **/
1965static void e1000_irq_enable(struct e1000_adapter *adapter)
1966{
1967 struct e1000_hw *hw = &adapter->hw;
1968
4662e82b
BA		 1969 if (adapter->msix_entries) {
1970 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1971 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1972 } else {
1973 ew32(IMS, IMS_ENABLE_MASK);
1974 }
74ef9c39 1975 e1e_flush();
bc7f75fa
AK		 1976}
1977
1978/**
1979 * e1000_get_hw_control - get control of the h/w from f/w
1980 * @adapter: address of board private structure
1981 *
489815ce 1982 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1983 * For ASF and Pass Through versions of f/w this means that
1984 * the driver is loaded. For AMT version (only with 82573)
1985 * of the f/w this means that the network i/f is open.
1986 **/
1987static void e1000_get_hw_control(struct e1000_adapter *adapter)
1988{
1989 struct e1000_hw *hw = &adapter->hw;
1990 u32 ctrl_ext;
1991 u32 swsm;
1992
1993 /* Let firmware know the driver has taken over */
1994 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1995 swsm = er32(SWSM);
1996 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1997 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1998 ctrl_ext = er32(CTRL_EXT);
ad68076e 1999 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2000 }
2001}
2002
2003/**
2004 * e1000_release_hw_control - release control of the h/w to f/w
2005 * @adapter: address of board private structure
2006 *
489815ce 2007 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2008 * For ASF and Pass Through versions of f/w this means that the
2009 * driver is no longer loaded. For AMT version (only with 82573) i
2010 * of the f/w this means that the network i/f is closed.
2011 *
2012 **/
2013static void e1000_release_hw_control(struct e1000_adapter *adapter)
2014{
2015 struct e1000_hw *hw = &adapter->hw;
2016 u32 ctrl_ext;
2017 u32 swsm;
2018
2019 /* Let firmware taken over control of h/w */
2020 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2021 swsm = er32(SWSM);
2022 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2023 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2024 ctrl_ext = er32(CTRL_EXT);
ad68076e 2025 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2026 }
2027}
2028
bc7f75fa
AK		 2029/**
2030 * @e1000_alloc_ring - allocate memory for a ring structure
2031 **/
2032static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2033 struct e1000_ring *ring)
2034{
2035 struct pci_dev *pdev = adapter->pdev;
2036
2037 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2038 GFP_KERNEL);
2039 if (!ring->desc)
2040 return -ENOMEM;
2041
2042 return 0;
2043}
2044
2045/**
2046 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2047 * @adapter: board private structure
2048 *
2049 * Return 0 on success, negative on failure
2050 **/
2051int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2052{
2053 struct e1000_ring *tx_ring = adapter->tx_ring;
2054 int err = -ENOMEM, size;
2055
2056 size = sizeof(struct e1000_buffer) * tx_ring->count;
2057 tx_ring->buffer_info = vmalloc(size);
2058 if (!tx_ring->buffer_info)
2059 goto err;
2060 memset(tx_ring->buffer_info, 0, size);
2061
2062 /* round up to nearest 4K */
2063 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2064 tx_ring->size = ALIGN(tx_ring->size, 4096);
2065
2066 err = e1000_alloc_ring_dma(adapter, tx_ring);
2067 if (err)
2068 goto err;
2069
2070 tx_ring->next_to_use = 0;
2071 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2072
2073 return 0;
2074err:
2075 vfree(tx_ring->buffer_info);
44defeb3 2076 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2077 return err;
2078}
2079
2080/**
2081 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2082 * @adapter: board private structure
2083 *
2084 * Returns 0 on success, negative on failure
2085 **/
2086int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2087{
2088 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2089 struct e1000_buffer *buffer_info;
2090 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2091
2092 size = sizeof(struct e1000_buffer) * rx_ring->count;
2093 rx_ring->buffer_info = vmalloc(size);
2094 if (!rx_ring->buffer_info)
2095 goto err;
2096 memset(rx_ring->buffer_info, 0, size);
2097
47f44e40
AK		 2098 for (i = 0; i < rx_ring->count; i++) {
2099 buffer_info = &rx_ring->buffer_info[i];
2100 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2101 sizeof(struct e1000_ps_page),
2102 GFP_KERNEL);
2103 if (!buffer_info->ps_pages)
2104 goto err_pages;
2105 }
bc7f75fa
AK		 2106
2107 desc_len = sizeof(union e1000_rx_desc_packet_split);
2108
2109 /* Round up to nearest 4K */
2110 rx_ring->size = rx_ring->count * desc_len;
2111 rx_ring->size = ALIGN(rx_ring->size, 4096);
2112
2113 err = e1000_alloc_ring_dma(adapter, rx_ring);
2114 if (err)
47f44e40 2115 goto err_pages;
bc7f75fa
AK		 2116
2117 rx_ring->next_to_clean = 0;
2118 rx_ring->next_to_use = 0;
2119 rx_ring->rx_skb_top = NULL;
2120
2121 return 0;
47f44e40
AK		 2122
2123err_pages:
2124 for (i = 0; i < rx_ring->count; i++) {
2125 buffer_info = &rx_ring->buffer_info[i];
2126 kfree(buffer_info->ps_pages);
2127 }
bc7f75fa
AK		 2128err:
2129 vfree(rx_ring->buffer_info);
44defeb3 2130 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2131 return err;
2132}
2133
2134/**
2135 * e1000_clean_tx_ring - Free Tx Buffers
2136 * @adapter: board private structure
2137 **/
2138static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2139{
2140 struct e1000_ring *tx_ring = adapter->tx_ring;
2141 struct e1000_buffer *buffer_info;
2142 unsigned long size;
2143 unsigned int i;
2144
2145 for (i = 0; i < tx_ring->count; i++) {
2146 buffer_info = &tx_ring->buffer_info[i];
2147 e1000_put_txbuf(adapter, buffer_info);
2148 }
2149
2150 size = sizeof(struct e1000_buffer) * tx_ring->count;
2151 memset(tx_ring->buffer_info, 0, size);
2152
2153 memset(tx_ring->desc, 0, tx_ring->size);
2154
2155 tx_ring->next_to_use = 0;
2156 tx_ring->next_to_clean = 0;
2157
2158 writel(0, adapter->hw.hw_addr + tx_ring->head);
2159 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2160}
2161
2162/**
2163 * e1000e_free_tx_resources - Free Tx Resources per Queue
2164 * @adapter: board private structure
2165 *
2166 * Free all transmit software resources
2167 **/
2168void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2169{
2170 struct pci_dev *pdev = adapter->pdev;
2171 struct e1000_ring *tx_ring = adapter->tx_ring;
2172
2173 e1000_clean_tx_ring(adapter);
2174
2175 vfree(tx_ring->buffer_info);
2176 tx_ring->buffer_info = NULL;
2177
2178 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2179 tx_ring->dma);
2180 tx_ring->desc = NULL;
2181}
2182
2183/**
2184 * e1000e_free_rx_resources - Free Rx Resources
2185 * @adapter: board private structure
2186 *
2187 * Free all receive software resources
2188 **/
2189
2190void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2191{
2192 struct pci_dev *pdev = adapter->pdev;
2193 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2194 int i;
bc7f75fa
AK		 2195
2196 e1000_clean_rx_ring(adapter);
2197
47f44e40
AK		 2198 for (i = 0; i < rx_ring->count; i++) {
2199 kfree(rx_ring->buffer_info[i].ps_pages);
2200 }
2201
bc7f75fa
AK		 2202 vfree(rx_ring->buffer_info);
2203 rx_ring->buffer_info = NULL;
2204
bc7f75fa
AK		 2205 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2206 rx_ring->dma);
2207 rx_ring->desc = NULL;
2208}
2209
2210/**
2211 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2212 * @adapter: pointer to adapter
2213 * @itr_setting: current adapter->itr
2214 * @packets: the number of packets during this measurement interval
2215 * @bytes: the number of bytes during this measurement interval
2216 *
bc7f75fa
AK		 2217 * Stores a new ITR value based on packets and byte
2218 * counts during the last interrupt. The advantage of per interrupt
2219 * computation is faster updates and more accurate ITR for the current
2220 * traffic pattern. Constants in this function were computed
2221 * based on theoretical maximum wire speed and thresholds were set based
2222 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2223 * while increasing bulk throughput. This functionality is controlled
2224 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2225 **/
2226static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2227 u16 itr_setting, int packets,
2228 int bytes)
2229{
2230 unsigned int retval = itr_setting;
2231
2232 if (packets == 0)
2233 goto update_itr_done;
2234
2235 switch (itr_setting) {
2236 case lowest_latency:
2237 /* handle TSO and jumbo frames */
2238 if (bytes/packets > 8000)
2239 retval = bulk_latency;
2240 else if ((packets < 5) && (bytes > 512)) {
2241 retval = low_latency;
2242 }
2243 break;
2244 case low_latency: /* 50 usec aka 20000 ints/s */
2245 if (bytes > 10000) {
2246 /* this if handles the TSO accounting */
2247 if (bytes/packets > 8000) {
2248 retval = bulk_latency;
2249 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2250 retval = bulk_latency;
2251 } else if ((packets > 35)) {
2252 retval = lowest_latency;
2253 }
2254 } else if (bytes/packets > 2000) {
2255 retval = bulk_latency;
2256 } else if (packets <= 2 && bytes < 512) {
2257 retval = lowest_latency;
2258 }
2259 break;
2260 case bulk_latency: /* 250 usec aka 4000 ints/s */
2261 if (bytes > 25000) {
2262 if (packets > 35) {
2263 retval = low_latency;
2264 }
2265 } else if (bytes < 6000) {
2266 retval = low_latency;
2267 }
2268 break;
2269 }
2270
2271update_itr_done:
2272 return retval;
2273}
2274
2275static void e1000_set_itr(struct e1000_adapter *adapter)
2276{
2277 struct e1000_hw *hw = &adapter->hw;
2278 u16 current_itr;
2279 u32 new_itr = adapter->itr;
2280
2281 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2282 if (adapter->link_speed != SPEED_1000) {
2283 current_itr = 0;
2284 new_itr = 4000;
2285 goto set_itr_now;
2286 }
2287
2288 adapter->tx_itr = e1000_update_itr(adapter,
2289 adapter->tx_itr,
2290 adapter->total_tx_packets,
2291 adapter->total_tx_bytes);
2292 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2293 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2294 adapter->tx_itr = low_latency;
2295
2296 adapter->rx_itr = e1000_update_itr(adapter,
2297 adapter->rx_itr,
2298 adapter->total_rx_packets,
2299 adapter->total_rx_bytes);
2300 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2301 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2302 adapter->rx_itr = low_latency;
2303
2304 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2305
2306 switch (current_itr) {
2307 /* counts and packets in update_itr are dependent on these numbers */
2308 case lowest_latency:
2309 new_itr = 70000;
2310 break;
2311 case low_latency:
2312 new_itr = 20000; /* aka hwitr = ~200 */
2313 break;
2314 case bulk_latency:
2315 new_itr = 4000;
2316 break;
2317 default:
2318 break;
2319 }
2320
2321set_itr_now:
2322 if (new_itr != adapter->itr) {
ad68076e
BA		 2323 /*
2324 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2325 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2326 * increasing
2327 */
bc7f75fa
AK		 2328 new_itr = new_itr > adapter->itr ?
2329 min(adapter->itr + (new_itr >> 2), new_itr) :
2330 new_itr;
2331 adapter->itr = new_itr;
4662e82b
BA		 2332 adapter->rx_ring->itr_val = new_itr;
2333 if (adapter->msix_entries)
2334 adapter->rx_ring->set_itr = 1;
2335 else
2336 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 2337 }
2338}
2339
4662e82b
BA		 2340/**
2341 * e1000_alloc_queues - Allocate memory for all rings
2342 * @adapter: board private structure to initialize
2343 **/
2344static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2345{
2346 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2347 if (!adapter->tx_ring)
2348 goto err;
2349
2350 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2351 if (!adapter->rx_ring)
2352 goto err;
2353
2354 return 0;
2355err:
2356 e_err("Unable to allocate memory for queues\n");
2357 kfree(adapter->rx_ring);
2358 kfree(adapter->tx_ring);
2359 return -ENOMEM;
2360}
2361
bc7f75fa
AK		 2362/**
2363 * e1000_clean - NAPI Rx polling callback
ad68076e 2364 * @napi: struct associated with this polling callback
489815ce 2365 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2366 **/
2367static int e1000_clean(struct napi_struct *napi, int budget)
2368{
2369 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2370 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2371 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2372 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2373
4cf1653a 2374 adapter = netdev_priv(poll_dev);
bc7f75fa 2375
4662e82b
BA		 2376 if (adapter->msix_entries &&
2377 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2378 goto clean_rx;
2379
92af3e95 2380 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2381
4662e82b 2382clean_rx:
bc7f75fa 2383 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2384
12d04a3c 2385 if (!tx_cleaned)
d2c7ddd6 2386 work_done = budget;
bc7f75fa 2387
53e52c72
DM		 2388 /* If budget not fully consumed, exit the polling mode */
2389 if (work_done < budget) {
bc7f75fa
AK		 2390 if (adapter->itr_setting & 3)
2391 e1000_set_itr(adapter);
288379f0 2392 napi_complete(napi);
a3c69fef
JB		 2393 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2394 if (adapter->msix_entries)
2395 ew32(IMS, adapter->rx_ring->ims_val);
2396 else
2397 e1000_irq_enable(adapter);
2398 }
bc7f75fa
AK		 2399 }
2400
2401 return work_done;
2402}
2403
2404static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2405{
2406 struct e1000_adapter *adapter = netdev_priv(netdev);
2407 struct e1000_hw *hw = &adapter->hw;
2408 u32 vfta, index;
2409
2410 /* don't update vlan cookie if already programmed */
2411 if ((adapter->hw.mng_cookie.status &
2412 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2413 (vid == adapter->mng_vlan_id))
2414 return;
caaddaf8 2415
bc7f75fa 2416 /* add VID to filter table */
caaddaf8
BA		 2417 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2418 index = (vid >> 5) & 0x7F;
2419 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2420 vfta |= (1 << (vid & 0x1F));
2421 hw->mac.ops.write_vfta(hw, index, vfta);
2422 }
bc7f75fa
AK		 2423}
2424
2425static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2426{
2427 struct e1000_adapter *adapter = netdev_priv(netdev);
2428 struct e1000_hw *hw = &adapter->hw;
2429 u32 vfta, index;
2430
74ef9c39
JB		 2431 if (!test_bit(__E1000_DOWN, &adapter->state))
2432 e1000_irq_disable(adapter);
bc7f75fa 2433 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2434
2435 if (!test_bit(__E1000_DOWN, &adapter->state))
2436 e1000_irq_enable(adapter);
bc7f75fa
AK		 2437
2438 if ((adapter->hw.mng_cookie.status &
2439 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2440 (vid == adapter->mng_vlan_id)) {
2441 /* release control to f/w */
2442 e1000_release_hw_control(adapter);
2443 return;
2444 }
2445
2446 /* remove VID from filter table */
caaddaf8
BA		 2447 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2448 index = (vid >> 5) & 0x7F;
2449 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2450 vfta &= ~(1 << (vid & 0x1F));
2451 hw->mac.ops.write_vfta(hw, index, vfta);
2452 }
bc7f75fa
AK		 2453}
2454
2455static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2456{
2457 struct net_device *netdev = adapter->netdev;
2458 u16 vid = adapter->hw.mng_cookie.vlan_id;
2459 u16 old_vid = adapter->mng_vlan_id;
2460
2461 if (!adapter->vlgrp)
2462 return;
2463
2464 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2465 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2466 if (adapter->hw.mng_cookie.status &
2467 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2468 e1000_vlan_rx_add_vid(netdev, vid);
2469 adapter->mng_vlan_id = vid;
2470 }
2471
2472 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2473 (vid != old_vid) &&
2474 !vlan_group_get_device(adapter->vlgrp, old_vid))
2475 e1000_vlan_rx_kill_vid(netdev, old_vid);
2476 } else {
2477 adapter->mng_vlan_id = vid;
2478 }
2479}
2480
2481
2482static void e1000_vlan_rx_register(struct net_device *netdev,
2483 struct vlan_group *grp)
2484{
2485 struct e1000_adapter *adapter = netdev_priv(netdev);
2486 struct e1000_hw *hw = &adapter->hw;
2487 u32 ctrl, rctl;
2488
74ef9c39
JB		 2489 if (!test_bit(__E1000_DOWN, &adapter->state))
2490 e1000_irq_disable(adapter);
bc7f75fa
AK		 2491 adapter->vlgrp = grp;
2492
2493 if (grp) {
2494 /* enable VLAN tag insert/strip */
2495 ctrl = er32(CTRL);
2496 ctrl |= E1000_CTRL_VME;
2497 ew32(CTRL, ctrl);
2498
2499 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2500 /* enable VLAN receive filtering */
2501 rctl = er32(RCTL);
bc7f75fa
AK		 2502 rctl &= ~E1000_RCTL_CFIEN;
2503 ew32(RCTL, rctl);
2504 e1000_update_mng_vlan(adapter);
2505 }
2506 } else {
2507 /* disable VLAN tag insert/strip */
2508 ctrl = er32(CTRL);
2509 ctrl &= ~E1000_CTRL_VME;
2510 ew32(CTRL, ctrl);
2511
2512 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2513 if (adapter->mng_vlan_id !=
2514 (u16)E1000_MNG_VLAN_NONE) {
2515 e1000_vlan_rx_kill_vid(netdev,
2516 adapter->mng_vlan_id);
2517 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2518 }
2519 }
2520 }
2521
74ef9c39
JB		 2522 if (!test_bit(__E1000_DOWN, &adapter->state))
2523 e1000_irq_enable(adapter);
bc7f75fa
AK		 2524}
2525
2526static void e1000_restore_vlan(struct e1000_adapter *adapter)
2527{
2528 u16 vid;
2529
2530 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2531
2532 if (!adapter->vlgrp)
2533 return;
2534
2535 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2536 if (!vlan_group_get_device(adapter->vlgrp, vid))
2537 continue;
2538 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2539 }
2540}
2541
cd791618 2542static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2543{
2544 struct e1000_hw *hw = &adapter->hw;
cd791618 2545 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2546
2547 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2548 return;
2549
2550 manc = er32(MANC);
2551
ad68076e
BA		 2552 /*
2553 * enable receiving management packets to the host. this will probably
bc7f75fa 2554 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2555 * the packets will be handled on SMBUS
2556 */
bc7f75fa
AK		 2557 manc |= E1000_MANC_EN_MNG2HOST;
2558 manc2h = er32(MANC2H);
cd791618
BA		 2559
2560 switch (hw->mac.type) {
2561 default:
2562 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2563 break;
2564 case e1000_82574:
2565 case e1000_82583:
2566 /*
2567 * Check if IPMI pass-through decision filter already exists;
2568 * if so, enable it.
2569 */
2570 for (i = 0, j = 0; i < 8; i++) {
2571 mdef = er32(MDEF(i));
2572
2573 /* Ignore filters with anything other than IPMI ports */
3b21b508 2574 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2575 continue;
2576
2577 /* Enable this decision filter in MANC2H */
2578 if (mdef)
2579 manc2h |= (1 << i);
2580
2581 j |= mdef;
2582 }
2583
2584 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2585 break;
2586
2587 /* Create new decision filter in an empty filter */
2588 for (i = 0, j = 0; i < 8; i++)
2589 if (er32(MDEF(i)) == 0) {
2590 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2591 E1000_MDEF_PORT_664));
2592 manc2h |= (1 << 1);
2593 j++;
2594 break;
2595 }
2596
2597 if (!j)
2598 e_warn("Unable to create IPMI pass-through filter\n");
2599 break;
2600 }
2601
bc7f75fa
AK		 2602 ew32(MANC2H, manc2h);
2603 ew32(MANC, manc);
2604}
2605
2606/**
2607 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2608 * @adapter: board private structure
2609 *
2610 * Configure the Tx unit of the MAC after a reset.
2611 **/
2612static void e1000_configure_tx(struct e1000_adapter *adapter)
2613{
2614 struct e1000_hw *hw = &adapter->hw;
2615 struct e1000_ring *tx_ring = adapter->tx_ring;
2616 u64 tdba;
2617 u32 tdlen, tctl, tipg, tarc;
2618 u32 ipgr1, ipgr2;
2619
2620 /* Setup the HW Tx Head and Tail descriptor pointers */
2621 tdba = tx_ring->dma;
2622 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2623 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2624 ew32(TDBAH, (tdba >> 32));
2625 ew32(TDLEN, tdlen);
2626 ew32(TDH, 0);
2627 ew32(TDT, 0);
2628 tx_ring->head = E1000_TDH;
2629 tx_ring->tail = E1000_TDT;
2630
2631 /* Set the default values for the Tx Inter Packet Gap timer */
2632 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2633 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2634 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2635
2636 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2637 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2638
2639 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2640 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2641 ew32(TIPG, tipg);
2642
2643 /* Set the Tx Interrupt Delay register */
2644 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2645 /* Tx irq moderation */
bc7f75fa
AK		 2646 ew32(TADV, adapter->tx_abs_int_delay);
2647
2648 /* Program the Transmit Control Register */
2649 tctl = er32(TCTL);
2650 tctl &= ~E1000_TCTL_CT;
2651 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2652 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2653
2654 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2655 tarc = er32(TARC(0));
ad68076e
BA		 2656 /*
2657 * set the speed mode bit, we'll clear it if we're not at
2658 * gigabit link later
2659 */
bc7f75fa
AK		 2660#define SPEED_MODE_BIT (1 << 21)
2661 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2662 ew32(TARC(0), tarc);
bc7f75fa
AK		 2663 }
2664
2665 /* errata: program both queues to unweighted RR */
2666 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2667 tarc = er32(TARC(0));
bc7f75fa 2668 tarc |= 1;
e9ec2c0f
JK		 2669 ew32(TARC(0), tarc);
2670 tarc = er32(TARC(1));
bc7f75fa 2671 tarc |= 1;
e9ec2c0f 2672 ew32(TARC(1), tarc);
bc7f75fa
AK		 2673 }
2674
bc7f75fa
AK		 2675 /* Setup Transmit Descriptor Settings for eop descriptor */
2676 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2677
2678 /* only set IDE if we are delaying interrupts using the timers */
2679 if (adapter->tx_int_delay)
2680 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2681
2682 /* enable Report Status bit */
2683 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2684
2685 ew32(TCTL, tctl);
2686
edfea6e6 2687 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2688}
2689
2690/**
2691 * e1000_setup_rctl - configure the receive control registers
2692 * @adapter: Board private structure
2693 **/
2694#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2695 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2696static void e1000_setup_rctl(struct e1000_adapter *adapter)
2697{
2698 struct e1000_hw *hw = &adapter->hw;
2699 u32 rctl, rfctl;
2700 u32 psrctl = 0;
2701 u32 pages = 0;
2702
2703 /* Program MC offset vector base */
2704 rctl = er32(RCTL);
2705 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2706 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2707 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2708 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2709
2710 /* Do not Store bad packets */
2711 rctl &= ~E1000_RCTL_SBP;
2712
2713 /* Enable Long Packet receive */
2714 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2715 rctl &= ~E1000_RCTL_LPE;
2716 else
2717 rctl |= E1000_RCTL_LPE;
2718
eb7c3adb
JK		 2719 /* Some systems expect that the CRC is included in SMBUS traffic. The
2720 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2721 * host memory when this is enabled
2722 */
2723 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2724 rctl |= E1000_RCTL_SECRC;
5918bd88 2725
a4f58f54
BA		 2726 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2727 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2728 u16 phy_data;
2729
2730 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2731 phy_data &= 0xfff8;
2732 phy_data |= (1 << 2);
2733 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2734
2735 e1e_rphy(hw, 22, &phy_data);
2736 phy_data &= 0x0fff;
2737 phy_data |= (1 << 14);
2738 e1e_wphy(hw, 0x10, 0x2823);
2739 e1e_wphy(hw, 0x11, 0x0003);
2740 e1e_wphy(hw, 22, phy_data);
2741 }
2742
d3738bb8
BA		 2743 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2744 if (hw->mac.type == e1000_pch2lan) {
2745 s32 ret_val;
2746
2747 if (rctl & E1000_RCTL_LPE)
2748 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2749 else
2750 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2751 }
2752
bc7f75fa
AK		 2753 /* Setup buffer sizes */
2754 rctl &= ~E1000_RCTL_SZ_4096;
2755 rctl |= E1000_RCTL_BSEX;
2756 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2757 case 2048:
2758 default:
2759 rctl |= E1000_RCTL_SZ_2048;
2760 rctl &= ~E1000_RCTL_BSEX;
2761 break;
2762 case 4096:
2763 rctl |= E1000_RCTL_SZ_4096;
2764 break;
2765 case 8192:
2766 rctl |= E1000_RCTL_SZ_8192;
2767 break;
2768 case 16384:
2769 rctl |= E1000_RCTL_SZ_16384;
2770 break;
2771 }
2772
2773 /*
2774 * 82571 and greater support packet-split where the protocol
2775 * header is placed in skb->data and the packet data is
2776 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2777 * In the case of a non-split, skb->data is linearly filled,
2778 * followed by the page buffers. Therefore, skb->data is
2779 * sized to hold the largest protocol header.
2780 *
2781 * allocations using alloc_page take too long for regular MTU
2782 * so only enable packet split for jumbo frames
2783 *
2784 * Using pages when the page size is greater than 16k wastes
2785 * a lot of memory, since we allocate 3 pages at all times
2786 * per packet.
2787 */
bc7f75fa 2788 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2789 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2790 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2791 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2792 else
2793 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2794
2795 if (adapter->rx_ps_pages) {
2796 /* Configure extra packet-split registers */
2797 rfctl = er32(RFCTL);
2798 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2799 /*
2800 * disable packet split support for IPv6 extension headers,
2801 * because some malformed IPv6 headers can hang the Rx
2802 */
bc7f75fa
AK		 2803 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2804 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2805
2806 ew32(RFCTL, rfctl);
2807
140a7480
AK		 2808 /* Enable Packet split descriptors */
2809 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2810
2811 psrctl |= adapter->rx_ps_bsize0 >>
2812 E1000_PSRCTL_BSIZE0_SHIFT;
2813
2814 switch (adapter->rx_ps_pages) {
2815 case 3:
2816 psrctl |= PAGE_SIZE <<
2817 E1000_PSRCTL_BSIZE3_SHIFT;
2818 case 2:
2819 psrctl |= PAGE_SIZE <<
2820 E1000_PSRCTL_BSIZE2_SHIFT;
2821 case 1:
2822 psrctl |= PAGE_SIZE >>
2823 E1000_PSRCTL_BSIZE1_SHIFT;
2824 break;
2825 }
2826
2827 ew32(PSRCTL, psrctl);
2828 }
2829
2830 ew32(RCTL, rctl);
318a94d6
JK		 2831 /* just started the receive unit, no need to restart */
2832 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2833}
2834
2835/**
2836 * e1000_configure_rx - Configure Receive Unit after Reset
2837 * @adapter: board private structure
2838 *
2839 * Configure the Rx unit of the MAC after a reset.
2840 **/
2841static void e1000_configure_rx(struct e1000_adapter *adapter)
2842{
2843 struct e1000_hw *hw = &adapter->hw;
2844 struct e1000_ring *rx_ring = adapter->rx_ring;
2845 u64 rdba;
2846 u32 rdlen, rctl, rxcsum, ctrl_ext;
2847
2848 if (adapter->rx_ps_pages) {
2849 /* this is a 32 byte descriptor */
2850 rdlen = rx_ring->count *
2851 sizeof(union e1000_rx_desc_packet_split);
2852 adapter->clean_rx = e1000_clean_rx_irq_ps;
2853 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2854 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2855 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2856 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2857 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2858 } else {
97ac8cae 2859 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2860 adapter->clean_rx = e1000_clean_rx_irq;
2861 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2862 }
2863
2864 /* disable receives while setting up the descriptors */
2865 rctl = er32(RCTL);
2866 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2867 e1e_flush();
2868 msleep(10);
2869
2870 /* set the Receive Delay Timer Register */
2871 ew32(RDTR, adapter->rx_int_delay);
2872
2873 /* irq moderation */
2874 ew32(RADV, adapter->rx_abs_int_delay);
2875 if (adapter->itr_setting != 0)
ad68076e 2876 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2877
2878 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2879 /* Auto-Mask interrupts upon ICR access */
2880 ctrl_ext |= E1000_CTRL_EXT_IAME;
2881 ew32(IAM, 0xffffffff);
2882 ew32(CTRL_EXT, ctrl_ext);
2883 e1e_flush();
2884
ad68076e
BA		 2885 /*
2886 * Setup the HW Rx Head and Tail Descriptor Pointers and
2887 * the Base and Length of the Rx Descriptor Ring
2888 */
bc7f75fa 2889 rdba = rx_ring->dma;
284901a9 2890 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2891 ew32(RDBAH, (rdba >> 32));
2892 ew32(RDLEN, rdlen);
2893 ew32(RDH, 0);
2894 ew32(RDT, 0);
2895 rx_ring->head = E1000_RDH;
2896 rx_ring->tail = E1000_RDT;
2897
2898 /* Enable Receive Checksum Offload for TCP and UDP */
2899 rxcsum = er32(RXCSUM);
2900 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2901 rxcsum |= E1000_RXCSUM_TUOFL;
2902
ad68076e
BA		 2903 /*
2904 * IPv4 payload checksum for UDP fragments must be
2905 * used in conjunction with packet-split.
2906 */
bc7f75fa
AK		 2907 if (adapter->rx_ps_pages)
2908 rxcsum |= E1000_RXCSUM_IPPCSE;
2909 } else {
2910 rxcsum &= ~E1000_RXCSUM_TUOFL;
2911 /* no need to clear IPPCSE as it defaults to 0 */
2912 }
2913 ew32(RXCSUM, rxcsum);
2914
ad68076e
BA		 2915 /*
2916 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2917 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2918 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2919 */
53ec5498
BA		 2920 if (adapter->flags & FLAG_HAS_ERT) {
2921 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2922 u32 rxdctl = er32(RXDCTL(0));
2923 ew32(RXDCTL(0), rxdctl | 0x3);
2924 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2925 /*
2926 * With jumbo frames and early-receive enabled,
2927 * excessive C-state transition latencies result in
2928 * dropped transactions.
2929 */
ed77134b 2930 pm_qos_update_request(
82f68251 2931 &adapter->netdev->pm_qos_req, 55);
53ec5498 2932 } else {
ed77134b 2933 pm_qos_update_request(
82f68251 2934 &adapter->netdev->pm_qos_req,
ed77134b 2935 PM_QOS_DEFAULT_VALUE);
53ec5498 2936 }
97ac8cae 2937 }
bc7f75fa
AK		 2938
2939 /* Enable Receives */
2940 ew32(RCTL, rctl);
2941}
2942
2943/**
e2de3eb6 2944 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2945 * @hw: pointer to the HW structure
2946 * @mc_addr_list: array of multicast addresses to program
2947 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2948 *
ab8932f3 2949 * Updates the Multicast Table Array.
bc7f75fa 2950 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2951 **/
e2de3eb6 2952static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2953 u32 mc_addr_count)
bc7f75fa 2954{
ab8932f3 2955 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2956}
2957
2958/**
2959 * e1000_set_multi - Multicast and Promiscuous mode set
2960 * @netdev: network interface device structure
2961 *
2962 * The set_multi entry point is called whenever the multicast address
2963 * list or the network interface flags are updated. This routine is
2964 * responsible for configuring the hardware for proper multicast,
2965 * promiscuous mode, and all-multi behavior.
2966 **/
2967static void e1000_set_multi(struct net_device *netdev)
2968{
2969 struct e1000_adapter *adapter = netdev_priv(netdev);
2970 struct e1000_hw *hw = &adapter->hw;
22bedad3 2971 struct netdev_hw_addr *ha;
bc7f75fa
AK		 2972 u8 *mta_list;
2973 u32 rctl;
2974 int i;
2975
2976 /* Check for Promiscuous and All Multicast modes */
2977
2978 rctl = er32(RCTL);
2979
2980 if (netdev->flags & IFF_PROMISC) {
2981 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2982 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2983 } else {
746b9f02
PM		 2984 if (netdev->flags & IFF_ALLMULTI) {
2985 rctl |= E1000_RCTL_MPE;
2986 rctl &= ~E1000_RCTL_UPE;
2987 } else {
2988 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2989 }
78ed11a5 2990 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2991 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2992 }
2993
2994 ew32(RCTL, rctl);
2995
7aeef972
JP		 2996 if (!netdev_mc_empty(netdev)) {
2997 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 2998 if (!mta_list)
2999 return;
3000
3001 /* prepare a packed array of only addresses. */
7aeef972 3002 i = 0;
22bedad3
JP		 3003 netdev_for_each_mc_addr(ha, netdev)
3004 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3005
ab8932f3 3006 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3007 kfree(mta_list);
3008 } else {
3009 /*
3010 * if we're called from probe, we might not have
3011 * anything to do here, so clear out the list
3012 */
ab8932f3 3013 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3014 }
3015}
3016
3017/**
ad68076e 3018 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3019 * @adapter: private board structure
3020 **/
3021static void e1000_configure(struct e1000_adapter *adapter)
3022{
3023 e1000_set_multi(adapter->netdev);
3024
3025 e1000_restore_vlan(adapter);
cd791618 3026 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3027
3028 e1000_configure_tx(adapter);
3029 e1000_setup_rctl(adapter);
3030 e1000_configure_rx(adapter);
ad68076e 3031 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3032}
3033
3034/**
3035 * e1000e_power_up_phy - restore link in case the phy was powered down
3036 * @adapter: address of board private structure
3037 *
3038 * The phy may be powered down to save power and turn off link when the
3039 * driver is unloaded and wake on lan is not enabled (among others)
3040 * *** this routine MUST be followed by a call to e1000e_reset ***
3041 **/
3042void e1000e_power_up_phy(struct e1000_adapter *adapter)
3043{
17f208de
BA		 3044 if (adapter->hw.phy.ops.power_up)
3045 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3046
3047 adapter->hw.mac.ops.setup_link(&adapter->hw);
3048}
3049
3050/**
3051 * e1000_power_down_phy - Power down the PHY
3052 *
17f208de
BA		 3053 * Power down the PHY so no link is implied when interface is down.
3054 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3055 */
3056static void e1000_power_down_phy(struct e1000_adapter *adapter)
3057{
bc7f75fa 3058 /* WoL is enabled */
23b66e2b 3059 if (adapter->wol)
bc7f75fa
AK		 3060 return;
3061
17f208de
BA		 3062 if (adapter->hw.phy.ops.power_down)
3063 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3064}
3065
3066/**
3067 * e1000e_reset - bring the hardware into a known good state
3068 *
3069 * This function boots the hardware and enables some settings that
3070 * require a configuration cycle of the hardware - those cannot be
3071 * set/changed during runtime. After reset the device needs to be
ad68076e 3072 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3073 */
3074void e1000e_reset(struct e1000_adapter *adapter)
3075{
3076 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3077 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3078 struct e1000_hw *hw = &adapter->hw;
3079 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3080 u32 pba = adapter->pba;
bc7f75fa
AK		 3081 u16 hwm;
3082
ad68076e 3083 /* reset Packet Buffer Allocation to default */
318a94d6 3084 ew32(PBA, pba);
df762464 3085
318a94d6 3086 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3087 /*
3088 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3089 * large enough to accommodate two full transmit packets,
3090 * rounded up to the next 1KB and expressed in KB. Likewise,
3091 * the Rx FIFO should be large enough to accommodate at least
3092 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3093 * expressed in KB.
3094 */
df762464 3095 pba = er32(PBA);
bc7f75fa 3096 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3097 tx_space = pba >> 16;
bc7f75fa 3098 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3099 pba &= 0xffff;
ad68076e
BA		 3100 /*
3101 * the Tx fifo also stores 16 bytes of information about the tx
3102 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3103 */
3104 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3105 sizeof(struct e1000_tx_desc) -
3106 ETH_FCS_LEN) * 2;
3107 min_tx_space = ALIGN(min_tx_space, 1024);
3108 min_tx_space >>= 10;
3109 /* software strips receive CRC, so leave room for it */
318a94d6 3110 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3111 min_rx_space = ALIGN(min_rx_space, 1024);
3112 min_rx_space >>= 10;
3113
ad68076e
BA		 3114 /*
3115 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3116 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3117 * allocation, take space away from current Rx allocation
3118 */
df762464
AK		 3119 if ((tx_space < min_tx_space) &&
3120 ((min_tx_space - tx_space) < pba)) {
3121 pba -= min_tx_space - tx_space;
bc7f75fa 3122
ad68076e
BA		 3123 /*
3124 * if short on Rx space, Rx wins and must trump tx
3125 * adjustment or use Early Receive if available
3126 */
df762464 3127 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3128 (!(adapter->flags & FLAG_HAS_ERT)))
3129 /* ERT enabled in e1000_configure_rx */
df762464 3130 pba = min_rx_space;
bc7f75fa 3131 }
df762464
AK		 3132
3133 ew32(PBA, pba);
bc7f75fa
AK		 3134 }
3135
bc7f75fa 3136
ad68076e
BA		 3137 /*
3138 * flow control settings
3139 *
38eb394e 3140 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3141 * (or the size used for early receive) above it in the Rx FIFO.
3142 * Set it to the lower of:
3143 * - 90% of the Rx FIFO size, and
3144 * - the full Rx FIFO size minus the early receive size (for parts
3145 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3146 * - the full Rx FIFO size minus one full frame
ad68076e 3147 */
d3738bb8
BA		 3148 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3149 fc->pause_time = 0xFFFF;
3150 else
3151 fc->pause_time = E1000_FC_PAUSE_TIME;
3152 fc->send_xon = 1;
3153 fc->current_mode = fc->requested_mode;
3154
3155 switch (hw->mac.type) {
3156 default:
3157 if ((adapter->flags & FLAG_HAS_ERT) &&
3158 (adapter->netdev->mtu > ETH_DATA_LEN))
3159 hwm = min(((pba << 10) * 9 / 10),
3160 ((pba << 10) - (E1000_ERT_2048 << 3)));
3161 else
3162 hwm = min(((pba << 10) * 9 / 10),
3163 ((pba << 10) - adapter->max_frame_size));
3164
3165 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3166 fc->low_water = fc->high_water - 8;
3167 break;
3168 case e1000_pchlan:
38eb394e
BA		 3169 /*
3170 * Workaround PCH LOM adapter hangs with certain network
3171 * loads. If hangs persist, try disabling Tx flow control.
3172 */
3173 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3174 fc->high_water = 0x3500;
3175 fc->low_water = 0x1500;
3176 } else {
3177 fc->high_water = 0x5000;
3178 fc->low_water = 0x3000;
3179 }
a305595b 3180 fc->refresh_time = 0x1000;
d3738bb8
BA		 3181 break;
3182 case e1000_pch2lan:
3183 fc->high_water = 0x05C20;
3184 fc->low_water = 0x05048;
3185 fc->pause_time = 0x0650;
3186 fc->refresh_time = 0x0400;
3187 break;
38eb394e 3188 }
bc7f75fa 3189
bc7f75fa
AK		 3190 /* Allow time for pending master requests to run */
3191 mac->ops.reset_hw(hw);
97ac8cae
BA		 3192
3193 /*
3194 * For parts with AMT enabled, let the firmware know
3195 * that the network interface is in control
3196 */
c43bc57e 3197 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3198 e1000_get_hw_control(adapter);
3199
bc7f75fa
AK		 3200 ew32(WUC, 0);
3201
3202 if (mac->ops.init_hw(hw))
44defeb3 3203 e_err("Hardware Error\n");
bc7f75fa
AK		 3204
3205 e1000_update_mng_vlan(adapter);
3206
3207 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3208 ew32(VET, ETH_P_8021Q);
3209
3210 e1000e_reset_adaptive(hw);
3211 e1000_get_phy_info(hw);
3212
918d7197
BA		 3213 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3214 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3215 u16 phy_data = 0;
ad68076e
BA		 3216 /*
3217 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3218 * the return value of this function because there is nothing
ad68076e
BA		 3219 * different we would do if it failed
3220 */
bc7f75fa
AK		 3221 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3222 phy_data &= ~IGP02E1000_PM_SPD;
3223 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3224 }
bc7f75fa
AK		 3225}
3226
3227int e1000e_up(struct e1000_adapter *adapter)
3228{
3229 struct e1000_hw *hw = &adapter->hw;
3230
3231 /* hardware has been reset, we need to reload some things */
3232 e1000_configure(adapter);
3233
3234 clear_bit(__E1000_DOWN, &adapter->state);
3235
3236 napi_enable(&adapter->napi);
4662e82b
BA		 3237 if (adapter->msix_entries)
3238 e1000_configure_msix(adapter);
bc7f75fa
AK		 3239 e1000_irq_enable(adapter);
3240
4cb9be7a
JB		 3241 netif_wake_queue(adapter->netdev);
3242
bc7f75fa 3243 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3244 if (adapter->msix_entries)
3245 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3246 else
3247 ew32(ICS, E1000_ICS_LSC);
3248
bc7f75fa
AK		 3249 return 0;
3250}
3251
3252void e1000e_down(struct e1000_adapter *adapter)
3253{
3254 struct net_device *netdev = adapter->netdev;
3255 struct e1000_hw *hw = &adapter->hw;
3256 u32 tctl, rctl;
3257
ad68076e
BA		 3258 /*
3259 * signal that we're down so the interrupt handler does not
3260 * reschedule our watchdog timer
3261 */
bc7f75fa
AK		 3262 set_bit(__E1000_DOWN, &adapter->state);
3263
3264 /* disable receives in the hardware */
3265 rctl = er32(RCTL);
3266 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3267 /* flush and sleep below */
3268
4cb9be7a 3269 netif_stop_queue(netdev);
bc7f75fa
AK		 3270
3271 /* disable transmits in the hardware */
3272 tctl = er32(TCTL);
3273 tctl &= ~E1000_TCTL_EN;
3274 ew32(TCTL, tctl);
3275 /* flush both disables and wait for them to finish */
3276 e1e_flush();
3277 msleep(10);
3278
3279 napi_disable(&adapter->napi);
3280 e1000_irq_disable(adapter);
3281
3282 del_timer_sync(&adapter->watchdog_timer);
3283 del_timer_sync(&adapter->phy_info_timer);
3284
bc7f75fa
AK		 3285 netif_carrier_off(netdev);
3286 adapter->link_speed = 0;
3287 adapter->link_duplex = 0;
3288
52cc3086
JK		 3289 if (!pci_channel_offline(adapter->pdev))
3290 e1000e_reset(adapter);
bc7f75fa
AK		 3291 e1000_clean_tx_ring(adapter);
3292 e1000_clean_rx_ring(adapter);
3293
3294 /*
3295 * TODO: for power management, we could drop the link and
3296 * pci_disable_device here.
3297 */
3298}
3299
3300void e1000e_reinit_locked(struct e1000_adapter *adapter)
3301{
3302 might_sleep();
3303 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3304 msleep(1);
3305 e1000e_down(adapter);
3306 e1000e_up(adapter);
3307 clear_bit(__E1000_RESETTING, &adapter->state);
3308}
3309
3310/**
3311 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3312 * @adapter: board private structure to initialize
3313 *
3314 * e1000_sw_init initializes the Adapter private data structure.
3315 * Fields are initialized based on PCI device information and
3316 * OS network device settings (MTU size).
3317 **/
3318static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3319{
bc7f75fa
AK		 3320 struct net_device *netdev = adapter->netdev;
3321
3322 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3323 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3324 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3325 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3326
4662e82b 3327 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3328
4662e82b
BA		 3329 if (e1000_alloc_queues(adapter))
3330 return -ENOMEM;
bc7f75fa 3331
bc7f75fa 3332 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3333 e1000_irq_disable(adapter);
3334
bc7f75fa
AK		 3335 set_bit(__E1000_DOWN, &adapter->state);
3336 return 0;
bc7f75fa
AK		 3337}
3338
f8d59f78
BA		 3339/**
3340 * e1000_intr_msi_test - Interrupt Handler
3341 * @irq: interrupt number
3342 * @data: pointer to a network interface device structure
3343 **/
3344static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3345{
3346 struct net_device *netdev = data;
3347 struct e1000_adapter *adapter = netdev_priv(netdev);
3348 struct e1000_hw *hw = &adapter->hw;
3349 u32 icr = er32(ICR);
3350
3bb99fe2 3351 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3352 if (icr & E1000_ICR_RXSEQ) {
3353 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3354 wmb();
3355 }
3356
3357 return IRQ_HANDLED;
3358}
3359
3360/**
3361 * e1000_test_msi_interrupt - Returns 0 for successful test
3362 * @adapter: board private struct
3363 *
3364 * code flow taken from tg3.c
3365 **/
3366static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3367{
3368 struct net_device *netdev = adapter->netdev;
3369 struct e1000_hw *hw = &adapter->hw;
3370 int err;
3371
3372 /* poll_enable hasn't been called yet, so don't need disable */
3373 /* clear any pending events */
3374 er32(ICR);
3375
3376 /* free the real vector and request a test handler */
3377 e1000_free_irq(adapter);
4662e82b 3378 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3379
3380 /* Assume that the test fails, if it succeeds then the test
3381 * MSI irq handler will unset this flag */
3382 adapter->flags |= FLAG_MSI_TEST_FAILED;
3383
3384 err = pci_enable_msi(adapter->pdev);
3385 if (err)
3386 goto msi_test_failed;
3387
a0607fd3 3388 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3389 netdev->name, netdev);
3390 if (err) {
3391 pci_disable_msi(adapter->pdev);
3392 goto msi_test_failed;
3393 }
3394
3395 wmb();
3396
3397 e1000_irq_enable(adapter);
3398
3399 /* fire an unusual interrupt on the test handler */
3400 ew32(ICS, E1000_ICS_RXSEQ);
3401 e1e_flush();
3402 msleep(50);
3403
3404 e1000_irq_disable(adapter);
3405
3406 rmb();
3407
3408 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3409 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3410 err = -EIO;
3411 e_info("MSI interrupt test failed!\n");
3412 }
3413
3414 free_irq(adapter->pdev->irq, netdev);
3415 pci_disable_msi(adapter->pdev);
3416
3417 if (err == -EIO)
3418 goto msi_test_failed;
3419
3420 /* okay so the test worked, restore settings */
3bb99fe2 3421 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3422msi_test_failed:
4662e82b 3423 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3424 e1000_request_irq(adapter);
3425 return err;
3426}
3427
3428/**
3429 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3430 * @adapter: board private struct
3431 *
3432 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3433 **/
3434static int e1000_test_msi(struct e1000_adapter *adapter)
3435{
3436 int err;
3437 u16 pci_cmd;
3438
3439 if (!(adapter->flags & FLAG_MSI_ENABLED))
3440 return 0;
3441
3442 /* disable SERR in case the MSI write causes a master abort */
3443 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3444 if (pci_cmd & PCI_COMMAND_SERR)
3445 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3446 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3447
3448 err = e1000_test_msi_interrupt(adapter);
3449
36f2407f
DN		 3450 /* re-enable SERR */
3451 if (pci_cmd & PCI_COMMAND_SERR) {
3452 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3453 pci_cmd |= PCI_COMMAND_SERR;
3454 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3455 }
f8d59f78
BA		 3456
3457 /* success ! */
3458 if (!err)
3459 return 0;
3460
3461 /* EIO means MSI test failed */
3462 if (err != -EIO)
3463 return err;
3464
3465 /* back to INTx mode */
3466 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3467
3468 e1000_free_irq(adapter);
3469
3470 err = e1000_request_irq(adapter);
3471
3472 return err;
3473}
3474
bc7f75fa
AK		 3475/**
3476 * e1000_open - Called when a network interface is made active
3477 * @netdev: network interface device structure
3478 *
3479 * Returns 0 on success, negative value on failure
3480 *
3481 * The open entry point is called when a network interface is made
3482 * active by the system (IFF_UP). At this point all resources needed
3483 * for transmit and receive operations are allocated, the interrupt
3484 * handler is registered with the OS, the watchdog timer is started,
3485 * and the stack is notified that the interface is ready.
3486 **/
3487static int e1000_open(struct net_device *netdev)
3488{
3489 struct e1000_adapter *adapter = netdev_priv(netdev);
3490 struct e1000_hw *hw = &adapter->hw;
23606cf5 3491 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3492 int err;
3493
3494 /* disallow open during test */
3495 if (test_bit(__E1000_TESTING, &adapter->state))
3496 return -EBUSY;
3497
23606cf5
RW		 3498 pm_runtime_get_sync(&pdev->dev);
3499
9c563d20
JB		 3500 netif_carrier_off(netdev);
3501
bc7f75fa
AK		 3502 /* allocate transmit descriptors */
3503 err = e1000e_setup_tx_resources(adapter);
3504 if (err)
3505 goto err_setup_tx;
3506
3507 /* allocate receive descriptors */
3508 err = e1000e_setup_rx_resources(adapter);
3509 if (err)
3510 goto err_setup_rx;
3511
11b08be8
BA		 3512 /*
3513 * If AMT is enabled, let the firmware know that the network
3514 * interface is now open and reset the part to a known state.
3515 */
3516 if (adapter->flags & FLAG_HAS_AMT) {
3517 e1000_get_hw_control(adapter);
3518 e1000e_reset(adapter);
3519 }
3520
bc7f75fa
AK		 3521 e1000e_power_up_phy(adapter);
3522
3523 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3524 if ((adapter->hw.mng_cookie.status &
3525 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3526 e1000_update_mng_vlan(adapter);
3527
c128ec29
FM		 3528 /* DMA latency requirement to workaround early-receive/jumbo issue */
3529 if (adapter->flags & FLAG_HAS_ERT)
6ba74014
LT		 3530 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3531 PM_QOS_CPU_DMA_LATENCY,
3532 PM_QOS_DEFAULT_VALUE);
c128ec29 3533
ad68076e
BA		 3534 /*
3535 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3536 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3537 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3538 * clean_rx handler before we do so.
3539 */
bc7f75fa
AK		 3540 e1000_configure(adapter);
3541
3542 err = e1000_request_irq(adapter);
3543 if (err)
3544 goto err_req_irq;
3545
f8d59f78
BA		 3546 /*
3547 * Work around PCIe errata with MSI interrupts causing some chipsets to
3548 * ignore e1000e MSI messages, which means we need to test our MSI
3549 * interrupt now
3550 */
4662e82b 3551 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3552 err = e1000_test_msi(adapter);
3553 if (err) {
3554 e_err("Interrupt allocation failed\n");
3555 goto err_req_irq;
3556 }
3557 }
3558
bc7f75fa
AK		 3559 /* From here on the code is the same as e1000e_up() */
3560 clear_bit(__E1000_DOWN, &adapter->state);
3561
3562 napi_enable(&adapter->napi);
3563
3564 e1000_irq_enable(adapter);
3565
4cb9be7a 3566 netif_start_queue(netdev);
d55b53ff 3567
23606cf5
RW		 3568 adapter->idle_check = true;
3569 pm_runtime_put(&pdev->dev);
3570
bc7f75fa 3571 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3572 if (adapter->msix_entries)
3573 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3574 else
3575 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3576
3577 return 0;
3578
3579err_req_irq:
3580 e1000_release_hw_control(adapter);
3581 e1000_power_down_phy(adapter);
3582 e1000e_free_rx_resources(adapter);
3583err_setup_rx:
3584 e1000e_free_tx_resources(adapter);
3585err_setup_tx:
3586 e1000e_reset(adapter);
23606cf5 3587 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3588
3589 return err;
3590}
3591
3592/**
3593 * e1000_close - Disables a network interface
3594 * @netdev: network interface device structure
3595 *
3596 * Returns 0, this is not allowed to fail
3597 *
3598 * The close entry point is called when an interface is de-activated
3599 * by the OS. The hardware is still under the drivers control, but
3600 * needs to be disabled. A global MAC reset is issued to stop the
3601 * hardware, and all transmit and receive resources are freed.
3602 **/
3603static int e1000_close(struct net_device *netdev)
3604{
3605 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3606 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3607
3608 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3609
3610 pm_runtime_get_sync(&pdev->dev);
3611
3612 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3613 e1000e_down(adapter);
3614 e1000_free_irq(adapter);
3615 }
bc7f75fa 3616 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3617
3618 e1000e_free_tx_resources(adapter);
3619 e1000e_free_rx_resources(adapter);
3620
ad68076e
BA		 3621 /*
3622 * kill manageability vlan ID if supported, but not if a vlan with
3623 * the same ID is registered on the host OS (let 8021q kill it)
3624 */
bc7f75fa
AK		 3625 if ((adapter->hw.mng_cookie.status &
3626 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3627 !(adapter->vlgrp &&
3628 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3629 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3630
ad68076e
BA		 3631 /*
3632 * If AMT is enabled, let the firmware know that the network
3633 * interface is now closed
3634 */
c43bc57e 3635 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3636 e1000_release_hw_control(adapter);
3637
6ba74014
LT		 3638 if (adapter->flags & FLAG_HAS_ERT)
3639 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3640
23606cf5
RW		 3641 pm_runtime_put_sync(&pdev->dev);
3642
bc7f75fa
AK		 3643 return 0;
3644}
3645/**
3646 * e1000_set_mac - Change the Ethernet Address of the NIC
3647 * @netdev: network interface device structure
3648 * @p: pointer to an address structure
3649 *
3650 * Returns 0 on success, negative on failure
3651 **/
3652static int e1000_set_mac(struct net_device *netdev, void *p)
3653{
3654 struct e1000_adapter *adapter = netdev_priv(netdev);
3655 struct sockaddr *addr = p;
3656
3657 if (!is_valid_ether_addr(addr->sa_data))
3658 return -EADDRNOTAVAIL;
3659
3660 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3661 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3662
3663 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3664
3665 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3666 /* activate the work around */
3667 e1000e_set_laa_state_82571(&adapter->hw, 1);
3668
ad68076e
BA		 3669 /*
3670 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3671 * between the time RAR[0] gets clobbered and the time it
3672 * gets fixed (in e1000_watchdog), the actual LAA is in one
3673 * of the RARs and no incoming packets directed to this port
3674 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3675 * RAR[14]
3676 */
bc7f75fa
AK		 3677 e1000e_rar_set(&adapter->hw,
3678 adapter->hw.mac.addr,
3679 adapter->hw.mac.rar_entry_count - 1);
3680 }
3681
3682 return 0;
3683}
3684
a8f88ff5
JB		 3685/**
3686 * e1000e_update_phy_task - work thread to update phy
3687 * @work: pointer to our work struct
3688 *
3689 * this worker thread exists because we must acquire a
3690 * semaphore to read the phy, which we could msleep while
3691 * waiting for it, and we can't msleep in a timer.
3692 **/
3693static void e1000e_update_phy_task(struct work_struct *work)
3694{
3695 struct e1000_adapter *adapter = container_of(work,
3696 struct e1000_adapter, update_phy_task);
3697 e1000_get_phy_info(&adapter->hw);
3698}
3699
ad68076e
BA		 3700/*
3701 * Need to wait a few seconds after link up to get diagnostic information from
3702 * the phy
3703 */
bc7f75fa
AK		 3704static void e1000_update_phy_info(unsigned long data)
3705{
3706 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3707 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3708}
3709
8c7bbb92
BA		 3710/**
3711 * e1000e_update_phy_stats - Update the PHY statistics counters
3712 * @adapter: board private structure
3713 **/
3714static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3715{
3716 struct e1000_hw *hw = &adapter->hw;
3717 s32 ret_val;
3718 u16 phy_data;
3719
3720 ret_val = hw->phy.ops.acquire(hw);
3721 if (ret_val)
3722 return;
3723
3724 hw->phy.addr = 1;
3725
3726#define HV_PHY_STATS_PAGE 778
3727 /*
3728 * A page set is expensive so check if already on desired page.
3729 * If not, set to the page with the PHY status registers.
3730 */
3731 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3732 &phy_data);
3733 if (ret_val)
3734 goto release;
3735 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3736 ret_val = e1000e_write_phy_reg_mdic(hw,
3737 IGP01E1000_PHY_PAGE_SELECT,
3738 (HV_PHY_STATS_PAGE <<
3739 IGP_PAGE_SHIFT));
3740 if (ret_val)
3741 goto release;
3742 }
3743
3744 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3745
3746 /* Single Collision Count */
3747 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3748 &phy_data);
3749 ret_val = e1000e_read_phy_reg_mdic(hw,
3750 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3751 &phy_data);
3752 if (!ret_val)
3753 adapter->stats.scc += phy_data;
3754
3755 /* Excessive Collision Count */
3756 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3757 &phy_data);
3758 ret_val = e1000e_read_phy_reg_mdic(hw,
3759 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3760 &phy_data);
3761 if (!ret_val)
3762 adapter->stats.ecol += phy_data;
3763
3764 /* Multiple Collision Count */
3765 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3766 &phy_data);
3767 ret_val = e1000e_read_phy_reg_mdic(hw,
3768 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3769 &phy_data);
3770 if (!ret_val)
3771 adapter->stats.mcc += phy_data;
3772
3773 /* Late Collision Count */
3774 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3775 &phy_data);
3776 ret_val = e1000e_read_phy_reg_mdic(hw,
3777 HV_LATECOL_LOWER &
3778 MAX_PHY_REG_ADDRESS,
3779 &phy_data);
3780 if (!ret_val)
3781 adapter->stats.latecol += phy_data;
3782
3783 /* Collision Count - also used for adaptive IFS */
3784 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3785 &phy_data);
3786 ret_val = e1000e_read_phy_reg_mdic(hw,
3787 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3788 &phy_data);
3789 if (!ret_val)
3790 hw->mac.collision_delta = phy_data;
3791
3792 /* Defer Count */
3793 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3794 &phy_data);
3795 ret_val = e1000e_read_phy_reg_mdic(hw,
3796 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3797 &phy_data);
3798 if (!ret_val)
3799 adapter->stats.dc += phy_data;
3800
3801 /* Transmit with no CRS */
3802 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3803 &phy_data);
3804 ret_val = e1000e_read_phy_reg_mdic(hw,
3805 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3806 &phy_data);
3807 if (!ret_val)
3808 adapter->stats.tncrs += phy_data;
3809
3810release:
3811 hw->phy.ops.release(hw);
3812}
3813
bc7f75fa
AK		 3814/**
3815 * e1000e_update_stats - Update the board statistics counters
3816 * @adapter: board private structure
3817 **/
3818void e1000e_update_stats(struct e1000_adapter *adapter)
3819{
7274c20f 3820 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3821 struct e1000_hw *hw = &adapter->hw;
3822 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3823
3824 /*
3825 * Prevent stats update while adapter is being reset, or if the pci
3826 * connection is down.
3827 */
3828 if (adapter->link_speed == 0)
3829 return;
3830 if (pci_channel_offline(pdev))
3831 return;
3832
bc7f75fa
AK		 3833 adapter->stats.crcerrs += er32(CRCERRS);
3834 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3835 adapter->stats.gorc += er32(GORCL);
3836 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3837 adapter->stats.bprc += er32(BPRC);
3838 adapter->stats.mprc += er32(MPRC);
3839 adapter->stats.roc += er32(ROC);
3840
bc7f75fa 3841 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3842
3843 /* Half-duplex statistics */
3844 if (adapter->link_duplex == HALF_DUPLEX) {
3845 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3846 e1000e_update_phy_stats(adapter);
3847 } else {
3848 adapter->stats.scc += er32(SCC);
3849 adapter->stats.ecol += er32(ECOL);
3850 adapter->stats.mcc += er32(MCC);
3851 adapter->stats.latecol += er32(LATECOL);
3852 adapter->stats.dc += er32(DC);
3853
3854 hw->mac.collision_delta = er32(COLC);
3855
3856 if ((hw->mac.type != e1000_82574) &&
3857 (hw->mac.type != e1000_82583))
3858 adapter->stats.tncrs += er32(TNCRS);
3859 }
3860 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3861 }
8c7bbb92 3862
bc7f75fa
AK		 3863 adapter->stats.xonrxc += er32(XONRXC);
3864 adapter->stats.xontxc += er32(XONTXC);
3865 adapter->stats.xoffrxc += er32(XOFFRXC);
3866 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3867 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3868 adapter->stats.gotc += er32(GOTCL);
3869 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3870 adapter->stats.rnbc += er32(RNBC);
3871 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3872
3873 adapter->stats.mptc += er32(MPTC);
3874 adapter->stats.bptc += er32(BPTC);
3875
3876 /* used for adaptive IFS */
3877
3878 hw->mac.tx_packet_delta = er32(TPT);
3879 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3880
3881 adapter->stats.algnerrc += er32(ALGNERRC);
3882 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3883 adapter->stats.cexterr += er32(CEXTERR);
3884 adapter->stats.tsctc += er32(TSCTC);
3885 adapter->stats.tsctfc += er32(TSCTFC);
3886
bc7f75fa 3887 /* Fill out the OS statistics structure */
7274c20f
AK		 3888 netdev->stats.multicast = adapter->stats.mprc;
3889 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3890
3891 /* Rx Errors */
3892
ad68076e
BA		 3893 /*
3894 * RLEC on some newer hardware can be incorrect so build
3895 * our own version based on RUC and ROC
3896 */
7274c20f 3897 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3898 adapter->stats.crcerrs + adapter->stats.algnerrc +
3899 adapter->stats.ruc + adapter->stats.roc +
3900 adapter->stats.cexterr;
7274c20f 3901 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3902 adapter->stats.roc;
7274c20f
AK		 3903 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3904 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3905 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3906
3907 /* Tx Errors */
7274c20f 3908 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3909 adapter->stats.latecol;
7274c20f
AK		 3910 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3911 netdev->stats.tx_window_errors = adapter->stats.latecol;
3912 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3913
3914 /* Tx Dropped needs to be maintained elsewhere */
3915
bc7f75fa
AK		 3916 /* Management Stats */
3917 adapter->stats.mgptc += er32(MGTPTC);
3918 adapter->stats.mgprc += er32(MGTPRC);
3919 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3920}
3921
7c25769f
BA		 3922/**
3923 * e1000_phy_read_status - Update the PHY register status snapshot
3924 * @adapter: board private structure
3925 **/
3926static void e1000_phy_read_status(struct e1000_adapter *adapter)
3927{
3928 struct e1000_hw *hw = &adapter->hw;
3929 struct e1000_phy_regs *phy = &adapter->phy_regs;
3930 int ret_val;
7c25769f
BA		 3931
3932 if ((er32(STATUS) & E1000_STATUS_LU) &&
3933 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3934 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3935 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3936 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3937 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3938 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3939 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3940 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3941 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3942 if (ret_val)
44defeb3 3943 e_warn("Error reading PHY register\n");
7c25769f
BA		 3944 } else {
3945 /*
3946 * Do not read PHY registers if link is not up
3947 * Set values to typical power-on defaults
3948 */
3949 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3950 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3951 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3952 BMSR_ERCAP);
3953 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3954 ADVERTISE_ALL | ADVERTISE_CSMA);
3955 phy->lpa = 0;
3956 phy->expansion = EXPANSION_ENABLENPAGE;
3957 phy->ctrl1000 = ADVERTISE_1000FULL;
3958 phy->stat1000 = 0;
3959 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3960 }
7c25769f
BA		 3961}
3962
bc7f75fa
AK		 3963static void e1000_print_link_info(struct e1000_adapter *adapter)
3964{
bc7f75fa
AK		 3965 struct e1000_hw *hw = &adapter->hw;
3966 u32 ctrl = er32(CTRL);
3967
8f12fe86
BA		 3968 /* Link status message must follow this format for user tools */
3969 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3970 "Flow Control: %s\n",
3971 adapter->netdev->name,
44defeb3
JK		 3972 adapter->link_speed,
3973 (adapter->link_duplex == FULL_DUPLEX) ?
3974 "Full Duplex" : "Half Duplex",
3975 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3976 "RX/TX" :
3977 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3978 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3979}
3980
0c6bdb30 3981static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3982{
3983 struct e1000_hw *hw = &adapter->hw;
3984 bool link_active = 0;
3985 s32 ret_val = 0;
3986
3987 /*
3988 * get_link_status is set on LSC (link status) interrupt or
3989 * Rx sequence error interrupt. get_link_status will stay
3990 * false until the check_for_link establishes link
3991 * for copper adapters ONLY
3992 */
3993 switch (hw->phy.media_type) {
3994 case e1000_media_type_copper:
3995 if (hw->mac.get_link_status) {
3996 ret_val = hw->mac.ops.check_for_link(hw);
3997 link_active = !hw->mac.get_link_status;
3998 } else {
3999 link_active = 1;
4000 }
4001 break;
4002 case e1000_media_type_fiber:
4003 ret_val = hw->mac.ops.check_for_link(hw);
4004 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4005 break;
4006 case e1000_media_type_internal_serdes:
4007 ret_val = hw->mac.ops.check_for_link(hw);
4008 link_active = adapter->hw.mac.serdes_has_link;
4009 break;
4010 default:
4011 case e1000_media_type_unknown:
4012 break;
4013 }
4014
4015 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4016 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4017 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4018 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4019 }
4020
4021 return link_active;
4022}
4023
4024static void e1000e_enable_receives(struct e1000_adapter *adapter)
4025{
4026 /* make sure the receive unit is started */
4027 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4028 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4029 struct e1000_hw *hw = &adapter->hw;
4030 u32 rctl = er32(RCTL);
4031 ew32(RCTL, rctl | E1000_RCTL_EN);
4032 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4033 }
4034}
4035
bc7f75fa
AK		 4036/**
4037 * e1000_watchdog - Timer Call-back
4038 * @data: pointer to adapter cast into an unsigned long
4039 **/
4040static void e1000_watchdog(unsigned long data)
4041{
4042 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4043
4044 /* Do the rest outside of interrupt context */
4045 schedule_work(&adapter->watchdog_task);
4046
4047 /* TODO: make this use queue_delayed_work() */
4048}
4049
4050static void e1000_watchdog_task(struct work_struct *work)
4051{
4052 struct e1000_adapter *adapter = container_of(work,
4053 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4054 struct net_device *netdev = adapter->netdev;
4055 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4056 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4057 struct e1000_ring *tx_ring = adapter->tx_ring;
4058 struct e1000_hw *hw = &adapter->hw;
4059 u32 link, tctl;
bc7f75fa
AK		 4060 int tx_pending = 0;
4061
b405e8df 4062 link = e1000e_has_link(adapter);
318a94d6 4063 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4064 /* Cancel scheduled suspend requests. */
4065 pm_runtime_resume(netdev->dev.parent);
4066
318a94d6 4067 e1000e_enable_receives(adapter);
bc7f75fa 4068 goto link_up;
bc7f75fa
AK		 4069 }
4070
4071 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4072 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4073 e1000_update_mng_vlan(adapter);
4074
bc7f75fa
AK		 4075 if (link) {
4076 if (!netif_carrier_ok(netdev)) {
4077 bool txb2b = 1;
23606cf5
RW		 4078
4079 /* Cancel scheduled suspend requests. */
4080 pm_runtime_resume(netdev->dev.parent);
4081
318a94d6 4082 /* update snapshot of PHY registers on LSC */
7c25769f 4083 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4084 mac->ops.get_link_up_info(&adapter->hw,
4085 &adapter->link_speed,
4086 &adapter->link_duplex);
4087 e1000_print_link_info(adapter);
f4187b56
BA		 4088 /*
4089 * On supported PHYs, check for duplex mismatch only
4090 * if link has autonegotiated at 10/100 half
4091 */
4092 if ((hw->phy.type == e1000_phy_igp_3 ||
4093 hw->phy.type == e1000_phy_bm) &&
4094 (hw->mac.autoneg == true) &&
4095 (adapter->link_speed == SPEED_10 ||
4096 adapter->link_speed == SPEED_100) &&
4097 (adapter->link_duplex == HALF_DUPLEX)) {
4098 u16 autoneg_exp;
4099
4100 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4101
4102 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4103 e_info("Autonegotiated half duplex but"
4104 " link partner cannot autoneg. "
4105 " Try forcing full duplex if "
4106 "link gets many collisions.\n");
4107 }
4108
f49c57e1 4109 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4110 adapter->tx_timeout_factor = 1;
4111 switch (adapter->link_speed) {
4112 case SPEED_10:
4113 txb2b = 0;
10f1b492 4114 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4115 break;
4116 case SPEED_100:
4117 txb2b = 0;
4c86e0b9 4118 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4119 break;
4120 }
4121
ad68076e
BA		 4122 /*
4123 * workaround: re-program speed mode bit after
4124 * link-up event
4125 */
bc7f75fa
AK		 4126 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4127 !txb2b) {
4128 u32 tarc0;
e9ec2c0f 4129 tarc0 = er32(TARC(0));
bc7f75fa 4130 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4131 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4132 }
4133
ad68076e
BA		 4134 /*
4135 * disable TSO for pcie and 10/100 speeds, to avoid
4136 * some hardware issues
4137 */
bc7f75fa
AK		 4138 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4139 switch (adapter->link_speed) {
4140 case SPEED_10:
4141 case SPEED_100:
44defeb3 4142 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4143 netdev->features &= ~NETIF_F_TSO;
4144 netdev->features &= ~NETIF_F_TSO6;
4145 break;
4146 case SPEED_1000:
4147 netdev->features |= NETIF_F_TSO;
4148 netdev->features |= NETIF_F_TSO6;
4149 break;
4150 default:
4151 /* oops */
4152 break;
4153 }
4154 }
4155
ad68076e
BA		 4156 /*
4157 * enable transmits in the hardware, need to do this
4158 * after setting TARC(0)
4159 */
bc7f75fa
AK		 4160 tctl = er32(TCTL);
4161 tctl |= E1000_TCTL_EN;
4162 ew32(TCTL, tctl);
4163
75eb0fad
BA		 4164 /*
4165 * Perform any post-link-up configuration before
4166 * reporting link up.
4167 */
4168 if (phy->ops.cfg_on_link_up)
4169 phy->ops.cfg_on_link_up(hw);
4170
bc7f75fa 4171 netif_carrier_on(netdev);
bc7f75fa
AK		 4172
4173 if (!test_bit(__E1000_DOWN, &adapter->state))
4174 mod_timer(&adapter->phy_info_timer,
4175 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4176 }
4177 } else {
4178 if (netif_carrier_ok(netdev)) {
4179 adapter->link_speed = 0;
4180 adapter->link_duplex = 0;
8f12fe86
BA		 4181 /* Link status message must follow this format */
4182 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4183 adapter->netdev->name);
bc7f75fa 4184 netif_carrier_off(netdev);
bc7f75fa
AK		 4185 if (!test_bit(__E1000_DOWN, &adapter->state))
4186 mod_timer(&adapter->phy_info_timer,
4187 round_jiffies(jiffies + 2 * HZ));
4188
4189 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4190 schedule_work(&adapter->reset_task);
23606cf5
RW		 4191 else
4192 pm_schedule_suspend(netdev->dev.parent,
4193 LINK_TIMEOUT);
bc7f75fa
AK		 4194 }
4195 }
4196
4197link_up:
4198 e1000e_update_stats(adapter);
4199
4200 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4201 adapter->tpt_old = adapter->stats.tpt;
4202 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4203 adapter->colc_old = adapter->stats.colc;
4204
7c25769f
BA		 4205 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4206 adapter->gorc_old = adapter->stats.gorc;
4207 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4208 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4209
4210 e1000e_update_adaptive(&adapter->hw);
4211
4212 if (!netif_carrier_ok(netdev)) {
4213 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4214 tx_ring->count);
4215 if (tx_pending) {
ad68076e
BA		 4216 /*
4217 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4218 * but we've got queued Tx work that's never going
4219 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4220 * (Do the reset outside of interrupt context).
4221 */
bc7f75fa
AK		 4222 adapter->tx_timeout_count++;
4223 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4224 /* return immediately since reset is imminent */
4225 return;
bc7f75fa
AK		 4226 }
4227 }
4228
eab2abf5
JB		 4229 /* Simple mode for Interrupt Throttle Rate (ITR) */
4230 if (adapter->itr_setting == 4) {
4231 /*
4232 * Symmetric Tx/Rx gets a reduced ITR=2000;
4233 * Total asymmetrical Tx or Rx gets ITR=8000;
4234 * everyone else is between 2000-8000.
4235 */
4236 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4237 u32 dif = (adapter->gotc > adapter->gorc ?
4238 adapter->gotc - adapter->gorc :
4239 adapter->gorc - adapter->gotc) / 10000;
4240 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4241
4242 ew32(ITR, 1000000000 / (itr * 256));
4243 }
4244
ad68076e 4245 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4246 if (adapter->msix_entries)
4247 ew32(ICS, adapter->rx_ring->ims_val);
4248 else
4249 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4250
4251 /* Force detection of hung controller every watchdog period */
4252 adapter->detect_tx_hung = 1;
4253
ad68076e
BA		 4254 /*
4255 * With 82571 controllers, LAA may be overwritten due to controller
4256 * reset from the other port. Set the appropriate LAA in RAR[0]
4257 */
bc7f75fa
AK		 4258 if (e1000e_get_laa_state_82571(hw))
4259 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4260
4261 /* Reset the timer */
4262 if (!test_bit(__E1000_DOWN, &adapter->state))
4263 mod_timer(&adapter->watchdog_timer,
4264 round_jiffies(jiffies + 2 * HZ));
4265}
4266
4267#define E1000_TX_FLAGS_CSUM 0x00000001
4268#define E1000_TX_FLAGS_VLAN 0x00000002
4269#define E1000_TX_FLAGS_TSO 0x00000004
4270#define E1000_TX_FLAGS_IPV4 0x00000008
4271#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4272#define E1000_TX_FLAGS_VLAN_SHIFT 16
4273
4274static int e1000_tso(struct e1000_adapter *adapter,
4275 struct sk_buff *skb)
4276{
4277 struct e1000_ring *tx_ring = adapter->tx_ring;
4278 struct e1000_context_desc *context_desc;
4279 struct e1000_buffer *buffer_info;
4280 unsigned int i;
4281 u32 cmd_length = 0;
4282 u16 ipcse = 0, tucse, mss;
4283 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4284 int err;
4285
3d5e33c9
BA		 4286 if (!skb_is_gso(skb))
4287 return 0;
bc7f75fa 4288
3d5e33c9
BA		 4289 if (skb_header_cloned(skb)) {
4290 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4291 if (err)
4292 return err;
bc7f75fa
AK		 4293 }
4294
3d5e33c9
BA		 4295 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4296 mss = skb_shinfo(skb)->gso_size;
4297 if (skb->protocol == htons(ETH_P_IP)) {
4298 struct iphdr *iph = ip_hdr(skb);
4299 iph->tot_len = 0;
4300 iph->check = 0;
4301 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4302 0, IPPROTO_TCP, 0);
4303 cmd_length = E1000_TXD_CMD_IP;
4304 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4305 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4306 ipv6_hdr(skb)->payload_len = 0;
4307 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4308 &ipv6_hdr(skb)->daddr,
4309 0, IPPROTO_TCP, 0);
4310 ipcse = 0;
4311 }
4312 ipcss = skb_network_offset(skb);
4313 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4314 tucss = skb_transport_offset(skb);
4315 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4316 tucse = 0;
4317
4318 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4319 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4320
4321 i = tx_ring->next_to_use;
4322 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4323 buffer_info = &tx_ring->buffer_info[i];
4324
4325 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4326 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4327 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4328 context_desc->upper_setup.tcp_fields.tucss = tucss;
4329 context_desc->upper_setup.tcp_fields.tucso = tucso;
4330 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4331 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4332 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4333 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4334
4335 buffer_info->time_stamp = jiffies;
4336 buffer_info->next_to_watch = i;
4337
4338 i++;
4339 if (i == tx_ring->count)
4340 i = 0;
4341 tx_ring->next_to_use = i;
4342
4343 return 1;
bc7f75fa
AK		 4344}
4345
4346static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4347{
4348 struct e1000_ring *tx_ring = adapter->tx_ring;
4349 struct e1000_context_desc *context_desc;
4350 struct e1000_buffer *buffer_info;
4351 unsigned int i;
4352 u8 css;
af807c82 4353 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4354 __be16 protocol;
bc7f75fa 4355
af807c82
DG		 4356 if (skb->ip_summed != CHECKSUM_PARTIAL)
4357 return 0;
bc7f75fa 4358
5f66f208
AJ		 4359 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4360 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4361 else
4362 protocol = skb->protocol;
4363
3f518390 4364 switch (protocol) {
09640e63 4365 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4366 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4367 cmd_len |= E1000_TXD_CMD_TCP;
4368 break;
09640e63 4369 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4370 /* XXX not handling all IPV6 headers */
4371 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4372 cmd_len |= E1000_TXD_CMD_TCP;
4373 break;
4374 default:
4375 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4376 e_warn("checksum_partial proto=%x!\n",
4377 be16_to_cpu(protocol));
af807c82 4378 break;
bc7f75fa
AK		 4379 }
4380
af807c82
DG		 4381 css = skb_transport_offset(skb);
4382
4383 i = tx_ring->next_to_use;
4384 buffer_info = &tx_ring->buffer_info[i];
4385 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4386
4387 context_desc->lower_setup.ip_config = 0;
4388 context_desc->upper_setup.tcp_fields.tucss = css;
4389 context_desc->upper_setup.tcp_fields.tucso =
4390 css + skb->csum_offset;
4391 context_desc->upper_setup.tcp_fields.tucse = 0;
4392 context_desc->tcp_seg_setup.data = 0;
4393 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4394
4395 buffer_info->time_stamp = jiffies;
4396 buffer_info->next_to_watch = i;
4397
4398 i++;
4399 if (i == tx_ring->count)
4400 i = 0;
4401 tx_ring->next_to_use = i;
4402
4403 return 1;
bc7f75fa
AK		 4404}
4405
4406#define E1000_MAX_PER_TXD 8192
4407#define E1000_MAX_TXD_PWR 12
4408
4409static int e1000_tx_map(struct e1000_adapter *adapter,
4410 struct sk_buff *skb, unsigned int first,
4411 unsigned int max_per_txd, unsigned int nr_frags,
4412 unsigned int mss)
4413{
4414 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4415 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4416 struct e1000_buffer *buffer_info;
8ddc951c 4417 unsigned int len = skb_headlen(skb);
03b1320d 4418 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4419 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4420
4421 i = tx_ring->next_to_use;
4422
4423 while (len) {
1b7719c4 4424 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4425 size = min(len, max_per_txd);
4426
bc7f75fa 4427 buffer_info->length = size;
bc7f75fa 4428 buffer_info->time_stamp = jiffies;
bc7f75fa 4429 buffer_info->next_to_watch = i;
0be3f55f
NN		 4430 buffer_info->dma = dma_map_single(&pdev->dev,
4431 skb->data + offset,
4432 size, DMA_TO_DEVICE);
03b1320d 4433 buffer_info->mapped_as_page = false;
0be3f55f 4434 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4435 goto dma_error;
bc7f75fa
AK		 4436
4437 len -= size;
4438 offset += size;
03b1320d 4439 count++;
1b7719c4
AD		 4440
4441 if (len) {
4442 i++;
4443 if (i == tx_ring->count)
4444 i = 0;
4445 }
bc7f75fa
AK		 4446 }
4447
4448 for (f = 0; f < nr_frags; f++) {
4449 struct skb_frag_struct *frag;
4450
4451 frag = &skb_shinfo(skb)->frags[f];
4452 len = frag->size;
03b1320d 4453 offset = frag->page_offset;
bc7f75fa
AK		 4454
4455 while (len) {
1b7719c4
AD		 4456 i++;
4457 if (i == tx_ring->count)
4458 i = 0;
4459
bc7f75fa
AK		 4460 buffer_info = &tx_ring->buffer_info[i];
4461 size = min(len, max_per_txd);
bc7f75fa
AK		 4462
4463 buffer_info->length = size;
4464 buffer_info->time_stamp = jiffies;
bc7f75fa 4465 buffer_info->next_to_watch = i;
0be3f55f 4466 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4467 offset, size,
0be3f55f 4468 DMA_TO_DEVICE);
03b1320d 4469 buffer_info->mapped_as_page = true;
0be3f55f 4470 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4471 goto dma_error;
bc7f75fa
AK		 4472
4473 len -= size;
4474 offset += size;
4475 count++;
bc7f75fa
AK		 4476 }
4477 }
4478
9ed318d5
TH		 4479 segs = skb_shinfo(skb)->gso_segs ?: 1;
4480 /* multiply data chunks by size of headers */
4481 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4482
bc7f75fa 4483 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4484 tx_ring->buffer_info[i].segs = segs;
4485 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4486 tx_ring->buffer_info[first].next_to_watch = i;
4487
4488 return count;
03b1320d
AD		 4489
4490dma_error:
4491 dev_err(&pdev->dev, "TX DMA map failed\n");
4492 buffer_info->dma = 0;
c1fa347f 4493 if (count)
03b1320d 4494 count--;
c1fa347f
RK		 4495
4496 while (count--) {
4497 if (i==0)
03b1320d 4498 i += tx_ring->count;
c1fa347f 4499 i--;
03b1320d
AD		 4500 buffer_info = &tx_ring->buffer_info[i];
4501 e1000_put_txbuf(adapter, buffer_info);;
4502 }
4503
4504 return 0;
bc7f75fa
AK		 4505}
4506
4507static void e1000_tx_queue(struct e1000_adapter *adapter,
4508 int tx_flags, int count)
4509{
4510 struct e1000_ring *tx_ring = adapter->tx_ring;
4511 struct e1000_tx_desc *tx_desc = NULL;
4512 struct e1000_buffer *buffer_info;
4513 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4514 unsigned int i;
4515
4516 if (tx_flags & E1000_TX_FLAGS_TSO) {
4517 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4518 E1000_TXD_CMD_TSE;
4519 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4520
4521 if (tx_flags & E1000_TX_FLAGS_IPV4)
4522 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4523 }
4524
4525 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4526 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4527 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4528 }
4529
4530 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4531 txd_lower |= E1000_TXD_CMD_VLE;
4532 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4533 }
4534
4535 i = tx_ring->next_to_use;
4536
4537 while (count--) {
4538 buffer_info = &tx_ring->buffer_info[i];
4539 tx_desc = E1000_TX_DESC(*tx_ring, i);
4540 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4541 tx_desc->lower.data =
4542 cpu_to_le32(txd_lower | buffer_info->length);
4543 tx_desc->upper.data = cpu_to_le32(txd_upper);
4544
4545 i++;
4546 if (i == tx_ring->count)
4547 i = 0;
4548 }
4549
4550 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4551
ad68076e
BA		 4552 /*
4553 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4554 * know there are new descriptors to fetch. (Only
4555 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4556 * such as IA-64).
4557 */
bc7f75fa
AK		 4558 wmb();
4559
4560 tx_ring->next_to_use = i;
4561 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4562 /*
4563 * we need this if more than one processor can write to our tail
4564 * at a time, it synchronizes IO on IA64/Altix systems
4565 */
bc7f75fa
AK		 4566 mmiowb();
4567}
4568
4569#define MINIMUM_DHCP_PACKET_SIZE 282
4570static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4571 struct sk_buff *skb)
4572{
4573 struct e1000_hw *hw = &adapter->hw;
4574 u16 length, offset;
4575
4576 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4577 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4578 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4579 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4580 return 0;
4581 }
4582
4583 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4584 return 0;
4585
4586 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4587 return 0;
4588
4589 {
4590 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4591 struct udphdr *udp;
4592
4593 if (ip->protocol != IPPROTO_UDP)
4594 return 0;
4595
4596 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4597 if (ntohs(udp->dest) != 67)
4598 return 0;
4599
4600 offset = (u8 *)udp + 8 - skb->data;
4601 length = skb->len - offset;
4602 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4603 }
4604
4605 return 0;
4606}
4607
4608static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4609{
4610 struct e1000_adapter *adapter = netdev_priv(netdev);
4611
4612 netif_stop_queue(netdev);
ad68076e
BA		 4613 /*
4614 * Herbert's original patch had:
bc7f75fa 4615 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4616 * but since that doesn't exist yet, just open code it.
4617 */
bc7f75fa
AK		 4618 smp_mb();
4619
ad68076e
BA		 4620 /*
4621 * We need to check again in a case another CPU has just
4622 * made room available.
4623 */
bc7f75fa
AK		 4624 if (e1000_desc_unused(adapter->tx_ring) < size)
4625 return -EBUSY;
4626
4627 /* A reprieve! */
4628 netif_start_queue(netdev);
4629 ++adapter->restart_queue;
4630 return 0;
4631}
4632
4633static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4634{
4635 struct e1000_adapter *adapter = netdev_priv(netdev);
4636
4637 if (e1000_desc_unused(adapter->tx_ring) >= size)
4638 return 0;
4639 return __e1000_maybe_stop_tx(netdev, size);
4640}
4641
4642#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4643static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4644 struct net_device *netdev)
bc7f75fa
AK		 4645{
4646 struct e1000_adapter *adapter = netdev_priv(netdev);
4647 struct e1000_ring *tx_ring = adapter->tx_ring;
4648 unsigned int first;
4649 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4650 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4651 unsigned int tx_flags = 0;
e743d313 4652 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4653 unsigned int nr_frags;
4654 unsigned int mss;
bc7f75fa
AK		 4655 int count = 0;
4656 int tso;
4657 unsigned int f;
bc7f75fa
AK		 4658
4659 if (test_bit(__E1000_DOWN, &adapter->state)) {
4660 dev_kfree_skb_any(skb);
4661 return NETDEV_TX_OK;
4662 }
4663
4664 if (skb->len <= 0) {
4665 dev_kfree_skb_any(skb);
4666 return NETDEV_TX_OK;
4667 }
4668
4669 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4670 /*
4671 * The controller does a simple calculation to
bc7f75fa
AK		 4672 * make sure there is enough room in the FIFO before
4673 * initiating the DMA for each buffer. The calc is:
4674 * 4 = ceil(buffer len/mss). To make sure we don't
4675 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4676 * drops.
4677 */
bc7f75fa
AK		 4678 if (mss) {
4679 u8 hdr_len;
4680 max_per_txd = min(mss << 2, max_per_txd);
4681 max_txd_pwr = fls(max_per_txd) - 1;
4682
ad68076e
BA		 4683 /*
4684 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4685 * points to just header, pull a few bytes of payload from
4686 * frags into skb->data
4687 */
bc7f75fa 4688 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4689 /*
4690 * we do this workaround for ES2LAN, but it is un-necessary,
4691 * avoiding it could save a lot of cycles
4692 */
4e6c709c 4693 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4694 unsigned int pull_size;
4695
4696 pull_size = min((unsigned int)4, skb->data_len);
4697 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4698 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4699 dev_kfree_skb_any(skb);
4700 return NETDEV_TX_OK;
4701 }
e743d313 4702 len = skb_headlen(skb);
bc7f75fa
AK		 4703 }
4704 }
4705
4706 /* reserve a descriptor for the offload context */
4707 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4708 count++;
4709 count++;
4710
4711 count += TXD_USE_COUNT(len, max_txd_pwr);
4712
4713 nr_frags = skb_shinfo(skb)->nr_frags;
4714 for (f = 0; f < nr_frags; f++)
4715 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4716 max_txd_pwr);
4717
4718 if (adapter->hw.mac.tx_pkt_filtering)
4719 e1000_transfer_dhcp_info(adapter, skb);
4720
ad68076e
BA		 4721 /*
4722 * need: count + 2 desc gap to keep tail from touching
4723 * head, otherwise try next time
4724 */
92af3e95 4725 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4726 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4727
4728 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4729 tx_flags |= E1000_TX_FLAGS_VLAN;
4730 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4731 }
4732
4733 first = tx_ring->next_to_use;
4734
4735 tso = e1000_tso(adapter, skb);
4736 if (tso < 0) {
4737 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4738 return NETDEV_TX_OK;
4739 }
4740
4741 if (tso)
4742 tx_flags |= E1000_TX_FLAGS_TSO;
4743 else if (e1000_tx_csum(adapter, skb))
4744 tx_flags |= E1000_TX_FLAGS_CSUM;
4745
ad68076e
BA		 4746 /*
4747 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4748 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4749 * no longer assume, we must.
4750 */
bc7f75fa
AK		 4751 if (skb->protocol == htons(ETH_P_IP))
4752 tx_flags |= E1000_TX_FLAGS_IPV4;
4753
1b7719c4 4754 /* if count is 0 then mapping error has occured */
bc7f75fa 4755 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4756 if (count) {
4757 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4758 /* Make sure there is space in the ring for the next send. */
4759 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4760
4761 } else {
bc7f75fa 4762 dev_kfree_skb_any(skb);
1b7719c4
AD		 4763 tx_ring->buffer_info[first].time_stamp = 0;
4764 tx_ring->next_to_use = first;
bc7f75fa
AK		 4765 }
4766
bc7f75fa
AK		 4767 return NETDEV_TX_OK;
4768}
4769
4770/**
4771 * e1000_tx_timeout - Respond to a Tx Hang
4772 * @netdev: network interface device structure
4773 **/
4774static void e1000_tx_timeout(struct net_device *netdev)
4775{
4776 struct e1000_adapter *adapter = netdev_priv(netdev);
4777
4778 /* Do the reset outside of interrupt context */
4779 adapter->tx_timeout_count++;
4780 schedule_work(&adapter->reset_task);
4781}
4782
4783static void e1000_reset_task(struct work_struct *work)
4784{
4785 struct e1000_adapter *adapter;
4786 adapter = container_of(work, struct e1000_adapter, reset_task);
4787
84f4ee90
TI		 4788 e1000e_dump(adapter);
4789 e_err("Reset adapter\n");
bc7f75fa
AK		 4790 e1000e_reinit_locked(adapter);
4791}
4792
4793/**
4794 * e1000_get_stats - Get System Network Statistics
4795 * @netdev: network interface device structure
4796 *
4797 * Returns the address of the device statistics structure.
4798 * The statistics are actually updated from the timer callback.
4799 **/
4800static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4801{
bc7f75fa 4802 /* only return the current stats */
7274c20f 4803 return &netdev->stats;
bc7f75fa
AK		 4804}
4805
4806/**
4807 * e1000_change_mtu - Change the Maximum Transfer Unit
4808 * @netdev: network interface device structure
4809 * @new_mtu: new value for maximum frame size
4810 *
4811 * Returns 0 on success, negative on failure
4812 **/
4813static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4814{
4815 struct e1000_adapter *adapter = netdev_priv(netdev);
4816 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4817
2adc55c9
BA		 4818 /* Jumbo frame support */
4819 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4820 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4821 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4822 return -EINVAL;
4823 }
4824
2adc55c9
BA		 4825 /* Supported frame sizes */
4826 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4827 (max_frame > adapter->max_hw_frame_size)) {
4828 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4829 return -EINVAL;
4830 }
4831
6f461f6c
BA		 4832 /* 82573 Errata 17 */
4833 if (((adapter->hw.mac.type == e1000_82573) ||
4834 (adapter->hw.mac.type == e1000_82574)) &&
4835 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4836 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4837 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4838 }
4839
bc7f75fa
AK		 4840 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4841 msleep(1);
610c9928 4842 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4843 adapter->max_frame_size = max_frame;
610c9928
BA		 4844 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4845 netdev->mtu = new_mtu;
bc7f75fa
AK		 4846 if (netif_running(netdev))
4847 e1000e_down(adapter);
4848
ad68076e
BA		 4849 /*
4850 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4851 * means we reserve 2 more, this pushes us to allocate from the next
4852 * larger slab size.
ad68076e 4853 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4854 * However with the new *_jumbo_rx* routines, jumbo receives will use
4855 * fragmented skbs
ad68076e 4856 */
bc7f75fa 4857
9926146b 4858 if (max_frame <= 2048)
bc7f75fa
AK		 4859 adapter->rx_buffer_len = 2048;
4860 else
4861 adapter->rx_buffer_len = 4096;
4862
4863 /* adjust allocation if LPE protects us, and we aren't using SBP */
4864 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4865 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4866 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4867 + ETH_FCS_LEN;
bc7f75fa 4868
bc7f75fa
AK		 4869 if (netif_running(netdev))
4870 e1000e_up(adapter);
4871 else
4872 e1000e_reset(adapter);
4873
4874 clear_bit(__E1000_RESETTING, &adapter->state);
4875
4876 return 0;
4877}
4878
4879static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4880 int cmd)
4881{
4882 struct e1000_adapter *adapter = netdev_priv(netdev);
4883 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4884
318a94d6 4885 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4886 return -EOPNOTSUPP;
4887
4888 switch (cmd) {
4889 case SIOCGMIIPHY:
4890 data->phy_id = adapter->hw.phy.addr;
4891 break;
4892 case SIOCGMIIREG:
b16a002e
BA		 4893 e1000_phy_read_status(adapter);
4894
7c25769f
BA		 4895 switch (data->reg_num & 0x1F) {
4896 case MII_BMCR:
4897 data->val_out = adapter->phy_regs.bmcr;
4898 break;
4899 case MII_BMSR:
4900 data->val_out = adapter->phy_regs.bmsr;
4901 break;
4902 case MII_PHYSID1:
4903 data->val_out = (adapter->hw.phy.id >> 16);
4904 break;
4905 case MII_PHYSID2:
4906 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4907 break;
4908 case MII_ADVERTISE:
4909 data->val_out = adapter->phy_regs.advertise;
4910 break;
4911 case MII_LPA:
4912 data->val_out = adapter->phy_regs.lpa;
4913 break;
4914 case MII_EXPANSION:
4915 data->val_out = adapter->phy_regs.expansion;
4916 break;
4917 case MII_CTRL1000:
4918 data->val_out = adapter->phy_regs.ctrl1000;
4919 break;
4920 case MII_STAT1000:
4921 data->val_out = adapter->phy_regs.stat1000;
4922 break;
4923 case MII_ESTATUS:
4924 data->val_out = adapter->phy_regs.estatus;
4925 break;
4926 default:
bc7f75fa
AK		 4927 return -EIO;
4928 }
bc7f75fa
AK		 4929 break;
4930 case SIOCSMIIREG:
4931 default:
4932 return -EOPNOTSUPP;
4933 }
4934 return 0;
4935}
4936
4937static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4938{
4939 switch (cmd) {
4940 case SIOCGMIIPHY:
4941 case SIOCGMIIREG:
4942 case SIOCSMIIREG:
4943 return e1000_mii_ioctl(netdev, ifr, cmd);
4944 default:
4945 return -EOPNOTSUPP;
4946 }
4947}
4948
a4f58f54
BA		 4949static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4950{
4951 struct e1000_hw *hw = &adapter->hw;
4952 u32 i, mac_reg;
4953 u16 phy_reg;
4954 int retval = 0;
4955
4956 /* copy MAC RARs to PHY RARs */
d3738bb8 4957 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 4958
4959 /* copy MAC MTA to PHY MTA */
4960 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4961 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4962 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4963 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4964 }
4965
4966 /* configure PHY Rx Control register */
4967 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4968 mac_reg = er32(RCTL);
4969 if (mac_reg & E1000_RCTL_UPE)
4970 phy_reg |= BM_RCTL_UPE;
4971 if (mac_reg & E1000_RCTL_MPE)
4972 phy_reg |= BM_RCTL_MPE;
4973 phy_reg &= ~(BM_RCTL_MO_MASK);
4974 if (mac_reg & E1000_RCTL_MO_3)
4975 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4976 << BM_RCTL_MO_SHIFT);
4977 if (mac_reg & E1000_RCTL_BAM)
4978 phy_reg |= BM_RCTL_BAM;
4979 if (mac_reg & E1000_RCTL_PMCF)
4980 phy_reg |= BM_RCTL_PMCF;
4981 mac_reg = er32(CTRL);
4982 if (mac_reg & E1000_CTRL_RFCE)
4983 phy_reg |= BM_RCTL_RFCE;
4984 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4985
4986 /* enable PHY wakeup in MAC register */
4987 ew32(WUFC, wufc);
4988 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4989
4990 /* configure and enable PHY wakeup in PHY registers */
4991 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4992 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4993
4994 /* activate PHY wakeup */
94d8186a 4995 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4996 if (retval) {
4997 e_err("Could not acquire PHY\n");
4998 return retval;
4999 }
5000 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5001 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5002 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5003 if (retval) {
5004 e_err("Could not read PHY page 769\n");
5005 goto out;
5006 }
5007 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5008 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5009 if (retval)
5010 e_err("Could not set PHY Host Wakeup bit\n");
5011out:
94d8186a 5012 hw->phy.ops.release(hw);
a4f58f54
BA		 5013
5014 return retval;
5015}
5016
23606cf5
RW		 5017static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5018 bool runtime)
bc7f75fa
AK		 5019{
5020 struct net_device *netdev = pci_get_drvdata(pdev);
5021 struct e1000_adapter *adapter = netdev_priv(netdev);
5022 struct e1000_hw *hw = &adapter->hw;
5023 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5024 /* Runtime suspend should only enable wakeup for link changes */
5025 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5026 int retval = 0;
5027
5028 netif_device_detach(netdev);
5029
5030 if (netif_running(netdev)) {
5031 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5032 e1000e_down(adapter);
5033 e1000_free_irq(adapter);
5034 }
4662e82b 5035 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5036
5037 retval = pci_save_state(pdev);
5038 if (retval)
5039 return retval;
5040
5041 status = er32(STATUS);
5042 if (status & E1000_STATUS_LU)
5043 wufc &= ~E1000_WUFC_LNKC;
5044
5045 if (wufc) {
5046 e1000_setup_rctl(adapter);
5047 e1000_set_multi(netdev);
5048
5049 /* turn on all-multi mode if wake on multicast is enabled */
5050 if (wufc & E1000_WUFC_MC) {
5051 rctl = er32(RCTL);
5052 rctl |= E1000_RCTL_MPE;
5053 ew32(RCTL, rctl);
5054 }
5055
5056 ctrl = er32(CTRL);
5057 /* advertise wake from D3Cold */
5058 #define E1000_CTRL_ADVD3WUC 0x00100000
5059 /* phy power management enable */
5060 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5061 ctrl |= E1000_CTRL_ADVD3WUC;
5062 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5063 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5064 ew32(CTRL, ctrl);
5065
318a94d6
JK		 5066 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5067 adapter->hw.phy.media_type ==
5068 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5069 /* keep the laser running in D3 */
5070 ctrl_ext = er32(CTRL_EXT);
93a23f48 5071 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5072 ew32(CTRL_EXT, ctrl_ext);
5073 }
5074
97ac8cae
BA		 5075 if (adapter->flags & FLAG_IS_ICH)
5076 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5077
bc7f75fa
AK		 5078 /* Allow time for pending master requests to run */
5079 e1000e_disable_pcie_master(&adapter->hw);
5080
82776a4b 5081 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5082 /* enable wakeup by the PHY */
5083 retval = e1000_init_phy_wakeup(adapter, wufc);
5084 if (retval)
5085 return retval;
5086 } else {
5087 /* enable wakeup by the MAC */
5088 ew32(WUFC, wufc);
5089 ew32(WUC, E1000_WUC_PME_EN);
5090 }
bc7f75fa
AK		 5091 } else {
5092 ew32(WUC, 0);
5093 ew32(WUFC, 0);
bc7f75fa
AK		 5094 }
5095
4f9de721
RW		 5096 *enable_wake = !!wufc;
5097
bc7f75fa 5098 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5099 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5100 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5101 *enable_wake = true;
bc7f75fa
AK		 5102
5103 if (adapter->hw.phy.type == e1000_phy_igp_3)
5104 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5105
ad68076e
BA		 5106 /*
5107 * Release control of h/w to f/w. If f/w is AMT enabled, this
5108 * would have already happened in close and is redundant.
5109 */
bc7f75fa
AK		 5110 e1000_release_hw_control(adapter);
5111
5112 pci_disable_device(pdev);
5113
4f9de721
RW		 5114 return 0;
5115}
5116
5117static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5118{
5119 if (sleep && wake) {
5120 pci_prepare_to_sleep(pdev);
5121 return;
5122 }
5123
5124 pci_wake_from_d3(pdev, wake);
5125 pci_set_power_state(pdev, PCI_D3hot);
5126}
5127
5128static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5129 bool wake)
5130{
5131 struct net_device *netdev = pci_get_drvdata(pdev);
5132 struct e1000_adapter *adapter = netdev_priv(netdev);
5133
005cbdfc
AD		 5134 /*
5135 * The pci-e switch on some quad port adapters will report a
5136 * correctable error when the MAC transitions from D0 to D3. To
5137 * prevent this we need to mask off the correctable errors on the
5138 * downstream port of the pci-e switch.
5139 */
5140 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5141 struct pci_dev *us_dev = pdev->bus->self;
5142 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5143 u16 devctl;
5144
5145 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5146 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5147 (devctl & ~PCI_EXP_DEVCTL_CERE));
5148
4f9de721 5149 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5150
5151 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5152 } else {
4f9de721 5153 e1000_power_off(pdev, sleep, wake);
005cbdfc 5154 }
bc7f75fa
AK		 5155}
5156
6f461f6c
BA		 5157#ifdef CONFIG_PCIEASPM
5158static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5159{
5160 pci_disable_link_state(pdev, state);
5161}
5162#else
5163static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5164{
5165 int pos;
6f461f6c 5166 u16 reg16;
1eae4eb2
AK		 5167
5168 /*
6f461f6c
BA		 5169 * Both device and parent should have the same ASPM setting.
5170 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5171 */
6f461f6c
BA		 5172 pos = pci_pcie_cap(pdev);
5173 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5174 reg16 &= ~state;
5175 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5176
0c75ba22
AB		 5177 if (!pdev->bus->self)
5178 return;
5179
6f461f6c
BA		 5180 pos = pci_pcie_cap(pdev->bus->self);
5181 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5182 reg16 &= ~state;
5183 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5184}
5185#endif
5186void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5187{
5188 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5189 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5190 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5191
5192 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5193}
5194
a0340162 5195#ifdef CONFIG_PM_OPS
23606cf5 5196static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5197{
23606cf5 5198 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5199}
5200
23606cf5 5201static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5202{
5203 struct net_device *netdev = pci_get_drvdata(pdev);
5204 struct e1000_adapter *adapter = netdev_priv(netdev);
5205 struct e1000_hw *hw = &adapter->hw;
5206 u32 err;
5207
5208 pci_set_power_state(pdev, PCI_D0);
5209 pci_restore_state(pdev);
28b8f04a 5210 pci_save_state(pdev);
6f461f6c
BA		 5211 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5212 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5213
4662e82b 5214 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5215 if (netif_running(netdev)) {
5216 err = e1000_request_irq(adapter);
5217 if (err)
5218 return err;
5219 }
5220
5221 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5222
5223 /* report the system wakeup cause from S3/S4 */
5224 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5225 u16 phy_data;
5226
5227 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5228 if (phy_data) {
5229 e_info("PHY Wakeup cause - %s\n",
5230 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5231 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5232 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5233 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5234 phy_data & E1000_WUS_LNKC ? "Link Status "
5235 " Change" : "other");
5236 }
5237 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5238 } else {
5239 u32 wus = er32(WUS);
5240 if (wus) {
5241 e_info("MAC Wakeup cause - %s\n",
5242 wus & E1000_WUS_EX ? "Unicast Packet" :
5243 wus & E1000_WUS_MC ? "Multicast Packet" :
5244 wus & E1000_WUS_BC ? "Broadcast Packet" :
5245 wus & E1000_WUS_MAG ? "Magic Packet" :
5246 wus & E1000_WUS_LNKC ? "Link Status Change" :
5247 "other");
5248 }
5249 ew32(WUS, ~0);
5250 }
5251
bc7f75fa 5252 e1000e_reset(adapter);
bc7f75fa 5253
cd791618 5254 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5255
5256 if (netif_running(netdev))
5257 e1000e_up(adapter);
5258
5259 netif_device_attach(netdev);
5260
ad68076e
BA		 5261 /*
5262 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5263 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5264 * under the control of the driver.
5265 */
c43bc57e 5266 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5267 e1000_get_hw_control(adapter);
5268
5269 return 0;
5270}
23606cf5 5271
a0340162
RW		 5272#ifdef CONFIG_PM_SLEEP
5273static int e1000_suspend(struct device *dev)
5274{
5275 struct pci_dev *pdev = to_pci_dev(dev);
5276 int retval;
5277 bool wake;
5278
5279 retval = __e1000_shutdown(pdev, &wake, false);
5280 if (!retval)
5281 e1000_complete_shutdown(pdev, true, wake);
5282
5283 return retval;
5284}
5285
23606cf5
RW		 5286static int e1000_resume(struct device *dev)
5287{
5288 struct pci_dev *pdev = to_pci_dev(dev);
5289 struct net_device *netdev = pci_get_drvdata(pdev);
5290 struct e1000_adapter *adapter = netdev_priv(netdev);
5291
5292 if (e1000e_pm_ready(adapter))
5293 adapter->idle_check = true;
5294
5295 return __e1000_resume(pdev);
5296}
a0340162
RW		 5297#endif /* CONFIG_PM_SLEEP */
5298
5299#ifdef CONFIG_PM_RUNTIME
5300static int e1000_runtime_suspend(struct device *dev)
5301{
5302 struct pci_dev *pdev = to_pci_dev(dev);
5303 struct net_device *netdev = pci_get_drvdata(pdev);
5304 struct e1000_adapter *adapter = netdev_priv(netdev);
5305
5306 if (e1000e_pm_ready(adapter)) {
5307 bool wake;
5308
5309 __e1000_shutdown(pdev, &wake, true);
5310 }
5311
5312 return 0;
5313}
5314
5315static int e1000_idle(struct device *dev)
5316{
5317 struct pci_dev *pdev = to_pci_dev(dev);
5318 struct net_device *netdev = pci_get_drvdata(pdev);
5319 struct e1000_adapter *adapter = netdev_priv(netdev);
5320
5321 if (!e1000e_pm_ready(adapter))
5322 return 0;
5323
5324 if (adapter->idle_check) {
5325 adapter->idle_check = false;
5326 if (!e1000e_has_link(adapter))
5327 pm_schedule_suspend(dev, MSEC_PER_SEC);
5328 }
5329
5330 return -EBUSY;
5331}
23606cf5
RW		 5332
5333static int e1000_runtime_resume(struct device *dev)
5334{
5335 struct pci_dev *pdev = to_pci_dev(dev);
5336 struct net_device *netdev = pci_get_drvdata(pdev);
5337 struct e1000_adapter *adapter = netdev_priv(netdev);
5338
5339 if (!e1000e_pm_ready(adapter))
5340 return 0;
5341
5342 adapter->idle_check = !dev->power.runtime_auto;
5343 return __e1000_resume(pdev);
5344}
a0340162
RW		 5345#endif /* CONFIG_PM_RUNTIME */
5346#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5347
5348static void e1000_shutdown(struct pci_dev *pdev)
5349{
4f9de721
RW		 5350 bool wake = false;
5351
23606cf5 5352 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5353
5354 if (system_state == SYSTEM_POWER_OFF)
5355 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5356}
5357
5358#ifdef CONFIG_NET_POLL_CONTROLLER
5359/*
5360 * Polling 'interrupt' - used by things like netconsole to send skbs
5361 * without having to re-enable interrupts. It's not called while
5362 * the interrupt routine is executing.
5363 */
5364static void e1000_netpoll(struct net_device *netdev)
5365{
5366 struct e1000_adapter *adapter = netdev_priv(netdev);
5367
5368 disable_irq(adapter->pdev->irq);
5369 e1000_intr(adapter->pdev->irq, netdev);
5370
bc7f75fa
AK		 5371 enable_irq(adapter->pdev->irq);
5372}
5373#endif
5374
5375/**
5376 * e1000_io_error_detected - called when PCI error is detected
5377 * @pdev: Pointer to PCI device
5378 * @state: The current pci connection state
5379 *
5380 * This function is called after a PCI bus error affecting
5381 * this device has been detected.
5382 */
5383static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5384 pci_channel_state_t state)
5385{
5386 struct net_device *netdev = pci_get_drvdata(pdev);
5387 struct e1000_adapter *adapter = netdev_priv(netdev);
5388
5389 netif_device_detach(netdev);
5390
c93b5a76
MM		 5391 if (state == pci_channel_io_perm_failure)
5392 return PCI_ERS_RESULT_DISCONNECT;
5393
bc7f75fa
AK		 5394 if (netif_running(netdev))
5395 e1000e_down(adapter);
5396 pci_disable_device(pdev);
5397
5398 /* Request a slot slot reset. */
5399 return PCI_ERS_RESULT_NEED_RESET;
5400}
5401
5402/**
5403 * e1000_io_slot_reset - called after the pci bus has been reset.
5404 * @pdev: Pointer to PCI device
5405 *
5406 * Restart the card from scratch, as if from a cold-boot. Implementation
5407 * resembles the first-half of the e1000_resume routine.
5408 */
5409static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5410{
5411 struct net_device *netdev = pci_get_drvdata(pdev);
5412 struct e1000_adapter *adapter = netdev_priv(netdev);
5413 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5414 int err;
111b9dc5 5415 pci_ers_result_t result;
bc7f75fa 5416
6f461f6c
BA		 5417 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5418 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5419 err = pci_enable_device_mem(pdev);
6e4f6f6b 5420 if (err) {
bc7f75fa
AK		 5421 dev_err(&pdev->dev,
5422 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5423 result = PCI_ERS_RESULT_DISCONNECT;
5424 } else {
5425 pci_set_master(pdev);
23606cf5 5426 pdev->state_saved = true;
111b9dc5 5427 pci_restore_state(pdev);
bc7f75fa 5428
111b9dc5
JB		 5429 pci_enable_wake(pdev, PCI_D3hot, 0);
5430 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5431
111b9dc5
JB		 5432 e1000e_reset(adapter);
5433 ew32(WUS, ~0);
5434 result = PCI_ERS_RESULT_RECOVERED;
5435 }
bc7f75fa 5436
111b9dc5
JB		 5437 pci_cleanup_aer_uncorrect_error_status(pdev);
5438
5439 return result;
bc7f75fa
AK		 5440}
5441
5442/**
5443 * e1000_io_resume - called when traffic can start flowing again.
5444 * @pdev: Pointer to PCI device
5445 *
5446 * This callback is called when the error recovery driver tells us that
5447 * its OK to resume normal operation. Implementation resembles the
5448 * second-half of the e1000_resume routine.
5449 */
5450static void e1000_io_resume(struct pci_dev *pdev)
5451{
5452 struct net_device *netdev = pci_get_drvdata(pdev);
5453 struct e1000_adapter *adapter = netdev_priv(netdev);
5454
cd791618 5455 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5456
5457 if (netif_running(netdev)) {
5458 if (e1000e_up(adapter)) {
5459 dev_err(&pdev->dev,
5460 "can't bring device back up after reset\n");
5461 return;
5462 }
5463 }
5464
5465 netif_device_attach(netdev);
5466
ad68076e
BA		 5467 /*
5468 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5469 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5470 * under the control of the driver.
5471 */
c43bc57e 5472 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5473 e1000_get_hw_control(adapter);
5474
5475}
5476
5477static void e1000_print_device_info(struct e1000_adapter *adapter)
5478{
5479 struct e1000_hw *hw = &adapter->hw;
5480 struct net_device *netdev = adapter->netdev;
69e3fd8c 5481 u32 pba_num;
bc7f75fa
AK		 5482
5483 /* print bus type/speed/width info */
7c510e4b 5484 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5485 /* bus width */
5486 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5487 "Width x1"),
5488 /* MAC address */
7c510e4b 5489 netdev->dev_addr);
44defeb3
JK		 5490 e_info("Intel(R) PRO/%s Network Connection\n",
5491 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5492 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 5493 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5494 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 5495}
5496
10aa4c04
AK		 5497static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5498{
5499 struct e1000_hw *hw = &adapter->hw;
5500 int ret_val;
5501 u16 buf = 0;
5502
5503 if (hw->mac.type != e1000_82573)
5504 return;
5505
5506 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5507 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5508 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5509 dev_warn(&adapter->pdev->dev,
5510 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5511 }
10aa4c04
AK		 5512}
5513
651c2466
SH		 5514static const struct net_device_ops e1000e_netdev_ops = {
5515 .ndo_open = e1000_open,
5516 .ndo_stop = e1000_close,
00829823 5517 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5518 .ndo_get_stats = e1000_get_stats,
5519 .ndo_set_multicast_list = e1000_set_multi,
5520 .ndo_set_mac_address = e1000_set_mac,
5521 .ndo_change_mtu = e1000_change_mtu,
5522 .ndo_do_ioctl = e1000_ioctl,
5523 .ndo_tx_timeout = e1000_tx_timeout,
5524 .ndo_validate_addr = eth_validate_addr,
5525
5526 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5527 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5528 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5529#ifdef CONFIG_NET_POLL_CONTROLLER
5530 .ndo_poll_controller = e1000_netpoll,
5531#endif
5532};
5533
bc7f75fa
AK		 5534/**
5535 * e1000_probe - Device Initialization Routine
5536 * @pdev: PCI device information struct
5537 * @ent: entry in e1000_pci_tbl
5538 *
5539 * Returns 0 on success, negative on failure
5540 *
5541 * e1000_probe initializes an adapter identified by a pci_dev structure.
5542 * The OS initialization, configuring of the adapter private structure,
5543 * and a hardware reset occur.
5544 **/
5545static int __devinit e1000_probe(struct pci_dev *pdev,
5546 const struct pci_device_id *ent)
5547{
5548 struct net_device *netdev;
5549 struct e1000_adapter *adapter;
5550 struct e1000_hw *hw;
5551 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5552 resource_size_t mmio_start, mmio_len;
5553 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5554
5555 static int cards_found;
5556 int i, err, pci_using_dac;
5557 u16 eeprom_data = 0;
5558 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5559
6f461f6c
BA		 5560 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5561 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5562
f0f422e5 5563 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5564 if (err)
5565 return err;
5566
5567 pci_using_dac = 0;
0be3f55f 5568 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5569 if (!err) {
0be3f55f 5570 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5571 if (!err)
5572 pci_using_dac = 1;
5573 } else {
0be3f55f 5574 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5575 if (err) {
0be3f55f
NN		 5576 err = dma_set_coherent_mask(&pdev->dev,
5577 DMA_BIT_MASK(32));
bc7f75fa
AK		 5578 if (err) {
5579 dev_err(&pdev->dev, "No usable DMA "
5580 "configuration, aborting\n");
5581 goto err_dma;
5582 }
5583 }
5584 }
5585
e8de1481 5586 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5587 pci_select_bars(pdev, IORESOURCE_MEM),
5588 e1000e_driver_name);
bc7f75fa
AK		 5589 if (err)
5590 goto err_pci_reg;
5591
68eac460 5592 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5593 pci_enable_pcie_error_reporting(pdev);
68eac460 5594
bc7f75fa 5595 pci_set_master(pdev);
438b365a
BA		 5596 /* PCI config space info */
5597 err = pci_save_state(pdev);
5598 if (err)
5599 goto err_alloc_etherdev;
bc7f75fa
AK		 5600
5601 err = -ENOMEM;
5602 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5603 if (!netdev)
5604 goto err_alloc_etherdev;
5605
bc7f75fa
AK		 5606 SET_NETDEV_DEV(netdev, &pdev->dev);
5607
f85e4dfa
TH		 5608 netdev->irq = pdev->irq;
5609
bc7f75fa
AK		 5610 pci_set_drvdata(pdev, netdev);
5611 adapter = netdev_priv(netdev);
5612 hw = &adapter->hw;
5613 adapter->netdev = netdev;
5614 adapter->pdev = pdev;
5615 adapter->ei = ei;
5616 adapter->pba = ei->pba;
5617 adapter->flags = ei->flags;
eb7c3adb 5618 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5619 adapter->hw.adapter = adapter;
5620 adapter->hw.mac.type = ei->mac;
2adc55c9 5621 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5622 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5623
5624 mmio_start = pci_resource_start(pdev, 0);
5625 mmio_len = pci_resource_len(pdev, 0);
5626
5627 err = -EIO;
5628 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5629 if (!adapter->hw.hw_addr)
5630 goto err_ioremap;
5631
5632 if ((adapter->flags & FLAG_HAS_FLASH) &&
5633 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5634 flash_start = pci_resource_start(pdev, 1);
5635 flash_len = pci_resource_len(pdev, 1);
5636 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5637 if (!adapter->hw.flash_address)
5638 goto err_flashmap;
5639 }
5640
5641 /* construct the net_device struct */
651c2466 5642 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5643 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5644 netdev->watchdog_timeo = 5 * HZ;
5645 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5646 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5647
5648 netdev->mem_start = mmio_start;
5649 netdev->mem_end = mmio_start + mmio_len;
5650
5651 adapter->bd_number = cards_found++;
5652
4662e82b
BA		 5653 e1000e_check_options(adapter);
5654
bc7f75fa
AK		 5655 /* setup adapter struct */
5656 err = e1000_sw_init(adapter);
5657 if (err)
5658 goto err_sw_init;
5659
bc7f75fa
AK		 5660 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5661 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5662 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5663
69e3fd8c 5664 err = ei->get_variants(adapter);
bc7f75fa
AK		 5665 if (err)
5666 goto err_hw_init;
5667
4a770358
BA		 5668 if ((adapter->flags & FLAG_IS_ICH) &&
5669 (adapter->flags & FLAG_READ_ONLY_NVM))
5670 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5671
bc7f75fa
AK		 5672 hw->mac.ops.get_bus_info(&adapter->hw);
5673
318a94d6 5674 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5675
5676 /* Copper options */
318a94d6 5677 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5678 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5679 adapter->hw.phy.disable_polarity_correction = 0;
5680 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5681 }
5682
5683 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5684 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5685
5686 netdev->features = NETIF_F_SG |
5687 NETIF_F_HW_CSUM |
5688 NETIF_F_HW_VLAN_TX |
5689 NETIF_F_HW_VLAN_RX;
5690
5691 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5692 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5693
5694 netdev->features |= NETIF_F_TSO;
5695 netdev->features |= NETIF_F_TSO6;
5696
a5136e23
JK		 5697 netdev->vlan_features |= NETIF_F_TSO;
5698 netdev->vlan_features |= NETIF_F_TSO6;
5699 netdev->vlan_features |= NETIF_F_HW_CSUM;
5700 netdev->vlan_features |= NETIF_F_SG;
5701
bc7f75fa
AK		 5702 if (pci_using_dac)
5703 netdev->features |= NETIF_F_HIGHDMA;
5704
bc7f75fa
AK		 5705 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5706 adapter->flags |= FLAG_MNG_PT_ENABLED;
5707
ad68076e
BA		 5708 /*
5709 * before reading the NVM, reset the controller to
5710 * put the device in a known good starting state
5711 */
bc7f75fa
AK		 5712 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5713
5714 /*
5715 * systems with ASPM and others may see the checksum fail on the first
5716 * attempt. Let's give it a few tries
5717 */
5718 for (i = 0;; i++) {
5719 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5720 break;
5721 if (i == 2) {
44defeb3 5722 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5723 err = -EIO;
5724 goto err_eeprom;
5725 }
5726 }
5727
10aa4c04
AK		 5728 e1000_eeprom_checks(adapter);
5729
608f8a0d 5730 /* copy the MAC address */
bc7f75fa 5731 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5732 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5733
5734 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5735 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5736
5737 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5738 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5739 err = -EIO;
5740 goto err_eeprom;
5741 }
5742
5743 init_timer(&adapter->watchdog_timer);
5744 adapter->watchdog_timer.function = &e1000_watchdog;
5745 adapter->watchdog_timer.data = (unsigned long) adapter;
5746
5747 init_timer(&adapter->phy_info_timer);
5748 adapter->phy_info_timer.function = &e1000_update_phy_info;
5749 adapter->phy_info_timer.data = (unsigned long) adapter;
5750
5751 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5752 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5753 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5754 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5755 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5756
bc7f75fa
AK		 5757 /* Initialize link parameters. User can change them with ethtool */
5758 adapter->hw.mac.autoneg = 1;
309af40b 5759 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5760 adapter->hw.fc.requested_mode = e1000_fc_default;
5761 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5762 adapter->hw.phy.autoneg_advertised = 0x2f;
5763
5764 /* ring size defaults */
5765 adapter->rx_ring->count = 256;
5766 adapter->tx_ring->count = 256;
5767
5768 /*
5769 * Initial Wake on LAN setting - If APM wake is enabled in
5770 * the EEPROM, enable the ACPI Magic Packet filter
5771 */
5772 if (adapter->flags & FLAG_APME_IN_WUC) {
5773 /* APME bit in EEPROM is mapped to WUC.APME */
5774 eeprom_data = er32(WUC);
5775 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5776 if (eeprom_data & E1000_WUC_PHY_WAKE)
5777 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5778 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5779 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5780 (adapter->hw.bus.func == 1))
5781 e1000_read_nvm(&adapter->hw,
5782 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5783 else
5784 e1000_read_nvm(&adapter->hw,
5785 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5786 }
5787
5788 /* fetch WoL from EEPROM */
5789 if (eeprom_data & eeprom_apme_mask)
5790 adapter->eeprom_wol |= E1000_WUFC_MAG;
5791
5792 /*
5793 * now that we have the eeprom settings, apply the special cases
5794 * where the eeprom may be wrong or the board simply won't support
5795 * wake on lan on a particular port
5796 */
5797 if (!(adapter->flags & FLAG_HAS_WOL))
5798 adapter->eeprom_wol = 0;
5799
5800 /* initialize the wol settings based on the eeprom settings */
5801 adapter->wol = adapter->eeprom_wol;
6ff68026 5802 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5803
84527590
BA		 5804 /* save off EEPROM version number */
5805 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5806
bc7f75fa
AK		 5807 /* reset the hardware with the new settings */
5808 e1000e_reset(adapter);
5809
ad68076e
BA		 5810 /*
5811 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5812 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5813 * under the control of the driver.
5814 */
c43bc57e 5815 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5816 e1000_get_hw_control(adapter);
5817
bc7f75fa
AK		 5818 strcpy(netdev->name, "eth%d");
5819 err = register_netdev(netdev);
5820 if (err)
5821 goto err_register;
5822
9c563d20
JB		 5823 /* carrier off reporting is important to ethtool even BEFORE open */
5824 netif_carrier_off(netdev);
5825
bc7f75fa
AK		 5826 e1000_print_device_info(adapter);
5827
23606cf5
RW		 5828 if (pci_dev_run_wake(pdev)) {
5829 pm_runtime_set_active(&pdev->dev);
5830 pm_runtime_enable(&pdev->dev);
5831 }
5832 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5833
bc7f75fa
AK		 5834 return 0;
5835
5836err_register:
c43bc57e
JB		 5837 if (!(adapter->flags & FLAG_HAS_AMT))
5838 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5839err_eeprom:
5840 if (!e1000_check_reset_block(&adapter->hw))
5841 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5842err_hw_init:
bc7f75fa 5843
bc7f75fa
AK		 5844 kfree(adapter->tx_ring);
5845 kfree(adapter->rx_ring);
5846err_sw_init:
c43bc57e
JB		 5847 if (adapter->hw.flash_address)
5848 iounmap(adapter->hw.flash_address);
e82f54ba 5849 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5850err_flashmap:
bc7f75fa
AK		 5851 iounmap(adapter->hw.hw_addr);
5852err_ioremap:
5853 free_netdev(netdev);
5854err_alloc_etherdev:
f0f422e5
BA		 5855 pci_release_selected_regions(pdev,
5856 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5857err_pci_reg:
5858err_dma:
5859 pci_disable_device(pdev);
5860 return err;
5861}
5862
5863/**
5864 * e1000_remove - Device Removal Routine
5865 * @pdev: PCI device information struct
5866 *
5867 * e1000_remove is called by the PCI subsystem to alert the driver
5868 * that it should release a PCI device. The could be caused by a
5869 * Hot-Plug event, or because the driver is going to be removed from
5870 * memory.
5871 **/
5872static void __devexit e1000_remove(struct pci_dev *pdev)
5873{
5874 struct net_device *netdev = pci_get_drvdata(pdev);
5875 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5876 bool down = test_bit(__E1000_DOWN, &adapter->state);
5877
5878 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5879
ad68076e
BA		 5880 /*
5881 * flush_scheduled work may reschedule our watchdog task, so
5882 * explicitly disable watchdog tasks from being rescheduled
5883 */
23606cf5
RW		 5884 if (!down)
5885 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5886 del_timer_sync(&adapter->watchdog_timer);
5887 del_timer_sync(&adapter->phy_info_timer);
5888
41cec6f1
BA		 5889 cancel_work_sync(&adapter->reset_task);
5890 cancel_work_sync(&adapter->watchdog_task);
5891 cancel_work_sync(&adapter->downshift_task);
5892 cancel_work_sync(&adapter->update_phy_task);
5893 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5894 flush_scheduled_work();
5895
17f208de
BA		 5896 if (!(netdev->flags & IFF_UP))
5897 e1000_power_down_phy(adapter);
5898
23606cf5
RW		 5899 /* Don't lie to e1000_close() down the road. */
5900 if (!down)
5901 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5902 unregister_netdev(netdev);
5903
23606cf5
RW		 5904 if (pci_dev_run_wake(pdev)) {
5905 pm_runtime_disable(&pdev->dev);
5906 pm_runtime_set_suspended(&pdev->dev);
5907 }
5908 pm_runtime_put_noidle(&pdev->dev);
5909
ad68076e
BA		 5910 /*
5911 * Release control of h/w to f/w. If f/w is AMT enabled, this
5912 * would have already happened in close and is redundant.
5913 */
bc7f75fa
AK		 5914 e1000_release_hw_control(adapter);
5915
4662e82b 5916 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5917 kfree(adapter->tx_ring);
5918 kfree(adapter->rx_ring);
5919
5920 iounmap(adapter->hw.hw_addr);
5921 if (adapter->hw.flash_address)
5922 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5923 pci_release_selected_regions(pdev,
5924 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5925
5926 free_netdev(netdev);
5927
111b9dc5 5928 /* AER disable */
19d5afd4 5929 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5930
bc7f75fa
AK		 5931 pci_disable_device(pdev);
5932}
5933
5934/* PCI Error Recovery (ERS) */
5935static struct pci_error_handlers e1000_err_handler = {
5936 .error_detected = e1000_io_error_detected,
5937 .slot_reset = e1000_io_slot_reset,
5938 .resume = e1000_io_resume,
5939};
5940
a3aa1884 5941static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5942 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5943 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5944 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5945 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5946 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5947 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5948 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5949 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5950 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5951
bc7f75fa
AK		 5952 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5953 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5954 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5955 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5956
bc7f75fa
AK		 5957 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5958 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5959 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5960
4662e82b 5961 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5962 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5963 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5964
bc7f75fa
AK		 5965 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5966 board_80003es2lan },
5967 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5968 board_80003es2lan },
5969 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5970 board_80003es2lan },
5971 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5972 board_80003es2lan },
ad68076e 5973
bc7f75fa
AK		 5974 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5975 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5976 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5977 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5978 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5979 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5980 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5981 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5982
bc7f75fa
AK		 5983 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5984 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5985 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5986 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5987 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5988 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5989 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5990 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5991 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5992
5993 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5994 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5995 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5996
f4187b56
BA		 5997 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5998 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 5999 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6000
a4f58f54
BA		 6001 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6002 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6003 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6004 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6005
d3738bb8
BA		 6006 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6007 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6008
bc7f75fa
AK		 6009 { } /* terminate list */
6010};
6011MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6012
a0340162 6013#ifdef CONFIG_PM_OPS
23606cf5 6014static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6015 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6016 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6017 e1000_runtime_resume, e1000_idle)
23606cf5 6018};
e50208a0 6019#endif
23606cf5 6020
bc7f75fa
AK		 6021/* PCI Device API Driver */
6022static struct pci_driver e1000_driver = {
6023 .name = e1000e_driver_name,
6024 .id_table = e1000_pci_tbl,
6025 .probe = e1000_probe,
6026 .remove = __devexit_p(e1000_remove),
a0340162 6027#ifdef CONFIG_PM_OPS
23606cf5 6028 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6029#endif
6030 .shutdown = e1000_shutdown,
6031 .err_handler = &e1000_err_handler
6032};
6033
6034/**
6035 * e1000_init_module - Driver Registration Routine
6036 *
6037 * e1000_init_module is the first routine called when the driver is
6038 * loaded. All it does is register with the PCI subsystem.
6039 **/
6040static int __init e1000_init_module(void)
6041{
6042 int ret;
8544b9f7
BA		 6043 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6044 e1000e_driver_version);
451152d9 6045 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n");
bc7f75fa 6046 ret = pci_register_driver(&e1000_driver);
53ec5498 6047
bc7f75fa
AK		 6048 return ret;
6049}
6050module_init(e1000_init_module);
6051
6052/**
6053 * e1000_exit_module - Driver Exit Cleanup Routine
6054 *
6055 * e1000_exit_module is called just before the driver is removed
6056 * from memory.
6057 **/
6058static void __exit e1000_exit_module(void)
6059{
6060 pci_unregister_driver(&e1000_driver);
6061}
6062module_exit(e1000_exit_module);
6063
6064
6065MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6066MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6067MODULE_LICENSE("GPL");
6068MODULE_VERSION(DRV_VERSION);
6069
6070/* e1000_main.c */
Linux kernel - Deliverables
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