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625ba2c2 DM |
1 | /* |
2 | * This file is part of the Chelsio T4 Ethernet driver for Linux. | |
3 | * | |
ce100b8b | 4 | * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved. |
625ba2c2 DM |
5 | * |
6 | * This software is available to you under a choice of one of two | |
7 | * licenses. You may choose to be licensed under the terms of the GNU | |
8 | * General Public License (GPL) Version 2, available from the file | |
9 | * COPYING in the main directory of this source tree, or the | |
10 | * OpenIB.org BSD license below: | |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or | |
13 | * without modification, are permitted provided that the following | |
14 | * conditions are met: | |
15 | * | |
16 | * - Redistributions of source code must retain the above | |
17 | * copyright notice, this list of conditions and the following | |
18 | * disclaimer. | |
19 | * | |
20 | * - Redistributions in binary form must reproduce the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer in the documentation and/or other materials | |
23 | * provided with the distribution. | |
24 | * | |
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
32 | * SOFTWARE. | |
33 | */ | |
34 | ||
35 | #ifndef __CXGB4_OFLD_H | |
36 | #define __CXGB4_OFLD_H | |
37 | ||
38 | #include <linux/cache.h> | |
39 | #include <linux/spinlock.h> | |
40 | #include <linux/skbuff.h> | |
793dad94 | 41 | #include <linux/inetdevice.h> |
60063497 | 42 | #include <linux/atomic.h> |
625ba2c2 DM |
43 | |
44 | /* CPL message priority levels */ | |
45 | enum { | |
46 | CPL_PRIORITY_DATA = 0, /* data messages */ | |
47 | CPL_PRIORITY_SETUP = 1, /* connection setup messages */ | |
48 | CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */ | |
49 | CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */ | |
50 | CPL_PRIORITY_ACK = 1, /* RX ACK messages */ | |
51 | CPL_PRIORITY_CONTROL = 1 /* control messages */ | |
52 | }; | |
53 | ||
54 | #define INIT_TP_WR(w, tid) do { \ | |
e2ac9628 HS |
55 | (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \ |
56 | FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \ | |
57 | (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \ | |
58 | FW_WR_FLOWID_V(tid)); \ | |
625ba2c2 DM |
59 | (w)->wr.wr_lo = cpu_to_be64(0); \ |
60 | } while (0) | |
61 | ||
62 | #define INIT_TP_WR_CPL(w, cpl, tid) do { \ | |
63 | INIT_TP_WR(w, tid); \ | |
64 | OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \ | |
65 | } while (0) | |
66 | ||
67 | #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \ | |
e2ac9628 HS |
68 | (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \ |
69 | FW_WR_ATOMIC_V(atomic)); \ | |
70 | (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \ | |
71 | FW_WR_FLOWID_V(tid)); \ | |
625ba2c2 DM |
72 | (w)->wr.wr_lo = cpu_to_be64(0); \ |
73 | } while (0) | |
74 | ||
75 | /* Special asynchronous notification message */ | |
76 | #define CXGB4_MSG_AN ((void *)1) | |
77 | ||
78 | struct serv_entry { | |
79 | void *data; | |
80 | }; | |
81 | ||
82 | union aopen_entry { | |
83 | void *data; | |
84 | union aopen_entry *next; | |
85 | }; | |
86 | ||
87 | /* | |
88 | * Holds the size, base address, free list start, etc of the TID, server TID, | |
89 | * and active-open TID tables. The tables themselves are allocated dynamically. | |
90 | */ | |
91 | struct tid_info { | |
92 | void **tid_tab; | |
93 | unsigned int ntids; | |
94 | ||
95 | struct serv_entry *stid_tab; | |
96 | unsigned long *stid_bmap; | |
97 | unsigned int nstids; | |
98 | unsigned int stid_base; | |
99 | ||
100 | union aopen_entry *atid_tab; | |
101 | unsigned int natids; | |
f2b7e78d | 102 | unsigned int atid_base; |
625ba2c2 | 103 | |
f2b7e78d | 104 | struct filter_entry *ftid_tab; |
625ba2c2 DM |
105 | unsigned int nftids; |
106 | unsigned int ftid_base; | |
636f9d37 VP |
107 | unsigned int aftid_base; |
108 | unsigned int aftid_end; | |
9a4da2cd VP |
109 | /* Server filter region */ |
110 | unsigned int sftid_base; | |
111 | unsigned int nsftids; | |
625ba2c2 DM |
112 | |
113 | spinlock_t atid_lock ____cacheline_aligned_in_smp; | |
114 | union aopen_entry *afree; | |
115 | unsigned int atids_in_use; | |
116 | ||
117 | spinlock_t stid_lock; | |
118 | unsigned int stids_in_use; | |
119 | ||
120 | atomic_t tids_in_use; | |
121 | }; | |
122 | ||
123 | static inline void *lookup_tid(const struct tid_info *t, unsigned int tid) | |
124 | { | |
125 | return tid < t->ntids ? t->tid_tab[tid] : NULL; | |
126 | } | |
127 | ||
128 | static inline void *lookup_atid(const struct tid_info *t, unsigned int atid) | |
129 | { | |
130 | return atid < t->natids ? t->atid_tab[atid].data : NULL; | |
131 | } | |
132 | ||
133 | static inline void *lookup_stid(const struct tid_info *t, unsigned int stid) | |
134 | { | |
470c60c4 KS |
135 | /* Is it a server filter TID? */ |
136 | if (t->nsftids && (stid >= t->sftid_base)) { | |
137 | stid -= t->sftid_base; | |
138 | stid += t->nstids; | |
139 | } else { | |
140 | stid -= t->stid_base; | |
141 | } | |
142 | ||
dca4faeb | 143 | return stid < (t->nstids + t->nsftids) ? t->stid_tab[stid].data : NULL; |
625ba2c2 DM |
144 | } |
145 | ||
146 | static inline void cxgb4_insert_tid(struct tid_info *t, void *data, | |
147 | unsigned int tid) | |
148 | { | |
149 | t->tid_tab[tid] = data; | |
150 | atomic_inc(&t->tids_in_use); | |
151 | } | |
152 | ||
153 | int cxgb4_alloc_atid(struct tid_info *t, void *data); | |
154 | int cxgb4_alloc_stid(struct tid_info *t, int family, void *data); | |
dca4faeb | 155 | int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data); |
625ba2c2 DM |
156 | void cxgb4_free_atid(struct tid_info *t, unsigned int atid); |
157 | void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family); | |
158 | void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid); | |
625ba2c2 DM |
159 | |
160 | struct in6_addr; | |
161 | ||
162 | int cxgb4_create_server(const struct net_device *dev, unsigned int stid, | |
793dad94 VP |
163 | __be32 sip, __be16 sport, __be16 vlan, |
164 | unsigned int queue); | |
80f40c1f VP |
165 | int cxgb4_create_server6(const struct net_device *dev, unsigned int stid, |
166 | const struct in6_addr *sip, __be16 sport, | |
167 | unsigned int queue); | |
168 | int cxgb4_remove_server(const struct net_device *dev, unsigned int stid, | |
169 | unsigned int queue, bool ipv6); | |
dca4faeb | 170 | int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid, |
793dad94 VP |
171 | __be32 sip, __be16 sport, __be16 vlan, |
172 | unsigned int queue, | |
173 | unsigned char port, unsigned char mask); | |
dca4faeb VP |
174 | int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid, |
175 | unsigned int queue, bool ipv6); | |
a3e3b285 | 176 | |
625ba2c2 DM |
177 | static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue) |
178 | { | |
179 | skb_set_queue_mapping(skb, (queue << 1) | prio); | |
180 | } | |
181 | ||
182 | enum cxgb4_uld { | |
183 | CXGB4_ULD_RDMA, | |
184 | CXGB4_ULD_ISCSI, | |
185 | CXGB4_ULD_MAX | |
186 | }; | |
187 | ||
188 | enum cxgb4_state { | |
189 | CXGB4_STATE_UP, | |
190 | CXGB4_STATE_START_RECOVERY, | |
191 | CXGB4_STATE_DOWN, | |
192 | CXGB4_STATE_DETACH | |
193 | }; | |
194 | ||
881806bc VP |
195 | enum cxgb4_control { |
196 | CXGB4_CONTROL_DB_FULL, | |
197 | CXGB4_CONTROL_DB_EMPTY, | |
198 | CXGB4_CONTROL_DB_DROP, | |
199 | }; | |
200 | ||
625ba2c2 DM |
201 | struct pci_dev; |
202 | struct l2t_data; | |
203 | struct net_device; | |
204 | struct pkt_gl; | |
205 | struct tp_tcp_stats; | |
206 | ||
207 | struct cxgb4_range { | |
208 | unsigned int start; | |
209 | unsigned int size; | |
210 | }; | |
211 | ||
212 | struct cxgb4_virt_res { /* virtualized HW resources */ | |
213 | struct cxgb4_range ddp; | |
214 | struct cxgb4_range iscsi; | |
215 | struct cxgb4_range stag; | |
216 | struct cxgb4_range rq; | |
217 | struct cxgb4_range pbl; | |
a0881cab DM |
218 | struct cxgb4_range qp; |
219 | struct cxgb4_range cq; | |
1ae970e0 | 220 | struct cxgb4_range ocq; |
625ba2c2 DM |
221 | }; |
222 | ||
1ae970e0 DM |
223 | #define OCQ_WIN_OFFSET(pdev, vres) \ |
224 | (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size)) | |
225 | ||
625ba2c2 DM |
226 | /* |
227 | * Block of information the LLD provides to ULDs attaching to a device. | |
228 | */ | |
229 | struct cxgb4_lld_info { | |
230 | struct pci_dev *pdev; /* associated PCI device */ | |
231 | struct l2t_data *l2t; /* L2 table */ | |
232 | struct tid_info *tids; /* TID table */ | |
233 | struct net_device **ports; /* device ports */ | |
234 | const struct cxgb4_virt_res *vr; /* assorted HW resources */ | |
235 | const unsigned short *mtus; /* MTU table */ | |
236 | const unsigned short *rxq_ids; /* the ULD's Rx queue ids */ | |
cf38be6d | 237 | const unsigned short *ciq_ids; /* the ULD's concentrator IQ ids */ |
625ba2c2 DM |
238 | unsigned short nrxq; /* # of Rx queues */ |
239 | unsigned short ntxq; /* # of Tx queues */ | |
cf38be6d | 240 | unsigned short nciq; /* # of concentrator IQ */ |
625ba2c2 DM |
241 | unsigned char nchan:4; /* # of channels */ |
242 | unsigned char nports:4; /* # of ports */ | |
243 | unsigned char wr_cred; /* WR 16-byte credits */ | |
244 | unsigned char adapter_type; /* type of adapter */ | |
245 | unsigned char fw_api_ver; /* FW API version */ | |
246 | unsigned int fw_vers; /* FW version */ | |
247 | unsigned int iscsi_iolen; /* iSCSI max I/O length */ | |
7730b4c7 | 248 | unsigned int cclk_ps; /* Core clock period in psec */ |
625ba2c2 DM |
249 | unsigned short udb_density; /* # of user DB/page */ |
250 | unsigned short ucq_density; /* # of user CQs/page */ | |
dca4faeb VP |
251 | unsigned short filt_mode; /* filter optional components */ |
252 | unsigned short tx_modq[NCHAN]; /* maps each tx channel to a */ | |
253 | /* scheduler queue */ | |
625ba2c2 DM |
254 | void __iomem *gts_reg; /* address of GTS register */ |
255 | void __iomem *db_reg; /* address of kernel doorbell */ | |
3069ee9b | 256 | int dbfifo_int_thresh; /* doorbell fifo int threshold */ |
04e10e21 HS |
257 | unsigned int sge_ingpadboundary; /* SGE ingress padding boundary */ |
258 | unsigned int sge_egrstatuspagesize; /* SGE egress status page size */ | |
dca4faeb VP |
259 | unsigned int sge_pktshift; /* Padding between CPL and */ |
260 | /* packet data */ | |
35b1de55 | 261 | unsigned int pf; /* Physical Function we're using */ |
dca4faeb VP |
262 | bool enable_fw_ofld_conn; /* Enable connection through fw */ |
263 | /* WR */ | |
4c2c5763 HS |
264 | unsigned int max_ordird_qp; /* Max ORD/IRD depth per RDMA QP */ |
265 | unsigned int max_ird_adapter; /* Max IRD memory per adapter */ | |
1ac0f095 | 266 | bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */ |
982b81eb | 267 | int nodeid; /* device numa node id */ |
625ba2c2 DM |
268 | }; |
269 | ||
270 | struct cxgb4_uld_info { | |
271 | const char *name; | |
272 | void *(*add)(const struct cxgb4_lld_info *p); | |
273 | int (*rx_handler)(void *handle, const __be64 *rsp, | |
274 | const struct pkt_gl *gl); | |
275 | int (*state_change)(void *handle, enum cxgb4_state new_state); | |
3069ee9b | 276 | int (*control)(void *handle, enum cxgb4_control control, ...); |
625ba2c2 DM |
277 | }; |
278 | ||
279 | int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p); | |
280 | int cxgb4_unregister_uld(enum cxgb4_uld type); | |
281 | int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb); | |
881806bc | 282 | unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo); |
625ba2c2 DM |
283 | unsigned int cxgb4_port_chan(const struct net_device *dev); |
284 | unsigned int cxgb4_port_viid(const struct net_device *dev); | |
285 | unsigned int cxgb4_port_idx(const struct net_device *dev); | |
625ba2c2 DM |
286 | unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu, |
287 | unsigned int *idx); | |
92e7ae71 HS |
288 | unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus, |
289 | unsigned short header_size, | |
290 | unsigned short data_size_max, | |
291 | unsigned short data_size_align, | |
292 | unsigned int *mtu_idxp); | |
625ba2c2 DM |
293 | void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4, |
294 | struct tp_tcp_stats *v6); | |
295 | void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask, | |
296 | const unsigned int *pgsz_order); | |
297 | struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl, | |
298 | unsigned int skb_len, unsigned int pull_len); | |
3069ee9b VP |
299 | int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size); |
300 | int cxgb4_flush_eq_cache(struct net_device *dev); | |
031cf476 | 301 | int cxgb4_read_tpte(struct net_device *dev, u32 stag, __be32 *tpte); |
7730b4c7 | 302 | u64 cxgb4_read_sge_timestamp(struct net_device *dev); |
3cbdb928 | 303 | |
df64e4d3 HS |
304 | enum cxgb4_bar2_qtype { CXGB4_BAR2_QTYPE_EGRESS, CXGB4_BAR2_QTYPE_INGRESS }; |
305 | int cxgb4_bar2_sge_qregs(struct net_device *dev, | |
306 | unsigned int qid, | |
307 | enum cxgb4_bar2_qtype qtype, | |
66cf188e | 308 | int user, |
df64e4d3 HS |
309 | u64 *pbar2_qoffset, |
310 | unsigned int *pbar2_qid); | |
311 | ||
625ba2c2 | 312 | #endif /* !__CXGB4_OFLD_H */ |