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16f8bd4b CL |
1 | /* |
2 | * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet | |
3 | * driver for Linux. | |
4 | * | |
5 | * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. | |
6 | * | |
7 | * This software is available to you under a choice of one of two | |
8 | * licenses. You may choose to be licensed under the terms of the GNU | |
9 | * General Public License (GPL) Version 2, available from the file | |
10 | * COPYING in the main directory of this source tree, or the | |
11 | * OpenIB.org BSD license below: | |
12 | * | |
13 | * Redistribution and use in source and binary forms, with or | |
14 | * without modification, are permitted provided that the following | |
15 | * conditions are met: | |
16 | * | |
17 | * - Redistributions of source code must retain the above | |
18 | * copyright notice, this list of conditions and the following | |
19 | * disclaimer. | |
20 | * | |
21 | * - Redistributions in binary form must reproduce the above | |
22 | * copyright notice, this list of conditions and the following | |
23 | * disclaimer in the documentation and/or other materials | |
24 | * provided with the distribution. | |
25 | * | |
26 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
27 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
28 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
29 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
30 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
31 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
32 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
33 | * SOFTWARE. | |
34 | */ | |
35 | ||
16f8bd4b CL |
36 | #include <linux/pci.h> |
37 | ||
38 | #include "t4vf_common.h" | |
39 | #include "t4vf_defs.h" | |
40 | ||
41 | #include "../cxgb4/t4_regs.h" | |
f612b815 | 42 | #include "../cxgb4/t4_values.h" |
16f8bd4b CL |
43 | #include "../cxgb4/t4fw_api.h" |
44 | ||
45 | /* | |
46 | * Wait for the device to become ready (signified by our "who am I" register | |
47 | * returning a value other than all 1's). Return an error if it doesn't | |
48 | * become ready ... | |
49 | */ | |
d289f864 | 50 | int t4vf_wait_dev_ready(struct adapter *adapter) |
16f8bd4b CL |
51 | { |
52 | const u32 whoami = T4VF_PL_BASE_ADDR + PL_VF_WHOAMI; | |
53 | const u32 notready1 = 0xffffffff; | |
54 | const u32 notready2 = 0xeeeeeeee; | |
55 | u32 val; | |
56 | ||
57 | val = t4_read_reg(adapter, whoami); | |
58 | if (val != notready1 && val != notready2) | |
59 | return 0; | |
60 | msleep(500); | |
61 | val = t4_read_reg(adapter, whoami); | |
62 | if (val != notready1 && val != notready2) | |
63 | return 0; | |
64 | else | |
65 | return -EIO; | |
66 | } | |
67 | ||
68 | /* | |
69 | * Get the reply to a mailbox command and store it in @rpl in big-endian order | |
70 | * (since the firmware data structures are specified in a big-endian layout). | |
71 | */ | |
72 | static void get_mbox_rpl(struct adapter *adapter, __be64 *rpl, int size, | |
73 | u32 mbox_data) | |
74 | { | |
75 | for ( ; size; size -= 8, mbox_data += 8) | |
76 | *rpl++ = cpu_to_be64(t4_read_reg64(adapter, mbox_data)); | |
77 | } | |
78 | ||
79 | /* | |
80 | * Dump contents of mailbox with a leading tag. | |
81 | */ | |
82 | static void dump_mbox(struct adapter *adapter, const char *tag, u32 mbox_data) | |
83 | { | |
84 | dev_err(adapter->pdev_dev, | |
85 | "mbox %s: %llx %llx %llx %llx %llx %llx %llx %llx\n", tag, | |
86 | (unsigned long long)t4_read_reg64(adapter, mbox_data + 0), | |
87 | (unsigned long long)t4_read_reg64(adapter, mbox_data + 8), | |
88 | (unsigned long long)t4_read_reg64(adapter, mbox_data + 16), | |
89 | (unsigned long long)t4_read_reg64(adapter, mbox_data + 24), | |
90 | (unsigned long long)t4_read_reg64(adapter, mbox_data + 32), | |
91 | (unsigned long long)t4_read_reg64(adapter, mbox_data + 40), | |
92 | (unsigned long long)t4_read_reg64(adapter, mbox_data + 48), | |
93 | (unsigned long long)t4_read_reg64(adapter, mbox_data + 56)); | |
94 | } | |
95 | ||
96 | /** | |
97 | * t4vf_wr_mbox_core - send a command to FW through the mailbox | |
98 | * @adapter: the adapter | |
99 | * @cmd: the command to write | |
100 | * @size: command length in bytes | |
101 | * @rpl: where to optionally store the reply | |
102 | * @sleep_ok: if true we may sleep while awaiting command completion | |
103 | * | |
104 | * Sends the given command to FW through the mailbox and waits for the | |
105 | * FW to execute the command. If @rpl is not %NULL it is used to store | |
106 | * the FW's reply to the command. The command and its optional reply | |
107 | * are of the same length. FW can take up to 500 ms to respond. | |
108 | * @sleep_ok determines whether we may sleep while awaiting the response. | |
109 | * If sleeping is allowed we use progressive backoff otherwise we spin. | |
110 | * | |
111 | * The return value is 0 on success or a negative errno on failure. A | |
112 | * failure can happen either because we are not able to execute the | |
113 | * command or FW executes it but signals an error. In the latter case | |
114 | * the return value is the error code indicated by FW (negated). | |
115 | */ | |
116 | int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, | |
117 | void *rpl, bool sleep_ok) | |
118 | { | |
215faf9c | 119 | static const int delay[] = { |
16f8bd4b CL |
120 | 1, 1, 3, 5, 10, 10, 20, 50, 100 |
121 | }; | |
122 | ||
10aa3b78 | 123 | u32 v, mbox_data; |
16f8bd4b CL |
124 | int i, ms, delay_idx; |
125 | const __be64 *p; | |
16f8bd4b CL |
126 | u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL; |
127 | ||
10aa3b78 HS |
128 | /* In T6, mailbox size is changed to 128 bytes to avoid |
129 | * invalidating the entire prefetch buffer. | |
130 | */ | |
131 | if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) | |
132 | mbox_data = T4VF_MBDATA_BASE_ADDR; | |
133 | else | |
134 | mbox_data = T6VF_MBDATA_BASE_ADDR; | |
135 | ||
16f8bd4b CL |
136 | /* |
137 | * Commands must be multiples of 16 bytes in length and may not be | |
138 | * larger than the size of the Mailbox Data register array. | |
139 | */ | |
140 | if ((size % 16) != 0 || | |
141 | size > NUM_CIM_VF_MAILBOX_DATA_INSTANCES * 4) | |
142 | return -EINVAL; | |
143 | ||
144 | /* | |
145 | * Loop trying to get ownership of the mailbox. Return an error | |
146 | * if we can't gain ownership. | |
147 | */ | |
89c3a86c | 148 | v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); |
16f8bd4b | 149 | for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++) |
89c3a86c | 150 | v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); |
16f8bd4b CL |
151 | if (v != MBOX_OWNER_DRV) |
152 | return v == MBOX_OWNER_FW ? -EBUSY : -ETIMEDOUT; | |
153 | ||
154 | /* | |
155 | * Write the command array into the Mailbox Data register array and | |
156 | * transfer ownership of the mailbox to the firmware. | |
80ce3f67 CL |
157 | * |
158 | * For the VFs, the Mailbox Data "registers" are actually backed by | |
159 | * T4's "MA" interface rather than PL Registers (as is the case for | |
160 | * the PFs). Because these are in different coherency domains, the | |
161 | * write to the VF's PL-register-backed Mailbox Control can race in | |
162 | * front of the writes to the MA-backed VF Mailbox Data "registers". | |
163 | * So we need to do a read-back on at least one byte of the VF Mailbox | |
164 | * Data registers before doing the write to the VF Mailbox Control | |
165 | * register. | |
16f8bd4b CL |
166 | */ |
167 | for (i = 0, p = cmd; i < size; i += 8) | |
168 | t4_write_reg64(adapter, mbox_data + i, be64_to_cpu(*p++)); | |
80ce3f67 CL |
169 | t4_read_reg(adapter, mbox_data); /* flush write */ |
170 | ||
16f8bd4b | 171 | t4_write_reg(adapter, mbox_ctl, |
89c3a86c | 172 | MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW)); |
16f8bd4b CL |
173 | t4_read_reg(adapter, mbox_ctl); /* flush write */ |
174 | ||
175 | /* | |
176 | * Spin waiting for firmware to acknowledge processing our command. | |
177 | */ | |
178 | delay_idx = 0; | |
179 | ms = delay[0]; | |
180 | ||
0550769b | 181 | for (i = 0; i < FW_CMD_MAX_TIMEOUT; i += ms) { |
16f8bd4b CL |
182 | if (sleep_ok) { |
183 | ms = delay[delay_idx]; | |
024e6293 | 184 | if (delay_idx < ARRAY_SIZE(delay) - 1) |
16f8bd4b CL |
185 | delay_idx++; |
186 | msleep(ms); | |
187 | } else | |
188 | mdelay(ms); | |
189 | ||
190 | /* | |
191 | * If we're the owner, see if this is the reply we wanted. | |
192 | */ | |
193 | v = t4_read_reg(adapter, mbox_ctl); | |
89c3a86c | 194 | if (MBOWNER_G(v) == MBOX_OWNER_DRV) { |
16f8bd4b CL |
195 | /* |
196 | * If the Message Valid bit isn't on, revoke ownership | |
197 | * of the mailbox and continue waiting for our reply. | |
198 | */ | |
89c3a86c | 199 | if ((v & MBMSGVALID_F) == 0) { |
16f8bd4b | 200 | t4_write_reg(adapter, mbox_ctl, |
89c3a86c | 201 | MBOWNER_V(MBOX_OWNER_NONE)); |
16f8bd4b CL |
202 | continue; |
203 | } | |
204 | ||
205 | /* | |
206 | * We now have our reply. Extract the command return | |
207 | * value, copy the reply back to our caller's buffer | |
208 | * (if specified) and revoke ownership of the mailbox. | |
209 | * We return the (negated) firmware command return | |
210 | * code (this depends on FW_SUCCESS == 0). | |
211 | */ | |
212 | ||
213 | /* return value in low-order little-endian word */ | |
214 | v = t4_read_reg(adapter, mbox_data); | |
e2ac9628 | 215 | if (FW_CMD_RETVAL_G(v)) |
16f8bd4b CL |
216 | dump_mbox(adapter, "FW Error", mbox_data); |
217 | ||
218 | if (rpl) { | |
219 | /* request bit in high-order BE word */ | |
2ff2acf1 | 220 | WARN_ON((be32_to_cpu(*(const __be32 *)cmd) |
e2ac9628 | 221 | & FW_CMD_REQUEST_F) == 0); |
16f8bd4b | 222 | get_mbox_rpl(adapter, rpl, size, mbox_data); |
2ff2acf1 | 223 | WARN_ON((be32_to_cpu(*(__be32 *)rpl) |
e2ac9628 | 224 | & FW_CMD_REQUEST_F) != 0); |
16f8bd4b CL |
225 | } |
226 | t4_write_reg(adapter, mbox_ctl, | |
89c3a86c | 227 | MBOWNER_V(MBOX_OWNER_NONE)); |
e2ac9628 | 228 | return -FW_CMD_RETVAL_G(v); |
16f8bd4b CL |
229 | } |
230 | } | |
231 | ||
232 | /* | |
233 | * We timed out. Return the error ... | |
234 | */ | |
235 | dump_mbox(adapter, "FW Timeout", mbox_data); | |
236 | return -ETIMEDOUT; | |
237 | } | |
238 | ||
5ad24def HS |
239 | #define ADVERT_MASK (FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G |\ |
240 | FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_SPEED_40G | \ | |
241 | FW_PORT_CAP_SPEED_100G | FW_PORT_CAP_ANEG) | |
242 | ||
16f8bd4b CL |
243 | /** |
244 | * init_link_config - initialize a link's SW state | |
245 | * @lc: structure holding the link state | |
246 | * @caps: link capabilities | |
247 | * | |
248 | * Initializes the SW state maintained for each link, including the link's | |
249 | * capabilities and default speed/flow-control/autonegotiation settings. | |
250 | */ | |
1dd06ae8 | 251 | static void init_link_config(struct link_config *lc, unsigned int caps) |
16f8bd4b CL |
252 | { |
253 | lc->supported = caps; | |
254 | lc->requested_speed = 0; | |
255 | lc->speed = 0; | |
256 | lc->requested_fc = lc->fc = PAUSE_RX | PAUSE_TX; | |
5ad24def HS |
257 | if (lc->supported & FW_PORT_CAP_ANEG) { |
258 | lc->advertising = lc->supported & ADVERT_MASK; | |
16f8bd4b CL |
259 | lc->autoneg = AUTONEG_ENABLE; |
260 | lc->requested_fc |= PAUSE_AUTONEG; | |
261 | } else { | |
262 | lc->advertising = 0; | |
263 | lc->autoneg = AUTONEG_DISABLE; | |
264 | } | |
265 | } | |
266 | ||
267 | /** | |
268 | * t4vf_port_init - initialize port hardware/software state | |
269 | * @adapter: the adapter | |
270 | * @pidx: the adapter port index | |
271 | */ | |
d289f864 | 272 | int t4vf_port_init(struct adapter *adapter, int pidx) |
16f8bd4b CL |
273 | { |
274 | struct port_info *pi = adap2pinfo(adapter, pidx); | |
275 | struct fw_vi_cmd vi_cmd, vi_rpl; | |
276 | struct fw_port_cmd port_cmd, port_rpl; | |
277 | int v; | |
16f8bd4b CL |
278 | |
279 | /* | |
280 | * Execute a VI Read command to get our Virtual Interface information | |
281 | * like MAC address, etc. | |
282 | */ | |
283 | memset(&vi_cmd, 0, sizeof(vi_cmd)); | |
e2ac9628 HS |
284 | vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | |
285 | FW_CMD_REQUEST_F | | |
286 | FW_CMD_READ_F); | |
16f8bd4b | 287 | vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd)); |
2b5fb1f2 | 288 | vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(pi->viid)); |
16f8bd4b CL |
289 | v = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl); |
290 | if (v) | |
291 | return v; | |
292 | ||
2b5fb1f2 HS |
293 | BUG_ON(pi->port_id != FW_VI_CMD_PORTID_G(vi_rpl.portid_pkd)); |
294 | pi->rss_size = FW_VI_CMD_RSSSIZE_G(be16_to_cpu(vi_rpl.rsssize_pkd)); | |
16f8bd4b CL |
295 | t4_os_set_hw_addr(adapter, pidx, vi_rpl.mac); |
296 | ||
297 | /* | |
298 | * If we don't have read access to our port information, we're done | |
299 | * now. Otherwise, execute a PORT Read command to get it ... | |
300 | */ | |
301 | if (!(adapter->params.vfres.r_caps & FW_CMD_CAP_PORT)) | |
302 | return 0; | |
303 | ||
304 | memset(&port_cmd, 0, sizeof(port_cmd)); | |
e2ac9628 HS |
305 | port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | |
306 | FW_CMD_REQUEST_F | | |
307 | FW_CMD_READ_F | | |
2b5fb1f2 | 308 | FW_PORT_CMD_PORTID_V(pi->port_id)); |
16f8bd4b | 309 | port_cmd.action_to_len16 = |
2b5fb1f2 | 310 | cpu_to_be32(FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_GET_PORT_INFO) | |
16f8bd4b CL |
311 | FW_LEN16(port_cmd)); |
312 | v = t4vf_wr_mbox(adapter, &port_cmd, sizeof(port_cmd), &port_rpl); | |
313 | if (v) | |
314 | return v; | |
315 | ||
5ad24def | 316 | v = be32_to_cpu(port_rpl.u.info.lstatus_to_modtype); |
fd48e639 HS |
317 | pi->mdio_addr = (v & FW_PORT_CMD_MDIOCAP_F) ? |
318 | FW_PORT_CMD_MDIOADDR_G(v) : -1; | |
5ad24def HS |
319 | pi->port_type = FW_PORT_CMD_PTYPE_G(v); |
320 | pi->mod_type = FW_PORT_MOD_TYPE_NA; | |
321 | ||
322 | init_link_config(&pi->link_cfg, be16_to_cpu(port_rpl.u.info.pcap)); | |
16f8bd4b CL |
323 | |
324 | return 0; | |
325 | } | |
326 | ||
e68e6133 CL |
327 | /** |
328 | * t4vf_fw_reset - issue a reset to FW | |
329 | * @adapter: the adapter | |
330 | * | |
331 | * Issues a reset command to FW. For a Physical Function this would | |
dbedd44e | 332 | * result in the Firmware resetting all of its state. For a Virtual |
e68e6133 CL |
333 | * Function this just resets the state associated with the VF. |
334 | */ | |
335 | int t4vf_fw_reset(struct adapter *adapter) | |
336 | { | |
337 | struct fw_reset_cmd cmd; | |
338 | ||
339 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
340 | cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RESET_CMD) | |
341 | FW_CMD_WRITE_F); | |
e68e6133 CL |
342 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
343 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); | |
344 | } | |
345 | ||
16f8bd4b CL |
346 | /** |
347 | * t4vf_query_params - query FW or device parameters | |
348 | * @adapter: the adapter | |
349 | * @nparams: the number of parameters | |
350 | * @params: the parameter names | |
351 | * @vals: the parameter values | |
352 | * | |
353 | * Reads the values of firmware or device parameters. Up to 7 parameters | |
354 | * can be queried at once. | |
355 | */ | |
de5b8677 | 356 | static int t4vf_query_params(struct adapter *adapter, unsigned int nparams, |
357 | const u32 *params, u32 *vals) | |
16f8bd4b CL |
358 | { |
359 | int i, ret; | |
360 | struct fw_params_cmd cmd, rpl; | |
361 | struct fw_params_param *p; | |
362 | size_t len16; | |
363 | ||
364 | if (nparams > 7) | |
365 | return -EINVAL; | |
366 | ||
367 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
368 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | |
369 | FW_CMD_REQUEST_F | | |
370 | FW_CMD_READ_F); | |
16f8bd4b CL |
371 | len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, |
372 | param[nparams].mnem), 16); | |
e2ac9628 | 373 | cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); |
16f8bd4b CL |
374 | for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) |
375 | p->mnem = htonl(*params++); | |
376 | ||
377 | ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); | |
378 | if (ret == 0) | |
379 | for (i = 0, p = &rpl.param[0]; i < nparams; i++, p++) | |
380 | *vals++ = be32_to_cpu(p->val); | |
381 | return ret; | |
382 | } | |
383 | ||
384 | /** | |
385 | * t4vf_set_params - sets FW or device parameters | |
386 | * @adapter: the adapter | |
387 | * @nparams: the number of parameters | |
388 | * @params: the parameter names | |
389 | * @vals: the parameter values | |
390 | * | |
391 | * Sets the values of firmware or device parameters. Up to 7 parameters | |
392 | * can be specified at once. | |
393 | */ | |
394 | int t4vf_set_params(struct adapter *adapter, unsigned int nparams, | |
395 | const u32 *params, const u32 *vals) | |
396 | { | |
397 | int i; | |
398 | struct fw_params_cmd cmd; | |
399 | struct fw_params_param *p; | |
400 | size_t len16; | |
401 | ||
402 | if (nparams > 7) | |
403 | return -EINVAL; | |
404 | ||
405 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
406 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | |
407 | FW_CMD_REQUEST_F | | |
408 | FW_CMD_WRITE_F); | |
16f8bd4b CL |
409 | len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, |
410 | param[nparams]), 16); | |
e2ac9628 | 411 | cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); |
16f8bd4b CL |
412 | for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) { |
413 | p->mnem = cpu_to_be32(*params++); | |
414 | p->val = cpu_to_be32(*vals++); | |
415 | } | |
416 | ||
417 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); | |
418 | } | |
419 | ||
e85c9a7a | 420 | /** |
b2612722 | 421 | * t4vf_bar2_sge_qregs - return BAR2 SGE Queue register information |
e85c9a7a HS |
422 | * @adapter: the adapter |
423 | * @qid: the Queue ID | |
424 | * @qtype: the Ingress or Egress type for @qid | |
425 | * @pbar2_qoffset: BAR2 Queue Offset | |
426 | * @pbar2_qid: BAR2 Queue ID or 0 for Queue ID inferred SGE Queues | |
427 | * | |
428 | * Returns the BAR2 SGE Queue Registers information associated with the | |
429 | * indicated Absolute Queue ID. These are passed back in return value | |
430 | * pointers. @qtype should be T4_BAR2_QTYPE_EGRESS for Egress Queue | |
431 | * and T4_BAR2_QTYPE_INGRESS for Ingress Queues. | |
432 | * | |
433 | * This may return an error which indicates that BAR2 SGE Queue | |
434 | * registers aren't available. If an error is not returned, then the | |
435 | * following values are returned: | |
436 | * | |
437 | * *@pbar2_qoffset: the BAR2 Offset of the @qid Registers | |
438 | * *@pbar2_qid: the BAR2 SGE Queue ID or 0 of @qid | |
439 | * | |
440 | * If the returned BAR2 Queue ID is 0, then BAR2 SGE registers which | |
441 | * require the "Inferred Queue ID" ability may be used. E.g. the | |
442 | * Write Combining Doorbell Buffer. If the BAR2 Queue ID is not 0, | |
443 | * then these "Inferred Queue ID" register may not be used. | |
444 | */ | |
b2612722 HS |
445 | int t4vf_bar2_sge_qregs(struct adapter *adapter, |
446 | unsigned int qid, | |
447 | enum t4_bar2_qtype qtype, | |
448 | u64 *pbar2_qoffset, | |
449 | unsigned int *pbar2_qid) | |
e85c9a7a HS |
450 | { |
451 | unsigned int page_shift, page_size, qpp_shift, qpp_mask; | |
452 | u64 bar2_page_offset, bar2_qoffset; | |
453 | unsigned int bar2_qid, bar2_qid_offset, bar2_qinferred; | |
454 | ||
455 | /* T4 doesn't support BAR2 SGE Queue registers. | |
456 | */ | |
457 | if (is_t4(adapter->params.chip)) | |
458 | return -EINVAL; | |
459 | ||
460 | /* Get our SGE Page Size parameters. | |
461 | */ | |
462 | page_shift = adapter->params.sge.sge_vf_hps + 10; | |
463 | page_size = 1 << page_shift; | |
464 | ||
465 | /* Get the right Queues per Page parameters for our Queue. | |
466 | */ | |
467 | qpp_shift = (qtype == T4_BAR2_QTYPE_EGRESS | |
468 | ? adapter->params.sge.sge_vf_eq_qpp | |
469 | : adapter->params.sge.sge_vf_iq_qpp); | |
470 | qpp_mask = (1 << qpp_shift) - 1; | |
471 | ||
472 | /* Calculate the basics of the BAR2 SGE Queue register area: | |
473 | * o The BAR2 page the Queue registers will be in. | |
474 | * o The BAR2 Queue ID. | |
475 | * o The BAR2 Queue ID Offset into the BAR2 page. | |
476 | */ | |
2ff2acf1 | 477 | bar2_page_offset = ((u64)(qid >> qpp_shift) << page_shift); |
e85c9a7a HS |
478 | bar2_qid = qid & qpp_mask; |
479 | bar2_qid_offset = bar2_qid * SGE_UDB_SIZE; | |
480 | ||
481 | /* If the BAR2 Queue ID Offset is less than the Page Size, then the | |
482 | * hardware will infer the Absolute Queue ID simply from the writes to | |
483 | * the BAR2 Queue ID Offset within the BAR2 Page (and we need to use a | |
484 | * BAR2 Queue ID of 0 for those writes). Otherwise, we'll simply | |
485 | * write to the first BAR2 SGE Queue Area within the BAR2 Page with | |
486 | * the BAR2 Queue ID and the hardware will infer the Absolute Queue ID | |
487 | * from the BAR2 Page and BAR2 Queue ID. | |
488 | * | |
489 | * One important censequence of this is that some BAR2 SGE registers | |
490 | * have a "Queue ID" field and we can write the BAR2 SGE Queue ID | |
491 | * there. But other registers synthesize the SGE Queue ID purely | |
492 | * from the writes to the registers -- the Write Combined Doorbell | |
493 | * Buffer is a good example. These BAR2 SGE Registers are only | |
494 | * available for those BAR2 SGE Register areas where the SGE Absolute | |
495 | * Queue ID can be inferred from simple writes. | |
496 | */ | |
497 | bar2_qoffset = bar2_page_offset; | |
498 | bar2_qinferred = (bar2_qid_offset < page_size); | |
499 | if (bar2_qinferred) { | |
500 | bar2_qoffset += bar2_qid_offset; | |
501 | bar2_qid = 0; | |
502 | } | |
503 | ||
504 | *pbar2_qoffset = bar2_qoffset; | |
505 | *pbar2_qid = bar2_qid; | |
506 | return 0; | |
507 | } | |
508 | ||
16f8bd4b CL |
509 | /** |
510 | * t4vf_get_sge_params - retrieve adapter Scatter gather Engine parameters | |
511 | * @adapter: the adapter | |
512 | * | |
513 | * Retrieves various core SGE parameters in the form of hardware SGE | |
514 | * register values. The caller is responsible for decoding these as | |
515 | * needed. The SGE parameters are stored in @adapter->params.sge. | |
516 | */ | |
517 | int t4vf_get_sge_params(struct adapter *adapter) | |
518 | { | |
519 | struct sge_params *sge_params = &adapter->params.sge; | |
520 | u32 params[7], vals[7]; | |
521 | int v; | |
522 | ||
5167865a | 523 | params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
f612b815 | 524 | FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL_A)); |
5167865a | 525 | params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
f612b815 | 526 | FW_PARAMS_PARAM_XYZ_V(SGE_HOST_PAGE_SIZE_A)); |
5167865a | 527 | params[2] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
f612b815 | 528 | FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE0_A)); |
5167865a | 529 | params[3] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
f612b815 | 530 | FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE1_A)); |
5167865a | 531 | params[4] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
f061de42 | 532 | FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_0_AND_1_A)); |
5167865a | 533 | params[5] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
f061de42 | 534 | FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_2_AND_3_A)); |
5167865a | 535 | params[6] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
f061de42 | 536 | FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_4_AND_5_A)); |
16f8bd4b CL |
537 | v = t4vf_query_params(adapter, 7, params, vals); |
538 | if (v) | |
539 | return v; | |
540 | sge_params->sge_control = vals[0]; | |
541 | sge_params->sge_host_page_size = vals[1]; | |
542 | sge_params->sge_fl_buffer_size[0] = vals[2]; | |
543 | sge_params->sge_fl_buffer_size[1] = vals[3]; | |
544 | sge_params->sge_timer_value_0_and_1 = vals[4]; | |
545 | sge_params->sge_timer_value_2_and_3 = vals[5]; | |
546 | sge_params->sge_timer_value_4_and_5 = vals[6]; | |
547 | ||
ce8f407a HS |
548 | /* T4 uses a single control field to specify both the PCIe Padding and |
549 | * Packing Boundary. T5 introduced the ability to specify these | |
550 | * separately with the Padding Boundary in SGE_CONTROL and and Packing | |
551 | * Boundary in SGE_CONTROL2. So for T5 and later we need to grab | |
552 | * SGE_CONTROL in order to determine how ingress packet data will be | |
553 | * laid out in Packed Buffer Mode. Unfortunately, older versions of | |
554 | * the firmware won't let us retrieve SGE_CONTROL2 so if we get a | |
555 | * failure grabbing it we throw an error since we can't figure out the | |
556 | * right value. | |
557 | */ | |
558 | if (!is_t4(adapter->params.chip)) { | |
5167865a HS |
559 | params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
560 | FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL2_A)); | |
ce8f407a HS |
561 | v = t4vf_query_params(adapter, 1, params, vals); |
562 | if (v != FW_SUCCESS) { | |
563 | dev_err(adapter->pdev_dev, | |
564 | "Unable to get SGE Control2; " | |
565 | "probably old firmware.\n"); | |
566 | return v; | |
567 | } | |
568 | sge_params->sge_control2 = vals[0]; | |
569 | } | |
570 | ||
5167865a | 571 | params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
f612b815 | 572 | FW_PARAMS_PARAM_XYZ_V(SGE_INGRESS_RX_THRESHOLD_A)); |
5167865a | 573 | params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | |
f612b815 | 574 | FW_PARAMS_PARAM_XYZ_V(SGE_CONM_CTRL_A)); |
50d21a66 | 575 | v = t4vf_query_params(adapter, 2, params, vals); |
16f8bd4b CL |
576 | if (v) |
577 | return v; | |
578 | sge_params->sge_ingress_rx_threshold = vals[0]; | |
50d21a66 | 579 | sge_params->sge_congestion_control = vals[1]; |
16f8bd4b | 580 | |
e0a8b34a HS |
581 | /* For T5 and later we want to use the new BAR2 Doorbells. |
582 | * Unfortunately, older firmware didn't allow the this register to be | |
583 | * read. | |
584 | */ | |
585 | if (!is_t4(adapter->params.chip)) { | |
586 | u32 whoami; | |
e85c9a7a | 587 | unsigned int pf, s_hps, s_qpp; |
e0a8b34a HS |
588 | |
589 | params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | | |
590 | FW_PARAMS_PARAM_XYZ_V( | |
591 | SGE_EGRESS_QUEUES_PER_PAGE_VF_A)); | |
592 | params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | | |
593 | FW_PARAMS_PARAM_XYZ_V( | |
594 | SGE_INGRESS_QUEUES_PER_PAGE_VF_A)); | |
595 | v = t4vf_query_params(adapter, 2, params, vals); | |
596 | if (v != FW_SUCCESS) { | |
597 | dev_warn(adapter->pdev_dev, | |
598 | "Unable to get VF SGE Queues/Page; " | |
599 | "probably old firmware.\n"); | |
600 | return v; | |
601 | } | |
602 | sge_params->sge_egress_queues_per_page = vals[0]; | |
603 | sge_params->sge_ingress_queues_per_page = vals[1]; | |
604 | ||
605 | /* We need the Queues/Page for our VF. This is based on the | |
606 | * PF from which we're instantiated and is indexed in the | |
607 | * register we just read. Do it once here so other code in | |
608 | * the driver can just use it. | |
609 | */ | |
610 | whoami = t4_read_reg(adapter, | |
0d804338 | 611 | T4VF_PL_BASE_ADDR + PL_VF_WHOAMI_A); |
d86bd29e HS |
612 | pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ? |
613 | SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami); | |
e85c9a7a HS |
614 | |
615 | s_hps = (HOSTPAGESIZEPF0_S + | |
616 | (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf); | |
617 | sge_params->sge_vf_hps = | |
618 | ((sge_params->sge_host_page_size >> s_hps) | |
619 | & HOSTPAGESIZEPF0_M); | |
620 | ||
e0a8b34a HS |
621 | s_qpp = (QUEUESPERPAGEPF0_S + |
622 | (QUEUESPERPAGEPF1_S - QUEUESPERPAGEPF0_S) * pf); | |
623 | sge_params->sge_vf_eq_qpp = | |
624 | ((sge_params->sge_egress_queues_per_page >> s_qpp) | |
f612b815 | 625 | & QUEUESPERPAGEPF0_M); |
e0a8b34a HS |
626 | sge_params->sge_vf_iq_qpp = |
627 | ((sge_params->sge_ingress_queues_per_page >> s_qpp) | |
f612b815 | 628 | & QUEUESPERPAGEPF0_M); |
e0a8b34a HS |
629 | } |
630 | ||
16f8bd4b CL |
631 | return 0; |
632 | } | |
633 | ||
634 | /** | |
635 | * t4vf_get_vpd_params - retrieve device VPD paremeters | |
636 | * @adapter: the adapter | |
637 | * | |
638 | * Retrives various device Vital Product Data parameters. The parameters | |
639 | * are stored in @adapter->params.vpd. | |
640 | */ | |
641 | int t4vf_get_vpd_params(struct adapter *adapter) | |
642 | { | |
643 | struct vpd_params *vpd_params = &adapter->params.vpd; | |
644 | u32 params[7], vals[7]; | |
645 | int v; | |
646 | ||
5167865a HS |
647 | params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | |
648 | FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK)); | |
16f8bd4b CL |
649 | v = t4vf_query_params(adapter, 1, params, vals); |
650 | if (v) | |
651 | return v; | |
652 | vpd_params->cclk = vals[0]; | |
653 | ||
654 | return 0; | |
655 | } | |
656 | ||
657 | /** | |
658 | * t4vf_get_dev_params - retrieve device paremeters | |
659 | * @adapter: the adapter | |
660 | * | |
661 | * Retrives various device parameters. The parameters are stored in | |
662 | * @adapter->params.dev. | |
663 | */ | |
664 | int t4vf_get_dev_params(struct adapter *adapter) | |
665 | { | |
666 | struct dev_params *dev_params = &adapter->params.dev; | |
667 | u32 params[7], vals[7]; | |
668 | int v; | |
669 | ||
5167865a HS |
670 | params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | |
671 | FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWREV)); | |
672 | params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | | |
673 | FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPREV)); | |
16f8bd4b CL |
674 | v = t4vf_query_params(adapter, 2, params, vals); |
675 | if (v) | |
676 | return v; | |
677 | dev_params->fwrev = vals[0]; | |
678 | dev_params->tprev = vals[1]; | |
679 | ||
680 | return 0; | |
681 | } | |
682 | ||
683 | /** | |
684 | * t4vf_get_rss_glb_config - retrieve adapter RSS Global Configuration | |
685 | * @adapter: the adapter | |
686 | * | |
687 | * Retrieves global RSS mode and parameters with which we have to live | |
688 | * and stores them in the @adapter's RSS parameters. | |
689 | */ | |
690 | int t4vf_get_rss_glb_config(struct adapter *adapter) | |
691 | { | |
692 | struct rss_params *rss = &adapter->params.rss; | |
693 | struct fw_rss_glb_config_cmd cmd, rpl; | |
694 | int v; | |
695 | ||
696 | /* | |
697 | * Execute an RSS Global Configuration read command to retrieve | |
698 | * our RSS configuration. | |
699 | */ | |
700 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
701 | cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) | |
702 | FW_CMD_REQUEST_F | | |
703 | FW_CMD_READ_F); | |
16f8bd4b CL |
704 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
705 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); | |
706 | if (v) | |
707 | return v; | |
708 | ||
709 | /* | |
710 | * Transate the big-endian RSS Global Configuration into our | |
711 | * cpu-endian format based on the RSS mode. We also do first level | |
712 | * filtering at this point to weed out modes which don't support | |
713 | * VF Drivers ... | |
714 | */ | |
b2e1a3f0 | 715 | rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_G( |
16f8bd4b CL |
716 | be32_to_cpu(rpl.u.manual.mode_pkd)); |
717 | switch (rss->mode) { | |
718 | case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { | |
719 | u32 word = be32_to_cpu( | |
720 | rpl.u.basicvirtual.synmapen_to_hashtoeplitz); | |
721 | ||
722 | rss->u.basicvirtual.synmapen = | |
b2e1a3f0 | 723 | ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F) != 0); |
16f8bd4b | 724 | rss->u.basicvirtual.syn4tupenipv6 = |
b2e1a3f0 | 725 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F) != 0); |
16f8bd4b | 726 | rss->u.basicvirtual.syn2tupenipv6 = |
b2e1a3f0 | 727 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F) != 0); |
16f8bd4b | 728 | rss->u.basicvirtual.syn4tupenipv4 = |
b2e1a3f0 | 729 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F) != 0); |
16f8bd4b | 730 | rss->u.basicvirtual.syn2tupenipv4 = |
b2e1a3f0 | 731 | ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F) != 0); |
16f8bd4b CL |
732 | |
733 | rss->u.basicvirtual.ofdmapen = | |
b2e1a3f0 | 734 | ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F) != 0); |
16f8bd4b CL |
735 | |
736 | rss->u.basicvirtual.tnlmapen = | |
b2e1a3f0 | 737 | ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F) != 0); |
16f8bd4b | 738 | rss->u.basicvirtual.tnlalllookup = |
b2e1a3f0 | 739 | ((word & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F) != 0); |
16f8bd4b CL |
740 | |
741 | rss->u.basicvirtual.hashtoeplitz = | |
b2e1a3f0 | 742 | ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F) != 0); |
16f8bd4b CL |
743 | |
744 | /* we need at least Tunnel Map Enable to be set */ | |
745 | if (!rss->u.basicvirtual.tnlmapen) | |
746 | return -EINVAL; | |
747 | break; | |
748 | } | |
749 | ||
750 | default: | |
751 | /* all unknown/unsupported RSS modes result in an error */ | |
752 | return -EINVAL; | |
753 | } | |
754 | ||
755 | return 0; | |
756 | } | |
757 | ||
758 | /** | |
759 | * t4vf_get_vfres - retrieve VF resource limits | |
760 | * @adapter: the adapter | |
761 | * | |
762 | * Retrieves configured resource limits and capabilities for a virtual | |
763 | * function. The results are stored in @adapter->vfres. | |
764 | */ | |
765 | int t4vf_get_vfres(struct adapter *adapter) | |
766 | { | |
767 | struct vf_resources *vfres = &adapter->params.vfres; | |
768 | struct fw_pfvf_cmd cmd, rpl; | |
769 | int v; | |
770 | u32 word; | |
771 | ||
772 | /* | |
773 | * Execute PFVF Read command to get VF resource limits; bail out early | |
774 | * with error on command failure. | |
775 | */ | |
776 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
777 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PFVF_CMD) | |
778 | FW_CMD_REQUEST_F | | |
779 | FW_CMD_READ_F); | |
16f8bd4b CL |
780 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
781 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); | |
782 | if (v) | |
783 | return v; | |
784 | ||
785 | /* | |
786 | * Extract VF resource limits and return success. | |
787 | */ | |
788 | word = be32_to_cpu(rpl.niqflint_niq); | |
5167865a HS |
789 | vfres->niqflint = FW_PFVF_CMD_NIQFLINT_G(word); |
790 | vfres->niq = FW_PFVF_CMD_NIQ_G(word); | |
16f8bd4b CL |
791 | |
792 | word = be32_to_cpu(rpl.type_to_neq); | |
5167865a HS |
793 | vfres->neq = FW_PFVF_CMD_NEQ_G(word); |
794 | vfres->pmask = FW_PFVF_CMD_PMASK_G(word); | |
16f8bd4b CL |
795 | |
796 | word = be32_to_cpu(rpl.tc_to_nexactf); | |
5167865a HS |
797 | vfres->tc = FW_PFVF_CMD_TC_G(word); |
798 | vfres->nvi = FW_PFVF_CMD_NVI_G(word); | |
799 | vfres->nexactf = FW_PFVF_CMD_NEXACTF_G(word); | |
16f8bd4b CL |
800 | |
801 | word = be32_to_cpu(rpl.r_caps_to_nethctrl); | |
5167865a HS |
802 | vfres->r_caps = FW_PFVF_CMD_R_CAPS_G(word); |
803 | vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_G(word); | |
804 | vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_G(word); | |
16f8bd4b CL |
805 | |
806 | return 0; | |
807 | } | |
808 | ||
809 | /** | |
810 | * t4vf_read_rss_vi_config - read a VI's RSS configuration | |
811 | * @adapter: the adapter | |
812 | * @viid: Virtual Interface ID | |
813 | * @config: pointer to host-native VI RSS Configuration buffer | |
814 | * | |
815 | * Reads the Virtual Interface's RSS configuration information and | |
816 | * translates it into CPU-native format. | |
817 | */ | |
818 | int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid, | |
819 | union rss_vi_config *config) | |
820 | { | |
821 | struct fw_rss_vi_config_cmd cmd, rpl; | |
822 | int v; | |
823 | ||
824 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
825 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | |
826 | FW_CMD_REQUEST_F | | |
827 | FW_CMD_READ_F | | |
16f8bd4b CL |
828 | FW_RSS_VI_CONFIG_CMD_VIID(viid)); |
829 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | |
830 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); | |
831 | if (v) | |
832 | return v; | |
833 | ||
834 | switch (adapter->params.rss.mode) { | |
835 | case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { | |
836 | u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen); | |
837 | ||
838 | config->basicvirtual.ip6fourtupen = | |
b2e1a3f0 | 839 | ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) != 0); |
16f8bd4b | 840 | config->basicvirtual.ip6twotupen = |
b2e1a3f0 | 841 | ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) != 0); |
16f8bd4b | 842 | config->basicvirtual.ip4fourtupen = |
b2e1a3f0 | 843 | ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) != 0); |
16f8bd4b | 844 | config->basicvirtual.ip4twotupen = |
b2e1a3f0 | 845 | ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) != 0); |
16f8bd4b | 846 | config->basicvirtual.udpen = |
b2e1a3f0 | 847 | ((word & FW_RSS_VI_CONFIG_CMD_UDPEN_F) != 0); |
16f8bd4b | 848 | config->basicvirtual.defaultq = |
b2e1a3f0 | 849 | FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(word); |
16f8bd4b CL |
850 | break; |
851 | } | |
852 | ||
853 | default: | |
854 | return -EINVAL; | |
855 | } | |
856 | ||
857 | return 0; | |
858 | } | |
859 | ||
860 | /** | |
861 | * t4vf_write_rss_vi_config - write a VI's RSS configuration | |
862 | * @adapter: the adapter | |
863 | * @viid: Virtual Interface ID | |
864 | * @config: pointer to host-native VI RSS Configuration buffer | |
865 | * | |
866 | * Write the Virtual Interface's RSS configuration information | |
867 | * (translating it into firmware-native format before writing). | |
868 | */ | |
869 | int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid, | |
870 | union rss_vi_config *config) | |
871 | { | |
872 | struct fw_rss_vi_config_cmd cmd, rpl; | |
873 | ||
874 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
875 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | |
876 | FW_CMD_REQUEST_F | | |
877 | FW_CMD_WRITE_F | | |
16f8bd4b CL |
878 | FW_RSS_VI_CONFIG_CMD_VIID(viid)); |
879 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | |
880 | switch (adapter->params.rss.mode) { | |
881 | case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { | |
882 | u32 word = 0; | |
883 | ||
884 | if (config->basicvirtual.ip6fourtupen) | |
b2e1a3f0 | 885 | word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F; |
16f8bd4b | 886 | if (config->basicvirtual.ip6twotupen) |
b2e1a3f0 | 887 | word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F; |
16f8bd4b | 888 | if (config->basicvirtual.ip4fourtupen) |
b2e1a3f0 | 889 | word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F; |
16f8bd4b | 890 | if (config->basicvirtual.ip4twotupen) |
b2e1a3f0 | 891 | word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F; |
16f8bd4b | 892 | if (config->basicvirtual.udpen) |
b2e1a3f0 HS |
893 | word |= FW_RSS_VI_CONFIG_CMD_UDPEN_F; |
894 | word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V( | |
16f8bd4b CL |
895 | config->basicvirtual.defaultq); |
896 | cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word); | |
897 | break; | |
898 | } | |
899 | ||
900 | default: | |
901 | return -EINVAL; | |
902 | } | |
903 | ||
904 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); | |
905 | } | |
906 | ||
907 | /** | |
908 | * t4vf_config_rss_range - configure a portion of the RSS mapping table | |
909 | * @adapter: the adapter | |
910 | * @viid: Virtual Interface of RSS Table Slice | |
911 | * @start: starting entry in the table to write | |
912 | * @n: how many table entries to write | |
913 | * @rspq: values for the "Response Queue" (Ingress Queue) lookup table | |
914 | * @nrspq: number of values in @rspq | |
915 | * | |
916 | * Programs the selected part of the VI's RSS mapping table with the | |
917 | * provided values. If @nrspq < @n the supplied values are used repeatedly | |
918 | * until the full table range is populated. | |
919 | * | |
920 | * The caller must ensure the values in @rspq are in the range 0..1023. | |
921 | */ | |
922 | int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, | |
923 | int start, int n, const u16 *rspq, int nrspq) | |
924 | { | |
925 | const u16 *rsp = rspq; | |
926 | const u16 *rsp_end = rspq+nrspq; | |
927 | struct fw_rss_ind_tbl_cmd cmd; | |
928 | ||
929 | /* | |
930 | * Initialize firmware command template to write the RSS table. | |
931 | */ | |
932 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
933 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | |
934 | FW_CMD_REQUEST_F | | |
935 | FW_CMD_WRITE_F | | |
b2e1a3f0 | 936 | FW_RSS_IND_TBL_CMD_VIID_V(viid)); |
16f8bd4b CL |
937 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
938 | ||
939 | /* | |
940 | * Each firmware RSS command can accommodate up to 32 RSS Ingress | |
941 | * Queue Identifiers. These Ingress Queue IDs are packed three to | |
942 | * a 32-bit word as 10-bit values with the upper remaining 2 bits | |
943 | * reserved. | |
944 | */ | |
945 | while (n > 0) { | |
946 | __be32 *qp = &cmd.iq0_to_iq2; | |
947 | int nq = min(n, 32); | |
948 | int ret; | |
949 | ||
950 | /* | |
951 | * Set up the firmware RSS command header to send the next | |
952 | * "nq" Ingress Queue IDs to the firmware. | |
953 | */ | |
954 | cmd.niqid = cpu_to_be16(nq); | |
955 | cmd.startidx = cpu_to_be16(start); | |
956 | ||
957 | /* | |
958 | * "nq" more done for the start of the next loop. | |
959 | */ | |
960 | start += nq; | |
961 | n -= nq; | |
962 | ||
963 | /* | |
964 | * While there are still Ingress Queue IDs to stuff into the | |
965 | * current firmware RSS command, retrieve them from the | |
966 | * Ingress Queue ID array and insert them into the command. | |
967 | */ | |
968 | while (nq > 0) { | |
969 | /* | |
970 | * Grab up to the next 3 Ingress Queue IDs (wrapping | |
971 | * around the Ingress Queue ID array if necessary) and | |
972 | * insert them into the firmware RSS command at the | |
973 | * current 3-tuple position within the commad. | |
974 | */ | |
975 | u16 qbuf[3]; | |
976 | u16 *qbp = qbuf; | |
977 | int nqbuf = min(3, nq); | |
978 | ||
979 | nq -= nqbuf; | |
980 | qbuf[0] = qbuf[1] = qbuf[2] = 0; | |
981 | while (nqbuf) { | |
982 | nqbuf--; | |
983 | *qbp++ = *rsp++; | |
984 | if (rsp >= rsp_end) | |
985 | rsp = rspq; | |
986 | } | |
b2e1a3f0 HS |
987 | *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0_V(qbuf[0]) | |
988 | FW_RSS_IND_TBL_CMD_IQ1_V(qbuf[1]) | | |
989 | FW_RSS_IND_TBL_CMD_IQ2_V(qbuf[2])); | |
16f8bd4b CL |
990 | } |
991 | ||
992 | /* | |
993 | * Send this portion of the RRS table update to the firmware; | |
994 | * bail out on any errors. | |
995 | */ | |
996 | ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); | |
997 | if (ret) | |
998 | return ret; | |
999 | } | |
1000 | return 0; | |
1001 | } | |
1002 | ||
1003 | /** | |
1004 | * t4vf_alloc_vi - allocate a virtual interface on a port | |
1005 | * @adapter: the adapter | |
1006 | * @port_id: physical port associated with the VI | |
1007 | * | |
1008 | * Allocate a new Virtual Interface and bind it to the indicated | |
1009 | * physical port. Return the new Virtual Interface Identifier on | |
1010 | * success, or a [negative] error number on failure. | |
1011 | */ | |
1012 | int t4vf_alloc_vi(struct adapter *adapter, int port_id) | |
1013 | { | |
1014 | struct fw_vi_cmd cmd, rpl; | |
1015 | int v; | |
1016 | ||
1017 | /* | |
1018 | * Execute a VI command to allocate Virtual Interface and return its | |
1019 | * VIID. | |
1020 | */ | |
1021 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1022 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | |
1023 | FW_CMD_REQUEST_F | | |
1024 | FW_CMD_WRITE_F | | |
1025 | FW_CMD_EXEC_F); | |
16f8bd4b | 1026 | cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | |
2b5fb1f2 HS |
1027 | FW_VI_CMD_ALLOC_F); |
1028 | cmd.portid_pkd = FW_VI_CMD_PORTID_V(port_id); | |
16f8bd4b CL |
1029 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); |
1030 | if (v) | |
1031 | return v; | |
1032 | ||
2b5fb1f2 | 1033 | return FW_VI_CMD_VIID_G(be16_to_cpu(rpl.type_viid)); |
16f8bd4b CL |
1034 | } |
1035 | ||
1036 | /** | |
1037 | * t4vf_free_vi -- free a virtual interface | |
1038 | * @adapter: the adapter | |
1039 | * @viid: the virtual interface identifier | |
1040 | * | |
1041 | * Free a previously allocated Virtual Interface. Return an error on | |
1042 | * failure. | |
1043 | */ | |
1044 | int t4vf_free_vi(struct adapter *adapter, int viid) | |
1045 | { | |
1046 | struct fw_vi_cmd cmd; | |
1047 | ||
1048 | /* | |
1049 | * Execute a VI command to free the Virtual Interface. | |
1050 | */ | |
1051 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1052 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | |
1053 | FW_CMD_REQUEST_F | | |
1054 | FW_CMD_EXEC_F); | |
16f8bd4b | 1055 | cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | |
2b5fb1f2 HS |
1056 | FW_VI_CMD_FREE_F); |
1057 | cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(viid)); | |
16f8bd4b CL |
1058 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); |
1059 | } | |
1060 | ||
1061 | /** | |
1062 | * t4vf_enable_vi - enable/disable a virtual interface | |
1063 | * @adapter: the adapter | |
1064 | * @viid: the Virtual Interface ID | |
1065 | * @rx_en: 1=enable Rx, 0=disable Rx | |
1066 | * @tx_en: 1=enable Tx, 0=disable Tx | |
1067 | * | |
1068 | * Enables/disables a virtual interface. | |
1069 | */ | |
1070 | int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, | |
1071 | bool rx_en, bool tx_en) | |
1072 | { | |
1073 | struct fw_vi_enable_cmd cmd; | |
1074 | ||
1075 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1076 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | |
1077 | FW_CMD_REQUEST_F | | |
1078 | FW_CMD_EXEC_F | | |
2b5fb1f2 HS |
1079 | FW_VI_ENABLE_CMD_VIID_V(viid)); |
1080 | cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) | | |
1081 | FW_VI_ENABLE_CMD_EEN_V(tx_en) | | |
16f8bd4b CL |
1082 | FW_LEN16(cmd)); |
1083 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); | |
1084 | } | |
1085 | ||
1086 | /** | |
1087 | * t4vf_identify_port - identify a VI's port by blinking its LED | |
1088 | * @adapter: the adapter | |
1089 | * @viid: the Virtual Interface ID | |
1090 | * @nblinks: how many times to blink LED at 2.5 Hz | |
1091 | * | |
1092 | * Identifies a VI's port by blinking its LED. | |
1093 | */ | |
1094 | int t4vf_identify_port(struct adapter *adapter, unsigned int viid, | |
1095 | unsigned int nblinks) | |
1096 | { | |
1097 | struct fw_vi_enable_cmd cmd; | |
1098 | ||
1099 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1100 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | |
1101 | FW_CMD_REQUEST_F | | |
1102 | FW_CMD_EXEC_F | | |
2b5fb1f2 HS |
1103 | FW_VI_ENABLE_CMD_VIID_V(viid)); |
1104 | cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED_F | | |
16f8bd4b CL |
1105 | FW_LEN16(cmd)); |
1106 | cmd.blinkdur = cpu_to_be16(nblinks); | |
1107 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); | |
1108 | } | |
1109 | ||
1110 | /** | |
1111 | * t4vf_set_rxmode - set Rx properties of a virtual interface | |
1112 | * @adapter: the adapter | |
1113 | * @viid: the VI id | |
1114 | * @mtu: the new MTU or -1 for no change | |
1115 | * @promisc: 1 to enable promiscuous mode, 0 to disable it, -1 no change | |
1116 | * @all_multi: 1 to enable all-multi mode, 0 to disable it, -1 no change | |
1117 | * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change | |
1118 | * @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it, | |
1119 | * -1 no change | |
1120 | * | |
1121 | * Sets Rx properties of a virtual interface. | |
1122 | */ | |
1123 | int t4vf_set_rxmode(struct adapter *adapter, unsigned int viid, | |
1124 | int mtu, int promisc, int all_multi, int bcast, int vlanex, | |
1125 | bool sleep_ok) | |
1126 | { | |
1127 | struct fw_vi_rxmode_cmd cmd; | |
1128 | ||
1129 | /* convert to FW values */ | |
1130 | if (mtu < 0) | |
2b5fb1f2 | 1131 | mtu = FW_VI_RXMODE_CMD_MTU_M; |
16f8bd4b | 1132 | if (promisc < 0) |
2b5fb1f2 | 1133 | promisc = FW_VI_RXMODE_CMD_PROMISCEN_M; |
16f8bd4b | 1134 | if (all_multi < 0) |
2b5fb1f2 | 1135 | all_multi = FW_VI_RXMODE_CMD_ALLMULTIEN_M; |
16f8bd4b | 1136 | if (bcast < 0) |
2b5fb1f2 | 1137 | bcast = FW_VI_RXMODE_CMD_BROADCASTEN_M; |
16f8bd4b | 1138 | if (vlanex < 0) |
2b5fb1f2 | 1139 | vlanex = FW_VI_RXMODE_CMD_VLANEXEN_M; |
16f8bd4b CL |
1140 | |
1141 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1142 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_RXMODE_CMD) | |
1143 | FW_CMD_REQUEST_F | | |
1144 | FW_CMD_WRITE_F | | |
2b5fb1f2 | 1145 | FW_VI_RXMODE_CMD_VIID_V(viid)); |
16f8bd4b CL |
1146 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
1147 | cmd.mtu_to_vlanexen = | |
2b5fb1f2 HS |
1148 | cpu_to_be32(FW_VI_RXMODE_CMD_MTU_V(mtu) | |
1149 | FW_VI_RXMODE_CMD_PROMISCEN_V(promisc) | | |
1150 | FW_VI_RXMODE_CMD_ALLMULTIEN_V(all_multi) | | |
1151 | FW_VI_RXMODE_CMD_BROADCASTEN_V(bcast) | | |
1152 | FW_VI_RXMODE_CMD_VLANEXEN_V(vlanex)); | |
16f8bd4b CL |
1153 | return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); |
1154 | } | |
1155 | ||
1156 | /** | |
1157 | * t4vf_alloc_mac_filt - allocates exact-match filters for MAC addresses | |
1158 | * @adapter: the adapter | |
1159 | * @viid: the Virtual Interface Identifier | |
1160 | * @free: if true any existing filters for this VI id are first removed | |
1161 | * @naddr: the number of MAC addresses to allocate filters for (up to 7) | |
1162 | * @addr: the MAC address(es) | |
1163 | * @idx: where to store the index of each allocated filter | |
1164 | * @hash: pointer to hash address filter bitmap | |
1165 | * @sleep_ok: call is allowed to sleep | |
1166 | * | |
1167 | * Allocates an exact-match filter for each of the supplied addresses and | |
1168 | * sets it to the corresponding address. If @idx is not %NULL it should | |
1169 | * have at least @naddr entries, each of which will be set to the index of | |
1170 | * the filter allocated for the corresponding MAC address. If a filter | |
1171 | * could not be allocated for an address its index is set to 0xffff. | |
1172 | * If @hash is not %NULL addresses that fail to allocate an exact filter | |
1173 | * are hashed and update the hash filter bitmap pointed at by @hash. | |
1174 | * | |
1175 | * Returns a negative error number or the number of filters allocated. | |
1176 | */ | |
1177 | int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free, | |
1178 | unsigned int naddr, const u8 **addr, u16 *idx, | |
1179 | u64 *hash, bool sleep_ok) | |
1180 | { | |
42eb59d3 CL |
1181 | int offset, ret = 0; |
1182 | unsigned nfilters = 0; | |
1183 | unsigned int rem = naddr; | |
16f8bd4b | 1184 | struct fw_vi_mac_cmd cmd, rpl; |
41fc2e41 | 1185 | unsigned int max_naddr = adapter->params.arch.mps_tcam_size; |
16f8bd4b | 1186 | |
622c62b5 | 1187 | if (naddr > max_naddr) |
16f8bd4b | 1188 | return -EINVAL; |
16f8bd4b | 1189 | |
42eb59d3 CL |
1190 | for (offset = 0; offset < naddr; /**/) { |
1191 | unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) | |
1192 | ? rem | |
1193 | : ARRAY_SIZE(cmd.u.exact)); | |
1194 | size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, | |
1195 | u.exact[fw_naddr]), 16); | |
1196 | struct fw_vi_mac_exact *p; | |
1197 | int i; | |
1198 | ||
1199 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1200 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | |
1201 | FW_CMD_REQUEST_F | | |
1202 | FW_CMD_WRITE_F | | |
1203 | (free ? FW_CMD_EXEC_F : 0) | | |
2b5fb1f2 | 1204 | FW_VI_MAC_CMD_VIID_V(viid)); |
42eb59d3 | 1205 | cmd.freemacs_to_len16 = |
2b5fb1f2 | 1206 | cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(free) | |
e2ac9628 | 1207 | FW_CMD_LEN16_V(len16)); |
42eb59d3 CL |
1208 | |
1209 | for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { | |
1210 | p->valid_to_idx = cpu_to_be16( | |
2b5fb1f2 HS |
1211 | FW_VI_MAC_CMD_VALID_F | |
1212 | FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_ADD_MAC)); | |
42eb59d3 CL |
1213 | memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); |
1214 | } | |
16f8bd4b | 1215 | |
42eb59d3 CL |
1216 | |
1217 | ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl, | |
1218 | sleep_ok); | |
1219 | if (ret && ret != -ENOMEM) | |
1220 | break; | |
1221 | ||
1222 | for (i = 0, p = rpl.u.exact; i < fw_naddr; i++, p++) { | |
2b5fb1f2 | 1223 | u16 index = FW_VI_MAC_CMD_IDX_G( |
42eb59d3 CL |
1224 | be16_to_cpu(p->valid_to_idx)); |
1225 | ||
1226 | if (idx) | |
1227 | idx[offset+i] = | |
622c62b5 | 1228 | (index >= max_naddr |
42eb59d3 CL |
1229 | ? 0xffff |
1230 | : index); | |
622c62b5 | 1231 | if (index < max_naddr) |
42eb59d3 CL |
1232 | nfilters++; |
1233 | else if (hash) | |
1234 | *hash |= (1ULL << hash_mac_addr(addr[offset+i])); | |
1235 | } | |
1236 | ||
1237 | free = false; | |
1238 | offset += fw_naddr; | |
1239 | rem -= fw_naddr; | |
16f8bd4b | 1240 | } |
42eb59d3 CL |
1241 | |
1242 | /* | |
1243 | * If there were no errors or we merely ran out of room in our MAC | |
1244 | * address arena, return the number of filters actually written. | |
1245 | */ | |
1246 | if (ret == 0 || ret == -ENOMEM) | |
1247 | ret = nfilters; | |
16f8bd4b CL |
1248 | return ret; |
1249 | } | |
1250 | ||
fe5d2709 HS |
1251 | /** |
1252 | * t4vf_free_mac_filt - frees exact-match filters of given MAC addresses | |
1253 | * @adapter: the adapter | |
1254 | * @viid: the VI id | |
1255 | * @naddr: the number of MAC addresses to allocate filters for (up to 7) | |
1256 | * @addr: the MAC address(es) | |
1257 | * @sleep_ok: call is allowed to sleep | |
1258 | * | |
1259 | * Frees the exact-match filter for each of the supplied addresses | |
1260 | * | |
1261 | * Returns a negative error number or the number of filters freed. | |
1262 | */ | |
1263 | int t4vf_free_mac_filt(struct adapter *adapter, unsigned int viid, | |
1264 | unsigned int naddr, const u8 **addr, bool sleep_ok) | |
1265 | { | |
1266 | int offset, ret = 0; | |
1267 | struct fw_vi_mac_cmd cmd; | |
1268 | unsigned int nfilters = 0; | |
1269 | unsigned int max_naddr = adapter->params.arch.mps_tcam_size; | |
1270 | unsigned int rem = naddr; | |
1271 | ||
1272 | if (naddr > max_naddr) | |
1273 | return -EINVAL; | |
1274 | ||
1275 | for (offset = 0; offset < (int)naddr ; /**/) { | |
1276 | unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) ? | |
1277 | rem : ARRAY_SIZE(cmd.u.exact)); | |
1278 | size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, | |
1279 | u.exact[fw_naddr]), 16); | |
1280 | struct fw_vi_mac_exact *p; | |
1281 | int i; | |
1282 | ||
1283 | memset(&cmd, 0, sizeof(cmd)); | |
1284 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | | |
1285 | FW_CMD_REQUEST_F | | |
1286 | FW_CMD_WRITE_F | | |
1287 | FW_CMD_EXEC_V(0) | | |
1288 | FW_VI_MAC_CMD_VIID_V(viid)); | |
1289 | cmd.freemacs_to_len16 = | |
1290 | cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(0) | | |
1291 | FW_CMD_LEN16_V(len16)); | |
1292 | ||
1293 | for (i = 0, p = cmd.u.exact; i < (int)fw_naddr; i++, p++) { | |
1294 | p->valid_to_idx = cpu_to_be16( | |
1295 | FW_VI_MAC_CMD_VALID_F | | |
1296 | FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_MAC_BASED_FREE)); | |
1297 | memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); | |
1298 | } | |
1299 | ||
1300 | ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &cmd, | |
1301 | sleep_ok); | |
1302 | if (ret) | |
1303 | break; | |
1304 | ||
1305 | for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { | |
1306 | u16 index = FW_VI_MAC_CMD_IDX_G( | |
1307 | be16_to_cpu(p->valid_to_idx)); | |
1308 | ||
1309 | if (index < max_naddr) | |
1310 | nfilters++; | |
1311 | } | |
1312 | ||
1313 | offset += fw_naddr; | |
1314 | rem -= fw_naddr; | |
1315 | } | |
1316 | ||
1317 | if (ret == 0) | |
1318 | ret = nfilters; | |
1319 | return ret; | |
1320 | } | |
1321 | ||
16f8bd4b CL |
1322 | /** |
1323 | * t4vf_change_mac - modifies the exact-match filter for a MAC address | |
1324 | * @adapter: the adapter | |
1325 | * @viid: the Virtual Interface ID | |
1326 | * @idx: index of existing filter for old value of MAC address, or -1 | |
1327 | * @addr: the new MAC address value | |
1328 | * @persist: if idx < 0, the new MAC allocation should be persistent | |
1329 | * | |
1330 | * Modifies an exact-match filter and sets it to the new MAC address. | |
1331 | * Note that in general it is not possible to modify the value of a given | |
1332 | * filter so the generic way to modify an address filter is to free the | |
1333 | * one being used by the old address value and allocate a new filter for | |
1334 | * the new address value. @idx can be -1 if the address is a new | |
1335 | * addition. | |
1336 | * | |
1337 | * Returns a negative error number or the index of the filter with the new | |
1338 | * MAC value. | |
1339 | */ | |
1340 | int t4vf_change_mac(struct adapter *adapter, unsigned int viid, | |
1341 | int idx, const u8 *addr, bool persist) | |
1342 | { | |
1343 | int ret; | |
1344 | struct fw_vi_mac_cmd cmd, rpl; | |
1345 | struct fw_vi_mac_exact *p = &cmd.u.exact[0]; | |
1346 | size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, | |
1347 | u.exact[1]), 16); | |
41fc2e41 | 1348 | unsigned int max_mac_addr = adapter->params.arch.mps_tcam_size; |
16f8bd4b CL |
1349 | |
1350 | /* | |
1351 | * If this is a new allocation, determine whether it should be | |
1352 | * persistent (across a "freemacs" operation) or not. | |
1353 | */ | |
1354 | if (idx < 0) | |
1355 | idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC; | |
1356 | ||
1357 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1358 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | |
1359 | FW_CMD_REQUEST_F | | |
1360 | FW_CMD_WRITE_F | | |
2b5fb1f2 | 1361 | FW_VI_MAC_CMD_VIID_V(viid)); |
e2ac9628 | 1362 | cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); |
2b5fb1f2 HS |
1363 | p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID_F | |
1364 | FW_VI_MAC_CMD_IDX_V(idx)); | |
16f8bd4b CL |
1365 | memcpy(p->macaddr, addr, sizeof(p->macaddr)); |
1366 | ||
1367 | ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); | |
1368 | if (ret == 0) { | |
1369 | p = &rpl.u.exact[0]; | |
2b5fb1f2 | 1370 | ret = FW_VI_MAC_CMD_IDX_G(be16_to_cpu(p->valid_to_idx)); |
41fc2e41 | 1371 | if (ret >= max_mac_addr) |
16f8bd4b CL |
1372 | ret = -ENOMEM; |
1373 | } | |
1374 | return ret; | |
1375 | } | |
1376 | ||
1377 | /** | |
1378 | * t4vf_set_addr_hash - program the MAC inexact-match hash filter | |
1379 | * @adapter: the adapter | |
1380 | * @viid: the Virtual Interface Identifier | |
1381 | * @ucast: whether the hash filter should also match unicast addresses | |
1382 | * @vec: the value to be written to the hash filter | |
1383 | * @sleep_ok: call is allowed to sleep | |
1384 | * | |
1385 | * Sets the 64-bit inexact-match hash filter for a virtual interface. | |
1386 | */ | |
1387 | int t4vf_set_addr_hash(struct adapter *adapter, unsigned int viid, | |
1388 | bool ucast, u64 vec, bool sleep_ok) | |
1389 | { | |
1390 | struct fw_vi_mac_cmd cmd; | |
1391 | size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, | |
1392 | u.exact[0]), 16); | |
1393 | ||
1394 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1395 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | |
1396 | FW_CMD_REQUEST_F | | |
1397 | FW_CMD_WRITE_F | | |
2b5fb1f2 HS |
1398 | FW_VI_ENABLE_CMD_VIID_V(viid)); |
1399 | cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN_F | | |
1400 | FW_VI_MAC_CMD_HASHUNIEN_V(ucast) | | |
e2ac9628 | 1401 | FW_CMD_LEN16_V(len16)); |
16f8bd4b CL |
1402 | cmd.u.hash.hashvec = cpu_to_be64(vec); |
1403 | return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); | |
1404 | } | |
1405 | ||
1406 | /** | |
1407 | * t4vf_get_port_stats - collect "port" statistics | |
1408 | * @adapter: the adapter | |
1409 | * @pidx: the port index | |
1410 | * @s: the stats structure to fill | |
1411 | * | |
1412 | * Collect statistics for the "port"'s Virtual Interface. | |
1413 | */ | |
1414 | int t4vf_get_port_stats(struct adapter *adapter, int pidx, | |
1415 | struct t4vf_port_stats *s) | |
1416 | { | |
1417 | struct port_info *pi = adap2pinfo(adapter, pidx); | |
1418 | struct fw_vi_stats_vf fwstats; | |
1419 | unsigned int rem = VI_VF_NUM_STATS; | |
1420 | __be64 *fwsp = (__be64 *)&fwstats; | |
1421 | ||
1422 | /* | |
1423 | * Grab the Virtual Interface statistics a chunk at a time via mailbox | |
1424 | * commands. We could use a Work Request and get all of them at once | |
1425 | * but that's an asynchronous interface which is awkward to use. | |
1426 | */ | |
1427 | while (rem) { | |
1428 | unsigned int ix = VI_VF_NUM_STATS - rem; | |
1429 | unsigned int nstats = min(6U, rem); | |
1430 | struct fw_vi_stats_cmd cmd, rpl; | |
1431 | size_t len = (offsetof(struct fw_vi_stats_cmd, u) + | |
1432 | sizeof(struct fw_vi_stats_ctl)); | |
1433 | size_t len16 = DIV_ROUND_UP(len, 16); | |
1434 | int ret; | |
1435 | ||
1436 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 | 1437 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_STATS_CMD) | |
2b5fb1f2 | 1438 | FW_VI_STATS_CMD_VIID_V(pi->viid) | |
e2ac9628 HS |
1439 | FW_CMD_REQUEST_F | |
1440 | FW_CMD_READ_F); | |
1441 | cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); | |
16f8bd4b | 1442 | cmd.u.ctl.nstats_ix = |
2b5fb1f2 HS |
1443 | cpu_to_be16(FW_VI_STATS_CMD_IX_V(ix) | |
1444 | FW_VI_STATS_CMD_NSTATS_V(nstats)); | |
16f8bd4b CL |
1445 | ret = t4vf_wr_mbox_ns(adapter, &cmd, len, &rpl); |
1446 | if (ret) | |
1447 | return ret; | |
1448 | ||
1449 | memcpy(fwsp, &rpl.u.ctl.stat0, sizeof(__be64) * nstats); | |
1450 | ||
1451 | rem -= nstats; | |
1452 | fwsp += nstats; | |
1453 | } | |
1454 | ||
1455 | /* | |
1456 | * Translate firmware statistics into host native statistics. | |
1457 | */ | |
1458 | s->tx_bcast_bytes = be64_to_cpu(fwstats.tx_bcast_bytes); | |
1459 | s->tx_bcast_frames = be64_to_cpu(fwstats.tx_bcast_frames); | |
1460 | s->tx_mcast_bytes = be64_to_cpu(fwstats.tx_mcast_bytes); | |
1461 | s->tx_mcast_frames = be64_to_cpu(fwstats.tx_mcast_frames); | |
1462 | s->tx_ucast_bytes = be64_to_cpu(fwstats.tx_ucast_bytes); | |
1463 | s->tx_ucast_frames = be64_to_cpu(fwstats.tx_ucast_frames); | |
1464 | s->tx_drop_frames = be64_to_cpu(fwstats.tx_drop_frames); | |
1465 | s->tx_offload_bytes = be64_to_cpu(fwstats.tx_offload_bytes); | |
1466 | s->tx_offload_frames = be64_to_cpu(fwstats.tx_offload_frames); | |
1467 | ||
1468 | s->rx_bcast_bytes = be64_to_cpu(fwstats.rx_bcast_bytes); | |
1469 | s->rx_bcast_frames = be64_to_cpu(fwstats.rx_bcast_frames); | |
1470 | s->rx_mcast_bytes = be64_to_cpu(fwstats.rx_mcast_bytes); | |
1471 | s->rx_mcast_frames = be64_to_cpu(fwstats.rx_mcast_frames); | |
1472 | s->rx_ucast_bytes = be64_to_cpu(fwstats.rx_ucast_bytes); | |
1473 | s->rx_ucast_frames = be64_to_cpu(fwstats.rx_ucast_frames); | |
1474 | ||
1475 | s->rx_err_frames = be64_to_cpu(fwstats.rx_err_frames); | |
1476 | ||
1477 | return 0; | |
1478 | } | |
1479 | ||
1480 | /** | |
1481 | * t4vf_iq_free - free an ingress queue and its free lists | |
1482 | * @adapter: the adapter | |
1483 | * @iqtype: the ingress queue type (FW_IQ_TYPE_FL_INT_CAP, etc.) | |
1484 | * @iqid: ingress queue ID | |
1485 | * @fl0id: FL0 queue ID or 0xffff if no attached FL0 | |
1486 | * @fl1id: FL1 queue ID or 0xffff if no attached FL1 | |
1487 | * | |
1488 | * Frees an ingress queue and its associated free lists, if any. | |
1489 | */ | |
1490 | int t4vf_iq_free(struct adapter *adapter, unsigned int iqtype, | |
1491 | unsigned int iqid, unsigned int fl0id, unsigned int fl1id) | |
1492 | { | |
1493 | struct fw_iq_cmd cmd; | |
1494 | ||
1495 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1496 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) | |
1497 | FW_CMD_REQUEST_F | | |
1498 | FW_CMD_EXEC_F); | |
6e4b51a6 | 1499 | cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE_F | |
16f8bd4b CL |
1500 | FW_LEN16(cmd)); |
1501 | cmd.type_to_iqandstindex = | |
6e4b51a6 | 1502 | cpu_to_be32(FW_IQ_CMD_TYPE_V(iqtype)); |
16f8bd4b CL |
1503 | |
1504 | cmd.iqid = cpu_to_be16(iqid); | |
1505 | cmd.fl0id = cpu_to_be16(fl0id); | |
1506 | cmd.fl1id = cpu_to_be16(fl1id); | |
1507 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); | |
1508 | } | |
1509 | ||
1510 | /** | |
1511 | * t4vf_eth_eq_free - free an Ethernet egress queue | |
1512 | * @adapter: the adapter | |
1513 | * @eqid: egress queue ID | |
1514 | * | |
1515 | * Frees an Ethernet egress queue. | |
1516 | */ | |
1517 | int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid) | |
1518 | { | |
1519 | struct fw_eq_eth_cmd cmd; | |
1520 | ||
1521 | memset(&cmd, 0, sizeof(cmd)); | |
e2ac9628 HS |
1522 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) | |
1523 | FW_CMD_REQUEST_F | | |
1524 | FW_CMD_EXEC_F); | |
6e4b51a6 | 1525 | cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE_F | |
16f8bd4b | 1526 | FW_LEN16(cmd)); |
6e4b51a6 | 1527 | cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID_V(eqid)); |
16f8bd4b CL |
1528 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); |
1529 | } | |
1530 | ||
1531 | /** | |
1532 | * t4vf_handle_fw_rpl - process a firmware reply message | |
1533 | * @adapter: the adapter | |
1534 | * @rpl: start of the firmware message | |
1535 | * | |
1536 | * Processes a firmware message, such as link state change messages. | |
1537 | */ | |
1538 | int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) | |
1539 | { | |
caedda35 | 1540 | const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl; |
e2ac9628 | 1541 | u8 opcode = FW_CMD_OP_G(be32_to_cpu(cmd_hdr->hi)); |
16f8bd4b CL |
1542 | |
1543 | switch (opcode) { | |
1544 | case FW_PORT_CMD: { | |
1545 | /* | |
1546 | * Link/module state change message. | |
1547 | */ | |
caedda35 CL |
1548 | const struct fw_port_cmd *port_cmd = |
1549 | (const struct fw_port_cmd *)rpl; | |
5ad24def | 1550 | u32 stat, mod; |
16f8bd4b CL |
1551 | int action, port_id, link_ok, speed, fc, pidx; |
1552 | ||
1553 | /* | |
1554 | * Extract various fields from port status change message. | |
1555 | */ | |
2b5fb1f2 | 1556 | action = FW_PORT_CMD_ACTION_G( |
16f8bd4b CL |
1557 | be32_to_cpu(port_cmd->action_to_len16)); |
1558 | if (action != FW_PORT_ACTION_GET_PORT_INFO) { | |
1559 | dev_err(adapter->pdev_dev, | |
1560 | "Unknown firmware PORT reply action %x\n", | |
1561 | action); | |
1562 | break; | |
1563 | } | |
1564 | ||
2b5fb1f2 | 1565 | port_id = FW_PORT_CMD_PORTID_G( |
16f8bd4b CL |
1566 | be32_to_cpu(port_cmd->op_to_portid)); |
1567 | ||
5ad24def HS |
1568 | stat = be32_to_cpu(port_cmd->u.info.lstatus_to_modtype); |
1569 | link_ok = (stat & FW_PORT_CMD_LSTATUS_F) != 0; | |
16f8bd4b CL |
1570 | speed = 0; |
1571 | fc = 0; | |
5ad24def | 1572 | if (stat & FW_PORT_CMD_RXPAUSE_F) |
16f8bd4b | 1573 | fc |= PAUSE_RX; |
5ad24def | 1574 | if (stat & FW_PORT_CMD_TXPAUSE_F) |
16f8bd4b | 1575 | fc |= PAUSE_TX; |
5ad24def | 1576 | if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M)) |
897d55df | 1577 | speed = 100; |
5ad24def | 1578 | else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G)) |
897d55df | 1579 | speed = 1000; |
5ad24def | 1580 | else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G)) |
897d55df | 1581 | speed = 10000; |
5ad24def | 1582 | else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G)) |
897d55df | 1583 | speed = 40000; |
16f8bd4b CL |
1584 | |
1585 | /* | |
1586 | * Scan all of our "ports" (Virtual Interfaces) looking for | |
1587 | * those bound to the physical port which has changed. If | |
1588 | * our recorded state doesn't match the current state, | |
1589 | * signal that change to the OS code. | |
1590 | */ | |
1591 | for_each_port(adapter, pidx) { | |
1592 | struct port_info *pi = adap2pinfo(adapter, pidx); | |
1593 | struct link_config *lc; | |
1594 | ||
1595 | if (pi->port_id != port_id) | |
1596 | continue; | |
1597 | ||
1598 | lc = &pi->link_cfg; | |
5ad24def HS |
1599 | |
1600 | mod = FW_PORT_CMD_MODTYPE_G(stat); | |
1601 | if (mod != pi->mod_type) { | |
1602 | pi->mod_type = mod; | |
1603 | t4vf_os_portmod_changed(adapter, pidx); | |
1604 | } | |
1605 | ||
16f8bd4b CL |
1606 | if (link_ok != lc->link_ok || speed != lc->speed || |
1607 | fc != lc->fc) { | |
1608 | /* something changed */ | |
1609 | lc->link_ok = link_ok; | |
1610 | lc->speed = speed; | |
1611 | lc->fc = fc; | |
5ad24def HS |
1612 | lc->supported = |
1613 | be16_to_cpu(port_cmd->u.info.pcap); | |
16f8bd4b CL |
1614 | t4vf_os_link_changed(adapter, pidx, link_ok); |
1615 | } | |
1616 | } | |
1617 | break; | |
1618 | } | |
1619 | ||
1620 | default: | |
1621 | dev_err(adapter->pdev_dev, "Unknown firmware reply %X\n", | |
1622 | opcode); | |
1623 | } | |
1624 | return 0; | |
1625 | } | |
e0a8b34a HS |
1626 | |
1627 | /** | |
1628 | */ | |
1629 | int t4vf_prep_adapter(struct adapter *adapter) | |
1630 | { | |
1631 | int err; | |
1632 | unsigned int chipid; | |
1633 | ||
1634 | /* Wait for the device to become ready before proceeding ... | |
1635 | */ | |
1636 | err = t4vf_wait_dev_ready(adapter); | |
1637 | if (err) | |
1638 | return err; | |
1639 | ||
1640 | /* Default port and clock for debugging in case we can't reach | |
1641 | * firmware. | |
1642 | */ | |
1643 | adapter->params.nports = 1; | |
1644 | adapter->params.vfres.pmask = 1; | |
1645 | adapter->params.vpd.cclk = 50000; | |
1646 | ||
1647 | adapter->params.chip = 0; | |
1648 | switch (CHELSIO_PCI_ID_VER(adapter->pdev->device)) { | |
1649 | case CHELSIO_T4: | |
1650 | adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, 0); | |
41fc2e41 HS |
1651 | adapter->params.arch.sge_fl_db = DBPRIO_F; |
1652 | adapter->params.arch.mps_tcam_size = | |
1653 | NUM_MPS_CLS_SRAM_L_INSTANCES; | |
e0a8b34a HS |
1654 | break; |
1655 | ||
1656 | case CHELSIO_T5: | |
0d804338 | 1657 | chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); |
e0a8b34a | 1658 | adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid); |
41fc2e41 HS |
1659 | adapter->params.arch.sge_fl_db = DBPRIO_F | DBTYPE_F; |
1660 | adapter->params.arch.mps_tcam_size = | |
1661 | NUM_MPS_T5_CLS_SRAM_L_INSTANCES; | |
1662 | break; | |
1663 | ||
1664 | case CHELSIO_T6: | |
1665 | chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); | |
1666 | adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, chipid); | |
1667 | adapter->params.arch.sge_fl_db = 0; | |
1668 | adapter->params.arch.mps_tcam_size = | |
1669 | NUM_MPS_T5_CLS_SRAM_L_INSTANCES; | |
e0a8b34a HS |
1670 | break; |
1671 | } | |
1672 | ||
1673 | return 0; | |
1674 | } |