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enic: Add SRIOV support
[deliverable/linux.git] / drivers / net / ethernet / cisco / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
a6b7a407 26#include <linux/interrupt.h>
01f2e4ea
SF		 27#include <linux/workqueue.h>
28#include <linux/pci.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
01789349 31#include <linux/if.h>
01f2e4ea
SF		 32#include <linux/if_ether.h>
33#include <linux/if_vlan.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/ipv6.h>
38#include <linux/tcp.h>
29046f9b 39#include <linux/rtnetlink.h>
70c71606 40#include <linux/prefetch.h>
b7c6bfb7 41#include <net/ip6_checksum.h>
01f2e4ea
SF		 42
43#include "cq_enet_desc.h"
44#include "vnic_dev.h"
45#include "vnic_intr.h"
46#include "vnic_stats.h"
f8bd9091 47#include "vnic_vic.h"
01f2e4ea
SF		 48#include "enic_res.h"
49#include "enic.h"
51987461 50#include "enic_dev.h"
b3abfbd2 51#include "enic_pp.h"
01f2e4ea
SF		 52
53#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 54#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
55#define MAX_TSO (1 << 16)
56#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
57
58#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 59#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
01f2e4ea
SF		 60
61/* Supported devices */
a3aa1884 62static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 63 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 64 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
01f2e4ea
SF		 65 { 0, } /* end of table */
66};
67
68MODULE_DESCRIPTION(DRV_DESCRIPTION);
69MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
70MODULE_LICENSE("GPL");
71MODULE_VERSION(DRV_VERSION);
72MODULE_DEVICE_TABLE(pci, enic_id_table);
73
74struct enic_stat {
75 char name[ETH_GSTRING_LEN];
76 unsigned int offset;
77};
78
79#define ENIC_TX_STAT(stat) \
80 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
81#define ENIC_RX_STAT(stat) \
82 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
83
84static const struct enic_stat enic_tx_stats[] = {
85 ENIC_TX_STAT(tx_frames_ok),
86 ENIC_TX_STAT(tx_unicast_frames_ok),
87 ENIC_TX_STAT(tx_multicast_frames_ok),
88 ENIC_TX_STAT(tx_broadcast_frames_ok),
89 ENIC_TX_STAT(tx_bytes_ok),
90 ENIC_TX_STAT(tx_unicast_bytes_ok),
91 ENIC_TX_STAT(tx_multicast_bytes_ok),
92 ENIC_TX_STAT(tx_broadcast_bytes_ok),
93 ENIC_TX_STAT(tx_drops),
94 ENIC_TX_STAT(tx_errors),
95 ENIC_TX_STAT(tx_tso),
96};
97
98static const struct enic_stat enic_rx_stats[] = {
99 ENIC_RX_STAT(rx_frames_ok),
100 ENIC_RX_STAT(rx_frames_total),
101 ENIC_RX_STAT(rx_unicast_frames_ok),
102 ENIC_RX_STAT(rx_multicast_frames_ok),
103 ENIC_RX_STAT(rx_broadcast_frames_ok),
104 ENIC_RX_STAT(rx_bytes_ok),
105 ENIC_RX_STAT(rx_unicast_bytes_ok),
106 ENIC_RX_STAT(rx_multicast_bytes_ok),
107 ENIC_RX_STAT(rx_broadcast_bytes_ok),
108 ENIC_RX_STAT(rx_drop),
109 ENIC_RX_STAT(rx_no_bufs),
110 ENIC_RX_STAT(rx_errors),
111 ENIC_RX_STAT(rx_rss),
112 ENIC_RX_STAT(rx_crc_errors),
113 ENIC_RX_STAT(rx_frames_64),
114 ENIC_RX_STAT(rx_frames_127),
115 ENIC_RX_STAT(rx_frames_255),
116 ENIC_RX_STAT(rx_frames_511),
117 ENIC_RX_STAT(rx_frames_1023),
118 ENIC_RX_STAT(rx_frames_1518),
119 ENIC_RX_STAT(rx_frames_to_max),
120};
121
122static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
123static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
124
f8bd9091
SF		 125static int enic_is_dynamic(struct enic *enic)
126{
127 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
128}
129
8749b427
RP		 130int enic_sriov_enabled(struct enic *enic)
131{
132 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
133}
134
717258ba
VK		 135static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
136{
137 return rq;
138}
139
140static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
141{
142 return enic->rq_count + wq;
143}
144
145static inline unsigned int enic_legacy_io_intr(void)
146{
147 return 0;
148}
149
150static inline unsigned int enic_legacy_err_intr(void)
151{
152 return 1;
153}
154
155static inline unsigned int enic_legacy_notify_intr(void)
156{
157 return 2;
158}
159
160static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
161{
7d260ec2 162 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
717258ba
VK		 163}
164
165static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
166{
7d260ec2 167 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
717258ba
VK		 168}
169
170static inline unsigned int enic_msix_err_intr(struct enic *enic)
171{
172 return enic->rq_count + enic->wq_count;
173}
174
175static inline unsigned int enic_msix_notify_intr(struct enic *enic)
176{
177 return enic->rq_count + enic->wq_count + 1;
178}
179
01f2e4ea
SF		 180static int enic_get_settings(struct net_device *netdev,
181 struct ethtool_cmd *ecmd)
182{
183 struct enic *enic = netdev_priv(netdev);
184
185 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
186 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
187 ecmd->port = PORT_FIBRE;
188 ecmd->transceiver = XCVR_EXTERNAL;
189
190 if (netif_carrier_ok(netdev)) {
70739497 191 ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
01f2e4ea
SF		 192 ecmd->duplex = DUPLEX_FULL;
193 } else {
70739497 194 ethtool_cmd_speed_set(ecmd, -1);
01f2e4ea
SF		 195 ecmd->duplex = -1;
196 }
197
198 ecmd->autoneg = AUTONEG_DISABLE;
199
200 return 0;
201}
202
203static void enic_get_drvinfo(struct net_device *netdev,
204 struct ethtool_drvinfo *drvinfo)
205{
206 struct enic *enic = netdev_priv(netdev);
207 struct vnic_devcmd_fw_info *fw_info;
208
383ab92f 209 enic_dev_fw_info(enic, &fw_info);
01f2e4ea
SF		 210
211 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
212 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
213 strncpy(drvinfo->fw_version, fw_info->fw_version,
214 sizeof(drvinfo->fw_version));
215 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
216 sizeof(drvinfo->bus_info));
217}
218
219static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
220{
221 unsigned int i;
222
223 switch (stringset) {
224 case ETH_SS_STATS:
225 for (i = 0; i < enic_n_tx_stats; i++) {
226 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
227 data += ETH_GSTRING_LEN;
228 }
229 for (i = 0; i < enic_n_rx_stats; i++) {
230 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
231 data += ETH_GSTRING_LEN;
232 }
233 break;
234 }
235}
236
25f0a061 237static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 238{
25f0a061
SF		 239 switch (sset) {
240 case ETH_SS_STATS:
241 return enic_n_tx_stats + enic_n_rx_stats;
242 default:
243 return -EOPNOTSUPP;
244 }
01f2e4ea
SF		 245}
246
247static void enic_get_ethtool_stats(struct net_device *netdev,
248 struct ethtool_stats *stats, u64 *data)
249{
250 struct enic *enic = netdev_priv(netdev);
251 struct vnic_stats *vstats;
252 unsigned int i;
253
383ab92f 254 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 255
256 for (i = 0; i < enic_n_tx_stats; i++)
257 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
258 for (i = 0; i < enic_n_rx_stats; i++)
259 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
260}
261
01f2e4ea
SF		 262static u32 enic_get_msglevel(struct net_device *netdev)
263{
264 struct enic *enic = netdev_priv(netdev);
265 return enic->msg_enable;
266}
267
268static void enic_set_msglevel(struct net_device *netdev, u32 value)
269{
270 struct enic *enic = netdev_priv(netdev);
271 enic->msg_enable = value;
272}
273
7c844599
SF		 274static int enic_get_coalesce(struct net_device *netdev,
275 struct ethtool_coalesce *ecmd)
276{
277 struct enic *enic = netdev_priv(netdev);
278
279 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
280 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
281
282 return 0;
283}
284
285static int enic_set_coalesce(struct net_device *netdev,
286 struct ethtool_coalesce *ecmd)
287{
288 struct enic *enic = netdev_priv(netdev);
289 u32 tx_coalesce_usecs;
290 u32 rx_coalesce_usecs;
717258ba 291 unsigned int i, intr;
7c844599 292
ea7ea65a
VK		 293 tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs,
294 vnic_dev_get_intr_coal_timer_max(enic->vdev));
295 rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs,
296 vnic_dev_get_intr_coal_timer_max(enic->vdev));
7c844599
SF		 297
298 switch (vnic_dev_get_intr_mode(enic->vdev)) {
299 case VNIC_DEV_INTR_MODE_INTX:
300 if (tx_coalesce_usecs != rx_coalesce_usecs)
301 return -EINVAL;
302
717258ba
VK		 303 intr = enic_legacy_io_intr();
304 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 305 tx_coalesce_usecs);
7c844599
SF		 306 break;
307 case VNIC_DEV_INTR_MODE_MSI:
308 if (tx_coalesce_usecs != rx_coalesce_usecs)
309 return -EINVAL;
310
311 vnic_intr_coalescing_timer_set(&enic->intr[0],
ea7ea65a 312 tx_coalesce_usecs);
7c844599
SF		 313 break;
314 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 315 for (i = 0; i < enic->wq_count; i++) {
316 intr = enic_msix_wq_intr(enic, i);
317 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 318 tx_coalesce_usecs);
717258ba
VK		 319 }
320
321 for (i = 0; i < enic->rq_count; i++) {
322 intr = enic_msix_rq_intr(enic, i);
323 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 324 rx_coalesce_usecs);
717258ba
VK		 325 }
326
7c844599
SF		 327 break;
328 default:
329 break;
330 }
331
332 enic->tx_coalesce_usecs = tx_coalesce_usecs;
333 enic->rx_coalesce_usecs = rx_coalesce_usecs;
334
335 return 0;
336}
337
0fc0b732 338static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 339 .get_settings = enic_get_settings,
340 .get_drvinfo = enic_get_drvinfo,
341 .get_msglevel = enic_get_msglevel,
342 .set_msglevel = enic_set_msglevel,
343 .get_link = ethtool_op_get_link,
344 .get_strings = enic_get_strings,
25f0a061 345 .get_sset_count = enic_get_sset_count,
01f2e4ea 346 .get_ethtool_stats = enic_get_ethtool_stats,
7c844599
SF		 347 .get_coalesce = enic_get_coalesce,
348 .set_coalesce = enic_set_coalesce,
01f2e4ea
SF		 349};
350
351static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
352{
353 struct enic *enic = vnic_dev_priv(wq->vdev);
354
355 if (buf->sop)
356 pci_unmap_single(enic->pdev, buf->dma_addr,
357 buf->len, PCI_DMA_TODEVICE);
358 else
359 pci_unmap_page(enic->pdev, buf->dma_addr,
360 buf->len, PCI_DMA_TODEVICE);
361
362 if (buf->os_buf)
363 dev_kfree_skb_any(buf->os_buf);
364}
365
366static void enic_wq_free_buf(struct vnic_wq *wq,
367 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
368{
369 enic_free_wq_buf(wq, buf);
370}
371
372static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
373 u8 type, u16 q_number, u16 completed_index, void *opaque)
374{
375 struct enic *enic = vnic_dev_priv(vdev);
376
377 spin_lock(&enic->wq_lock[q_number]);
378
379 vnic_wq_service(&enic->wq[q_number], cq_desc,
380 completed_index, enic_wq_free_buf,
381 opaque);
382
383 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 384 vnic_wq_desc_avail(&enic->wq[q_number]) >=
385 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 386 netif_wake_queue(enic->netdev);
387
388 spin_unlock(&enic->wq_lock[q_number]);
389
390 return 0;
391}
392
393static void enic_log_q_error(struct enic *enic)
394{
395 unsigned int i;
396 u32 error_status;
397
398 for (i = 0; i < enic->wq_count; i++) {
399 error_status = vnic_wq_error_status(&enic->wq[i]);
400 if (error_status)
a7a79deb
VK		 401 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
402 i, error_status);
01f2e4ea
SF		 403 }
404
405 for (i = 0; i < enic->rq_count; i++) {
406 error_status = vnic_rq_error_status(&enic->rq[i]);
407 if (error_status)
a7a79deb
VK		 408 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
409 i, error_status);
01f2e4ea
SF		 410 }
411}
412
383ab92f 413static void enic_msglvl_check(struct enic *enic)
01f2e4ea 414{
383ab92f 415 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 416
383ab92f 417 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 418 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
419 enic->msg_enable, msg_enable);
383ab92f 420 enic->msg_enable = msg_enable;
01f2e4ea
SF		 421 }
422}
423
424static void enic_mtu_check(struct enic *enic)
425{
426 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 427 struct net_device *netdev = enic->netdev;
01f2e4ea 428
491598a4 429 if (mtu && mtu != enic->port_mtu) {
7c844599 430 enic->port_mtu = mtu;
c97c894d
RP		 431 if (enic_is_dynamic(enic)) {
432 mtu = max_t(int, ENIC_MIN_MTU,
433 min_t(int, ENIC_MAX_MTU, mtu));
434 if (mtu != netdev->mtu)
435 schedule_work(&enic->change_mtu_work);
436 } else {
437 if (mtu < netdev->mtu)
438 netdev_warn(netdev,
439 "interface MTU (%d) set higher "
440 "than switch port MTU (%d)\n",
441 netdev->mtu, mtu);
442 }
01f2e4ea
SF		 443 }
444}
445
383ab92f 446static void enic_link_check(struct enic *enic)
01f2e4ea 447{
383ab92f
VK		 448 int link_status = vnic_dev_link_status(enic->vdev);
449 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 450
383ab92f 451 if (link_status && !carrier_ok) {
a7a79deb 452 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 453 netif_carrier_on(enic->netdev);
454 } else if (!link_status && carrier_ok) {
a7a79deb 455 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 456 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 457 }
458}
459
460static void enic_notify_check(struct enic *enic)
461{
462 enic_msglvl_check(enic);
463 enic_mtu_check(enic);
464 enic_link_check(enic);
465}
466
467#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
468
469static irqreturn_t enic_isr_legacy(int irq, void *data)
470{
471 struct net_device *netdev = data;
472 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 473 unsigned int io_intr = enic_legacy_io_intr();
474 unsigned int err_intr = enic_legacy_err_intr();
475 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 476 u32 pba;
477
717258ba 478 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 479
480 pba = vnic_intr_legacy_pba(enic->legacy_pba);
481 if (!pba) {
717258ba 482 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 483 return IRQ_NONE; /* not our interrupt */
484 }
485
717258ba
VK		 486 if (ENIC_TEST_INTR(pba, notify_intr)) {
487 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 488 enic_notify_check(enic);
ed8af6b2 489 }
01f2e4ea 490
717258ba
VK		 491 if (ENIC_TEST_INTR(pba, err_intr)) {
492 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 493 enic_log_q_error(enic);
494 /* schedule recovery from WQ/RQ error */
495 schedule_work(&enic->reset);
496 return IRQ_HANDLED;
497 }
498
717258ba
VK		 499 if (ENIC_TEST_INTR(pba, io_intr)) {
500 if (napi_schedule_prep(&enic->napi[0]))
501 __napi_schedule(&enic->napi[0]);
01f2e4ea 502 } else {
717258ba 503 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 504 }
505
506 return IRQ_HANDLED;
507}
508
509static irqreturn_t enic_isr_msi(int irq, void *data)
510{
511 struct enic *enic = data;
512
513 /* With MSI, there is no sharing of interrupts, so this is
514 * our interrupt and there is no need to ack it. The device
515 * is not providing per-vector masking, so the OS will not
516 * write to PCI config space to mask/unmask the interrupt.
517 * We're using mask_on_assertion for MSI, so the device
518 * automatically masks the interrupt when the interrupt is
519 * generated. Later, when exiting polling, the interrupt
520 * will be unmasked (see enic_poll).
521 *
522 * Also, the device uses the same PCIe Traffic Class (TC)
523 * for Memory Write data and MSI, so there are no ordering
524 * issues; the MSI will always arrive at the Root Complex
525 * _after_ corresponding Memory Writes (i.e. descriptor
526 * writes).
527 */
528
717258ba 529 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 530
531 return IRQ_HANDLED;
532}
533
534static irqreturn_t enic_isr_msix_rq(int irq, void *data)
535{
717258ba 536 struct napi_struct *napi = data;
01f2e4ea
SF		 537
538 /* schedule NAPI polling for RQ cleanup */
717258ba 539 napi_schedule(napi);
01f2e4ea
SF		 540
541 return IRQ_HANDLED;
542}
543
544static irqreturn_t enic_isr_msix_wq(int irq, void *data)
545{
546 struct enic *enic = data;
717258ba
VK		 547 unsigned int cq = enic_cq_wq(enic, 0);
548 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 549 unsigned int wq_work_to_do = -1; /* no limit */
550 unsigned int wq_work_done;
551
717258ba 552 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 553 wq_work_to_do, enic_wq_service, NULL);
554
717258ba 555 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 556 wq_work_done,
557 1 /* unmask intr */,
558 1 /* reset intr timer */);
559
560 return IRQ_HANDLED;
561}
562
563static irqreturn_t enic_isr_msix_err(int irq, void *data)
564{
565 struct enic *enic = data;
717258ba 566 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 567
717258ba 568 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 569
01f2e4ea
SF		 570 enic_log_q_error(enic);
571
572 /* schedule recovery from WQ/RQ error */
573 schedule_work(&enic->reset);
574
575 return IRQ_HANDLED;
576}
577
578static irqreturn_t enic_isr_msix_notify(int irq, void *data)
579{
580 struct enic *enic = data;
717258ba 581 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 582
717258ba 583 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 584 enic_notify_check(enic);
01f2e4ea
SF		 585
586 return IRQ_HANDLED;
587}
588
589static inline void enic_queue_wq_skb_cont(struct enic *enic,
590 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 591 unsigned int len_left, int loopback)
01f2e4ea
SF		 592{
593 skb_frag_t *frag;
594
595 /* Queue additional data fragments */
596 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
597 len_left -= frag->size;
598 enic_queue_wq_desc_cont(wq, skb,
4bf5adbf
IC		 599 skb_frag_dma_map(&enic->pdev->dev,
600 frag, 0, frag->size,
601 PCI_DMA_TODEVICE),
01f2e4ea 602 frag->size,
1825aca6
VK		 603 (len_left == 0), /* EOP? */
604 loopback);
01f2e4ea
SF		 605 }
606}
607
608static inline void enic_queue_wq_skb_vlan(struct enic *enic,
609 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 610 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 611{
612 unsigned int head_len = skb_headlen(skb);
613 unsigned int len_left = skb->len - head_len;
614 int eop = (len_left == 0);
615
ea0d7d91
SF		 616 /* Queue the main skb fragment. The fragments are no larger
617 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
618 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
619 * per fragment is queued.
620 */
01f2e4ea
SF		 621 enic_queue_wq_desc(wq, skb,
622 pci_map_single(enic->pdev, skb->data,
623 head_len, PCI_DMA_TODEVICE),
624 head_len,
625 vlan_tag_insert, vlan_tag,
1825aca6 626 eop, loopback);
01f2e4ea
SF		 627
628 if (!eop)
1825aca6 629 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 630}
631
632static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
633 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 634 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 635{
636 unsigned int head_len = skb_headlen(skb);
637 unsigned int len_left = skb->len - head_len;
0d0b1672 638 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 639 unsigned int csum_offset = hdr_len + skb->csum_offset;
640 int eop = (len_left == 0);
641
ea0d7d91
SF		 642 /* Queue the main skb fragment. The fragments are no larger
643 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
644 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
645 * per fragment is queued.
646 */
01f2e4ea
SF		 647 enic_queue_wq_desc_csum_l4(wq, skb,
648 pci_map_single(enic->pdev, skb->data,
649 head_len, PCI_DMA_TODEVICE),
650 head_len,
651 csum_offset,
652 hdr_len,
653 vlan_tag_insert, vlan_tag,
1825aca6 654 eop, loopback);
01f2e4ea
SF		 655
656 if (!eop)
1825aca6 657 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 658}
659
660static inline void enic_queue_wq_skb_tso(struct enic *enic,
661 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 662 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 663{
ea0d7d91
SF		 664 unsigned int frag_len_left = skb_headlen(skb);
665 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 666 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
667 int eop = (len_left == 0);
ea0d7d91
SF		 668 unsigned int len;
669 dma_addr_t dma_addr;
670 unsigned int offset = 0;
671 skb_frag_t *frag;
01f2e4ea
SF		 672
673 /* Preload TCP csum field with IP pseudo hdr calculated
674 * with IP length set to zero. HW will later add in length
675 * to each TCP segment resulting from the TSO.
676 */
677
09640e63 678 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 679 ip_hdr(skb)->check = 0;
680 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
681 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 682 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 683 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
684 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
685 }
686
ea0d7d91
SF		 687 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
688 * for the main skb fragment
689 */
690 while (frag_len_left) {
691 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
692 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
693 len, PCI_DMA_TODEVICE);
694 enic_queue_wq_desc_tso(wq, skb,
695 dma_addr,
696 len,
697 mss, hdr_len,
698 vlan_tag_insert, vlan_tag,
1825aca6 699 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 700 frag_len_left -= len;
701 offset += len;
702 }
01f2e4ea 703
ea0d7d91
SF		 704 if (eop)
705 return;
706
707 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
708 * for additional data fragments
709 */
710 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
711 len_left -= frag->size;
712 frag_len_left = frag->size;
4bf5adbf 713 offset = 0;
ea0d7d91
SF		 714
715 while (frag_len_left) {
716 len = min(frag_len_left,
717 (unsigned int)WQ_ENET_MAX_DESC_LEN);
4bf5adbf
IC		 718 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
719 offset, len,
720 PCI_DMA_TODEVICE);
ea0d7d91
SF		 721 enic_queue_wq_desc_cont(wq, skb,
722 dma_addr,
723 len,
724 (len_left == 0) &&
1825aca6
VK		 725 (len == frag_len_left), /* EOP? */
726 loopback);
ea0d7d91
SF		 727 frag_len_left -= len;
728 offset += len;
729 }
730 }
01f2e4ea
SF		 731}
732
733static inline void enic_queue_wq_skb(struct enic *enic,
734 struct vnic_wq *wq, struct sk_buff *skb)
735{
736 unsigned int mss = skb_shinfo(skb)->gso_size;
737 unsigned int vlan_tag = 0;
738 int vlan_tag_insert = 0;
1825aca6 739 int loopback = 0;
01f2e4ea 740
eab6d18d 741 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 742 /* VLAN tag from trunking driver */
743 vlan_tag_insert = 1;
744 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 745 } else if (enic->loop_enable) {
746 vlan_tag = enic->loop_tag;
747 loopback = 1;
01f2e4ea
SF		 748 }
749
750 if (mss)
751 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 752 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 753 else if (skb->ip_summed == CHECKSUM_PARTIAL)
754 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 755 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 756 else
757 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 758 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 759}
760
ed8af6b2 761/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 762static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 763 struct net_device *netdev)
01f2e4ea
SF		 764{
765 struct enic *enic = netdev_priv(netdev);
766 struct vnic_wq *wq = &enic->wq[0];
767 unsigned long flags;
768
769 if (skb->len <= 0) {
770 dev_kfree_skb(skb);
771 return NETDEV_TX_OK;
772 }
773
774 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
775 * which is very likely. In the off chance it's going to take
776 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
777 */
778
779 if (skb_shinfo(skb)->gso_size == 0 &&
780 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
781 skb_linearize(skb)) {
782 dev_kfree_skb(skb);
783 return NETDEV_TX_OK;
784 }
785
786 spin_lock_irqsave(&enic->wq_lock[0], flags);
787
ea0d7d91
SF		 788 if (vnic_wq_desc_avail(wq) <
789 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 790 netif_stop_queue(netdev);
791 /* This is a hard error, log it */
a7a79deb 792 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 793 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
794 return NETDEV_TX_BUSY;
795 }
796
797 enic_queue_wq_skb(enic, wq, skb);
798
ea0d7d91 799 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 800 netif_stop_queue(netdev);
801
01f2e4ea
SF		 802 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
803
804 return NETDEV_TX_OK;
805}
806
807/* dev_base_lock rwlock held, nominally process context */
f20530bc 808static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
809 struct rtnl_link_stats64 *net_stats)
01f2e4ea
SF		 810{
811 struct enic *enic = netdev_priv(netdev);
812 struct vnic_stats *stats;
813
383ab92f 814 enic_dev_stats_dump(enic, &stats);
01f2e4ea 815
25f0a061
SF		 816 net_stats->tx_packets = stats->tx.tx_frames_ok;
817 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
818 net_stats->tx_errors = stats->tx.tx_errors;
819 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 820
25f0a061
SF		 821 net_stats->rx_packets = stats->rx.rx_frames_ok;
822 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
823 net_stats->rx_errors = stats->rx.rx_errors;
824 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 825 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 826 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 827 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 828
25f0a061 829 return net_stats;
01f2e4ea
SF		 830}
831
b3abfbd2 832void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 833{
834 enic->mc_count = 0;
e0afe53f 835 enic->uc_count = 0;
99ef5639 836 enic->flags = 0;
01f2e4ea
SF		 837}
838
839static int enic_set_mac_addr(struct net_device *netdev, char *addr)
840{
f8bd9091
SF		 841 struct enic *enic = netdev_priv(netdev);
842
843 if (enic_is_dynamic(enic)) {
844 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
845 return -EADDRNOTAVAIL;
846 } else {
847 if (!is_valid_ether_addr(addr))
848 return -EADDRNOTAVAIL;
849 }
01f2e4ea
SF		 850
851 memcpy(netdev->dev_addr, addr, netdev->addr_len);
852
853 return 0;
854}
855
f8bd9091
SF		 856static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
857{
858 struct enic *enic = netdev_priv(netdev);
859 struct sockaddr *saddr = p;
860 char *addr = saddr->sa_data;
861 int err;
862
863 if (netif_running(enic->netdev)) {
864 err = enic_dev_del_station_addr(enic);
865 if (err)
866 return err;
867 }
868
869 err = enic_set_mac_addr(netdev, addr);
870 if (err)
871 return err;
872
873 if (netif_running(enic->netdev)) {
874 err = enic_dev_add_station_addr(enic);
875 if (err)
876 return err;
877 }
878
879 return err;
880}
881
882static int enic_set_mac_address(struct net_device *netdev, void *p)
883{
294dab25 884 struct sockaddr *saddr = p;
c76fd32d
VK		 885 char *addr = saddr->sa_data;
886 struct enic *enic = netdev_priv(netdev);
887 int err;
888
889 err = enic_dev_del_station_addr(enic);
890 if (err)
891 return err;
892
893 err = enic_set_mac_addr(netdev, addr);
894 if (err)
895 return err;
294dab25 896
c76fd32d 897 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 898}
899
e0afe53f 900static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 901{
319d7e84 902 struct net_device *netdev = enic->netdev;
22bedad3 903 struct netdev_hw_addr *ha;
4cd24eaf 904 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 905 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 906 unsigned int i, j;
907
319d7e84
RP		 908 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
909 netdev_warn(netdev, "Registering only %d out of %d "
910 "multicast addresses\n",
911 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 912 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 913 }
01f2e4ea
SF		 914
915 /* Is there an easier way? Trying to minimize to
916 * calls to add/del multicast addrs. We keep the
917 * addrs from the last call in enic->mc_addr and
918 * look for changes to add/del.
919 */
920
48e2f183 921 i = 0;
22bedad3 922 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 923 if (i == mc_count)
924 break;
22bedad3 925 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 926 }
927
928 for (i = 0; i < enic->mc_count; i++) {
929 for (j = 0; j < mc_count; j++)
930 if (compare_ether_addr(enic->mc_addr[i],
931 mc_addr[j]) == 0)
932 break;
933 if (j == mc_count)
319d7e84 934 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 935 }
936
937 for (i = 0; i < mc_count; i++) {
938 for (j = 0; j < enic->mc_count; j++)
939 if (compare_ether_addr(mc_addr[i],
940 enic->mc_addr[j]) == 0)
941 break;
942 if (j == enic->mc_count)
319d7e84 943 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 944 }
945
946 /* Save the list to compare against next time
947 */
948
949 for (i = 0; i < mc_count; i++)
950 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
951
952 enic->mc_count = mc_count;
01f2e4ea
SF		 953}
954
e0afe53f 955static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 956{
957 struct net_device *netdev = enic->netdev;
958 struct netdev_hw_addr *ha;
959 unsigned int uc_count = netdev_uc_count(netdev);
960 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
961 unsigned int i, j;
962
963 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
964 netdev_warn(netdev, "Registering only %d out of %d "
965 "unicast addresses\n",
966 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
967 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
968 }
969
970 /* Is there an easier way? Trying to minimize to
971 * calls to add/del unicast addrs. We keep the
972 * addrs from the last call in enic->uc_addr and
973 * look for changes to add/del.
974 */
975
976 i = 0;
977 netdev_for_each_uc_addr(ha, netdev) {
978 if (i == uc_count)
979 break;
980 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
981 }
982
983 for (i = 0; i < enic->uc_count; i++) {
984 for (j = 0; j < uc_count; j++)
985 if (compare_ether_addr(enic->uc_addr[i],
986 uc_addr[j]) == 0)
987 break;
988 if (j == uc_count)
989 enic_dev_del_addr(enic, enic->uc_addr[i]);
990 }
991
992 for (i = 0; i < uc_count; i++) {
993 for (j = 0; j < enic->uc_count; j++)
994 if (compare_ether_addr(uc_addr[i],
995 enic->uc_addr[j]) == 0)
996 break;
997 if (j == enic->uc_count)
998 enic_dev_add_addr(enic, uc_addr[i]);
999 }
1000
1001 /* Save the list to compare against next time
1002 */
1003
1004 for (i = 0; i < uc_count; i++)
1005 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1006
1007 enic->uc_count = uc_count;
1008}
1009
1010/* netif_tx_lock held, BHs disabled */
1011static void enic_set_rx_mode(struct net_device *netdev)
1012{
1013 struct enic *enic = netdev_priv(netdev);
1014 int directed = 1;
1015 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1016 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1017 int promisc = (netdev->flags & IFF_PROMISC) ||
1018 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1019 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1020 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1021 unsigned int flags = netdev->flags |
1022 (allmulti ? IFF_ALLMULTI : 0) |
1023 (promisc ? IFF_PROMISC : 0);
1024
1025 if (enic->flags != flags) {
1026 enic->flags = flags;
1027 enic_dev_packet_filter(enic, directed,
1028 multicast, broadcast, promisc, allmulti);
1029 }
1030
1031 if (!promisc) {
e0afe53f 1032 enic_update_unicast_addr_list(enic);
319d7e84 1033 if (!allmulti)
e0afe53f 1034 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1035 }
1036}
1037
01f2e4ea
SF		 1038/* netif_tx_lock held, BHs disabled */
1039static void enic_tx_timeout(struct net_device *netdev)
1040{
1041 struct enic *enic = netdev_priv(netdev);
1042 schedule_work(&enic->reset);
1043}
1044
0b1c00fc
RP		 1045static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1046{
1047 struct enic *enic = netdev_priv(netdev);
1048
1049 if (vf != PORT_SELF_VF)
1050 return -EOPNOTSUPP;
1051
1052 /* Ignore the vf argument for now. We can assume the request
1053 * is coming on a vf.
1054 */
1055 if (is_valid_ether_addr(mac)) {
1056 memcpy(enic->pp.vf_mac, mac, ETH_ALEN);
1057 return 0;
1058 } else
1059 return -EINVAL;
1060}
1061
f8bd9091
SF		 1062static int enic_set_vf_port(struct net_device *netdev, int vf,
1063 struct nlattr *port[])
1064{
1065 struct enic *enic = netdev_priv(netdev);
b3abfbd2
RP		 1066 struct enic_port_profile prev_pp;
1067 int err = 0, restore_pp = 1;
08f382eb 1068
b3abfbd2
RP		 1069 /* don't support VFs, yet */
1070 if (vf != PORT_SELF_VF)
1071 return -EOPNOTSUPP;
08f382eb 1072
b3abfbd2
RP		 1073 if (!port[IFLA_PORT_REQUEST])
1074 return -EOPNOTSUPP;
1075
1076 memcpy(&prev_pp, &enic->pp, sizeof(enic->pp));
1077 memset(&enic->pp, 0, sizeof(enic->pp));
1078
1079 enic->pp.set |= ENIC_SET_REQUEST;
1080 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1081
1082 if (port[IFLA_PORT_PROFILE]) {
b3abfbd2
RP		 1083 enic->pp.set |= ENIC_SET_NAME;
1084 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1085 PORT_PROFILE_MAX);
1086 }
1087
1088 if (port[IFLA_PORT_INSTANCE_UUID]) {
b3abfbd2
RP		 1089 enic->pp.set |= ENIC_SET_INSTANCE;
1090 memcpy(enic->pp.instance_uuid,
08f382eb
SF		 1091 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1092 }
1093
1094 if (port[IFLA_PORT_HOST_UUID]) {
b3abfbd2
RP		 1095 enic->pp.set |= ENIC_SET_HOST;
1096 memcpy(enic->pp.host_uuid,
08f382eb
SF		 1097 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1098 }
f8bd9091 1099
b3abfbd2
RP		 1100 /* Special case handling: mac came from IFLA_VF_MAC */
1101 if (!is_zero_ether_addr(prev_pp.vf_mac))
1102 memcpy(enic->pp.mac_addr, prev_pp.vf_mac, ETH_ALEN);
418c437d
SF		 1103
1104 if (is_zero_ether_addr(netdev->dev_addr))
1105 random_ether_addr(netdev->dev_addr);
f8bd9091 1106
b3abfbd2
RP		 1107 err = enic_process_set_pp_request(enic, &prev_pp, &restore_pp);
1108 if (err) {
1109 if (restore_pp) {
1110 /* Things are still the way they were: Implicit
1111 * DISASSOCIATE failed
1112 */
1113 memcpy(&enic->pp, &prev_pp, sizeof(enic->pp));
1114 } else {
1115 memset(&enic->pp, 0, sizeof(enic->pp));
1116 memset(netdev->dev_addr, 0, ETH_ALEN);
1117 }
1118 } else {
1119 /* Set flag to indicate that the port assoc/disassoc
1120 * request has been sent out to fw
1121 */
1122 enic->pp.set |= ENIC_PORT_REQUEST_APPLIED;
1123
1124 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
1125 if (enic->pp.request == PORT_REQUEST_DISASSOCIATE) {
1126 memset(enic->pp.mac_addr, 0, ETH_ALEN);
1127 memset(netdev->dev_addr, 0, ETH_ALEN);
1128 }
1129 }
29639059 1130
29639059
RP		 1131 memset(enic->pp.vf_mac, 0, ETH_ALEN);
1132
29639059 1133 return err;
f8bd9091
SF		 1134}
1135
1136static int enic_get_vf_port(struct net_device *netdev, int vf,
1137 struct sk_buff *skb)
1138{
1139 struct enic *enic = netdev_priv(netdev);
f8bd9091 1140 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
b3abfbd2 1141 int err;
f8bd9091 1142
4dce2396 1143 if (!(enic->pp.set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1144 return -ENODATA;
f8bd9091 1145
b3abfbd2 1146 err = enic_process_get_pp_request(enic, enic->pp.request, &response);
f8bd9091 1147 if (err)
b3abfbd2 1148 return err;
f8bd9091
SF		 1149
1150 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1151 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF		 1152 if (enic->pp.set & ENIC_SET_NAME)
1153 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1154 enic->pp.name);
1155 if (enic->pp.set & ENIC_SET_INSTANCE)
1156 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1157 enic->pp.instance_uuid);
1158 if (enic->pp.set & ENIC_SET_HOST)
1159 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1160 enic->pp.host_uuid);
f8bd9091
SF		 1161
1162 return 0;
1163
1164nla_put_failure:
1165 return -EMSGSIZE;
1166}
1167
01f2e4ea
SF		 1168static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1169{
1170 struct enic *enic = vnic_dev_priv(rq->vdev);
1171
1172 if (!buf->os_buf)
1173 return;
1174
1175 pci_unmap_single(enic->pdev, buf->dma_addr,
1176 buf->len, PCI_DMA_FROMDEVICE);
1177 dev_kfree_skb_any(buf->os_buf);
1178}
1179
01f2e4ea
SF		 1180static int enic_rq_alloc_buf(struct vnic_rq *rq)
1181{
1182 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1183 struct net_device *netdev = enic->netdev;
01f2e4ea 1184 struct sk_buff *skb;
1825aca6 1185 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1186 unsigned int os_buf_index = 0;
1187 dma_addr_t dma_addr;
1188
89d71a66 1189 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1190 if (!skb)
1191 return -ENOMEM;
1192
1193 dma_addr = pci_map_single(enic->pdev, skb->data,
1194 len, PCI_DMA_FROMDEVICE);
1195
1196 enic_queue_rq_desc(rq, skb, os_buf_index,
1197 dma_addr, len);
1198
1199 return 0;
1200}
1201
01f2e4ea
SF		 1202static void enic_rq_indicate_buf(struct vnic_rq *rq,
1203 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1204 int skipped, void *opaque)
1205{
1206 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1207 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1208 struct sk_buff *skb;
1209
1210 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1211 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1212 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1213 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1214 u8 packet_error;
f8cac14a 1215 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1216 u32 rss_hash;
1217
1218 if (skipped)
1219 return;
1220
1221 skb = buf->os_buf;
1222 prefetch(skb->data - NET_IP_ALIGN);
1223 pci_unmap_single(enic->pdev, buf->dma_addr,
1224 buf->len, PCI_DMA_FROMDEVICE);
1225
1226 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1227 &type, &color, &q_number, &completed_index,
1228 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1229 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1230 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1231 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1232 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1233 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1234 &fcs_ok);
1235
1236 if (packet_error) {
1237
350991e1
SF		 1238 if (!fcs_ok) {
1239 if (bytes_written > 0)
1240 enic->rq_bad_fcs++;
1241 else if (bytes_written == 0)
1242 enic->rq_truncated_pkts++;
1243 }
01f2e4ea
SF		 1244
1245 dev_kfree_skb_any(skb);
1246
1247 return;
1248 }
1249
1250 if (eop && bytes_written > 0) {
1251
1252 /* Good receive
1253 */
1254
1255 skb_put(skb, bytes_written);
86ca9db7 1256 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea 1257
5ec8f9b8 1258 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
01f2e4ea
SF		 1259 skb->csum = htons(checksum);
1260 skb->ip_summed = CHECKSUM_COMPLETE;
1261 }
1262
86ca9db7 1263 skb->dev = netdev;
01f2e4ea 1264
6ede746b
JP		 1265 if (vlan_stripped)
1266 __vlan_hwaccel_put_tag(skb, vlan_tci);
01f2e4ea 1267
6ede746b
JP		 1268 if (netdev->features & NETIF_F_GRO)
1269 napi_gro_receive(&enic->napi[q_number], skb);
1270 else
1271 netif_receive_skb(skb);
01f2e4ea
SF		 1272 } else {
1273
1274 /* Buffer overflow
1275 */
1276
1277 dev_kfree_skb_any(skb);
1278 }
1279}
1280
1281static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1282 u8 type, u16 q_number, u16 completed_index, void *opaque)
1283{
1284 struct enic *enic = vnic_dev_priv(vdev);
1285
1286 vnic_rq_service(&enic->rq[q_number], cq_desc,
1287 completed_index, VNIC_RQ_RETURN_DESC,
1288 enic_rq_indicate_buf, opaque);
1289
1290 return 0;
1291}
1292
01f2e4ea
SF		 1293static int enic_poll(struct napi_struct *napi, int budget)
1294{
717258ba
VK		 1295 struct net_device *netdev = napi->dev;
1296 struct enic *enic = netdev_priv(netdev);
1297 unsigned int cq_rq = enic_cq_rq(enic, 0);
1298 unsigned int cq_wq = enic_cq_wq(enic, 0);
1299 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1300 unsigned int rq_work_to_do = budget;
1301 unsigned int wq_work_to_do = -1; /* no limit */
1302 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1303 int err;
01f2e4ea
SF		 1304
1305 /* Service RQ (first) and WQ
1306 */
1307
717258ba 1308 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1309 rq_work_to_do, enic_rq_service, NULL);
1310
717258ba 1311 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1312 wq_work_to_do, enic_wq_service, NULL);
1313
1314 /* Accumulate intr event credits for this polling
1315 * cycle. An intr event is the completion of a
1316 * a WQ or RQ packet.
1317 */
1318
1319 work_done = rq_work_done + wq_work_done;
1320
1321 if (work_done > 0)
717258ba 1322 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1323 work_done,
1324 0 /* don't unmask intr */,
1325 0 /* don't reset intr timer */);
1326
0eb26022 1327 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1328
2d6ddced
SF		 1329 /* Buffer allocation failed. Stay in polling
1330 * mode so we can try to fill the ring again.
1331 */
01f2e4ea 1332
2d6ddced
SF		 1333 if (err)
1334 rq_work_done = rq_work_to_do;
01f2e4ea 1335
2d6ddced 1336 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1337
2d6ddced 1338 /* Some work done, but not enough to stay in polling,
88132f55 1339 * exit polling
01f2e4ea
SF		 1340 */
1341
288379f0 1342 napi_complete(napi);
717258ba 1343 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1344 }
1345
1346 return rq_work_done;
1347}
1348
1349static int enic_poll_msix(struct napi_struct *napi, int budget)
1350{
717258ba
VK		 1351 struct net_device *netdev = napi->dev;
1352 struct enic *enic = netdev_priv(netdev);
1353 unsigned int rq = (napi - &enic->napi[0]);
1354 unsigned int cq = enic_cq_rq(enic, rq);
1355 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1356 unsigned int work_to_do = budget;
1357 unsigned int work_done;
2d6ddced 1358 int err;
01f2e4ea
SF		 1359
1360 /* Service RQ
1361 */
1362
717258ba 1363 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1364 work_to_do, enic_rq_service, NULL);
1365
2d6ddced
SF		 1366 /* Return intr event credits for this polling
1367 * cycle. An intr event is the completion of a
1368 * RQ packet.
1369 */
01f2e4ea 1370
2d6ddced 1371 if (work_done > 0)
717258ba 1372 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1373 work_done,
1374 0 /* don't unmask intr */,
1375 0 /* don't reset intr timer */);
01f2e4ea 1376
0eb26022 1377 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1378
1379 /* Buffer allocation failed. Stay in polling mode
1380 * so we can try to fill the ring again.
1381 */
1382
1383 if (err)
1384 work_done = work_to_do;
1385
1386 if (work_done < work_to_do) {
1387
1388 /* Some work done, but not enough to stay in polling,
88132f55 1389 * exit polling
01f2e4ea
SF		 1390 */
1391
288379f0 1392 napi_complete(napi);
717258ba 1393 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1394 }
1395
1396 return work_done;
1397}
1398
1399static void enic_notify_timer(unsigned long data)
1400{
1401 struct enic *enic = (struct enic *)data;
1402
1403 enic_notify_check(enic);
1404
25f0a061
SF		 1405 mod_timer(&enic->notify_timer,
1406 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1407}
1408
1409static void enic_free_intr(struct enic *enic)
1410{
1411 struct net_device *netdev = enic->netdev;
1412 unsigned int i;
1413
1414 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1415 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1416 free_irq(enic->pdev->irq, netdev);
1417 break;
8f4d248c
SF		 1418 case VNIC_DEV_INTR_MODE_MSI:
1419 free_irq(enic->pdev->irq, enic);
1420 break;
01f2e4ea
SF		 1421 case VNIC_DEV_INTR_MODE_MSIX:
1422 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1423 if (enic->msix[i].requested)
1424 free_irq(enic->msix_entry[i].vector,
1425 enic->msix[i].devid);
1426 break;
1427 default:
1428 break;
1429 }
1430}
1431
1432static int enic_request_intr(struct enic *enic)
1433{
1434 struct net_device *netdev = enic->netdev;
717258ba 1435 unsigned int i, intr;
01f2e4ea
SF		 1436 int err = 0;
1437
1438 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1439
1440 case VNIC_DEV_INTR_MODE_INTX:
1441
1442 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1443 IRQF_SHARED, netdev->name, netdev);
1444 break;
1445
1446 case VNIC_DEV_INTR_MODE_MSI:
1447
1448 err = request_irq(enic->pdev->irq, enic_isr_msi,
1449 0, netdev->name, enic);
1450 break;
1451
1452 case VNIC_DEV_INTR_MODE_MSIX:
1453
717258ba
VK		 1454 for (i = 0; i < enic->rq_count; i++) {
1455 intr = enic_msix_rq_intr(enic, i);
1456 sprintf(enic->msix[intr].devname,
1457 "%.11s-rx-%d", netdev->name, i);
1458 enic->msix[intr].isr = enic_isr_msix_rq;
1459 enic->msix[intr].devid = &enic->napi[i];
1460 }
01f2e4ea 1461
717258ba
VK		 1462 for (i = 0; i < enic->wq_count; i++) {
1463 intr = enic_msix_wq_intr(enic, i);
1464 sprintf(enic->msix[intr].devname,
1465 "%.11s-tx-%d", netdev->name, i);
1466 enic->msix[intr].isr = enic_isr_msix_wq;
1467 enic->msix[intr].devid = enic;
1468 }
01f2e4ea 1469
717258ba
VK		 1470 intr = enic_msix_err_intr(enic);
1471 sprintf(enic->msix[intr].devname,
01f2e4ea 1472 "%.11s-err", netdev->name);
717258ba
VK		 1473 enic->msix[intr].isr = enic_isr_msix_err;
1474 enic->msix[intr].devid = enic;
01f2e4ea 1475
717258ba
VK		 1476 intr = enic_msix_notify_intr(enic);
1477 sprintf(enic->msix[intr].devname,
01f2e4ea 1478 "%.11s-notify", netdev->name);
717258ba
VK		 1479 enic->msix[intr].isr = enic_isr_msix_notify;
1480 enic->msix[intr].devid = enic;
1481
1482 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1483 enic->msix[i].requested = 0;
01f2e4ea 1484
717258ba 1485 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1486 err = request_irq(enic->msix_entry[i].vector,
1487 enic->msix[i].isr, 0,
1488 enic->msix[i].devname,
1489 enic->msix[i].devid);
1490 if (err) {
1491 enic_free_intr(enic);
1492 break;
1493 }
1494 enic->msix[i].requested = 1;
1495 }
1496
1497 break;
1498
1499 default:
1500 break;
1501 }
1502
1503 return err;
1504}
1505
b3d18d19
SF		 1506static void enic_synchronize_irqs(struct enic *enic)
1507{
1508 unsigned int i;
1509
1510 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1511 case VNIC_DEV_INTR_MODE_INTX:
1512 case VNIC_DEV_INTR_MODE_MSI:
1513 synchronize_irq(enic->pdev->irq);
1514 break;
1515 case VNIC_DEV_INTR_MODE_MSIX:
1516 for (i = 0; i < enic->intr_count; i++)
1517 synchronize_irq(enic->msix_entry[i].vector);
1518 break;
1519 default:
1520 break;
1521 }
1522}
1523
383ab92f 1524static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1525{
1526 int err;
1527
56ac88b3 1528 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1529 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1530 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1531 err = vnic_dev_notify_set(enic->vdev,
1532 enic_legacy_notify_intr());
01f2e4ea
SF		 1533 break;
1534 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1535 err = vnic_dev_notify_set(enic->vdev,
1536 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1537 break;
1538 default:
1539 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1540 break;
1541 }
56ac88b3 1542 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1543
1544 return err;
1545}
1546
1547static void enic_notify_timer_start(struct enic *enic)
1548{
1549 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1550 case VNIC_DEV_INTR_MODE_MSI:
1551 mod_timer(&enic->notify_timer, jiffies);
1552 break;
1553 default:
1554 /* Using intr for notification for INTx/MSI-X */
1555 break;
6403eab1 1556 }
01f2e4ea
SF		 1557}
1558
1559/* rtnl lock is held, process context */
1560static int enic_open(struct net_device *netdev)
1561{
1562 struct enic *enic = netdev_priv(netdev);
1563 unsigned int i;
1564 int err;
1565
4b75a442
SF		 1566 err = enic_request_intr(enic);
1567 if (err) {
a7a79deb 1568 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1569 return err;
1570 }
1571
383ab92f 1572 err = enic_dev_notify_set(enic);
4b75a442 1573 if (err) {
a7a79deb
VK		 1574 netdev_err(netdev,
1575 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1576 goto err_out_free_intr;
1577 }
1578
01f2e4ea 1579 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1580 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1581 /* Need at least one buffer on ring to get going */
1582 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1583 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1584 err = -ENOMEM;
4b75a442 1585 goto err_out_notify_unset;
01f2e4ea
SF		 1586 }
1587 }
1588
1589 for (i = 0; i < enic->wq_count; i++)
1590 vnic_wq_enable(&enic->wq[i]);
1591 for (i = 0; i < enic->rq_count; i++)
1592 vnic_rq_enable(&enic->rq[i]);
1593
29639059
RP		 1594 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1595 enic_dev_add_addr(enic, enic->pp.mac_addr);
1596 else
1597 enic_dev_add_station_addr(enic);
319d7e84 1598 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1599
1600 netif_wake_queue(netdev);
717258ba
VK		 1601
1602 for (i = 0; i < enic->rq_count; i++)
1603 napi_enable(&enic->napi[i]);
1604
383ab92f 1605 enic_dev_enable(enic);
01f2e4ea
SF		 1606
1607 for (i = 0; i < enic->intr_count; i++)
1608 vnic_intr_unmask(&enic->intr[i]);
1609
1610 enic_notify_timer_start(enic);
1611
1612 return 0;
4b75a442
SF		 1613
1614err_out_notify_unset:
383ab92f 1615 enic_dev_notify_unset(enic);
4b75a442
SF		 1616err_out_free_intr:
1617 enic_free_intr(enic);
1618
1619 return err;
01f2e4ea
SF		 1620}
1621
1622/* rtnl lock is held, process context */
1623static int enic_stop(struct net_device *netdev)
1624{
1625 struct enic *enic = netdev_priv(netdev);
1626 unsigned int i;
1627 int err;
1628
29046f9b 1629 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1630 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1631 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1632 }
b3d18d19
SF		 1633
1634 enic_synchronize_irqs(enic);
1635
01f2e4ea
SF		 1636 del_timer_sync(&enic->notify_timer);
1637
383ab92f 1638 enic_dev_disable(enic);
717258ba
VK		 1639
1640 for (i = 0; i < enic->rq_count; i++)
1641 napi_disable(&enic->napi[i]);
1642
b3d18d19
SF		 1643 netif_carrier_off(netdev);
1644 netif_tx_disable(netdev);
29639059
RP		 1645 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1646 enic_dev_del_addr(enic, enic->pp.mac_addr);
1647 else
1648 enic_dev_del_station_addr(enic);
f8bd9091 1649
01f2e4ea
SF		 1650 for (i = 0; i < enic->wq_count; i++) {
1651 err = vnic_wq_disable(&enic->wq[i]);
1652 if (err)
1653 return err;
1654 }
1655 for (i = 0; i < enic->rq_count; i++) {
1656 err = vnic_rq_disable(&enic->rq[i]);
1657 if (err)
1658 return err;
1659 }
1660
383ab92f 1661 enic_dev_notify_unset(enic);
4b75a442
SF		 1662 enic_free_intr(enic);
1663
01f2e4ea
SF		 1664 for (i = 0; i < enic->wq_count; i++)
1665 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1666 for (i = 0; i < enic->rq_count; i++)
1667 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1668 for (i = 0; i < enic->cq_count; i++)
1669 vnic_cq_clean(&enic->cq[i]);
1670 for (i = 0; i < enic->intr_count; i++)
1671 vnic_intr_clean(&enic->intr[i]);
1672
1673 return 0;
1674}
1675
1676static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1677{
1678 struct enic *enic = netdev_priv(netdev);
1679 int running = netif_running(netdev);
1680
25f0a061
SF		 1681 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1682 return -EINVAL;
1683
c97c894d
RP		 1684 if (enic_is_dynamic(enic))
1685 return -EOPNOTSUPP;
1686
01f2e4ea
SF		 1687 if (running)
1688 enic_stop(netdev);
1689
01f2e4ea
SF		 1690 netdev->mtu = new_mtu;
1691
1692 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1693 netdev_warn(netdev,
1694 "interface MTU (%d) set higher than port MTU (%d)\n",
1695 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1696
1697 if (running)
1698 enic_open(netdev);
1699
1700 return 0;
1701}
1702
c97c894d
RP		 1703static void enic_change_mtu_work(struct work_struct *work)
1704{
1705 struct enic *enic = container_of(work, struct enic, change_mtu_work);
1706 struct net_device *netdev = enic->netdev;
1707 int new_mtu = vnic_dev_mtu(enic->vdev);
1708 int err;
1709 unsigned int i;
1710
1711 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
1712
1713 rtnl_lock();
1714
1715 /* Stop RQ */
1716 del_timer_sync(&enic->notify_timer);
1717
1718 for (i = 0; i < enic->rq_count; i++)
1719 napi_disable(&enic->napi[i]);
1720
1721 vnic_intr_mask(&enic->intr[0]);
1722 enic_synchronize_irqs(enic);
1723 err = vnic_rq_disable(&enic->rq[0]);
1724 if (err) {
1725 netdev_err(netdev, "Unable to disable RQ.\n");
1726 return;
1727 }
1728 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
1729 vnic_cq_clean(&enic->cq[0]);
1730 vnic_intr_clean(&enic->intr[0]);
1731
1732 /* Fill RQ with new_mtu-sized buffers */
1733 netdev->mtu = new_mtu;
1734 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1735 /* Need at least one buffer on ring to get going */
1736 if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
1737 netdev_err(netdev, "Unable to alloc receive buffers.\n");
1738 return;
1739 }
1740
1741 /* Start RQ */
1742 vnic_rq_enable(&enic->rq[0]);
1743 napi_enable(&enic->napi[0]);
1744 vnic_intr_unmask(&enic->intr[0]);
1745 enic_notify_timer_start(enic);
1746
1747 rtnl_unlock();
1748
1749 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
1750}
1751
01f2e4ea
SF		 1752#ifdef CONFIG_NET_POLL_CONTROLLER
1753static void enic_poll_controller(struct net_device *netdev)
1754{
1755 struct enic *enic = netdev_priv(netdev);
1756 struct vnic_dev *vdev = enic->vdev;
717258ba 1757 unsigned int i, intr;
01f2e4ea
SF		 1758
1759 switch (vnic_dev_get_intr_mode(vdev)) {
1760 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1761 for (i = 0; i < enic->rq_count; i++) {
1762 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1763 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1764 &enic->napi[i]);
717258ba 1765 }
b880a954
VK		 1766
1767 for (i = 0; i < enic->wq_count; i++) {
1768 intr = enic_msix_wq_intr(enic, i);
1769 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
1770 }
1771
01f2e4ea
SF		 1772 break;
1773 case VNIC_DEV_INTR_MODE_MSI:
1774 enic_isr_msi(enic->pdev->irq, enic);
1775 break;
1776 case VNIC_DEV_INTR_MODE_INTX:
1777 enic_isr_legacy(enic->pdev->irq, netdev);
1778 break;
1779 default:
1780 break;
1781 }
1782}
1783#endif
1784
1785static int enic_dev_wait(struct vnic_dev *vdev,
1786 int (*start)(struct vnic_dev *, int),
1787 int (*finished)(struct vnic_dev *, int *),
1788 int arg)
1789{
1790 unsigned long time;
1791 int done;
1792 int err;
1793
1794 BUG_ON(in_interrupt());
1795
1796 err = start(vdev, arg);
1797 if (err)
1798 return err;
1799
1800 /* Wait for func to complete...2 seconds max
1801 */
1802
1803 time = jiffies + (HZ * 2);
1804 do {
1805
1806 err = finished(vdev, &done);
1807 if (err)
1808 return err;
1809
1810 if (done)
1811 return 0;
1812
1813 schedule_timeout_uninterruptible(HZ / 10);
1814
1815 } while (time_after(time, jiffies));
1816
1817 return -ETIMEDOUT;
1818}
1819
1820static int enic_dev_open(struct enic *enic)
1821{
1822 int err;
1823
1824 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1825 vnic_dev_open_done, 0);
1826 if (err)
a7a79deb
VK		 1827 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1828 err);
01f2e4ea
SF		 1829
1830 return err;
1831}
1832
99ef5639 1833static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1834{
1835 int err;
1836
99ef5639
VK		 1837 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1838 vnic_dev_hang_reset_done, 0);
01f2e4ea 1839 if (err)
a7a79deb
VK		 1840 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1841 err);
01f2e4ea
SF		 1842
1843 return err;
1844}
1845
717258ba
VK		 1846static int enic_set_rsskey(struct enic *enic)
1847{
1f4f067f 1848 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1849 union vnic_rss_key *rss_key_buf_va = NULL;
1850 union vnic_rss_key rss_key = {
1851 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1852 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1853 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1854 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1855 };
1856 int err;
1857
1858 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1859 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1860 if (!rss_key_buf_va)
1861 return -ENOMEM;
1862
1863 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1864
1865 spin_lock(&enic->devcmd_lock);
1866 err = enic_set_rss_key(enic,
1867 rss_key_buf_pa,
1868 sizeof(union vnic_rss_key));
1869 spin_unlock(&enic->devcmd_lock);
1870
1871 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1872 rss_key_buf_va, rss_key_buf_pa);
1873
1874 return err;
1875}
1876
1877static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1878{
1f4f067f 1879 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1880 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1881 unsigned int i;
1882 int err;
1883
1884 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1885 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1886 if (!rss_cpu_buf_va)
1887 return -ENOMEM;
1888
1889 for (i = 0; i < (1 << rss_hash_bits); i++)
1890 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1891
1892 spin_lock(&enic->devcmd_lock);
1893 err = enic_set_rss_cpu(enic,
1894 rss_cpu_buf_pa,
1895 sizeof(union vnic_rss_cpu));
1896 spin_unlock(&enic->devcmd_lock);
1897
1898 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1899 rss_cpu_buf_va, rss_cpu_buf_pa);
1900
1901 return err;
1902}
1903
1904static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1905 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 1906{
68f71708
SF		 1907 const u8 tso_ipid_split_en = 0;
1908 const u8 ig_vlan_strip_en = 1;
383ab92f 1909 int err;
68f71708 1910
717258ba
VK		 1911 /* Enable VLAN tag stripping.
1912 */
68f71708 1913
383ab92f
VK		 1914 spin_lock(&enic->devcmd_lock);
1915 err = enic_set_nic_cfg(enic,
68f71708
SF		 1916 rss_default_cpu, rss_hash_type,
1917 rss_hash_bits, rss_base_cpu,
1918 rss_enable, tso_ipid_split_en,
1919 ig_vlan_strip_en);
383ab92f
VK		 1920 spin_unlock(&enic->devcmd_lock);
1921
1922 return err;
1923}
1924
717258ba
VK		 1925static int enic_set_rss_nic_cfg(struct enic *enic)
1926{
1927 struct device *dev = enic_get_dev(enic);
1928 const u8 rss_default_cpu = 0;
1929 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1930 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1931 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1932 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1933 const u8 rss_hash_bits = 7;
1934 const u8 rss_base_cpu = 0;
1935 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1936
1937 if (rss_enable) {
1938 if (!enic_set_rsskey(enic)) {
1939 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1940 rss_enable = 0;
1941 dev_warn(dev, "RSS disabled, "
1942 "Failed to set RSS cpu indirection table.");
1943 }
1944 } else {
1945 rss_enable = 0;
1946 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1947 }
1948 }
1949
1950 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1951 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 1952}
1953
01f2e4ea
SF		 1954static void enic_reset(struct work_struct *work)
1955{
1956 struct enic *enic = container_of(work, struct enic, reset);
1957
1958 if (!netif_running(enic->netdev))
1959 return;
1960
1961 rtnl_lock();
1962
383ab92f 1963 enic_dev_hang_notify(enic);
01f2e4ea 1964 enic_stop(enic->netdev);
99ef5639 1965 enic_dev_hang_reset(enic);
e0afe53f 1966 enic_reset_addr_lists(enic);
01f2e4ea 1967 enic_init_vnic_resources(enic);
717258ba 1968 enic_set_rss_nic_cfg(enic);
f8cac14a 1969 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 1970 enic_open(enic->netdev);
1971
1972 rtnl_unlock();
1973}
1974
1975static int enic_set_intr_mode(struct enic *enic)
1976{
717258ba 1977 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 1978 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 1979 unsigned int i;
1980
1981 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 1982 * on system capabilities.
01f2e4ea
SF		 1983 *
1984 * Try MSI-X first
1985 *
1986 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
1987 * (the second to last INTR is used for WQ/RQ errors)
1988 * (the last INTR is used for notifications)
1989 */
1990
1991 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
1992 for (i = 0; i < n + m + 2; i++)
1993 enic->msix_entry[i].entry = i;
1994
717258ba
VK		 1995 /* Use multiple RQs if RSS is enabled
1996 */
1997
1998 if (ENIC_SETTING(enic, RSS) &&
1999 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 2000 enic->rq_count >= n &&
2001 enic->wq_count >= m &&
2002 enic->cq_count >= n + m &&
717258ba 2003 enic->intr_count >= n + m + 2) {
01f2e4ea 2004
717258ba 2005 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2006
717258ba
VK		 2007 enic->rq_count = n;
2008 enic->wq_count = m;
2009 enic->cq_count = n + m;
2010 enic->intr_count = n + m + 2;
01f2e4ea 2011
717258ba
VK		 2012 vnic_dev_set_intr_mode(enic->vdev,
2013 VNIC_DEV_INTR_MODE_MSIX);
2014
2015 return 0;
2016 }
2017 }
2018
2019 if (enic->config.intr_mode < 1 &&
2020 enic->rq_count >= 1 &&
2021 enic->wq_count >= m &&
2022 enic->cq_count >= 1 + m &&
2023 enic->intr_count >= 1 + m + 2) {
2024 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2025
2026 enic->rq_count = 1;
2027 enic->wq_count = m;
2028 enic->cq_count = 1 + m;
2029 enic->intr_count = 1 + m + 2;
2030
2031 vnic_dev_set_intr_mode(enic->vdev,
2032 VNIC_DEV_INTR_MODE_MSIX);
2033
2034 return 0;
2035 }
01f2e4ea
SF		 2036 }
2037
2038 /* Next try MSI
2039 *
2040 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2041 */
2042
2043 if (enic->config.intr_mode < 2 &&
2044 enic->rq_count >= 1 &&
2045 enic->wq_count >= 1 &&
2046 enic->cq_count >= 2 &&
2047 enic->intr_count >= 1 &&
2048 !pci_enable_msi(enic->pdev)) {
2049
2050 enic->rq_count = 1;
2051 enic->wq_count = 1;
2052 enic->cq_count = 2;
2053 enic->intr_count = 1;
2054
2055 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2056
2057 return 0;
2058 }
2059
2060 /* Next try INTx
2061 *
2062 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2063 * (the first INTR is used for WQ/RQ)
2064 * (the second INTR is used for WQ/RQ errors)
2065 * (the last INTR is used for notifications)
2066 */
2067
2068 if (enic->config.intr_mode < 3 &&
2069 enic->rq_count >= 1 &&
2070 enic->wq_count >= 1 &&
2071 enic->cq_count >= 2 &&
2072 enic->intr_count >= 3) {
2073
2074 enic->rq_count = 1;
2075 enic->wq_count = 1;
2076 enic->cq_count = 2;
2077 enic->intr_count = 3;
2078
2079 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2080
2081 return 0;
2082 }
2083
2084 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2085
2086 return -EINVAL;
2087}
2088
2089static void enic_clear_intr_mode(struct enic *enic)
2090{
2091 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2092 case VNIC_DEV_INTR_MODE_MSIX:
2093 pci_disable_msix(enic->pdev);
2094 break;
2095 case VNIC_DEV_INTR_MODE_MSI:
2096 pci_disable_msi(enic->pdev);
2097 break;
2098 default:
2099 break;
2100 }
2101
2102 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2103}
2104
f8bd9091
SF		 2105static const struct net_device_ops enic_netdev_dynamic_ops = {
2106 .ndo_open = enic_open,
2107 .ndo_stop = enic_stop,
2108 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2109 .ndo_get_stats64 = enic_get_stats,
f8bd9091 2110 .ndo_validate_addr = eth_validate_addr,
319d7e84 2111 .ndo_set_rx_mode = enic_set_rx_mode,
f8bd9091
SF		 2112 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2113 .ndo_change_mtu = enic_change_mtu,
f8bd9091
SF		 2114 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2115 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2116 .ndo_tx_timeout = enic_tx_timeout,
2117 .ndo_set_vf_port = enic_set_vf_port,
2118 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2119 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2120#ifdef CONFIG_NET_POLL_CONTROLLER
2121 .ndo_poll_controller = enic_poll_controller,
2122#endif
2123};
2124
afe29f7a
SH		 2125static const struct net_device_ops enic_netdev_ops = {
2126 .ndo_open = enic_open,
2127 .ndo_stop = enic_stop,
00829823 2128 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2129 .ndo_get_stats64 = enic_get_stats,
afe29f7a 2130 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2131 .ndo_set_mac_address = enic_set_mac_address,
319d7e84 2132 .ndo_set_rx_mode = enic_set_rx_mode,
afe29f7a 2133 .ndo_change_mtu = enic_change_mtu,
afe29f7a
SH		 2134 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2135 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2136 .ndo_tx_timeout = enic_tx_timeout,
2137#ifdef CONFIG_NET_POLL_CONTROLLER
2138 .ndo_poll_controller = enic_poll_controller,
2139#endif
2140};
2141
2fdba388 2142static void enic_dev_deinit(struct enic *enic)
6fdfa970 2143{
717258ba
VK		 2144 unsigned int i;
2145
2146 for (i = 0; i < enic->rq_count; i++)
2147 netif_napi_del(&enic->napi[i]);
2148
6fdfa970
SF		 2149 enic_free_vnic_resources(enic);
2150 enic_clear_intr_mode(enic);
2151}
2152
2fdba388 2153static int enic_dev_init(struct enic *enic)
6fdfa970 2154{
a7a79deb 2155 struct device *dev = enic_get_dev(enic);
6fdfa970 2156 struct net_device *netdev = enic->netdev;
717258ba 2157 unsigned int i;
6fdfa970
SF		 2158 int err;
2159
ea7ea65a
VK		 2160 /* Get interrupt coalesce timer info */
2161 err = enic_dev_intr_coal_timer_info(enic);
2162 if (err) {
2163 dev_warn(dev, "Using default conversion factor for "
2164 "interrupt coalesce timer\n");
2165 vnic_dev_intr_coal_timer_info_default(enic->vdev);
2166 }
2167
6fdfa970
SF		 2168 /* Get vNIC configuration
2169 */
2170
2171 err = enic_get_vnic_config(enic);
2172 if (err) {
a7a79deb 2173 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2174 return err;
2175 }
2176
2177 /* Get available resource counts
2178 */
2179
2180 enic_get_res_counts(enic);
2181
2182 /* Set interrupt mode based on resource counts and system
2183 * capabilities
2184 */
2185
2186 err = enic_set_intr_mode(enic);
2187 if (err) {
a7a79deb
VK		 2188 dev_err(dev, "Failed to set intr mode based on resource "
2189 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2190 return err;
2191 }
2192
2193 /* Allocate and configure vNIC resources
2194 */
2195
2196 err = enic_alloc_vnic_resources(enic);
2197 if (err) {
a7a79deb 2198 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2199 goto err_out_free_vnic_resources;
2200 }
2201
2202 enic_init_vnic_resources(enic);
2203
717258ba 2204 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2205 if (err) {
a7a79deb 2206 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2207 goto err_out_free_vnic_resources;
2208 }
2209
2210 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2211 default:
717258ba 2212 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2213 break;
2214 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2215 for (i = 0; i < enic->rq_count; i++)
2216 netif_napi_add(netdev, &enic->napi[i],
2217 enic_poll_msix, 64);
6fdfa970
SF		 2218 break;
2219 }
2220
2221 return 0;
2222
2223err_out_free_vnic_resources:
2224 enic_clear_intr_mode(enic);
2225 enic_free_vnic_resources(enic);
2226
2227 return err;
2228}
2229
27e6c7d3
SF		 2230static void enic_iounmap(struct enic *enic)
2231{
2232 unsigned int i;
2233
2234 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2235 if (enic->bar[i].vaddr)
2236 iounmap(enic->bar[i].vaddr);
2237}
2238
01f2e4ea
SF		 2239static int __devinit enic_probe(struct pci_dev *pdev,
2240 const struct pci_device_id *ent)
2241{
a7a79deb 2242 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2243 struct net_device *netdev;
2244 struct enic *enic;
2245 int using_dac = 0;
2246 unsigned int i;
2247 int err;
8749b427
RP		 2248#ifdef CONFIG_PCI_IOV
2249 int pos = 0;
2250#endif
01f2e4ea 2251
01f2e4ea
SF		 2252 /* Allocate net device structure and initialize. Private
2253 * instance data is initialized to zero.
2254 */
2255
2256 netdev = alloc_etherdev(sizeof(struct enic));
2257 if (!netdev) {
a7a79deb 2258 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF		 2259 return -ENOMEM;
2260 }
2261
01f2e4ea
SF		 2262 pci_set_drvdata(pdev, netdev);
2263
2264 SET_NETDEV_DEV(netdev, &pdev->dev);
2265
2266 enic = netdev_priv(netdev);
2267 enic->netdev = netdev;
2268 enic->pdev = pdev;
2269
2270 /* Setup PCI resources
2271 */
2272
29046f9b 2273 err = pci_enable_device_mem(pdev);
01f2e4ea 2274 if (err) {
a7a79deb 2275 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2276 goto err_out_free_netdev;
2277 }
2278
2279 err = pci_request_regions(pdev, DRV_NAME);
2280 if (err) {
a7a79deb 2281 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2282 goto err_out_disable_device;
2283 }
2284
2285 pci_set_master(pdev);
2286
2287 /* Query PCI controller on system for DMA addressing
2288 * limitation for the device. Try 40-bit first, and
2289 * fail to 32-bit.
2290 */
2291
50cf156a 2292 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2293 if (err) {
284901a9 2294 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2295 if (err) {
a7a79deb 2296 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2297 goto err_out_release_regions;
2298 }
284901a9 2299 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2300 if (err) {
a7a79deb
VK		 2301 dev_err(dev, "Unable to obtain %u-bit DMA "
2302 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2303 goto err_out_release_regions;
2304 }
2305 } else {
50cf156a 2306 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2307 if (err) {
a7a79deb
VK		 2308 dev_err(dev, "Unable to obtain %u-bit DMA "
2309 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2310 goto err_out_release_regions;
2311 }
2312 using_dac = 1;
2313 }
2314
27e6c7d3 2315 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2316 */
2317
27e6c7d3
SF		 2318 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2319 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2320 continue;
2321 enic->bar[i].len = pci_resource_len(pdev, i);
2322 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2323 if (!enic->bar[i].vaddr) {
a7a79deb 2324 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2325 err = -ENODEV;
2326 goto err_out_iounmap;
2327 }
2328 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2329 }
2330
2331 /* Register vNIC device
2332 */
2333
27e6c7d3
SF		 2334 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2335 ARRAY_SIZE(enic->bar));
01f2e4ea 2336 if (!enic->vdev) {
a7a79deb 2337 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2338 err = -ENODEV;
2339 goto err_out_iounmap;
2340 }
2341
8749b427
RP		 2342#ifdef CONFIG_PCI_IOV
2343 /* Get number of subvnics */
2344 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2345 if (pos) {
2346 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2347 (u16 *)&enic->num_vfs);
2348 if (enic->num_vfs) {
2349 err = pci_enable_sriov(pdev, enic->num_vfs);
2350 if (err) {
2351 dev_err(dev, "SRIOV enable failed, aborting."
2352 " pci_enable_sriov() returned %d\n",
2353 err);
2354 goto err_out_vnic_unregister;
2355 }
2356 enic->priv_flags |= ENIC_SRIOV_ENABLED;
2357 }
2358 }
2359
2360#endif
01f2e4ea
SF		 2361 /* Issue device open to get device in known state
2362 */
2363
2364 err = enic_dev_open(enic);
2365 if (err) {
a7a79deb 2366 dev_err(dev, "vNIC dev open failed, aborting\n");
8749b427 2367 goto err_out_disable_sriov;
01f2e4ea
SF		 2368 }
2369
69161425
VK		 2370 /* Setup devcmd lock
2371 */
2372
2373 spin_lock_init(&enic->devcmd_lock);
2374
2375 /*
2376 * Set ingress vlan rewrite mode before vnic initialization
2377 */
2378
2379 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2380 if (err) {
2381 dev_err(dev,
2382 "Failed to set ingress vlan rewrite mode, aborting.\n");
2383 goto err_out_dev_close;
2384 }
2385
01f2e4ea
SF		 2386 /* Issue device init to initialize the vnic-to-switch link.
2387 * We'll start with carrier off and wait for link UP
2388 * notification later to turn on carrier. We don't need
2389 * to wait here for the vnic-to-switch link initialization
2390 * to complete; link UP notification is the indication that
2391 * the process is complete.
2392 */
2393
2394 netif_carrier_off(netdev);
2395
a7a79deb
VK		 2396 /* Do not call dev_init for a dynamic vnic.
2397 * For a dynamic vnic, init_prov_info will be
2398 * called later by an upper layer.
2399 */
2400
f8bd9091
SF		 2401 if (!enic_is_dynamic(enic)) {
2402 err = vnic_dev_init(enic->vdev, 0);
2403 if (err) {
a7a79deb 2404 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2405 goto err_out_dev_close;
2406 }
01f2e4ea
SF		 2407 }
2408
6fdfa970 2409 err = enic_dev_init(enic);
01f2e4ea 2410 if (err) {
a7a79deb 2411 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2412 goto err_out_dev_close;
2413 }
2414
383ab92f 2415 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2416 */
2417
2418 init_timer(&enic->notify_timer);
2419 enic->notify_timer.function = enic_notify_timer;
2420 enic->notify_timer.data = (unsigned long)enic;
2421
2422 INIT_WORK(&enic->reset, enic_reset);
c97c894d 2423 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
01f2e4ea
SF		 2424
2425 for (i = 0; i < enic->wq_count; i++)
2426 spin_lock_init(&enic->wq_lock[i]);
2427
01f2e4ea
SF		 2428 /* Register net device
2429 */
2430
2431 enic->port_mtu = enic->config.mtu;
2432 (void)enic_change_mtu(netdev, enic->port_mtu);
2433
8749b427
RP		 2434#ifdef CONFIG_PCI_IOV
2435 if (enic_is_dynamic(enic) && pdev->is_virtfn &&
2436 is_zero_ether_addr(enic->mac_addr))
2437 random_ether_addr(enic->mac_addr);
2438#endif
2439
01f2e4ea
SF		 2440 err = enic_set_mac_addr(netdev, enic->mac_addr);
2441 if (err) {
a7a79deb 2442 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2443 goto err_out_dev_deinit;
01f2e4ea
SF		 2444 }
2445
7c844599
SF		 2446 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2447 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2448
f8bd9091
SF		 2449 if (enic_is_dynamic(enic))
2450 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2451 else
2452 netdev->netdev_ops = &enic_netdev_ops;
2453
01f2e4ea
SF		 2454 netdev->watchdog_timeo = 2 * HZ;
2455 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2456
73c1ea9b 2457 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2458 if (ENIC_SETTING(enic, LOOP)) {
2459 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2460 enic->loop_enable = 1;
2461 enic->loop_tag = enic->config.loop_tag;
2462 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2463 }
01f2e4ea 2464 if (ENIC_SETTING(enic, TXCSUM))
5ec8f9b8 2465 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
01f2e4ea 2466 if (ENIC_SETTING(enic, TSO))
5ec8f9b8 2467 netdev->hw_features |= NETIF_F_TSO |
01f2e4ea 2468 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
5ec8f9b8
MM		 2469 if (ENIC_SETTING(enic, RXCSUM))
2470 netdev->hw_features |= NETIF_F_RXCSUM;
2471
2472 netdev->features |= netdev->hw_features;
2473
01f2e4ea
SF		 2474 if (using_dac)
2475 netdev->features |= NETIF_F_HIGHDMA;
2476
01789349
JP		 2477 netdev->priv_flags |= IFF_UNICAST_FLT;
2478
01f2e4ea
SF		 2479 err = register_netdev(netdev);
2480 if (err) {
a7a79deb 2481 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2482 goto err_out_dev_deinit;
01f2e4ea
SF		 2483 }
2484
2485 return 0;
2486
6fdfa970
SF		 2487err_out_dev_deinit:
2488 enic_dev_deinit(enic);
01f2e4ea
SF		 2489err_out_dev_close:
2490 vnic_dev_close(enic->vdev);
8749b427
RP		 2491err_out_disable_sriov:
2492#ifdef CONFIG_PCI_IOV
2493 if (enic_sriov_enabled(enic)) {
2494 pci_disable_sriov(pdev);
2495 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2496 }
01f2e4ea 2497err_out_vnic_unregister:
01f2e4ea 2498 vnic_dev_unregister(enic->vdev);
8749b427 2499#endif
01f2e4ea
SF		 2500err_out_iounmap:
2501 enic_iounmap(enic);
2502err_out_release_regions:
2503 pci_release_regions(pdev);
2504err_out_disable_device:
2505 pci_disable_device(pdev);
2506err_out_free_netdev:
2507 pci_set_drvdata(pdev, NULL);
2508 free_netdev(netdev);
2509
2510 return err;
2511}
2512
2513static void __devexit enic_remove(struct pci_dev *pdev)
2514{
2515 struct net_device *netdev = pci_get_drvdata(pdev);
2516
2517 if (netdev) {
2518 struct enic *enic = netdev_priv(netdev);
2519
23f333a2 2520 cancel_work_sync(&enic->reset);
c97c894d 2521 cancel_work_sync(&enic->change_mtu_work);
01f2e4ea 2522 unregister_netdev(netdev);
6fdfa970 2523 enic_dev_deinit(enic);
01f2e4ea 2524 vnic_dev_close(enic->vdev);
8749b427
RP		 2525#ifdef CONFIG_PCI_IOV
2526 if (enic_sriov_enabled(enic)) {
2527 pci_disable_sriov(pdev);
2528 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2529 }
2530#endif
01f2e4ea
SF		 2531 vnic_dev_unregister(enic->vdev);
2532 enic_iounmap(enic);
2533 pci_release_regions(pdev);
2534 pci_disable_device(pdev);
2535 pci_set_drvdata(pdev, NULL);
2536 free_netdev(netdev);
2537 }
2538}
2539
2540static struct pci_driver enic_driver = {
2541 .name = DRV_NAME,
2542 .id_table = enic_id_table,
2543 .probe = enic_probe,
2544 .remove = __devexit_p(enic_remove),
2545};
2546
2547static int __init enic_init_module(void)
2548{
a7a79deb 2549 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2550
2551 return pci_register_driver(&enic_driver);
2552}
2553
2554static void __exit enic_cleanup_module(void)
2555{
2556 pci_unregister_driver(&enic_driver);
2557}
2558
2559module_init(enic_init_module);
2560module_exit(enic_cleanup_module);
Linux kernel - Deliverables
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