Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/klassert/ipsec...
[deliverable/linux.git] / drivers / net / ethernet / cisco / enic / vnic_cq.h
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01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
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3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#ifndef _VNIC_CQ_H_
21#define _VNIC_CQ_H_
22
23#include "cq_desc.h"
24#include "vnic_dev.h"
25
26/* Completion queue control */
27struct vnic_cq_ctrl {
28 u64 ring_base; /* 0x00 */
29 u32 ring_size; /* 0x08 */
30 u32 pad0;
31 u32 flow_control_enable; /* 0x10 */
32 u32 pad1;
33 u32 color_enable; /* 0x18 */
34 u32 pad2;
35 u32 cq_head; /* 0x20 */
36 u32 pad3;
37 u32 cq_tail; /* 0x28 */
38 u32 pad4;
39 u32 cq_tail_color; /* 0x30 */
40 u32 pad5;
41 u32 interrupt_enable; /* 0x38 */
42 u32 pad6;
43 u32 cq_entry_enable; /* 0x40 */
44 u32 pad7;
45 u32 cq_message_enable; /* 0x48 */
46 u32 pad8;
47 u32 interrupt_offset; /* 0x50 */
48 u32 pad9;
49 u64 cq_message_addr; /* 0x58 */
50 u32 pad10;
51};
52
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53struct vnic_rx_bytes_counter {
54 unsigned int small_pkt_bytes_cnt;
55 unsigned int large_pkt_bytes_cnt;
56};
57
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58struct vnic_cq {
59 unsigned int index;
60 struct vnic_dev *vdev;
61 struct vnic_cq_ctrl __iomem *ctrl; /* memory-mapped */
62 struct vnic_dev_ring ring;
63 unsigned int to_clean;
64 unsigned int last_color;
7d260ec2 65 unsigned int interrupt_offset;
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66 struct vnic_rx_bytes_counter pkt_size_counter;
67 unsigned int cur_rx_coal_timeval;
68 unsigned int tobe_rx_coal_timeval;
69 ktime_t prev_ts;
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70};
71
72static inline unsigned int vnic_cq_service(struct vnic_cq *cq,
73 unsigned int work_to_do,
74 int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc,
75 u8 type, u16 q_number, u16 completed_index, void *opaque),
76 void *opaque)
77{
78 struct cq_desc *cq_desc;
79 unsigned int work_done = 0;
80 u16 q_number, completed_index;
81 u8 type, color;
82
83 cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +
84 cq->ring.desc_size * cq->to_clean);
85 cq_desc_dec(cq_desc, &type, &color,
86 &q_number, &completed_index);
87
88 while (color != cq->last_color) {
89
90 if ((*q_service)(cq->vdev, cq_desc, type,
91 q_number, completed_index, opaque))
92 break;
93
94 cq->to_clean++;
95 if (cq->to_clean == cq->ring.desc_count) {
96 cq->to_clean = 0;
97 cq->last_color = cq->last_color ? 0 : 1;
98 }
99
100 cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +
101 cq->ring.desc_size * cq->to_clean);
102 cq_desc_dec(cq_desc, &type, &color,
103 &q_number, &completed_index);
104
105 work_done++;
106 if (work_done >= work_to_do)
107 break;
108 }
109
110 return work_done;
111}
112
113void vnic_cq_free(struct vnic_cq *cq);
114int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
115 unsigned int desc_count, unsigned int desc_size);
116void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
117 unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
118 unsigned int cq_tail_color, unsigned int interrupt_enable,
119 unsigned int cq_entry_enable, unsigned int message_enable,
120 unsigned int interrupt_offset, u64 message_addr);
121void vnic_cq_clean(struct vnic_cq *cq);
122
123#endif /* _VNIC_CQ_H_ */
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