Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
f3b197ac | 2 | * xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards |
1da177e4 LT |
3 | * |
4 | * This software is (C) by the respective authors, and licensed under the GPL | |
5 | * License. | |
6 | * | |
7 | * Written by Arjan van de Ven for Red Hat, Inc. | |
f3b197ac | 8 | * Based on work by Jeff Garzik, Doug Ledford and Donald Becker |
1da177e4 LT |
9 | * |
10 | * This software may be used and distributed according to the terms | |
11 | * of the GNU General Public License, incorporated herein by reference. | |
12 | * | |
13 | * | |
14 | * $Id: xircom_cb.c,v 1.33 2001/03/19 14:02:07 arjanv Exp $ | |
15 | */ | |
16 | ||
44298ec0 JP |
17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
18 | ||
1da177e4 LT |
19 | #include <linux/module.h> |
20 | #include <linux/kernel.h> | |
21 | #include <linux/string.h> | |
22 | #include <linux/errno.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/netdevice.h> | |
28 | #include <linux/etherdevice.h> | |
29 | #include <linux/skbuff.h> | |
30 | #include <linux/delay.h> | |
31 | #include <linux/init.h> | |
1da177e4 LT |
32 | #include <linux/bitops.h> |
33 | ||
34 | #include <asm/uaccess.h> | |
35 | #include <asm/io.h> | |
82729971 AV |
36 | #ifdef CONFIG_NET_POLL_CONTROLLER |
37 | #include <asm/irq.h> | |
38 | #endif | |
1da177e4 | 39 | |
1da177e4 LT |
40 | MODULE_DESCRIPTION("Xircom Cardbus ethernet driver"); |
41 | MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>"); | |
42 | MODULE_LICENSE("GPL"); | |
43 | ||
44 | ||
45 | ||
46 | /* IO registers on the card, offsets */ | |
47 | #define CSR0 0x00 | |
48 | #define CSR1 0x08 | |
49 | #define CSR2 0x10 | |
50 | #define CSR3 0x18 | |
51 | #define CSR4 0x20 | |
52 | #define CSR5 0x28 | |
53 | #define CSR6 0x30 | |
54 | #define CSR7 0x38 | |
55 | #define CSR8 0x40 | |
56 | #define CSR9 0x48 | |
57 | #define CSR10 0x50 | |
58 | #define CSR11 0x58 | |
59 | #define CSR12 0x60 | |
60 | #define CSR13 0x68 | |
61 | #define CSR14 0x70 | |
62 | #define CSR15 0x78 | |
63 | #define CSR16 0x80 | |
64 | ||
65 | /* PCI registers */ | |
66 | #define PCI_POWERMGMT 0x40 | |
67 | ||
68 | /* Offsets of the buffers within the descriptor pages, in bytes */ | |
69 | ||
70 | #define NUMDESCRIPTORS 4 | |
71 | ||
72 | static int bufferoffsets[NUMDESCRIPTORS] = {128,2048,4096,6144}; | |
73 | ||
74 | ||
75 | struct xircom_private { | |
76 | /* Send and receive buffers, kernel-addressable and dma addressable forms */ | |
77 | ||
6f35d5d5 AV |
78 | __le32 *rx_buffer; |
79 | __le32 *tx_buffer; | |
1da177e4 LT |
80 | |
81 | dma_addr_t rx_dma_handle; | |
82 | dma_addr_t tx_dma_handle; | |
83 | ||
84 | struct sk_buff *tx_skb[4]; | |
85 | ||
86 | unsigned long io_port; | |
87 | int open; | |
f3b197ac | 88 | |
1da177e4 LT |
89 | /* transmit_used is the rotating counter that indicates which transmit |
90 | descriptor has to be used next */ | |
91 | int transmit_used; | |
92 | ||
93 | /* Spinlock to serialize register operations. | |
94 | It must be helt while manipulating the following registers: | |
95 | CSR0, CSR6, CSR7, CSR9, CSR10, CSR15 | |
96 | */ | |
97 | spinlock_t lock; | |
98 | ||
1da177e4 LT |
99 | struct pci_dev *pdev; |
100 | struct net_device *dev; | |
1da177e4 LT |
101 | }; |
102 | ||
103 | ||
104 | /* Function prototypes */ | |
105 | static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id); | |
106 | static void xircom_remove(struct pci_dev *pdev); | |
7d12e780 | 107 | static irqreturn_t xircom_interrupt(int irq, void *dev_instance); |
ad096463 SH |
108 | static netdev_tx_t xircom_start_xmit(struct sk_buff *skb, |
109 | struct net_device *dev); | |
1da177e4 LT |
110 | static int xircom_open(struct net_device *dev); |
111 | static int xircom_close(struct net_device *dev); | |
112 | static void xircom_up(struct xircom_private *card); | |
3be034b6 | 113 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1da177e4 LT |
114 | static void xircom_poll_controller(struct net_device *dev); |
115 | #endif | |
116 | ||
117 | static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset); | |
118 | static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset); | |
119 | static void read_mac_address(struct xircom_private *card); | |
120 | static void transceiver_voodoo(struct xircom_private *card); | |
121 | static void initialize_card(struct xircom_private *card); | |
122 | static void trigger_transmit(struct xircom_private *card); | |
123 | static void trigger_receive(struct xircom_private *card); | |
124 | static void setup_descriptors(struct xircom_private *card); | |
125 | static void remove_descriptors(struct xircom_private *card); | |
126 | static int link_status_changed(struct xircom_private *card); | |
127 | static void activate_receiver(struct xircom_private *card); | |
128 | static void deactivate_receiver(struct xircom_private *card); | |
129 | static void activate_transmitter(struct xircom_private *card); | |
130 | static void deactivate_transmitter(struct xircom_private *card); | |
131 | static void enable_transmit_interrupt(struct xircom_private *card); | |
132 | static void enable_receive_interrupt(struct xircom_private *card); | |
133 | static void enable_link_interrupt(struct xircom_private *card); | |
134 | static void disable_all_interrupts(struct xircom_private *card); | |
135 | static int link_status(struct xircom_private *card); | |
136 | ||
137 | ||
138 | ||
a3aa1884 | 139 | static DEFINE_PCI_DEVICE_TABLE(xircom_pci_table) = { |
1da177e4 LT |
140 | {0x115D, 0x0003, PCI_ANY_ID, PCI_ANY_ID,}, |
141 | {0,}, | |
142 | }; | |
143 | MODULE_DEVICE_TABLE(pci, xircom_pci_table); | |
144 | ||
145 | static struct pci_driver xircom_ops = { | |
f3b197ac JG |
146 | .name = "xircom_cb", |
147 | .id_table = xircom_pci_table, | |
148 | .probe = xircom_probe, | |
149 | .remove = xircom_remove, | |
1da177e4 LT |
150 | .suspend =NULL, |
151 | .resume =NULL | |
152 | }; | |
153 | ||
154 | ||
54668b84 | 155 | #if defined DEBUG && DEBUG > 1 |
1da177e4 LT |
156 | static void print_binary(unsigned int number) |
157 | { | |
158 | int i,i2; | |
159 | char buffer[64]; | |
160 | memset(buffer,0,64); | |
161 | i2=0; | |
162 | for (i=31;i>=0;i--) { | |
163 | if (number & (1<<i)) | |
164 | buffer[i2++]='1'; | |
165 | else | |
166 | buffer[i2++]='0'; | |
f3b197ac | 167 | if ((i&3)==0) |
1da177e4 LT |
168 | buffer[i2++]=' '; |
169 | } | |
54668b84 | 170 | pr_debug("%s\n",buffer); |
1da177e4 LT |
171 | } |
172 | #endif | |
173 | ||
1034c9f6 SH |
174 | static const struct net_device_ops netdev_ops = { |
175 | .ndo_open = xircom_open, | |
176 | .ndo_stop = xircom_close, | |
177 | .ndo_start_xmit = xircom_start_xmit, | |
178 | .ndo_change_mtu = eth_change_mtu, | |
179 | .ndo_set_mac_address = eth_mac_addr, | |
180 | .ndo_validate_addr = eth_validate_addr, | |
181 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
182 | .ndo_poll_controller = xircom_poll_controller, | |
183 | #endif | |
184 | }; | |
185 | ||
1da177e4 LT |
186 | /* xircom_probe is the code that gets called on device insertion. |
187 | it sets up the hardware and registers the device to the networklayer. | |
f3b197ac | 188 | |
1da177e4 LT |
189 | TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the |
190 | first two packets that get send, and pump hates that. | |
f3b197ac | 191 | |
1da177e4 LT |
192 | */ |
193 | static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |
194 | { | |
195 | struct net_device *dev = NULL; | |
196 | struct xircom_private *private; | |
1da177e4 LT |
197 | unsigned long flags; |
198 | unsigned short tmp16; | |
f3b197ac | 199 | |
1da177e4 LT |
200 | /* First do the PCI initialisation */ |
201 | ||
202 | if (pci_enable_device(pdev)) | |
203 | return -ENODEV; | |
204 | ||
205 | /* disable all powermanagement */ | |
206 | pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000); | |
f3b197ac | 207 | |
1da177e4 LT |
208 | pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/ |
209 | ||
f3b197ac JG |
210 | /* clear PCI status, if any */ |
211 | pci_read_config_word (pdev,PCI_STATUS, &tmp16); | |
1da177e4 | 212 | pci_write_config_word (pdev, PCI_STATUS,tmp16); |
f3b197ac | 213 | |
1da177e4 | 214 | if (!request_region(pci_resource_start(pdev, 0), 128, "xircom_cb")) { |
44298ec0 | 215 | pr_err("%s: failed to allocate io-region\n", __func__); |
1da177e4 LT |
216 | return -ENODEV; |
217 | } | |
218 | ||
f3b197ac | 219 | /* |
1da177e4 LT |
220 | Before changing the hardware, allocate the memory. |
221 | This way, we can fail gracefully if not enough memory | |
f3b197ac | 222 | is available. |
1da177e4 LT |
223 | */ |
224 | dev = alloc_etherdev(sizeof(struct xircom_private)); | |
41de8d4c | 225 | if (!dev) |
1da177e4 | 226 | goto device_fail; |
41de8d4c | 227 | |
1da177e4 | 228 | private = netdev_priv(dev); |
f3b197ac | 229 | |
1da177e4 LT |
230 | /* Allocate the send/receive buffers */ |
231 | private->rx_buffer = pci_alloc_consistent(pdev,8192,&private->rx_dma_handle); | |
232 | if (private->rx_buffer == NULL) { | |
44298ec0 | 233 | pr_err("%s: no memory for rx buffer\n", __func__); |
1da177e4 | 234 | goto rx_buf_fail; |
f3b197ac | 235 | } |
1da177e4 LT |
236 | private->tx_buffer = pci_alloc_consistent(pdev,8192,&private->tx_dma_handle); |
237 | if (private->tx_buffer == NULL) { | |
44298ec0 | 238 | pr_err("%s: no memory for tx buffer\n", __func__); |
1da177e4 LT |
239 | goto tx_buf_fail; |
240 | } | |
241 | ||
1da177e4 LT |
242 | SET_NETDEV_DEV(dev, &pdev->dev); |
243 | ||
244 | ||
245 | private->dev = dev; | |
246 | private->pdev = pdev; | |
247 | private->io_port = pci_resource_start(pdev, 0); | |
248 | spin_lock_init(&private->lock); | |
249 | dev->irq = pdev->irq; | |
250 | dev->base_addr = private->io_port; | |
f3b197ac | 251 | |
1da177e4 LT |
252 | initialize_card(private); |
253 | read_mac_address(private); | |
254 | setup_descriptors(private); | |
f3b197ac | 255 | |
1034c9f6 | 256 | dev->netdev_ops = &netdev_ops; |
1da177e4 LT |
257 | pci_set_drvdata(pdev, dev); |
258 | ||
259 | if (register_netdev(dev)) { | |
44298ec0 | 260 | pr_err("%s: netdevice registration failed\n", __func__); |
1da177e4 LT |
261 | goto reg_fail; |
262 | } | |
f3b197ac | 263 | |
163ef0b5 JP |
264 | netdev_info(dev, "Xircom cardbus revision %i at irq %i\n", |
265 | pdev->revision, pdev->irq); | |
1da177e4 LT |
266 | /* start the transmitter to get a heartbeat */ |
267 | /* TODO: send 2 dummy packets here */ | |
268 | transceiver_voodoo(private); | |
f3b197ac | 269 | |
1da177e4 LT |
270 | spin_lock_irqsave(&private->lock,flags); |
271 | activate_transmitter(private); | |
272 | activate_receiver(private); | |
273 | spin_unlock_irqrestore(&private->lock,flags); | |
f3b197ac | 274 | |
1da177e4 | 275 | trigger_receive(private); |
f3b197ac | 276 | |
1da177e4 LT |
277 | return 0; |
278 | ||
279 | reg_fail: | |
280 | kfree(private->tx_buffer); | |
281 | tx_buf_fail: | |
282 | kfree(private->rx_buffer); | |
283 | rx_buf_fail: | |
284 | free_netdev(dev); | |
285 | device_fail: | |
286 | return -ENODEV; | |
287 | } | |
288 | ||
289 | ||
290 | /* | |
291 | xircom_remove is called on module-unload or on device-eject. | |
292 | it unregisters the irq, io-region and network device. | |
293 | Interrupts and such are already stopped in the "ifconfig ethX down" | |
294 | code. | |
295 | */ | |
296 | static void __devexit xircom_remove(struct pci_dev *pdev) | |
297 | { | |
298 | struct net_device *dev = pci_get_drvdata(pdev); | |
299 | struct xircom_private *card = netdev_priv(dev); | |
300 | ||
1da177e4 LT |
301 | pci_free_consistent(pdev,8192,card->rx_buffer,card->rx_dma_handle); |
302 | pci_free_consistent(pdev,8192,card->tx_buffer,card->tx_dma_handle); | |
303 | ||
304 | release_region(dev->base_addr, 128); | |
305 | unregister_netdev(dev); | |
306 | free_netdev(dev); | |
307 | pci_set_drvdata(pdev, NULL); | |
f3b197ac | 308 | } |
1da177e4 | 309 | |
7d12e780 | 310 | static irqreturn_t xircom_interrupt(int irq, void *dev_instance) |
1da177e4 LT |
311 | { |
312 | struct net_device *dev = (struct net_device *) dev_instance; | |
313 | struct xircom_private *card = netdev_priv(dev); | |
314 | unsigned int status; | |
315 | int i; | |
316 | ||
1da177e4 LT |
317 | spin_lock(&card->lock); |
318 | status = inl(card->io_port+CSR5); | |
319 | ||
54668b84 | 320 | #if defined DEBUG && DEBUG > 1 |
1da177e4 | 321 | print_binary(status); |
54668b84 JP |
322 | pr_debug("tx status 0x%08x 0x%08x\n", |
323 | card->tx_buffer[0], card->tx_buffer[4]); | |
324 | pr_debug("rx status 0x%08x 0x%08x\n", | |
325 | card->rx_buffer[0], card->rx_buffer[4]); | |
f3b197ac | 326 | #endif |
1da177e4 LT |
327 | /* Handle shared irq and hotplug */ |
328 | if (status == 0 || status == 0xffffffff) { | |
329 | spin_unlock(&card->lock); | |
330 | return IRQ_NONE; | |
331 | } | |
332 | ||
333 | if (link_status_changed(card)) { | |
334 | int newlink; | |
726b65ad | 335 | netdev_dbg(dev, "Link status has changed\n"); |
1da177e4 | 336 | newlink = link_status(card); |
163ef0b5 | 337 | netdev_info(dev, "Link is %d mbit\n", newlink); |
1da177e4 LT |
338 | if (newlink) |
339 | netif_carrier_on(dev); | |
340 | else | |
341 | netif_carrier_off(dev); | |
f3b197ac | 342 | |
1da177e4 LT |
343 | } |
344 | ||
f3b197ac | 345 | /* Clear all remaining interrupts */ |
1da177e4 LT |
346 | status |= 0xffffffff; /* FIXME: make this clear only the |
347 | real existing bits */ | |
348 | outl(status,card->io_port+CSR5); | |
1da177e4 | 349 | |
f3b197ac JG |
350 | |
351 | for (i=0;i<NUMDESCRIPTORS;i++) | |
1da177e4 | 352 | investigate_write_descriptor(dev,card,i,bufferoffsets[i]); |
f3b197ac | 353 | for (i=0;i<NUMDESCRIPTORS;i++) |
1da177e4 LT |
354 | investigate_read_descriptor(dev,card,i,bufferoffsets[i]); |
355 | ||
1da177e4 | 356 | spin_unlock(&card->lock); |
1da177e4 LT |
357 | return IRQ_HANDLED; |
358 | } | |
359 | ||
ad096463 SH |
360 | static netdev_tx_t xircom_start_xmit(struct sk_buff *skb, |
361 | struct net_device *dev) | |
1da177e4 LT |
362 | { |
363 | struct xircom_private *card; | |
364 | unsigned long flags; | |
365 | int nextdescriptor; | |
366 | int desc; | |
f3b197ac | 367 | |
1da177e4 LT |
368 | card = netdev_priv(dev); |
369 | spin_lock_irqsave(&card->lock,flags); | |
f3b197ac | 370 | |
1da177e4 | 371 | /* First see if we can free some descriptors */ |
f3b197ac | 372 | for (desc=0;desc<NUMDESCRIPTORS;desc++) |
1da177e4 | 373 | investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]); |
f3b197ac JG |
374 | |
375 | ||
1da177e4 LT |
376 | nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS); |
377 | desc = card->transmit_used; | |
f3b197ac | 378 | |
1da177e4 LT |
379 | /* only send the packet if the descriptor is free */ |
380 | if (card->tx_buffer[4*desc]==0) { | |
381 | /* Copy the packet data; zero the memory first as the card | |
382 | sometimes sends more than you ask it to. */ | |
f3b197ac | 383 | |
1da177e4 | 384 | memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536); |
d626f62b ACM |
385 | skb_copy_from_linear_data(skb, |
386 | &(card->tx_buffer[bufferoffsets[desc] / 4]), | |
387 | skb->len); | |
1da177e4 LT |
388 | /* FIXME: The specification tells us that the length we send HAS to be a multiple of |
389 | 4 bytes. */ | |
f3b197ac | 390 | |
6f35d5d5 AV |
391 | card->tx_buffer[4*desc+1] = cpu_to_le32(skb->len); |
392 | if (desc == NUMDESCRIPTORS - 1) /* bit 25: last descriptor of the ring */ | |
393 | card->tx_buffer[4*desc+1] |= cpu_to_le32(1<<25); | |
1da177e4 | 394 | |
6f35d5d5 | 395 | card->tx_buffer[4*desc+1] |= cpu_to_le32(0xF0000000); |
f3b197ac | 396 | /* 0xF0... means want interrupts*/ |
1da177e4 | 397 | card->tx_skb[desc] = skb; |
f3b197ac | 398 | |
1da177e4 LT |
399 | wmb(); |
400 | /* This gives the descriptor to the card */ | |
6f35d5d5 | 401 | card->tx_buffer[4*desc] = cpu_to_le32(0x80000000); |
1da177e4 | 402 | trigger_transmit(card); |
6f35d5d5 AV |
403 | if (card->tx_buffer[nextdescriptor*4] & cpu_to_le32(0x8000000)) { |
404 | /* next descriptor is occupied... */ | |
1da177e4 LT |
405 | netif_stop_queue(dev); |
406 | } | |
407 | card->transmit_used = nextdescriptor; | |
1da177e4 | 408 | spin_unlock_irqrestore(&card->lock,flags); |
6ed10654 | 409 | return NETDEV_TX_OK; |
1da177e4 | 410 | } |
f3b197ac | 411 | |
1da177e4 LT |
412 | /* Uh oh... no free descriptor... drop the packet */ |
413 | netif_stop_queue(dev); | |
414 | spin_unlock_irqrestore(&card->lock,flags); | |
415 | trigger_transmit(card); | |
f3b197ac | 416 | |
06f7525b | 417 | return NETDEV_TX_BUSY; |
1da177e4 LT |
418 | } |
419 | ||
420 | ||
421 | ||
422 | ||
423 | static int xircom_open(struct net_device *dev) | |
424 | { | |
425 | struct xircom_private *xp = netdev_priv(dev); | |
426 | int retval; | |
54668b84 | 427 | |
163ef0b5 JP |
428 | netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", |
429 | dev->irq); | |
a0607fd3 | 430 | retval = request_irq(dev->irq, xircom_interrupt, IRQF_SHARED, dev->name, dev); |
54668b84 | 431 | if (retval) |
1da177e4 | 432 | return retval; |
f3b197ac | 433 | |
1da177e4 LT |
434 | xircom_up(xp); |
435 | xp->open = 1; | |
54668b84 | 436 | |
1da177e4 LT |
437 | return 0; |
438 | } | |
439 | ||
440 | static int xircom_close(struct net_device *dev) | |
441 | { | |
442 | struct xircom_private *card; | |
443 | unsigned long flags; | |
f3b197ac | 444 | |
1da177e4 LT |
445 | card = netdev_priv(dev); |
446 | netif_stop_queue(dev); /* we don't want new packets */ | |
447 | ||
f3b197ac | 448 | |
1da177e4 | 449 | spin_lock_irqsave(&card->lock,flags); |
f3b197ac | 450 | |
1da177e4 | 451 | disable_all_interrupts(card); |
f3b197ac | 452 | #if 0 |
1da177e4 LT |
453 | /* We can enable this again once we send dummy packets on ifconfig ethX up */ |
454 | deactivate_receiver(card); | |
455 | deactivate_transmitter(card); | |
f3b197ac | 456 | #endif |
1da177e4 | 457 | remove_descriptors(card); |
f3b197ac | 458 | |
1da177e4 | 459 | spin_unlock_irqrestore(&card->lock,flags); |
f3b197ac | 460 | |
1da177e4 LT |
461 | card->open = 0; |
462 | free_irq(dev->irq,dev); | |
f3b197ac | 463 | |
1da177e4 | 464 | return 0; |
f3b197ac | 465 | |
1da177e4 LT |
466 | } |
467 | ||
468 | ||
1da177e4 LT |
469 | #ifdef CONFIG_NET_POLL_CONTROLLER |
470 | static void xircom_poll_controller(struct net_device *dev) | |
471 | { | |
472 | disable_irq(dev->irq); | |
7d12e780 | 473 | xircom_interrupt(dev->irq, dev); |
1da177e4 LT |
474 | enable_irq(dev->irq); |
475 | } | |
476 | #endif | |
477 | ||
478 | ||
479 | static void initialize_card(struct xircom_private *card) | |
480 | { | |
481 | unsigned int val; | |
482 | unsigned long flags; | |
1da177e4 LT |
483 | |
484 | spin_lock_irqsave(&card->lock, flags); | |
485 | ||
486 | /* First: reset the card */ | |
487 | val = inl(card->io_port + CSR0); | |
488 | val |= 0x01; /* Software reset */ | |
489 | outl(val, card->io_port + CSR0); | |
490 | ||
491 | udelay(100); /* give the card some time to reset */ | |
492 | ||
493 | val = inl(card->io_port + CSR0); | |
494 | val &= ~0x01; /* disable Software reset */ | |
495 | outl(val, card->io_port + CSR0); | |
496 | ||
497 | ||
f3b197ac | 498 | val = 0; /* Value 0x00 is a safe and conservative value |
1da177e4 LT |
499 | for the PCI configuration settings */ |
500 | outl(val, card->io_port + CSR0); | |
501 | ||
502 | ||
503 | disable_all_interrupts(card); | |
504 | deactivate_receiver(card); | |
505 | deactivate_transmitter(card); | |
506 | ||
507 | spin_unlock_irqrestore(&card->lock, flags); | |
1da177e4 LT |
508 | } |
509 | ||
510 | /* | |
511 | trigger_transmit causes the card to check for frames to be transmitted. | |
512 | This is accomplished by writing to the CSR1 port. The documentation | |
513 | claims that the act of writing is sufficient and that the value is | |
514 | ignored; I chose zero. | |
515 | */ | |
516 | static void trigger_transmit(struct xircom_private *card) | |
517 | { | |
518 | unsigned int val; | |
1da177e4 LT |
519 | |
520 | val = 0; | |
521 | outl(val, card->io_port + CSR1); | |
1da177e4 LT |
522 | } |
523 | ||
524 | /* | |
525 | trigger_receive causes the card to check for empty frames in the | |
526 | descriptor list in which packets can be received. | |
527 | This is accomplished by writing to the CSR2 port. The documentation | |
528 | claims that the act of writing is sufficient and that the value is | |
529 | ignored; I chose zero. | |
530 | */ | |
531 | static void trigger_receive(struct xircom_private *card) | |
532 | { | |
533 | unsigned int val; | |
1da177e4 LT |
534 | |
535 | val = 0; | |
536 | outl(val, card->io_port + CSR2); | |
1da177e4 LT |
537 | } |
538 | ||
539 | /* | |
540 | setup_descriptors initializes the send and receive buffers to be valid | |
541 | descriptors and programs the addresses into the card. | |
542 | */ | |
543 | static void setup_descriptors(struct xircom_private *card) | |
544 | { | |
6f35d5d5 | 545 | u32 address; |
1da177e4 | 546 | int i; |
1da177e4 | 547 | |
a707cd6e ES |
548 | BUG_ON(card->rx_buffer == NULL); |
549 | BUG_ON(card->tx_buffer == NULL); | |
1da177e4 LT |
550 | |
551 | /* Receive descriptors */ | |
552 | memset(card->rx_buffer, 0, 128); /* clear the descriptors */ | |
553 | for (i=0;i<NUMDESCRIPTORS;i++ ) { | |
554 | ||
555 | /* Rx Descr0: It's empty, let the card own it, no errors -> 0x80000000 */ | |
6f35d5d5 | 556 | card->rx_buffer[i*4 + 0] = cpu_to_le32(0x80000000); |
1da177e4 | 557 | /* Rx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */ |
6f35d5d5 AV |
558 | card->rx_buffer[i*4 + 1] = cpu_to_le32(1536); |
559 | if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */ | |
560 | card->rx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25); | |
1da177e4 LT |
561 | |
562 | /* Rx Descr2: address of the buffer | |
563 | we store the buffer at the 2nd half of the page */ | |
f3b197ac | 564 | |
6f35d5d5 | 565 | address = card->rx_dma_handle; |
1da177e4 LT |
566 | card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); |
567 | /* Rx Desc3: address of 2nd buffer -> 0 */ | |
568 | card->rx_buffer[i*4 + 3] = 0; | |
569 | } | |
f3b197ac | 570 | |
1da177e4 LT |
571 | wmb(); |
572 | /* Write the receive descriptor ring address to the card */ | |
6f35d5d5 AV |
573 | address = card->rx_dma_handle; |
574 | outl(address, card->io_port + CSR3); /* Receive descr list address */ | |
1da177e4 LT |
575 | |
576 | ||
577 | /* transmit descriptors */ | |
578 | memset(card->tx_buffer, 0, 128); /* clear the descriptors */ | |
f3b197ac | 579 | |
1da177e4 LT |
580 | for (i=0;i<NUMDESCRIPTORS;i++ ) { |
581 | /* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */ | |
582 | card->tx_buffer[i*4 + 0] = 0x00000000; | |
583 | /* Tx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */ | |
6f35d5d5 AV |
584 | card->tx_buffer[i*4 + 1] = cpu_to_le32(1536); |
585 | if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */ | |
586 | card->tx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25); | |
f3b197ac | 587 | |
1da177e4 LT |
588 | /* Tx Descr2: address of the buffer |
589 | we store the buffer at the 2nd half of the page */ | |
6f35d5d5 | 590 | address = card->tx_dma_handle; |
1da177e4 LT |
591 | card->tx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); |
592 | /* Tx Desc3: address of 2nd buffer -> 0 */ | |
593 | card->tx_buffer[i*4 + 3] = 0; | |
594 | } | |
595 | ||
596 | wmb(); | |
597 | /* wite the transmit descriptor ring to the card */ | |
6f35d5d5 AV |
598 | address = card->tx_dma_handle; |
599 | outl(address, card->io_port + CSR4); /* xmit descr list address */ | |
1da177e4 LT |
600 | } |
601 | ||
602 | /* | |
603 | remove_descriptors informs the card the descriptors are no longer | |
604 | valid by setting the address in the card to 0x00. | |
605 | */ | |
606 | static void remove_descriptors(struct xircom_private *card) | |
607 | { | |
608 | unsigned int val; | |
1da177e4 LT |
609 | |
610 | val = 0; | |
611 | outl(val, card->io_port + CSR3); /* Receive descriptor address */ | |
612 | outl(val, card->io_port + CSR4); /* Send descriptor address */ | |
1da177e4 LT |
613 | } |
614 | ||
615 | /* | |
616 | link_status_changed returns 1 if the card has indicated that | |
617 | the link status has changed. The new link status has to be read from CSR12. | |
618 | ||
619 | This function also clears the status-bit. | |
620 | */ | |
621 | static int link_status_changed(struct xircom_private *card) | |
622 | { | |
623 | unsigned int val; | |
1da177e4 LT |
624 | |
625 | val = inl(card->io_port + CSR5); /* Status register */ | |
626 | ||
54668b84 | 627 | if ((val & (1 << 27)) == 0) /* no change */ |
1da177e4 | 628 | return 0; |
1da177e4 LT |
629 | |
630 | /* clear the event by writing a 1 to the bit in the | |
631 | status register. */ | |
632 | val = (1 << 27); | |
633 | outl(val, card->io_port + CSR5); | |
634 | ||
1da177e4 LT |
635 | return 1; |
636 | } | |
637 | ||
638 | ||
639 | /* | |
640 | transmit_active returns 1 if the transmitter on the card is | |
641 | in a non-stopped state. | |
642 | */ | |
643 | static int transmit_active(struct xircom_private *card) | |
644 | { | |
645 | unsigned int val; | |
1da177e4 LT |
646 | |
647 | val = inl(card->io_port + CSR5); /* Status register */ | |
648 | ||
54668b84 | 649 | if ((val & (7 << 20)) == 0) /* transmitter disabled */ |
1da177e4 | 650 | return 0; |
1da177e4 | 651 | |
1da177e4 LT |
652 | return 1; |
653 | } | |
654 | ||
655 | /* | |
656 | receive_active returns 1 if the receiver on the card is | |
657 | in a non-stopped state. | |
658 | */ | |
659 | static int receive_active(struct xircom_private *card) | |
660 | { | |
661 | unsigned int val; | |
1da177e4 LT |
662 | |
663 | val = inl(card->io_port + CSR5); /* Status register */ | |
664 | ||
54668b84 | 665 | if ((val & (7 << 17)) == 0) /* receiver disabled */ |
1da177e4 | 666 | return 0; |
1da177e4 | 667 | |
1da177e4 LT |
668 | return 1; |
669 | } | |
670 | ||
671 | /* | |
672 | activate_receiver enables the receiver on the card. | |
673 | Before being allowed to active the receiver, the receiver | |
674 | must be completely de-activated. To achieve this, | |
f3b197ac | 675 | this code actually disables the receiver first; then it waits for the |
1da177e4 LT |
676 | receiver to become inactive, then it activates the receiver and then |
677 | it waits for the receiver to be active. | |
678 | ||
679 | must be called with the lock held and interrupts disabled. | |
680 | */ | |
681 | static void activate_receiver(struct xircom_private *card) | |
682 | { | |
683 | unsigned int val; | |
684 | int counter; | |
1da177e4 LT |
685 | |
686 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
f3b197ac | 687 | |
1da177e4 LT |
688 | /* If the "active" bit is set and the receiver is already |
689 | active, no need to do the expensive thing */ | |
690 | if ((val&2) && (receive_active(card))) | |
691 | return; | |
f3b197ac JG |
692 | |
693 | ||
1da177e4 LT |
694 | val = val & ~2; /* disable the receiver */ |
695 | outl(val, card->io_port + CSR6); | |
696 | ||
697 | counter = 10; | |
698 | while (counter > 0) { | |
699 | if (!receive_active(card)) | |
700 | break; | |
701 | /* wait a while */ | |
702 | udelay(50); | |
703 | counter--; | |
704 | if (counter <= 0) | |
163ef0b5 | 705 | netdev_err(card->dev, "Receiver failed to deactivate\n"); |
1da177e4 LT |
706 | } |
707 | ||
708 | /* enable the receiver */ | |
709 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
710 | val = val | 2; /* enable the receiver */ | |
711 | outl(val, card->io_port + CSR6); | |
712 | ||
713 | /* now wait for the card to activate again */ | |
714 | counter = 10; | |
715 | while (counter > 0) { | |
716 | if (receive_active(card)) | |
717 | break; | |
718 | /* wait a while */ | |
719 | udelay(50); | |
720 | counter--; | |
721 | if (counter <= 0) | |
163ef0b5 JP |
722 | netdev_err(card->dev, |
723 | "Receiver failed to re-activate\n"); | |
1da177e4 | 724 | } |
1da177e4 LT |
725 | } |
726 | ||
727 | /* | |
728 | deactivate_receiver disables the receiver on the card. | |
f3b197ac | 729 | To achieve this this code disables the receiver first; |
1da177e4 LT |
730 | then it waits for the receiver to become inactive. |
731 | ||
732 | must be called with the lock held and interrupts disabled. | |
733 | */ | |
734 | static void deactivate_receiver(struct xircom_private *card) | |
735 | { | |
736 | unsigned int val; | |
737 | int counter; | |
1da177e4 LT |
738 | |
739 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
740 | val = val & ~2; /* disable the receiver */ | |
741 | outl(val, card->io_port + CSR6); | |
742 | ||
743 | counter = 10; | |
744 | while (counter > 0) { | |
745 | if (!receive_active(card)) | |
746 | break; | |
747 | /* wait a while */ | |
748 | udelay(50); | |
749 | counter--; | |
750 | if (counter <= 0) | |
163ef0b5 | 751 | netdev_err(card->dev, "Receiver failed to deactivate\n"); |
1da177e4 | 752 | } |
1da177e4 LT |
753 | } |
754 | ||
755 | ||
756 | /* | |
757 | activate_transmitter enables the transmitter on the card. | |
758 | Before being allowed to active the transmitter, the transmitter | |
759 | must be completely de-activated. To achieve this, | |
f3b197ac | 760 | this code actually disables the transmitter first; then it waits for the |
1da177e4 LT |
761 | transmitter to become inactive, then it activates the transmitter and then |
762 | it waits for the transmitter to be active again. | |
763 | ||
764 | must be called with the lock held and interrupts disabled. | |
765 | */ | |
766 | static void activate_transmitter(struct xircom_private *card) | |
767 | { | |
768 | unsigned int val; | |
769 | int counter; | |
1da177e4 LT |
770 | |
771 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
772 | ||
773 | /* If the "active" bit is set and the receiver is already | |
f3b197ac | 774 | active, no need to do the expensive thing */ |
1da177e4 LT |
775 | if ((val&(1<<13)) && (transmit_active(card))) |
776 | return; | |
777 | ||
778 | val = val & ~(1 << 13); /* disable the transmitter */ | |
779 | outl(val, card->io_port + CSR6); | |
780 | ||
781 | counter = 10; | |
782 | while (counter > 0) { | |
783 | if (!transmit_active(card)) | |
784 | break; | |
785 | /* wait a while */ | |
786 | udelay(50); | |
787 | counter--; | |
788 | if (counter <= 0) | |
163ef0b5 JP |
789 | netdev_err(card->dev, |
790 | "Transmitter failed to deactivate\n"); | |
1da177e4 LT |
791 | } |
792 | ||
793 | /* enable the transmitter */ | |
794 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
795 | val = val | (1 << 13); /* enable the transmitter */ | |
796 | outl(val, card->io_port + CSR6); | |
797 | ||
798 | /* now wait for the card to activate again */ | |
799 | counter = 10; | |
800 | while (counter > 0) { | |
801 | if (transmit_active(card)) | |
802 | break; | |
803 | /* wait a while */ | |
804 | udelay(50); | |
805 | counter--; | |
806 | if (counter <= 0) | |
163ef0b5 JP |
807 | netdev_err(card->dev, |
808 | "Transmitter failed to re-activate\n"); | |
1da177e4 | 809 | } |
1da177e4 LT |
810 | } |
811 | ||
812 | /* | |
813 | deactivate_transmitter disables the transmitter on the card. | |
f3b197ac | 814 | To achieve this this code disables the transmitter first; |
1da177e4 LT |
815 | then it waits for the transmitter to become inactive. |
816 | ||
817 | must be called with the lock held and interrupts disabled. | |
818 | */ | |
819 | static void deactivate_transmitter(struct xircom_private *card) | |
820 | { | |
821 | unsigned int val; | |
822 | int counter; | |
1da177e4 LT |
823 | |
824 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
825 | val = val & ~2; /* disable the transmitter */ | |
826 | outl(val, card->io_port + CSR6); | |
827 | ||
828 | counter = 20; | |
829 | while (counter > 0) { | |
830 | if (!transmit_active(card)) | |
831 | break; | |
832 | /* wait a while */ | |
833 | udelay(50); | |
834 | counter--; | |
835 | if (counter <= 0) | |
163ef0b5 JP |
836 | netdev_err(card->dev, |
837 | "Transmitter failed to deactivate\n"); | |
1da177e4 | 838 | } |
1da177e4 LT |
839 | } |
840 | ||
841 | ||
842 | /* | |
843 | enable_transmit_interrupt enables the transmit interrupt | |
844 | ||
845 | must be called with the lock held and interrupts disabled. | |
846 | */ | |
847 | static void enable_transmit_interrupt(struct xircom_private *card) | |
848 | { | |
849 | unsigned int val; | |
1da177e4 LT |
850 | |
851 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
852 | val |= 1; /* enable the transmit interrupt */ | |
853 | outl(val, card->io_port + CSR7); | |
1da177e4 LT |
854 | } |
855 | ||
856 | ||
857 | /* | |
858 | enable_receive_interrupt enables the receive interrupt | |
859 | ||
860 | must be called with the lock held and interrupts disabled. | |
861 | */ | |
862 | static void enable_receive_interrupt(struct xircom_private *card) | |
863 | { | |
864 | unsigned int val; | |
1da177e4 LT |
865 | |
866 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
867 | val = val | (1 << 6); /* enable the receive interrupt */ | |
868 | outl(val, card->io_port + CSR7); | |
1da177e4 LT |
869 | } |
870 | ||
871 | /* | |
872 | enable_link_interrupt enables the link status change interrupt | |
873 | ||
874 | must be called with the lock held and interrupts disabled. | |
875 | */ | |
876 | static void enable_link_interrupt(struct xircom_private *card) | |
877 | { | |
878 | unsigned int val; | |
1da177e4 LT |
879 | |
880 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
881 | val = val | (1 << 27); /* enable the link status chage interrupt */ | |
882 | outl(val, card->io_port + CSR7); | |
1da177e4 LT |
883 | } |
884 | ||
885 | ||
886 | ||
887 | /* | |
888 | disable_all_interrupts disables all interrupts | |
889 | ||
890 | must be called with the lock held and interrupts disabled. | |
891 | */ | |
892 | static void disable_all_interrupts(struct xircom_private *card) | |
893 | { | |
894 | unsigned int val; | |
f3b197ac | 895 | |
1da177e4 LT |
896 | val = 0; /* disable all interrupts */ |
897 | outl(val, card->io_port + CSR7); | |
1da177e4 LT |
898 | } |
899 | ||
900 | /* | |
901 | enable_common_interrupts enables several weird interrupts | |
902 | ||
903 | must be called with the lock held and interrupts disabled. | |
904 | */ | |
905 | static void enable_common_interrupts(struct xircom_private *card) | |
906 | { | |
907 | unsigned int val; | |
1da177e4 LT |
908 | |
909 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
910 | val |= (1<<16); /* Normal Interrupt Summary */ | |
911 | val |= (1<<15); /* Abnormal Interrupt Summary */ | |
912 | val |= (1<<13); /* Fatal bus error */ | |
913 | val |= (1<<8); /* Receive Process Stopped */ | |
914 | val |= (1<<7); /* Receive Buffer Unavailable */ | |
915 | val |= (1<<5); /* Transmit Underflow */ | |
916 | val |= (1<<2); /* Transmit Buffer Unavailable */ | |
917 | val |= (1<<1); /* Transmit Process Stopped */ | |
918 | outl(val, card->io_port + CSR7); | |
1da177e4 LT |
919 | } |
920 | ||
921 | /* | |
922 | enable_promisc starts promisc mode | |
923 | ||
924 | must be called with the lock held and interrupts disabled. | |
925 | */ | |
926 | static int enable_promisc(struct xircom_private *card) | |
927 | { | |
928 | unsigned int val; | |
1da177e4 | 929 | |
f3b197ac JG |
930 | val = inl(card->io_port + CSR6); |
931 | val = val | (1 << 6); | |
1da177e4 LT |
932 | outl(val, card->io_port + CSR6); |
933 | ||
1da177e4 LT |
934 | return 1; |
935 | } | |
936 | ||
937 | ||
938 | ||
939 | ||
f3b197ac | 940 | /* |
59c51591 | 941 | link_status() checks the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what. |
1da177e4 LT |
942 | |
943 | Must be called in locked state with interrupts disabled | |
944 | */ | |
945 | static int link_status(struct xircom_private *card) | |
946 | { | |
947 | unsigned int val; | |
f3b197ac | 948 | |
1da177e4 | 949 | val = inb(card->io_port + CSR12); |
f3b197ac | 950 | |
1da177e4 LT |
951 | if (!(val&(1<<2))) /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */ |
952 | return 10; | |
953 | if (!(val&(1<<1))) /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */ | |
954 | return 100; | |
f3b197ac JG |
955 | |
956 | /* If we get here -> no link at all */ | |
1da177e4 | 957 | |
1da177e4 LT |
958 | return 0; |
959 | } | |
960 | ||
961 | ||
962 | ||
963 | ||
964 | ||
965 | /* | |
966 | read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure. | |
f3b197ac | 967 | |
1da177e4 LT |
968 | This function will take the spinlock itself and can, as a result, not be called with the lock helt. |
969 | */ | |
970 | static void read_mac_address(struct xircom_private *card) | |
971 | { | |
972 | unsigned char j, tuple, link, data_id, data_count; | |
973 | unsigned long flags; | |
974 | int i; | |
975 | ||
1da177e4 LT |
976 | spin_lock_irqsave(&card->lock, flags); |
977 | ||
978 | outl(1 << 12, card->io_port + CSR9); /* enable boot rom access */ | |
979 | for (i = 0x100; i < 0x1f7; i += link + 2) { | |
980 | outl(i, card->io_port + CSR10); | |
981 | tuple = inl(card->io_port + CSR9) & 0xff; | |
982 | outl(i + 1, card->io_port + CSR10); | |
983 | link = inl(card->io_port + CSR9) & 0xff; | |
984 | outl(i + 2, card->io_port + CSR10); | |
985 | data_id = inl(card->io_port + CSR9) & 0xff; | |
986 | outl(i + 3, card->io_port + CSR10); | |
987 | data_count = inl(card->io_port + CSR9) & 0xff; | |
988 | if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) { | |
f3b197ac | 989 | /* |
1da177e4 LT |
990 | * This is it. We have the data we want. |
991 | */ | |
992 | for (j = 0; j < 6; j++) { | |
993 | outl(i + j + 4, card->io_port + CSR10); | |
994 | card->dev->dev_addr[j] = inl(card->io_port + CSR9) & 0xff; | |
995 | } | |
996 | break; | |
997 | } else if (link == 0) { | |
998 | break; | |
999 | } | |
1000 | } | |
1001 | spin_unlock_irqrestore(&card->lock, flags); | |
e174961c | 1002 | pr_debug(" %pM\n", card->dev->dev_addr); |
1da177e4 LT |
1003 | } |
1004 | ||
1005 | ||
1006 | /* | |
1007 | transceiver_voodoo() enables the external UTP plug thingy. | |
1008 | it's called voodoo as I stole this code and cannot cross-reference | |
1009 | it with the specification. | |
1010 | */ | |
1011 | static void transceiver_voodoo(struct xircom_private *card) | |
1012 | { | |
1013 | unsigned long flags; | |
1014 | ||
1da177e4 LT |
1015 | /* disable all powermanagement */ |
1016 | pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000); | |
1017 | ||
1018 | setup_descriptors(card); | |
1019 | ||
1020 | spin_lock_irqsave(&card->lock, flags); | |
1021 | ||
1022 | outl(0x0008, card->io_port + CSR15); | |
f3b197ac | 1023 | udelay(25); |
1da177e4 LT |
1024 | outl(0xa8050000, card->io_port + CSR15); |
1025 | udelay(25); | |
1026 | outl(0xa00f0000, card->io_port + CSR15); | |
1027 | udelay(25); | |
f3b197ac | 1028 | |
1da177e4 LT |
1029 | spin_unlock_irqrestore(&card->lock, flags); |
1030 | ||
1031 | netif_start_queue(card->dev); | |
1da177e4 LT |
1032 | } |
1033 | ||
1034 | ||
1035 | static void xircom_up(struct xircom_private *card) | |
1036 | { | |
1037 | unsigned long flags; | |
1038 | int i; | |
1039 | ||
1da177e4 LT |
1040 | /* disable all powermanagement */ |
1041 | pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000); | |
1042 | ||
1043 | setup_descriptors(card); | |
1044 | ||
1045 | spin_lock_irqsave(&card->lock, flags); | |
1046 | ||
f3b197ac | 1047 | |
1da177e4 LT |
1048 | enable_link_interrupt(card); |
1049 | enable_transmit_interrupt(card); | |
1050 | enable_receive_interrupt(card); | |
1051 | enable_common_interrupts(card); | |
1052 | enable_promisc(card); | |
f3b197ac | 1053 | |
1da177e4 | 1054 | /* The card can have received packets already, read them away now */ |
f3b197ac | 1055 | for (i=0;i<NUMDESCRIPTORS;i++) |
1da177e4 LT |
1056 | investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]); |
1057 | ||
1058 | ||
1059 | spin_unlock_irqrestore(&card->lock, flags); | |
1060 | trigger_receive(card); | |
1061 | trigger_transmit(card); | |
1062 | netif_start_queue(card->dev); | |
1da177e4 LT |
1063 | } |
1064 | ||
1065 | /* Bufferoffset is in BYTES */ | |
163ef0b5 JP |
1066 | static void |
1067 | investigate_read_descriptor(struct net_device *dev, struct xircom_private *card, | |
1068 | int descnr, unsigned int bufferoffset) | |
1da177e4 | 1069 | { |
163ef0b5 | 1070 | int status; |
f3b197ac | 1071 | |
163ef0b5 | 1072 | status = le32_to_cpu(card->rx_buffer[4*descnr]); |
f3b197ac | 1073 | |
163ef0b5 | 1074 | if (status > 0) { /* packet received */ |
f3b197ac | 1075 | |
163ef0b5 | 1076 | /* TODO: discard error packets */ |
f3b197ac | 1077 | |
163ef0b5 JP |
1078 | short pkt_len = ((status >> 16) & 0x7ff) - 4; |
1079 | /* minus 4, we don't want the CRC */ | |
1080 | struct sk_buff *skb; | |
1da177e4 | 1081 | |
163ef0b5 JP |
1082 | if (pkt_len > 1518) { |
1083 | netdev_err(dev, "Packet length %i is bogus\n", pkt_len); | |
1084 | pkt_len = 1518; | |
1085 | } | |
1da177e4 | 1086 | |
163ef0b5 JP |
1087 | skb = dev_alloc_skb(pkt_len + 2); |
1088 | if (skb == NULL) { | |
1089 | dev->stats.rx_dropped++; | |
1090 | goto out; | |
1da177e4 | 1091 | } |
163ef0b5 JP |
1092 | skb_reserve(skb, 2); |
1093 | skb_copy_to_linear_data(skb, | |
1094 | &card->rx_buffer[bufferoffset / 4], | |
1095 | pkt_len); | |
1096 | skb_put(skb, pkt_len); | |
1097 | skb->protocol = eth_type_trans(skb, dev); | |
1098 | netif_rx(skb); | |
1099 | dev->stats.rx_packets++; | |
1100 | dev->stats.rx_bytes += pkt_len; | |
1101 | ||
1102 | out: | |
1103 | /* give the buffer back to the card */ | |
1104 | card->rx_buffer[4*descnr] = cpu_to_le32(0x80000000); | |
1105 | trigger_receive(card); | |
1106 | } | |
1da177e4 LT |
1107 | } |
1108 | ||
1109 | ||
1110 | /* Bufferoffset is in BYTES */ | |
163ef0b5 JP |
1111 | static void |
1112 | investigate_write_descriptor(struct net_device *dev, | |
1113 | struct xircom_private *card, | |
1114 | int descnr, unsigned int bufferoffset) | |
1da177e4 | 1115 | { |
163ef0b5 | 1116 | int status; |
1da177e4 | 1117 | |
163ef0b5 | 1118 | status = le32_to_cpu(card->tx_buffer[4*descnr]); |
f3b197ac | 1119 | #if 0 |
163ef0b5 JP |
1120 | if (status & 0x8000) { /* Major error */ |
1121 | pr_err("Major transmit error status %x\n", status); | |
1122 | card->tx_buffer[4*descnr] = 0; | |
1123 | netif_wake_queue (dev); | |
1124 | } | |
1da177e4 | 1125 | #endif |
163ef0b5 JP |
1126 | if (status > 0) { /* bit 31 is 0 when done */ |
1127 | if (card->tx_skb[descnr]!=NULL) { | |
1128 | dev->stats.tx_bytes += card->tx_skb[descnr]->len; | |
1129 | dev_kfree_skb_irq(card->tx_skb[descnr]); | |
1da177e4 | 1130 | } |
163ef0b5 JP |
1131 | card->tx_skb[descnr] = NULL; |
1132 | /* Bit 8 in the status field is 1 if there was a collision */ | |
1133 | if (status & (1 << 8)) | |
1134 | dev->stats.collisions++; | |
1135 | card->tx_buffer[4*descnr] = 0; /* descriptor is free again */ | |
1136 | netif_wake_queue (dev); | |
1137 | dev->stats.tx_packets++; | |
1138 | } | |
1da177e4 LT |
1139 | } |
1140 | ||
1da177e4 LT |
1141 | static int __init xircom_init(void) |
1142 | { | |
ec42cdb6 | 1143 | return pci_register_driver(&xircom_ops); |
1da177e4 LT |
1144 | } |
1145 | ||
1146 | static void __exit xircom_exit(void) | |
1147 | { | |
1148 | pci_unregister_driver(&xircom_ops); | |
f3b197ac | 1149 | } |
1da177e4 | 1150 | |
f3b197ac | 1151 | module_init(xircom_init) |
1da177e4 LT |
1152 | module_exit(xircom_exit) |
1153 |