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tun: change tun_get_iff() prototype.
[deliverable/linux.git] / drivers / net / ethernet / emulex / benet / be_main.c
CommitLineData
6b7c5b94 1/*
d2145cde 2 * Copyright (C) 2005 - 2011 Emulex
6b7c5b94
SP		 3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
d2145cde 11 * linux-drivers@emulex.com
6b7c5b94 12 *
d2145cde
AK		 13 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
6b7c5b94
SP		 16 */
17
70c71606 18#include <linux/prefetch.h>
9d9779e7 19#include <linux/module.h>
6b7c5b94 20#include "be.h"
8788fdc2 21#include "be_cmds.h"
65f71b8b 22#include <asm/div64.h>
d6b6d987 23#include <linux/aer.h>
6b7c5b94
SP		 24
25MODULE_VERSION(DRV_VER);
26MODULE_DEVICE_TABLE(pci, be_dev_ids);
27MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
28MODULE_AUTHOR("ServerEngines Corporation");
29MODULE_LICENSE("GPL");
30
ba343c77 31static unsigned int num_vfs;
ba343c77 32module_param(num_vfs, uint, S_IRUGO);
ba343c77 33MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
6b7c5b94 34
11ac75ed
SP		 35static ushort rx_frag_size = 2048;
36module_param(rx_frag_size, ushort, S_IRUGO);
37MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
38
6b7c5b94 39static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374 40 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 41 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 42 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
43 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
fe6d2a38 44 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)},
12f4d0a8 45 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID4)},
ecedb6ae 46 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID5)},
76b73530 47 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID6)},
6b7c5b94
SP		 48 { 0 }
49};
50MODULE_DEVICE_TABLE(pci, be_dev_ids);
7c185276 51/* UE Status Low CSR */
42c8b11e 52static const char * const ue_status_low_desc[] = {
7c185276
AK		 53 "CEV",
54 "CTX",
55 "DBUF",
56 "ERX",
57 "Host",
58 "MPU",
59 "NDMA",
60 "PTC ",
61 "RDMA ",
62 "RXF ",
63 "RXIPS ",
64 "RXULP0 ",
65 "RXULP1 ",
66 "RXULP2 ",
67 "TIM ",
68 "TPOST ",
69 "TPRE ",
70 "TXIPS ",
71 "TXULP0 ",
72 "TXULP1 ",
73 "UC ",
74 "WDMA ",
75 "TXULP2 ",
76 "HOST1 ",
77 "P0_OB_LINK ",
78 "P1_OB_LINK ",
79 "HOST_GPIO ",
80 "MBOX ",
81 "AXGMAC0",
82 "AXGMAC1",
83 "JTAG",
84 "MPU_INTPEND"
85};
86/* UE Status High CSR */
42c8b11e 87static const char * const ue_status_hi_desc[] = {
7c185276
AK		 88 "LPCMEMHOST",
89 "MGMT_MAC",
90 "PCS0ONLINE",
91 "MPU_IRAM",
92 "PCS1ONLINE",
93 "PCTL0",
94 "PCTL1",
95 "PMEM",
96 "RR",
97 "TXPB",
98 "RXPP",
99 "XAUI",
100 "TXP",
101 "ARM",
102 "IPC",
103 "HOST2",
104 "HOST3",
105 "HOST4",
106 "HOST5",
107 "HOST6",
108 "HOST7",
109 "HOST8",
110 "HOST9",
42c8b11e 111 "NETC",
7c185276
AK		 112 "Unknown",
113 "Unknown",
114 "Unknown",
115 "Unknown",
116 "Unknown",
117 "Unknown",
118 "Unknown",
119 "Unknown"
120};
6b7c5b94 121
752961a1
SP		 122/* Is BE in a multi-channel mode */
123static inline bool be_is_mc(struct be_adapter *adapter) {
124 return (adapter->function_mode & FLEX10_MODE ||
125 adapter->function_mode & VNIC_MODE ||
126 adapter->function_mode & UMC_ENABLED);
127}
128
6b7c5b94
SP		 129static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
130{
131 struct be_dma_mem *mem = &q->dma_mem;
1cfafab9 132 if (mem->va) {
2b7bcebf
IV		 133 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
134 mem->dma);
1cfafab9
SP		 135 mem->va = NULL;
136 }
6b7c5b94
SP		 137}
138
139static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
140 u16 len, u16 entry_size)
141{
142 struct be_dma_mem *mem = &q->dma_mem;
143
144 memset(q, 0, sizeof(*q));
145 q->len = len;
146 q->entry_size = entry_size;
147 mem->size = len * entry_size;
2b7bcebf
IV		 148 mem->va = dma_alloc_coherent(&adapter->pdev->dev, mem->size, &mem->dma,
149 GFP_KERNEL);
6b7c5b94 150 if (!mem->va)
10ef9ab4 151 return -ENOMEM;
6b7c5b94
SP		 152 memset(mem->va, 0, mem->size);
153 return 0;
154}
155
8788fdc2 156static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 157{
db3ea781 158 u32 reg, enabled;
5f0b849e 159
f67ef7ba 160 if (adapter->eeh_error)
cf588477
SP		 161 return;
162
db3ea781
SP		 163 pci_read_config_dword(adapter->pdev, PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET,
164 &reg);
165 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
166
5f0b849e 167 if (!enabled && enable)
6b7c5b94 168 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 169 else if (enabled && !enable)
6b7c5b94 170 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 171 else
6b7c5b94 172 return;
5f0b849e 173
db3ea781
SP		 174 pci_write_config_dword(adapter->pdev,
175 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET, reg);
6b7c5b94
SP		 176}
177
8788fdc2 178static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 179{
180 u32 val = 0;
181 val |= qid & DB_RQ_RING_ID_MASK;
182 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
f3eb62d2
SP		 183
184 wmb();
8788fdc2 185 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 186}
187
8788fdc2 188static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 189{
190 u32 val = 0;
191 val |= qid & DB_TXULP_RING_ID_MASK;
192 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
f3eb62d2
SP		 193
194 wmb();
8788fdc2 195 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 196}
197
8788fdc2 198static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 199 bool arm, bool clear_int, u16 num_popped)
200{
201 u32 val = 0;
202 val |= qid & DB_EQ_RING_ID_MASK;
fe6d2a38
SP		 203 val |= ((qid & DB_EQ_RING_ID_EXT_MASK) <<
204 DB_EQ_RING_ID_EXT_MASK_SHIFT);
cf588477 205
f67ef7ba 206 if (adapter->eeh_error)
cf588477
SP		 207 return;
208
6b7c5b94
SP		 209 if (arm)
210 val |= 1 << DB_EQ_REARM_SHIFT;
211 if (clear_int)
212 val |= 1 << DB_EQ_CLR_SHIFT;
213 val |= 1 << DB_EQ_EVNT_SHIFT;
214 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 215 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 216}
217
8788fdc2 218void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 219{
220 u32 val = 0;
221 val |= qid & DB_CQ_RING_ID_MASK;
fe6d2a38
SP		 222 val |= ((qid & DB_CQ_RING_ID_EXT_MASK) <<
223 DB_CQ_RING_ID_EXT_MASK_SHIFT);
cf588477 224
f67ef7ba 225 if (adapter->eeh_error)
cf588477
SP		 226 return;
227
6b7c5b94
SP		 228 if (arm)
229 val |= 1 << DB_CQ_REARM_SHIFT;
230 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 231 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 232}
233
6b7c5b94
SP		 234static int be_mac_addr_set(struct net_device *netdev, void *p)
235{
236 struct be_adapter *adapter = netdev_priv(netdev);
237 struct sockaddr *addr = p;
238 int status = 0;
e3a7ae2c 239 u8 current_mac[ETH_ALEN];
fbc13f01 240 u32 pmac_id = adapter->pmac_id[0];
704e4c88 241 bool active_mac = true;
6b7c5b94 242
ca9e4988
AK		 243 if (!is_valid_ether_addr(addr->sa_data))
244 return -EADDRNOTAVAIL;
245
704e4c88
PR		 246 /* For BE VF, MAC address is already activated by PF.
247 * Hence only operation left is updating netdev->devaddr.
248 * Update it if user is passing the same MAC which was used
249 * during configuring VF MAC from PF(Hypervisor).
250 */
251 if (!lancer_chip(adapter) && !be_physfn(adapter)) {
252 status = be_cmd_mac_addr_query(adapter, current_mac,
253 false, adapter->if_handle, 0);
254 if (!status && !memcmp(current_mac, addr->sa_data, ETH_ALEN))
255 goto done;
256 else
257 goto err;
258 }
259
260 if (!memcmp(addr->sa_data, netdev->dev_addr, ETH_ALEN))
261 goto done;
262
263 /* For Lancer check if any MAC is active.
264 * If active, get its mac id.
265 */
266 if (lancer_chip(adapter) && !be_physfn(adapter))
267 be_cmd_get_mac_from_list(adapter, current_mac, &active_mac,
268 &pmac_id, 0);
269
270 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
271 adapter->if_handle,
272 &adapter->pmac_id[0], 0);
273
a65027e4 274 if (status)
e3a7ae2c 275 goto err;
6b7c5b94 276
704e4c88
PR		 277 if (active_mac)
278 be_cmd_pmac_del(adapter, adapter->if_handle,
279 pmac_id, 0);
280done:
e3a7ae2c
SK		 281 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
282 return 0;
283err:
284 dev_err(&adapter->pdev->dev, "MAC %pM set Failed\n", addr->sa_data);
6b7c5b94
SP		 285 return status;
286}
287
ca34fe38
SP		 288/* BE2 supports only v0 cmd */
289static void *hw_stats_from_cmd(struct be_adapter *adapter)
290{
291 if (BE2_chip(adapter)) {
292 struct be_cmd_resp_get_stats_v0 *cmd = adapter->stats_cmd.va;
293
294 return &cmd->hw_stats;
295 } else {
296 struct be_cmd_resp_get_stats_v1 *cmd = adapter->stats_cmd.va;
297
298 return &cmd->hw_stats;
299 }
300}
301
302/* BE2 supports only v0 cmd */
303static void *be_erx_stats_from_cmd(struct be_adapter *adapter)
304{
305 if (BE2_chip(adapter)) {
306 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
307
308 return &hw_stats->erx;
309 } else {
310 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
311
312 return &hw_stats->erx;
313 }
314}
315
316static void populate_be_v0_stats(struct be_adapter *adapter)
89a88ab8 317{
ac124ff9
SP		 318 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
319 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
320 struct be_rxf_stats_v0 *rxf_stats = &hw_stats->rxf;
89a88ab8 321 struct be_port_rxf_stats_v0 *port_stats =
ac124ff9
SP		 322 &rxf_stats->port[adapter->port_num];
323 struct be_drv_stats *drvs = &adapter->drv_stats;
89a88ab8 324
ac124ff9 325 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
89a88ab8
AK		 326 drvs->rx_pause_frames = port_stats->rx_pause_frames;
327 drvs->rx_crc_errors = port_stats->rx_crc_errors;
328 drvs->rx_control_frames = port_stats->rx_control_frames;
329 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
330 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
331 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
332 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
333 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
334 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
335 drvs->rxpp_fifo_overflow_drop = port_stats->rx_fifo_overflow;
336 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
337 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
338 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
339 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
ac124ff9 340 drvs->rx_input_fifo_overflow_drop = port_stats->rx_input_fifo_overflow;
89a88ab8
AK		 341 drvs->rx_dropped_header_too_small =
342 port_stats->rx_dropped_header_too_small;
d45b9d39
SP		 343 drvs->rx_address_mismatch_drops =
344 port_stats->rx_address_mismatch_drops +
345 port_stats->rx_vlan_mismatch_drops;
89a88ab8
AK		 346 drvs->rx_alignment_symbol_errors =
347 port_stats->rx_alignment_symbol_errors;
348
349 drvs->tx_pauseframes = port_stats->tx_pauseframes;
350 drvs->tx_controlframes = port_stats->tx_controlframes;
351
352 if (adapter->port_num)
ac124ff9 353 drvs->jabber_events = rxf_stats->port1_jabber_events;
89a88ab8 354 else
ac124ff9 355 drvs->jabber_events = rxf_stats->port0_jabber_events;
89a88ab8 356 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
89a88ab8 357 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
89a88ab8
AK		 358 drvs->forwarded_packets = rxf_stats->forwarded_packets;
359 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
ac124ff9
SP		 360 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
361 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
89a88ab8
AK		 362 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
363}
364
ca34fe38 365static void populate_be_v1_stats(struct be_adapter *adapter)
89a88ab8 366{
ac124ff9
SP		 367 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
368 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
369 struct be_rxf_stats_v1 *rxf_stats = &hw_stats->rxf;
89a88ab8 370 struct be_port_rxf_stats_v1 *port_stats =
ac124ff9
SP		 371 &rxf_stats->port[adapter->port_num];
372 struct be_drv_stats *drvs = &adapter->drv_stats;
89a88ab8 373
ac124ff9 374 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
02fe7027
AK		 375 drvs->pmem_fifo_overflow_drop = port_stats->pmem_fifo_overflow_drop;
376 drvs->rx_priority_pause_frames = port_stats->rx_priority_pause_frames;
89a88ab8
AK		 377 drvs->rx_pause_frames = port_stats->rx_pause_frames;
378 drvs->rx_crc_errors = port_stats->rx_crc_errors;
379 drvs->rx_control_frames = port_stats->rx_control_frames;
380 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
381 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
382 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
383 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
384 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
385 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
386 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
387 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
388 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
389 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
390 drvs->rx_dropped_header_too_small =
391 port_stats->rx_dropped_header_too_small;
392 drvs->rx_input_fifo_overflow_drop =
393 port_stats->rx_input_fifo_overflow_drop;
d45b9d39 394 drvs->rx_address_mismatch_drops = port_stats->rx_address_mismatch_drops;
89a88ab8
AK		 395 drvs->rx_alignment_symbol_errors =
396 port_stats->rx_alignment_symbol_errors;
ac124ff9 397 drvs->rxpp_fifo_overflow_drop = port_stats->rxpp_fifo_overflow_drop;
89a88ab8
AK		 398 drvs->tx_pauseframes = port_stats->tx_pauseframes;
399 drvs->tx_controlframes = port_stats->tx_controlframes;
400 drvs->jabber_events = port_stats->jabber_events;
401 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
89a88ab8 402 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
89a88ab8
AK		 403 drvs->forwarded_packets = rxf_stats->forwarded_packets;
404 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
ac124ff9
SP		 405 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
406 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
89a88ab8
AK		 407 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
408}
409
005d5696
SX		 410static void populate_lancer_stats(struct be_adapter *adapter)
411{
89a88ab8 412
005d5696 413 struct be_drv_stats *drvs = &adapter->drv_stats;
ac124ff9
SP		 414 struct lancer_pport_stats *pport_stats =
415 pport_stats_from_cmd(adapter);
416
417 be_dws_le_to_cpu(pport_stats, sizeof(*pport_stats));
418 drvs->rx_pause_frames = pport_stats->rx_pause_frames_lo;
419 drvs->rx_crc_errors = pport_stats->rx_crc_errors_lo;
420 drvs->rx_control_frames = pport_stats->rx_control_frames_lo;
005d5696 421 drvs->rx_in_range_errors = pport_stats->rx_in_range_errors;
ac124ff9 422 drvs->rx_frame_too_long = pport_stats->rx_frames_too_long_lo;
005d5696
SX		 423 drvs->rx_dropped_runt = pport_stats->rx_dropped_runt;
424 drvs->rx_ip_checksum_errs = pport_stats->rx_ip_checksum_errors;
425 drvs->rx_tcp_checksum_errs = pport_stats->rx_tcp_checksum_errors;
426 drvs->rx_udp_checksum_errs = pport_stats->rx_udp_checksum_errors;
427 drvs->rx_dropped_tcp_length =
428 pport_stats->rx_dropped_invalid_tcp_length;
429 drvs->rx_dropped_too_small = pport_stats->rx_dropped_too_small;
430 drvs->rx_dropped_too_short = pport_stats->rx_dropped_too_short;
431 drvs->rx_out_range_errors = pport_stats->rx_out_of_range_errors;
432 drvs->rx_dropped_header_too_small =
433 pport_stats->rx_dropped_header_too_small;
434 drvs->rx_input_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
d45b9d39
SP		 435 drvs->rx_address_mismatch_drops =
436 pport_stats->rx_address_mismatch_drops +
437 pport_stats->rx_vlan_mismatch_drops;
ac124ff9 438 drvs->rx_alignment_symbol_errors = pport_stats->rx_symbol_errors_lo;
005d5696 439 drvs->rxpp_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
ac124ff9
SP		 440 drvs->tx_pauseframes = pport_stats->tx_pause_frames_lo;
441 drvs->tx_controlframes = pport_stats->tx_control_frames_lo;
005d5696 442 drvs->jabber_events = pport_stats->rx_jabbers;
ac124ff9
SP		 443 drvs->forwarded_packets = pport_stats->num_forwards_lo;
444 drvs->rx_drops_mtu = pport_stats->rx_drops_mtu_lo;
005d5696 445 drvs->rx_drops_too_many_frags =
ac124ff9 446 pport_stats->rx_drops_too_many_frags_lo;
005d5696 447}
89a88ab8 448
09c1c68f
SP		 449static void accumulate_16bit_val(u32 *acc, u16 val)
450{
451#define lo(x) (x & 0xFFFF)
452#define hi(x) (x & 0xFFFF0000)
453 bool wrapped = val < lo(*acc);
454 u32 newacc = hi(*acc) + val;
455
456 if (wrapped)
457 newacc += 65536;
458 ACCESS_ONCE(*acc) = newacc;
459}
460
89a88ab8
AK		 461void be_parse_stats(struct be_adapter *adapter)
462{
ac124ff9
SP		 463 struct be_erx_stats_v1 *erx = be_erx_stats_from_cmd(adapter);
464 struct be_rx_obj *rxo;
465 int i;
466
ca34fe38
SP		 467 if (lancer_chip(adapter)) {
468 populate_lancer_stats(adapter);
005d5696 469 } else {
ca34fe38
SP		 470 if (BE2_chip(adapter))
471 populate_be_v0_stats(adapter);
472 else
473 /* for BE3 and Skyhawk */
474 populate_be_v1_stats(adapter);
d51ebd33 475
ca34fe38
SP		 476 /* as erx_v1 is longer than v0, ok to use v1 for v0 access */
477 for_all_rx_queues(adapter, rxo, i) {
478 /* below erx HW counter can actually wrap around after
479 * 65535. Driver accumulates a 32-bit value
480 */
481 accumulate_16bit_val(&rx_stats(rxo)->rx_drops_no_frags,
482 (u16)erx->rx_drops_no_fragments \
483 [rxo->q.id]);
484 }
09c1c68f 485 }
89a88ab8
AK		 486}
487
ab1594e9
SP		 488static struct rtnl_link_stats64 *be_get_stats64(struct net_device *netdev,
489 struct rtnl_link_stats64 *stats)
6b7c5b94 490{
ab1594e9 491 struct be_adapter *adapter = netdev_priv(netdev);
89a88ab8 492 struct be_drv_stats *drvs = &adapter->drv_stats;
3abcdeda 493 struct be_rx_obj *rxo;
3c8def97 494 struct be_tx_obj *txo;
ab1594e9
SP		 495 u64 pkts, bytes;
496 unsigned int start;
3abcdeda 497 int i;
6b7c5b94 498
3abcdeda 499 for_all_rx_queues(adapter, rxo, i) {
ab1594e9
SP		 500 const struct be_rx_stats *rx_stats = rx_stats(rxo);
501 do {
502 start = u64_stats_fetch_begin_bh(&rx_stats->sync);
503 pkts = rx_stats(rxo)->rx_pkts;
504 bytes = rx_stats(rxo)->rx_bytes;
505 } while (u64_stats_fetch_retry_bh(&rx_stats->sync, start));
506 stats->rx_packets += pkts;
507 stats->rx_bytes += bytes;
508 stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
509 stats->rx_dropped += rx_stats(rxo)->rx_drops_no_skbs +
510 rx_stats(rxo)->rx_drops_no_frags;
3abcdeda
SP		 511 }
512
3c8def97 513 for_all_tx_queues(adapter, txo, i) {
ab1594e9
SP		 514 const struct be_tx_stats *tx_stats = tx_stats(txo);
515 do {
516 start = u64_stats_fetch_begin_bh(&tx_stats->sync);
517 pkts = tx_stats(txo)->tx_pkts;
518 bytes = tx_stats(txo)->tx_bytes;
519 } while (u64_stats_fetch_retry_bh(&tx_stats->sync, start));
520 stats->tx_packets += pkts;
521 stats->tx_bytes += bytes;
3c8def97 522 }
6b7c5b94
SP		 523
524 /* bad pkts received */
ab1594e9 525 stats->rx_errors = drvs->rx_crc_errors +
89a88ab8
AK		 526 drvs->rx_alignment_symbol_errors +
527 drvs->rx_in_range_errors +
528 drvs->rx_out_range_errors +
529 drvs->rx_frame_too_long +
530 drvs->rx_dropped_too_small +
531 drvs->rx_dropped_too_short +
532 drvs->rx_dropped_header_too_small +
533 drvs->rx_dropped_tcp_length +
ab1594e9 534 drvs->rx_dropped_runt;
68110868 535
6b7c5b94 536 /* detailed rx errors */
ab1594e9 537 stats->rx_length_errors = drvs->rx_in_range_errors +
89a88ab8
AK		 538 drvs->rx_out_range_errors +
539 drvs->rx_frame_too_long;
68110868 540
ab1594e9 541 stats->rx_crc_errors = drvs->rx_crc_errors;
6b7c5b94
SP		 542
543 /* frame alignment errors */
ab1594e9 544 stats->rx_frame_errors = drvs->rx_alignment_symbol_errors;
68110868 545
6b7c5b94
SP		 546 /* receiver fifo overrun */
547 /* drops_no_pbuf is no per i/f, it's per BE card */
ab1594e9 548 stats->rx_fifo_errors = drvs->rxpp_fifo_overflow_drop +
89a88ab8
AK		 549 drvs->rx_input_fifo_overflow_drop +
550 drvs->rx_drops_no_pbuf;
ab1594e9 551 return stats;
6b7c5b94
SP		 552}
553
b236916a 554void be_link_status_update(struct be_adapter *adapter, u8 link_status)
6b7c5b94 555{
6b7c5b94
SP		 556 struct net_device *netdev = adapter->netdev;
557
b236916a 558 if (!(adapter->flags & BE_FLAGS_LINK_STATUS_INIT)) {
ea172a01 559 netif_carrier_off(netdev);
b236916a 560 adapter->flags |= BE_FLAGS_LINK_STATUS_INIT;
6b7c5b94 561 }
b236916a
AK		 562
563 if ((link_status & LINK_STATUS_MASK) == LINK_UP)
564 netif_carrier_on(netdev);
565 else
566 netif_carrier_off(netdev);
6b7c5b94
SP		 567}
568
3c8def97 569static void be_tx_stats_update(struct be_tx_obj *txo,
91992e44 570 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
6b7c5b94 571{
3c8def97
SP		 572 struct be_tx_stats *stats = tx_stats(txo);
573
ab1594e9 574 u64_stats_update_begin(&stats->sync);
ac124ff9
SP		 575 stats->tx_reqs++;
576 stats->tx_wrbs += wrb_cnt;
577 stats->tx_bytes += copied;
578 stats->tx_pkts += (gso_segs ? gso_segs : 1);
6b7c5b94 579 if (stopped)
ac124ff9 580 stats->tx_stops++;
ab1594e9 581 u64_stats_update_end(&stats->sync);
6b7c5b94
SP		 582}
583
584/* Determine number of WRB entries needed to xmit data in an skb */
fe6d2a38
SP		 585static u32 wrb_cnt_for_skb(struct be_adapter *adapter, struct sk_buff *skb,
586 bool *dummy)
6b7c5b94 587{
ebc8d2ab
DM		 588 int cnt = (skb->len > skb->data_len);
589
590 cnt += skb_shinfo(skb)->nr_frags;
591
6b7c5b94
SP		 592 /* to account for hdr wrb */
593 cnt++;
fe6d2a38
SP		 594 if (lancer_chip(adapter) || !(cnt & 1)) {
595 *dummy = false;
596 } else {
6b7c5b94
SP		 597 /* add a dummy to make it an even num */
598 cnt++;
599 *dummy = true;
fe6d2a38 600 }
6b7c5b94
SP		 601 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
602 return cnt;
603}
604
605static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
606{
607 wrb->frag_pa_hi = upper_32_bits(addr);
608 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
609 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
89b1f496 610 wrb->rsvd0 = 0;
6b7c5b94
SP		 611}
612
1ded132d
AK		 613static inline u16 be_get_tx_vlan_tag(struct be_adapter *adapter,
614 struct sk_buff *skb)
615{
616 u8 vlan_prio;
617 u16 vlan_tag;
618
619 vlan_tag = vlan_tx_tag_get(skb);
620 vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
621 /* If vlan priority provided by OS is NOT in available bmap */
622 if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
623 vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) |
624 adapter->recommended_prio;
625
626 return vlan_tag;
627}
628
93040ae5
SK		 629static int be_vlan_tag_chk(struct be_adapter *adapter, struct sk_buff *skb)
630{
631 return vlan_tx_tag_present(skb) || adapter->pvid;
632}
633
cc4ce020
SK		 634static void wrb_fill_hdr(struct be_adapter *adapter, struct be_eth_hdr_wrb *hdr,
635 struct sk_buff *skb, u32 wrb_cnt, u32 len)
6b7c5b94 636{
1ded132d 637 u16 vlan_tag;
cc4ce020 638
6b7c5b94
SP		 639 memset(hdr, 0, sizeof(*hdr));
640
641 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
642
49e4b847 643 if (skb_is_gso(skb)) {
6b7c5b94
SP		 644 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
645 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
646 hdr, skb_shinfo(skb)->gso_size);
fe6d2a38 647 if (skb_is_gso_v6(skb) && !lancer_chip(adapter))
49e4b847 648 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
6b7c5b94
SP		 649 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
650 if (is_tcp_pkt(skb))
651 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
652 else if (is_udp_pkt(skb))
653 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
654 }
655
4c5102f9 656 if (vlan_tx_tag_present(skb)) {
6b7c5b94 657 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
1ded132d 658 vlan_tag = be_get_tx_vlan_tag(adapter, skb);
cc4ce020 659 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, hdr, vlan_tag);
6b7c5b94
SP		 660 }
661
662 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
663 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
664 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
665 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
666}
667
2b7bcebf 668static void unmap_tx_frag(struct device *dev, struct be_eth_wrb *wrb,
7101e111
SP		 669 bool unmap_single)
670{
671 dma_addr_t dma;
672
673 be_dws_le_to_cpu(wrb, sizeof(*wrb));
674
675 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
b681ee77 676 if (wrb->frag_len) {
7101e111 677 if (unmap_single)
2b7bcebf
IV		 678 dma_unmap_single(dev, dma, wrb->frag_len,
679 DMA_TO_DEVICE);
7101e111 680 else
2b7bcebf 681 dma_unmap_page(dev, dma, wrb->frag_len, DMA_TO_DEVICE);
7101e111
SP		 682 }
683}
6b7c5b94 684
3c8def97 685static int make_tx_wrbs(struct be_adapter *adapter, struct be_queue_info *txq,
6b7c5b94
SP		 686 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
687{
7101e111
SP		 688 dma_addr_t busaddr;
689 int i, copied = 0;
2b7bcebf 690 struct device *dev = &adapter->pdev->dev;
6b7c5b94 691 struct sk_buff *first_skb = skb;
6b7c5b94
SP		 692 struct be_eth_wrb *wrb;
693 struct be_eth_hdr_wrb *hdr;
7101e111
SP		 694 bool map_single = false;
695 u16 map_head;
6b7c5b94 696
6b7c5b94
SP		 697 hdr = queue_head_node(txq);
698 queue_head_inc(txq);
7101e111 699 map_head = txq->head;
6b7c5b94 700
ebc8d2ab 701 if (skb->len > skb->data_len) {
e743d313 702 int len = skb_headlen(skb);
2b7bcebf
IV		 703 busaddr = dma_map_single(dev, skb->data, len, DMA_TO_DEVICE);
704 if (dma_mapping_error(dev, busaddr))
7101e111
SP		 705 goto dma_err;
706 map_single = true;
ebc8d2ab
DM		 707 wrb = queue_head_node(txq);
708 wrb_fill(wrb, busaddr, len);
709 be_dws_cpu_to_le(wrb, sizeof(*wrb));
710 queue_head_inc(txq);
711 copied += len;
712 }
6b7c5b94 713
ebc8d2ab 714 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
9e903e08 715 const struct skb_frag_struct *frag =
ebc8d2ab 716 &skb_shinfo(skb)->frags[i];
b061b39e 717 busaddr = skb_frag_dma_map(dev, frag, 0,
9e903e08 718 skb_frag_size(frag), DMA_TO_DEVICE);
2b7bcebf 719 if (dma_mapping_error(dev, busaddr))
7101e111 720 goto dma_err;
ebc8d2ab 721 wrb = queue_head_node(txq);
9e903e08 722 wrb_fill(wrb, busaddr, skb_frag_size(frag));
ebc8d2ab
DM		 723 be_dws_cpu_to_le(wrb, sizeof(*wrb));
724 queue_head_inc(txq);
9e903e08 725 copied += skb_frag_size(frag);
6b7c5b94
SP		 726 }
727
728 if (dummy_wrb) {
729 wrb = queue_head_node(txq);
730 wrb_fill(wrb, 0, 0);
731 be_dws_cpu_to_le(wrb, sizeof(*wrb));
732 queue_head_inc(txq);
733 }
734
cc4ce020 735 wrb_fill_hdr(adapter, hdr, first_skb, wrb_cnt, copied);
6b7c5b94
SP		 736 be_dws_cpu_to_le(hdr, sizeof(*hdr));
737
738 return copied;
7101e111
SP		 739dma_err:
740 txq->head = map_head;
741 while (copied) {
742 wrb = queue_head_node(txq);
2b7bcebf 743 unmap_tx_frag(dev, wrb, map_single);
7101e111
SP		 744 map_single = false;
745 copied -= wrb->frag_len;
746 queue_head_inc(txq);
747 }
748 return 0;
6b7c5b94
SP		 749}
750
93040ae5
SK		 751static struct sk_buff *be_insert_vlan_in_pkt(struct be_adapter *adapter,
752 struct sk_buff *skb)
753{
754 u16 vlan_tag = 0;
755
756 skb = skb_share_check(skb, GFP_ATOMIC);
757 if (unlikely(!skb))
758 return skb;
759
760 if (vlan_tx_tag_present(skb)) {
761 vlan_tag = be_get_tx_vlan_tag(adapter, skb);
762 __vlan_put_tag(skb, vlan_tag);
763 skb->vlan_tci = 0;
764 }
765
766 return skb;
767}
768
61357325 769static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 770 struct net_device *netdev)
6b7c5b94
SP		 771{
772 struct be_adapter *adapter = netdev_priv(netdev);
3c8def97
SP		 773 struct be_tx_obj *txo = &adapter->tx_obj[skb_get_queue_mapping(skb)];
774 struct be_queue_info *txq = &txo->q;
93040ae5 775 struct iphdr *ip = NULL;
6b7c5b94 776 u32 wrb_cnt = 0, copied = 0;
93040ae5 777 u32 start = txq->head, eth_hdr_len;
6b7c5b94
SP		 778 bool dummy_wrb, stopped = false;
779
93040ae5
SK		 780 eth_hdr_len = ntohs(skb->protocol) == ETH_P_8021Q ?
781 VLAN_ETH_HLEN : ETH_HLEN;
782
783 /* HW has a bug which considers padding bytes as legal
784 * and modifies the IPv4 hdr's 'tot_len' field
1ded132d 785 */
93040ae5
SK		 786 if (skb->len <= 60 && be_vlan_tag_chk(adapter, skb) &&
787 is_ipv4_pkt(skb)) {
788 ip = (struct iphdr *)ip_hdr(skb);
789 pskb_trim(skb, eth_hdr_len + ntohs(ip->tot_len));
790 }
1ded132d 791
93040ae5
SK		 792 /* HW has a bug wherein it will calculate CSUM for VLAN
793 * pkts even though it is disabled.
794 * Manually insert VLAN in pkt.
795 */
796 if (skb->ip_summed != CHECKSUM_PARTIAL &&
797 be_vlan_tag_chk(adapter, skb)) {
798 skb = be_insert_vlan_in_pkt(adapter, skb);
1ded132d
AK		 799 if (unlikely(!skb))
800 goto tx_drop;
1ded132d
AK		 801 }
802
fe6d2a38 803 wrb_cnt = wrb_cnt_for_skb(adapter, skb, &dummy_wrb);
6b7c5b94 804
3c8def97 805 copied = make_tx_wrbs(adapter, txq, skb, wrb_cnt, dummy_wrb);
c190e3c8 806 if (copied) {
cd8f76c0
ED		 807 int gso_segs = skb_shinfo(skb)->gso_segs;
808
c190e3c8 809 /* record the sent skb in the sent_skb table */
3c8def97
SP		 810 BUG_ON(txo->sent_skb_list[start]);
811 txo->sent_skb_list[start] = skb;
c190e3c8
AK		 812
813 /* Ensure txq has space for the next skb; Else stop the queue
814 * *BEFORE* ringing the tx doorbell, so that we serialze the
815 * tx compls of the current transmit which'll wake up the queue
816 */
7101e111 817 atomic_add(wrb_cnt, &txq->used);
c190e3c8
AK		 818 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
819 txq->len) {
3c8def97 820 netif_stop_subqueue(netdev, skb_get_queue_mapping(skb));
c190e3c8
AK		 821 stopped = true;
822 }
6b7c5b94 823
c190e3c8 824 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 825
cd8f76c0 826 be_tx_stats_update(txo, wrb_cnt, copied, gso_segs, stopped);
c190e3c8
AK		 827 } else {
828 txq->head = start;
829 dev_kfree_skb_any(skb);
6b7c5b94 830 }
1ded132d 831tx_drop:
6b7c5b94
SP		 832 return NETDEV_TX_OK;
833}
834
835static int be_change_mtu(struct net_device *netdev, int new_mtu)
836{
837 struct be_adapter *adapter = netdev_priv(netdev);
838 if (new_mtu < BE_MIN_MTU ||
34a89b8c
AK		 839 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
840 (ETH_HLEN + ETH_FCS_LEN))) {
6b7c5b94
SP		 841 dev_info(&adapter->pdev->dev,
842 "MTU must be between %d and %d bytes\n",
34a89b8c
AK		 843 BE_MIN_MTU,
844 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
6b7c5b94
SP		 845 return -EINVAL;
846 }
847 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
848 netdev->mtu, new_mtu);
849 netdev->mtu = new_mtu;
850 return 0;
851}
852
853/*
82903e4b
AK		 854 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
855 * If the user configures more, place BE in vlan promiscuous mode.
6b7c5b94 856 */
10329df8 857static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 858{
10329df8
SP		 859 u16 vids[BE_NUM_VLANS_SUPPORTED];
860 u16 num = 0, i;
82903e4b 861 int status = 0;
1da87b7f 862
c0e64ef4
SP		 863 /* No need to further configure vids if in promiscuous mode */
864 if (adapter->promiscuous)
865 return 0;
866
0fc16ebf
PR		 867 if (adapter->vlans_added > adapter->max_vlans)
868 goto set_vlan_promisc;
869
870 /* Construct VLAN Table to give to HW */
871 for (i = 0; i < VLAN_N_VID; i++)
872 if (adapter->vlan_tag[i])
10329df8 873 vids[num++] = cpu_to_le16(i);
0fc16ebf
PR		 874
875 status = be_cmd_vlan_config(adapter, adapter->if_handle,
10329df8 876 vids, num, 1, 0);
0fc16ebf
PR		 877
878 /* Set to VLAN promisc mode as setting VLAN filter failed */
879 if (status) {
880 dev_info(&adapter->pdev->dev, "Exhausted VLAN HW filters.\n");
881 dev_info(&adapter->pdev->dev, "Disabling HW VLAN filtering.\n");
882 goto set_vlan_promisc;
6b7c5b94 883 }
1da87b7f 884
b31c50a7 885 return status;
0fc16ebf
PR		 886
887set_vlan_promisc:
888 status = be_cmd_vlan_config(adapter, adapter->if_handle,
889 NULL, 0, 1, 1);
890 return status;
6b7c5b94
SP		 891}
892
8e586137 893static int be_vlan_add_vid(struct net_device *netdev, u16 vid)
6b7c5b94
SP		 894{
895 struct be_adapter *adapter = netdev_priv(netdev);
80817cbf 896 int status = 0;
6b7c5b94 897
a85e9986 898 if (!lancer_chip(adapter) && !be_physfn(adapter)) {
80817cbf
AK		 899 status = -EINVAL;
900 goto ret;
901 }
ba343c77 902
a85e9986
PR		 903 /* Packets with VID 0 are always received by Lancer by default */
904 if (lancer_chip(adapter) && vid == 0)
905 goto ret;
906
6b7c5b94 907 adapter->vlan_tag[vid] = 1;
82903e4b 908 if (adapter->vlans_added <= (adapter->max_vlans + 1))
10329df8 909 status = be_vid_config(adapter);
8e586137 910
80817cbf
AK		 911 if (!status)
912 adapter->vlans_added++;
913 else
914 adapter->vlan_tag[vid] = 0;
915ret:
916 return status;
6b7c5b94
SP		 917}
918
8e586137 919static int be_vlan_rem_vid(struct net_device *netdev, u16 vid)
6b7c5b94
SP		 920{
921 struct be_adapter *adapter = netdev_priv(netdev);
80817cbf 922 int status = 0;
6b7c5b94 923
a85e9986 924 if (!lancer_chip(adapter) && !be_physfn(adapter)) {
80817cbf
AK		 925 status = -EINVAL;
926 goto ret;
927 }
ba343c77 928
a85e9986
PR		 929 /* Packets with VID 0 are always received by Lancer by default */
930 if (lancer_chip(adapter) && vid == 0)
931 goto ret;
932
6b7c5b94 933 adapter->vlan_tag[vid] = 0;
82903e4b 934 if (adapter->vlans_added <= adapter->max_vlans)
10329df8 935 status = be_vid_config(adapter);
8e586137 936
80817cbf
AK		 937 if (!status)
938 adapter->vlans_added--;
939 else
940 adapter->vlan_tag[vid] = 1;
941ret:
942 return status;
6b7c5b94
SP		 943}
944
a54769f5 945static void be_set_rx_mode(struct net_device *netdev)
6b7c5b94
SP		 946{
947 struct be_adapter *adapter = netdev_priv(netdev);
0fc16ebf 948 int status;
6b7c5b94 949
24307eef 950 if (netdev->flags & IFF_PROMISC) {
5b8821b7 951 be_cmd_rx_filter(adapter, IFF_PROMISC, ON);
24307eef
SP		 952 adapter->promiscuous = true;
953 goto done;
6b7c5b94
SP		 954 }
955
25985edc 956 /* BE was previously in promiscuous mode; disable it */
24307eef
SP		 957 if (adapter->promiscuous) {
958 adapter->promiscuous = false;
5b8821b7 959 be_cmd_rx_filter(adapter, IFF_PROMISC, OFF);
c0e64ef4
SP		 960
961 if (adapter->vlans_added)
10329df8 962 be_vid_config(adapter);
6b7c5b94
SP		 963 }
964
e7b909a6 965 /* Enable multicast promisc if num configured exceeds what we support */
4cd24eaf 966 if (netdev->flags & IFF_ALLMULTI ||
abb93951 967 netdev_mc_count(netdev) > adapter->max_mcast_mac) {
5b8821b7 968 be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON);
24307eef 969 goto done;
6b7c5b94 970 }
6b7c5b94 971
fbc13f01
AK		 972 if (netdev_uc_count(netdev) != adapter->uc_macs) {
973 struct netdev_hw_addr *ha;
974 int i = 1; /* First slot is claimed by the Primary MAC */
975
976 for (; adapter->uc_macs > 0; adapter->uc_macs--, i++) {
977 be_cmd_pmac_del(adapter, adapter->if_handle,
978 adapter->pmac_id[i], 0);
979 }
980
981 if (netdev_uc_count(netdev) > adapter->max_pmac_cnt) {
982 be_cmd_rx_filter(adapter, IFF_PROMISC, ON);
983 adapter->promiscuous = true;
984 goto done;
985 }
986
987 netdev_for_each_uc_addr(ha, adapter->netdev) {
988 adapter->uc_macs++; /* First slot is for Primary MAC */
989 be_cmd_pmac_add(adapter, (u8 *)ha->addr,
990 adapter->if_handle,
991 &adapter->pmac_id[adapter->uc_macs], 0);
992 }
993 }
994
0fc16ebf
PR		 995 status = be_cmd_rx_filter(adapter, IFF_MULTICAST, ON);
996
997 /* Set to MCAST promisc mode if setting MULTICAST address fails */
998 if (status) {
999 dev_info(&adapter->pdev->dev, "Exhausted multicast HW filters.\n");
1000 dev_info(&adapter->pdev->dev, "Disabling HW multicast filtering.\n");
1001 be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON);
1002 }
24307eef
SP		 1003done:
1004 return;
6b7c5b94
SP		 1005}
1006
ba343c77
SB		 1007static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1008{
1009 struct be_adapter *adapter = netdev_priv(netdev);
11ac75ed 1010 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
ba343c77 1011 int status;
704e4c88
PR		 1012 bool active_mac = false;
1013 u32 pmac_id;
1014 u8 old_mac[ETH_ALEN];
ba343c77 1015
11ac75ed 1016 if (!sriov_enabled(adapter))
ba343c77
SB		 1017 return -EPERM;
1018
11ac75ed 1019 if (!is_valid_ether_addr(mac) || vf >= adapter->num_vfs)
ba343c77
SB		 1020 return -EINVAL;
1021
590c391d 1022 if (lancer_chip(adapter)) {
704e4c88
PR		 1023 status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac,
1024 &pmac_id, vf + 1);
1025 if (!status && active_mac)
1026 be_cmd_pmac_del(adapter, vf_cfg->if_handle,
1027 pmac_id, vf + 1);
1028
590c391d
PR		 1029 status = be_cmd_set_mac_list(adapter, mac, 1, vf + 1);
1030 } else {
11ac75ed
SP		 1031 status = be_cmd_pmac_del(adapter, vf_cfg->if_handle,
1032 vf_cfg->pmac_id, vf + 1);
ba343c77 1033
11ac75ed
SP		 1034 status = be_cmd_pmac_add(adapter, mac, vf_cfg->if_handle,
1035 &vf_cfg->pmac_id, vf + 1);
590c391d
PR		 1036 }
1037
64600ea5 1038 if (status)
ba343c77
SB		 1039 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
1040 mac, vf);
64600ea5 1041 else
11ac75ed 1042 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
64600ea5 1043
ba343c77
SB		 1044 return status;
1045}
1046
64600ea5
AK		 1047static int be_get_vf_config(struct net_device *netdev, int vf,
1048 struct ifla_vf_info *vi)
1049{
1050 struct be_adapter *adapter = netdev_priv(netdev);
11ac75ed 1051 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
64600ea5 1052
11ac75ed 1053 if (!sriov_enabled(adapter))
64600ea5
AK		 1054 return -EPERM;
1055
11ac75ed 1056 if (vf >= adapter->num_vfs)
64600ea5
AK		 1057 return -EINVAL;
1058
1059 vi->vf = vf;
11ac75ed
SP		 1060 vi->tx_rate = vf_cfg->tx_rate;
1061 vi->vlan = vf_cfg->vlan_tag;
64600ea5 1062 vi->qos = 0;
11ac75ed 1063 memcpy(&vi->mac, vf_cfg->mac_addr, ETH_ALEN);
64600ea5
AK		 1064
1065 return 0;
1066}
1067
1da87b7f
AK		 1068static int be_set_vf_vlan(struct net_device *netdev,
1069 int vf, u16 vlan, u8 qos)
1070{
1071 struct be_adapter *adapter = netdev_priv(netdev);
1072 int status = 0;
1073
11ac75ed 1074 if (!sriov_enabled(adapter))
1da87b7f
AK		 1075 return -EPERM;
1076
11ac75ed 1077 if (vf >= adapter->num_vfs || vlan > 4095)
1da87b7f
AK		 1078 return -EINVAL;
1079
1080 if (vlan) {
f1f3ee1b
AK		 1081 if (adapter->vf_cfg[vf].vlan_tag != vlan) {
1082 /* If this is new value, program it. Else skip. */
1083 adapter->vf_cfg[vf].vlan_tag = vlan;
1084
1085 status = be_cmd_set_hsw_config(adapter, vlan,
1086 vf + 1, adapter->vf_cfg[vf].if_handle);
1087 }
1da87b7f 1088 } else {
f1f3ee1b 1089 /* Reset Transparent Vlan Tagging. */
11ac75ed 1090 adapter->vf_cfg[vf].vlan_tag = 0;
f1f3ee1b
AK		 1091 vlan = adapter->vf_cfg[vf].def_vid;
1092 status = be_cmd_set_hsw_config(adapter, vlan, vf + 1,
1093 adapter->vf_cfg[vf].if_handle);
1da87b7f
AK		 1094 }
1095
1da87b7f
AK		 1096
1097 if (status)
1098 dev_info(&adapter->pdev->dev,
1099 "VLAN %d config on VF %d failed\n", vlan, vf);
1100 return status;
1101}
1102
e1d18735
AK		 1103static int be_set_vf_tx_rate(struct net_device *netdev,
1104 int vf, int rate)
1105{
1106 struct be_adapter *adapter = netdev_priv(netdev);
1107 int status = 0;
1108
11ac75ed 1109 if (!sriov_enabled(adapter))
e1d18735
AK		 1110 return -EPERM;
1111
94f434c2 1112 if (vf >= adapter->num_vfs)
e1d18735
AK		 1113 return -EINVAL;
1114
94f434c2
AK		 1115 if (rate < 100 || rate > 10000) {
1116 dev_err(&adapter->pdev->dev,
1117 "tx rate must be between 100 and 10000 Mbps\n");
1118 return -EINVAL;
1119 }
e1d18735 1120
d5c18473
PR		 1121 if (lancer_chip(adapter))
1122 status = be_cmd_set_profile_config(adapter, rate / 10, vf + 1);
1123 else
1124 status = be_cmd_set_qos(adapter, rate / 10, vf + 1);
e1d18735
AK		 1125
1126 if (status)
94f434c2 1127 dev_err(&adapter->pdev->dev,
e1d18735 1128 "tx rate %d on VF %d failed\n", rate, vf);
94f434c2
AK		 1129 else
1130 adapter->vf_cfg[vf].tx_rate = rate;
e1d18735
AK		 1131 return status;
1132}
1133
39f1d94d
SP		 1134static int be_find_vfs(struct be_adapter *adapter, int vf_state)
1135{
1136 struct pci_dev *dev, *pdev = adapter->pdev;
2f6a0260 1137 int vfs = 0, assigned_vfs = 0, pos;
39f1d94d
SP		 1138 u16 offset, stride;
1139
1140 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
d79c0a20
SP		 1141 if (!pos)
1142 return 0;
39f1d94d
SP		 1143 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_OFFSET, &offset);
1144 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_STRIDE, &stride);
1145
1146 dev = pci_get_device(pdev->vendor, PCI_ANY_ID, NULL);
1147 while (dev) {
2f6a0260 1148 if (dev->is_virtfn && pci_physfn(dev) == pdev) {
39f1d94d
SP		 1149 vfs++;
1150 if (dev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
1151 assigned_vfs++;
1152 }
1153 dev = pci_get_device(pdev->vendor, PCI_ANY_ID, dev);
1154 }
1155 return (vf_state == ASSIGNED) ? assigned_vfs : vfs;
1156}
1157
10ef9ab4 1158static void be_eqd_update(struct be_adapter *adapter, struct be_eq_obj *eqo)
6b7c5b94 1159{
10ef9ab4 1160 struct be_rx_stats *stats = rx_stats(&adapter->rx_obj[eqo->idx]);
4097f663 1161 ulong now = jiffies;
ac124ff9 1162 ulong delta = now - stats->rx_jiffies;
ab1594e9
SP		 1163 u64 pkts;
1164 unsigned int start, eqd;
ac124ff9 1165
10ef9ab4
SP		 1166 if (!eqo->enable_aic) {
1167 eqd = eqo->eqd;
1168 goto modify_eqd;
1169 }
1170
1171 if (eqo->idx >= adapter->num_rx_qs)
ac124ff9 1172 return;
6b7c5b94 1173
10ef9ab4
SP		 1174 stats = rx_stats(&adapter->rx_obj[eqo->idx]);
1175
4097f663 1176 /* Wrapped around */
3abcdeda
SP		 1177 if (time_before(now, stats->rx_jiffies)) {
1178 stats->rx_jiffies = now;
4097f663
SP		 1179 return;
1180 }
6b7c5b94 1181
ac124ff9
SP		 1182 /* Update once a second */
1183 if (delta < HZ)
6b7c5b94
SP		 1184 return;
1185
ab1594e9
SP		 1186 do {
1187 start = u64_stats_fetch_begin_bh(&stats->sync);
1188 pkts = stats->rx_pkts;
1189 } while (u64_stats_fetch_retry_bh(&stats->sync, start));
1190
68c3e5a7 1191 stats->rx_pps = (unsigned long)(pkts - stats->rx_pkts_prev) / (delta / HZ);
ab1594e9 1192 stats->rx_pkts_prev = pkts;
3abcdeda 1193 stats->rx_jiffies = now;
10ef9ab4
SP		 1194 eqd = (stats->rx_pps / 110000) << 3;
1195 eqd = min(eqd, eqo->max_eqd);
1196 eqd = max(eqd, eqo->min_eqd);
ac124ff9
SP		 1197 if (eqd < 10)
1198 eqd = 0;
10ef9ab4
SP		 1199
1200modify_eqd:
1201 if (eqd != eqo->cur_eqd) {
1202 be_cmd_modify_eqd(adapter, eqo->q.id, eqd);
1203 eqo->cur_eqd = eqd;
ac124ff9 1204 }
6b7c5b94
SP		 1205}
1206
3abcdeda 1207static void be_rx_stats_update(struct be_rx_obj *rxo,
2e588f84 1208 struct be_rx_compl_info *rxcp)
4097f663 1209{
ac124ff9 1210 struct be_rx_stats *stats = rx_stats(rxo);
1ef78abe 1211
ab1594e9 1212 u64_stats_update_begin(&stats->sync);
3abcdeda 1213 stats->rx_compl++;
2e588f84 1214 stats->rx_bytes += rxcp->pkt_size;
3abcdeda 1215 stats->rx_pkts++;
2e588f84 1216 if (rxcp->pkt_type == BE_MULTICAST_PACKET)
3abcdeda 1217 stats->rx_mcast_pkts++;
2e588f84 1218 if (rxcp->err)
ac124ff9 1219 stats->rx_compl_err++;
ab1594e9 1220 u64_stats_update_end(&stats->sync);
4097f663
SP		 1221}
1222
2e588f84 1223static inline bool csum_passed(struct be_rx_compl_info *rxcp)
728a9972 1224{
19fad86f
PR		 1225 /* L4 checksum is not reliable for non TCP/UDP packets.
1226 * Also ignore ipcksm for ipv6 pkts */
2e588f84
SP		 1227 return (rxcp->tcpf || rxcp->udpf) && rxcp->l4_csum &&
1228 (rxcp->ip_csum || rxcp->ipv6);
728a9972
AK		 1229}
1230
10ef9ab4
SP		 1231static struct be_rx_page_info *get_rx_page_info(struct be_rx_obj *rxo,
1232 u16 frag_idx)
6b7c5b94 1233{
10ef9ab4 1234 struct be_adapter *adapter = rxo->adapter;
6b7c5b94 1235 struct be_rx_page_info *rx_page_info;
3abcdeda 1236 struct be_queue_info *rxq = &rxo->q;
6b7c5b94 1237
3abcdeda 1238 rx_page_info = &rxo->page_info_tbl[frag_idx];
6b7c5b94
SP		 1239 BUG_ON(!rx_page_info->page);
1240
205859a2 1241 if (rx_page_info->last_page_user) {
2b7bcebf
IV		 1242 dma_unmap_page(&adapter->pdev->dev,
1243 dma_unmap_addr(rx_page_info, bus),
1244 adapter->big_page_size, DMA_FROM_DEVICE);
205859a2
AK		 1245 rx_page_info->last_page_user = false;
1246 }
6b7c5b94
SP		 1247
1248 atomic_dec(&rxq->used);
1249 return rx_page_info;
1250}
1251
1252/* Throwaway the data in the Rx completion */
10ef9ab4
SP		 1253static void be_rx_compl_discard(struct be_rx_obj *rxo,
1254 struct be_rx_compl_info *rxcp)
6b7c5b94 1255{
3abcdeda 1256 struct be_queue_info *rxq = &rxo->q;
6b7c5b94 1257 struct be_rx_page_info *page_info;
2e588f84 1258 u16 i, num_rcvd = rxcp->num_rcvd;
6b7c5b94 1259
e80d9da6 1260 for (i = 0; i < num_rcvd; i++) {
10ef9ab4 1261 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
e80d9da6
PR		 1262 put_page(page_info->page);
1263 memset(page_info, 0, sizeof(*page_info));
2e588f84 1264 index_inc(&rxcp->rxq_idx, rxq->len);
6b7c5b94
SP		 1265 }
1266}
1267
1268/*
1269 * skb_fill_rx_data forms a complete skb for an ether frame
1270 * indicated by rxcp.
1271 */
10ef9ab4
SP		 1272static void skb_fill_rx_data(struct be_rx_obj *rxo, struct sk_buff *skb,
1273 struct be_rx_compl_info *rxcp)
6b7c5b94 1274{
3abcdeda 1275 struct be_queue_info *rxq = &rxo->q;
6b7c5b94 1276 struct be_rx_page_info *page_info;
2e588f84
SP		 1277 u16 i, j;
1278 u16 hdr_len, curr_frag_len, remaining;
6b7c5b94 1279 u8 *start;
6b7c5b94 1280
10ef9ab4 1281 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
6b7c5b94
SP		 1282 start = page_address(page_info->page) + page_info->page_offset;
1283 prefetch(start);
1284
1285 /* Copy data in the first descriptor of this completion */
2e588f84 1286 curr_frag_len = min(rxcp->pkt_size, rx_frag_size);
6b7c5b94 1287
6b7c5b94
SP		 1288 skb->len = curr_frag_len;
1289 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
ac1ae5f3 1290 memcpy(skb->data, start, curr_frag_len);
6b7c5b94
SP		 1291 /* Complete packet has now been moved to data */
1292 put_page(page_info->page);
1293 skb->data_len = 0;
1294 skb->tail += curr_frag_len;
1295 } else {
ac1ae5f3
ED		 1296 hdr_len = ETH_HLEN;
1297 memcpy(skb->data, start, hdr_len);
6b7c5b94 1298 skb_shinfo(skb)->nr_frags = 1;
b061b39e 1299 skb_frag_set_page(skb, 0, page_info->page);
6b7c5b94
SP		 1300 skb_shinfo(skb)->frags[0].page_offset =
1301 page_info->page_offset + hdr_len;
9e903e08 1302 skb_frag_size_set(&skb_shinfo(skb)->frags[0], curr_frag_len - hdr_len);
6b7c5b94 1303 skb->data_len = curr_frag_len - hdr_len;
bdb28a97 1304 skb->truesize += rx_frag_size;
6b7c5b94
SP		 1305 skb->tail += hdr_len;
1306 }
205859a2 1307 page_info->page = NULL;
6b7c5b94 1308
2e588f84
SP		 1309 if (rxcp->pkt_size <= rx_frag_size) {
1310 BUG_ON(rxcp->num_rcvd != 1);
1311 return;
6b7c5b94
SP		 1312 }
1313
1314 /* More frags present for this completion */
2e588f84
SP		 1315 index_inc(&rxcp->rxq_idx, rxq->len);
1316 remaining = rxcp->pkt_size - curr_frag_len;
1317 for (i = 1, j = 0; i < rxcp->num_rcvd; i++) {
10ef9ab4 1318 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
2e588f84 1319 curr_frag_len = min(remaining, rx_frag_size);
6b7c5b94 1320
bd46cb6c
AK		 1321 /* Coalesce all frags from the same physical page in one slot */
1322 if (page_info->page_offset == 0) {
1323 /* Fresh page */
1324 j++;
b061b39e 1325 skb_frag_set_page(skb, j, page_info->page);
bd46cb6c
AK		 1326 skb_shinfo(skb)->frags[j].page_offset =
1327 page_info->page_offset;
9e903e08 1328 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
bd46cb6c
AK		 1329 skb_shinfo(skb)->nr_frags++;
1330 } else {
1331 put_page(page_info->page);
1332 }
1333
9e903e08 1334 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
6b7c5b94
SP		 1335 skb->len += curr_frag_len;
1336 skb->data_len += curr_frag_len;
bdb28a97 1337 skb->truesize += rx_frag_size;
2e588f84
SP		 1338 remaining -= curr_frag_len;
1339 index_inc(&rxcp->rxq_idx, rxq->len);
205859a2 1340 page_info->page = NULL;
6b7c5b94 1341 }
bd46cb6c 1342 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94
SP		 1343}
1344
5be93b9a 1345/* Process the RX completion indicated by rxcp when GRO is disabled */
10ef9ab4
SP		 1346static void be_rx_compl_process(struct be_rx_obj *rxo,
1347 struct be_rx_compl_info *rxcp)
6b7c5b94 1348{
10ef9ab4 1349 struct be_adapter *adapter = rxo->adapter;
6332c8d3 1350 struct net_device *netdev = adapter->netdev;
6b7c5b94 1351 struct sk_buff *skb;
89420424 1352
bb349bb4 1353 skb = netdev_alloc_skb_ip_align(netdev, BE_RX_SKB_ALLOC_SIZE);
a058a632 1354 if (unlikely(!skb)) {
ac124ff9 1355 rx_stats(rxo)->rx_drops_no_skbs++;
10ef9ab4 1356 be_rx_compl_discard(rxo, rxcp);
6b7c5b94
SP		 1357 return;
1358 }
1359
10ef9ab4 1360 skb_fill_rx_data(rxo, skb, rxcp);
6b7c5b94 1361
6332c8d3 1362 if (likely((netdev->features & NETIF_F_RXCSUM) && csum_passed(rxcp)))
728a9972 1363 skb->ip_summed = CHECKSUM_UNNECESSARY;
c6ce2f4b
SK		 1364 else
1365 skb_checksum_none_assert(skb);
6b7c5b94 1366
6332c8d3 1367 skb->protocol = eth_type_trans(skb, netdev);
aaa6daec 1368 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
10ef9ab4 1369 if (netdev->features & NETIF_F_RXHASH)
4b972914
AK		 1370 skb->rxhash = rxcp->rss_hash;
1371
6b7c5b94 1372
343e43c0 1373 if (rxcp->vlanf)
4c5102f9
AK		 1374 __vlan_hwaccel_put_tag(skb, rxcp->vlan_tag);
1375
1376 netif_receive_skb(skb);
6b7c5b94
SP		 1377}
1378
5be93b9a 1379/* Process the RX completion indicated by rxcp when GRO is enabled */
10ef9ab4
SP		 1380void be_rx_compl_process_gro(struct be_rx_obj *rxo, struct napi_struct *napi,
1381 struct be_rx_compl_info *rxcp)
6b7c5b94 1382{
10ef9ab4 1383 struct be_adapter *adapter = rxo->adapter;
6b7c5b94 1384 struct be_rx_page_info *page_info;
5be93b9a 1385 struct sk_buff *skb = NULL;
3abcdeda 1386 struct be_queue_info *rxq = &rxo->q;
2e588f84
SP		 1387 u16 remaining, curr_frag_len;
1388 u16 i, j;
3968fa1e 1389
10ef9ab4 1390 skb = napi_get_frags(napi);
5be93b9a 1391 if (!skb) {
10ef9ab4 1392 be_rx_compl_discard(rxo, rxcp);
5be93b9a
AK		 1393 return;
1394 }
1395
2e588f84
SP		 1396 remaining = rxcp->pkt_size;
1397 for (i = 0, j = -1; i < rxcp->num_rcvd; i++) {
10ef9ab4 1398 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
6b7c5b94
SP		 1399
1400 curr_frag_len = min(remaining, rx_frag_size);
1401
bd46cb6c
AK		 1402 /* Coalesce all frags from the same physical page in one slot */
1403 if (i == 0 || page_info->page_offset == 0) {
1404 /* First frag or Fresh page */
1405 j++;
b061b39e 1406 skb_frag_set_page(skb, j, page_info->page);
5be93b9a
AK		 1407 skb_shinfo(skb)->frags[j].page_offset =
1408 page_info->page_offset;
9e903e08 1409 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
bd46cb6c
AK		 1410 } else {
1411 put_page(page_info->page);
1412 }
9e903e08 1413 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
bdb28a97 1414 skb->truesize += rx_frag_size;
bd46cb6c 1415 remaining -= curr_frag_len;
2e588f84 1416 index_inc(&rxcp->rxq_idx, rxq->len);
6b7c5b94
SP		 1417 memset(page_info, 0, sizeof(*page_info));
1418 }
bd46cb6c 1419 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 1420
5be93b9a 1421 skb_shinfo(skb)->nr_frags = j + 1;
2e588f84
SP		 1422 skb->len = rxcp->pkt_size;
1423 skb->data_len = rxcp->pkt_size;
5be93b9a 1424 skb->ip_summed = CHECKSUM_UNNECESSARY;
aaa6daec 1425 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
4b972914
AK		 1426 if (adapter->netdev->features & NETIF_F_RXHASH)
1427 skb->rxhash = rxcp->rss_hash;
5be93b9a 1428
343e43c0 1429 if (rxcp->vlanf)
4c5102f9
AK		 1430 __vlan_hwaccel_put_tag(skb, rxcp->vlan_tag);
1431
10ef9ab4 1432 napi_gro_frags(napi);
2e588f84
SP		 1433}
1434
10ef9ab4
SP		 1435static void be_parse_rx_compl_v1(struct be_eth_rx_compl *compl,
1436 struct be_rx_compl_info *rxcp)
2e588f84
SP		 1437{
1438 rxcp->pkt_size =
1439 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, pktsize, compl);
1440 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtp, compl);
1441 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, err, compl);
1442 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, tcpf, compl);
9ecb42fd 1443 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, udpf, compl);
2e588f84
SP		 1444 rxcp->ip_csum =
1445 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ipcksm, compl);
1446 rxcp->l4_csum =
1447 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, l4_cksm, compl);
1448 rxcp->ipv6 =
1449 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ip_version, compl);
1450 rxcp->rxq_idx =
1451 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, fragndx, compl);
1452 rxcp->num_rcvd =
1453 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, numfrags, compl);
1454 rxcp->pkt_type =
1455 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, cast_enc, compl);
4b972914 1456 rxcp->rss_hash =
c297977e 1457 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, rsshash, compl);
15d72184
SP		 1458 if (rxcp->vlanf) {
1459 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtm,
3c709f8f
DM		 1460 compl);
1461 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vlan_tag,
1462 compl);
15d72184 1463 }
12004ae9 1464 rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, port, compl);
2e588f84
SP		 1465}
1466
10ef9ab4
SP		 1467static void be_parse_rx_compl_v0(struct be_eth_rx_compl *compl,
1468 struct be_rx_compl_info *rxcp)
2e588f84
SP		 1469{
1470 rxcp->pkt_size =
1471 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, pktsize, compl);
1472 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtp, compl);
1473 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, err, compl);
1474 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, tcpf, compl);
9ecb42fd 1475 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, udpf, compl);
2e588f84
SP		 1476 rxcp->ip_csum =
1477 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ipcksm, compl);
1478 rxcp->l4_csum =
1479 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, l4_cksm, compl);
1480 rxcp->ipv6 =
1481 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ip_version, compl);
1482 rxcp->rxq_idx =
1483 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, fragndx, compl);
1484 rxcp->num_rcvd =
1485 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, numfrags, compl);
1486 rxcp->pkt_type =
1487 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, cast_enc, compl);
4b972914 1488 rxcp->rss_hash =
c297977e 1489 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, rsshash, compl);
15d72184
SP		 1490 if (rxcp->vlanf) {
1491 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtm,
3c709f8f
DM		 1492 compl);
1493 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vlan_tag,
1494 compl);
15d72184 1495 }
12004ae9 1496 rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, port, compl);
2e588f84
SP		 1497}
1498
1499static struct be_rx_compl_info *be_rx_compl_get(struct be_rx_obj *rxo)
1500{
1501 struct be_eth_rx_compl *compl = queue_tail_node(&rxo->cq);
1502 struct be_rx_compl_info *rxcp = &rxo->rxcp;
1503 struct be_adapter *adapter = rxo->adapter;
6b7c5b94 1504
2e588f84
SP		 1505 /* For checking the valid bit it is Ok to use either definition as the
1506 * valid bit is at the same position in both v0 and v1 Rx compl */
1507 if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0)
1508 return NULL;
6b7c5b94 1509
2e588f84
SP		 1510 rmb();
1511 be_dws_le_to_cpu(compl, sizeof(*compl));
6b7c5b94 1512
2e588f84 1513 if (adapter->be3_native)
10ef9ab4 1514 be_parse_rx_compl_v1(compl, rxcp);
2e588f84 1515 else
10ef9ab4 1516 be_parse_rx_compl_v0(compl, rxcp);
6b7c5b94 1517
15d72184
SP		 1518 if (rxcp->vlanf) {
1519 /* vlanf could be wrongly set in some cards.
1520 * ignore if vtm is not set */
752961a1 1521 if ((adapter->function_mode & FLEX10_MODE) && !rxcp->vtm)
15d72184 1522 rxcp->vlanf = 0;
6b7c5b94 1523
15d72184 1524 if (!lancer_chip(adapter))
3c709f8f 1525 rxcp->vlan_tag = swab16(rxcp->vlan_tag);
6b7c5b94 1526
939cf306 1527 if (adapter->pvid == (rxcp->vlan_tag & VLAN_VID_MASK) &&
3c709f8f 1528 !adapter->vlan_tag[rxcp->vlan_tag])
15d72184
SP		 1529 rxcp->vlanf = 0;
1530 }
2e588f84
SP		 1531
1532 /* As the compl has been parsed, reset it; we wont touch it again */
1533 compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0;
6b7c5b94 1534
3abcdeda 1535 queue_tail_inc(&rxo->cq);
6b7c5b94
SP		 1536 return rxcp;
1537}
1538
1829b086 1539static inline struct page *be_alloc_pages(u32 size, gfp_t gfp)
6b7c5b94 1540{
6b7c5b94 1541 u32 order = get_order(size);
1829b086 1542
6b7c5b94 1543 if (order > 0)
1829b086
ED		 1544 gfp |= __GFP_COMP;
1545 return alloc_pages(gfp, order);
6b7c5b94
SP		 1546}
1547
1548/*
1549 * Allocate a page, split it to fragments of size rx_frag_size and post as
1550 * receive buffers to BE
1551 */
1829b086 1552static void be_post_rx_frags(struct be_rx_obj *rxo, gfp_t gfp)
6b7c5b94 1553{
3abcdeda 1554 struct be_adapter *adapter = rxo->adapter;
26d92f92 1555 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
3abcdeda 1556 struct be_queue_info *rxq = &rxo->q;
6b7c5b94
SP		 1557 struct page *pagep = NULL;
1558 struct be_eth_rx_d *rxd;
1559 u64 page_dmaaddr = 0, frag_dmaaddr;
1560 u32 posted, page_offset = 0;
1561
3abcdeda 1562 page_info = &rxo->page_info_tbl[rxq->head];
6b7c5b94
SP		 1563 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1564 if (!pagep) {
1829b086 1565 pagep = be_alloc_pages(adapter->big_page_size, gfp);
6b7c5b94 1566 if (unlikely(!pagep)) {
ac124ff9 1567 rx_stats(rxo)->rx_post_fail++;
6b7c5b94
SP		 1568 break;
1569 }
2b7bcebf
IV		 1570 page_dmaaddr = dma_map_page(&adapter->pdev->dev, pagep,
1571 0, adapter->big_page_size,
1572 DMA_FROM_DEVICE);
6b7c5b94
SP		 1573 page_info->page_offset = 0;
1574 } else {
1575 get_page(pagep);
1576 page_info->page_offset = page_offset + rx_frag_size;
1577 }
1578 page_offset = page_info->page_offset;
1579 page_info->page = pagep;
fac6da5b 1580 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
6b7c5b94
SP		 1581 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1582
1583 rxd = queue_head_node(rxq);
1584 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1585 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
6b7c5b94
SP		 1586
1587 /* Any space left in the current big page for another frag? */
1588 if ((page_offset + rx_frag_size + rx_frag_size) >
1589 adapter->big_page_size) {
1590 pagep = NULL;
1591 page_info->last_page_user = true;
1592 }
26d92f92
SP		 1593
1594 prev_page_info = page_info;
1595 queue_head_inc(rxq);
10ef9ab4 1596 page_info = &rxo->page_info_tbl[rxq->head];
6b7c5b94
SP		 1597 }
1598 if (pagep)
26d92f92 1599 prev_page_info->last_page_user = true;
6b7c5b94
SP		 1600
1601 if (posted) {
6b7c5b94 1602 atomic_add(posted, &rxq->used);
8788fdc2 1603 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 1604 } else if (atomic_read(&rxq->used) == 0) {
1605 /* Let be_worker replenish when memory is available */
3abcdeda 1606 rxo->rx_post_starved = true;
6b7c5b94 1607 }
6b7c5b94
SP		 1608}
1609
5fb379ee 1610static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 1611{
6b7c5b94
SP		 1612 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1613
1614 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1615 return NULL;
1616
f3eb62d2 1617 rmb();
6b7c5b94
SP		 1618 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1619
1620 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1621
1622 queue_tail_inc(tx_cq);
1623 return txcp;
1624}
1625
3c8def97
SP		 1626static u16 be_tx_compl_process(struct be_adapter *adapter,
1627 struct be_tx_obj *txo, u16 last_index)
6b7c5b94 1628{
3c8def97 1629 struct be_queue_info *txq = &txo->q;
a73b796e 1630 struct be_eth_wrb *wrb;
3c8def97 1631 struct sk_buff **sent_skbs = txo->sent_skb_list;
6b7c5b94 1632 struct sk_buff *sent_skb;
ec43b1a6
SP		 1633 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1634 bool unmap_skb_hdr = true;
6b7c5b94 1635
ec43b1a6 1636 sent_skb = sent_skbs[txq->tail];
6b7c5b94 1637 BUG_ON(!sent_skb);
ec43b1a6
SP		 1638 sent_skbs[txq->tail] = NULL;
1639
1640 /* skip header wrb */
a73b796e 1641 queue_tail_inc(txq);
6b7c5b94 1642
ec43b1a6 1643 do {
6b7c5b94 1644 cur_index = txq->tail;
a73b796e 1645 wrb = queue_tail_node(txq);
2b7bcebf
IV		 1646 unmap_tx_frag(&adapter->pdev->dev, wrb,
1647 (unmap_skb_hdr && skb_headlen(sent_skb)));
ec43b1a6
SP		 1648 unmap_skb_hdr = false;
1649
6b7c5b94
SP		 1650 num_wrbs++;
1651 queue_tail_inc(txq);
ec43b1a6 1652 } while (cur_index != last_index);
6b7c5b94 1653
6b7c5b94 1654 kfree_skb(sent_skb);
4d586b82 1655 return num_wrbs;
6b7c5b94
SP		 1656}
1657
10ef9ab4
SP		 1658/* Return the number of events in the event queue */
1659static inline int events_get(struct be_eq_obj *eqo)
859b1e4e 1660{
10ef9ab4
SP		 1661 struct be_eq_entry *eqe;
1662 int num = 0;
859b1e4e 1663
10ef9ab4
SP		 1664 do {
1665 eqe = queue_tail_node(&eqo->q);
1666 if (eqe->evt == 0)
1667 break;
859b1e4e 1668
10ef9ab4
SP		 1669 rmb();
1670 eqe->evt = 0;
1671 num++;
1672 queue_tail_inc(&eqo->q);
1673 } while (true);
1674
1675 return num;
859b1e4e
SP		 1676}
1677
10ef9ab4 1678static int event_handle(struct be_eq_obj *eqo)
859b1e4e 1679{
10ef9ab4
SP		 1680 bool rearm = false;
1681 int num = events_get(eqo);
859b1e4e 1682
10ef9ab4 1683 /* Deal with any spurious interrupts that come without events */
3c8def97
SP		 1684 if (!num)
1685 rearm = true;
1686
af311fe3
PR		 1687 if (num || msix_enabled(eqo->adapter))
1688 be_eq_notify(eqo->adapter, eqo->q.id, rearm, true, num);
1689
859b1e4e 1690 if (num)
10ef9ab4 1691 napi_schedule(&eqo->napi);
859b1e4e
SP		 1692
1693 return num;
1694}
1695
10ef9ab4
SP		 1696/* Leaves the EQ is disarmed state */
1697static void be_eq_clean(struct be_eq_obj *eqo)
859b1e4e 1698{
10ef9ab4 1699 int num = events_get(eqo);
859b1e4e 1700
10ef9ab4 1701 be_eq_notify(eqo->adapter, eqo->q.id, false, true, num);
859b1e4e
SP		 1702}
1703
10ef9ab4 1704static void be_rx_cq_clean(struct be_rx_obj *rxo)
6b7c5b94
SP		 1705{
1706 struct be_rx_page_info *page_info;
3abcdeda
SP		 1707 struct be_queue_info *rxq = &rxo->q;
1708 struct be_queue_info *rx_cq = &rxo->cq;
2e588f84 1709 struct be_rx_compl_info *rxcp;
6b7c5b94
SP		 1710 u16 tail;
1711
1712 /* First cleanup pending rx completions */
3abcdeda 1713 while ((rxcp = be_rx_compl_get(rxo)) != NULL) {
10ef9ab4
SP		 1714 be_rx_compl_discard(rxo, rxcp);
1715 be_cq_notify(rxo->adapter, rx_cq->id, false, 1);
6b7c5b94
SP		 1716 }
1717
1718 /* Then free posted rx buffer that were not used */
1719 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1720 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
10ef9ab4 1721 page_info = get_rx_page_info(rxo, tail);
6b7c5b94
SP		 1722 put_page(page_info->page);
1723 memset(page_info, 0, sizeof(*page_info));
1724 }
1725 BUG_ON(atomic_read(&rxq->used));
482c9e79 1726 rxq->tail = rxq->head = 0;
6b7c5b94
SP		 1727}
1728
0ae57bb3 1729static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1730{
0ae57bb3
SP		 1731 struct be_tx_obj *txo;
1732 struct be_queue_info *txq;
a8e9179a 1733 struct be_eth_tx_compl *txcp;
4d586b82 1734 u16 end_idx, cmpl = 0, timeo = 0, num_wrbs = 0;
b03388d6
SP		 1735 struct sk_buff *sent_skb;
1736 bool dummy_wrb;
0ae57bb3 1737 int i, pending_txqs;
a8e9179a
SP		 1738
1739 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1740 do {
0ae57bb3
SP		 1741 pending_txqs = adapter->num_tx_qs;
1742
1743 for_all_tx_queues(adapter, txo, i) {
1744 txq = &txo->q;
1745 while ((txcp = be_tx_compl_get(&txo->cq))) {
1746 end_idx =
1747 AMAP_GET_BITS(struct amap_eth_tx_compl,
1748 wrb_index, txcp);
1749 num_wrbs += be_tx_compl_process(adapter, txo,
1750 end_idx);
1751 cmpl++;
1752 }
1753 if (cmpl) {
1754 be_cq_notify(adapter, txo->cq.id, false, cmpl);
1755 atomic_sub(num_wrbs, &txq->used);
1756 cmpl = 0;
1757 num_wrbs = 0;
1758 }
1759 if (atomic_read(&txq->used) == 0)
1760 pending_txqs--;
a8e9179a
SP		 1761 }
1762
0ae57bb3 1763 if (pending_txqs == 0 || ++timeo > 200)
a8e9179a
SP		 1764 break;
1765
1766 mdelay(1);
1767 } while (true);
1768
0ae57bb3
SP		 1769 for_all_tx_queues(adapter, txo, i) {
1770 txq = &txo->q;
1771 if (atomic_read(&txq->used))
1772 dev_err(&adapter->pdev->dev, "%d pending tx-compls\n",
1773 atomic_read(&txq->used));
1774
1775 /* free posted tx for which compls will never arrive */
1776 while (atomic_read(&txq->used)) {
1777 sent_skb = txo->sent_skb_list[txq->tail];
1778 end_idx = txq->tail;
1779 num_wrbs = wrb_cnt_for_skb(adapter, sent_skb,
1780 &dummy_wrb);
1781 index_adv(&end_idx, num_wrbs - 1, txq->len);
1782 num_wrbs = be_tx_compl_process(adapter, txo, end_idx);
1783 atomic_sub(num_wrbs, &txq->used);
1784 }
b03388d6 1785 }
6b7c5b94
SP		 1786}
1787
10ef9ab4
SP		 1788static void be_evt_queues_destroy(struct be_adapter *adapter)
1789{
1790 struct be_eq_obj *eqo;
1791 int i;
1792
1793 for_all_evt_queues(adapter, eqo, i) {
19d59aa7
PR		 1794 if (eqo->q.created) {
1795 be_eq_clean(eqo);
10ef9ab4 1796 be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);
19d59aa7 1797 }
10ef9ab4
SP		 1798 be_queue_free(adapter, &eqo->q);
1799 }
1800}
1801
1802static int be_evt_queues_create(struct be_adapter *adapter)
1803{
1804 struct be_queue_info *eq;
1805 struct be_eq_obj *eqo;
1806 int i, rc;
1807
1808 adapter->num_evt_qs = num_irqs(adapter);
1809
1810 for_all_evt_queues(adapter, eqo, i) {
1811 eqo->adapter = adapter;
1812 eqo->tx_budget = BE_TX_BUDGET;
1813 eqo->idx = i;
1814 eqo->max_eqd = BE_MAX_EQD;
1815 eqo->enable_aic = true;
1816
1817 eq = &eqo->q;
1818 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1819 sizeof(struct be_eq_entry));
1820 if (rc)
1821 return rc;
1822
1823 rc = be_cmd_eq_create(adapter, eq, eqo->cur_eqd);
1824 if (rc)
1825 return rc;
1826 }
1cfafab9 1827 return 0;
10ef9ab4
SP		 1828}
1829
5fb379ee
SP		 1830static void be_mcc_queues_destroy(struct be_adapter *adapter)
1831{
1832 struct be_queue_info *q;
5fb379ee 1833
8788fdc2 1834 q = &adapter->mcc_obj.q;
5fb379ee 1835 if (q->created)
8788fdc2 1836 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1837 be_queue_free(adapter, q);
1838
8788fdc2 1839 q = &adapter->mcc_obj.cq;
5fb379ee 1840 if (q->created)
8788fdc2 1841 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1842 be_queue_free(adapter, q);
1843}
1844
1845/* Must be called only after TX qs are created as MCC shares TX EQ */
1846static int be_mcc_queues_create(struct be_adapter *adapter)
1847{
1848 struct be_queue_info *q, *cq;
5fb379ee 1849
8788fdc2 1850 cq = &adapter->mcc_obj.cq;
5fb379ee 1851 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1852 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1853 goto err;
1854
10ef9ab4
SP		 1855 /* Use the default EQ for MCC completions */
1856 if (be_cmd_cq_create(adapter, cq, &mcc_eqo(adapter)->q, true, 0))
5fb379ee
SP		 1857 goto mcc_cq_free;
1858
8788fdc2 1859 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1860 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1861 goto mcc_cq_destroy;
1862
8788fdc2 1863 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1864 goto mcc_q_free;
1865
1866 return 0;
1867
1868mcc_q_free:
1869 be_queue_free(adapter, q);
1870mcc_cq_destroy:
8788fdc2 1871 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1872mcc_cq_free:
1873 be_queue_free(adapter, cq);
1874err:
1875 return -1;
1876}
1877
6b7c5b94
SP		 1878static void be_tx_queues_destroy(struct be_adapter *adapter)
1879{
1880 struct be_queue_info *q;
3c8def97
SP		 1881 struct be_tx_obj *txo;
1882 u8 i;
6b7c5b94 1883
3c8def97
SP		 1884 for_all_tx_queues(adapter, txo, i) {
1885 q = &txo->q;
1886 if (q->created)
1887 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1888 be_queue_free(adapter, q);
6b7c5b94 1889
3c8def97
SP		 1890 q = &txo->cq;
1891 if (q->created)
1892 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1893 be_queue_free(adapter, q);
1894 }
6b7c5b94
SP		 1895}
1896
dafc0fe3
SP		 1897static int be_num_txqs_want(struct be_adapter *adapter)
1898{
abb93951
PR		 1899 if ((!lancer_chip(adapter) && sriov_want(adapter)) ||
1900 be_is_mc(adapter) ||
1901 (!lancer_chip(adapter) && !be_physfn(adapter)) ||
ca34fe38 1902 BE2_chip(adapter))
dafc0fe3
SP		 1903 return 1;
1904 else
abb93951 1905 return adapter->max_tx_queues;
dafc0fe3
SP		 1906}
1907
10ef9ab4 1908static int be_tx_cqs_create(struct be_adapter *adapter)
6b7c5b94 1909{
10ef9ab4
SP		 1910 struct be_queue_info *cq, *eq;
1911 int status;
3c8def97
SP		 1912 struct be_tx_obj *txo;
1913 u8 i;
6b7c5b94 1914
dafc0fe3 1915 adapter->num_tx_qs = be_num_txqs_want(adapter);
3bb62f4f
PR		 1916 if (adapter->num_tx_qs != MAX_TX_QS) {
1917 rtnl_lock();
dafc0fe3
SP		 1918 netif_set_real_num_tx_queues(adapter->netdev,
1919 adapter->num_tx_qs);
3bb62f4f
PR		 1920 rtnl_unlock();
1921 }
dafc0fe3 1922
10ef9ab4
SP		 1923 for_all_tx_queues(adapter, txo, i) {
1924 cq = &txo->cq;
1925 status = be_queue_alloc(adapter, cq, TX_CQ_LEN,
1926 sizeof(struct be_eth_tx_compl));
1927 if (status)
1928 return status;
3c8def97 1929
10ef9ab4
SP		 1930 /* If num_evt_qs is less than num_tx_qs, then more than
1931 * one txq share an eq
1932 */
1933 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
1934 status = be_cmd_cq_create(adapter, cq, eq, false, 3);
1935 if (status)
1936 return status;
1937 }
1938 return 0;
1939}
6b7c5b94 1940
10ef9ab4
SP		 1941static int be_tx_qs_create(struct be_adapter *adapter)
1942{
1943 struct be_tx_obj *txo;
1944 int i, status;
fe6d2a38 1945
3c8def97 1946 for_all_tx_queues(adapter, txo, i) {
10ef9ab4
SP		 1947 status = be_queue_alloc(adapter, &txo->q, TX_Q_LEN,
1948 sizeof(struct be_eth_wrb));
1949 if (status)
1950 return status;
6b7c5b94 1951
10ef9ab4
SP		 1952 status = be_cmd_txq_create(adapter, &txo->q, &txo->cq);
1953 if (status)
1954 return status;
3c8def97 1955 }
6b7c5b94 1956
d379142b
SP		 1957 dev_info(&adapter->pdev->dev, "created %d TX queue(s)\n",
1958 adapter->num_tx_qs);
10ef9ab4 1959 return 0;
6b7c5b94
SP		 1960}
1961
10ef9ab4 1962static void be_rx_cqs_destroy(struct be_adapter *adapter)
6b7c5b94
SP		 1963{
1964 struct be_queue_info *q;
3abcdeda
SP		 1965 struct be_rx_obj *rxo;
1966 int i;
1967
1968 for_all_rx_queues(adapter, rxo, i) {
3abcdeda
SP		 1969 q = &rxo->cq;
1970 if (q->created)
1971 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1972 be_queue_free(adapter, q);
ac6a0c4a
SP		 1973 }
1974}
1975
10ef9ab4 1976static int be_rx_cqs_create(struct be_adapter *adapter)
6b7c5b94 1977{
10ef9ab4 1978 struct be_queue_info *eq, *cq;
3abcdeda
SP		 1979 struct be_rx_obj *rxo;
1980 int rc, i;
6b7c5b94 1981
10ef9ab4
SP		 1982 /* We'll create as many RSS rings as there are irqs.
1983 * But when there's only one irq there's no use creating RSS rings
1984 */
1985 adapter->num_rx_qs = (num_irqs(adapter) > 1) ?
1986 num_irqs(adapter) + 1 : 1;
7f640062
SP		 1987 if (adapter->num_rx_qs != MAX_RX_QS) {
1988 rtnl_lock();
1989 netif_set_real_num_rx_queues(adapter->netdev,
1990 adapter->num_rx_qs);
1991 rtnl_unlock();
1992 }
ac6a0c4a 1993
6b7c5b94 1994 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
3abcdeda
SP		 1995 for_all_rx_queues(adapter, rxo, i) {
1996 rxo->adapter = adapter;
3abcdeda
SP		 1997 cq = &rxo->cq;
1998 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1999 sizeof(struct be_eth_rx_compl));
2000 if (rc)
10ef9ab4 2001 return rc;
3abcdeda 2002
10ef9ab4
SP		 2003 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
2004 rc = be_cmd_cq_create(adapter, cq, eq, false, 3);
3abcdeda 2005 if (rc)
10ef9ab4 2006 return rc;
3abcdeda 2007 }
6b7c5b94 2008
d379142b
SP		 2009 dev_info(&adapter->pdev->dev,
2010 "created %d RSS queue(s) and 1 default RX queue\n",
2011 adapter->num_rx_qs - 1);
10ef9ab4 2012 return 0;
b628bde2
SP		 2013}
2014
6b7c5b94
SP		 2015static irqreturn_t be_intx(int irq, void *dev)
2016{
2017 struct be_adapter *adapter = dev;
10ef9ab4 2018 int num_evts;
6b7c5b94 2019
10ef9ab4
SP		 2020 /* With INTx only one EQ is used */
2021 num_evts = event_handle(&adapter->eq_obj[0]);
2022 if (num_evts)
2023 return IRQ_HANDLED;
2024 else
2025 return IRQ_NONE;
6b7c5b94
SP		 2026}
2027
10ef9ab4 2028static irqreturn_t be_msix(int irq, void *dev)
6b7c5b94 2029{
10ef9ab4 2030 struct be_eq_obj *eqo = dev;
6b7c5b94 2031
10ef9ab4 2032 event_handle(eqo);
6b7c5b94
SP		 2033 return IRQ_HANDLED;
2034}
2035
2e588f84 2036static inline bool do_gro(struct be_rx_compl_info *rxcp)
6b7c5b94 2037{
2e588f84 2038 return (rxcp->tcpf && !rxcp->err) ? true : false;
6b7c5b94
SP		 2039}
2040
10ef9ab4
SP		 2041static int be_process_rx(struct be_rx_obj *rxo, struct napi_struct *napi,
2042 int budget)
6b7c5b94 2043{
3abcdeda
SP		 2044 struct be_adapter *adapter = rxo->adapter;
2045 struct be_queue_info *rx_cq = &rxo->cq;
2e588f84 2046 struct be_rx_compl_info *rxcp;
6b7c5b94
SP		 2047 u32 work_done;
2048
2049 for (work_done = 0; work_done < budget; work_done++) {
3abcdeda 2050 rxcp = be_rx_compl_get(rxo);
6b7c5b94
SP		 2051 if (!rxcp)
2052 break;
2053
12004ae9
SP		 2054 /* Is it a flush compl that has no data */
2055 if (unlikely(rxcp->num_rcvd == 0))
2056 goto loop_continue;
2057
2058 /* Discard compl with partial DMA Lancer B0 */
2059 if (unlikely(!rxcp->pkt_size)) {
10ef9ab4 2060 be_rx_compl_discard(rxo, rxcp);
12004ae9
SP		 2061 goto loop_continue;
2062 }
2063
2064 /* On BE drop pkts that arrive due to imperfect filtering in
2065 * promiscuous mode on some skews
2066 */
2067 if (unlikely(rxcp->port != adapter->port_num &&
2068 !lancer_chip(adapter))) {
10ef9ab4 2069 be_rx_compl_discard(rxo, rxcp);
12004ae9 2070 goto loop_continue;
64642811 2071 }
009dd872 2072
12004ae9 2073 if (do_gro(rxcp))
10ef9ab4 2074 be_rx_compl_process_gro(rxo, napi, rxcp);
12004ae9 2075 else
10ef9ab4 2076 be_rx_compl_process(rxo, rxcp);
12004ae9 2077loop_continue:
2e588f84 2078 be_rx_stats_update(rxo, rxcp);
6b7c5b94
SP		 2079 }
2080
10ef9ab4
SP		 2081 if (work_done) {
2082 be_cq_notify(adapter, rx_cq->id, true, work_done);
9372cacb 2083
10ef9ab4
SP		 2084 if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM)
2085 be_post_rx_frags(rxo, GFP_ATOMIC);
6b7c5b94 2086 }
10ef9ab4 2087
6b7c5b94
SP		 2088 return work_done;
2089}
2090
10ef9ab4
SP		 2091static bool be_process_tx(struct be_adapter *adapter, struct be_tx_obj *txo,
2092 int budget, int idx)
6b7c5b94 2093{
6b7c5b94 2094 struct be_eth_tx_compl *txcp;
10ef9ab4 2095 int num_wrbs = 0, work_done;
3c8def97 2096
10ef9ab4
SP		 2097 for (work_done = 0; work_done < budget; work_done++) {
2098 txcp = be_tx_compl_get(&txo->cq);
2099 if (!txcp)
2100 break;
2101 num_wrbs += be_tx_compl_process(adapter, txo,
3c8def97
SP		 2102 AMAP_GET_BITS(struct amap_eth_tx_compl,
2103 wrb_index, txcp));
10ef9ab4 2104 }
6b7c5b94 2105
10ef9ab4
SP		 2106 if (work_done) {
2107 be_cq_notify(adapter, txo->cq.id, true, work_done);
2108 atomic_sub(num_wrbs, &txo->q.used);
3c8def97 2109
10ef9ab4
SP		 2110 /* As Tx wrbs have been freed up, wake up netdev queue
2111 * if it was stopped due to lack of tx wrbs. */
2112 if (__netif_subqueue_stopped(adapter->netdev, idx) &&
2113 atomic_read(&txo->q.used) < txo->q.len / 2) {
2114 netif_wake_subqueue(adapter->netdev, idx);
3c8def97 2115 }
10ef9ab4
SP		 2116
2117 u64_stats_update_begin(&tx_stats(txo)->sync_compl);
2118 tx_stats(txo)->tx_compl += work_done;
2119 u64_stats_update_end(&tx_stats(txo)->sync_compl);
6b7c5b94 2120 }
10ef9ab4
SP		 2121 return (work_done < budget); /* Done */
2122}
6b7c5b94 2123
10ef9ab4
SP		 2124int be_poll(struct napi_struct *napi, int budget)
2125{
2126 struct be_eq_obj *eqo = container_of(napi, struct be_eq_obj, napi);
2127 struct be_adapter *adapter = eqo->adapter;
2128 int max_work = 0, work, i;
2129 bool tx_done;
f31e50a8 2130
10ef9ab4
SP		 2131 /* Process all TXQs serviced by this EQ */
2132 for (i = eqo->idx; i < adapter->num_tx_qs; i += adapter->num_evt_qs) {
2133 tx_done = be_process_tx(adapter, &adapter->tx_obj[i],
2134 eqo->tx_budget, i);
2135 if (!tx_done)
2136 max_work = budget;
f31e50a8
SP		 2137 }
2138
10ef9ab4
SP		 2139 /* This loop will iterate twice for EQ0 in which
2140 * completions of the last RXQ (default one) are also processed
2141 * For other EQs the loop iterates only once
2142 */
2143 for (i = eqo->idx; i < adapter->num_rx_qs; i += adapter->num_evt_qs) {
2144 work = be_process_rx(&adapter->rx_obj[i], napi, budget);
2145 max_work = max(work, max_work);
2146 }
6b7c5b94 2147
10ef9ab4
SP		 2148 if (is_mcc_eqo(eqo))
2149 be_process_mcc(adapter);
93c86700 2150
10ef9ab4
SP		 2151 if (max_work < budget) {
2152 napi_complete(napi);
2153 be_eq_notify(adapter, eqo->q.id, true, false, 0);
2154 } else {
2155 /* As we'll continue in polling mode, count and clear events */
2156 be_eq_notify(adapter, eqo->q.id, false, false, events_get(eqo));
93c86700 2157 }
10ef9ab4 2158 return max_work;
6b7c5b94
SP		 2159}
2160
f67ef7ba 2161void be_detect_error(struct be_adapter *adapter)
7c185276 2162{
e1cfb67a
PR		 2163 u32 ue_lo = 0, ue_hi = 0, ue_lo_mask = 0, ue_hi_mask = 0;
2164 u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0;
7c185276
AK		 2165 u32 i;
2166
f67ef7ba 2167 if (be_crit_error(adapter))
72f02485
SP		 2168 return;
2169
e1cfb67a
PR		 2170 if (lancer_chip(adapter)) {
2171 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
2172 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
2173 sliport_err1 = ioread32(adapter->db +
2174 SLIPORT_ERROR1_OFFSET);
2175 sliport_err2 = ioread32(adapter->db +
2176 SLIPORT_ERROR2_OFFSET);
2177 }
2178 } else {
2179 pci_read_config_dword(adapter->pdev,
2180 PCICFG_UE_STATUS_LOW, &ue_lo);
2181 pci_read_config_dword(adapter->pdev,
2182 PCICFG_UE_STATUS_HIGH, &ue_hi);
2183 pci_read_config_dword(adapter->pdev,
2184 PCICFG_UE_STATUS_LOW_MASK, &ue_lo_mask);
2185 pci_read_config_dword(adapter->pdev,
2186 PCICFG_UE_STATUS_HI_MASK, &ue_hi_mask);
2187
f67ef7ba
PR		 2188 ue_lo = (ue_lo & ~ue_lo_mask);
2189 ue_hi = (ue_hi & ~ue_hi_mask);
e1cfb67a 2190 }
7c185276 2191
1451ae6e
AK		 2192 /* On certain platforms BE hardware can indicate spurious UEs.
2193 * Allow the h/w to stop working completely in case of a real UE.
2194 * Hence not setting the hw_error for UE detection.
2195 */
2196 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
f67ef7ba 2197 adapter->hw_error = true;
434b3648 2198 dev_err(&adapter->pdev->dev,
f67ef7ba
PR		 2199 "Error detected in the card\n");
2200 }
2201
2202 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
2203 dev_err(&adapter->pdev->dev,
2204 "ERR: sliport status 0x%x\n", sliport_status);
2205 dev_err(&adapter->pdev->dev,
2206 "ERR: sliport error1 0x%x\n", sliport_err1);
2207 dev_err(&adapter->pdev->dev,
2208 "ERR: sliport error2 0x%x\n", sliport_err2);
d053de91
AK		 2209 }
2210
e1cfb67a
PR		 2211 if (ue_lo) {
2212 for (i = 0; ue_lo; ue_lo >>= 1, i++) {
2213 if (ue_lo & 1)
7c185276
AK		 2214 dev_err(&adapter->pdev->dev,
2215 "UE: %s bit set\n", ue_status_low_desc[i]);
2216 }
2217 }
f67ef7ba 2218
e1cfb67a
PR		 2219 if (ue_hi) {
2220 for (i = 0; ue_hi; ue_hi >>= 1, i++) {
2221 if (ue_hi & 1)
7c185276
AK		 2222 dev_err(&adapter->pdev->dev,
2223 "UE: %s bit set\n", ue_status_hi_desc[i]);
2224 }
2225 }
2226
2227}
2228
8d56ff11
SP		 2229static void be_msix_disable(struct be_adapter *adapter)
2230{
ac6a0c4a 2231 if (msix_enabled(adapter)) {
8d56ff11 2232 pci_disable_msix(adapter->pdev);
ac6a0c4a 2233 adapter->num_msix_vec = 0;
3abcdeda
SP		 2234 }
2235}
2236
10ef9ab4
SP		 2237static uint be_num_rss_want(struct be_adapter *adapter)
2238{
30e80b55 2239 u32 num = 0;
abb93951 2240
10ef9ab4 2241 if ((adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
abb93951
PR		 2242 (lancer_chip(adapter) ||
2243 (!sriov_want(adapter) && be_physfn(adapter)))) {
2244 num = adapter->max_rss_queues;
30e80b55
YM		 2245 num = min_t(u32, num, (u32)netif_get_num_default_rss_queues());
2246 }
2247 return num;
10ef9ab4
SP		 2248}
2249
6b7c5b94
SP		 2250static void be_msix_enable(struct be_adapter *adapter)
2251{
10ef9ab4 2252#define BE_MIN_MSIX_VECTORS 1
045508a8 2253 int i, status, num_vec, num_roce_vec = 0;
d379142b 2254 struct device *dev = &adapter->pdev->dev;
6b7c5b94 2255
10ef9ab4
SP		 2256 /* If RSS queues are not used, need a vec for default RX Q */
2257 num_vec = min(be_num_rss_want(adapter), num_online_cpus());
045508a8
PP		 2258 if (be_roce_supported(adapter)) {
2259 num_roce_vec = min_t(u32, MAX_ROCE_MSIX_VECTORS,
2260 (num_online_cpus() + 1));
2261 num_roce_vec = min(num_roce_vec, MAX_ROCE_EQS);
2262 num_vec += num_roce_vec;
2263 num_vec = min(num_vec, MAX_MSIX_VECTORS);
2264 }
10ef9ab4 2265 num_vec = max(num_vec, BE_MIN_MSIX_VECTORS);
3abcdeda 2266
ac6a0c4a 2267 for (i = 0; i < num_vec; i++)
6b7c5b94
SP		 2268 adapter->msix_entries[i].entry = i;
2269
ac6a0c4a 2270 status = pci_enable_msix(adapter->pdev, adapter->msix_entries, num_vec);
3abcdeda
SP		 2271 if (status == 0) {
2272 goto done;
2273 } else if (status >= BE_MIN_MSIX_VECTORS) {
ac6a0c4a 2274 num_vec = status;
3abcdeda 2275 if (pci_enable_msix(adapter->pdev, adapter->msix_entries,
ac6a0c4a 2276 num_vec) == 0)
3abcdeda 2277 goto done;
3abcdeda 2278 }
d379142b
SP		 2279
2280 dev_warn(dev, "MSIx enable failed\n");
3abcdeda
SP		 2281 return;
2282done:
045508a8
PP		 2283 if (be_roce_supported(adapter)) {
2284 if (num_vec > num_roce_vec) {
2285 adapter->num_msix_vec = num_vec - num_roce_vec;
2286 adapter->num_msix_roce_vec =
2287 num_vec - adapter->num_msix_vec;
2288 } else {
2289 adapter->num_msix_vec = num_vec;
2290 adapter->num_msix_roce_vec = 0;
2291 }
2292 } else
2293 adapter->num_msix_vec = num_vec;
d379142b 2294 dev_info(dev, "enabled %d MSI-x vector(s)\n", adapter->num_msix_vec);
ac6a0c4a 2295 return;
6b7c5b94
SP		 2296}
2297
fe6d2a38 2298static inline int be_msix_vec_get(struct be_adapter *adapter,
10ef9ab4 2299 struct be_eq_obj *eqo)
b628bde2 2300{
10ef9ab4 2301 return adapter->msix_entries[eqo->idx].vector;
b628bde2 2302}
6b7c5b94 2303
b628bde2
SP		 2304static int be_msix_register(struct be_adapter *adapter)
2305{
10ef9ab4
SP		 2306 struct net_device *netdev = adapter->netdev;
2307 struct be_eq_obj *eqo;
2308 int status, i, vec;
6b7c5b94 2309
10ef9ab4
SP		 2310 for_all_evt_queues(adapter, eqo, i) {
2311 sprintf(eqo->desc, "%s-q%d", netdev->name, i);
2312 vec = be_msix_vec_get(adapter, eqo);
2313 status = request_irq(vec, be_msix, 0, eqo->desc, eqo);
3abcdeda
SP		 2314 if (status)
2315 goto err_msix;
2316 }
b628bde2 2317
6b7c5b94 2318 return 0;
3abcdeda 2319err_msix:
10ef9ab4
SP		 2320 for (i--, eqo = &adapter->eq_obj[i]; i >= 0; i--, eqo--)
2321 free_irq(be_msix_vec_get(adapter, eqo), eqo);
2322 dev_warn(&adapter->pdev->dev, "MSIX Request IRQ failed - err %d\n",
2323 status);
ac6a0c4a 2324 be_msix_disable(adapter);
6b7c5b94
SP		 2325 return status;
2326}
2327
2328static int be_irq_register(struct be_adapter *adapter)
2329{
2330 struct net_device *netdev = adapter->netdev;
2331 int status;
2332
ac6a0c4a 2333 if (msix_enabled(adapter)) {
6b7c5b94
SP		 2334 status = be_msix_register(adapter);
2335 if (status == 0)
2336 goto done;
ba343c77
SB		 2337 /* INTx is not supported for VF */
2338 if (!be_physfn(adapter))
2339 return status;
6b7c5b94
SP		 2340 }
2341
2342 /* INTx */
2343 netdev->irq = adapter->pdev->irq;
2344 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
2345 adapter);
2346 if (status) {
2347 dev_err(&adapter->pdev->dev,
2348 "INTx request IRQ failed - err %d\n", status);
2349 return status;
2350 }
2351done:
2352 adapter->isr_registered = true;
2353 return 0;
2354}
2355
2356static void be_irq_unregister(struct be_adapter *adapter)
2357{
2358 struct net_device *netdev = adapter->netdev;
10ef9ab4 2359 struct be_eq_obj *eqo;
3abcdeda 2360 int i;
6b7c5b94
SP		 2361
2362 if (!adapter->isr_registered)
2363 return;
2364
2365 /* INTx */
ac6a0c4a 2366 if (!msix_enabled(adapter)) {
6b7c5b94
SP		 2367 free_irq(netdev->irq, adapter);
2368 goto done;
2369 }
2370
2371 /* MSIx */
10ef9ab4
SP		 2372 for_all_evt_queues(adapter, eqo, i)
2373 free_irq(be_msix_vec_get(adapter, eqo), eqo);
3abcdeda 2374
6b7c5b94
SP		 2375done:
2376 adapter->isr_registered = false;
6b7c5b94
SP		 2377}
2378
10ef9ab4 2379static void be_rx_qs_destroy(struct be_adapter *adapter)
482c9e79
SP		 2380{
2381 struct be_queue_info *q;
2382 struct be_rx_obj *rxo;
2383 int i;
2384
2385 for_all_rx_queues(adapter, rxo, i) {
2386 q = &rxo->q;
2387 if (q->created) {
2388 be_cmd_rxq_destroy(adapter, q);
2389 /* After the rxq is invalidated, wait for a grace time
2390 * of 1ms for all dma to end and the flush compl to
2391 * arrive
2392 */
2393 mdelay(1);
10ef9ab4 2394 be_rx_cq_clean(rxo);
482c9e79 2395 }
10ef9ab4 2396 be_queue_free(adapter, q);
482c9e79
SP		 2397 }
2398}
2399
889cd4b2
SP		 2400static int be_close(struct net_device *netdev)
2401{
2402 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4
SP		 2403 struct be_eq_obj *eqo;
2404 int i;
889cd4b2 2405
045508a8
PP		 2406 be_roce_dev_close(adapter);
2407
889cd4b2
SP		 2408 be_async_mcc_disable(adapter);
2409
fe6d2a38
SP		 2410 if (!lancer_chip(adapter))
2411 be_intr_set(adapter, false);
889cd4b2 2412
10ef9ab4
SP		 2413 for_all_evt_queues(adapter, eqo, i) {
2414 napi_disable(&eqo->napi);
2415 if (msix_enabled(adapter))
2416 synchronize_irq(be_msix_vec_get(adapter, eqo));
2417 else
2418 synchronize_irq(netdev->irq);
2419 be_eq_clean(eqo);
63fcb27f
PR		 2420 }
2421
889cd4b2
SP		 2422 be_irq_unregister(adapter);
2423
889cd4b2
SP		 2424 /* Wait for all pending tx completions to arrive so that
2425 * all tx skbs are freed.
2426 */
0ae57bb3 2427 be_tx_compl_clean(adapter);
889cd4b2 2428
10ef9ab4 2429 be_rx_qs_destroy(adapter);
482c9e79
SP		 2430 return 0;
2431}
2432
10ef9ab4 2433static int be_rx_qs_create(struct be_adapter *adapter)
482c9e79
SP		 2434{
2435 struct be_rx_obj *rxo;
e9008ee9
PR		 2436 int rc, i, j;
2437 u8 rsstable[128];
482c9e79
SP		 2438
2439 for_all_rx_queues(adapter, rxo, i) {
10ef9ab4
SP		 2440 rc = be_queue_alloc(adapter, &rxo->q, RX_Q_LEN,
2441 sizeof(struct be_eth_rx_d));
2442 if (rc)
2443 return rc;
2444 }
2445
2446 /* The FW would like the default RXQ to be created first */
2447 rxo = default_rxo(adapter);
2448 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id, rx_frag_size,
2449 adapter->if_handle, false, &rxo->rss_id);
2450 if (rc)
2451 return rc;
2452
2453 for_all_rss_queues(adapter, rxo, i) {
482c9e79 2454 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id,
10ef9ab4
SP		 2455 rx_frag_size, adapter->if_handle,
2456 true, &rxo->rss_id);
482c9e79
SP		 2457 if (rc)
2458 return rc;
2459 }
2460
2461 if (be_multi_rxq(adapter)) {
e9008ee9
PR		 2462 for (j = 0; j < 128; j += adapter->num_rx_qs - 1) {
2463 for_all_rss_queues(adapter, rxo, i) {
2464 if ((j + i) >= 128)
2465 break;
2466 rsstable[j + i] = rxo->rss_id;
2467 }
2468 }
2469 rc = be_cmd_rss_config(adapter, rsstable, 128);
482c9e79
SP		 2470 if (rc)
2471 return rc;
2472 }
2473
2474 /* First time posting */
10ef9ab4 2475 for_all_rx_queues(adapter, rxo, i)
482c9e79 2476 be_post_rx_frags(rxo, GFP_KERNEL);
889cd4b2
SP		 2477 return 0;
2478}
2479
6b7c5b94
SP		 2480static int be_open(struct net_device *netdev)
2481{
2482 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4 2483 struct be_eq_obj *eqo;
3abcdeda 2484 struct be_rx_obj *rxo;
10ef9ab4 2485 struct be_tx_obj *txo;
b236916a 2486 u8 link_status;
3abcdeda 2487 int status, i;
5fb379ee 2488
10ef9ab4 2489 status = be_rx_qs_create(adapter);
482c9e79
SP		 2490 if (status)
2491 goto err;
2492
5fb379ee
SP		 2493 be_irq_register(adapter);
2494
fe6d2a38
SP		 2495 if (!lancer_chip(adapter))
2496 be_intr_set(adapter, true);
5fb379ee 2497
10ef9ab4 2498 for_all_rx_queues(adapter, rxo, i)
3abcdeda 2499 be_cq_notify(adapter, rxo->cq.id, true, 0);
5fb379ee 2500
10ef9ab4
SP		 2501 for_all_tx_queues(adapter, txo, i)
2502 be_cq_notify(adapter, txo->cq.id, true, 0);
2503
7a1e9b20
SP		 2504 be_async_mcc_enable(adapter);
2505
10ef9ab4
SP		 2506 for_all_evt_queues(adapter, eqo, i) {
2507 napi_enable(&eqo->napi);
2508 be_eq_notify(adapter, eqo->q.id, true, false, 0);
2509 }
2510
323ff71e 2511 status = be_cmd_link_status_query(adapter, NULL, &link_status, 0);
b236916a
AK		 2512 if (!status)
2513 be_link_status_update(adapter, link_status);
2514
045508a8 2515 be_roce_dev_open(adapter);
889cd4b2
SP		 2516 return 0;
2517err:
2518 be_close(adapter->netdev);
2519 return -EIO;
5fb379ee
SP		 2520}
2521
71d8d1b5
AK		 2522static int be_setup_wol(struct be_adapter *adapter, bool enable)
2523{
2524 struct be_dma_mem cmd;
2525 int status = 0;
2526 u8 mac[ETH_ALEN];
2527
2528 memset(mac, 0, ETH_ALEN);
2529
2530 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2b7bcebf
IV		 2531 cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma,
2532 GFP_KERNEL);
71d8d1b5
AK		 2533 if (cmd.va == NULL)
2534 return -1;
2535 memset(cmd.va, 0, cmd.size);
2536
2537 if (enable) {
2538 status = pci_write_config_dword(adapter->pdev,
2539 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2540 if (status) {
2541 dev_err(&adapter->pdev->dev,
2381a55c 2542 "Could not enable Wake-on-lan\n");
2b7bcebf
IV		 2543 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va,
2544 cmd.dma);
71d8d1b5
AK		 2545 return status;
2546 }
2547 status = be_cmd_enable_magic_wol(adapter,
2548 adapter->netdev->dev_addr, &cmd);
2549 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2550 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2551 } else {
2552 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2553 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2554 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2555 }
2556
2b7bcebf 2557 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
71d8d1b5
AK		 2558 return status;
2559}
2560
6d87f5c3
AK		 2561/*
2562 * Generate a seed MAC address from the PF MAC Address using jhash.
2563 * MAC Address for VFs are assigned incrementally starting from the seed.
2564 * These addresses are programmed in the ASIC by the PF and the VF driver
2565 * queries for the MAC address during its probe.
2566 */
2567static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2568{
f9449ab7 2569 u32 vf;
3abcdeda 2570 int status = 0;
6d87f5c3 2571 u8 mac[ETH_ALEN];
11ac75ed 2572 struct be_vf_cfg *vf_cfg;
6d87f5c3
AK		 2573
2574 be_vf_eth_addr_generate(adapter, mac);
2575
11ac75ed 2576 for_all_vfs(adapter, vf_cfg, vf) {
590c391d
PR		 2577 if (lancer_chip(adapter)) {
2578 status = be_cmd_set_mac_list(adapter, mac, 1, vf + 1);
2579 } else {
2580 status = be_cmd_pmac_add(adapter, mac,
11ac75ed
SP		 2581 vf_cfg->if_handle,
2582 &vf_cfg->pmac_id, vf + 1);
590c391d
PR		 2583 }
2584
6d87f5c3
AK		 2585 if (status)
2586 dev_err(&adapter->pdev->dev,
590c391d 2587 "Mac address assignment failed for VF %d\n", vf);
6d87f5c3 2588 else
11ac75ed 2589 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
6d87f5c3
AK		 2590
2591 mac[5] += 1;
2592 }
2593 return status;
2594}
2595
f9449ab7 2596static void be_vf_clear(struct be_adapter *adapter)
6d87f5c3 2597{
11ac75ed 2598 struct be_vf_cfg *vf_cfg;
6d87f5c3
AK		 2599 u32 vf;
2600
39f1d94d
SP		 2601 if (be_find_vfs(adapter, ASSIGNED)) {
2602 dev_warn(&adapter->pdev->dev, "VFs are assigned to VMs\n");
2603 goto done;
2604 }
2605
11ac75ed 2606 for_all_vfs(adapter, vf_cfg, vf) {
590c391d
PR		 2607 if (lancer_chip(adapter))
2608 be_cmd_set_mac_list(adapter, NULL, 0, vf + 1);
2609 else
11ac75ed
SP		 2610 be_cmd_pmac_del(adapter, vf_cfg->if_handle,
2611 vf_cfg->pmac_id, vf + 1);
f9449ab7 2612
11ac75ed
SP		 2613 be_cmd_if_destroy(adapter, vf_cfg->if_handle, vf + 1);
2614 }
39f1d94d
SP		 2615 pci_disable_sriov(adapter->pdev);
2616done:
2617 kfree(adapter->vf_cfg);
2618 adapter->num_vfs = 0;
6d87f5c3
AK		 2619}
2620
a54769f5
SP		 2621static int be_clear(struct be_adapter *adapter)
2622{
fbc13f01
AK		 2623 int i = 1;
2624
191eb756
SP		 2625 if (adapter->flags & BE_FLAGS_WORKER_SCHEDULED) {
2626 cancel_delayed_work_sync(&adapter->work);
2627 adapter->flags &= ~BE_FLAGS_WORKER_SCHEDULED;
2628 }
2629
11ac75ed 2630 if (sriov_enabled(adapter))
f9449ab7
SP		 2631 be_vf_clear(adapter);
2632
fbc13f01
AK		 2633 for (; adapter->uc_macs > 0; adapter->uc_macs--, i++)
2634 be_cmd_pmac_del(adapter, adapter->if_handle,
2635 adapter->pmac_id[i], 0);
2636
f9449ab7 2637 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
a54769f5
SP		 2638
2639 be_mcc_queues_destroy(adapter);
10ef9ab4 2640 be_rx_cqs_destroy(adapter);
a54769f5 2641 be_tx_queues_destroy(adapter);
10ef9ab4 2642 be_evt_queues_destroy(adapter);
a54769f5 2643
abb93951
PR		 2644 kfree(adapter->pmac_id);
2645 adapter->pmac_id = NULL;
2646
10ef9ab4 2647 be_msix_disable(adapter);
a54769f5
SP		 2648 return 0;
2649}
2650
abb93951
PR		 2651static void be_get_vf_if_cap_flags(struct be_adapter *adapter,
2652 u32 *cap_flags, u8 domain)
2653{
2654 bool profile_present = false;
2655 int status;
2656
2657 if (lancer_chip(adapter)) {
2658 status = be_cmd_get_profile_config(adapter, cap_flags, domain);
2659 if (!status)
2660 profile_present = true;
2661 }
2662
2663 if (!profile_present)
2664 *cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
2665 BE_IF_FLAGS_MULTICAST;
2666}
2667
39f1d94d 2668static int be_vf_setup_init(struct be_adapter *adapter)
30128031 2669{
11ac75ed 2670 struct be_vf_cfg *vf_cfg;
30128031
SP		 2671 int vf;
2672
39f1d94d
SP		 2673 adapter->vf_cfg = kcalloc(adapter->num_vfs, sizeof(*vf_cfg),
2674 GFP_KERNEL);
2675 if (!adapter->vf_cfg)
2676 return -ENOMEM;
2677
11ac75ed
SP		 2678 for_all_vfs(adapter, vf_cfg, vf) {
2679 vf_cfg->if_handle = -1;
2680 vf_cfg->pmac_id = -1;
30128031 2681 }
39f1d94d 2682 return 0;
30128031
SP		 2683}
2684
f9449ab7
SP		 2685static int be_vf_setup(struct be_adapter *adapter)
2686{
11ac75ed 2687 struct be_vf_cfg *vf_cfg;
39f1d94d 2688 struct device *dev = &adapter->pdev->dev;
f9449ab7 2689 u32 cap_flags, en_flags, vf;
f1f3ee1b 2690 u16 def_vlan, lnk_speed;
39f1d94d
SP		 2691 int status, enabled_vfs;
2692
2693 enabled_vfs = be_find_vfs(adapter, ENABLED);
2694 if (enabled_vfs) {
2695 dev_warn(dev, "%d VFs are already enabled\n", enabled_vfs);
2696 dev_warn(dev, "Ignoring num_vfs=%d setting\n", num_vfs);
2697 return 0;
2698 }
f9449ab7 2699
39f1d94d
SP		 2700 if (num_vfs > adapter->dev_num_vfs) {
2701 dev_warn(dev, "Device supports %d VFs and not %d\n",
2702 adapter->dev_num_vfs, num_vfs);
2703 num_vfs = adapter->dev_num_vfs;
2704 }
2705
2706 status = pci_enable_sriov(adapter->pdev, num_vfs);
2707 if (!status) {
2708 adapter->num_vfs = num_vfs;
2709 } else {
2710 /* Platform doesn't support SRIOV though device supports it */
2711 dev_warn(dev, "SRIOV enable failed\n");
2712 return 0;
2713 }
2714
2715 status = be_vf_setup_init(adapter);
2716 if (status)
2717 goto err;
30128031 2718
11ac75ed 2719 for_all_vfs(adapter, vf_cfg, vf) {
abb93951
PR		 2720 be_get_vf_if_cap_flags(adapter, &cap_flags, vf + 1);
2721
2722 en_flags = cap_flags & (BE_IF_FLAGS_UNTAGGED |
2723 BE_IF_FLAGS_BROADCAST |
2724 BE_IF_FLAGS_MULTICAST);
2725
1578e777
PR		 2726 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2727 &vf_cfg->if_handle, vf + 1);
f9449ab7
SP		 2728 if (status)
2729 goto err;
f9449ab7
SP		 2730 }
2731
39f1d94d
SP		 2732 if (!enabled_vfs) {
2733 status = be_vf_eth_addr_config(adapter);
2734 if (status)
2735 goto err;
2736 }
f9449ab7 2737
11ac75ed 2738 for_all_vfs(adapter, vf_cfg, vf) {
8a046d3b
VV		 2739 lnk_speed = 1000;
2740 status = be_cmd_set_qos(adapter, lnk_speed, vf + 1);
f9449ab7
SP		 2741 if (status)
2742 goto err;
11ac75ed 2743 vf_cfg->tx_rate = lnk_speed * 10;
f1f3ee1b
AK		 2744
2745 status = be_cmd_get_hsw_config(adapter, &def_vlan,
2746 vf + 1, vf_cfg->if_handle);
2747 if (status)
2748 goto err;
2749 vf_cfg->def_vid = def_vlan;
dcf7ebba
PR		 2750
2751 be_cmd_enable_vf(adapter, vf + 1);
f9449ab7
SP		 2752 }
2753 return 0;
2754err:
2755 return status;
2756}
2757
30128031
SP		 2758static void be_setup_init(struct be_adapter *adapter)
2759{
2760 adapter->vlan_prio_bmap = 0xff;
42f11cf2 2761 adapter->phy.link_speed = -1;
30128031
SP		 2762 adapter->if_handle = -1;
2763 adapter->be3_native = false;
2764 adapter->promiscuous = false;
f25b119c
PR		 2765 if (be_physfn(adapter))
2766 adapter->cmd_privileges = MAX_PRIVILEGES;
2767 else
2768 adapter->cmd_privileges = MIN_PRIVILEGES;
30128031
SP		 2769}
2770
1578e777
PR		 2771static int be_get_mac_addr(struct be_adapter *adapter, u8 *mac, u32 if_handle,
2772 bool *active_mac, u32 *pmac_id)
590c391d 2773{
1578e777 2774 int status = 0;
e5e1ee89 2775
1578e777
PR		 2776 if (!is_zero_ether_addr(adapter->netdev->perm_addr)) {
2777 memcpy(mac, adapter->netdev->dev_addr, ETH_ALEN);
2778 if (!lancer_chip(adapter) && !be_physfn(adapter))
2779 *active_mac = true;
2780 else
2781 *active_mac = false;
e5e1ee89 2782
1578e777
PR		 2783 return status;
2784 }
e5e1ee89 2785
1578e777
PR		 2786 if (lancer_chip(adapter)) {
2787 status = be_cmd_get_mac_from_list(adapter, mac,
2788 active_mac, pmac_id, 0);
2789 if (*active_mac) {
5ee4979b
SP		 2790 status = be_cmd_mac_addr_query(adapter, mac, false,
2791 if_handle, *pmac_id);
1578e777
PR		 2792 }
2793 } else if (be_physfn(adapter)) {
2794 /* For BE3, for PF get permanent MAC */
5ee4979b 2795 status = be_cmd_mac_addr_query(adapter, mac, true, 0, 0);
1578e777 2796 *active_mac = false;
e5e1ee89 2797 } else {
1578e777 2798 /* For BE3, for VF get soft MAC assigned by PF*/
5ee4979b 2799 status = be_cmd_mac_addr_query(adapter, mac, false,
1578e777
PR		 2800 if_handle, 0);
2801 *active_mac = true;
e5e1ee89 2802 }
590c391d
PR		 2803 return status;
2804}
2805
abb93951
PR		 2806static void be_get_resources(struct be_adapter *adapter)
2807{
2808 int status;
2809 bool profile_present = false;
2810
2811 if (lancer_chip(adapter)) {
2812 status = be_cmd_get_func_config(adapter);
2813
2814 if (!status)
2815 profile_present = true;
2816 }
2817
2818 if (profile_present) {
2819 /* Sanity fixes for Lancer */
2820 adapter->max_pmac_cnt = min_t(u16, adapter->max_pmac_cnt,
2821 BE_UC_PMAC_COUNT);
2822 adapter->max_vlans = min_t(u16, adapter->max_vlans,
2823 BE_NUM_VLANS_SUPPORTED);
2824 adapter->max_mcast_mac = min_t(u16, adapter->max_mcast_mac,
2825 BE_MAX_MC);
2826 adapter->max_tx_queues = min_t(u16, adapter->max_tx_queues,
2827 MAX_TX_QS);
2828 adapter->max_rss_queues = min_t(u16, adapter->max_rss_queues,
2829 BE3_MAX_RSS_QS);
2830 adapter->max_event_queues = min_t(u16,
2831 adapter->max_event_queues,
2832 BE3_MAX_RSS_QS);
2833
2834 if (adapter->max_rss_queues &&
2835 adapter->max_rss_queues == adapter->max_rx_queues)
2836 adapter->max_rss_queues -= 1;
2837
2838 if (adapter->max_event_queues < adapter->max_rss_queues)
2839 adapter->max_rss_queues = adapter->max_event_queues;
2840
2841 } else {
2842 if (be_physfn(adapter))
2843 adapter->max_pmac_cnt = BE_UC_PMAC_COUNT;
2844 else
2845 adapter->max_pmac_cnt = BE_VF_UC_PMAC_COUNT;
2846
2847 if (adapter->function_mode & FLEX10_MODE)
2848 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/8;
2849 else
2850 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2851
2852 adapter->max_mcast_mac = BE_MAX_MC;
2853 adapter->max_tx_queues = MAX_TX_QS;
2854 adapter->max_rss_queues = (adapter->be3_native) ?
2855 BE3_MAX_RSS_QS : BE2_MAX_RSS_QS;
2856 adapter->max_event_queues = BE3_MAX_RSS_QS;
2857
2858 adapter->if_cap_flags = BE_IF_FLAGS_UNTAGGED |
2859 BE_IF_FLAGS_BROADCAST |
2860 BE_IF_FLAGS_MULTICAST |
2861 BE_IF_FLAGS_PASS_L3L4_ERRORS |
2862 BE_IF_FLAGS_MCAST_PROMISCUOUS |
2863 BE_IF_FLAGS_VLAN_PROMISCUOUS |
2864 BE_IF_FLAGS_PROMISCUOUS;
2865
2866 if (adapter->function_caps & BE_FUNCTION_CAPS_RSS)
2867 adapter->if_cap_flags |= BE_IF_FLAGS_RSS;
2868 }
2869}
2870
39f1d94d
SP		 2871/* Routine to query per function resource limits */
2872static int be_get_config(struct be_adapter *adapter)
2873{
abb93951 2874 int pos, status;
39f1d94d
SP		 2875 u16 dev_num_vfs;
2876
abb93951
PR		 2877 status = be_cmd_query_fw_cfg(adapter, &adapter->port_num,
2878 &adapter->function_mode,
2879 &adapter->function_caps);
2880 if (status)
2881 goto err;
2882
2883 be_get_resources(adapter);
2884
2885 /* primary mac needs 1 pmac entry */
2886 adapter->pmac_id = kcalloc(adapter->max_pmac_cnt + 1,
2887 sizeof(u32), GFP_KERNEL);
2888 if (!adapter->pmac_id) {
2889 status = -ENOMEM;
2890 goto err;
2891 }
2892
39f1d94d
SP		 2893 pos = pci_find_ext_capability(adapter->pdev, PCI_EXT_CAP_ID_SRIOV);
2894 if (pos) {
2895 pci_read_config_word(adapter->pdev, pos + PCI_SRIOV_TOTAL_VF,
2896 &dev_num_vfs);
7c5a5242
VV		 2897 if (!lancer_chip(adapter))
2898 dev_num_vfs = min_t(u16, dev_num_vfs, MAX_VFS);
39f1d94d
SP		 2899 adapter->dev_num_vfs = dev_num_vfs;
2900 }
abb93951
PR		 2901err:
2902 return status;
39f1d94d
SP		 2903}
2904
5fb379ee
SP		 2905static int be_setup(struct be_adapter *adapter)
2906{
39f1d94d 2907 struct device *dev = &adapter->pdev->dev;
abb93951 2908 u32 en_flags;
a54769f5 2909 u32 tx_fc, rx_fc;
10ef9ab4 2910 int status;
ba343c77 2911 u8 mac[ETH_ALEN];
1578e777 2912 bool active_mac;
ba343c77 2913
30128031 2914 be_setup_init(adapter);
6b7c5b94 2915
abb93951
PR		 2916 if (!lancer_chip(adapter))
2917 be_cmd_req_native_mode(adapter);
39f1d94d 2918
abb93951
PR		 2919 status = be_get_config(adapter);
2920 if (status)
2921 goto err;
73d540f2 2922
10ef9ab4
SP		 2923 be_msix_enable(adapter);
2924
2925 status = be_evt_queues_create(adapter);
2926 if (status)
a54769f5 2927 goto err;
6b7c5b94 2928
10ef9ab4
SP		 2929 status = be_tx_cqs_create(adapter);
2930 if (status)
2931 goto err;
2932
2933 status = be_rx_cqs_create(adapter);
2934 if (status)
a54769f5 2935 goto err;
6b7c5b94 2936
f9449ab7 2937 status = be_mcc_queues_create(adapter);
10ef9ab4 2938 if (status)
a54769f5 2939 goto err;
6b7c5b94 2940
f25b119c
PR		 2941 be_cmd_get_fn_privileges(adapter, &adapter->cmd_privileges, 0);
2942 /* In UMC mode FW does not return right privileges.
2943 * Override with correct privilege equivalent to PF.
2944 */
2945 if (be_is_mc(adapter))
2946 adapter->cmd_privileges = MAX_PRIVILEGES;
2947
f9449ab7
SP		 2948 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
2949 BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_PASS_L3L4_ERRORS;
5d5adb93 2950
abb93951 2951 if (adapter->function_caps & BE_FUNCTION_CAPS_RSS)
f9449ab7 2952 en_flags |= BE_IF_FLAGS_RSS;
1578e777 2953
abb93951 2954 en_flags = en_flags & adapter->if_cap_flags;
0b13fb45 2955
abb93951 2956 status = be_cmd_if_create(adapter, adapter->if_cap_flags, en_flags,
1578e777 2957 &adapter->if_handle, 0);
5fb379ee 2958 if (status != 0)
a54769f5 2959 goto err;
6b7c5b94 2960
1578e777
PR		 2961 memset(mac, 0, ETH_ALEN);
2962 active_mac = false;
2963 status = be_get_mac_addr(adapter, mac, adapter->if_handle,
2964 &active_mac, &adapter->pmac_id[0]);
2965 if (status != 0)
2966 goto err;
2967
2968 if (!active_mac) {
2969 status = be_cmd_pmac_add(adapter, mac, adapter->if_handle,
2970 &adapter->pmac_id[0], 0);
2971 if (status != 0)
2972 goto err;
2973 }
2974
2975 if (is_zero_ether_addr(adapter->netdev->dev_addr)) {
2976 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2977 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
f9449ab7 2978 }
0dffc83e 2979
10ef9ab4
SP		 2980 status = be_tx_qs_create(adapter);
2981 if (status)
2982 goto err;
2983
04b71175 2984 be_cmd_get_fw_ver(adapter, adapter->fw_ver, NULL);
5a56eb10 2985
1d1e9a46 2986 if (adapter->vlans_added)
10329df8 2987 be_vid_config(adapter);
7ab8b0b4 2988
a54769f5 2989 be_set_rx_mode(adapter->netdev);
5fb379ee 2990
ddc3f5cb 2991 be_cmd_get_flow_control(adapter, &tx_fc, &rx_fc);
590c391d 2992
ddc3f5cb
AK		 2993 if (rx_fc != adapter->rx_fc || tx_fc != adapter->tx_fc)
2994 be_cmd_set_flow_control(adapter, adapter->tx_fc,
a54769f5 2995 adapter->rx_fc);
2dc1deb6 2996
39f1d94d
SP		 2997 if (be_physfn(adapter) && num_vfs) {
2998 if (adapter->dev_num_vfs)
2999 be_vf_setup(adapter);
3000 else
3001 dev_warn(dev, "device doesn't support SRIOV\n");
f9449ab7
SP		 3002 }
3003
f25b119c
PR		 3004 status = be_cmd_get_phy_info(adapter);
3005 if (!status && be_pause_supported(adapter))
42f11cf2
AK		 3006 adapter->phy.fc_autoneg = 1;
3007
191eb756
SP		 3008 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
3009 adapter->flags |= BE_FLAGS_WORKER_SCHEDULED;
f9449ab7 3010 return 0;
a54769f5
SP		 3011err:
3012 be_clear(adapter);
3013 return status;
3014}
6b7c5b94 3015
66268739
IV		 3016#ifdef CONFIG_NET_POLL_CONTROLLER
3017static void be_netpoll(struct net_device *netdev)
3018{
3019 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4 3020 struct be_eq_obj *eqo;
66268739
IV		 3021 int i;
3022
10ef9ab4
SP		 3023 for_all_evt_queues(adapter, eqo, i)
3024 event_handle(eqo);
3025
3026 return;
66268739
IV		 3027}
3028#endif
3029
84517482 3030#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
c165541e
PR		 3031char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};
3032
fa9a6fed 3033static bool be_flash_redboot(struct be_adapter *adapter,
3f0d4560
AK		 3034 const u8 *p, u32 img_start, int image_size,
3035 int hdr_size)
fa9a6fed
SB		 3036{
3037 u32 crc_offset;
3038 u8 flashed_crc[4];
3039 int status;
3f0d4560
AK		 3040
3041 crc_offset = hdr_size + img_start + image_size - 4;
3042
fa9a6fed 3043 p += crc_offset;
3f0d4560
AK		 3044
3045 status = be_cmd_get_flash_crc(adapter, flashed_crc,
f510fc64 3046 (image_size - 4));
fa9a6fed
SB		 3047 if (status) {
3048 dev_err(&adapter->pdev->dev,
3049 "could not get crc from flash, not flashing redboot\n");
3050 return false;
3051 }
3052
3053 /*update redboot only if crc does not match*/
3054 if (!memcmp(flashed_crc, p, 4))
3055 return false;
3056 else
3057 return true;
fa9a6fed
SB		 3058}
3059
306f1348
SP		 3060static bool phy_flashing_required(struct be_adapter *adapter)
3061{
42f11cf2
AK		 3062 return (adapter->phy.phy_type == TN_8022 &&
3063 adapter->phy.interface_type == PHY_TYPE_BASET_10GB);
306f1348
SP		 3064}
3065
c165541e
PR		 3066static bool is_comp_in_ufi(struct be_adapter *adapter,
3067 struct flash_section_info *fsec, int type)
3068{
3069 int i = 0, img_type = 0;
3070 struct flash_section_info_g2 *fsec_g2 = NULL;
3071
ca34fe38 3072 if (BE2_chip(adapter))
c165541e
PR		 3073 fsec_g2 = (struct flash_section_info_g2 *)fsec;
3074
3075 for (i = 0; i < MAX_FLASH_COMP; i++) {
3076 if (fsec_g2)
3077 img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type);
3078 else
3079 img_type = le32_to_cpu(fsec->fsec_entry[i].type);
3080
3081 if (img_type == type)
3082 return true;
3083 }
3084 return false;
3085
3086}
3087
3088struct flash_section_info *get_fsec_info(struct be_adapter *adapter,
3089 int header_size,
3090 const struct firmware *fw)
3091{
3092 struct flash_section_info *fsec = NULL;
3093 const u8 *p = fw->data;
3094
3095 p += header_size;
3096 while (p < (fw->data + fw->size)) {
3097 fsec = (struct flash_section_info *)p;
3098 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie)))
3099 return fsec;
3100 p += 32;
3101 }
3102 return NULL;
3103}
3104
773a2d7c
PR		 3105static int be_flash(struct be_adapter *adapter, const u8 *img,
3106 struct be_dma_mem *flash_cmd, int optype, int img_size)
3107{
3108 u32 total_bytes = 0, flash_op, num_bytes = 0;
3109 int status = 0;
3110 struct be_cmd_write_flashrom *req = flash_cmd->va;
3111
3112 total_bytes = img_size;
3113 while (total_bytes) {
3114 num_bytes = min_t(u32, 32*1024, total_bytes);
3115
3116 total_bytes -= num_bytes;
3117
3118 if (!total_bytes) {
3119 if (optype == OPTYPE_PHY_FW)
3120 flash_op = FLASHROM_OPER_PHY_FLASH;
3121 else
3122 flash_op = FLASHROM_OPER_FLASH;
3123 } else {
3124 if (optype == OPTYPE_PHY_FW)
3125 flash_op = FLASHROM_OPER_PHY_SAVE;
3126 else
3127 flash_op = FLASHROM_OPER_SAVE;
3128 }
3129
be716446 3130 memcpy(req->data_buf, img, num_bytes);
773a2d7c
PR		 3131 img += num_bytes;
3132 status = be_cmd_write_flashrom(adapter, flash_cmd, optype,
3133 flash_op, num_bytes);
3134 if (status) {
3135 if (status == ILLEGAL_IOCTL_REQ &&
3136 optype == OPTYPE_PHY_FW)
3137 break;
3138 dev_err(&adapter->pdev->dev,
3139 "cmd to write to flash rom failed.\n");
3140 return status;
3141 }
3142 }
3143 return 0;
3144}
3145
ca34fe38
SP		 3146/* For BE2 and BE3 */
3147static int be_flash_BEx(struct be_adapter *adapter,
c165541e
PR		 3148 const struct firmware *fw,
3149 struct be_dma_mem *flash_cmd,
3150 int num_of_images)
3f0d4560 3151
84517482 3152{
3f0d4560 3153 int status = 0, i, filehdr_size = 0;
c165541e 3154 int img_hdrs_size = (num_of_images * sizeof(struct image_hdr));
84517482 3155 const u8 *p = fw->data;
215faf9c 3156 const struct flash_comp *pflashcomp;
773a2d7c 3157 int num_comp, redboot;
c165541e
PR		 3158 struct flash_section_info *fsec = NULL;
3159
3160 struct flash_comp gen3_flash_types[] = {
3161 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, OPTYPE_ISCSI_ACTIVE,
3162 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_iSCSI},
3163 { FLASH_REDBOOT_START_g3, OPTYPE_REDBOOT,
3164 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3, IMAGE_BOOT_CODE},
3165 { FLASH_iSCSI_BIOS_START_g3, OPTYPE_BIOS,
3166 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_ISCSI},
3167 { FLASH_PXE_BIOS_START_g3, OPTYPE_PXE_BIOS,
3168 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_PXE},
3169 { FLASH_FCoE_BIOS_START_g3, OPTYPE_FCOE_BIOS,
3170 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_FCoE},
3171 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, OPTYPE_ISCSI_BACKUP,
3172 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_iSCSI},
3173 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, OPTYPE_FCOE_FW_ACTIVE,
3174 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_FCoE},
3175 { FLASH_FCoE_BACKUP_IMAGE_START_g3, OPTYPE_FCOE_FW_BACKUP,
3176 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_FCoE},
3177 { FLASH_NCSI_START_g3, OPTYPE_NCSI_FW,
3178 FLASH_NCSI_IMAGE_MAX_SIZE_g3, IMAGE_NCSI},
3179 { FLASH_PHY_FW_START_g3, OPTYPE_PHY_FW,
3180 FLASH_PHY_FW_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_PHY}
3f0d4560 3181 };
c165541e
PR		 3182
3183 struct flash_comp gen2_flash_types[] = {
3184 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, OPTYPE_ISCSI_ACTIVE,
3185 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_iSCSI},
3186 { FLASH_REDBOOT_START_g2, OPTYPE_REDBOOT,
3187 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2, IMAGE_BOOT_CODE},
3188 { FLASH_iSCSI_BIOS_START_g2, OPTYPE_BIOS,
3189 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_ISCSI},
3190 { FLASH_PXE_BIOS_START_g2, OPTYPE_PXE_BIOS,
3191 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_PXE},
3192 { FLASH_FCoE_BIOS_START_g2, OPTYPE_FCOE_BIOS,
3193 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_FCoE},
3194 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, OPTYPE_ISCSI_BACKUP,
3195 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_iSCSI},
3196 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, OPTYPE_FCOE_FW_ACTIVE,
3197 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_FCoE},
3198 { FLASH_FCoE_BACKUP_IMAGE_START_g2, OPTYPE_FCOE_FW_BACKUP,
3199 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_FCoE}
3f0d4560
AK		 3200 };
3201
ca34fe38 3202 if (BE3_chip(adapter)) {
3f0d4560
AK		 3203 pflashcomp = gen3_flash_types;
3204 filehdr_size = sizeof(struct flash_file_hdr_g3);
215faf9c 3205 num_comp = ARRAY_SIZE(gen3_flash_types);
3f0d4560
AK		 3206 } else {
3207 pflashcomp = gen2_flash_types;
3208 filehdr_size = sizeof(struct flash_file_hdr_g2);
215faf9c 3209 num_comp = ARRAY_SIZE(gen2_flash_types);
84517482 3210 }
ca34fe38 3211
c165541e
PR		 3212 /* Get flash section info*/
3213 fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);
3214 if (!fsec) {
3215 dev_err(&adapter->pdev->dev,
3216 "Invalid Cookie. UFI corrupted ?\n");
3217 return -1;
3218 }
9fe96934 3219 for (i = 0; i < num_comp; i++) {
c165541e 3220 if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type))
9fe96934 3221 continue;
c165541e
PR		 3222
3223 if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) &&
3224 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
3225 continue;
3226
773a2d7c
PR		 3227 if (pflashcomp[i].optype == OPTYPE_PHY_FW &&
3228 !phy_flashing_required(adapter))
306f1348 3229 continue;
c165541e 3230
773a2d7c
PR		 3231 if (pflashcomp[i].optype == OPTYPE_REDBOOT) {
3232 redboot = be_flash_redboot(adapter, fw->data,
3233 pflashcomp[i].offset, pflashcomp[i].size,
3234 filehdr_size + img_hdrs_size);
3235 if (!redboot)
3236 continue;
3237 }
c165541e 3238
3f0d4560 3239 p = fw->data;
c165541e 3240 p += filehdr_size + pflashcomp[i].offset + img_hdrs_size;
306f1348
SP		 3241 if (p + pflashcomp[i].size > fw->data + fw->size)
3242 return -1;
773a2d7c
PR		 3243
3244 status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype,
3245 pflashcomp[i].size);
3246 if (status) {
3247 dev_err(&adapter->pdev->dev,
3248 "Flashing section type %d failed.\n",
3249 pflashcomp[i].img_type);
3250 return status;
84517482 3251 }
84517482 3252 }
84517482
AK		 3253 return 0;
3254}
3255
773a2d7c
PR		 3256static int be_flash_skyhawk(struct be_adapter *adapter,
3257 const struct firmware *fw,
3258 struct be_dma_mem *flash_cmd, int num_of_images)
3f0d4560 3259{
773a2d7c
PR		 3260 int status = 0, i, filehdr_size = 0;
3261 int img_offset, img_size, img_optype, redboot;
3262 int img_hdrs_size = num_of_images * sizeof(struct image_hdr);
3263 const u8 *p = fw->data;
3264 struct flash_section_info *fsec = NULL;
3265
3266 filehdr_size = sizeof(struct flash_file_hdr_g3);
3267 fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);
3268 if (!fsec) {
3269 dev_err(&adapter->pdev->dev,
3270 "Invalid Cookie. UFI corrupted ?\n");
3271 return -1;
3272 }
3273
3274 for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) {
3275 img_offset = le32_to_cpu(fsec->fsec_entry[i].offset);
3276 img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size);
3277
3278 switch (le32_to_cpu(fsec->fsec_entry[i].type)) {
3279 case IMAGE_FIRMWARE_iSCSI:
3280 img_optype = OPTYPE_ISCSI_ACTIVE;
3281 break;
3282 case IMAGE_BOOT_CODE:
3283 img_optype = OPTYPE_REDBOOT;
3284 break;
3285 case IMAGE_OPTION_ROM_ISCSI:
3286 img_optype = OPTYPE_BIOS;
3287 break;
3288 case IMAGE_OPTION_ROM_PXE:
3289 img_optype = OPTYPE_PXE_BIOS;
3290 break;
3291 case IMAGE_OPTION_ROM_FCoE:
3292 img_optype = OPTYPE_FCOE_BIOS;
3293 break;
3294 case IMAGE_FIRMWARE_BACKUP_iSCSI:
3295 img_optype = OPTYPE_ISCSI_BACKUP;
3296 break;
3297 case IMAGE_NCSI:
3298 img_optype = OPTYPE_NCSI_FW;
3299 break;
3300 default:
3301 continue;
3302 }
3303
3304 if (img_optype == OPTYPE_REDBOOT) {
3305 redboot = be_flash_redboot(adapter, fw->data,
3306 img_offset, img_size,
3307 filehdr_size + img_hdrs_size);
3308 if (!redboot)
3309 continue;
3310 }
3311
3312 p = fw->data;
3313 p += filehdr_size + img_offset + img_hdrs_size;
3314 if (p + img_size > fw->data + fw->size)
3315 return -1;
3316
3317 status = be_flash(adapter, p, flash_cmd, img_optype, img_size);
3318 if (status) {
3319 dev_err(&adapter->pdev->dev,
3320 "Flashing section type %d failed.\n",
3321 fsec->fsec_entry[i].type);
3322 return status;
3323 }
3324 }
3325 return 0;
3f0d4560
AK		 3326}
3327
f67ef7ba
PR		 3328static int lancer_wait_idle(struct be_adapter *adapter)
3329{
3330#define SLIPORT_IDLE_TIMEOUT 30
3331 u32 reg_val;
3332 int status = 0, i;
3333
3334 for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) {
3335 reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET);
3336 if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0)
3337 break;
3338
3339 ssleep(1);
3340 }
3341
3342 if (i == SLIPORT_IDLE_TIMEOUT)
3343 status = -1;
3344
3345 return status;
3346}
3347
3348static int lancer_fw_reset(struct be_adapter *adapter)
3349{
3350 int status = 0;
3351
3352 status = lancer_wait_idle(adapter);
3353 if (status)
3354 return status;
3355
3356 iowrite32(PHYSDEV_CONTROL_FW_RESET_MASK, adapter->db +
3357 PHYSDEV_CONTROL_OFFSET);
3358
3359 return status;
3360}
3361
485bf569
SN		 3362static int lancer_fw_download(struct be_adapter *adapter,
3363 const struct firmware *fw)
84517482 3364{
485bf569
SN		 3365#define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024)
3366#define LANCER_FW_DOWNLOAD_LOCATION "/prg"
84517482 3367 struct be_dma_mem flash_cmd;
485bf569
SN		 3368 const u8 *data_ptr = NULL;
3369 u8 *dest_image_ptr = NULL;
3370 size_t image_size = 0;
3371 u32 chunk_size = 0;
3372 u32 data_written = 0;
3373 u32 offset = 0;
3374 int status = 0;
3375 u8 add_status = 0;
f67ef7ba 3376 u8 change_status;
84517482 3377
485bf569 3378 if (!IS_ALIGNED(fw->size, sizeof(u32))) {
d9efd2af 3379 dev_err(&adapter->pdev->dev,
485bf569
SN		 3380 "FW Image not properly aligned. "
3381 "Length must be 4 byte aligned.\n");
3382 status = -EINVAL;
3383 goto lancer_fw_exit;
d9efd2af
SB		 3384 }
3385
485bf569
SN		 3386 flash_cmd.size = sizeof(struct lancer_cmd_req_write_object)
3387 + LANCER_FW_DOWNLOAD_CHUNK;
3388 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
3389 &flash_cmd.dma, GFP_KERNEL);
3390 if (!flash_cmd.va) {
3391 status = -ENOMEM;
3392 dev_err(&adapter->pdev->dev,
3393 "Memory allocation failure while flashing\n");
3394 goto lancer_fw_exit;
3395 }
84517482 3396
485bf569
SN		 3397 dest_image_ptr = flash_cmd.va +
3398 sizeof(struct lancer_cmd_req_write_object);
3399 image_size = fw->size;
3400 data_ptr = fw->data;
3401
3402 while (image_size) {
3403 chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK);
3404
3405 /* Copy the image chunk content. */
3406 memcpy(dest_image_ptr, data_ptr, chunk_size);
3407
3408 status = lancer_cmd_write_object(adapter, &flash_cmd,
f67ef7ba
PR		 3409 chunk_size, offset,
3410 LANCER_FW_DOWNLOAD_LOCATION,
3411 &data_written, &change_status,
3412 &add_status);
485bf569
SN		 3413 if (status)
3414 break;
3415
3416 offset += data_written;
3417 data_ptr += data_written;
3418 image_size -= data_written;
3419 }
3420
3421 if (!status) {
3422 /* Commit the FW written */
3423 status = lancer_cmd_write_object(adapter, &flash_cmd,
f67ef7ba
PR		 3424 0, offset,
3425 LANCER_FW_DOWNLOAD_LOCATION,
3426 &data_written, &change_status,
3427 &add_status);
485bf569
SN		 3428 }
3429
3430 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
3431 flash_cmd.dma);
3432 if (status) {
3433 dev_err(&adapter->pdev->dev,
3434 "Firmware load error. "
3435 "Status code: 0x%x Additional Status: 0x%x\n",
3436 status, add_status);
3437 goto lancer_fw_exit;
3438 }
3439
f67ef7ba
PR		 3440 if (change_status == LANCER_FW_RESET_NEEDED) {
3441 status = lancer_fw_reset(adapter);
3442 if (status) {
3443 dev_err(&adapter->pdev->dev,
3444 "Adapter busy for FW reset.\n"
3445 "New FW will not be active.\n");
3446 goto lancer_fw_exit;
3447 }
3448 } else if (change_status != LANCER_NO_RESET_NEEDED) {
3449 dev_err(&adapter->pdev->dev,
3450 "System reboot required for new FW"
3451 " to be active\n");
3452 }
3453
485bf569
SN		 3454 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
3455lancer_fw_exit:
3456 return status;
3457}
3458
ca34fe38
SP		 3459#define UFI_TYPE2 2
3460#define UFI_TYPE3 3
3461#define UFI_TYPE4 4
3462static int be_get_ufi_type(struct be_adapter *adapter,
3463 struct flash_file_hdr_g2 *fhdr)
773a2d7c
PR		 3464{
3465 if (fhdr == NULL)
3466 goto be_get_ufi_exit;
3467
ca34fe38
SP		 3468 if (skyhawk_chip(adapter) && fhdr->build[0] == '4')
3469 return UFI_TYPE4;
3470 else if (BE3_chip(adapter) && fhdr->build[0] == '3')
3471 return UFI_TYPE3;
3472 else if (BE2_chip(adapter) && fhdr->build[0] == '2')
3473 return UFI_TYPE2;
773a2d7c
PR		 3474
3475be_get_ufi_exit:
3476 dev_err(&adapter->pdev->dev,
3477 "UFI and Interface are not compatible for flashing\n");
3478 return -1;
3479}
3480
485bf569
SN		 3481static int be_fw_download(struct be_adapter *adapter, const struct firmware* fw)
3482{
3483 struct flash_file_hdr_g2 *fhdr;
3484 struct flash_file_hdr_g3 *fhdr3;
3485 struct image_hdr *img_hdr_ptr = NULL;
3486 struct be_dma_mem flash_cmd;
3487 const u8 *p;
773a2d7c 3488 int status = 0, i = 0, num_imgs = 0, ufi_type = 0;
84517482 3489
be716446 3490 flash_cmd.size = sizeof(struct be_cmd_write_flashrom);
2b7bcebf
IV		 3491 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
3492 &flash_cmd.dma, GFP_KERNEL);
84517482
AK		 3493 if (!flash_cmd.va) {
3494 status = -ENOMEM;
3495 dev_err(&adapter->pdev->dev,
3496 "Memory allocation failure while flashing\n");
485bf569 3497 goto be_fw_exit;
84517482
AK		 3498 }
3499
773a2d7c
PR		 3500 p = fw->data;
3501 fhdr = (struct flash_file_hdr_g2 *)p;
3502
ca34fe38 3503 ufi_type = be_get_ufi_type(adapter, fhdr);
773a2d7c
PR		 3504
3505 fhdr3 = (struct flash_file_hdr_g3 *)fw->data;
3506 num_imgs = le32_to_cpu(fhdr3->num_imgs);
3507 for (i = 0; i < num_imgs; i++) {
3508 img_hdr_ptr = (struct image_hdr *)(fw->data +
3509 (sizeof(struct flash_file_hdr_g3) +
3510 i * sizeof(struct image_hdr)));
3511 if (le32_to_cpu(img_hdr_ptr->imageid) == 1) {
ca34fe38 3512 if (ufi_type == UFI_TYPE4)
773a2d7c
PR		 3513 status = be_flash_skyhawk(adapter, fw,
3514 &flash_cmd, num_imgs);
ca34fe38
SP		 3515 else if (ufi_type == UFI_TYPE3)
3516 status = be_flash_BEx(adapter, fw, &flash_cmd,
3517 num_imgs);
3f0d4560 3518 }
773a2d7c
PR		 3519 }
3520
ca34fe38
SP		 3521 if (ufi_type == UFI_TYPE2)
3522 status = be_flash_BEx(adapter, fw, &flash_cmd, 0);
773a2d7c 3523 else if (ufi_type == -1)
3f0d4560 3524 status = -1;
84517482 3525
2b7bcebf
IV		 3526 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
3527 flash_cmd.dma);
84517482
AK		 3528 if (status) {
3529 dev_err(&adapter->pdev->dev, "Firmware load error\n");
485bf569 3530 goto be_fw_exit;
84517482
AK		 3531 }
3532
af901ca1 3533 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
84517482 3534
485bf569
SN		 3535be_fw_exit:
3536 return status;
3537}
3538
3539int be_load_fw(struct be_adapter *adapter, u8 *fw_file)
3540{
3541 const struct firmware *fw;
3542 int status;
3543
3544 if (!netif_running(adapter->netdev)) {
3545 dev_err(&adapter->pdev->dev,
3546 "Firmware load not allowed (interface is down)\n");
3547 return -1;
3548 }
3549
3550 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
3551 if (status)
3552 goto fw_exit;
3553
3554 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
3555
3556 if (lancer_chip(adapter))
3557 status = lancer_fw_download(adapter, fw);
3558 else
3559 status = be_fw_download(adapter, fw);
3560
84517482
AK		 3561fw_exit:
3562 release_firmware(fw);
3563 return status;
3564}
3565
e5686ad8 3566static const struct net_device_ops be_netdev_ops = {
6b7c5b94
SP		 3567 .ndo_open = be_open,
3568 .ndo_stop = be_close,
3569 .ndo_start_xmit = be_xmit,
a54769f5 3570 .ndo_set_rx_mode = be_set_rx_mode,
6b7c5b94
SP		 3571 .ndo_set_mac_address = be_mac_addr_set,
3572 .ndo_change_mtu = be_change_mtu,
ab1594e9 3573 .ndo_get_stats64 = be_get_stats64,
6b7c5b94 3574 .ndo_validate_addr = eth_validate_addr,
6b7c5b94
SP		 3575 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
3576 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
64600ea5 3577 .ndo_set_vf_mac = be_set_vf_mac,
1da87b7f 3578 .ndo_set_vf_vlan = be_set_vf_vlan,
e1d18735 3579 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
66268739
IV		 3580 .ndo_get_vf_config = be_get_vf_config,
3581#ifdef CONFIG_NET_POLL_CONTROLLER
3582 .ndo_poll_controller = be_netpoll,
3583#endif
6b7c5b94
SP		 3584};
3585
3586static void be_netdev_init(struct net_device *netdev)
3587{
3588 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4 3589 struct be_eq_obj *eqo;
3abcdeda 3590 int i;
6b7c5b94 3591
6332c8d3 3592 netdev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
8b8ddc68
MM		 3593 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
3594 NETIF_F_HW_VLAN_TX;
3595 if (be_multi_rxq(adapter))
3596 netdev->hw_features |= NETIF_F_RXHASH;
6332c8d3
MM		 3597
3598 netdev->features |= netdev->hw_features |
8b8ddc68 3599 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
4b972914 3600
eb8a50d9 3601 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
79032644 3602 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
51c59870 3603
fbc13f01
AK		 3604 netdev->priv_flags |= IFF_UNICAST_FLT;
3605
6b7c5b94
SP		 3606 netdev->flags |= IFF_MULTICAST;
3607
b7e5887e 3608 netif_set_gso_max_size(netdev, 65535 - ETH_HLEN);
c190e3c8 3609
10ef9ab4 3610 netdev->netdev_ops = &be_netdev_ops;
6b7c5b94
SP		 3611
3612 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
3613
10ef9ab4
SP		 3614 for_all_evt_queues(adapter, eqo, i)
3615 netif_napi_add(netdev, &eqo->napi, be_poll, BE_NAPI_WEIGHT);
6b7c5b94
SP		 3616}
3617
3618static void be_unmap_pci_bars(struct be_adapter *adapter)
3619{
8788fdc2 3620 if (adapter->db)
ce66f781 3621 pci_iounmap(adapter->pdev, adapter->db);
045508a8
PP		 3622}
3623
ce66f781
SP		 3624static int db_bar(struct be_adapter *adapter)
3625{
3626 if (lancer_chip(adapter) || !be_physfn(adapter))
3627 return 0;
3628 else
3629 return 4;
3630}
3631
3632static int be_roce_map_pci_bars(struct be_adapter *adapter)
045508a8 3633{
dbf0f2a7 3634 if (skyhawk_chip(adapter)) {
ce66f781
SP		 3635 adapter->roce_db.size = 4096;
3636 adapter->roce_db.io_addr = pci_resource_start(adapter->pdev,
3637 db_bar(adapter));
3638 adapter->roce_db.total_size = pci_resource_len(adapter->pdev,
3639 db_bar(adapter));
3640 }
045508a8 3641 return 0;
6b7c5b94
SP		 3642}
3643
3644static int be_map_pci_bars(struct be_adapter *adapter)
3645{
3646 u8 __iomem *addr;
ce66f781 3647 u32 sli_intf;
6b7c5b94 3648
ce66f781
SP		 3649 pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3650 adapter->if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
3651 SLI_INTF_IF_TYPE_SHIFT;
fe6d2a38 3652
ce66f781 3653 addr = pci_iomap(adapter->pdev, db_bar(adapter), 0);
6b7c5b94
SP		 3654 if (addr == NULL)
3655 goto pci_map_err;
ba343c77 3656 adapter->db = addr;
ce66f781
SP		 3657
3658 be_roce_map_pci_bars(adapter);
6b7c5b94 3659 return 0;
ce66f781 3660
6b7c5b94
SP		 3661pci_map_err:
3662 be_unmap_pci_bars(adapter);
3663 return -ENOMEM;
3664}
3665
6b7c5b94
SP		 3666static void be_ctrl_cleanup(struct be_adapter *adapter)
3667{
8788fdc2 3668 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 3669
3670 be_unmap_pci_bars(adapter);
3671
3672 if (mem->va)
2b7bcebf
IV		 3673 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3674 mem->dma);
e7b909a6 3675
5b8821b7 3676 mem = &adapter->rx_filter;
e7b909a6 3677 if (mem->va)
2b7bcebf
IV		 3678 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3679 mem->dma);
6b7c5b94
SP		 3680}
3681
6b7c5b94
SP		 3682static int be_ctrl_init(struct be_adapter *adapter)
3683{
8788fdc2
SP		 3684 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
3685 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
5b8821b7 3686 struct be_dma_mem *rx_filter = &adapter->rx_filter;
ce66f781 3687 u32 sli_intf;
6b7c5b94 3688 int status;
6b7c5b94 3689
ce66f781
SP		 3690 pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3691 adapter->sli_family = (sli_intf & SLI_INTF_FAMILY_MASK) >>
3692 SLI_INTF_FAMILY_SHIFT;
3693 adapter->virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
3694
6b7c5b94
SP		 3695 status = be_map_pci_bars(adapter);
3696 if (status)
e7b909a6 3697 goto done;
6b7c5b94
SP		 3698
3699 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2b7bcebf
IV		 3700 mbox_mem_alloc->va = dma_alloc_coherent(&adapter->pdev->dev,
3701 mbox_mem_alloc->size,
3702 &mbox_mem_alloc->dma,
3703 GFP_KERNEL);
6b7c5b94 3704 if (!mbox_mem_alloc->va) {
e7b909a6
SP		 3705 status = -ENOMEM;
3706 goto unmap_pci_bars;
6b7c5b94
SP		 3707 }
3708 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
3709 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
3710 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
3711 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6 3712
5b8821b7
SP		 3713 rx_filter->size = sizeof(struct be_cmd_req_rx_filter);
3714 rx_filter->va = dma_alloc_coherent(&adapter->pdev->dev, rx_filter->size,
3715 &rx_filter->dma, GFP_KERNEL);
3716 if (rx_filter->va == NULL) {
e7b909a6
SP		 3717 status = -ENOMEM;
3718 goto free_mbox;
3719 }
5b8821b7 3720 memset(rx_filter->va, 0, rx_filter->size);
2984961c 3721 mutex_init(&adapter->mbox_lock);
8788fdc2
SP		 3722 spin_lock_init(&adapter->mcc_lock);
3723 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 3724
dd131e76 3725 init_completion(&adapter->flash_compl);
cf588477 3726 pci_save_state(adapter->pdev);
6b7c5b94 3727 return 0;
e7b909a6
SP		 3728
3729free_mbox:
2b7bcebf
IV		 3730 dma_free_coherent(&adapter->pdev->dev, mbox_mem_alloc->size,
3731 mbox_mem_alloc->va, mbox_mem_alloc->dma);
e7b909a6
SP		 3732
3733unmap_pci_bars:
3734 be_unmap_pci_bars(adapter);
3735
3736done:
3737 return status;
6b7c5b94
SP		 3738}
3739
3740static void be_stats_cleanup(struct be_adapter *adapter)
3741{
3abcdeda 3742 struct be_dma_mem *cmd = &adapter->stats_cmd;
6b7c5b94
SP		 3743
3744 if (cmd->va)
2b7bcebf
IV		 3745 dma_free_coherent(&adapter->pdev->dev, cmd->size,
3746 cmd->va, cmd->dma);
6b7c5b94
SP		 3747}
3748
3749static int be_stats_init(struct be_adapter *adapter)
3750{
3abcdeda 3751 struct be_dma_mem *cmd = &adapter->stats_cmd;
6b7c5b94 3752
ca34fe38
SP		 3753 if (lancer_chip(adapter))
3754 cmd->size = sizeof(struct lancer_cmd_req_pport_stats);
3755 else if (BE2_chip(adapter))
89a88ab8 3756 cmd->size = sizeof(struct be_cmd_req_get_stats_v0);
ca34fe38
SP		 3757 else
3758 /* BE3 and Skyhawk */
3759 cmd->size = sizeof(struct be_cmd_req_get_stats_v1);
3760
2b7bcebf
IV		 3761 cmd->va = dma_alloc_coherent(&adapter->pdev->dev, cmd->size, &cmd->dma,
3762 GFP_KERNEL);
6b7c5b94
SP		 3763 if (cmd->va == NULL)
3764 return -1;
d291b9af 3765 memset(cmd->va, 0, cmd->size);
6b7c5b94
SP		 3766 return 0;
3767}
3768
3769static void __devexit be_remove(struct pci_dev *pdev)
3770{
3771 struct be_adapter *adapter = pci_get_drvdata(pdev);
8d56ff11 3772
6b7c5b94
SP		 3773 if (!adapter)
3774 return;
3775
045508a8
PP		 3776 be_roce_dev_remove(adapter);
3777
f67ef7ba
PR		 3778 cancel_delayed_work_sync(&adapter->func_recovery_work);
3779
6b7c5b94
SP		 3780 unregister_netdev(adapter->netdev);
3781
5fb379ee
SP		 3782 be_clear(adapter);
3783
bf99e50d
PR		 3784 /* tell fw we're done with firing cmds */
3785 be_cmd_fw_clean(adapter);
3786
6b7c5b94
SP		 3787 be_stats_cleanup(adapter);
3788
3789 be_ctrl_cleanup(adapter);
3790
d6b6d987
SP		 3791 pci_disable_pcie_error_reporting(pdev);
3792
6b7c5b94
SP		 3793 pci_set_drvdata(pdev, NULL);
3794 pci_release_regions(pdev);
3795 pci_disable_device(pdev);
3796
3797 free_netdev(adapter->netdev);
3798}
3799
4762f6ce
AK		 3800bool be_is_wol_supported(struct be_adapter *adapter)
3801{
3802 return ((adapter->wol_cap & BE_WOL_CAP) &&
3803 !be_is_wol_excluded(adapter)) ? true : false;
3804}
3805
941a77d5
SK		 3806u32 be_get_fw_log_level(struct be_adapter *adapter)
3807{
3808 struct be_dma_mem extfat_cmd;
3809 struct be_fat_conf_params *cfgs;
3810 int status;
3811 u32 level = 0;
3812 int j;
3813
f25b119c
PR		 3814 if (lancer_chip(adapter))
3815 return 0;
3816
941a77d5
SK		 3817 memset(&extfat_cmd, 0, sizeof(struct be_dma_mem));
3818 extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);
3819 extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size,
3820 &extfat_cmd.dma);
3821
3822 if (!extfat_cmd.va) {
3823 dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n",
3824 __func__);
3825 goto err;
3826 }
3827
3828 status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd);
3829 if (!status) {
3830 cfgs = (struct be_fat_conf_params *)(extfat_cmd.va +
3831 sizeof(struct be_cmd_resp_hdr));
ac46a462 3832 for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) {
941a77d5
SK		 3833 if (cfgs->module[0].trace_lvl[j].mode == MODE_UART)
3834 level = cfgs->module[0].trace_lvl[j].dbg_lvl;
3835 }
3836 }
3837 pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va,
3838 extfat_cmd.dma);
3839err:
3840 return level;
3841}
abb93951 3842
39f1d94d 3843static int be_get_initial_config(struct be_adapter *adapter)
6b7c5b94 3844{
6b7c5b94 3845 int status;
941a77d5 3846 u32 level;
6b7c5b94 3847
9e1453c5
AK		 3848 status = be_cmd_get_cntl_attributes(adapter);
3849 if (status)
3850 return status;
3851
4762f6ce
AK		 3852 status = be_cmd_get_acpi_wol_cap(adapter);
3853 if (status) {
3854 /* in case of a failure to get wol capabillities
3855 * check the exclusion list to determine WOL capability */
3856 if (!be_is_wol_excluded(adapter))
3857 adapter->wol_cap |= BE_WOL_CAP;
3858 }
3859
3860 if (be_is_wol_supported(adapter))
3861 adapter->wol = true;
3862
7aeb2156
PR		 3863 /* Must be a power of 2 or else MODULO will BUG_ON */
3864 adapter->be_get_temp_freq = 64;
3865
941a77d5
SK		 3866 level = be_get_fw_log_level(adapter);
3867 adapter->msg_enable = level <= FW_LOG_LEVEL_DEFAULT ? NETIF_MSG_HW : 0;
3868
2243e2e9 3869 return 0;
6b7c5b94
SP		 3870}
3871
f67ef7ba 3872static int lancer_recover_func(struct be_adapter *adapter)
d8110f62
PR		 3873{
3874 int status;
d8110f62 3875
f67ef7ba
PR		 3876 status = lancer_test_and_set_rdy_state(adapter);
3877 if (status)
3878 goto err;
d8110f62 3879
f67ef7ba
PR		 3880 if (netif_running(adapter->netdev))
3881 be_close(adapter->netdev);
d8110f62 3882
f67ef7ba
PR		 3883 be_clear(adapter);
3884
3885 adapter->hw_error = false;
3886 adapter->fw_timeout = false;
3887
3888 status = be_setup(adapter);
3889 if (status)
3890 goto err;
d8110f62 3891
f67ef7ba
PR		 3892 if (netif_running(adapter->netdev)) {
3893 status = be_open(adapter->netdev);
d8110f62
PR		 3894 if (status)
3895 goto err;
f67ef7ba 3896 }
d8110f62 3897
f67ef7ba
PR		 3898 dev_err(&adapter->pdev->dev,
3899 "Adapter SLIPORT recovery succeeded\n");
3900 return 0;
3901err:
67297ad8
PR		 3902 if (adapter->eeh_error)
3903 dev_err(&adapter->pdev->dev,
3904 "Adapter SLIPORT recovery failed\n");
d8110f62 3905
f67ef7ba
PR		 3906 return status;
3907}
3908
3909static void be_func_recovery_task(struct work_struct *work)
3910{
3911 struct be_adapter *adapter =
3912 container_of(work, struct be_adapter, func_recovery_work.work);
3913 int status;
d8110f62 3914
f67ef7ba 3915 be_detect_error(adapter);
d8110f62 3916
f67ef7ba 3917 if (adapter->hw_error && lancer_chip(adapter)) {
d8110f62 3918
f67ef7ba
PR		 3919 if (adapter->eeh_error)
3920 goto out;
d8110f62 3921
f67ef7ba
PR		 3922 rtnl_lock();
3923 netif_device_detach(adapter->netdev);
3924 rtnl_unlock();
d8110f62 3925
f67ef7ba 3926 status = lancer_recover_func(adapter);
d8110f62 3927
f67ef7ba
PR		 3928 if (!status)
3929 netif_device_attach(adapter->netdev);
d8110f62 3930 }
f67ef7ba
PR		 3931
3932out:
3933 schedule_delayed_work(&adapter->func_recovery_work,
3934 msecs_to_jiffies(1000));
d8110f62
PR		 3935}
3936
3937static void be_worker(struct work_struct *work)
3938{
3939 struct be_adapter *adapter =
3940 container_of(work, struct be_adapter, work.work);
3941 struct be_rx_obj *rxo;
10ef9ab4 3942 struct be_eq_obj *eqo;
d8110f62
PR		 3943 int i;
3944
d8110f62
PR		 3945 /* when interrupts are not yet enabled, just reap any pending
3946 * mcc completions */
3947 if (!netif_running(adapter->netdev)) {
072a9c48 3948 local_bh_disable();
10ef9ab4 3949 be_process_mcc(adapter);
072a9c48 3950 local_bh_enable();
d8110f62
PR		 3951 goto reschedule;
3952 }
3953
3954 if (!adapter->stats_cmd_sent) {
3955 if (lancer_chip(adapter))
3956 lancer_cmd_get_pport_stats(adapter,
3957 &adapter->stats_cmd);
3958 else
3959 be_cmd_get_stats(adapter, &adapter->stats_cmd);
3960 }
3961
7aeb2156
PR		 3962 if (MODULO(adapter->work_counter, adapter->be_get_temp_freq) == 0)
3963 be_cmd_get_die_temperature(adapter);
3964
d8110f62 3965 for_all_rx_queues(adapter, rxo, i) {
d8110f62
PR		 3966 if (rxo->rx_post_starved) {
3967 rxo->rx_post_starved = false;
3968 be_post_rx_frags(rxo, GFP_KERNEL);
3969 }
3970 }
3971
10ef9ab4
SP		 3972 for_all_evt_queues(adapter, eqo, i)
3973 be_eqd_update(adapter, eqo);
3974
d8110f62
PR		 3975reschedule:
3976 adapter->work_counter++;
3977 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
3978}
3979
39f1d94d
SP		 3980static bool be_reset_required(struct be_adapter *adapter)
3981{
d79c0a20 3982 return be_find_vfs(adapter, ENABLED) > 0 ? false : true;
39f1d94d
SP		 3983}
3984
d379142b
SP		 3985static char *mc_name(struct be_adapter *adapter)
3986{
3987 if (adapter->function_mode & FLEX10_MODE)
3988 return "FLEX10";
3989 else if (adapter->function_mode & VNIC_MODE)
3990 return "vNIC";
3991 else if (adapter->function_mode & UMC_ENABLED)
3992 return "UMC";
3993 else
3994 return "";
3995}
3996
3997static inline char *func_name(struct be_adapter *adapter)
3998{
3999 return be_physfn(adapter) ? "PF" : "VF";
4000}
4001
6b7c5b94
SP		 4002static int __devinit be_probe(struct pci_dev *pdev,
4003 const struct pci_device_id *pdev_id)
4004{
4005 int status = 0;
4006 struct be_adapter *adapter;
4007 struct net_device *netdev;
b4e32a71 4008 char port_name;
6b7c5b94
SP		 4009
4010 status = pci_enable_device(pdev);
4011 if (status)
4012 goto do_none;
4013
4014 status = pci_request_regions(pdev, DRV_NAME);
4015 if (status)
4016 goto disable_dev;
4017 pci_set_master(pdev);
4018
7f640062 4019 netdev = alloc_etherdev_mqs(sizeof(*adapter), MAX_TX_QS, MAX_RX_QS);
6b7c5b94
SP		 4020 if (netdev == NULL) {
4021 status = -ENOMEM;
4022 goto rel_reg;
4023 }
4024 adapter = netdev_priv(netdev);
4025 adapter->pdev = pdev;
4026 pci_set_drvdata(pdev, adapter);
4027 adapter->netdev = netdev;
2243e2e9 4028 SET_NETDEV_DEV(netdev, &pdev->dev);
6b7c5b94 4029
2b7bcebf 4030 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
6b7c5b94
SP		 4031 if (!status) {
4032 netdev->features |= NETIF_F_HIGHDMA;
4033 } else {
2b7bcebf 4034 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
6b7c5b94
SP		 4035 if (status) {
4036 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
4037 goto free_netdev;
4038 }
4039 }
4040
d6b6d987
SP		 4041 status = pci_enable_pcie_error_reporting(pdev);
4042 if (status)
4043 dev_err(&pdev->dev, "Could not use PCIe error reporting\n");
4044
6b7c5b94
SP		 4045 status = be_ctrl_init(adapter);
4046 if (status)
39f1d94d 4047 goto free_netdev;
6b7c5b94 4048
2243e2e9 4049 /* sync up with fw's ready state */
ba343c77 4050 if (be_physfn(adapter)) {
bf99e50d 4051 status = be_fw_wait_ready(adapter);
ba343c77
SB		 4052 if (status)
4053 goto ctrl_clean;
ba343c77 4054 }
6b7c5b94 4055
2243e2e9
SP		 4056 /* tell fw we're ready to fire cmds */
4057 status = be_cmd_fw_init(adapter);
6b7c5b94 4058 if (status)
2243e2e9
SP		 4059 goto ctrl_clean;
4060
39f1d94d
SP		 4061 if (be_reset_required(adapter)) {
4062 status = be_cmd_reset_function(adapter);
4063 if (status)
4064 goto ctrl_clean;
4065 }
556ae191 4066
10ef9ab4
SP		 4067 /* The INTR bit may be set in the card when probed by a kdump kernel
4068 * after a crash.
4069 */
4070 if (!lancer_chip(adapter))
4071 be_intr_set(adapter, false);
4072
2243e2e9
SP		 4073 status = be_stats_init(adapter);
4074 if (status)
4075 goto ctrl_clean;
4076
39f1d94d 4077 status = be_get_initial_config(adapter);
6b7c5b94
SP		 4078 if (status)
4079 goto stats_clean;
6b7c5b94
SP		 4080
4081 INIT_DELAYED_WORK(&adapter->work, be_worker);
f67ef7ba 4082 INIT_DELAYED_WORK(&adapter->func_recovery_work, be_func_recovery_task);
a54769f5 4083 adapter->rx_fc = adapter->tx_fc = true;
6b7c5b94 4084
5fb379ee
SP		 4085 status = be_setup(adapter);
4086 if (status)
55f5c3c5 4087 goto stats_clean;
2243e2e9 4088
3abcdeda 4089 be_netdev_init(netdev);
6b7c5b94
SP		 4090 status = register_netdev(netdev);
4091 if (status != 0)
5fb379ee 4092 goto unsetup;
6b7c5b94 4093
045508a8
PP		 4094 be_roce_dev_add(adapter);
4095
f67ef7ba
PR		 4096 schedule_delayed_work(&adapter->func_recovery_work,
4097 msecs_to_jiffies(1000));
b4e32a71
PR		 4098
4099 be_cmd_query_port_name(adapter, &port_name);
4100
d379142b
SP		 4101 dev_info(&pdev->dev, "%s: %s %s port %c\n", nic_name(pdev),
4102 func_name(adapter), mc_name(adapter), port_name);
34b1ef04 4103
6b7c5b94
SP		 4104 return 0;
4105
5fb379ee
SP		 4106unsetup:
4107 be_clear(adapter);
6b7c5b94
SP		 4108stats_clean:
4109 be_stats_cleanup(adapter);
4110ctrl_clean:
4111 be_ctrl_cleanup(adapter);
f9449ab7 4112free_netdev:
fe6d2a38 4113 free_netdev(netdev);
8d56ff11 4114 pci_set_drvdata(pdev, NULL);
6b7c5b94
SP		 4115rel_reg:
4116 pci_release_regions(pdev);
4117disable_dev:
4118 pci_disable_device(pdev);
4119do_none:
c4ca2374 4120 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 4121 return status;
4122}
4123
4124static int be_suspend(struct pci_dev *pdev, pm_message_t state)
4125{
4126 struct be_adapter *adapter = pci_get_drvdata(pdev);
4127 struct net_device *netdev = adapter->netdev;
4128
71d8d1b5
AK		 4129 if (adapter->wol)
4130 be_setup_wol(adapter, true);
4131
f67ef7ba
PR		 4132 cancel_delayed_work_sync(&adapter->func_recovery_work);
4133
6b7c5b94
SP		 4134 netif_device_detach(netdev);
4135 if (netif_running(netdev)) {
4136 rtnl_lock();
4137 be_close(netdev);
4138 rtnl_unlock();
4139 }
9b0365f1 4140 be_clear(adapter);
6b7c5b94
SP		 4141
4142 pci_save_state(pdev);
4143 pci_disable_device(pdev);
4144 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4145 return 0;
4146}
4147
4148static int be_resume(struct pci_dev *pdev)
4149{
4150 int status = 0;
4151 struct be_adapter *adapter = pci_get_drvdata(pdev);
4152 struct net_device *netdev = adapter->netdev;
4153
4154 netif_device_detach(netdev);
4155
4156 status = pci_enable_device(pdev);
4157 if (status)
4158 return status;
4159
4160 pci_set_power_state(pdev, 0);
4161 pci_restore_state(pdev);
4162
2243e2e9
SP		 4163 /* tell fw we're ready to fire cmds */
4164 status = be_cmd_fw_init(adapter);
4165 if (status)
4166 return status;
4167
9b0365f1 4168 be_setup(adapter);
6b7c5b94
SP		 4169 if (netif_running(netdev)) {
4170 rtnl_lock();
4171 be_open(netdev);
4172 rtnl_unlock();
4173 }
f67ef7ba
PR		 4174
4175 schedule_delayed_work(&adapter->func_recovery_work,
4176 msecs_to_jiffies(1000));
6b7c5b94 4177 netif_device_attach(netdev);
71d8d1b5
AK		 4178
4179 if (adapter->wol)
4180 be_setup_wol(adapter, false);
a4ca055f 4181
6b7c5b94
SP		 4182 return 0;
4183}
4184
82456b03
SP		 4185/*
4186 * An FLR will stop BE from DMAing any data.
4187 */
4188static void be_shutdown(struct pci_dev *pdev)
4189{
4190 struct be_adapter *adapter = pci_get_drvdata(pdev);
82456b03 4191
2d5d4154
AK		 4192 if (!adapter)
4193 return;
82456b03 4194
0f4a6828 4195 cancel_delayed_work_sync(&adapter->work);
f67ef7ba 4196 cancel_delayed_work_sync(&adapter->func_recovery_work);
a4ca055f 4197
2d5d4154 4198 netif_device_detach(adapter->netdev);
82456b03 4199
57841869
AK		 4200 be_cmd_reset_function(adapter);
4201
82456b03 4202 pci_disable_device(pdev);
82456b03
SP		 4203}
4204
cf588477
SP		 4205static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
4206 pci_channel_state_t state)
4207{
4208 struct be_adapter *adapter = pci_get_drvdata(pdev);
4209 struct net_device *netdev = adapter->netdev;
4210
4211 dev_err(&adapter->pdev->dev, "EEH error detected\n");
4212
f67ef7ba
PR		 4213 adapter->eeh_error = true;
4214
4215 cancel_delayed_work_sync(&adapter->func_recovery_work);
cf588477 4216
f67ef7ba 4217 rtnl_lock();
cf588477 4218 netif_device_detach(netdev);
f67ef7ba 4219 rtnl_unlock();
cf588477
SP		 4220
4221 if (netif_running(netdev)) {
4222 rtnl_lock();
4223 be_close(netdev);
4224 rtnl_unlock();
4225 }
4226 be_clear(adapter);
4227
4228 if (state == pci_channel_io_perm_failure)
4229 return PCI_ERS_RESULT_DISCONNECT;
4230
4231 pci_disable_device(pdev);
4232
eeb7fc7b
SK		 4233 /* The error could cause the FW to trigger a flash debug dump.
4234 * Resetting the card while flash dump is in progress
c8a54163
PR		 4235 * can cause it not to recover; wait for it to finish.
4236 * Wait only for first function as it is needed only once per
4237 * adapter.
eeb7fc7b 4238 */
c8a54163
PR		 4239 if (pdev->devfn == 0)
4240 ssleep(30);
4241
cf588477
SP		 4242 return PCI_ERS_RESULT_NEED_RESET;
4243}
4244
4245static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
4246{
4247 struct be_adapter *adapter = pci_get_drvdata(pdev);
4248 int status;
4249
4250 dev_info(&adapter->pdev->dev, "EEH reset\n");
f67ef7ba 4251 be_clear_all_error(adapter);
cf588477
SP		 4252
4253 status = pci_enable_device(pdev);
4254 if (status)
4255 return PCI_ERS_RESULT_DISCONNECT;
4256
4257 pci_set_master(pdev);
4258 pci_set_power_state(pdev, 0);
4259 pci_restore_state(pdev);
4260
4261 /* Check if card is ok and fw is ready */
bf99e50d 4262 status = be_fw_wait_ready(adapter);
cf588477
SP		 4263 if (status)
4264 return PCI_ERS_RESULT_DISCONNECT;
4265
d6b6d987 4266 pci_cleanup_aer_uncorrect_error_status(pdev);
cf588477
SP		 4267 return PCI_ERS_RESULT_RECOVERED;
4268}
4269
4270static void be_eeh_resume(struct pci_dev *pdev)
4271{
4272 int status = 0;
4273 struct be_adapter *adapter = pci_get_drvdata(pdev);
4274 struct net_device *netdev = adapter->netdev;
4275
4276 dev_info(&adapter->pdev->dev, "EEH resume\n");
4277
4278 pci_save_state(pdev);
4279
4280 /* tell fw we're ready to fire cmds */
4281 status = be_cmd_fw_init(adapter);
4282 if (status)
4283 goto err;
4284
bf99e50d
PR		 4285 status = be_cmd_reset_function(adapter);
4286 if (status)
4287 goto err;
4288
cf588477
SP		 4289 status = be_setup(adapter);
4290 if (status)
4291 goto err;
4292
4293 if (netif_running(netdev)) {
4294 status = be_open(netdev);
4295 if (status)
4296 goto err;
4297 }
f67ef7ba
PR		 4298
4299 schedule_delayed_work(&adapter->func_recovery_work,
4300 msecs_to_jiffies(1000));
cf588477
SP		 4301 netif_device_attach(netdev);
4302 return;
4303err:
4304 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
cf588477
SP		 4305}
4306
3646f0e5 4307static const struct pci_error_handlers be_eeh_handlers = {
cf588477
SP		 4308 .error_detected = be_eeh_err_detected,
4309 .slot_reset = be_eeh_reset,
4310 .resume = be_eeh_resume,
4311};
4312
6b7c5b94
SP		 4313static struct pci_driver be_driver = {
4314 .name = DRV_NAME,
4315 .id_table = be_dev_ids,
4316 .probe = be_probe,
4317 .remove = be_remove,
4318 .suspend = be_suspend,
cf588477 4319 .resume = be_resume,
82456b03 4320 .shutdown = be_shutdown,
cf588477 4321 .err_handler = &be_eeh_handlers
6b7c5b94
SP		 4322};
4323
4324static int __init be_init_module(void)
4325{
8e95a202
JP		 4326 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
4327 rx_frag_size != 2048) {
6b7c5b94
SP		 4328 printk(KERN_WARNING DRV_NAME
4329 " : Module param rx_frag_size must be 2048/4096/8192."
4330 " Using 2048\n");
4331 rx_frag_size = 2048;
4332 }
6b7c5b94
SP		 4333
4334 return pci_register_driver(&be_driver);
4335}
4336module_init(be_init_module);
4337
4338static void __exit be_exit_module(void)
4339{
4340 pci_unregister_driver(&be_driver);
4341}
4342module_exit(be_exit_module);
Linux kernel - Deliverables
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