Commit | Line | Data |
---|---|---|
6b7c5b94 | 1 | /* |
c7bb15a6 | 2 | * Copyright (C) 2005 - 2013 Emulex |
6b7c5b94 SP |
3 | * All rights reserved. |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License version 2 | |
7 | * as published by the Free Software Foundation. The full GNU General | |
8 | * Public License is included in this distribution in the file called COPYING. | |
9 | * | |
10 | * Contact Information: | |
d2145cde | 11 | * linux-drivers@emulex.com |
6b7c5b94 | 12 | * |
d2145cde AK |
13 | * Emulex |
14 | * 3333 Susan Street | |
15 | * Costa Mesa, CA 92626 | |
6b7c5b94 SP |
16 | */ |
17 | ||
70c71606 | 18 | #include <linux/prefetch.h> |
9d9779e7 | 19 | #include <linux/module.h> |
6b7c5b94 | 20 | #include "be.h" |
8788fdc2 | 21 | #include "be_cmds.h" |
65f71b8b | 22 | #include <asm/div64.h> |
d6b6d987 | 23 | #include <linux/aer.h> |
6b7c5b94 SP |
24 | |
25 | MODULE_VERSION(DRV_VER); | |
26 | MODULE_DEVICE_TABLE(pci, be_dev_ids); | |
27 | MODULE_DESCRIPTION(DRV_DESC " " DRV_VER); | |
00d3d51e | 28 | MODULE_AUTHOR("Emulex Corporation"); |
6b7c5b94 SP |
29 | MODULE_LICENSE("GPL"); |
30 | ||
ba343c77 | 31 | static unsigned int num_vfs; |
ba343c77 | 32 | module_param(num_vfs, uint, S_IRUGO); |
ba343c77 | 33 | MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize"); |
6b7c5b94 | 34 | |
11ac75ed SP |
35 | static ushort rx_frag_size = 2048; |
36 | module_param(rx_frag_size, ushort, S_IRUGO); | |
37 | MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data."); | |
38 | ||
6b7c5b94 | 39 | static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = { |
c4ca2374 | 40 | { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) }, |
59fd5d87 | 41 | { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) }, |
c4ca2374 AK |
42 | { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) }, |
43 | { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) }, | |
fe6d2a38 | 44 | { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)}, |
12f4d0a8 | 45 | { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID4)}, |
ecedb6ae | 46 | { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID5)}, |
76b73530 | 47 | { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID6)}, |
6b7c5b94 SP |
48 | { 0 } |
49 | }; | |
50 | MODULE_DEVICE_TABLE(pci, be_dev_ids); | |
7c185276 | 51 | /* UE Status Low CSR */ |
42c8b11e | 52 | static const char * const ue_status_low_desc[] = { |
7c185276 AK |
53 | "CEV", |
54 | "CTX", | |
55 | "DBUF", | |
56 | "ERX", | |
57 | "Host", | |
58 | "MPU", | |
59 | "NDMA", | |
60 | "PTC ", | |
61 | "RDMA ", | |
62 | "RXF ", | |
63 | "RXIPS ", | |
64 | "RXULP0 ", | |
65 | "RXULP1 ", | |
66 | "RXULP2 ", | |
67 | "TIM ", | |
68 | "TPOST ", | |
69 | "TPRE ", | |
70 | "TXIPS ", | |
71 | "TXULP0 ", | |
72 | "TXULP1 ", | |
73 | "UC ", | |
74 | "WDMA ", | |
75 | "TXULP2 ", | |
76 | "HOST1 ", | |
77 | "P0_OB_LINK ", | |
78 | "P1_OB_LINK ", | |
79 | "HOST_GPIO ", | |
80 | "MBOX ", | |
81 | "AXGMAC0", | |
82 | "AXGMAC1", | |
83 | "JTAG", | |
84 | "MPU_INTPEND" | |
85 | }; | |
86 | /* UE Status High CSR */ | |
42c8b11e | 87 | static const char * const ue_status_hi_desc[] = { |
7c185276 AK |
88 | "LPCMEMHOST", |
89 | "MGMT_MAC", | |
90 | "PCS0ONLINE", | |
91 | "MPU_IRAM", | |
92 | "PCS1ONLINE", | |
93 | "PCTL0", | |
94 | "PCTL1", | |
95 | "PMEM", | |
96 | "RR", | |
97 | "TXPB", | |
98 | "RXPP", | |
99 | "XAUI", | |
100 | "TXP", | |
101 | "ARM", | |
102 | "IPC", | |
103 | "HOST2", | |
104 | "HOST3", | |
105 | "HOST4", | |
106 | "HOST5", | |
107 | "HOST6", | |
108 | "HOST7", | |
109 | "HOST8", | |
110 | "HOST9", | |
42c8b11e | 111 | "NETC", |
7c185276 AK |
112 | "Unknown", |
113 | "Unknown", | |
114 | "Unknown", | |
115 | "Unknown", | |
116 | "Unknown", | |
117 | "Unknown", | |
118 | "Unknown", | |
119 | "Unknown" | |
120 | }; | |
6b7c5b94 | 121 | |
752961a1 SP |
122 | /* Is BE in a multi-channel mode */ |
123 | static inline bool be_is_mc(struct be_adapter *adapter) { | |
124 | return (adapter->function_mode & FLEX10_MODE || | |
125 | adapter->function_mode & VNIC_MODE || | |
126 | adapter->function_mode & UMC_ENABLED); | |
127 | } | |
128 | ||
6b7c5b94 SP |
129 | static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q) |
130 | { | |
131 | struct be_dma_mem *mem = &q->dma_mem; | |
1cfafab9 | 132 | if (mem->va) { |
2b7bcebf IV |
133 | dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va, |
134 | mem->dma); | |
1cfafab9 SP |
135 | mem->va = NULL; |
136 | } | |
6b7c5b94 SP |
137 | } |
138 | ||
139 | static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q, | |
140 | u16 len, u16 entry_size) | |
141 | { | |
142 | struct be_dma_mem *mem = &q->dma_mem; | |
143 | ||
144 | memset(q, 0, sizeof(*q)); | |
145 | q->len = len; | |
146 | q->entry_size = entry_size; | |
147 | mem->size = len * entry_size; | |
2b7bcebf | 148 | mem->va = dma_alloc_coherent(&adapter->pdev->dev, mem->size, &mem->dma, |
1f9061d2 | 149 | GFP_KERNEL | __GFP_ZERO); |
6b7c5b94 | 150 | if (!mem->va) |
10ef9ab4 | 151 | return -ENOMEM; |
6b7c5b94 SP |
152 | return 0; |
153 | } | |
154 | ||
68c45a2d | 155 | static void be_reg_intr_set(struct be_adapter *adapter, bool enable) |
6b7c5b94 | 156 | { |
db3ea781 | 157 | u32 reg, enabled; |
5f0b849e | 158 | |
db3ea781 SP |
159 | pci_read_config_dword(adapter->pdev, PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET, |
160 | ®); | |
161 | enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; | |
162 | ||
5f0b849e | 163 | if (!enabled && enable) |
6b7c5b94 | 164 | reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; |
5f0b849e | 165 | else if (enabled && !enable) |
6b7c5b94 | 166 | reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; |
5f0b849e | 167 | else |
6b7c5b94 | 168 | return; |
5f0b849e | 169 | |
db3ea781 SP |
170 | pci_write_config_dword(adapter->pdev, |
171 | PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET, reg); | |
6b7c5b94 SP |
172 | } |
173 | ||
68c45a2d SK |
174 | static void be_intr_set(struct be_adapter *adapter, bool enable) |
175 | { | |
176 | int status = 0; | |
177 | ||
178 | /* On lancer interrupts can't be controlled via this register */ | |
179 | if (lancer_chip(adapter)) | |
180 | return; | |
181 | ||
182 | if (adapter->eeh_error) | |
183 | return; | |
184 | ||
185 | status = be_cmd_intr_set(adapter, enable); | |
186 | if (status) | |
187 | be_reg_intr_set(adapter, enable); | |
188 | } | |
189 | ||
8788fdc2 | 190 | static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted) |
6b7c5b94 SP |
191 | { |
192 | u32 val = 0; | |
193 | val |= qid & DB_RQ_RING_ID_MASK; | |
194 | val |= posted << DB_RQ_NUM_POSTED_SHIFT; | |
f3eb62d2 SP |
195 | |
196 | wmb(); | |
8788fdc2 | 197 | iowrite32(val, adapter->db + DB_RQ_OFFSET); |
6b7c5b94 SP |
198 | } |
199 | ||
94d73aaa VV |
200 | static void be_txq_notify(struct be_adapter *adapter, struct be_tx_obj *txo, |
201 | u16 posted) | |
6b7c5b94 SP |
202 | { |
203 | u32 val = 0; | |
94d73aaa | 204 | val |= txo->q.id & DB_TXULP_RING_ID_MASK; |
6b7c5b94 | 205 | val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT; |
f3eb62d2 SP |
206 | |
207 | wmb(); | |
94d73aaa | 208 | iowrite32(val, adapter->db + txo->db_offset); |
6b7c5b94 SP |
209 | } |
210 | ||
8788fdc2 | 211 | static void be_eq_notify(struct be_adapter *adapter, u16 qid, |
6b7c5b94 SP |
212 | bool arm, bool clear_int, u16 num_popped) |
213 | { | |
214 | u32 val = 0; | |
215 | val |= qid & DB_EQ_RING_ID_MASK; | |
fe6d2a38 SP |
216 | val |= ((qid & DB_EQ_RING_ID_EXT_MASK) << |
217 | DB_EQ_RING_ID_EXT_MASK_SHIFT); | |
cf588477 | 218 | |
f67ef7ba | 219 | if (adapter->eeh_error) |
cf588477 SP |
220 | return; |
221 | ||
6b7c5b94 SP |
222 | if (arm) |
223 | val |= 1 << DB_EQ_REARM_SHIFT; | |
224 | if (clear_int) | |
225 | val |= 1 << DB_EQ_CLR_SHIFT; | |
226 | val |= 1 << DB_EQ_EVNT_SHIFT; | |
227 | val |= num_popped << DB_EQ_NUM_POPPED_SHIFT; | |
8788fdc2 | 228 | iowrite32(val, adapter->db + DB_EQ_OFFSET); |
6b7c5b94 SP |
229 | } |
230 | ||
8788fdc2 | 231 | void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped) |
6b7c5b94 SP |
232 | { |
233 | u32 val = 0; | |
234 | val |= qid & DB_CQ_RING_ID_MASK; | |
fe6d2a38 SP |
235 | val |= ((qid & DB_CQ_RING_ID_EXT_MASK) << |
236 | DB_CQ_RING_ID_EXT_MASK_SHIFT); | |
cf588477 | 237 | |
f67ef7ba | 238 | if (adapter->eeh_error) |
cf588477 SP |
239 | return; |
240 | ||
6b7c5b94 SP |
241 | if (arm) |
242 | val |= 1 << DB_CQ_REARM_SHIFT; | |
243 | val |= num_popped << DB_CQ_NUM_POPPED_SHIFT; | |
8788fdc2 | 244 | iowrite32(val, adapter->db + DB_CQ_OFFSET); |
6b7c5b94 SP |
245 | } |
246 | ||
6b7c5b94 SP |
247 | static int be_mac_addr_set(struct net_device *netdev, void *p) |
248 | { | |
249 | struct be_adapter *adapter = netdev_priv(netdev); | |
5a712c13 | 250 | struct device *dev = &adapter->pdev->dev; |
6b7c5b94 | 251 | struct sockaddr *addr = p; |
5a712c13 SP |
252 | int status; |
253 | u8 mac[ETH_ALEN]; | |
254 | u32 old_pmac_id = adapter->pmac_id[0], curr_pmac_id = 0; | |
6b7c5b94 | 255 | |
ca9e4988 AK |
256 | if (!is_valid_ether_addr(addr->sa_data)) |
257 | return -EADDRNOTAVAIL; | |
258 | ||
5a712c13 SP |
259 | /* The PMAC_ADD cmd may fail if the VF doesn't have FILTMGMT |
260 | * privilege or if PF did not provision the new MAC address. | |
261 | * On BE3, this cmd will always fail if the VF doesn't have the | |
262 | * FILTMGMT privilege. This failure is OK, only if the PF programmed | |
263 | * the MAC for the VF. | |
704e4c88 | 264 | */ |
5a712c13 SP |
265 | status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data, |
266 | adapter->if_handle, &adapter->pmac_id[0], 0); | |
267 | if (!status) { | |
268 | curr_pmac_id = adapter->pmac_id[0]; | |
269 | ||
270 | /* Delete the old programmed MAC. This call may fail if the | |
271 | * old MAC was already deleted by the PF driver. | |
272 | */ | |
273 | if (adapter->pmac_id[0] != old_pmac_id) | |
274 | be_cmd_pmac_del(adapter, adapter->if_handle, | |
275 | old_pmac_id, 0); | |
704e4c88 PR |
276 | } |
277 | ||
5a712c13 SP |
278 | /* Decide if the new MAC is successfully activated only after |
279 | * querying the FW | |
704e4c88 | 280 | */ |
5a712c13 | 281 | status = be_cmd_get_active_mac(adapter, curr_pmac_id, mac); |
a65027e4 | 282 | if (status) |
e3a7ae2c | 283 | goto err; |
6b7c5b94 | 284 | |
5a712c13 SP |
285 | /* The MAC change did not happen, either due to lack of privilege |
286 | * or PF didn't pre-provision. | |
287 | */ | |
288 | if (memcmp(addr->sa_data, mac, ETH_ALEN)) { | |
289 | status = -EPERM; | |
290 | goto err; | |
291 | } | |
292 | ||
e3a7ae2c | 293 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
5a712c13 | 294 | dev_info(dev, "MAC address changed to %pM\n", mac); |
e3a7ae2c SK |
295 | return 0; |
296 | err: | |
5a712c13 | 297 | dev_warn(dev, "MAC address change to %pM failed\n", addr->sa_data); |
6b7c5b94 SP |
298 | return status; |
299 | } | |
300 | ||
ca34fe38 SP |
301 | /* BE2 supports only v0 cmd */ |
302 | static void *hw_stats_from_cmd(struct be_adapter *adapter) | |
303 | { | |
304 | if (BE2_chip(adapter)) { | |
305 | struct be_cmd_resp_get_stats_v0 *cmd = adapter->stats_cmd.va; | |
306 | ||
307 | return &cmd->hw_stats; | |
308 | } else { | |
309 | struct be_cmd_resp_get_stats_v1 *cmd = adapter->stats_cmd.va; | |
310 | ||
311 | return &cmd->hw_stats; | |
312 | } | |
313 | } | |
314 | ||
315 | /* BE2 supports only v0 cmd */ | |
316 | static void *be_erx_stats_from_cmd(struct be_adapter *adapter) | |
317 | { | |
318 | if (BE2_chip(adapter)) { | |
319 | struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter); | |
320 | ||
321 | return &hw_stats->erx; | |
322 | } else { | |
323 | struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter); | |
324 | ||
325 | return &hw_stats->erx; | |
326 | } | |
327 | } | |
328 | ||
329 | static void populate_be_v0_stats(struct be_adapter *adapter) | |
89a88ab8 | 330 | { |
ac124ff9 SP |
331 | struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter); |
332 | struct be_pmem_stats *pmem_sts = &hw_stats->pmem; | |
333 | struct be_rxf_stats_v0 *rxf_stats = &hw_stats->rxf; | |
89a88ab8 | 334 | struct be_port_rxf_stats_v0 *port_stats = |
ac124ff9 SP |
335 | &rxf_stats->port[adapter->port_num]; |
336 | struct be_drv_stats *drvs = &adapter->drv_stats; | |
89a88ab8 | 337 | |
ac124ff9 | 338 | be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats)); |
89a88ab8 AK |
339 | drvs->rx_pause_frames = port_stats->rx_pause_frames; |
340 | drvs->rx_crc_errors = port_stats->rx_crc_errors; | |
341 | drvs->rx_control_frames = port_stats->rx_control_frames; | |
342 | drvs->rx_in_range_errors = port_stats->rx_in_range_errors; | |
343 | drvs->rx_frame_too_long = port_stats->rx_frame_too_long; | |
344 | drvs->rx_dropped_runt = port_stats->rx_dropped_runt; | |
345 | drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs; | |
346 | drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs; | |
347 | drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs; | |
348 | drvs->rxpp_fifo_overflow_drop = port_stats->rx_fifo_overflow; | |
349 | drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length; | |
350 | drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small; | |
351 | drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short; | |
352 | drvs->rx_out_range_errors = port_stats->rx_out_range_errors; | |
ac124ff9 | 353 | drvs->rx_input_fifo_overflow_drop = port_stats->rx_input_fifo_overflow; |
89a88ab8 AK |
354 | drvs->rx_dropped_header_too_small = |
355 | port_stats->rx_dropped_header_too_small; | |
18fb06a1 SR |
356 | drvs->rx_address_filtered = |
357 | port_stats->rx_address_filtered + | |
358 | port_stats->rx_vlan_filtered; | |
89a88ab8 AK |
359 | drvs->rx_alignment_symbol_errors = |
360 | port_stats->rx_alignment_symbol_errors; | |
361 | ||
362 | drvs->tx_pauseframes = port_stats->tx_pauseframes; | |
363 | drvs->tx_controlframes = port_stats->tx_controlframes; | |
364 | ||
365 | if (adapter->port_num) | |
ac124ff9 | 366 | drvs->jabber_events = rxf_stats->port1_jabber_events; |
89a88ab8 | 367 | else |
ac124ff9 | 368 | drvs->jabber_events = rxf_stats->port0_jabber_events; |
89a88ab8 | 369 | drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf; |
89a88ab8 | 370 | drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr; |
89a88ab8 AK |
371 | drvs->forwarded_packets = rxf_stats->forwarded_packets; |
372 | drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu; | |
ac124ff9 SP |
373 | drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr; |
374 | drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags; | |
89a88ab8 AK |
375 | adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops; |
376 | } | |
377 | ||
ca34fe38 | 378 | static void populate_be_v1_stats(struct be_adapter *adapter) |
89a88ab8 | 379 | { |
ac124ff9 SP |
380 | struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter); |
381 | struct be_pmem_stats *pmem_sts = &hw_stats->pmem; | |
382 | struct be_rxf_stats_v1 *rxf_stats = &hw_stats->rxf; | |
89a88ab8 | 383 | struct be_port_rxf_stats_v1 *port_stats = |
ac124ff9 SP |
384 | &rxf_stats->port[adapter->port_num]; |
385 | struct be_drv_stats *drvs = &adapter->drv_stats; | |
89a88ab8 | 386 | |
ac124ff9 | 387 | be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats)); |
02fe7027 AK |
388 | drvs->pmem_fifo_overflow_drop = port_stats->pmem_fifo_overflow_drop; |
389 | drvs->rx_priority_pause_frames = port_stats->rx_priority_pause_frames; | |
89a88ab8 AK |
390 | drvs->rx_pause_frames = port_stats->rx_pause_frames; |
391 | drvs->rx_crc_errors = port_stats->rx_crc_errors; | |
392 | drvs->rx_control_frames = port_stats->rx_control_frames; | |
393 | drvs->rx_in_range_errors = port_stats->rx_in_range_errors; | |
394 | drvs->rx_frame_too_long = port_stats->rx_frame_too_long; | |
395 | drvs->rx_dropped_runt = port_stats->rx_dropped_runt; | |
396 | drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs; | |
397 | drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs; | |
398 | drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs; | |
399 | drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length; | |
400 | drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small; | |
401 | drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short; | |
402 | drvs->rx_out_range_errors = port_stats->rx_out_range_errors; | |
403 | drvs->rx_dropped_header_too_small = | |
404 | port_stats->rx_dropped_header_too_small; | |
405 | drvs->rx_input_fifo_overflow_drop = | |
406 | port_stats->rx_input_fifo_overflow_drop; | |
18fb06a1 | 407 | drvs->rx_address_filtered = port_stats->rx_address_filtered; |
89a88ab8 AK |
408 | drvs->rx_alignment_symbol_errors = |
409 | port_stats->rx_alignment_symbol_errors; | |
ac124ff9 | 410 | drvs->rxpp_fifo_overflow_drop = port_stats->rxpp_fifo_overflow_drop; |
89a88ab8 AK |
411 | drvs->tx_pauseframes = port_stats->tx_pauseframes; |
412 | drvs->tx_controlframes = port_stats->tx_controlframes; | |
b5adffc4 | 413 | drvs->tx_priority_pauseframes = port_stats->tx_priority_pauseframes; |
89a88ab8 AK |
414 | drvs->jabber_events = port_stats->jabber_events; |
415 | drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf; | |
89a88ab8 | 416 | drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr; |
89a88ab8 AK |
417 | drvs->forwarded_packets = rxf_stats->forwarded_packets; |
418 | drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu; | |
ac124ff9 SP |
419 | drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr; |
420 | drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags; | |
89a88ab8 AK |
421 | adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops; |
422 | } | |
423 | ||
005d5696 SX |
424 | static void populate_lancer_stats(struct be_adapter *adapter) |
425 | { | |
89a88ab8 | 426 | |
005d5696 | 427 | struct be_drv_stats *drvs = &adapter->drv_stats; |
ac124ff9 SP |
428 | struct lancer_pport_stats *pport_stats = |
429 | pport_stats_from_cmd(adapter); | |
430 | ||
431 | be_dws_le_to_cpu(pport_stats, sizeof(*pport_stats)); | |
432 | drvs->rx_pause_frames = pport_stats->rx_pause_frames_lo; | |
433 | drvs->rx_crc_errors = pport_stats->rx_crc_errors_lo; | |
434 | drvs->rx_control_frames = pport_stats->rx_control_frames_lo; | |
005d5696 | 435 | drvs->rx_in_range_errors = pport_stats->rx_in_range_errors; |
ac124ff9 | 436 | drvs->rx_frame_too_long = pport_stats->rx_frames_too_long_lo; |
005d5696 SX |
437 | drvs->rx_dropped_runt = pport_stats->rx_dropped_runt; |
438 | drvs->rx_ip_checksum_errs = pport_stats->rx_ip_checksum_errors; | |
439 | drvs->rx_tcp_checksum_errs = pport_stats->rx_tcp_checksum_errors; | |
440 | drvs->rx_udp_checksum_errs = pport_stats->rx_udp_checksum_errors; | |
441 | drvs->rx_dropped_tcp_length = | |
442 | pport_stats->rx_dropped_invalid_tcp_length; | |
443 | drvs->rx_dropped_too_small = pport_stats->rx_dropped_too_small; | |
444 | drvs->rx_dropped_too_short = pport_stats->rx_dropped_too_short; | |
445 | drvs->rx_out_range_errors = pport_stats->rx_out_of_range_errors; | |
446 | drvs->rx_dropped_header_too_small = | |
447 | pport_stats->rx_dropped_header_too_small; | |
448 | drvs->rx_input_fifo_overflow_drop = pport_stats->rx_fifo_overflow; | |
18fb06a1 SR |
449 | drvs->rx_address_filtered = |
450 | pport_stats->rx_address_filtered + | |
451 | pport_stats->rx_vlan_filtered; | |
ac124ff9 | 452 | drvs->rx_alignment_symbol_errors = pport_stats->rx_symbol_errors_lo; |
005d5696 | 453 | drvs->rxpp_fifo_overflow_drop = pport_stats->rx_fifo_overflow; |
ac124ff9 SP |
454 | drvs->tx_pauseframes = pport_stats->tx_pause_frames_lo; |
455 | drvs->tx_controlframes = pport_stats->tx_control_frames_lo; | |
005d5696 | 456 | drvs->jabber_events = pport_stats->rx_jabbers; |
ac124ff9 SP |
457 | drvs->forwarded_packets = pport_stats->num_forwards_lo; |
458 | drvs->rx_drops_mtu = pport_stats->rx_drops_mtu_lo; | |
005d5696 | 459 | drvs->rx_drops_too_many_frags = |
ac124ff9 | 460 | pport_stats->rx_drops_too_many_frags_lo; |
005d5696 | 461 | } |
89a88ab8 | 462 | |
09c1c68f SP |
463 | static void accumulate_16bit_val(u32 *acc, u16 val) |
464 | { | |
465 | #define lo(x) (x & 0xFFFF) | |
466 | #define hi(x) (x & 0xFFFF0000) | |
467 | bool wrapped = val < lo(*acc); | |
468 | u32 newacc = hi(*acc) + val; | |
469 | ||
470 | if (wrapped) | |
471 | newacc += 65536; | |
472 | ACCESS_ONCE(*acc) = newacc; | |
473 | } | |
474 | ||
4188e7df | 475 | static void populate_erx_stats(struct be_adapter *adapter, |
a6c578ef AK |
476 | struct be_rx_obj *rxo, |
477 | u32 erx_stat) | |
478 | { | |
479 | if (!BEx_chip(adapter)) | |
480 | rx_stats(rxo)->rx_drops_no_frags = erx_stat; | |
481 | else | |
482 | /* below erx HW counter can actually wrap around after | |
483 | * 65535. Driver accumulates a 32-bit value | |
484 | */ | |
485 | accumulate_16bit_val(&rx_stats(rxo)->rx_drops_no_frags, | |
486 | (u16)erx_stat); | |
487 | } | |
488 | ||
89a88ab8 AK |
489 | void be_parse_stats(struct be_adapter *adapter) |
490 | { | |
ac124ff9 SP |
491 | struct be_erx_stats_v1 *erx = be_erx_stats_from_cmd(adapter); |
492 | struct be_rx_obj *rxo; | |
493 | int i; | |
a6c578ef | 494 | u32 erx_stat; |
ac124ff9 | 495 | |
ca34fe38 SP |
496 | if (lancer_chip(adapter)) { |
497 | populate_lancer_stats(adapter); | |
005d5696 | 498 | } else { |
ca34fe38 SP |
499 | if (BE2_chip(adapter)) |
500 | populate_be_v0_stats(adapter); | |
501 | else | |
502 | /* for BE3 and Skyhawk */ | |
503 | populate_be_v1_stats(adapter); | |
d51ebd33 | 504 | |
ca34fe38 SP |
505 | /* as erx_v1 is longer than v0, ok to use v1 for v0 access */ |
506 | for_all_rx_queues(adapter, rxo, i) { | |
a6c578ef AK |
507 | erx_stat = erx->rx_drops_no_fragments[rxo->q.id]; |
508 | populate_erx_stats(adapter, rxo, erx_stat); | |
ca34fe38 | 509 | } |
09c1c68f | 510 | } |
89a88ab8 AK |
511 | } |
512 | ||
ab1594e9 SP |
513 | static struct rtnl_link_stats64 *be_get_stats64(struct net_device *netdev, |
514 | struct rtnl_link_stats64 *stats) | |
6b7c5b94 | 515 | { |
ab1594e9 | 516 | struct be_adapter *adapter = netdev_priv(netdev); |
89a88ab8 | 517 | struct be_drv_stats *drvs = &adapter->drv_stats; |
3abcdeda | 518 | struct be_rx_obj *rxo; |
3c8def97 | 519 | struct be_tx_obj *txo; |
ab1594e9 SP |
520 | u64 pkts, bytes; |
521 | unsigned int start; | |
3abcdeda | 522 | int i; |
6b7c5b94 | 523 | |
3abcdeda | 524 | for_all_rx_queues(adapter, rxo, i) { |
ab1594e9 SP |
525 | const struct be_rx_stats *rx_stats = rx_stats(rxo); |
526 | do { | |
527 | start = u64_stats_fetch_begin_bh(&rx_stats->sync); | |
528 | pkts = rx_stats(rxo)->rx_pkts; | |
529 | bytes = rx_stats(rxo)->rx_bytes; | |
530 | } while (u64_stats_fetch_retry_bh(&rx_stats->sync, start)); | |
531 | stats->rx_packets += pkts; | |
532 | stats->rx_bytes += bytes; | |
533 | stats->multicast += rx_stats(rxo)->rx_mcast_pkts; | |
534 | stats->rx_dropped += rx_stats(rxo)->rx_drops_no_skbs + | |
535 | rx_stats(rxo)->rx_drops_no_frags; | |
3abcdeda SP |
536 | } |
537 | ||
3c8def97 | 538 | for_all_tx_queues(adapter, txo, i) { |
ab1594e9 SP |
539 | const struct be_tx_stats *tx_stats = tx_stats(txo); |
540 | do { | |
541 | start = u64_stats_fetch_begin_bh(&tx_stats->sync); | |
542 | pkts = tx_stats(txo)->tx_pkts; | |
543 | bytes = tx_stats(txo)->tx_bytes; | |
544 | } while (u64_stats_fetch_retry_bh(&tx_stats->sync, start)); | |
545 | stats->tx_packets += pkts; | |
546 | stats->tx_bytes += bytes; | |
3c8def97 | 547 | } |
6b7c5b94 SP |
548 | |
549 | /* bad pkts received */ | |
ab1594e9 | 550 | stats->rx_errors = drvs->rx_crc_errors + |
89a88ab8 AK |
551 | drvs->rx_alignment_symbol_errors + |
552 | drvs->rx_in_range_errors + | |
553 | drvs->rx_out_range_errors + | |
554 | drvs->rx_frame_too_long + | |
555 | drvs->rx_dropped_too_small + | |
556 | drvs->rx_dropped_too_short + | |
557 | drvs->rx_dropped_header_too_small + | |
558 | drvs->rx_dropped_tcp_length + | |
ab1594e9 | 559 | drvs->rx_dropped_runt; |
68110868 | 560 | |
6b7c5b94 | 561 | /* detailed rx errors */ |
ab1594e9 | 562 | stats->rx_length_errors = drvs->rx_in_range_errors + |
89a88ab8 AK |
563 | drvs->rx_out_range_errors + |
564 | drvs->rx_frame_too_long; | |
68110868 | 565 | |
ab1594e9 | 566 | stats->rx_crc_errors = drvs->rx_crc_errors; |
6b7c5b94 SP |
567 | |
568 | /* frame alignment errors */ | |
ab1594e9 | 569 | stats->rx_frame_errors = drvs->rx_alignment_symbol_errors; |
68110868 | 570 | |
6b7c5b94 SP |
571 | /* receiver fifo overrun */ |
572 | /* drops_no_pbuf is no per i/f, it's per BE card */ | |
ab1594e9 | 573 | stats->rx_fifo_errors = drvs->rxpp_fifo_overflow_drop + |
89a88ab8 AK |
574 | drvs->rx_input_fifo_overflow_drop + |
575 | drvs->rx_drops_no_pbuf; | |
ab1594e9 | 576 | return stats; |
6b7c5b94 SP |
577 | } |
578 | ||
b236916a | 579 | void be_link_status_update(struct be_adapter *adapter, u8 link_status) |
6b7c5b94 | 580 | { |
6b7c5b94 SP |
581 | struct net_device *netdev = adapter->netdev; |
582 | ||
b236916a | 583 | if (!(adapter->flags & BE_FLAGS_LINK_STATUS_INIT)) { |
ea172a01 | 584 | netif_carrier_off(netdev); |
b236916a | 585 | adapter->flags |= BE_FLAGS_LINK_STATUS_INIT; |
6b7c5b94 | 586 | } |
b236916a AK |
587 | |
588 | if ((link_status & LINK_STATUS_MASK) == LINK_UP) | |
589 | netif_carrier_on(netdev); | |
590 | else | |
591 | netif_carrier_off(netdev); | |
6b7c5b94 SP |
592 | } |
593 | ||
3c8def97 | 594 | static void be_tx_stats_update(struct be_tx_obj *txo, |
91992e44 | 595 | u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped) |
6b7c5b94 | 596 | { |
3c8def97 SP |
597 | struct be_tx_stats *stats = tx_stats(txo); |
598 | ||
ab1594e9 | 599 | u64_stats_update_begin(&stats->sync); |
ac124ff9 SP |
600 | stats->tx_reqs++; |
601 | stats->tx_wrbs += wrb_cnt; | |
602 | stats->tx_bytes += copied; | |
603 | stats->tx_pkts += (gso_segs ? gso_segs : 1); | |
6b7c5b94 | 604 | if (stopped) |
ac124ff9 | 605 | stats->tx_stops++; |
ab1594e9 | 606 | u64_stats_update_end(&stats->sync); |
6b7c5b94 SP |
607 | } |
608 | ||
609 | /* Determine number of WRB entries needed to xmit data in an skb */ | |
fe6d2a38 SP |
610 | static u32 wrb_cnt_for_skb(struct be_adapter *adapter, struct sk_buff *skb, |
611 | bool *dummy) | |
6b7c5b94 | 612 | { |
ebc8d2ab DM |
613 | int cnt = (skb->len > skb->data_len); |
614 | ||
615 | cnt += skb_shinfo(skb)->nr_frags; | |
616 | ||
6b7c5b94 SP |
617 | /* to account for hdr wrb */ |
618 | cnt++; | |
fe6d2a38 SP |
619 | if (lancer_chip(adapter) || !(cnt & 1)) { |
620 | *dummy = false; | |
621 | } else { | |
6b7c5b94 SP |
622 | /* add a dummy to make it an even num */ |
623 | cnt++; | |
624 | *dummy = true; | |
fe6d2a38 | 625 | } |
6b7c5b94 SP |
626 | BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT); |
627 | return cnt; | |
628 | } | |
629 | ||
630 | static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len) | |
631 | { | |
632 | wrb->frag_pa_hi = upper_32_bits(addr); | |
633 | wrb->frag_pa_lo = addr & 0xFFFFFFFF; | |
634 | wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK; | |
89b1f496 | 635 | wrb->rsvd0 = 0; |
6b7c5b94 SP |
636 | } |
637 | ||
1ded132d AK |
638 | static inline u16 be_get_tx_vlan_tag(struct be_adapter *adapter, |
639 | struct sk_buff *skb) | |
640 | { | |
641 | u8 vlan_prio; | |
642 | u16 vlan_tag; | |
643 | ||
644 | vlan_tag = vlan_tx_tag_get(skb); | |
645 | vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT; | |
646 | /* If vlan priority provided by OS is NOT in available bmap */ | |
647 | if (!(adapter->vlan_prio_bmap & (1 << vlan_prio))) | |
648 | vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) | | |
649 | adapter->recommended_prio; | |
650 | ||
651 | return vlan_tag; | |
652 | } | |
653 | ||
cc4ce020 | 654 | static void wrb_fill_hdr(struct be_adapter *adapter, struct be_eth_hdr_wrb *hdr, |
bc0c3405 | 655 | struct sk_buff *skb, u32 wrb_cnt, u32 len, bool skip_hw_vlan) |
6b7c5b94 | 656 | { |
1ded132d | 657 | u16 vlan_tag; |
cc4ce020 | 658 | |
6b7c5b94 SP |
659 | memset(hdr, 0, sizeof(*hdr)); |
660 | ||
661 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1); | |
662 | ||
49e4b847 | 663 | if (skb_is_gso(skb)) { |
6b7c5b94 SP |
664 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1); |
665 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss, | |
666 | hdr, skb_shinfo(skb)->gso_size); | |
fe6d2a38 | 667 | if (skb_is_gso_v6(skb) && !lancer_chip(adapter)) |
49e4b847 | 668 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1); |
6b7c5b94 SP |
669 | } else if (skb->ip_summed == CHECKSUM_PARTIAL) { |
670 | if (is_tcp_pkt(skb)) | |
671 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1); | |
672 | else if (is_udp_pkt(skb)) | |
673 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1); | |
674 | } | |
675 | ||
4c5102f9 | 676 | if (vlan_tx_tag_present(skb)) { |
6b7c5b94 | 677 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1); |
1ded132d | 678 | vlan_tag = be_get_tx_vlan_tag(adapter, skb); |
cc4ce020 | 679 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, hdr, vlan_tag); |
6b7c5b94 SP |
680 | } |
681 | ||
bc0c3405 AK |
682 | /* To skip HW VLAN tagging: evt = 1, compl = 0 */ |
683 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, !skip_hw_vlan); | |
6b7c5b94 | 684 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1); |
6b7c5b94 SP |
685 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt); |
686 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len); | |
687 | } | |
688 | ||
2b7bcebf | 689 | static void unmap_tx_frag(struct device *dev, struct be_eth_wrb *wrb, |
7101e111 SP |
690 | bool unmap_single) |
691 | { | |
692 | dma_addr_t dma; | |
693 | ||
694 | be_dws_le_to_cpu(wrb, sizeof(*wrb)); | |
695 | ||
696 | dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo; | |
b681ee77 | 697 | if (wrb->frag_len) { |
7101e111 | 698 | if (unmap_single) |
2b7bcebf IV |
699 | dma_unmap_single(dev, dma, wrb->frag_len, |
700 | DMA_TO_DEVICE); | |
7101e111 | 701 | else |
2b7bcebf | 702 | dma_unmap_page(dev, dma, wrb->frag_len, DMA_TO_DEVICE); |
7101e111 SP |
703 | } |
704 | } | |
6b7c5b94 | 705 | |
3c8def97 | 706 | static int make_tx_wrbs(struct be_adapter *adapter, struct be_queue_info *txq, |
bc0c3405 AK |
707 | struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb, |
708 | bool skip_hw_vlan) | |
6b7c5b94 | 709 | { |
7101e111 SP |
710 | dma_addr_t busaddr; |
711 | int i, copied = 0; | |
2b7bcebf | 712 | struct device *dev = &adapter->pdev->dev; |
6b7c5b94 | 713 | struct sk_buff *first_skb = skb; |
6b7c5b94 SP |
714 | struct be_eth_wrb *wrb; |
715 | struct be_eth_hdr_wrb *hdr; | |
7101e111 SP |
716 | bool map_single = false; |
717 | u16 map_head; | |
6b7c5b94 | 718 | |
6b7c5b94 SP |
719 | hdr = queue_head_node(txq); |
720 | queue_head_inc(txq); | |
7101e111 | 721 | map_head = txq->head; |
6b7c5b94 | 722 | |
ebc8d2ab | 723 | if (skb->len > skb->data_len) { |
e743d313 | 724 | int len = skb_headlen(skb); |
2b7bcebf IV |
725 | busaddr = dma_map_single(dev, skb->data, len, DMA_TO_DEVICE); |
726 | if (dma_mapping_error(dev, busaddr)) | |
7101e111 SP |
727 | goto dma_err; |
728 | map_single = true; | |
ebc8d2ab DM |
729 | wrb = queue_head_node(txq); |
730 | wrb_fill(wrb, busaddr, len); | |
731 | be_dws_cpu_to_le(wrb, sizeof(*wrb)); | |
732 | queue_head_inc(txq); | |
733 | copied += len; | |
734 | } | |
6b7c5b94 | 735 | |
ebc8d2ab | 736 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
9e903e08 | 737 | const struct skb_frag_struct *frag = |
ebc8d2ab | 738 | &skb_shinfo(skb)->frags[i]; |
b061b39e | 739 | busaddr = skb_frag_dma_map(dev, frag, 0, |
9e903e08 | 740 | skb_frag_size(frag), DMA_TO_DEVICE); |
2b7bcebf | 741 | if (dma_mapping_error(dev, busaddr)) |
7101e111 | 742 | goto dma_err; |
ebc8d2ab | 743 | wrb = queue_head_node(txq); |
9e903e08 | 744 | wrb_fill(wrb, busaddr, skb_frag_size(frag)); |
ebc8d2ab DM |
745 | be_dws_cpu_to_le(wrb, sizeof(*wrb)); |
746 | queue_head_inc(txq); | |
9e903e08 | 747 | copied += skb_frag_size(frag); |
6b7c5b94 SP |
748 | } |
749 | ||
750 | if (dummy_wrb) { | |
751 | wrb = queue_head_node(txq); | |
752 | wrb_fill(wrb, 0, 0); | |
753 | be_dws_cpu_to_le(wrb, sizeof(*wrb)); | |
754 | queue_head_inc(txq); | |
755 | } | |
756 | ||
bc0c3405 | 757 | wrb_fill_hdr(adapter, hdr, first_skb, wrb_cnt, copied, skip_hw_vlan); |
6b7c5b94 SP |
758 | be_dws_cpu_to_le(hdr, sizeof(*hdr)); |
759 | ||
760 | return copied; | |
7101e111 SP |
761 | dma_err: |
762 | txq->head = map_head; | |
763 | while (copied) { | |
764 | wrb = queue_head_node(txq); | |
2b7bcebf | 765 | unmap_tx_frag(dev, wrb, map_single); |
7101e111 SP |
766 | map_single = false; |
767 | copied -= wrb->frag_len; | |
768 | queue_head_inc(txq); | |
769 | } | |
770 | return 0; | |
6b7c5b94 SP |
771 | } |
772 | ||
93040ae5 | 773 | static struct sk_buff *be_insert_vlan_in_pkt(struct be_adapter *adapter, |
bc0c3405 AK |
774 | struct sk_buff *skb, |
775 | bool *skip_hw_vlan) | |
93040ae5 SK |
776 | { |
777 | u16 vlan_tag = 0; | |
778 | ||
779 | skb = skb_share_check(skb, GFP_ATOMIC); | |
780 | if (unlikely(!skb)) | |
781 | return skb; | |
782 | ||
efee8e87 | 783 | if (vlan_tx_tag_present(skb)) |
93040ae5 | 784 | vlan_tag = be_get_tx_vlan_tag(adapter, skb); |
52fe29e4 SB |
785 | |
786 | if (qnq_async_evt_rcvd(adapter) && adapter->pvid) { | |
787 | if (!vlan_tag) | |
788 | vlan_tag = adapter->pvid; | |
789 | /* f/w workaround to set skip_hw_vlan = 1, informs the F/W to | |
790 | * skip VLAN insertion | |
791 | */ | |
792 | if (skip_hw_vlan) | |
793 | *skip_hw_vlan = true; | |
794 | } | |
bc0c3405 AK |
795 | |
796 | if (vlan_tag) { | |
58717686 | 797 | skb = __vlan_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); |
bc0c3405 AK |
798 | if (unlikely(!skb)) |
799 | return skb; | |
bc0c3405 AK |
800 | skb->vlan_tci = 0; |
801 | } | |
802 | ||
803 | /* Insert the outer VLAN, if any */ | |
804 | if (adapter->qnq_vid) { | |
805 | vlan_tag = adapter->qnq_vid; | |
58717686 | 806 | skb = __vlan_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); |
bc0c3405 AK |
807 | if (unlikely(!skb)) |
808 | return skb; | |
809 | if (skip_hw_vlan) | |
810 | *skip_hw_vlan = true; | |
811 | } | |
812 | ||
93040ae5 SK |
813 | return skb; |
814 | } | |
815 | ||
bc0c3405 AK |
816 | static bool be_ipv6_exthdr_check(struct sk_buff *skb) |
817 | { | |
818 | struct ethhdr *eh = (struct ethhdr *)skb->data; | |
819 | u16 offset = ETH_HLEN; | |
820 | ||
821 | if (eh->h_proto == htons(ETH_P_IPV6)) { | |
822 | struct ipv6hdr *ip6h = (struct ipv6hdr *)(skb->data + offset); | |
823 | ||
824 | offset += sizeof(struct ipv6hdr); | |
825 | if (ip6h->nexthdr != NEXTHDR_TCP && | |
826 | ip6h->nexthdr != NEXTHDR_UDP) { | |
827 | struct ipv6_opt_hdr *ehdr = | |
828 | (struct ipv6_opt_hdr *) (skb->data + offset); | |
829 | ||
830 | /* offending pkt: 2nd byte following IPv6 hdr is 0xff */ | |
831 | if (ehdr->hdrlen == 0xff) | |
832 | return true; | |
833 | } | |
834 | } | |
835 | return false; | |
836 | } | |
837 | ||
838 | static int be_vlan_tag_tx_chk(struct be_adapter *adapter, struct sk_buff *skb) | |
839 | { | |
840 | return vlan_tx_tag_present(skb) || adapter->pvid || adapter->qnq_vid; | |
841 | } | |
842 | ||
ee9c799c SP |
843 | static int be_ipv6_tx_stall_chk(struct be_adapter *adapter, |
844 | struct sk_buff *skb) | |
bc0c3405 | 845 | { |
ee9c799c | 846 | return BE3_chip(adapter) && be_ipv6_exthdr_check(skb); |
bc0c3405 AK |
847 | } |
848 | ||
ee9c799c SP |
849 | static struct sk_buff *be_xmit_workarounds(struct be_adapter *adapter, |
850 | struct sk_buff *skb, | |
851 | bool *skip_hw_vlan) | |
6b7c5b94 | 852 | { |
d2cb6ce7 | 853 | struct vlan_ethhdr *veh = (struct vlan_ethhdr *)skb->data; |
ee9c799c SP |
854 | unsigned int eth_hdr_len; |
855 | struct iphdr *ip; | |
93040ae5 | 856 | |
48265667 SK |
857 | /* Lancer ASIC has a bug wherein packets that are 32 bytes or less |
858 | * may cause a transmit stall on that port. So the work-around is to | |
859 | * pad such packets to a 36-byte length. | |
860 | */ | |
861 | if (unlikely(lancer_chip(adapter) && skb->len <= 32)) { | |
862 | if (skb_padto(skb, 36)) | |
863 | goto tx_drop; | |
864 | skb->len = 36; | |
865 | } | |
866 | ||
1297f9db AK |
867 | /* For padded packets, BE HW modifies tot_len field in IP header |
868 | * incorrecly when VLAN tag is inserted by HW. | |
3904dcc4 | 869 | * For padded packets, Lancer computes incorrect checksum. |
1ded132d | 870 | */ |
ee9c799c SP |
871 | eth_hdr_len = ntohs(skb->protocol) == ETH_P_8021Q ? |
872 | VLAN_ETH_HLEN : ETH_HLEN; | |
3904dcc4 SK |
873 | if (skb->len <= 60 && |
874 | (lancer_chip(adapter) || vlan_tx_tag_present(skb)) && | |
ee9c799c | 875 | is_ipv4_pkt(skb)) { |
93040ae5 SK |
876 | ip = (struct iphdr *)ip_hdr(skb); |
877 | pskb_trim(skb, eth_hdr_len + ntohs(ip->tot_len)); | |
878 | } | |
1ded132d | 879 | |
d2cb6ce7 AK |
880 | /* If vlan tag is already inlined in the packet, skip HW VLAN |
881 | * tagging in UMC mode | |
882 | */ | |
883 | if ((adapter->function_mode & UMC_ENABLED) && | |
884 | veh->h_vlan_proto == htons(ETH_P_8021Q)) | |
ee9c799c | 885 | *skip_hw_vlan = true; |
d2cb6ce7 | 886 | |
93040ae5 SK |
887 | /* HW has a bug wherein it will calculate CSUM for VLAN |
888 | * pkts even though it is disabled. | |
889 | * Manually insert VLAN in pkt. | |
890 | */ | |
891 | if (skb->ip_summed != CHECKSUM_PARTIAL && | |
ee9c799c SP |
892 | vlan_tx_tag_present(skb)) { |
893 | skb = be_insert_vlan_in_pkt(adapter, skb, skip_hw_vlan); | |
bc0c3405 AK |
894 | if (unlikely(!skb)) |
895 | goto tx_drop; | |
896 | } | |
897 | ||
898 | /* HW may lockup when VLAN HW tagging is requested on | |
899 | * certain ipv6 packets. Drop such pkts if the HW workaround to | |
900 | * skip HW tagging is not enabled by FW. | |
901 | */ | |
902 | if (unlikely(be_ipv6_tx_stall_chk(adapter, skb) && | |
ee9c799c SP |
903 | (adapter->pvid || adapter->qnq_vid) && |
904 | !qnq_async_evt_rcvd(adapter))) | |
bc0c3405 AK |
905 | goto tx_drop; |
906 | ||
907 | /* Manual VLAN tag insertion to prevent: | |
908 | * ASIC lockup when the ASIC inserts VLAN tag into | |
909 | * certain ipv6 packets. Insert VLAN tags in driver, | |
910 | * and set event, completion, vlan bits accordingly | |
911 | * in the Tx WRB. | |
912 | */ | |
913 | if (be_ipv6_tx_stall_chk(adapter, skb) && | |
914 | be_vlan_tag_tx_chk(adapter, skb)) { | |
ee9c799c | 915 | skb = be_insert_vlan_in_pkt(adapter, skb, skip_hw_vlan); |
1ded132d AK |
916 | if (unlikely(!skb)) |
917 | goto tx_drop; | |
1ded132d AK |
918 | } |
919 | ||
ee9c799c SP |
920 | return skb; |
921 | tx_drop: | |
922 | dev_kfree_skb_any(skb); | |
923 | return NULL; | |
924 | } | |
925 | ||
926 | static netdev_tx_t be_xmit(struct sk_buff *skb, struct net_device *netdev) | |
927 | { | |
928 | struct be_adapter *adapter = netdev_priv(netdev); | |
929 | struct be_tx_obj *txo = &adapter->tx_obj[skb_get_queue_mapping(skb)]; | |
930 | struct be_queue_info *txq = &txo->q; | |
931 | bool dummy_wrb, stopped = false; | |
932 | u32 wrb_cnt = 0, copied = 0; | |
933 | bool skip_hw_vlan = false; | |
934 | u32 start = txq->head; | |
935 | ||
936 | skb = be_xmit_workarounds(adapter, skb, &skip_hw_vlan); | |
937 | if (!skb) | |
938 | return NETDEV_TX_OK; | |
939 | ||
fe6d2a38 | 940 | wrb_cnt = wrb_cnt_for_skb(adapter, skb, &dummy_wrb); |
6b7c5b94 | 941 | |
bc0c3405 AK |
942 | copied = make_tx_wrbs(adapter, txq, skb, wrb_cnt, dummy_wrb, |
943 | skip_hw_vlan); | |
c190e3c8 | 944 | if (copied) { |
cd8f76c0 ED |
945 | int gso_segs = skb_shinfo(skb)->gso_segs; |
946 | ||
c190e3c8 | 947 | /* record the sent skb in the sent_skb table */ |
3c8def97 SP |
948 | BUG_ON(txo->sent_skb_list[start]); |
949 | txo->sent_skb_list[start] = skb; | |
c190e3c8 AK |
950 | |
951 | /* Ensure txq has space for the next skb; Else stop the queue | |
952 | * *BEFORE* ringing the tx doorbell, so that we serialze the | |
953 | * tx compls of the current transmit which'll wake up the queue | |
954 | */ | |
7101e111 | 955 | atomic_add(wrb_cnt, &txq->used); |
c190e3c8 AK |
956 | if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= |
957 | txq->len) { | |
3c8def97 | 958 | netif_stop_subqueue(netdev, skb_get_queue_mapping(skb)); |
c190e3c8 AK |
959 | stopped = true; |
960 | } | |
6b7c5b94 | 961 | |
94d73aaa | 962 | be_txq_notify(adapter, txo, wrb_cnt); |
6b7c5b94 | 963 | |
cd8f76c0 | 964 | be_tx_stats_update(txo, wrb_cnt, copied, gso_segs, stopped); |
c190e3c8 AK |
965 | } else { |
966 | txq->head = start; | |
967 | dev_kfree_skb_any(skb); | |
6b7c5b94 | 968 | } |
6b7c5b94 SP |
969 | return NETDEV_TX_OK; |
970 | } | |
971 | ||
972 | static int be_change_mtu(struct net_device *netdev, int new_mtu) | |
973 | { | |
974 | struct be_adapter *adapter = netdev_priv(netdev); | |
975 | if (new_mtu < BE_MIN_MTU || | |
34a89b8c AK |
976 | new_mtu > (BE_MAX_JUMBO_FRAME_SIZE - |
977 | (ETH_HLEN + ETH_FCS_LEN))) { | |
6b7c5b94 SP |
978 | dev_info(&adapter->pdev->dev, |
979 | "MTU must be between %d and %d bytes\n", | |
34a89b8c AK |
980 | BE_MIN_MTU, |
981 | (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN))); | |
6b7c5b94 SP |
982 | return -EINVAL; |
983 | } | |
984 | dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n", | |
985 | netdev->mtu, new_mtu); | |
986 | netdev->mtu = new_mtu; | |
987 | return 0; | |
988 | } | |
989 | ||
990 | /* | |
82903e4b AK |
991 | * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE. |
992 | * If the user configures more, place BE in vlan promiscuous mode. | |
6b7c5b94 | 993 | */ |
10329df8 | 994 | static int be_vid_config(struct be_adapter *adapter) |
6b7c5b94 | 995 | { |
10329df8 SP |
996 | u16 vids[BE_NUM_VLANS_SUPPORTED]; |
997 | u16 num = 0, i; | |
82903e4b | 998 | int status = 0; |
1da87b7f | 999 | |
c0e64ef4 SP |
1000 | /* No need to further configure vids if in promiscuous mode */ |
1001 | if (adapter->promiscuous) | |
1002 | return 0; | |
1003 | ||
0fc16ebf PR |
1004 | if (adapter->vlans_added > adapter->max_vlans) |
1005 | goto set_vlan_promisc; | |
1006 | ||
1007 | /* Construct VLAN Table to give to HW */ | |
1008 | for (i = 0; i < VLAN_N_VID; i++) | |
1009 | if (adapter->vlan_tag[i]) | |
10329df8 | 1010 | vids[num++] = cpu_to_le16(i); |
0fc16ebf PR |
1011 | |
1012 | status = be_cmd_vlan_config(adapter, adapter->if_handle, | |
10329df8 | 1013 | vids, num, 1, 0); |
0fc16ebf PR |
1014 | |
1015 | /* Set to VLAN promisc mode as setting VLAN filter failed */ | |
1016 | if (status) { | |
1017 | dev_info(&adapter->pdev->dev, "Exhausted VLAN HW filters.\n"); | |
1018 | dev_info(&adapter->pdev->dev, "Disabling HW VLAN filtering.\n"); | |
1019 | goto set_vlan_promisc; | |
6b7c5b94 | 1020 | } |
1da87b7f | 1021 | |
b31c50a7 | 1022 | return status; |
0fc16ebf PR |
1023 | |
1024 | set_vlan_promisc: | |
1025 | status = be_cmd_vlan_config(adapter, adapter->if_handle, | |
1026 | NULL, 0, 1, 1); | |
1027 | return status; | |
6b7c5b94 SP |
1028 | } |
1029 | ||
80d5c368 | 1030 | static int be_vlan_add_vid(struct net_device *netdev, __be16 proto, u16 vid) |
6b7c5b94 SP |
1031 | { |
1032 | struct be_adapter *adapter = netdev_priv(netdev); | |
80817cbf | 1033 | int status = 0; |
6b7c5b94 | 1034 | |
a85e9986 | 1035 | if (!lancer_chip(adapter) && !be_physfn(adapter)) { |
80817cbf AK |
1036 | status = -EINVAL; |
1037 | goto ret; | |
1038 | } | |
ba343c77 | 1039 | |
a85e9986 PR |
1040 | /* Packets with VID 0 are always received by Lancer by default */ |
1041 | if (lancer_chip(adapter) && vid == 0) | |
1042 | goto ret; | |
1043 | ||
6b7c5b94 | 1044 | adapter->vlan_tag[vid] = 1; |
82903e4b | 1045 | if (adapter->vlans_added <= (adapter->max_vlans + 1)) |
10329df8 | 1046 | status = be_vid_config(adapter); |
8e586137 | 1047 | |
80817cbf AK |
1048 | if (!status) |
1049 | adapter->vlans_added++; | |
1050 | else | |
1051 | adapter->vlan_tag[vid] = 0; | |
1052 | ret: | |
1053 | return status; | |
6b7c5b94 SP |
1054 | } |
1055 | ||
80d5c368 | 1056 | static int be_vlan_rem_vid(struct net_device *netdev, __be16 proto, u16 vid) |
6b7c5b94 SP |
1057 | { |
1058 | struct be_adapter *adapter = netdev_priv(netdev); | |
80817cbf | 1059 | int status = 0; |
6b7c5b94 | 1060 | |
a85e9986 | 1061 | if (!lancer_chip(adapter) && !be_physfn(adapter)) { |
80817cbf AK |
1062 | status = -EINVAL; |
1063 | goto ret; | |
1064 | } | |
ba343c77 | 1065 | |
a85e9986 PR |
1066 | /* Packets with VID 0 are always received by Lancer by default */ |
1067 | if (lancer_chip(adapter) && vid == 0) | |
1068 | goto ret; | |
1069 | ||
6b7c5b94 | 1070 | adapter->vlan_tag[vid] = 0; |
82903e4b | 1071 | if (adapter->vlans_added <= adapter->max_vlans) |
10329df8 | 1072 | status = be_vid_config(adapter); |
8e586137 | 1073 | |
80817cbf AK |
1074 | if (!status) |
1075 | adapter->vlans_added--; | |
1076 | else | |
1077 | adapter->vlan_tag[vid] = 1; | |
1078 | ret: | |
1079 | return status; | |
6b7c5b94 SP |
1080 | } |
1081 | ||
a54769f5 | 1082 | static void be_set_rx_mode(struct net_device *netdev) |
6b7c5b94 SP |
1083 | { |
1084 | struct be_adapter *adapter = netdev_priv(netdev); | |
0fc16ebf | 1085 | int status; |
6b7c5b94 | 1086 | |
24307eef | 1087 | if (netdev->flags & IFF_PROMISC) { |
5b8821b7 | 1088 | be_cmd_rx_filter(adapter, IFF_PROMISC, ON); |
24307eef SP |
1089 | adapter->promiscuous = true; |
1090 | goto done; | |
6b7c5b94 SP |
1091 | } |
1092 | ||
25985edc | 1093 | /* BE was previously in promiscuous mode; disable it */ |
24307eef SP |
1094 | if (adapter->promiscuous) { |
1095 | adapter->promiscuous = false; | |
5b8821b7 | 1096 | be_cmd_rx_filter(adapter, IFF_PROMISC, OFF); |
c0e64ef4 SP |
1097 | |
1098 | if (adapter->vlans_added) | |
10329df8 | 1099 | be_vid_config(adapter); |
6b7c5b94 SP |
1100 | } |
1101 | ||
e7b909a6 | 1102 | /* Enable multicast promisc if num configured exceeds what we support */ |
4cd24eaf | 1103 | if (netdev->flags & IFF_ALLMULTI || |
abb93951 | 1104 | netdev_mc_count(netdev) > adapter->max_mcast_mac) { |
5b8821b7 | 1105 | be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON); |
24307eef | 1106 | goto done; |
6b7c5b94 | 1107 | } |
6b7c5b94 | 1108 | |
fbc13f01 AK |
1109 | if (netdev_uc_count(netdev) != adapter->uc_macs) { |
1110 | struct netdev_hw_addr *ha; | |
1111 | int i = 1; /* First slot is claimed by the Primary MAC */ | |
1112 | ||
1113 | for (; adapter->uc_macs > 0; adapter->uc_macs--, i++) { | |
1114 | be_cmd_pmac_del(adapter, adapter->if_handle, | |
1115 | adapter->pmac_id[i], 0); | |
1116 | } | |
1117 | ||
1118 | if (netdev_uc_count(netdev) > adapter->max_pmac_cnt) { | |
1119 | be_cmd_rx_filter(adapter, IFF_PROMISC, ON); | |
1120 | adapter->promiscuous = true; | |
1121 | goto done; | |
1122 | } | |
1123 | ||
1124 | netdev_for_each_uc_addr(ha, adapter->netdev) { | |
1125 | adapter->uc_macs++; /* First slot is for Primary MAC */ | |
1126 | be_cmd_pmac_add(adapter, (u8 *)ha->addr, | |
1127 | adapter->if_handle, | |
1128 | &adapter->pmac_id[adapter->uc_macs], 0); | |
1129 | } | |
1130 | } | |
1131 | ||
0fc16ebf PR |
1132 | status = be_cmd_rx_filter(adapter, IFF_MULTICAST, ON); |
1133 | ||
1134 | /* Set to MCAST promisc mode if setting MULTICAST address fails */ | |
1135 | if (status) { | |
1136 | dev_info(&adapter->pdev->dev, "Exhausted multicast HW filters.\n"); | |
1137 | dev_info(&adapter->pdev->dev, "Disabling HW multicast filtering.\n"); | |
1138 | be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON); | |
1139 | } | |
24307eef SP |
1140 | done: |
1141 | return; | |
6b7c5b94 SP |
1142 | } |
1143 | ||
ba343c77 SB |
1144 | static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) |
1145 | { | |
1146 | struct be_adapter *adapter = netdev_priv(netdev); | |
11ac75ed | 1147 | struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf]; |
ba343c77 SB |
1148 | int status; |
1149 | ||
11ac75ed | 1150 | if (!sriov_enabled(adapter)) |
ba343c77 SB |
1151 | return -EPERM; |
1152 | ||
11ac75ed | 1153 | if (!is_valid_ether_addr(mac) || vf >= adapter->num_vfs) |
ba343c77 SB |
1154 | return -EINVAL; |
1155 | ||
3175d8c2 SP |
1156 | if (BEx_chip(adapter)) { |
1157 | be_cmd_pmac_del(adapter, vf_cfg->if_handle, vf_cfg->pmac_id, | |
1158 | vf + 1); | |
ba343c77 | 1159 | |
11ac75ed SP |
1160 | status = be_cmd_pmac_add(adapter, mac, vf_cfg->if_handle, |
1161 | &vf_cfg->pmac_id, vf + 1); | |
3175d8c2 SP |
1162 | } else { |
1163 | status = be_cmd_set_mac(adapter, mac, vf_cfg->if_handle, | |
1164 | vf + 1); | |
590c391d PR |
1165 | } |
1166 | ||
64600ea5 | 1167 | if (status) |
ba343c77 SB |
1168 | dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n", |
1169 | mac, vf); | |
64600ea5 | 1170 | else |
11ac75ed | 1171 | memcpy(vf_cfg->mac_addr, mac, ETH_ALEN); |
64600ea5 | 1172 | |
ba343c77 SB |
1173 | return status; |
1174 | } | |
1175 | ||
64600ea5 AK |
1176 | static int be_get_vf_config(struct net_device *netdev, int vf, |
1177 | struct ifla_vf_info *vi) | |
1178 | { | |
1179 | struct be_adapter *adapter = netdev_priv(netdev); | |
11ac75ed | 1180 | struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf]; |
64600ea5 | 1181 | |
11ac75ed | 1182 | if (!sriov_enabled(adapter)) |
64600ea5 AK |
1183 | return -EPERM; |
1184 | ||
11ac75ed | 1185 | if (vf >= adapter->num_vfs) |
64600ea5 AK |
1186 | return -EINVAL; |
1187 | ||
1188 | vi->vf = vf; | |
11ac75ed SP |
1189 | vi->tx_rate = vf_cfg->tx_rate; |
1190 | vi->vlan = vf_cfg->vlan_tag; | |
64600ea5 | 1191 | vi->qos = 0; |
11ac75ed | 1192 | memcpy(&vi->mac, vf_cfg->mac_addr, ETH_ALEN); |
64600ea5 AK |
1193 | |
1194 | return 0; | |
1195 | } | |
1196 | ||
1da87b7f AK |
1197 | static int be_set_vf_vlan(struct net_device *netdev, |
1198 | int vf, u16 vlan, u8 qos) | |
1199 | { | |
1200 | struct be_adapter *adapter = netdev_priv(netdev); | |
1201 | int status = 0; | |
1202 | ||
11ac75ed | 1203 | if (!sriov_enabled(adapter)) |
1da87b7f AK |
1204 | return -EPERM; |
1205 | ||
11ac75ed | 1206 | if (vf >= adapter->num_vfs || vlan > 4095) |
1da87b7f AK |
1207 | return -EINVAL; |
1208 | ||
1209 | if (vlan) { | |
f1f3ee1b AK |
1210 | if (adapter->vf_cfg[vf].vlan_tag != vlan) { |
1211 | /* If this is new value, program it. Else skip. */ | |
1212 | adapter->vf_cfg[vf].vlan_tag = vlan; | |
1213 | ||
1214 | status = be_cmd_set_hsw_config(adapter, vlan, | |
1215 | vf + 1, adapter->vf_cfg[vf].if_handle); | |
1216 | } | |
1da87b7f | 1217 | } else { |
f1f3ee1b | 1218 | /* Reset Transparent Vlan Tagging. */ |
11ac75ed | 1219 | adapter->vf_cfg[vf].vlan_tag = 0; |
f1f3ee1b AK |
1220 | vlan = adapter->vf_cfg[vf].def_vid; |
1221 | status = be_cmd_set_hsw_config(adapter, vlan, vf + 1, | |
1222 | adapter->vf_cfg[vf].if_handle); | |
1da87b7f AK |
1223 | } |
1224 | ||
1da87b7f AK |
1225 | |
1226 | if (status) | |
1227 | dev_info(&adapter->pdev->dev, | |
1228 | "VLAN %d config on VF %d failed\n", vlan, vf); | |
1229 | return status; | |
1230 | } | |
1231 | ||
e1d18735 AK |
1232 | static int be_set_vf_tx_rate(struct net_device *netdev, |
1233 | int vf, int rate) | |
1234 | { | |
1235 | struct be_adapter *adapter = netdev_priv(netdev); | |
1236 | int status = 0; | |
1237 | ||
11ac75ed | 1238 | if (!sriov_enabled(adapter)) |
e1d18735 AK |
1239 | return -EPERM; |
1240 | ||
94f434c2 | 1241 | if (vf >= adapter->num_vfs) |
e1d18735 AK |
1242 | return -EINVAL; |
1243 | ||
94f434c2 AK |
1244 | if (rate < 100 || rate > 10000) { |
1245 | dev_err(&adapter->pdev->dev, | |
1246 | "tx rate must be between 100 and 10000 Mbps\n"); | |
1247 | return -EINVAL; | |
1248 | } | |
e1d18735 | 1249 | |
d5c18473 PR |
1250 | if (lancer_chip(adapter)) |
1251 | status = be_cmd_set_profile_config(adapter, rate / 10, vf + 1); | |
1252 | else | |
1253 | status = be_cmd_set_qos(adapter, rate / 10, vf + 1); | |
e1d18735 AK |
1254 | |
1255 | if (status) | |
94f434c2 | 1256 | dev_err(&adapter->pdev->dev, |
e1d18735 | 1257 | "tx rate %d on VF %d failed\n", rate, vf); |
94f434c2 AK |
1258 | else |
1259 | adapter->vf_cfg[vf].tx_rate = rate; | |
e1d18735 AK |
1260 | return status; |
1261 | } | |
1262 | ||
10ef9ab4 | 1263 | static void be_eqd_update(struct be_adapter *adapter, struct be_eq_obj *eqo) |
6b7c5b94 | 1264 | { |
10ef9ab4 | 1265 | struct be_rx_stats *stats = rx_stats(&adapter->rx_obj[eqo->idx]); |
4097f663 | 1266 | ulong now = jiffies; |
ac124ff9 | 1267 | ulong delta = now - stats->rx_jiffies; |
ab1594e9 SP |
1268 | u64 pkts; |
1269 | unsigned int start, eqd; | |
ac124ff9 | 1270 | |
10ef9ab4 SP |
1271 | if (!eqo->enable_aic) { |
1272 | eqd = eqo->eqd; | |
1273 | goto modify_eqd; | |
1274 | } | |
1275 | ||
1276 | if (eqo->idx >= adapter->num_rx_qs) | |
ac124ff9 | 1277 | return; |
6b7c5b94 | 1278 | |
10ef9ab4 SP |
1279 | stats = rx_stats(&adapter->rx_obj[eqo->idx]); |
1280 | ||
4097f663 | 1281 | /* Wrapped around */ |
3abcdeda SP |
1282 | if (time_before(now, stats->rx_jiffies)) { |
1283 | stats->rx_jiffies = now; | |
4097f663 SP |
1284 | return; |
1285 | } | |
6b7c5b94 | 1286 | |
ac124ff9 SP |
1287 | /* Update once a second */ |
1288 | if (delta < HZ) | |
6b7c5b94 SP |
1289 | return; |
1290 | ||
ab1594e9 SP |
1291 | do { |
1292 | start = u64_stats_fetch_begin_bh(&stats->sync); | |
1293 | pkts = stats->rx_pkts; | |
1294 | } while (u64_stats_fetch_retry_bh(&stats->sync, start)); | |
1295 | ||
68c3e5a7 | 1296 | stats->rx_pps = (unsigned long)(pkts - stats->rx_pkts_prev) / (delta / HZ); |
ab1594e9 | 1297 | stats->rx_pkts_prev = pkts; |
3abcdeda | 1298 | stats->rx_jiffies = now; |
10ef9ab4 SP |
1299 | eqd = (stats->rx_pps / 110000) << 3; |
1300 | eqd = min(eqd, eqo->max_eqd); | |
1301 | eqd = max(eqd, eqo->min_eqd); | |
ac124ff9 SP |
1302 | if (eqd < 10) |
1303 | eqd = 0; | |
10ef9ab4 SP |
1304 | |
1305 | modify_eqd: | |
1306 | if (eqd != eqo->cur_eqd) { | |
1307 | be_cmd_modify_eqd(adapter, eqo->q.id, eqd); | |
1308 | eqo->cur_eqd = eqd; | |
ac124ff9 | 1309 | } |
6b7c5b94 SP |
1310 | } |
1311 | ||
3abcdeda | 1312 | static void be_rx_stats_update(struct be_rx_obj *rxo, |
2e588f84 | 1313 | struct be_rx_compl_info *rxcp) |
4097f663 | 1314 | { |
ac124ff9 | 1315 | struct be_rx_stats *stats = rx_stats(rxo); |
1ef78abe | 1316 | |
ab1594e9 | 1317 | u64_stats_update_begin(&stats->sync); |
3abcdeda | 1318 | stats->rx_compl++; |
2e588f84 | 1319 | stats->rx_bytes += rxcp->pkt_size; |
3abcdeda | 1320 | stats->rx_pkts++; |
2e588f84 | 1321 | if (rxcp->pkt_type == BE_MULTICAST_PACKET) |
3abcdeda | 1322 | stats->rx_mcast_pkts++; |
2e588f84 | 1323 | if (rxcp->err) |
ac124ff9 | 1324 | stats->rx_compl_err++; |
ab1594e9 | 1325 | u64_stats_update_end(&stats->sync); |
4097f663 SP |
1326 | } |
1327 | ||
2e588f84 | 1328 | static inline bool csum_passed(struct be_rx_compl_info *rxcp) |
728a9972 | 1329 | { |
19fad86f PR |
1330 | /* L4 checksum is not reliable for non TCP/UDP packets. |
1331 | * Also ignore ipcksm for ipv6 pkts */ | |
2e588f84 SP |
1332 | return (rxcp->tcpf || rxcp->udpf) && rxcp->l4_csum && |
1333 | (rxcp->ip_csum || rxcp->ipv6); | |
728a9972 AK |
1334 | } |
1335 | ||
10ef9ab4 SP |
1336 | static struct be_rx_page_info *get_rx_page_info(struct be_rx_obj *rxo, |
1337 | u16 frag_idx) | |
6b7c5b94 | 1338 | { |
10ef9ab4 | 1339 | struct be_adapter *adapter = rxo->adapter; |
6b7c5b94 | 1340 | struct be_rx_page_info *rx_page_info; |
3abcdeda | 1341 | struct be_queue_info *rxq = &rxo->q; |
6b7c5b94 | 1342 | |
3abcdeda | 1343 | rx_page_info = &rxo->page_info_tbl[frag_idx]; |
6b7c5b94 SP |
1344 | BUG_ON(!rx_page_info->page); |
1345 | ||
205859a2 | 1346 | if (rx_page_info->last_page_user) { |
2b7bcebf IV |
1347 | dma_unmap_page(&adapter->pdev->dev, |
1348 | dma_unmap_addr(rx_page_info, bus), | |
1349 | adapter->big_page_size, DMA_FROM_DEVICE); | |
205859a2 AK |
1350 | rx_page_info->last_page_user = false; |
1351 | } | |
6b7c5b94 SP |
1352 | |
1353 | atomic_dec(&rxq->used); | |
1354 | return rx_page_info; | |
1355 | } | |
1356 | ||
1357 | /* Throwaway the data in the Rx completion */ | |
10ef9ab4 SP |
1358 | static void be_rx_compl_discard(struct be_rx_obj *rxo, |
1359 | struct be_rx_compl_info *rxcp) | |
6b7c5b94 | 1360 | { |
3abcdeda | 1361 | struct be_queue_info *rxq = &rxo->q; |
6b7c5b94 | 1362 | struct be_rx_page_info *page_info; |
2e588f84 | 1363 | u16 i, num_rcvd = rxcp->num_rcvd; |
6b7c5b94 | 1364 | |
e80d9da6 | 1365 | for (i = 0; i < num_rcvd; i++) { |
10ef9ab4 | 1366 | page_info = get_rx_page_info(rxo, rxcp->rxq_idx); |
e80d9da6 PR |
1367 | put_page(page_info->page); |
1368 | memset(page_info, 0, sizeof(*page_info)); | |
2e588f84 | 1369 | index_inc(&rxcp->rxq_idx, rxq->len); |
6b7c5b94 SP |
1370 | } |
1371 | } | |
1372 | ||
1373 | /* | |
1374 | * skb_fill_rx_data forms a complete skb for an ether frame | |
1375 | * indicated by rxcp. | |
1376 | */ | |
10ef9ab4 SP |
1377 | static void skb_fill_rx_data(struct be_rx_obj *rxo, struct sk_buff *skb, |
1378 | struct be_rx_compl_info *rxcp) | |
6b7c5b94 | 1379 | { |
3abcdeda | 1380 | struct be_queue_info *rxq = &rxo->q; |
6b7c5b94 | 1381 | struct be_rx_page_info *page_info; |
2e588f84 SP |
1382 | u16 i, j; |
1383 | u16 hdr_len, curr_frag_len, remaining; | |
6b7c5b94 | 1384 | u8 *start; |
6b7c5b94 | 1385 | |
10ef9ab4 | 1386 | page_info = get_rx_page_info(rxo, rxcp->rxq_idx); |
6b7c5b94 SP |
1387 | start = page_address(page_info->page) + page_info->page_offset; |
1388 | prefetch(start); | |
1389 | ||
1390 | /* Copy data in the first descriptor of this completion */ | |
2e588f84 | 1391 | curr_frag_len = min(rxcp->pkt_size, rx_frag_size); |
6b7c5b94 | 1392 | |
6b7c5b94 SP |
1393 | skb->len = curr_frag_len; |
1394 | if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */ | |
ac1ae5f3 | 1395 | memcpy(skb->data, start, curr_frag_len); |
6b7c5b94 SP |
1396 | /* Complete packet has now been moved to data */ |
1397 | put_page(page_info->page); | |
1398 | skb->data_len = 0; | |
1399 | skb->tail += curr_frag_len; | |
1400 | } else { | |
ac1ae5f3 ED |
1401 | hdr_len = ETH_HLEN; |
1402 | memcpy(skb->data, start, hdr_len); | |
6b7c5b94 | 1403 | skb_shinfo(skb)->nr_frags = 1; |
b061b39e | 1404 | skb_frag_set_page(skb, 0, page_info->page); |
6b7c5b94 SP |
1405 | skb_shinfo(skb)->frags[0].page_offset = |
1406 | page_info->page_offset + hdr_len; | |
9e903e08 | 1407 | skb_frag_size_set(&skb_shinfo(skb)->frags[0], curr_frag_len - hdr_len); |
6b7c5b94 | 1408 | skb->data_len = curr_frag_len - hdr_len; |
bdb28a97 | 1409 | skb->truesize += rx_frag_size; |
6b7c5b94 SP |
1410 | skb->tail += hdr_len; |
1411 | } | |
205859a2 | 1412 | page_info->page = NULL; |
6b7c5b94 | 1413 | |
2e588f84 SP |
1414 | if (rxcp->pkt_size <= rx_frag_size) { |
1415 | BUG_ON(rxcp->num_rcvd != 1); | |
1416 | return; | |
6b7c5b94 SP |
1417 | } |
1418 | ||
1419 | /* More frags present for this completion */ | |
2e588f84 SP |
1420 | index_inc(&rxcp->rxq_idx, rxq->len); |
1421 | remaining = rxcp->pkt_size - curr_frag_len; | |
1422 | for (i = 1, j = 0; i < rxcp->num_rcvd; i++) { | |
10ef9ab4 | 1423 | page_info = get_rx_page_info(rxo, rxcp->rxq_idx); |
2e588f84 | 1424 | curr_frag_len = min(remaining, rx_frag_size); |
6b7c5b94 | 1425 | |
bd46cb6c AK |
1426 | /* Coalesce all frags from the same physical page in one slot */ |
1427 | if (page_info->page_offset == 0) { | |
1428 | /* Fresh page */ | |
1429 | j++; | |
b061b39e | 1430 | skb_frag_set_page(skb, j, page_info->page); |
bd46cb6c AK |
1431 | skb_shinfo(skb)->frags[j].page_offset = |
1432 | page_info->page_offset; | |
9e903e08 | 1433 | skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0); |
bd46cb6c AK |
1434 | skb_shinfo(skb)->nr_frags++; |
1435 | } else { | |
1436 | put_page(page_info->page); | |
1437 | } | |
1438 | ||
9e903e08 | 1439 | skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len); |
6b7c5b94 SP |
1440 | skb->len += curr_frag_len; |
1441 | skb->data_len += curr_frag_len; | |
bdb28a97 | 1442 | skb->truesize += rx_frag_size; |
2e588f84 SP |
1443 | remaining -= curr_frag_len; |
1444 | index_inc(&rxcp->rxq_idx, rxq->len); | |
205859a2 | 1445 | page_info->page = NULL; |
6b7c5b94 | 1446 | } |
bd46cb6c | 1447 | BUG_ON(j > MAX_SKB_FRAGS); |
6b7c5b94 SP |
1448 | } |
1449 | ||
5be93b9a | 1450 | /* Process the RX completion indicated by rxcp when GRO is disabled */ |
10ef9ab4 SP |
1451 | static void be_rx_compl_process(struct be_rx_obj *rxo, |
1452 | struct be_rx_compl_info *rxcp) | |
6b7c5b94 | 1453 | { |
10ef9ab4 | 1454 | struct be_adapter *adapter = rxo->adapter; |
6332c8d3 | 1455 | struct net_device *netdev = adapter->netdev; |
6b7c5b94 | 1456 | struct sk_buff *skb; |
89420424 | 1457 | |
bb349bb4 | 1458 | skb = netdev_alloc_skb_ip_align(netdev, BE_RX_SKB_ALLOC_SIZE); |
a058a632 | 1459 | if (unlikely(!skb)) { |
ac124ff9 | 1460 | rx_stats(rxo)->rx_drops_no_skbs++; |
10ef9ab4 | 1461 | be_rx_compl_discard(rxo, rxcp); |
6b7c5b94 SP |
1462 | return; |
1463 | } | |
1464 | ||
10ef9ab4 | 1465 | skb_fill_rx_data(rxo, skb, rxcp); |
6b7c5b94 | 1466 | |
6332c8d3 | 1467 | if (likely((netdev->features & NETIF_F_RXCSUM) && csum_passed(rxcp))) |
728a9972 | 1468 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
c6ce2f4b SK |
1469 | else |
1470 | skb_checksum_none_assert(skb); | |
6b7c5b94 | 1471 | |
6332c8d3 | 1472 | skb->protocol = eth_type_trans(skb, netdev); |
aaa6daec | 1473 | skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]); |
10ef9ab4 | 1474 | if (netdev->features & NETIF_F_RXHASH) |
4b972914 AK |
1475 | skb->rxhash = rxcp->rss_hash; |
1476 | ||
6b7c5b94 | 1477 | |
343e43c0 | 1478 | if (rxcp->vlanf) |
86a9bad3 | 1479 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rxcp->vlan_tag); |
4c5102f9 AK |
1480 | |
1481 | netif_receive_skb(skb); | |
6b7c5b94 SP |
1482 | } |
1483 | ||
5be93b9a | 1484 | /* Process the RX completion indicated by rxcp when GRO is enabled */ |
4188e7df JH |
1485 | static void be_rx_compl_process_gro(struct be_rx_obj *rxo, |
1486 | struct napi_struct *napi, | |
1487 | struct be_rx_compl_info *rxcp) | |
6b7c5b94 | 1488 | { |
10ef9ab4 | 1489 | struct be_adapter *adapter = rxo->adapter; |
6b7c5b94 | 1490 | struct be_rx_page_info *page_info; |
5be93b9a | 1491 | struct sk_buff *skb = NULL; |
3abcdeda | 1492 | struct be_queue_info *rxq = &rxo->q; |
2e588f84 SP |
1493 | u16 remaining, curr_frag_len; |
1494 | u16 i, j; | |
3968fa1e | 1495 | |
10ef9ab4 | 1496 | skb = napi_get_frags(napi); |
5be93b9a | 1497 | if (!skb) { |
10ef9ab4 | 1498 | be_rx_compl_discard(rxo, rxcp); |
5be93b9a AK |
1499 | return; |
1500 | } | |
1501 | ||
2e588f84 SP |
1502 | remaining = rxcp->pkt_size; |
1503 | for (i = 0, j = -1; i < rxcp->num_rcvd; i++) { | |
10ef9ab4 | 1504 | page_info = get_rx_page_info(rxo, rxcp->rxq_idx); |
6b7c5b94 SP |
1505 | |
1506 | curr_frag_len = min(remaining, rx_frag_size); | |
1507 | ||
bd46cb6c AK |
1508 | /* Coalesce all frags from the same physical page in one slot */ |
1509 | if (i == 0 || page_info->page_offset == 0) { | |
1510 | /* First frag or Fresh page */ | |
1511 | j++; | |
b061b39e | 1512 | skb_frag_set_page(skb, j, page_info->page); |
5be93b9a AK |
1513 | skb_shinfo(skb)->frags[j].page_offset = |
1514 | page_info->page_offset; | |
9e903e08 | 1515 | skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0); |
bd46cb6c AK |
1516 | } else { |
1517 | put_page(page_info->page); | |
1518 | } | |
9e903e08 | 1519 | skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len); |
bdb28a97 | 1520 | skb->truesize += rx_frag_size; |
bd46cb6c | 1521 | remaining -= curr_frag_len; |
2e588f84 | 1522 | index_inc(&rxcp->rxq_idx, rxq->len); |
6b7c5b94 SP |
1523 | memset(page_info, 0, sizeof(*page_info)); |
1524 | } | |
bd46cb6c | 1525 | BUG_ON(j > MAX_SKB_FRAGS); |
6b7c5b94 | 1526 | |
5be93b9a | 1527 | skb_shinfo(skb)->nr_frags = j + 1; |
2e588f84 SP |
1528 | skb->len = rxcp->pkt_size; |
1529 | skb->data_len = rxcp->pkt_size; | |
5be93b9a | 1530 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
aaa6daec | 1531 | skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]); |
4b972914 AK |
1532 | if (adapter->netdev->features & NETIF_F_RXHASH) |
1533 | skb->rxhash = rxcp->rss_hash; | |
5be93b9a | 1534 | |
343e43c0 | 1535 | if (rxcp->vlanf) |
86a9bad3 | 1536 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rxcp->vlan_tag); |
4c5102f9 | 1537 | |
10ef9ab4 | 1538 | napi_gro_frags(napi); |
2e588f84 SP |
1539 | } |
1540 | ||
10ef9ab4 SP |
1541 | static void be_parse_rx_compl_v1(struct be_eth_rx_compl *compl, |
1542 | struct be_rx_compl_info *rxcp) | |
2e588f84 SP |
1543 | { |
1544 | rxcp->pkt_size = | |
1545 | AMAP_GET_BITS(struct amap_eth_rx_compl_v1, pktsize, compl); | |
1546 | rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtp, compl); | |
1547 | rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, err, compl); | |
1548 | rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, tcpf, compl); | |
9ecb42fd | 1549 | rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, udpf, compl); |
2e588f84 SP |
1550 | rxcp->ip_csum = |
1551 | AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ipcksm, compl); | |
1552 | rxcp->l4_csum = | |
1553 | AMAP_GET_BITS(struct amap_eth_rx_compl_v1, l4_cksm, compl); | |
1554 | rxcp->ipv6 = | |
1555 | AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ip_version, compl); | |
1556 | rxcp->rxq_idx = | |
1557 | AMAP_GET_BITS(struct amap_eth_rx_compl_v1, fragndx, compl); | |
1558 | rxcp->num_rcvd = | |
1559 | AMAP_GET_BITS(struct amap_eth_rx_compl_v1, numfrags, compl); | |
1560 | rxcp->pkt_type = | |
1561 | AMAP_GET_BITS(struct amap_eth_rx_compl_v1, cast_enc, compl); | |
4b972914 | 1562 | rxcp->rss_hash = |
c297977e | 1563 | AMAP_GET_BITS(struct amap_eth_rx_compl_v1, rsshash, compl); |
15d72184 SP |
1564 | if (rxcp->vlanf) { |
1565 | rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtm, | |
3c709f8f DM |
1566 | compl); |
1567 | rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vlan_tag, | |
1568 | compl); | |
15d72184 | 1569 | } |
12004ae9 | 1570 | rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, port, compl); |
2e588f84 SP |
1571 | } |
1572 | ||
10ef9ab4 SP |
1573 | static void be_parse_rx_compl_v0(struct be_eth_rx_compl *compl, |
1574 | struct be_rx_compl_info *rxcp) | |
2e588f84 SP |
1575 | { |
1576 | rxcp->pkt_size = | |
1577 | AMAP_GET_BITS(struct amap_eth_rx_compl_v0, pktsize, compl); | |
1578 | rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtp, compl); | |
1579 | rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, err, compl); | |
1580 | rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, tcpf, compl); | |
9ecb42fd | 1581 | rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, udpf, compl); |
2e588f84 SP |
1582 | rxcp->ip_csum = |
1583 | AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ipcksm, compl); | |
1584 | rxcp->l4_csum = | |
1585 | AMAP_GET_BITS(struct amap_eth_rx_compl_v0, l4_cksm, compl); | |
1586 | rxcp->ipv6 = | |
1587 | AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ip_version, compl); | |
1588 | rxcp->rxq_idx = | |
1589 | AMAP_GET_BITS(struct amap_eth_rx_compl_v0, fragndx, compl); | |
1590 | rxcp->num_rcvd = | |
1591 | AMAP_GET_BITS(struct amap_eth_rx_compl_v0, numfrags, compl); | |
1592 | rxcp->pkt_type = | |
1593 | AMAP_GET_BITS(struct amap_eth_rx_compl_v0, cast_enc, compl); | |
4b972914 | 1594 | rxcp->rss_hash = |
c297977e | 1595 | AMAP_GET_BITS(struct amap_eth_rx_compl_v0, rsshash, compl); |
15d72184 SP |
1596 | if (rxcp->vlanf) { |
1597 | rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtm, | |
3c709f8f DM |
1598 | compl); |
1599 | rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vlan_tag, | |
1600 | compl); | |
15d72184 | 1601 | } |
12004ae9 | 1602 | rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, port, compl); |
e38b1706 SK |
1603 | rxcp->ip_frag = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, |
1604 | ip_frag, compl); | |
2e588f84 SP |
1605 | } |
1606 | ||
1607 | static struct be_rx_compl_info *be_rx_compl_get(struct be_rx_obj *rxo) | |
1608 | { | |
1609 | struct be_eth_rx_compl *compl = queue_tail_node(&rxo->cq); | |
1610 | struct be_rx_compl_info *rxcp = &rxo->rxcp; | |
1611 | struct be_adapter *adapter = rxo->adapter; | |
6b7c5b94 | 1612 | |
2e588f84 SP |
1613 | /* For checking the valid bit it is Ok to use either definition as the |
1614 | * valid bit is at the same position in both v0 and v1 Rx compl */ | |
1615 | if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0) | |
1616 | return NULL; | |
6b7c5b94 | 1617 | |
2e588f84 SP |
1618 | rmb(); |
1619 | be_dws_le_to_cpu(compl, sizeof(*compl)); | |
6b7c5b94 | 1620 | |
2e588f84 | 1621 | if (adapter->be3_native) |
10ef9ab4 | 1622 | be_parse_rx_compl_v1(compl, rxcp); |
2e588f84 | 1623 | else |
10ef9ab4 | 1624 | be_parse_rx_compl_v0(compl, rxcp); |
6b7c5b94 | 1625 | |
e38b1706 SK |
1626 | if (rxcp->ip_frag) |
1627 | rxcp->l4_csum = 0; | |
1628 | ||
15d72184 SP |
1629 | if (rxcp->vlanf) { |
1630 | /* vlanf could be wrongly set in some cards. | |
1631 | * ignore if vtm is not set */ | |
752961a1 | 1632 | if ((adapter->function_mode & FLEX10_MODE) && !rxcp->vtm) |
15d72184 | 1633 | rxcp->vlanf = 0; |
6b7c5b94 | 1634 | |
15d72184 | 1635 | if (!lancer_chip(adapter)) |
3c709f8f | 1636 | rxcp->vlan_tag = swab16(rxcp->vlan_tag); |
6b7c5b94 | 1637 | |
939cf306 | 1638 | if (adapter->pvid == (rxcp->vlan_tag & VLAN_VID_MASK) && |
3c709f8f | 1639 | !adapter->vlan_tag[rxcp->vlan_tag]) |
15d72184 SP |
1640 | rxcp->vlanf = 0; |
1641 | } | |
2e588f84 SP |
1642 | |
1643 | /* As the compl has been parsed, reset it; we wont touch it again */ | |
1644 | compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0; | |
6b7c5b94 | 1645 | |
3abcdeda | 1646 | queue_tail_inc(&rxo->cq); |
6b7c5b94 SP |
1647 | return rxcp; |
1648 | } | |
1649 | ||
1829b086 | 1650 | static inline struct page *be_alloc_pages(u32 size, gfp_t gfp) |
6b7c5b94 | 1651 | { |
6b7c5b94 | 1652 | u32 order = get_order(size); |
1829b086 | 1653 | |
6b7c5b94 | 1654 | if (order > 0) |
1829b086 ED |
1655 | gfp |= __GFP_COMP; |
1656 | return alloc_pages(gfp, order); | |
6b7c5b94 SP |
1657 | } |
1658 | ||
1659 | /* | |
1660 | * Allocate a page, split it to fragments of size rx_frag_size and post as | |
1661 | * receive buffers to BE | |
1662 | */ | |
1829b086 | 1663 | static void be_post_rx_frags(struct be_rx_obj *rxo, gfp_t gfp) |
6b7c5b94 | 1664 | { |
3abcdeda | 1665 | struct be_adapter *adapter = rxo->adapter; |
26d92f92 | 1666 | struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL; |
3abcdeda | 1667 | struct be_queue_info *rxq = &rxo->q; |
6b7c5b94 SP |
1668 | struct page *pagep = NULL; |
1669 | struct be_eth_rx_d *rxd; | |
1670 | u64 page_dmaaddr = 0, frag_dmaaddr; | |
1671 | u32 posted, page_offset = 0; | |
1672 | ||
3abcdeda | 1673 | page_info = &rxo->page_info_tbl[rxq->head]; |
6b7c5b94 SP |
1674 | for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) { |
1675 | if (!pagep) { | |
1829b086 | 1676 | pagep = be_alloc_pages(adapter->big_page_size, gfp); |
6b7c5b94 | 1677 | if (unlikely(!pagep)) { |
ac124ff9 | 1678 | rx_stats(rxo)->rx_post_fail++; |
6b7c5b94 SP |
1679 | break; |
1680 | } | |
2b7bcebf IV |
1681 | page_dmaaddr = dma_map_page(&adapter->pdev->dev, pagep, |
1682 | 0, adapter->big_page_size, | |
1683 | DMA_FROM_DEVICE); | |
6b7c5b94 SP |
1684 | page_info->page_offset = 0; |
1685 | } else { | |
1686 | get_page(pagep); | |
1687 | page_info->page_offset = page_offset + rx_frag_size; | |
1688 | } | |
1689 | page_offset = page_info->page_offset; | |
1690 | page_info->page = pagep; | |
fac6da5b | 1691 | dma_unmap_addr_set(page_info, bus, page_dmaaddr); |
6b7c5b94 SP |
1692 | frag_dmaaddr = page_dmaaddr + page_info->page_offset; |
1693 | ||
1694 | rxd = queue_head_node(rxq); | |
1695 | rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF); | |
1696 | rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr)); | |
6b7c5b94 SP |
1697 | |
1698 | /* Any space left in the current big page for another frag? */ | |
1699 | if ((page_offset + rx_frag_size + rx_frag_size) > | |
1700 | adapter->big_page_size) { | |
1701 | pagep = NULL; | |
1702 | page_info->last_page_user = true; | |
1703 | } | |
26d92f92 SP |
1704 | |
1705 | prev_page_info = page_info; | |
1706 | queue_head_inc(rxq); | |
10ef9ab4 | 1707 | page_info = &rxo->page_info_tbl[rxq->head]; |
6b7c5b94 SP |
1708 | } |
1709 | if (pagep) | |
26d92f92 | 1710 | prev_page_info->last_page_user = true; |
6b7c5b94 SP |
1711 | |
1712 | if (posted) { | |
6b7c5b94 | 1713 | atomic_add(posted, &rxq->used); |
8788fdc2 | 1714 | be_rxq_notify(adapter, rxq->id, posted); |
ea1dae11 SP |
1715 | } else if (atomic_read(&rxq->used) == 0) { |
1716 | /* Let be_worker replenish when memory is available */ | |
3abcdeda | 1717 | rxo->rx_post_starved = true; |
6b7c5b94 | 1718 | } |
6b7c5b94 SP |
1719 | } |
1720 | ||
5fb379ee | 1721 | static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq) |
6b7c5b94 | 1722 | { |
6b7c5b94 SP |
1723 | struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq); |
1724 | ||
1725 | if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0) | |
1726 | return NULL; | |
1727 | ||
f3eb62d2 | 1728 | rmb(); |
6b7c5b94 SP |
1729 | be_dws_le_to_cpu(txcp, sizeof(*txcp)); |
1730 | ||
1731 | txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0; | |
1732 | ||
1733 | queue_tail_inc(tx_cq); | |
1734 | return txcp; | |
1735 | } | |
1736 | ||
3c8def97 SP |
1737 | static u16 be_tx_compl_process(struct be_adapter *adapter, |
1738 | struct be_tx_obj *txo, u16 last_index) | |
6b7c5b94 | 1739 | { |
3c8def97 | 1740 | struct be_queue_info *txq = &txo->q; |
a73b796e | 1741 | struct be_eth_wrb *wrb; |
3c8def97 | 1742 | struct sk_buff **sent_skbs = txo->sent_skb_list; |
6b7c5b94 | 1743 | struct sk_buff *sent_skb; |
ec43b1a6 SP |
1744 | u16 cur_index, num_wrbs = 1; /* account for hdr wrb */ |
1745 | bool unmap_skb_hdr = true; | |
6b7c5b94 | 1746 | |
ec43b1a6 | 1747 | sent_skb = sent_skbs[txq->tail]; |
6b7c5b94 | 1748 | BUG_ON(!sent_skb); |
ec43b1a6 SP |
1749 | sent_skbs[txq->tail] = NULL; |
1750 | ||
1751 | /* skip header wrb */ | |
a73b796e | 1752 | queue_tail_inc(txq); |
6b7c5b94 | 1753 | |
ec43b1a6 | 1754 | do { |
6b7c5b94 | 1755 | cur_index = txq->tail; |
a73b796e | 1756 | wrb = queue_tail_node(txq); |
2b7bcebf IV |
1757 | unmap_tx_frag(&adapter->pdev->dev, wrb, |
1758 | (unmap_skb_hdr && skb_headlen(sent_skb))); | |
ec43b1a6 SP |
1759 | unmap_skb_hdr = false; |
1760 | ||
6b7c5b94 SP |
1761 | num_wrbs++; |
1762 | queue_tail_inc(txq); | |
ec43b1a6 | 1763 | } while (cur_index != last_index); |
6b7c5b94 | 1764 | |
6b7c5b94 | 1765 | kfree_skb(sent_skb); |
4d586b82 | 1766 | return num_wrbs; |
6b7c5b94 SP |
1767 | } |
1768 | ||
10ef9ab4 SP |
1769 | /* Return the number of events in the event queue */ |
1770 | static inline int events_get(struct be_eq_obj *eqo) | |
859b1e4e | 1771 | { |
10ef9ab4 SP |
1772 | struct be_eq_entry *eqe; |
1773 | int num = 0; | |
859b1e4e | 1774 | |
10ef9ab4 SP |
1775 | do { |
1776 | eqe = queue_tail_node(&eqo->q); | |
1777 | if (eqe->evt == 0) | |
1778 | break; | |
859b1e4e | 1779 | |
10ef9ab4 SP |
1780 | rmb(); |
1781 | eqe->evt = 0; | |
1782 | num++; | |
1783 | queue_tail_inc(&eqo->q); | |
1784 | } while (true); | |
1785 | ||
1786 | return num; | |
859b1e4e SP |
1787 | } |
1788 | ||
10ef9ab4 SP |
1789 | /* Leaves the EQ is disarmed state */ |
1790 | static void be_eq_clean(struct be_eq_obj *eqo) | |
859b1e4e | 1791 | { |
10ef9ab4 | 1792 | int num = events_get(eqo); |
859b1e4e | 1793 | |
10ef9ab4 | 1794 | be_eq_notify(eqo->adapter, eqo->q.id, false, true, num); |
859b1e4e SP |
1795 | } |
1796 | ||
10ef9ab4 | 1797 | static void be_rx_cq_clean(struct be_rx_obj *rxo) |
6b7c5b94 SP |
1798 | { |
1799 | struct be_rx_page_info *page_info; | |
3abcdeda SP |
1800 | struct be_queue_info *rxq = &rxo->q; |
1801 | struct be_queue_info *rx_cq = &rxo->cq; | |
2e588f84 | 1802 | struct be_rx_compl_info *rxcp; |
d23e946c SP |
1803 | struct be_adapter *adapter = rxo->adapter; |
1804 | int flush_wait = 0; | |
6b7c5b94 SP |
1805 | u16 tail; |
1806 | ||
d23e946c SP |
1807 | /* Consume pending rx completions. |
1808 | * Wait for the flush completion (identified by zero num_rcvd) | |
1809 | * to arrive. Notify CQ even when there are no more CQ entries | |
1810 | * for HW to flush partially coalesced CQ entries. | |
1811 | * In Lancer, there is no need to wait for flush compl. | |
1812 | */ | |
1813 | for (;;) { | |
1814 | rxcp = be_rx_compl_get(rxo); | |
1815 | if (rxcp == NULL) { | |
1816 | if (lancer_chip(adapter)) | |
1817 | break; | |
1818 | ||
1819 | if (flush_wait++ > 10 || be_hw_error(adapter)) { | |
1820 | dev_warn(&adapter->pdev->dev, | |
1821 | "did not receive flush compl\n"); | |
1822 | break; | |
1823 | } | |
1824 | be_cq_notify(adapter, rx_cq->id, true, 0); | |
1825 | mdelay(1); | |
1826 | } else { | |
1827 | be_rx_compl_discard(rxo, rxcp); | |
3f5dffe6 | 1828 | be_cq_notify(adapter, rx_cq->id, false, 1); |
d23e946c SP |
1829 | if (rxcp->num_rcvd == 0) |
1830 | break; | |
1831 | } | |
6b7c5b94 SP |
1832 | } |
1833 | ||
d23e946c SP |
1834 | /* After cleanup, leave the CQ in unarmed state */ |
1835 | be_cq_notify(adapter, rx_cq->id, false, 0); | |
1836 | ||
1837 | /* Then free posted rx buffers that were not used */ | |
6b7c5b94 | 1838 | tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len; |
cdab23b7 | 1839 | for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) { |
10ef9ab4 | 1840 | page_info = get_rx_page_info(rxo, tail); |
6b7c5b94 SP |
1841 | put_page(page_info->page); |
1842 | memset(page_info, 0, sizeof(*page_info)); | |
1843 | } | |
1844 | BUG_ON(atomic_read(&rxq->used)); | |
482c9e79 | 1845 | rxq->tail = rxq->head = 0; |
6b7c5b94 SP |
1846 | } |
1847 | ||
0ae57bb3 | 1848 | static void be_tx_compl_clean(struct be_adapter *adapter) |
6b7c5b94 | 1849 | { |
0ae57bb3 SP |
1850 | struct be_tx_obj *txo; |
1851 | struct be_queue_info *txq; | |
a8e9179a | 1852 | struct be_eth_tx_compl *txcp; |
4d586b82 | 1853 | u16 end_idx, cmpl = 0, timeo = 0, num_wrbs = 0; |
b03388d6 SP |
1854 | struct sk_buff *sent_skb; |
1855 | bool dummy_wrb; | |
0ae57bb3 | 1856 | int i, pending_txqs; |
a8e9179a SP |
1857 | |
1858 | /* Wait for a max of 200ms for all the tx-completions to arrive. */ | |
1859 | do { | |
0ae57bb3 SP |
1860 | pending_txqs = adapter->num_tx_qs; |
1861 | ||
1862 | for_all_tx_queues(adapter, txo, i) { | |
1863 | txq = &txo->q; | |
1864 | while ((txcp = be_tx_compl_get(&txo->cq))) { | |
1865 | end_idx = | |
1866 | AMAP_GET_BITS(struct amap_eth_tx_compl, | |
1867 | wrb_index, txcp); | |
1868 | num_wrbs += be_tx_compl_process(adapter, txo, | |
1869 | end_idx); | |
1870 | cmpl++; | |
1871 | } | |
1872 | if (cmpl) { | |
1873 | be_cq_notify(adapter, txo->cq.id, false, cmpl); | |
1874 | atomic_sub(num_wrbs, &txq->used); | |
1875 | cmpl = 0; | |
1876 | num_wrbs = 0; | |
1877 | } | |
1878 | if (atomic_read(&txq->used) == 0) | |
1879 | pending_txqs--; | |
a8e9179a SP |
1880 | } |
1881 | ||
0ae57bb3 | 1882 | if (pending_txqs == 0 || ++timeo > 200) |
a8e9179a SP |
1883 | break; |
1884 | ||
1885 | mdelay(1); | |
1886 | } while (true); | |
1887 | ||
0ae57bb3 SP |
1888 | for_all_tx_queues(adapter, txo, i) { |
1889 | txq = &txo->q; | |
1890 | if (atomic_read(&txq->used)) | |
1891 | dev_err(&adapter->pdev->dev, "%d pending tx-compls\n", | |
1892 | atomic_read(&txq->used)); | |
1893 | ||
1894 | /* free posted tx for which compls will never arrive */ | |
1895 | while (atomic_read(&txq->used)) { | |
1896 | sent_skb = txo->sent_skb_list[txq->tail]; | |
1897 | end_idx = txq->tail; | |
1898 | num_wrbs = wrb_cnt_for_skb(adapter, sent_skb, | |
1899 | &dummy_wrb); | |
1900 | index_adv(&end_idx, num_wrbs - 1, txq->len); | |
1901 | num_wrbs = be_tx_compl_process(adapter, txo, end_idx); | |
1902 | atomic_sub(num_wrbs, &txq->used); | |
1903 | } | |
b03388d6 | 1904 | } |
6b7c5b94 SP |
1905 | } |
1906 | ||
10ef9ab4 SP |
1907 | static void be_evt_queues_destroy(struct be_adapter *adapter) |
1908 | { | |
1909 | struct be_eq_obj *eqo; | |
1910 | int i; | |
1911 | ||
1912 | for_all_evt_queues(adapter, eqo, i) { | |
19d59aa7 PR |
1913 | if (eqo->q.created) { |
1914 | be_eq_clean(eqo); | |
10ef9ab4 | 1915 | be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ); |
19d59aa7 | 1916 | } |
10ef9ab4 SP |
1917 | be_queue_free(adapter, &eqo->q); |
1918 | } | |
1919 | } | |
1920 | ||
1921 | static int be_evt_queues_create(struct be_adapter *adapter) | |
1922 | { | |
1923 | struct be_queue_info *eq; | |
1924 | struct be_eq_obj *eqo; | |
1925 | int i, rc; | |
1926 | ||
1927 | adapter->num_evt_qs = num_irqs(adapter); | |
1928 | ||
1929 | for_all_evt_queues(adapter, eqo, i) { | |
1930 | eqo->adapter = adapter; | |
1931 | eqo->tx_budget = BE_TX_BUDGET; | |
1932 | eqo->idx = i; | |
1933 | eqo->max_eqd = BE_MAX_EQD; | |
1934 | eqo->enable_aic = true; | |
1935 | ||
1936 | eq = &eqo->q; | |
1937 | rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN, | |
1938 | sizeof(struct be_eq_entry)); | |
1939 | if (rc) | |
1940 | return rc; | |
1941 | ||
1942 | rc = be_cmd_eq_create(adapter, eq, eqo->cur_eqd); | |
1943 | if (rc) | |
1944 | return rc; | |
1945 | } | |
1cfafab9 | 1946 | return 0; |
10ef9ab4 SP |
1947 | } |
1948 | ||
5fb379ee SP |
1949 | static void be_mcc_queues_destroy(struct be_adapter *adapter) |
1950 | { | |
1951 | struct be_queue_info *q; | |
5fb379ee | 1952 | |
8788fdc2 | 1953 | q = &adapter->mcc_obj.q; |
5fb379ee | 1954 | if (q->created) |
8788fdc2 | 1955 | be_cmd_q_destroy(adapter, q, QTYPE_MCCQ); |
5fb379ee SP |
1956 | be_queue_free(adapter, q); |
1957 | ||
8788fdc2 | 1958 | q = &adapter->mcc_obj.cq; |
5fb379ee | 1959 | if (q->created) |
8788fdc2 | 1960 | be_cmd_q_destroy(adapter, q, QTYPE_CQ); |
5fb379ee SP |
1961 | be_queue_free(adapter, q); |
1962 | } | |
1963 | ||
1964 | /* Must be called only after TX qs are created as MCC shares TX EQ */ | |
1965 | static int be_mcc_queues_create(struct be_adapter *adapter) | |
1966 | { | |
1967 | struct be_queue_info *q, *cq; | |
5fb379ee | 1968 | |
8788fdc2 | 1969 | cq = &adapter->mcc_obj.cq; |
5fb379ee | 1970 | if (be_queue_alloc(adapter, cq, MCC_CQ_LEN, |
efd2e40a | 1971 | sizeof(struct be_mcc_compl))) |
5fb379ee SP |
1972 | goto err; |
1973 | ||
10ef9ab4 SP |
1974 | /* Use the default EQ for MCC completions */ |
1975 | if (be_cmd_cq_create(adapter, cq, &mcc_eqo(adapter)->q, true, 0)) | |
5fb379ee SP |
1976 | goto mcc_cq_free; |
1977 | ||
8788fdc2 | 1978 | q = &adapter->mcc_obj.q; |
5fb379ee SP |
1979 | if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb))) |
1980 | goto mcc_cq_destroy; | |
1981 | ||
8788fdc2 | 1982 | if (be_cmd_mccq_create(adapter, q, cq)) |
5fb379ee SP |
1983 | goto mcc_q_free; |
1984 | ||
1985 | return 0; | |
1986 | ||
1987 | mcc_q_free: | |
1988 | be_queue_free(adapter, q); | |
1989 | mcc_cq_destroy: | |
8788fdc2 | 1990 | be_cmd_q_destroy(adapter, cq, QTYPE_CQ); |
5fb379ee SP |
1991 | mcc_cq_free: |
1992 | be_queue_free(adapter, cq); | |
1993 | err: | |
1994 | return -1; | |
1995 | } | |
1996 | ||
6b7c5b94 SP |
1997 | static void be_tx_queues_destroy(struct be_adapter *adapter) |
1998 | { | |
1999 | struct be_queue_info *q; | |
3c8def97 SP |
2000 | struct be_tx_obj *txo; |
2001 | u8 i; | |
6b7c5b94 | 2002 | |
3c8def97 SP |
2003 | for_all_tx_queues(adapter, txo, i) { |
2004 | q = &txo->q; | |
2005 | if (q->created) | |
2006 | be_cmd_q_destroy(adapter, q, QTYPE_TXQ); | |
2007 | be_queue_free(adapter, q); | |
6b7c5b94 | 2008 | |
3c8def97 SP |
2009 | q = &txo->cq; |
2010 | if (q->created) | |
2011 | be_cmd_q_destroy(adapter, q, QTYPE_CQ); | |
2012 | be_queue_free(adapter, q); | |
2013 | } | |
6b7c5b94 SP |
2014 | } |
2015 | ||
dafc0fe3 SP |
2016 | static int be_num_txqs_want(struct be_adapter *adapter) |
2017 | { | |
abb93951 PR |
2018 | if ((!lancer_chip(adapter) && sriov_want(adapter)) || |
2019 | be_is_mc(adapter) || | |
2020 | (!lancer_chip(adapter) && !be_physfn(adapter)) || | |
ca34fe38 | 2021 | BE2_chip(adapter)) |
dafc0fe3 SP |
2022 | return 1; |
2023 | else | |
abb93951 | 2024 | return adapter->max_tx_queues; |
dafc0fe3 SP |
2025 | } |
2026 | ||
10ef9ab4 | 2027 | static int be_tx_cqs_create(struct be_adapter *adapter) |
6b7c5b94 | 2028 | { |
10ef9ab4 SP |
2029 | struct be_queue_info *cq, *eq; |
2030 | int status; | |
3c8def97 SP |
2031 | struct be_tx_obj *txo; |
2032 | u8 i; | |
6b7c5b94 | 2033 | |
dafc0fe3 | 2034 | adapter->num_tx_qs = be_num_txqs_want(adapter); |
3bb62f4f PR |
2035 | if (adapter->num_tx_qs != MAX_TX_QS) { |
2036 | rtnl_lock(); | |
dafc0fe3 SP |
2037 | netif_set_real_num_tx_queues(adapter->netdev, |
2038 | adapter->num_tx_qs); | |
3bb62f4f PR |
2039 | rtnl_unlock(); |
2040 | } | |
dafc0fe3 | 2041 | |
10ef9ab4 SP |
2042 | for_all_tx_queues(adapter, txo, i) { |
2043 | cq = &txo->cq; | |
2044 | status = be_queue_alloc(adapter, cq, TX_CQ_LEN, | |
2045 | sizeof(struct be_eth_tx_compl)); | |
2046 | if (status) | |
2047 | return status; | |
3c8def97 | 2048 | |
10ef9ab4 SP |
2049 | /* If num_evt_qs is less than num_tx_qs, then more than |
2050 | * one txq share an eq | |
2051 | */ | |
2052 | eq = &adapter->eq_obj[i % adapter->num_evt_qs].q; | |
2053 | status = be_cmd_cq_create(adapter, cq, eq, false, 3); | |
2054 | if (status) | |
2055 | return status; | |
2056 | } | |
2057 | return 0; | |
2058 | } | |
6b7c5b94 | 2059 | |
10ef9ab4 SP |
2060 | static int be_tx_qs_create(struct be_adapter *adapter) |
2061 | { | |
2062 | struct be_tx_obj *txo; | |
2063 | int i, status; | |
fe6d2a38 | 2064 | |
3c8def97 | 2065 | for_all_tx_queues(adapter, txo, i) { |
10ef9ab4 SP |
2066 | status = be_queue_alloc(adapter, &txo->q, TX_Q_LEN, |
2067 | sizeof(struct be_eth_wrb)); | |
2068 | if (status) | |
2069 | return status; | |
6b7c5b94 | 2070 | |
94d73aaa | 2071 | status = be_cmd_txq_create(adapter, txo); |
10ef9ab4 SP |
2072 | if (status) |
2073 | return status; | |
3c8def97 | 2074 | } |
6b7c5b94 | 2075 | |
d379142b SP |
2076 | dev_info(&adapter->pdev->dev, "created %d TX queue(s)\n", |
2077 | adapter->num_tx_qs); | |
10ef9ab4 | 2078 | return 0; |
6b7c5b94 SP |
2079 | } |
2080 | ||
10ef9ab4 | 2081 | static void be_rx_cqs_destroy(struct be_adapter *adapter) |
6b7c5b94 SP |
2082 | { |
2083 | struct be_queue_info *q; | |
3abcdeda SP |
2084 | struct be_rx_obj *rxo; |
2085 | int i; | |
2086 | ||
2087 | for_all_rx_queues(adapter, rxo, i) { | |
3abcdeda SP |
2088 | q = &rxo->cq; |
2089 | if (q->created) | |
2090 | be_cmd_q_destroy(adapter, q, QTYPE_CQ); | |
2091 | be_queue_free(adapter, q); | |
ac6a0c4a SP |
2092 | } |
2093 | } | |
2094 | ||
10ef9ab4 | 2095 | static int be_rx_cqs_create(struct be_adapter *adapter) |
6b7c5b94 | 2096 | { |
10ef9ab4 | 2097 | struct be_queue_info *eq, *cq; |
3abcdeda SP |
2098 | struct be_rx_obj *rxo; |
2099 | int rc, i; | |
6b7c5b94 | 2100 | |
10ef9ab4 SP |
2101 | /* We'll create as many RSS rings as there are irqs. |
2102 | * But when there's only one irq there's no use creating RSS rings | |
2103 | */ | |
2104 | adapter->num_rx_qs = (num_irqs(adapter) > 1) ? | |
2105 | num_irqs(adapter) + 1 : 1; | |
7f640062 SP |
2106 | if (adapter->num_rx_qs != MAX_RX_QS) { |
2107 | rtnl_lock(); | |
2108 | netif_set_real_num_rx_queues(adapter->netdev, | |
2109 | adapter->num_rx_qs); | |
2110 | rtnl_unlock(); | |
2111 | } | |
ac6a0c4a | 2112 | |
6b7c5b94 | 2113 | adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE; |
3abcdeda SP |
2114 | for_all_rx_queues(adapter, rxo, i) { |
2115 | rxo->adapter = adapter; | |
3abcdeda SP |
2116 | cq = &rxo->cq; |
2117 | rc = be_queue_alloc(adapter, cq, RX_CQ_LEN, | |
2118 | sizeof(struct be_eth_rx_compl)); | |
2119 | if (rc) | |
10ef9ab4 | 2120 | return rc; |
3abcdeda | 2121 | |
10ef9ab4 SP |
2122 | eq = &adapter->eq_obj[i % adapter->num_evt_qs].q; |
2123 | rc = be_cmd_cq_create(adapter, cq, eq, false, 3); | |
3abcdeda | 2124 | if (rc) |
10ef9ab4 | 2125 | return rc; |
3abcdeda | 2126 | } |
6b7c5b94 | 2127 | |
d379142b SP |
2128 | dev_info(&adapter->pdev->dev, |
2129 | "created %d RSS queue(s) and 1 default RX queue\n", | |
2130 | adapter->num_rx_qs - 1); | |
10ef9ab4 | 2131 | return 0; |
b628bde2 SP |
2132 | } |
2133 | ||
6b7c5b94 SP |
2134 | static irqreturn_t be_intx(int irq, void *dev) |
2135 | { | |
e49cc34f SP |
2136 | struct be_eq_obj *eqo = dev; |
2137 | struct be_adapter *adapter = eqo->adapter; | |
2138 | int num_evts = 0; | |
6b7c5b94 | 2139 | |
d0b9cec3 SP |
2140 | /* IRQ is not expected when NAPI is scheduled as the EQ |
2141 | * will not be armed. | |
2142 | * But, this can happen on Lancer INTx where it takes | |
2143 | * a while to de-assert INTx or in BE2 where occasionaly | |
2144 | * an interrupt may be raised even when EQ is unarmed. | |
2145 | * If NAPI is already scheduled, then counting & notifying | |
2146 | * events will orphan them. | |
e49cc34f | 2147 | */ |
d0b9cec3 | 2148 | if (napi_schedule_prep(&eqo->napi)) { |
e49cc34f | 2149 | num_evts = events_get(eqo); |
d0b9cec3 SP |
2150 | __napi_schedule(&eqo->napi); |
2151 | if (num_evts) | |
2152 | eqo->spurious_intr = 0; | |
2153 | } | |
2154 | be_eq_notify(adapter, eqo->q.id, false, true, num_evts); | |
e49cc34f | 2155 | |
d0b9cec3 SP |
2156 | /* Return IRQ_HANDLED only for the the first spurious intr |
2157 | * after a valid intr to stop the kernel from branding | |
2158 | * this irq as a bad one! | |
e49cc34f | 2159 | */ |
d0b9cec3 SP |
2160 | if (num_evts || eqo->spurious_intr++ == 0) |
2161 | return IRQ_HANDLED; | |
2162 | else | |
2163 | return IRQ_NONE; | |
6b7c5b94 SP |
2164 | } |
2165 | ||
10ef9ab4 | 2166 | static irqreturn_t be_msix(int irq, void *dev) |
6b7c5b94 | 2167 | { |
10ef9ab4 | 2168 | struct be_eq_obj *eqo = dev; |
6b7c5b94 | 2169 | |
0b545a62 SP |
2170 | be_eq_notify(eqo->adapter, eqo->q.id, false, true, 0); |
2171 | napi_schedule(&eqo->napi); | |
6b7c5b94 SP |
2172 | return IRQ_HANDLED; |
2173 | } | |
2174 | ||
2e588f84 | 2175 | static inline bool do_gro(struct be_rx_compl_info *rxcp) |
6b7c5b94 | 2176 | { |
e38b1706 | 2177 | return (rxcp->tcpf && !rxcp->err && rxcp->l4_csum) ? true : false; |
6b7c5b94 SP |
2178 | } |
2179 | ||
10ef9ab4 SP |
2180 | static int be_process_rx(struct be_rx_obj *rxo, struct napi_struct *napi, |
2181 | int budget) | |
6b7c5b94 | 2182 | { |
3abcdeda SP |
2183 | struct be_adapter *adapter = rxo->adapter; |
2184 | struct be_queue_info *rx_cq = &rxo->cq; | |
2e588f84 | 2185 | struct be_rx_compl_info *rxcp; |
6b7c5b94 SP |
2186 | u32 work_done; |
2187 | ||
2188 | for (work_done = 0; work_done < budget; work_done++) { | |
3abcdeda | 2189 | rxcp = be_rx_compl_get(rxo); |
6b7c5b94 SP |
2190 | if (!rxcp) |
2191 | break; | |
2192 | ||
12004ae9 SP |
2193 | /* Is it a flush compl that has no data */ |
2194 | if (unlikely(rxcp->num_rcvd == 0)) | |
2195 | goto loop_continue; | |
2196 | ||
2197 | /* Discard compl with partial DMA Lancer B0 */ | |
2198 | if (unlikely(!rxcp->pkt_size)) { | |
10ef9ab4 | 2199 | be_rx_compl_discard(rxo, rxcp); |
12004ae9 SP |
2200 | goto loop_continue; |
2201 | } | |
2202 | ||
2203 | /* On BE drop pkts that arrive due to imperfect filtering in | |
2204 | * promiscuous mode on some skews | |
2205 | */ | |
2206 | if (unlikely(rxcp->port != adapter->port_num && | |
2207 | !lancer_chip(adapter))) { | |
10ef9ab4 | 2208 | be_rx_compl_discard(rxo, rxcp); |
12004ae9 | 2209 | goto loop_continue; |
64642811 | 2210 | } |
009dd872 | 2211 | |
12004ae9 | 2212 | if (do_gro(rxcp)) |
10ef9ab4 | 2213 | be_rx_compl_process_gro(rxo, napi, rxcp); |
12004ae9 | 2214 | else |
10ef9ab4 | 2215 | be_rx_compl_process(rxo, rxcp); |
12004ae9 | 2216 | loop_continue: |
2e588f84 | 2217 | be_rx_stats_update(rxo, rxcp); |
6b7c5b94 SP |
2218 | } |
2219 | ||
10ef9ab4 SP |
2220 | if (work_done) { |
2221 | be_cq_notify(adapter, rx_cq->id, true, work_done); | |
9372cacb | 2222 | |
10ef9ab4 SP |
2223 | if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM) |
2224 | be_post_rx_frags(rxo, GFP_ATOMIC); | |
6b7c5b94 | 2225 | } |
10ef9ab4 | 2226 | |
6b7c5b94 SP |
2227 | return work_done; |
2228 | } | |
2229 | ||
10ef9ab4 SP |
2230 | static bool be_process_tx(struct be_adapter *adapter, struct be_tx_obj *txo, |
2231 | int budget, int idx) | |
6b7c5b94 | 2232 | { |
6b7c5b94 | 2233 | struct be_eth_tx_compl *txcp; |
10ef9ab4 | 2234 | int num_wrbs = 0, work_done; |
3c8def97 | 2235 | |
10ef9ab4 SP |
2236 | for (work_done = 0; work_done < budget; work_done++) { |
2237 | txcp = be_tx_compl_get(&txo->cq); | |
2238 | if (!txcp) | |
2239 | break; | |
2240 | num_wrbs += be_tx_compl_process(adapter, txo, | |
3c8def97 SP |
2241 | AMAP_GET_BITS(struct amap_eth_tx_compl, |
2242 | wrb_index, txcp)); | |
10ef9ab4 | 2243 | } |
6b7c5b94 | 2244 | |
10ef9ab4 SP |
2245 | if (work_done) { |
2246 | be_cq_notify(adapter, txo->cq.id, true, work_done); | |
2247 | atomic_sub(num_wrbs, &txo->q.used); | |
3c8def97 | 2248 | |
10ef9ab4 SP |
2249 | /* As Tx wrbs have been freed up, wake up netdev queue |
2250 | * if it was stopped due to lack of tx wrbs. */ | |
2251 | if (__netif_subqueue_stopped(adapter->netdev, idx) && | |
2252 | atomic_read(&txo->q.used) < txo->q.len / 2) { | |
2253 | netif_wake_subqueue(adapter->netdev, idx); | |
3c8def97 | 2254 | } |
10ef9ab4 SP |
2255 | |
2256 | u64_stats_update_begin(&tx_stats(txo)->sync_compl); | |
2257 | tx_stats(txo)->tx_compl += work_done; | |
2258 | u64_stats_update_end(&tx_stats(txo)->sync_compl); | |
6b7c5b94 | 2259 | } |
10ef9ab4 SP |
2260 | return (work_done < budget); /* Done */ |
2261 | } | |
6b7c5b94 | 2262 | |
4188e7df | 2263 | static int be_poll(struct napi_struct *napi, int budget) |
10ef9ab4 SP |
2264 | { |
2265 | struct be_eq_obj *eqo = container_of(napi, struct be_eq_obj, napi); | |
2266 | struct be_adapter *adapter = eqo->adapter; | |
0b545a62 | 2267 | int max_work = 0, work, i, num_evts; |
10ef9ab4 | 2268 | bool tx_done; |
f31e50a8 | 2269 | |
0b545a62 SP |
2270 | num_evts = events_get(eqo); |
2271 | ||
10ef9ab4 SP |
2272 | /* Process all TXQs serviced by this EQ */ |
2273 | for (i = eqo->idx; i < adapter->num_tx_qs; i += adapter->num_evt_qs) { | |
2274 | tx_done = be_process_tx(adapter, &adapter->tx_obj[i], | |
2275 | eqo->tx_budget, i); | |
2276 | if (!tx_done) | |
2277 | max_work = budget; | |
f31e50a8 SP |
2278 | } |
2279 | ||
10ef9ab4 SP |
2280 | /* This loop will iterate twice for EQ0 in which |
2281 | * completions of the last RXQ (default one) are also processed | |
2282 | * For other EQs the loop iterates only once | |
2283 | */ | |
2284 | for (i = eqo->idx; i < adapter->num_rx_qs; i += adapter->num_evt_qs) { | |
2285 | work = be_process_rx(&adapter->rx_obj[i], napi, budget); | |
2286 | max_work = max(work, max_work); | |
2287 | } | |
6b7c5b94 | 2288 | |
10ef9ab4 SP |
2289 | if (is_mcc_eqo(eqo)) |
2290 | be_process_mcc(adapter); | |
93c86700 | 2291 | |
10ef9ab4 SP |
2292 | if (max_work < budget) { |
2293 | napi_complete(napi); | |
0b545a62 | 2294 | be_eq_notify(adapter, eqo->q.id, true, false, num_evts); |
10ef9ab4 SP |
2295 | } else { |
2296 | /* As we'll continue in polling mode, count and clear events */ | |
0b545a62 | 2297 | be_eq_notify(adapter, eqo->q.id, false, false, num_evts); |
93c86700 | 2298 | } |
10ef9ab4 | 2299 | return max_work; |
6b7c5b94 SP |
2300 | } |
2301 | ||
f67ef7ba | 2302 | void be_detect_error(struct be_adapter *adapter) |
7c185276 | 2303 | { |
e1cfb67a PR |
2304 | u32 ue_lo = 0, ue_hi = 0, ue_lo_mask = 0, ue_hi_mask = 0; |
2305 | u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; | |
7c185276 AK |
2306 | u32 i; |
2307 | ||
d23e946c | 2308 | if (be_hw_error(adapter)) |
72f02485 SP |
2309 | return; |
2310 | ||
e1cfb67a PR |
2311 | if (lancer_chip(adapter)) { |
2312 | sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); | |
2313 | if (sliport_status & SLIPORT_STATUS_ERR_MASK) { | |
2314 | sliport_err1 = ioread32(adapter->db + | |
2315 | SLIPORT_ERROR1_OFFSET); | |
2316 | sliport_err2 = ioread32(adapter->db + | |
2317 | SLIPORT_ERROR2_OFFSET); | |
2318 | } | |
2319 | } else { | |
2320 | pci_read_config_dword(adapter->pdev, | |
2321 | PCICFG_UE_STATUS_LOW, &ue_lo); | |
2322 | pci_read_config_dword(adapter->pdev, | |
2323 | PCICFG_UE_STATUS_HIGH, &ue_hi); | |
2324 | pci_read_config_dword(adapter->pdev, | |
2325 | PCICFG_UE_STATUS_LOW_MASK, &ue_lo_mask); | |
2326 | pci_read_config_dword(adapter->pdev, | |
2327 | PCICFG_UE_STATUS_HI_MASK, &ue_hi_mask); | |
2328 | ||
f67ef7ba PR |
2329 | ue_lo = (ue_lo & ~ue_lo_mask); |
2330 | ue_hi = (ue_hi & ~ue_hi_mask); | |
e1cfb67a | 2331 | } |
7c185276 | 2332 | |
1451ae6e AK |
2333 | /* On certain platforms BE hardware can indicate spurious UEs. |
2334 | * Allow the h/w to stop working completely in case of a real UE. | |
2335 | * Hence not setting the hw_error for UE detection. | |
2336 | */ | |
2337 | if (sliport_status & SLIPORT_STATUS_ERR_MASK) { | |
f67ef7ba | 2338 | adapter->hw_error = true; |
434b3648 | 2339 | dev_err(&adapter->pdev->dev, |
f67ef7ba PR |
2340 | "Error detected in the card\n"); |
2341 | } | |
2342 | ||
2343 | if (sliport_status & SLIPORT_STATUS_ERR_MASK) { | |
2344 | dev_err(&adapter->pdev->dev, | |
2345 | "ERR: sliport status 0x%x\n", sliport_status); | |
2346 | dev_err(&adapter->pdev->dev, | |
2347 | "ERR: sliport error1 0x%x\n", sliport_err1); | |
2348 | dev_err(&adapter->pdev->dev, | |
2349 | "ERR: sliport error2 0x%x\n", sliport_err2); | |
d053de91 AK |
2350 | } |
2351 | ||
e1cfb67a PR |
2352 | if (ue_lo) { |
2353 | for (i = 0; ue_lo; ue_lo >>= 1, i++) { | |
2354 | if (ue_lo & 1) | |
7c185276 AK |
2355 | dev_err(&adapter->pdev->dev, |
2356 | "UE: %s bit set\n", ue_status_low_desc[i]); | |
2357 | } | |
2358 | } | |
f67ef7ba | 2359 | |
e1cfb67a PR |
2360 | if (ue_hi) { |
2361 | for (i = 0; ue_hi; ue_hi >>= 1, i++) { | |
2362 | if (ue_hi & 1) | |
7c185276 AK |
2363 | dev_err(&adapter->pdev->dev, |
2364 | "UE: %s bit set\n", ue_status_hi_desc[i]); | |
2365 | } | |
2366 | } | |
2367 | ||
2368 | } | |
2369 | ||
8d56ff11 SP |
2370 | static void be_msix_disable(struct be_adapter *adapter) |
2371 | { | |
ac6a0c4a | 2372 | if (msix_enabled(adapter)) { |
8d56ff11 | 2373 | pci_disable_msix(adapter->pdev); |
ac6a0c4a | 2374 | adapter->num_msix_vec = 0; |
3abcdeda SP |
2375 | } |
2376 | } | |
2377 | ||
10ef9ab4 SP |
2378 | static uint be_num_rss_want(struct be_adapter *adapter) |
2379 | { | |
30e80b55 | 2380 | u32 num = 0; |
abb93951 | 2381 | |
10ef9ab4 | 2382 | if ((adapter->function_caps & BE_FUNCTION_CAPS_RSS) && |
abb93951 PR |
2383 | (lancer_chip(adapter) || |
2384 | (!sriov_want(adapter) && be_physfn(adapter)))) { | |
2385 | num = adapter->max_rss_queues; | |
30e80b55 YM |
2386 | num = min_t(u32, num, (u32)netif_get_num_default_rss_queues()); |
2387 | } | |
2388 | return num; | |
10ef9ab4 SP |
2389 | } |
2390 | ||
c2bba3df | 2391 | static int be_msix_enable(struct be_adapter *adapter) |
6b7c5b94 | 2392 | { |
10ef9ab4 | 2393 | #define BE_MIN_MSIX_VECTORS 1 |
045508a8 | 2394 | int i, status, num_vec, num_roce_vec = 0; |
d379142b | 2395 | struct device *dev = &adapter->pdev->dev; |
6b7c5b94 | 2396 | |
10ef9ab4 SP |
2397 | /* If RSS queues are not used, need a vec for default RX Q */ |
2398 | num_vec = min(be_num_rss_want(adapter), num_online_cpus()); | |
045508a8 PP |
2399 | if (be_roce_supported(adapter)) { |
2400 | num_roce_vec = min_t(u32, MAX_ROCE_MSIX_VECTORS, | |
2401 | (num_online_cpus() + 1)); | |
2402 | num_roce_vec = min(num_roce_vec, MAX_ROCE_EQS); | |
2403 | num_vec += num_roce_vec; | |
2404 | num_vec = min(num_vec, MAX_MSIX_VECTORS); | |
2405 | } | |
10ef9ab4 | 2406 | num_vec = max(num_vec, BE_MIN_MSIX_VECTORS); |
3abcdeda | 2407 | |
ac6a0c4a | 2408 | for (i = 0; i < num_vec; i++) |
6b7c5b94 SP |
2409 | adapter->msix_entries[i].entry = i; |
2410 | ||
ac6a0c4a | 2411 | status = pci_enable_msix(adapter->pdev, adapter->msix_entries, num_vec); |
3abcdeda SP |
2412 | if (status == 0) { |
2413 | goto done; | |
2414 | } else if (status >= BE_MIN_MSIX_VECTORS) { | |
ac6a0c4a | 2415 | num_vec = status; |
c2bba3df SK |
2416 | status = pci_enable_msix(adapter->pdev, adapter->msix_entries, |
2417 | num_vec); | |
2418 | if (!status) | |
3abcdeda | 2419 | goto done; |
3abcdeda | 2420 | } |
d379142b SP |
2421 | |
2422 | dev_warn(dev, "MSIx enable failed\n"); | |
c2bba3df SK |
2423 | /* INTx is not supported in VFs, so fail probe if enable_msix fails */ |
2424 | if (!be_physfn(adapter)) | |
2425 | return status; | |
2426 | return 0; | |
3abcdeda | 2427 | done: |
045508a8 PP |
2428 | if (be_roce_supported(adapter)) { |
2429 | if (num_vec > num_roce_vec) { | |
2430 | adapter->num_msix_vec = num_vec - num_roce_vec; | |
2431 | adapter->num_msix_roce_vec = | |
2432 | num_vec - adapter->num_msix_vec; | |
2433 | } else { | |
2434 | adapter->num_msix_vec = num_vec; | |
2435 | adapter->num_msix_roce_vec = 0; | |
2436 | } | |
2437 | } else | |
2438 | adapter->num_msix_vec = num_vec; | |
d379142b | 2439 | dev_info(dev, "enabled %d MSI-x vector(s)\n", adapter->num_msix_vec); |
c2bba3df | 2440 | return 0; |
6b7c5b94 SP |
2441 | } |
2442 | ||
fe6d2a38 | 2443 | static inline int be_msix_vec_get(struct be_adapter *adapter, |
10ef9ab4 | 2444 | struct be_eq_obj *eqo) |
b628bde2 | 2445 | { |
10ef9ab4 | 2446 | return adapter->msix_entries[eqo->idx].vector; |
b628bde2 | 2447 | } |
6b7c5b94 | 2448 | |
b628bde2 SP |
2449 | static int be_msix_register(struct be_adapter *adapter) |
2450 | { | |
10ef9ab4 SP |
2451 | struct net_device *netdev = adapter->netdev; |
2452 | struct be_eq_obj *eqo; | |
2453 | int status, i, vec; | |
6b7c5b94 | 2454 | |
10ef9ab4 SP |
2455 | for_all_evt_queues(adapter, eqo, i) { |
2456 | sprintf(eqo->desc, "%s-q%d", netdev->name, i); | |
2457 | vec = be_msix_vec_get(adapter, eqo); | |
2458 | status = request_irq(vec, be_msix, 0, eqo->desc, eqo); | |
3abcdeda SP |
2459 | if (status) |
2460 | goto err_msix; | |
2461 | } | |
b628bde2 | 2462 | |
6b7c5b94 | 2463 | return 0; |
3abcdeda | 2464 | err_msix: |
10ef9ab4 SP |
2465 | for (i--, eqo = &adapter->eq_obj[i]; i >= 0; i--, eqo--) |
2466 | free_irq(be_msix_vec_get(adapter, eqo), eqo); | |
2467 | dev_warn(&adapter->pdev->dev, "MSIX Request IRQ failed - err %d\n", | |
2468 | status); | |
ac6a0c4a | 2469 | be_msix_disable(adapter); |
6b7c5b94 SP |
2470 | return status; |
2471 | } | |
2472 | ||
2473 | static int be_irq_register(struct be_adapter *adapter) | |
2474 | { | |
2475 | struct net_device *netdev = adapter->netdev; | |
2476 | int status; | |
2477 | ||
ac6a0c4a | 2478 | if (msix_enabled(adapter)) { |
6b7c5b94 SP |
2479 | status = be_msix_register(adapter); |
2480 | if (status == 0) | |
2481 | goto done; | |
ba343c77 SB |
2482 | /* INTx is not supported for VF */ |
2483 | if (!be_physfn(adapter)) | |
2484 | return status; | |
6b7c5b94 SP |
2485 | } |
2486 | ||
e49cc34f | 2487 | /* INTx: only the first EQ is used */ |
6b7c5b94 SP |
2488 | netdev->irq = adapter->pdev->irq; |
2489 | status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name, | |
e49cc34f | 2490 | &adapter->eq_obj[0]); |
6b7c5b94 SP |
2491 | if (status) { |
2492 | dev_err(&adapter->pdev->dev, | |
2493 | "INTx request IRQ failed - err %d\n", status); | |
2494 | return status; | |
2495 | } | |
2496 | done: | |
2497 | adapter->isr_registered = true; | |
2498 | return 0; | |
2499 | } | |
2500 | ||
2501 | static void be_irq_unregister(struct be_adapter *adapter) | |
2502 | { | |
2503 | struct net_device *netdev = adapter->netdev; | |
10ef9ab4 | 2504 | struct be_eq_obj *eqo; |
3abcdeda | 2505 | int i; |
6b7c5b94 SP |
2506 | |
2507 | if (!adapter->isr_registered) | |
2508 | return; | |
2509 | ||
2510 | /* INTx */ | |
ac6a0c4a | 2511 | if (!msix_enabled(adapter)) { |
e49cc34f | 2512 | free_irq(netdev->irq, &adapter->eq_obj[0]); |
6b7c5b94 SP |
2513 | goto done; |
2514 | } | |
2515 | ||
2516 | /* MSIx */ | |
10ef9ab4 SP |
2517 | for_all_evt_queues(adapter, eqo, i) |
2518 | free_irq(be_msix_vec_get(adapter, eqo), eqo); | |
3abcdeda | 2519 | |
6b7c5b94 SP |
2520 | done: |
2521 | adapter->isr_registered = false; | |
6b7c5b94 SP |
2522 | } |
2523 | ||
10ef9ab4 | 2524 | static void be_rx_qs_destroy(struct be_adapter *adapter) |
482c9e79 SP |
2525 | { |
2526 | struct be_queue_info *q; | |
2527 | struct be_rx_obj *rxo; | |
2528 | int i; | |
2529 | ||
2530 | for_all_rx_queues(adapter, rxo, i) { | |
2531 | q = &rxo->q; | |
2532 | if (q->created) { | |
2533 | be_cmd_rxq_destroy(adapter, q); | |
10ef9ab4 | 2534 | be_rx_cq_clean(rxo); |
482c9e79 | 2535 | } |
10ef9ab4 | 2536 | be_queue_free(adapter, q); |
482c9e79 SP |
2537 | } |
2538 | } | |
2539 | ||
889cd4b2 SP |
2540 | static int be_close(struct net_device *netdev) |
2541 | { | |
2542 | struct be_adapter *adapter = netdev_priv(netdev); | |
10ef9ab4 SP |
2543 | struct be_eq_obj *eqo; |
2544 | int i; | |
889cd4b2 | 2545 | |
045508a8 PP |
2546 | be_roce_dev_close(adapter); |
2547 | ||
04d3d624 SK |
2548 | if (adapter->flags & BE_FLAGS_NAPI_ENABLED) { |
2549 | for_all_evt_queues(adapter, eqo, i) | |
2550 | napi_disable(&eqo->napi); | |
2551 | adapter->flags &= ~BE_FLAGS_NAPI_ENABLED; | |
2552 | } | |
a323d9bf SP |
2553 | |
2554 | be_async_mcc_disable(adapter); | |
2555 | ||
2556 | /* Wait for all pending tx completions to arrive so that | |
2557 | * all tx skbs are freed. | |
2558 | */ | |
2559 | be_tx_compl_clean(adapter); | |
fba87559 | 2560 | netif_tx_disable(netdev); |
a323d9bf SP |
2561 | |
2562 | be_rx_qs_destroy(adapter); | |
2563 | ||
2564 | for_all_evt_queues(adapter, eqo, i) { | |
10ef9ab4 SP |
2565 | if (msix_enabled(adapter)) |
2566 | synchronize_irq(be_msix_vec_get(adapter, eqo)); | |
2567 | else | |
2568 | synchronize_irq(netdev->irq); | |
2569 | be_eq_clean(eqo); | |
63fcb27f PR |
2570 | } |
2571 | ||
889cd4b2 SP |
2572 | be_irq_unregister(adapter); |
2573 | ||
482c9e79 SP |
2574 | return 0; |
2575 | } | |
2576 | ||
10ef9ab4 | 2577 | static int be_rx_qs_create(struct be_adapter *adapter) |
482c9e79 SP |
2578 | { |
2579 | struct be_rx_obj *rxo; | |
e9008ee9 PR |
2580 | int rc, i, j; |
2581 | u8 rsstable[128]; | |
482c9e79 SP |
2582 | |
2583 | for_all_rx_queues(adapter, rxo, i) { | |
10ef9ab4 SP |
2584 | rc = be_queue_alloc(adapter, &rxo->q, RX_Q_LEN, |
2585 | sizeof(struct be_eth_rx_d)); | |
2586 | if (rc) | |
2587 | return rc; | |
2588 | } | |
2589 | ||
2590 | /* The FW would like the default RXQ to be created first */ | |
2591 | rxo = default_rxo(adapter); | |
2592 | rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id, rx_frag_size, | |
2593 | adapter->if_handle, false, &rxo->rss_id); | |
2594 | if (rc) | |
2595 | return rc; | |
2596 | ||
2597 | for_all_rss_queues(adapter, rxo, i) { | |
482c9e79 | 2598 | rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id, |
10ef9ab4 SP |
2599 | rx_frag_size, adapter->if_handle, |
2600 | true, &rxo->rss_id); | |
482c9e79 SP |
2601 | if (rc) |
2602 | return rc; | |
2603 | } | |
2604 | ||
2605 | if (be_multi_rxq(adapter)) { | |
e9008ee9 PR |
2606 | for (j = 0; j < 128; j += adapter->num_rx_qs - 1) { |
2607 | for_all_rss_queues(adapter, rxo, i) { | |
2608 | if ((j + i) >= 128) | |
2609 | break; | |
2610 | rsstable[j + i] = rxo->rss_id; | |
2611 | } | |
2612 | } | |
594ad54a SR |
2613 | adapter->rss_flags = RSS_ENABLE_TCP_IPV4 | RSS_ENABLE_IPV4 | |
2614 | RSS_ENABLE_TCP_IPV6 | RSS_ENABLE_IPV6; | |
2615 | ||
2616 | if (!BEx_chip(adapter)) | |
2617 | adapter->rss_flags |= RSS_ENABLE_UDP_IPV4 | | |
2618 | RSS_ENABLE_UDP_IPV6; | |
2619 | ||
2620 | rc = be_cmd_rss_config(adapter, rsstable, adapter->rss_flags, | |
2621 | 128); | |
2622 | if (rc) { | |
2623 | adapter->rss_flags = 0; | |
482c9e79 | 2624 | return rc; |
594ad54a | 2625 | } |
482c9e79 SP |
2626 | } |
2627 | ||
2628 | /* First time posting */ | |
10ef9ab4 | 2629 | for_all_rx_queues(adapter, rxo, i) |
482c9e79 | 2630 | be_post_rx_frags(rxo, GFP_KERNEL); |
889cd4b2 SP |
2631 | return 0; |
2632 | } | |
2633 | ||
6b7c5b94 SP |
2634 | static int be_open(struct net_device *netdev) |
2635 | { | |
2636 | struct be_adapter *adapter = netdev_priv(netdev); | |
10ef9ab4 | 2637 | struct be_eq_obj *eqo; |
3abcdeda | 2638 | struct be_rx_obj *rxo; |
10ef9ab4 | 2639 | struct be_tx_obj *txo; |
b236916a | 2640 | u8 link_status; |
3abcdeda | 2641 | int status, i; |
5fb379ee | 2642 | |
10ef9ab4 | 2643 | status = be_rx_qs_create(adapter); |
482c9e79 SP |
2644 | if (status) |
2645 | goto err; | |
2646 | ||
c2bba3df SK |
2647 | status = be_irq_register(adapter); |
2648 | if (status) | |
2649 | goto err; | |
5fb379ee | 2650 | |
10ef9ab4 | 2651 | for_all_rx_queues(adapter, rxo, i) |
3abcdeda | 2652 | be_cq_notify(adapter, rxo->cq.id, true, 0); |
5fb379ee | 2653 | |
10ef9ab4 SP |
2654 | for_all_tx_queues(adapter, txo, i) |
2655 | be_cq_notify(adapter, txo->cq.id, true, 0); | |
2656 | ||
7a1e9b20 SP |
2657 | be_async_mcc_enable(adapter); |
2658 | ||
10ef9ab4 SP |
2659 | for_all_evt_queues(adapter, eqo, i) { |
2660 | napi_enable(&eqo->napi); | |
2661 | be_eq_notify(adapter, eqo->q.id, true, false, 0); | |
2662 | } | |
04d3d624 | 2663 | adapter->flags |= BE_FLAGS_NAPI_ENABLED; |
10ef9ab4 | 2664 | |
323ff71e | 2665 | status = be_cmd_link_status_query(adapter, NULL, &link_status, 0); |
b236916a AK |
2666 | if (!status) |
2667 | be_link_status_update(adapter, link_status); | |
2668 | ||
fba87559 | 2669 | netif_tx_start_all_queues(netdev); |
045508a8 | 2670 | be_roce_dev_open(adapter); |
889cd4b2 SP |
2671 | return 0; |
2672 | err: | |
2673 | be_close(adapter->netdev); | |
2674 | return -EIO; | |
5fb379ee SP |
2675 | } |
2676 | ||
71d8d1b5 AK |
2677 | static int be_setup_wol(struct be_adapter *adapter, bool enable) |
2678 | { | |
2679 | struct be_dma_mem cmd; | |
2680 | int status = 0; | |
2681 | u8 mac[ETH_ALEN]; | |
2682 | ||
2683 | memset(mac, 0, ETH_ALEN); | |
2684 | ||
2685 | cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config); | |
2b7bcebf | 2686 | cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma, |
1f9061d2 | 2687 | GFP_KERNEL | __GFP_ZERO); |
71d8d1b5 AK |
2688 | if (cmd.va == NULL) |
2689 | return -1; | |
71d8d1b5 AK |
2690 | |
2691 | if (enable) { | |
2692 | status = pci_write_config_dword(adapter->pdev, | |
2693 | PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK); | |
2694 | if (status) { | |
2695 | dev_err(&adapter->pdev->dev, | |
2381a55c | 2696 | "Could not enable Wake-on-lan\n"); |
2b7bcebf IV |
2697 | dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, |
2698 | cmd.dma); | |
71d8d1b5 AK |
2699 | return status; |
2700 | } | |
2701 | status = be_cmd_enable_magic_wol(adapter, | |
2702 | adapter->netdev->dev_addr, &cmd); | |
2703 | pci_enable_wake(adapter->pdev, PCI_D3hot, 1); | |
2704 | pci_enable_wake(adapter->pdev, PCI_D3cold, 1); | |
2705 | } else { | |
2706 | status = be_cmd_enable_magic_wol(adapter, mac, &cmd); | |
2707 | pci_enable_wake(adapter->pdev, PCI_D3hot, 0); | |
2708 | pci_enable_wake(adapter->pdev, PCI_D3cold, 0); | |
2709 | } | |
2710 | ||
2b7bcebf | 2711 | dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma); |
71d8d1b5 AK |
2712 | return status; |
2713 | } | |
2714 | ||
6d87f5c3 AK |
2715 | /* |
2716 | * Generate a seed MAC address from the PF MAC Address using jhash. | |
2717 | * MAC Address for VFs are assigned incrementally starting from the seed. | |
2718 | * These addresses are programmed in the ASIC by the PF and the VF driver | |
2719 | * queries for the MAC address during its probe. | |
2720 | */ | |
4c876616 | 2721 | static int be_vf_eth_addr_config(struct be_adapter *adapter) |
6d87f5c3 | 2722 | { |
f9449ab7 | 2723 | u32 vf; |
3abcdeda | 2724 | int status = 0; |
6d87f5c3 | 2725 | u8 mac[ETH_ALEN]; |
11ac75ed | 2726 | struct be_vf_cfg *vf_cfg; |
6d87f5c3 AK |
2727 | |
2728 | be_vf_eth_addr_generate(adapter, mac); | |
2729 | ||
11ac75ed | 2730 | for_all_vfs(adapter, vf_cfg, vf) { |
3175d8c2 | 2731 | if (BEx_chip(adapter)) |
590c391d | 2732 | status = be_cmd_pmac_add(adapter, mac, |
11ac75ed SP |
2733 | vf_cfg->if_handle, |
2734 | &vf_cfg->pmac_id, vf + 1); | |
3175d8c2 SP |
2735 | else |
2736 | status = be_cmd_set_mac(adapter, mac, vf_cfg->if_handle, | |
2737 | vf + 1); | |
590c391d | 2738 | |
6d87f5c3 AK |
2739 | if (status) |
2740 | dev_err(&adapter->pdev->dev, | |
590c391d | 2741 | "Mac address assignment failed for VF %d\n", vf); |
6d87f5c3 | 2742 | else |
11ac75ed | 2743 | memcpy(vf_cfg->mac_addr, mac, ETH_ALEN); |
6d87f5c3 AK |
2744 | |
2745 | mac[5] += 1; | |
2746 | } | |
2747 | return status; | |
2748 | } | |
2749 | ||
4c876616 SP |
2750 | static int be_vfs_mac_query(struct be_adapter *adapter) |
2751 | { | |
2752 | int status, vf; | |
2753 | u8 mac[ETH_ALEN]; | |
2754 | struct be_vf_cfg *vf_cfg; | |
95046b92 | 2755 | bool active = false; |
4c876616 SP |
2756 | |
2757 | for_all_vfs(adapter, vf_cfg, vf) { | |
2758 | be_cmd_get_mac_from_list(adapter, mac, &active, | |
2759 | &vf_cfg->pmac_id, 0); | |
2760 | ||
2761 | status = be_cmd_mac_addr_query(adapter, mac, false, | |
2762 | vf_cfg->if_handle, 0); | |
2763 | if (status) | |
2764 | return status; | |
2765 | memcpy(vf_cfg->mac_addr, mac, ETH_ALEN); | |
2766 | } | |
2767 | return 0; | |
2768 | } | |
2769 | ||
f9449ab7 | 2770 | static void be_vf_clear(struct be_adapter *adapter) |
6d87f5c3 | 2771 | { |
11ac75ed | 2772 | struct be_vf_cfg *vf_cfg; |
6d87f5c3 AK |
2773 | u32 vf; |
2774 | ||
257a3feb | 2775 | if (pci_vfs_assigned(adapter->pdev)) { |
4c876616 SP |
2776 | dev_warn(&adapter->pdev->dev, |
2777 | "VFs are assigned to VMs: not disabling VFs\n"); | |
39f1d94d SP |
2778 | goto done; |
2779 | } | |
2780 | ||
b4c1df93 SP |
2781 | pci_disable_sriov(adapter->pdev); |
2782 | ||
11ac75ed | 2783 | for_all_vfs(adapter, vf_cfg, vf) { |
3175d8c2 | 2784 | if (BEx_chip(adapter)) |
11ac75ed SP |
2785 | be_cmd_pmac_del(adapter, vf_cfg->if_handle, |
2786 | vf_cfg->pmac_id, vf + 1); | |
3175d8c2 SP |
2787 | else |
2788 | be_cmd_set_mac(adapter, NULL, vf_cfg->if_handle, | |
2789 | vf + 1); | |
f9449ab7 | 2790 | |
11ac75ed SP |
2791 | be_cmd_if_destroy(adapter, vf_cfg->if_handle, vf + 1); |
2792 | } | |
39f1d94d SP |
2793 | done: |
2794 | kfree(adapter->vf_cfg); | |
2795 | adapter->num_vfs = 0; | |
6d87f5c3 AK |
2796 | } |
2797 | ||
a54769f5 SP |
2798 | static int be_clear(struct be_adapter *adapter) |
2799 | { | |
2d17f403 | 2800 | int i; |
fbc13f01 | 2801 | |
191eb756 SP |
2802 | if (adapter->flags & BE_FLAGS_WORKER_SCHEDULED) { |
2803 | cancel_delayed_work_sync(&adapter->work); | |
2804 | adapter->flags &= ~BE_FLAGS_WORKER_SCHEDULED; | |
2805 | } | |
2806 | ||
11ac75ed | 2807 | if (sriov_enabled(adapter)) |
f9449ab7 SP |
2808 | be_vf_clear(adapter); |
2809 | ||
2d17f403 SP |
2810 | /* delete the primary mac along with the uc-mac list */ |
2811 | for (i = 0; i < (adapter->uc_macs + 1); i++) | |
fbc13f01 | 2812 | be_cmd_pmac_del(adapter, adapter->if_handle, |
2d17f403 SP |
2813 | adapter->pmac_id[i], 0); |
2814 | adapter->uc_macs = 0; | |
fbc13f01 | 2815 | |
f9449ab7 | 2816 | be_cmd_if_destroy(adapter, adapter->if_handle, 0); |
a54769f5 SP |
2817 | |
2818 | be_mcc_queues_destroy(adapter); | |
10ef9ab4 | 2819 | be_rx_cqs_destroy(adapter); |
a54769f5 | 2820 | be_tx_queues_destroy(adapter); |
10ef9ab4 | 2821 | be_evt_queues_destroy(adapter); |
a54769f5 | 2822 | |
abb93951 PR |
2823 | kfree(adapter->pmac_id); |
2824 | adapter->pmac_id = NULL; | |
2825 | ||
10ef9ab4 | 2826 | be_msix_disable(adapter); |
a54769f5 SP |
2827 | return 0; |
2828 | } | |
2829 | ||
4c876616 | 2830 | static int be_vfs_if_create(struct be_adapter *adapter) |
abb93951 | 2831 | { |
4c876616 SP |
2832 | struct be_vf_cfg *vf_cfg; |
2833 | u32 cap_flags, en_flags, vf; | |
abb93951 PR |
2834 | int status; |
2835 | ||
4c876616 SP |
2836 | cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST | |
2837 | BE_IF_FLAGS_MULTICAST; | |
abb93951 | 2838 | |
4c876616 SP |
2839 | for_all_vfs(adapter, vf_cfg, vf) { |
2840 | if (!BE3_chip(adapter)) | |
a05f99db VV |
2841 | be_cmd_get_profile_config(adapter, &cap_flags, |
2842 | NULL, vf + 1); | |
4c876616 SP |
2843 | |
2844 | /* If a FW profile exists, then cap_flags are updated */ | |
2845 | en_flags = cap_flags & (BE_IF_FLAGS_UNTAGGED | | |
2846 | BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_MULTICAST); | |
2847 | status = be_cmd_if_create(adapter, cap_flags, en_flags, | |
2848 | &vf_cfg->if_handle, vf + 1); | |
2849 | if (status) | |
2850 | goto err; | |
2851 | } | |
2852 | err: | |
2853 | return status; | |
abb93951 PR |
2854 | } |
2855 | ||
39f1d94d | 2856 | static int be_vf_setup_init(struct be_adapter *adapter) |
30128031 | 2857 | { |
11ac75ed | 2858 | struct be_vf_cfg *vf_cfg; |
30128031 SP |
2859 | int vf; |
2860 | ||
39f1d94d SP |
2861 | adapter->vf_cfg = kcalloc(adapter->num_vfs, sizeof(*vf_cfg), |
2862 | GFP_KERNEL); | |
2863 | if (!adapter->vf_cfg) | |
2864 | return -ENOMEM; | |
2865 | ||
11ac75ed SP |
2866 | for_all_vfs(adapter, vf_cfg, vf) { |
2867 | vf_cfg->if_handle = -1; | |
2868 | vf_cfg->pmac_id = -1; | |
30128031 | 2869 | } |
39f1d94d | 2870 | return 0; |
30128031 SP |
2871 | } |
2872 | ||
f9449ab7 SP |
2873 | static int be_vf_setup(struct be_adapter *adapter) |
2874 | { | |
11ac75ed | 2875 | struct be_vf_cfg *vf_cfg; |
f1f3ee1b | 2876 | u16 def_vlan, lnk_speed; |
4c876616 SP |
2877 | int status, old_vfs, vf; |
2878 | struct device *dev = &adapter->pdev->dev; | |
04a06028 | 2879 | u32 privileges; |
39f1d94d | 2880 | |
257a3feb | 2881 | old_vfs = pci_num_vf(adapter->pdev); |
4c876616 SP |
2882 | if (old_vfs) { |
2883 | dev_info(dev, "%d VFs are already enabled\n", old_vfs); | |
2884 | if (old_vfs != num_vfs) | |
2885 | dev_warn(dev, "Ignoring num_vfs=%d setting\n", num_vfs); | |
2886 | adapter->num_vfs = old_vfs; | |
39f1d94d | 2887 | } else { |
4c876616 SP |
2888 | if (num_vfs > adapter->dev_num_vfs) |
2889 | dev_info(dev, "Device supports %d VFs and not %d\n", | |
2890 | adapter->dev_num_vfs, num_vfs); | |
2891 | adapter->num_vfs = min_t(u16, num_vfs, adapter->dev_num_vfs); | |
b4c1df93 | 2892 | if (!adapter->num_vfs) |
4c876616 | 2893 | return 0; |
39f1d94d SP |
2894 | } |
2895 | ||
2896 | status = be_vf_setup_init(adapter); | |
2897 | if (status) | |
2898 | goto err; | |
30128031 | 2899 | |
4c876616 SP |
2900 | if (old_vfs) { |
2901 | for_all_vfs(adapter, vf_cfg, vf) { | |
2902 | status = be_cmd_get_if_id(adapter, vf_cfg, vf); | |
2903 | if (status) | |
2904 | goto err; | |
2905 | } | |
2906 | } else { | |
2907 | status = be_vfs_if_create(adapter); | |
f9449ab7 SP |
2908 | if (status) |
2909 | goto err; | |
f9449ab7 SP |
2910 | } |
2911 | ||
4c876616 SP |
2912 | if (old_vfs) { |
2913 | status = be_vfs_mac_query(adapter); | |
2914 | if (status) | |
2915 | goto err; | |
2916 | } else { | |
39f1d94d SP |
2917 | status = be_vf_eth_addr_config(adapter); |
2918 | if (status) | |
2919 | goto err; | |
2920 | } | |
f9449ab7 | 2921 | |
11ac75ed | 2922 | for_all_vfs(adapter, vf_cfg, vf) { |
04a06028 SP |
2923 | /* Allow VFs to programs MAC/VLAN filters */ |
2924 | status = be_cmd_get_fn_privileges(adapter, &privileges, vf + 1); | |
2925 | if (!status && !(privileges & BE_PRIV_FILTMGMT)) { | |
2926 | status = be_cmd_set_fn_privileges(adapter, | |
2927 | privileges | | |
2928 | BE_PRIV_FILTMGMT, | |
2929 | vf + 1); | |
2930 | if (!status) | |
2931 | dev_info(dev, "VF%d has FILTMGMT privilege\n", | |
2932 | vf); | |
2933 | } | |
2934 | ||
4c876616 SP |
2935 | /* BE3 FW, by default, caps VF TX-rate to 100mbps. |
2936 | * Allow full available bandwidth | |
2937 | */ | |
2938 | if (BE3_chip(adapter) && !old_vfs) | |
2939 | be_cmd_set_qos(adapter, 1000, vf+1); | |
2940 | ||
2941 | status = be_cmd_link_status_query(adapter, &lnk_speed, | |
2942 | NULL, vf + 1); | |
2943 | if (!status) | |
2944 | vf_cfg->tx_rate = lnk_speed; | |
f1f3ee1b AK |
2945 | |
2946 | status = be_cmd_get_hsw_config(adapter, &def_vlan, | |
4c876616 | 2947 | vf + 1, vf_cfg->if_handle); |
f1f3ee1b AK |
2948 | if (status) |
2949 | goto err; | |
2950 | vf_cfg->def_vid = def_vlan; | |
dcf7ebba PR |
2951 | |
2952 | be_cmd_enable_vf(adapter, vf + 1); | |
f9449ab7 | 2953 | } |
b4c1df93 SP |
2954 | |
2955 | if (!old_vfs) { | |
2956 | status = pci_enable_sriov(adapter->pdev, adapter->num_vfs); | |
2957 | if (status) { | |
2958 | dev_err(dev, "SRIOV enable failed\n"); | |
2959 | adapter->num_vfs = 0; | |
2960 | goto err; | |
2961 | } | |
2962 | } | |
f9449ab7 SP |
2963 | return 0; |
2964 | err: | |
4c876616 SP |
2965 | dev_err(dev, "VF setup failed\n"); |
2966 | be_vf_clear(adapter); | |
f9449ab7 SP |
2967 | return status; |
2968 | } | |
2969 | ||
30128031 SP |
2970 | static void be_setup_init(struct be_adapter *adapter) |
2971 | { | |
2972 | adapter->vlan_prio_bmap = 0xff; | |
42f11cf2 | 2973 | adapter->phy.link_speed = -1; |
30128031 SP |
2974 | adapter->if_handle = -1; |
2975 | adapter->be3_native = false; | |
2976 | adapter->promiscuous = false; | |
f25b119c PR |
2977 | if (be_physfn(adapter)) |
2978 | adapter->cmd_privileges = MAX_PRIVILEGES; | |
2979 | else | |
2980 | adapter->cmd_privileges = MIN_PRIVILEGES; | |
30128031 SP |
2981 | } |
2982 | ||
abb93951 PR |
2983 | static void be_get_resources(struct be_adapter *adapter) |
2984 | { | |
4c876616 SP |
2985 | u16 dev_num_vfs; |
2986 | int pos, status; | |
abb93951 | 2987 | bool profile_present = false; |
a05f99db | 2988 | u16 txq_count = 0; |
abb93951 | 2989 | |
4c876616 | 2990 | if (!BEx_chip(adapter)) { |
abb93951 | 2991 | status = be_cmd_get_func_config(adapter); |
abb93951 PR |
2992 | if (!status) |
2993 | profile_present = true; | |
a05f99db VV |
2994 | } else if (BE3_chip(adapter) && be_physfn(adapter)) { |
2995 | be_cmd_get_profile_config(adapter, NULL, &txq_count, 0); | |
abb93951 PR |
2996 | } |
2997 | ||
2998 | if (profile_present) { | |
2999 | /* Sanity fixes for Lancer */ | |
3000 | adapter->max_pmac_cnt = min_t(u16, adapter->max_pmac_cnt, | |
3001 | BE_UC_PMAC_COUNT); | |
3002 | adapter->max_vlans = min_t(u16, adapter->max_vlans, | |
3003 | BE_NUM_VLANS_SUPPORTED); | |
3004 | adapter->max_mcast_mac = min_t(u16, adapter->max_mcast_mac, | |
3005 | BE_MAX_MC); | |
3006 | adapter->max_tx_queues = min_t(u16, adapter->max_tx_queues, | |
3007 | MAX_TX_QS); | |
3008 | adapter->max_rss_queues = min_t(u16, adapter->max_rss_queues, | |
3009 | BE3_MAX_RSS_QS); | |
3010 | adapter->max_event_queues = min_t(u16, | |
3011 | adapter->max_event_queues, | |
3012 | BE3_MAX_RSS_QS); | |
3013 | ||
3014 | if (adapter->max_rss_queues && | |
3015 | adapter->max_rss_queues == adapter->max_rx_queues) | |
3016 | adapter->max_rss_queues -= 1; | |
3017 | ||
3018 | if (adapter->max_event_queues < adapter->max_rss_queues) | |
3019 | adapter->max_rss_queues = adapter->max_event_queues; | |
3020 | ||
3021 | } else { | |
3022 | if (be_physfn(adapter)) | |
3023 | adapter->max_pmac_cnt = BE_UC_PMAC_COUNT; | |
3024 | else | |
3025 | adapter->max_pmac_cnt = BE_VF_UC_PMAC_COUNT; | |
3026 | ||
3027 | if (adapter->function_mode & FLEX10_MODE) | |
3028 | adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/8; | |
3029 | else | |
3030 | adapter->max_vlans = BE_NUM_VLANS_SUPPORTED; | |
3031 | ||
3032 | adapter->max_mcast_mac = BE_MAX_MC; | |
a05f99db VV |
3033 | adapter->max_tx_queues = txq_count ? txq_count : MAX_TX_QS; |
3034 | adapter->max_tx_queues = min_t(u16, adapter->max_tx_queues, | |
3035 | MAX_TX_QS); | |
abb93951 PR |
3036 | adapter->max_rss_queues = (adapter->be3_native) ? |
3037 | BE3_MAX_RSS_QS : BE2_MAX_RSS_QS; | |
3038 | adapter->max_event_queues = BE3_MAX_RSS_QS; | |
3039 | ||
3040 | adapter->if_cap_flags = BE_IF_FLAGS_UNTAGGED | | |
3041 | BE_IF_FLAGS_BROADCAST | | |
3042 | BE_IF_FLAGS_MULTICAST | | |
3043 | BE_IF_FLAGS_PASS_L3L4_ERRORS | | |
3044 | BE_IF_FLAGS_MCAST_PROMISCUOUS | | |
3045 | BE_IF_FLAGS_VLAN_PROMISCUOUS | | |
3046 | BE_IF_FLAGS_PROMISCUOUS; | |
3047 | ||
3048 | if (adapter->function_caps & BE_FUNCTION_CAPS_RSS) | |
3049 | adapter->if_cap_flags |= BE_IF_FLAGS_RSS; | |
3050 | } | |
4c876616 SP |
3051 | |
3052 | pos = pci_find_ext_capability(adapter->pdev, PCI_EXT_CAP_ID_SRIOV); | |
3053 | if (pos) { | |
3054 | pci_read_config_word(adapter->pdev, pos + PCI_SRIOV_TOTAL_VF, | |
3055 | &dev_num_vfs); | |
3056 | if (BE3_chip(adapter)) | |
3057 | dev_num_vfs = min_t(u16, dev_num_vfs, MAX_VFS); | |
3058 | adapter->dev_num_vfs = dev_num_vfs; | |
3059 | } | |
abb93951 PR |
3060 | } |
3061 | ||
39f1d94d SP |
3062 | /* Routine to query per function resource limits */ |
3063 | static int be_get_config(struct be_adapter *adapter) | |
3064 | { | |
4c876616 | 3065 | int status; |
39f1d94d | 3066 | |
abb93951 PR |
3067 | status = be_cmd_query_fw_cfg(adapter, &adapter->port_num, |
3068 | &adapter->function_mode, | |
0ad3157e VV |
3069 | &adapter->function_caps, |
3070 | &adapter->asic_rev); | |
abb93951 PR |
3071 | if (status) |
3072 | goto err; | |
3073 | ||
3074 | be_get_resources(adapter); | |
3075 | ||
3076 | /* primary mac needs 1 pmac entry */ | |
3077 | adapter->pmac_id = kcalloc(adapter->max_pmac_cnt + 1, | |
3078 | sizeof(u32), GFP_KERNEL); | |
3079 | if (!adapter->pmac_id) { | |
3080 | status = -ENOMEM; | |
3081 | goto err; | |
3082 | } | |
3083 | ||
abb93951 PR |
3084 | err: |
3085 | return status; | |
39f1d94d SP |
3086 | } |
3087 | ||
95046b92 SP |
3088 | static int be_mac_setup(struct be_adapter *adapter) |
3089 | { | |
3090 | u8 mac[ETH_ALEN]; | |
3091 | int status; | |
3092 | ||
3093 | if (is_zero_ether_addr(adapter->netdev->dev_addr)) { | |
3094 | status = be_cmd_get_perm_mac(adapter, mac); | |
3095 | if (status) | |
3096 | return status; | |
3097 | ||
3098 | memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN); | |
3099 | memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN); | |
3100 | } else { | |
3101 | /* Maybe the HW was reset; dev_addr must be re-programmed */ | |
3102 | memcpy(mac, adapter->netdev->dev_addr, ETH_ALEN); | |
3103 | } | |
3104 | ||
3105 | /* On BE3 VFs this cmd may fail due to lack of privilege. | |
3106 | * Ignore the failure as in this case pmac_id is fetched | |
3107 | * in the IFACE_CREATE cmd. | |
3108 | */ | |
3109 | be_cmd_pmac_add(adapter, mac, adapter->if_handle, | |
3110 | &adapter->pmac_id[0], 0); | |
3111 | return 0; | |
3112 | } | |
3113 | ||
5fb379ee SP |
3114 | static int be_setup(struct be_adapter *adapter) |
3115 | { | |
39f1d94d | 3116 | struct device *dev = &adapter->pdev->dev; |
abb93951 | 3117 | u32 en_flags; |
a54769f5 | 3118 | u32 tx_fc, rx_fc; |
10ef9ab4 | 3119 | int status; |
ba343c77 | 3120 | |
30128031 | 3121 | be_setup_init(adapter); |
6b7c5b94 | 3122 | |
abb93951 PR |
3123 | if (!lancer_chip(adapter)) |
3124 | be_cmd_req_native_mode(adapter); | |
39f1d94d | 3125 | |
abb93951 PR |
3126 | status = be_get_config(adapter); |
3127 | if (status) | |
3128 | goto err; | |
73d540f2 | 3129 | |
c2bba3df SK |
3130 | status = be_msix_enable(adapter); |
3131 | if (status) | |
3132 | goto err; | |
10ef9ab4 SP |
3133 | |
3134 | status = be_evt_queues_create(adapter); | |
3135 | if (status) | |
a54769f5 | 3136 | goto err; |
6b7c5b94 | 3137 | |
10ef9ab4 SP |
3138 | status = be_tx_cqs_create(adapter); |
3139 | if (status) | |
3140 | goto err; | |
3141 | ||
3142 | status = be_rx_cqs_create(adapter); | |
3143 | if (status) | |
a54769f5 | 3144 | goto err; |
6b7c5b94 | 3145 | |
f9449ab7 | 3146 | status = be_mcc_queues_create(adapter); |
10ef9ab4 | 3147 | if (status) |
a54769f5 | 3148 | goto err; |
6b7c5b94 | 3149 | |
f25b119c PR |
3150 | be_cmd_get_fn_privileges(adapter, &adapter->cmd_privileges, 0); |
3151 | /* In UMC mode FW does not return right privileges. | |
3152 | * Override with correct privilege equivalent to PF. | |
3153 | */ | |
3154 | if (be_is_mc(adapter)) | |
3155 | adapter->cmd_privileges = MAX_PRIVILEGES; | |
3156 | ||
f9449ab7 SP |
3157 | en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST | |
3158 | BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_PASS_L3L4_ERRORS; | |
abb93951 | 3159 | if (adapter->function_caps & BE_FUNCTION_CAPS_RSS) |
f9449ab7 | 3160 | en_flags |= BE_IF_FLAGS_RSS; |
abb93951 | 3161 | en_flags = en_flags & adapter->if_cap_flags; |
abb93951 | 3162 | status = be_cmd_if_create(adapter, adapter->if_cap_flags, en_flags, |
1578e777 | 3163 | &adapter->if_handle, 0); |
5fb379ee | 3164 | if (status != 0) |
a54769f5 | 3165 | goto err; |
6b7c5b94 | 3166 | |
95046b92 SP |
3167 | status = be_mac_setup(adapter); |
3168 | if (status) | |
1578e777 PR |
3169 | goto err; |
3170 | ||
10ef9ab4 SP |
3171 | status = be_tx_qs_create(adapter); |
3172 | if (status) | |
3173 | goto err; | |
3174 | ||
eeb65ced | 3175 | be_cmd_get_fw_ver(adapter, adapter->fw_ver, adapter->fw_on_flash); |
5a56eb10 | 3176 | |
1d1e9a46 | 3177 | if (adapter->vlans_added) |
10329df8 | 3178 | be_vid_config(adapter); |
7ab8b0b4 | 3179 | |
a54769f5 | 3180 | be_set_rx_mode(adapter->netdev); |
5fb379ee | 3181 | |
ddc3f5cb | 3182 | be_cmd_get_flow_control(adapter, &tx_fc, &rx_fc); |
590c391d | 3183 | |
ddc3f5cb AK |
3184 | if (rx_fc != adapter->rx_fc || tx_fc != adapter->tx_fc) |
3185 | be_cmd_set_flow_control(adapter, adapter->tx_fc, | |
a54769f5 | 3186 | adapter->rx_fc); |
2dc1deb6 | 3187 | |
b4c1df93 | 3188 | if (be_physfn(adapter)) { |
39f1d94d SP |
3189 | if (adapter->dev_num_vfs) |
3190 | be_vf_setup(adapter); | |
3191 | else | |
3192 | dev_warn(dev, "device doesn't support SRIOV\n"); | |
f9449ab7 SP |
3193 | } |
3194 | ||
f25b119c PR |
3195 | status = be_cmd_get_phy_info(adapter); |
3196 | if (!status && be_pause_supported(adapter)) | |
42f11cf2 AK |
3197 | adapter->phy.fc_autoneg = 1; |
3198 | ||
191eb756 SP |
3199 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000)); |
3200 | adapter->flags |= BE_FLAGS_WORKER_SCHEDULED; | |
f9449ab7 | 3201 | return 0; |
a54769f5 SP |
3202 | err: |
3203 | be_clear(adapter); | |
3204 | return status; | |
3205 | } | |
6b7c5b94 | 3206 | |
66268739 IV |
3207 | #ifdef CONFIG_NET_POLL_CONTROLLER |
3208 | static void be_netpoll(struct net_device *netdev) | |
3209 | { | |
3210 | struct be_adapter *adapter = netdev_priv(netdev); | |
10ef9ab4 | 3211 | struct be_eq_obj *eqo; |
66268739 IV |
3212 | int i; |
3213 | ||
e49cc34f SP |
3214 | for_all_evt_queues(adapter, eqo, i) { |
3215 | be_eq_notify(eqo->adapter, eqo->q.id, false, true, 0); | |
3216 | napi_schedule(&eqo->napi); | |
3217 | } | |
10ef9ab4 SP |
3218 | |
3219 | return; | |
66268739 IV |
3220 | } |
3221 | #endif | |
3222 | ||
84517482 | 3223 | #define FW_FILE_HDR_SIGN "ServerEngines Corp. " |
4188e7df | 3224 | static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "}; |
c165541e | 3225 | |
fa9a6fed | 3226 | static bool be_flash_redboot(struct be_adapter *adapter, |
3f0d4560 AK |
3227 | const u8 *p, u32 img_start, int image_size, |
3228 | int hdr_size) | |
fa9a6fed SB |
3229 | { |
3230 | u32 crc_offset; | |
3231 | u8 flashed_crc[4]; | |
3232 | int status; | |
3f0d4560 AK |
3233 | |
3234 | crc_offset = hdr_size + img_start + image_size - 4; | |
3235 | ||
fa9a6fed | 3236 | p += crc_offset; |
3f0d4560 AK |
3237 | |
3238 | status = be_cmd_get_flash_crc(adapter, flashed_crc, | |
f510fc64 | 3239 | (image_size - 4)); |
fa9a6fed SB |
3240 | if (status) { |
3241 | dev_err(&adapter->pdev->dev, | |
3242 | "could not get crc from flash, not flashing redboot\n"); | |
3243 | return false; | |
3244 | } | |
3245 | ||
3246 | /*update redboot only if crc does not match*/ | |
3247 | if (!memcmp(flashed_crc, p, 4)) | |
3248 | return false; | |
3249 | else | |
3250 | return true; | |
fa9a6fed SB |
3251 | } |
3252 | ||
306f1348 SP |
3253 | static bool phy_flashing_required(struct be_adapter *adapter) |
3254 | { | |
42f11cf2 AK |
3255 | return (adapter->phy.phy_type == TN_8022 && |
3256 | adapter->phy.interface_type == PHY_TYPE_BASET_10GB); | |
306f1348 SP |
3257 | } |
3258 | ||
c165541e PR |
3259 | static bool is_comp_in_ufi(struct be_adapter *adapter, |
3260 | struct flash_section_info *fsec, int type) | |
3261 | { | |
3262 | int i = 0, img_type = 0; | |
3263 | struct flash_section_info_g2 *fsec_g2 = NULL; | |
3264 | ||
ca34fe38 | 3265 | if (BE2_chip(adapter)) |
c165541e PR |
3266 | fsec_g2 = (struct flash_section_info_g2 *)fsec; |
3267 | ||
3268 | for (i = 0; i < MAX_FLASH_COMP; i++) { | |
3269 | if (fsec_g2) | |
3270 | img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type); | |
3271 | else | |
3272 | img_type = le32_to_cpu(fsec->fsec_entry[i].type); | |
3273 | ||
3274 | if (img_type == type) | |
3275 | return true; | |
3276 | } | |
3277 | return false; | |
3278 | ||
3279 | } | |
3280 | ||
4188e7df | 3281 | static struct flash_section_info *get_fsec_info(struct be_adapter *adapter, |
c165541e PR |
3282 | int header_size, |
3283 | const struct firmware *fw) | |
3284 | { | |
3285 | struct flash_section_info *fsec = NULL; | |
3286 | const u8 *p = fw->data; | |
3287 | ||
3288 | p += header_size; | |
3289 | while (p < (fw->data + fw->size)) { | |
3290 | fsec = (struct flash_section_info *)p; | |
3291 | if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) | |
3292 | return fsec; | |
3293 | p += 32; | |
3294 | } | |
3295 | return NULL; | |
3296 | } | |
3297 | ||
773a2d7c PR |
3298 | static int be_flash(struct be_adapter *adapter, const u8 *img, |
3299 | struct be_dma_mem *flash_cmd, int optype, int img_size) | |
3300 | { | |
3301 | u32 total_bytes = 0, flash_op, num_bytes = 0; | |
3302 | int status = 0; | |
3303 | struct be_cmd_write_flashrom *req = flash_cmd->va; | |
3304 | ||
3305 | total_bytes = img_size; | |
3306 | while (total_bytes) { | |
3307 | num_bytes = min_t(u32, 32*1024, total_bytes); | |
3308 | ||
3309 | total_bytes -= num_bytes; | |
3310 | ||
3311 | if (!total_bytes) { | |
3312 | if (optype == OPTYPE_PHY_FW) | |
3313 | flash_op = FLASHROM_OPER_PHY_FLASH; | |
3314 | else | |
3315 | flash_op = FLASHROM_OPER_FLASH; | |
3316 | } else { | |
3317 | if (optype == OPTYPE_PHY_FW) | |
3318 | flash_op = FLASHROM_OPER_PHY_SAVE; | |
3319 | else | |
3320 | flash_op = FLASHROM_OPER_SAVE; | |
3321 | } | |
3322 | ||
be716446 | 3323 | memcpy(req->data_buf, img, num_bytes); |
773a2d7c PR |
3324 | img += num_bytes; |
3325 | status = be_cmd_write_flashrom(adapter, flash_cmd, optype, | |
3326 | flash_op, num_bytes); | |
3327 | if (status) { | |
3328 | if (status == ILLEGAL_IOCTL_REQ && | |
3329 | optype == OPTYPE_PHY_FW) | |
3330 | break; | |
3331 | dev_err(&adapter->pdev->dev, | |
3332 | "cmd to write to flash rom failed.\n"); | |
3333 | return status; | |
3334 | } | |
3335 | } | |
3336 | return 0; | |
3337 | } | |
3338 | ||
0ad3157e | 3339 | /* For BE2, BE3 and BE3-R */ |
ca34fe38 | 3340 | static int be_flash_BEx(struct be_adapter *adapter, |
c165541e PR |
3341 | const struct firmware *fw, |
3342 | struct be_dma_mem *flash_cmd, | |
3343 | int num_of_images) | |
3f0d4560 | 3344 | |
84517482 | 3345 | { |
3f0d4560 | 3346 | int status = 0, i, filehdr_size = 0; |
c165541e | 3347 | int img_hdrs_size = (num_of_images * sizeof(struct image_hdr)); |
84517482 | 3348 | const u8 *p = fw->data; |
215faf9c | 3349 | const struct flash_comp *pflashcomp; |
773a2d7c | 3350 | int num_comp, redboot; |
c165541e PR |
3351 | struct flash_section_info *fsec = NULL; |
3352 | ||
3353 | struct flash_comp gen3_flash_types[] = { | |
3354 | { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, OPTYPE_ISCSI_ACTIVE, | |
3355 | FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_iSCSI}, | |
3356 | { FLASH_REDBOOT_START_g3, OPTYPE_REDBOOT, | |
3357 | FLASH_REDBOOT_IMAGE_MAX_SIZE_g3, IMAGE_BOOT_CODE}, | |
3358 | { FLASH_iSCSI_BIOS_START_g3, OPTYPE_BIOS, | |
3359 | FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_ISCSI}, | |
3360 | { FLASH_PXE_BIOS_START_g3, OPTYPE_PXE_BIOS, | |
3361 | FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_PXE}, | |
3362 | { FLASH_FCoE_BIOS_START_g3, OPTYPE_FCOE_BIOS, | |
3363 | FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_FCoE}, | |
3364 | { FLASH_iSCSI_BACKUP_IMAGE_START_g3, OPTYPE_ISCSI_BACKUP, | |
3365 | FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_iSCSI}, | |
3366 | { FLASH_FCoE_PRIMARY_IMAGE_START_g3, OPTYPE_FCOE_FW_ACTIVE, | |
3367 | FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_FCoE}, | |
3368 | { FLASH_FCoE_BACKUP_IMAGE_START_g3, OPTYPE_FCOE_FW_BACKUP, | |
3369 | FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_FCoE}, | |
3370 | { FLASH_NCSI_START_g3, OPTYPE_NCSI_FW, | |
3371 | FLASH_NCSI_IMAGE_MAX_SIZE_g3, IMAGE_NCSI}, | |
3372 | { FLASH_PHY_FW_START_g3, OPTYPE_PHY_FW, | |
3373 | FLASH_PHY_FW_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_PHY} | |
3f0d4560 | 3374 | }; |
c165541e PR |
3375 | |
3376 | struct flash_comp gen2_flash_types[] = { | |
3377 | { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, OPTYPE_ISCSI_ACTIVE, | |
3378 | FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_iSCSI}, | |
3379 | { FLASH_REDBOOT_START_g2, OPTYPE_REDBOOT, | |
3380 | FLASH_REDBOOT_IMAGE_MAX_SIZE_g2, IMAGE_BOOT_CODE}, | |
3381 | { FLASH_iSCSI_BIOS_START_g2, OPTYPE_BIOS, | |
3382 | FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_ISCSI}, | |
3383 | { FLASH_PXE_BIOS_START_g2, OPTYPE_PXE_BIOS, | |
3384 | FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_PXE}, | |
3385 | { FLASH_FCoE_BIOS_START_g2, OPTYPE_FCOE_BIOS, | |
3386 | FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_FCoE}, | |
3387 | { FLASH_iSCSI_BACKUP_IMAGE_START_g2, OPTYPE_ISCSI_BACKUP, | |
3388 | FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_iSCSI}, | |
3389 | { FLASH_FCoE_PRIMARY_IMAGE_START_g2, OPTYPE_FCOE_FW_ACTIVE, | |
3390 | FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_FCoE}, | |
3391 | { FLASH_FCoE_BACKUP_IMAGE_START_g2, OPTYPE_FCOE_FW_BACKUP, | |
3392 | FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_FCoE} | |
3f0d4560 AK |
3393 | }; |
3394 | ||
ca34fe38 | 3395 | if (BE3_chip(adapter)) { |
3f0d4560 AK |
3396 | pflashcomp = gen3_flash_types; |
3397 | filehdr_size = sizeof(struct flash_file_hdr_g3); | |
215faf9c | 3398 | num_comp = ARRAY_SIZE(gen3_flash_types); |
3f0d4560 AK |
3399 | } else { |
3400 | pflashcomp = gen2_flash_types; | |
3401 | filehdr_size = sizeof(struct flash_file_hdr_g2); | |
215faf9c | 3402 | num_comp = ARRAY_SIZE(gen2_flash_types); |
84517482 | 3403 | } |
ca34fe38 | 3404 | |
c165541e PR |
3405 | /* Get flash section info*/ |
3406 | fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); | |
3407 | if (!fsec) { | |
3408 | dev_err(&adapter->pdev->dev, | |
3409 | "Invalid Cookie. UFI corrupted ?\n"); | |
3410 | return -1; | |
3411 | } | |
9fe96934 | 3412 | for (i = 0; i < num_comp; i++) { |
c165541e | 3413 | if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type)) |
9fe96934 | 3414 | continue; |
c165541e PR |
3415 | |
3416 | if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) && | |
3417 | memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0) | |
3418 | continue; | |
3419 | ||
773a2d7c PR |
3420 | if (pflashcomp[i].optype == OPTYPE_PHY_FW && |
3421 | !phy_flashing_required(adapter)) | |
306f1348 | 3422 | continue; |
c165541e | 3423 | |
773a2d7c PR |
3424 | if (pflashcomp[i].optype == OPTYPE_REDBOOT) { |
3425 | redboot = be_flash_redboot(adapter, fw->data, | |
3426 | pflashcomp[i].offset, pflashcomp[i].size, | |
3427 | filehdr_size + img_hdrs_size); | |
3428 | if (!redboot) | |
3429 | continue; | |
3430 | } | |
c165541e | 3431 | |
3f0d4560 | 3432 | p = fw->data; |
c165541e | 3433 | p += filehdr_size + pflashcomp[i].offset + img_hdrs_size; |
306f1348 SP |
3434 | if (p + pflashcomp[i].size > fw->data + fw->size) |
3435 | return -1; | |
773a2d7c PR |
3436 | |
3437 | status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype, | |
3438 | pflashcomp[i].size); | |
3439 | if (status) { | |
3440 | dev_err(&adapter->pdev->dev, | |
3441 | "Flashing section type %d failed.\n", | |
3442 | pflashcomp[i].img_type); | |
3443 | return status; | |
84517482 | 3444 | } |
84517482 | 3445 | } |
84517482 AK |
3446 | return 0; |
3447 | } | |
3448 | ||
773a2d7c PR |
3449 | static int be_flash_skyhawk(struct be_adapter *adapter, |
3450 | const struct firmware *fw, | |
3451 | struct be_dma_mem *flash_cmd, int num_of_images) | |
3f0d4560 | 3452 | { |
773a2d7c PR |
3453 | int status = 0, i, filehdr_size = 0; |
3454 | int img_offset, img_size, img_optype, redboot; | |
3455 | int img_hdrs_size = num_of_images * sizeof(struct image_hdr); | |
3456 | const u8 *p = fw->data; | |
3457 | struct flash_section_info *fsec = NULL; | |
3458 | ||
3459 | filehdr_size = sizeof(struct flash_file_hdr_g3); | |
3460 | fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw); | |
3461 | if (!fsec) { | |
3462 | dev_err(&adapter->pdev->dev, | |
3463 | "Invalid Cookie. UFI corrupted ?\n"); | |
3464 | return -1; | |
3465 | } | |
3466 | ||
3467 | for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) { | |
3468 | img_offset = le32_to_cpu(fsec->fsec_entry[i].offset); | |
3469 | img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size); | |
3470 | ||
3471 | switch (le32_to_cpu(fsec->fsec_entry[i].type)) { | |
3472 | case IMAGE_FIRMWARE_iSCSI: | |
3473 | img_optype = OPTYPE_ISCSI_ACTIVE; | |
3474 | break; | |
3475 | case IMAGE_BOOT_CODE: | |
3476 | img_optype = OPTYPE_REDBOOT; | |
3477 | break; | |
3478 | case IMAGE_OPTION_ROM_ISCSI: | |
3479 | img_optype = OPTYPE_BIOS; | |
3480 | break; | |
3481 | case IMAGE_OPTION_ROM_PXE: | |
3482 | img_optype = OPTYPE_PXE_BIOS; | |
3483 | break; | |
3484 | case IMAGE_OPTION_ROM_FCoE: | |
3485 | img_optype = OPTYPE_FCOE_BIOS; | |
3486 | break; | |
3487 | case IMAGE_FIRMWARE_BACKUP_iSCSI: | |
3488 | img_optype = OPTYPE_ISCSI_BACKUP; | |
3489 | break; | |
3490 | case IMAGE_NCSI: | |
3491 | img_optype = OPTYPE_NCSI_FW; | |
3492 | break; | |
3493 | default: | |
3494 | continue; | |
3495 | } | |
3496 | ||
3497 | if (img_optype == OPTYPE_REDBOOT) { | |
3498 | redboot = be_flash_redboot(adapter, fw->data, | |
3499 | img_offset, img_size, | |
3500 | filehdr_size + img_hdrs_size); | |
3501 | if (!redboot) | |
3502 | continue; | |
3503 | } | |
3504 | ||
3505 | p = fw->data; | |
3506 | p += filehdr_size + img_offset + img_hdrs_size; | |
3507 | if (p + img_size > fw->data + fw->size) | |
3508 | return -1; | |
3509 | ||
3510 | status = be_flash(adapter, p, flash_cmd, img_optype, img_size); | |
3511 | if (status) { | |
3512 | dev_err(&adapter->pdev->dev, | |
3513 | "Flashing section type %d failed.\n", | |
3514 | fsec->fsec_entry[i].type); | |
3515 | return status; | |
3516 | } | |
3517 | } | |
3518 | return 0; | |
3f0d4560 AK |
3519 | } |
3520 | ||
485bf569 SN |
3521 | static int lancer_fw_download(struct be_adapter *adapter, |
3522 | const struct firmware *fw) | |
84517482 | 3523 | { |
485bf569 SN |
3524 | #define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024) |
3525 | #define LANCER_FW_DOWNLOAD_LOCATION "/prg" | |
84517482 | 3526 | struct be_dma_mem flash_cmd; |
485bf569 SN |
3527 | const u8 *data_ptr = NULL; |
3528 | u8 *dest_image_ptr = NULL; | |
3529 | size_t image_size = 0; | |
3530 | u32 chunk_size = 0; | |
3531 | u32 data_written = 0; | |
3532 | u32 offset = 0; | |
3533 | int status = 0; | |
3534 | u8 add_status = 0; | |
f67ef7ba | 3535 | u8 change_status; |
84517482 | 3536 | |
485bf569 | 3537 | if (!IS_ALIGNED(fw->size, sizeof(u32))) { |
d9efd2af | 3538 | dev_err(&adapter->pdev->dev, |
485bf569 SN |
3539 | "FW Image not properly aligned. " |
3540 | "Length must be 4 byte aligned.\n"); | |
3541 | status = -EINVAL; | |
3542 | goto lancer_fw_exit; | |
d9efd2af SB |
3543 | } |
3544 | ||
485bf569 SN |
3545 | flash_cmd.size = sizeof(struct lancer_cmd_req_write_object) |
3546 | + LANCER_FW_DOWNLOAD_CHUNK; | |
3547 | flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size, | |
d0320f75 | 3548 | &flash_cmd.dma, GFP_KERNEL); |
485bf569 SN |
3549 | if (!flash_cmd.va) { |
3550 | status = -ENOMEM; | |
485bf569 SN |
3551 | goto lancer_fw_exit; |
3552 | } | |
84517482 | 3553 | |
485bf569 SN |
3554 | dest_image_ptr = flash_cmd.va + |
3555 | sizeof(struct lancer_cmd_req_write_object); | |
3556 | image_size = fw->size; | |
3557 | data_ptr = fw->data; | |
3558 | ||
3559 | while (image_size) { | |
3560 | chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK); | |
3561 | ||
3562 | /* Copy the image chunk content. */ | |
3563 | memcpy(dest_image_ptr, data_ptr, chunk_size); | |
3564 | ||
3565 | status = lancer_cmd_write_object(adapter, &flash_cmd, | |
f67ef7ba PR |
3566 | chunk_size, offset, |
3567 | LANCER_FW_DOWNLOAD_LOCATION, | |
3568 | &data_written, &change_status, | |
3569 | &add_status); | |
485bf569 SN |
3570 | if (status) |
3571 | break; | |
3572 | ||
3573 | offset += data_written; | |
3574 | data_ptr += data_written; | |
3575 | image_size -= data_written; | |
3576 | } | |
3577 | ||
3578 | if (!status) { | |
3579 | /* Commit the FW written */ | |
3580 | status = lancer_cmd_write_object(adapter, &flash_cmd, | |
f67ef7ba PR |
3581 | 0, offset, |
3582 | LANCER_FW_DOWNLOAD_LOCATION, | |
3583 | &data_written, &change_status, | |
3584 | &add_status); | |
485bf569 SN |
3585 | } |
3586 | ||
3587 | dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va, | |
3588 | flash_cmd.dma); | |
3589 | if (status) { | |
3590 | dev_err(&adapter->pdev->dev, | |
3591 | "Firmware load error. " | |
3592 | "Status code: 0x%x Additional Status: 0x%x\n", | |
3593 | status, add_status); | |
3594 | goto lancer_fw_exit; | |
3595 | } | |
3596 | ||
f67ef7ba | 3597 | if (change_status == LANCER_FW_RESET_NEEDED) { |
5c510811 SK |
3598 | status = lancer_physdev_ctrl(adapter, |
3599 | PHYSDEV_CONTROL_FW_RESET_MASK); | |
f67ef7ba PR |
3600 | if (status) { |
3601 | dev_err(&adapter->pdev->dev, | |
3602 | "Adapter busy for FW reset.\n" | |
3603 | "New FW will not be active.\n"); | |
3604 | goto lancer_fw_exit; | |
3605 | } | |
3606 | } else if (change_status != LANCER_NO_RESET_NEEDED) { | |
3607 | dev_err(&adapter->pdev->dev, | |
3608 | "System reboot required for new FW" | |
3609 | " to be active\n"); | |
3610 | } | |
3611 | ||
485bf569 SN |
3612 | dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n"); |
3613 | lancer_fw_exit: | |
3614 | return status; | |
3615 | } | |
3616 | ||
ca34fe38 SP |
3617 | #define UFI_TYPE2 2 |
3618 | #define UFI_TYPE3 3 | |
0ad3157e | 3619 | #define UFI_TYPE3R 10 |
ca34fe38 SP |
3620 | #define UFI_TYPE4 4 |
3621 | static int be_get_ufi_type(struct be_adapter *adapter, | |
0ad3157e | 3622 | struct flash_file_hdr_g3 *fhdr) |
773a2d7c PR |
3623 | { |
3624 | if (fhdr == NULL) | |
3625 | goto be_get_ufi_exit; | |
3626 | ||
ca34fe38 SP |
3627 | if (skyhawk_chip(adapter) && fhdr->build[0] == '4') |
3628 | return UFI_TYPE4; | |
0ad3157e VV |
3629 | else if (BE3_chip(adapter) && fhdr->build[0] == '3') { |
3630 | if (fhdr->asic_type_rev == 0x10) | |
3631 | return UFI_TYPE3R; | |
3632 | else | |
3633 | return UFI_TYPE3; | |
3634 | } else if (BE2_chip(adapter) && fhdr->build[0] == '2') | |
ca34fe38 | 3635 | return UFI_TYPE2; |
773a2d7c PR |
3636 | |
3637 | be_get_ufi_exit: | |
3638 | dev_err(&adapter->pdev->dev, | |
3639 | "UFI and Interface are not compatible for flashing\n"); | |
3640 | return -1; | |
3641 | } | |
3642 | ||
485bf569 SN |
3643 | static int be_fw_download(struct be_adapter *adapter, const struct firmware* fw) |
3644 | { | |
485bf569 SN |
3645 | struct flash_file_hdr_g3 *fhdr3; |
3646 | struct image_hdr *img_hdr_ptr = NULL; | |
3647 | struct be_dma_mem flash_cmd; | |
3648 | const u8 *p; | |
773a2d7c | 3649 | int status = 0, i = 0, num_imgs = 0, ufi_type = 0; |
84517482 | 3650 | |
be716446 | 3651 | flash_cmd.size = sizeof(struct be_cmd_write_flashrom); |
2b7bcebf IV |
3652 | flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size, |
3653 | &flash_cmd.dma, GFP_KERNEL); | |
84517482 AK |
3654 | if (!flash_cmd.va) { |
3655 | status = -ENOMEM; | |
485bf569 | 3656 | goto be_fw_exit; |
84517482 AK |
3657 | } |
3658 | ||
773a2d7c | 3659 | p = fw->data; |
0ad3157e | 3660 | fhdr3 = (struct flash_file_hdr_g3 *)p; |
773a2d7c | 3661 | |
0ad3157e | 3662 | ufi_type = be_get_ufi_type(adapter, fhdr3); |
773a2d7c | 3663 | |
773a2d7c PR |
3664 | num_imgs = le32_to_cpu(fhdr3->num_imgs); |
3665 | for (i = 0; i < num_imgs; i++) { | |
3666 | img_hdr_ptr = (struct image_hdr *)(fw->data + | |
3667 | (sizeof(struct flash_file_hdr_g3) + | |
3668 | i * sizeof(struct image_hdr))); | |
3669 | if (le32_to_cpu(img_hdr_ptr->imageid) == 1) { | |
0ad3157e VV |
3670 | switch (ufi_type) { |
3671 | case UFI_TYPE4: | |
773a2d7c PR |
3672 | status = be_flash_skyhawk(adapter, fw, |
3673 | &flash_cmd, num_imgs); | |
0ad3157e VV |
3674 | break; |
3675 | case UFI_TYPE3R: | |
ca34fe38 SP |
3676 | status = be_flash_BEx(adapter, fw, &flash_cmd, |
3677 | num_imgs); | |
0ad3157e VV |
3678 | break; |
3679 | case UFI_TYPE3: | |
3680 | /* Do not flash this ufi on BE3-R cards */ | |
3681 | if (adapter->asic_rev < 0x10) | |
3682 | status = be_flash_BEx(adapter, fw, | |
3683 | &flash_cmd, | |
3684 | num_imgs); | |
3685 | else { | |
3686 | status = -1; | |
3687 | dev_err(&adapter->pdev->dev, | |
3688 | "Can't load BE3 UFI on BE3R\n"); | |
3689 | } | |
3690 | } | |
3f0d4560 | 3691 | } |
773a2d7c PR |
3692 | } |
3693 | ||
ca34fe38 SP |
3694 | if (ufi_type == UFI_TYPE2) |
3695 | status = be_flash_BEx(adapter, fw, &flash_cmd, 0); | |
773a2d7c | 3696 | else if (ufi_type == -1) |
3f0d4560 | 3697 | status = -1; |
84517482 | 3698 | |
2b7bcebf IV |
3699 | dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va, |
3700 | flash_cmd.dma); | |
84517482 AK |
3701 | if (status) { |
3702 | dev_err(&adapter->pdev->dev, "Firmware load error\n"); | |
485bf569 | 3703 | goto be_fw_exit; |
84517482 AK |
3704 | } |
3705 | ||
af901ca1 | 3706 | dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n"); |
84517482 | 3707 | |
485bf569 SN |
3708 | be_fw_exit: |
3709 | return status; | |
3710 | } | |
3711 | ||
3712 | int be_load_fw(struct be_adapter *adapter, u8 *fw_file) | |
3713 | { | |
3714 | const struct firmware *fw; | |
3715 | int status; | |
3716 | ||
3717 | if (!netif_running(adapter->netdev)) { | |
3718 | dev_err(&adapter->pdev->dev, | |
3719 | "Firmware load not allowed (interface is down)\n"); | |
3720 | return -1; | |
3721 | } | |
3722 | ||
3723 | status = request_firmware(&fw, fw_file, &adapter->pdev->dev); | |
3724 | if (status) | |
3725 | goto fw_exit; | |
3726 | ||
3727 | dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file); | |
3728 | ||
3729 | if (lancer_chip(adapter)) | |
3730 | status = lancer_fw_download(adapter, fw); | |
3731 | else | |
3732 | status = be_fw_download(adapter, fw); | |
3733 | ||
eeb65ced SK |
3734 | if (!status) |
3735 | be_cmd_get_fw_ver(adapter, adapter->fw_ver, | |
3736 | adapter->fw_on_flash); | |
3737 | ||
84517482 AK |
3738 | fw_exit: |
3739 | release_firmware(fw); | |
3740 | return status; | |
3741 | } | |
3742 | ||
e5686ad8 | 3743 | static const struct net_device_ops be_netdev_ops = { |
6b7c5b94 SP |
3744 | .ndo_open = be_open, |
3745 | .ndo_stop = be_close, | |
3746 | .ndo_start_xmit = be_xmit, | |
a54769f5 | 3747 | .ndo_set_rx_mode = be_set_rx_mode, |
6b7c5b94 SP |
3748 | .ndo_set_mac_address = be_mac_addr_set, |
3749 | .ndo_change_mtu = be_change_mtu, | |
ab1594e9 | 3750 | .ndo_get_stats64 = be_get_stats64, |
6b7c5b94 | 3751 | .ndo_validate_addr = eth_validate_addr, |
6b7c5b94 SP |
3752 | .ndo_vlan_rx_add_vid = be_vlan_add_vid, |
3753 | .ndo_vlan_rx_kill_vid = be_vlan_rem_vid, | |
64600ea5 | 3754 | .ndo_set_vf_mac = be_set_vf_mac, |
1da87b7f | 3755 | .ndo_set_vf_vlan = be_set_vf_vlan, |
e1d18735 | 3756 | .ndo_set_vf_tx_rate = be_set_vf_tx_rate, |
66268739 IV |
3757 | .ndo_get_vf_config = be_get_vf_config, |
3758 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
3759 | .ndo_poll_controller = be_netpoll, | |
3760 | #endif | |
6b7c5b94 SP |
3761 | }; |
3762 | ||
3763 | static void be_netdev_init(struct net_device *netdev) | |
3764 | { | |
3765 | struct be_adapter *adapter = netdev_priv(netdev); | |
10ef9ab4 | 3766 | struct be_eq_obj *eqo; |
3abcdeda | 3767 | int i; |
6b7c5b94 | 3768 | |
6332c8d3 | 3769 | netdev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | |
8b8ddc68 | 3770 | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | |
f646968f | 3771 | NETIF_F_HW_VLAN_CTAG_TX; |
8b8ddc68 MM |
3772 | if (be_multi_rxq(adapter)) |
3773 | netdev->hw_features |= NETIF_F_RXHASH; | |
6332c8d3 MM |
3774 | |
3775 | netdev->features |= netdev->hw_features | | |
f646968f | 3776 | NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER; |
4b972914 | 3777 | |
eb8a50d9 | 3778 | netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | |
79032644 | 3779 | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
51c59870 | 3780 | |
fbc13f01 AK |
3781 | netdev->priv_flags |= IFF_UNICAST_FLT; |
3782 | ||
6b7c5b94 SP |
3783 | netdev->flags |= IFF_MULTICAST; |
3784 | ||
b7e5887e | 3785 | netif_set_gso_max_size(netdev, 65535 - ETH_HLEN); |
c190e3c8 | 3786 | |
10ef9ab4 | 3787 | netdev->netdev_ops = &be_netdev_ops; |
6b7c5b94 SP |
3788 | |
3789 | SET_ETHTOOL_OPS(netdev, &be_ethtool_ops); | |
3790 | ||
10ef9ab4 SP |
3791 | for_all_evt_queues(adapter, eqo, i) |
3792 | netif_napi_add(netdev, &eqo->napi, be_poll, BE_NAPI_WEIGHT); | |
6b7c5b94 SP |
3793 | } |
3794 | ||
3795 | static void be_unmap_pci_bars(struct be_adapter *adapter) | |
3796 | { | |
c5b3ad4c SP |
3797 | if (adapter->csr) |
3798 | pci_iounmap(adapter->pdev, adapter->csr); | |
8788fdc2 | 3799 | if (adapter->db) |
ce66f781 | 3800 | pci_iounmap(adapter->pdev, adapter->db); |
045508a8 PP |
3801 | } |
3802 | ||
ce66f781 SP |
3803 | static int db_bar(struct be_adapter *adapter) |
3804 | { | |
3805 | if (lancer_chip(adapter) || !be_physfn(adapter)) | |
3806 | return 0; | |
3807 | else | |
3808 | return 4; | |
3809 | } | |
3810 | ||
3811 | static int be_roce_map_pci_bars(struct be_adapter *adapter) | |
045508a8 | 3812 | { |
dbf0f2a7 | 3813 | if (skyhawk_chip(adapter)) { |
ce66f781 SP |
3814 | adapter->roce_db.size = 4096; |
3815 | adapter->roce_db.io_addr = pci_resource_start(adapter->pdev, | |
3816 | db_bar(adapter)); | |
3817 | adapter->roce_db.total_size = pci_resource_len(adapter->pdev, | |
3818 | db_bar(adapter)); | |
3819 | } | |
045508a8 | 3820 | return 0; |
6b7c5b94 SP |
3821 | } |
3822 | ||
3823 | static int be_map_pci_bars(struct be_adapter *adapter) | |
3824 | { | |
3825 | u8 __iomem *addr; | |
ce66f781 | 3826 | u32 sli_intf; |
6b7c5b94 | 3827 | |
ce66f781 SP |
3828 | pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf); |
3829 | adapter->if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >> | |
3830 | SLI_INTF_IF_TYPE_SHIFT; | |
fe6d2a38 | 3831 | |
c5b3ad4c SP |
3832 | if (BEx_chip(adapter) && be_physfn(adapter)) { |
3833 | adapter->csr = pci_iomap(adapter->pdev, 2, 0); | |
3834 | if (adapter->csr == NULL) | |
3835 | return -ENOMEM; | |
3836 | } | |
3837 | ||
ce66f781 | 3838 | addr = pci_iomap(adapter->pdev, db_bar(adapter), 0); |
6b7c5b94 SP |
3839 | if (addr == NULL) |
3840 | goto pci_map_err; | |
ba343c77 | 3841 | adapter->db = addr; |
ce66f781 SP |
3842 | |
3843 | be_roce_map_pci_bars(adapter); | |
6b7c5b94 | 3844 | return 0; |
ce66f781 | 3845 | |
6b7c5b94 SP |
3846 | pci_map_err: |
3847 | be_unmap_pci_bars(adapter); | |
3848 | return -ENOMEM; | |
3849 | } | |
3850 | ||
6b7c5b94 SP |
3851 | static void be_ctrl_cleanup(struct be_adapter *adapter) |
3852 | { | |
8788fdc2 | 3853 | struct be_dma_mem *mem = &adapter->mbox_mem_alloced; |
6b7c5b94 SP |
3854 | |
3855 | be_unmap_pci_bars(adapter); | |
3856 | ||
3857 | if (mem->va) | |
2b7bcebf IV |
3858 | dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va, |
3859 | mem->dma); | |
e7b909a6 | 3860 | |
5b8821b7 | 3861 | mem = &adapter->rx_filter; |
e7b909a6 | 3862 | if (mem->va) |
2b7bcebf IV |
3863 | dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va, |
3864 | mem->dma); | |
6b7c5b94 SP |
3865 | } |
3866 | ||
6b7c5b94 SP |
3867 | static int be_ctrl_init(struct be_adapter *adapter) |
3868 | { | |
8788fdc2 SP |
3869 | struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced; |
3870 | struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem; | |
5b8821b7 | 3871 | struct be_dma_mem *rx_filter = &adapter->rx_filter; |
ce66f781 | 3872 | u32 sli_intf; |
6b7c5b94 | 3873 | int status; |
6b7c5b94 | 3874 | |
ce66f781 SP |
3875 | pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf); |
3876 | adapter->sli_family = (sli_intf & SLI_INTF_FAMILY_MASK) >> | |
3877 | SLI_INTF_FAMILY_SHIFT; | |
3878 | adapter->virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0; | |
3879 | ||
6b7c5b94 SP |
3880 | status = be_map_pci_bars(adapter); |
3881 | if (status) | |
e7b909a6 | 3882 | goto done; |
6b7c5b94 SP |
3883 | |
3884 | mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16; | |
2b7bcebf IV |
3885 | mbox_mem_alloc->va = dma_alloc_coherent(&adapter->pdev->dev, |
3886 | mbox_mem_alloc->size, | |
3887 | &mbox_mem_alloc->dma, | |
3888 | GFP_KERNEL); | |
6b7c5b94 | 3889 | if (!mbox_mem_alloc->va) { |
e7b909a6 SP |
3890 | status = -ENOMEM; |
3891 | goto unmap_pci_bars; | |
6b7c5b94 SP |
3892 | } |
3893 | mbox_mem_align->size = sizeof(struct be_mcc_mailbox); | |
3894 | mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16); | |
3895 | mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16); | |
3896 | memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox)); | |
e7b909a6 | 3897 | |
5b8821b7 SP |
3898 | rx_filter->size = sizeof(struct be_cmd_req_rx_filter); |
3899 | rx_filter->va = dma_alloc_coherent(&adapter->pdev->dev, rx_filter->size, | |
1f9061d2 JP |
3900 | &rx_filter->dma, |
3901 | GFP_KERNEL | __GFP_ZERO); | |
5b8821b7 | 3902 | if (rx_filter->va == NULL) { |
e7b909a6 SP |
3903 | status = -ENOMEM; |
3904 | goto free_mbox; | |
3905 | } | |
1f9061d2 | 3906 | |
2984961c | 3907 | mutex_init(&adapter->mbox_lock); |
8788fdc2 SP |
3908 | spin_lock_init(&adapter->mcc_lock); |
3909 | spin_lock_init(&adapter->mcc_cq_lock); | |
a8f447bd | 3910 | |
dd131e76 | 3911 | init_completion(&adapter->flash_compl); |
cf588477 | 3912 | pci_save_state(adapter->pdev); |
6b7c5b94 | 3913 | return 0; |
e7b909a6 SP |
3914 | |
3915 | free_mbox: | |
2b7bcebf IV |
3916 | dma_free_coherent(&adapter->pdev->dev, mbox_mem_alloc->size, |
3917 | mbox_mem_alloc->va, mbox_mem_alloc->dma); | |
e7b909a6 SP |
3918 | |
3919 | unmap_pci_bars: | |
3920 | be_unmap_pci_bars(adapter); | |
3921 | ||
3922 | done: | |
3923 | return status; | |
6b7c5b94 SP |
3924 | } |
3925 | ||
3926 | static void be_stats_cleanup(struct be_adapter *adapter) | |
3927 | { | |
3abcdeda | 3928 | struct be_dma_mem *cmd = &adapter->stats_cmd; |
6b7c5b94 SP |
3929 | |
3930 | if (cmd->va) | |
2b7bcebf IV |
3931 | dma_free_coherent(&adapter->pdev->dev, cmd->size, |
3932 | cmd->va, cmd->dma); | |
6b7c5b94 SP |
3933 | } |
3934 | ||
3935 | static int be_stats_init(struct be_adapter *adapter) | |
3936 | { | |
3abcdeda | 3937 | struct be_dma_mem *cmd = &adapter->stats_cmd; |
6b7c5b94 | 3938 | |
ca34fe38 SP |
3939 | if (lancer_chip(adapter)) |
3940 | cmd->size = sizeof(struct lancer_cmd_req_pport_stats); | |
3941 | else if (BE2_chip(adapter)) | |
89a88ab8 | 3942 | cmd->size = sizeof(struct be_cmd_req_get_stats_v0); |
ca34fe38 SP |
3943 | else |
3944 | /* BE3 and Skyhawk */ | |
3945 | cmd->size = sizeof(struct be_cmd_req_get_stats_v1); | |
3946 | ||
2b7bcebf | 3947 | cmd->va = dma_alloc_coherent(&adapter->pdev->dev, cmd->size, &cmd->dma, |
1f9061d2 | 3948 | GFP_KERNEL | __GFP_ZERO); |
6b7c5b94 SP |
3949 | if (cmd->va == NULL) |
3950 | return -1; | |
3951 | return 0; | |
3952 | } | |
3953 | ||
3bc6b06c | 3954 | static void be_remove(struct pci_dev *pdev) |
6b7c5b94 SP |
3955 | { |
3956 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
8d56ff11 | 3957 | |
6b7c5b94 SP |
3958 | if (!adapter) |
3959 | return; | |
3960 | ||
045508a8 | 3961 | be_roce_dev_remove(adapter); |
8cef7a78 | 3962 | be_intr_set(adapter, false); |
045508a8 | 3963 | |
f67ef7ba PR |
3964 | cancel_delayed_work_sync(&adapter->func_recovery_work); |
3965 | ||
6b7c5b94 SP |
3966 | unregister_netdev(adapter->netdev); |
3967 | ||
5fb379ee SP |
3968 | be_clear(adapter); |
3969 | ||
bf99e50d PR |
3970 | /* tell fw we're done with firing cmds */ |
3971 | be_cmd_fw_clean(adapter); | |
3972 | ||
6b7c5b94 SP |
3973 | be_stats_cleanup(adapter); |
3974 | ||
3975 | be_ctrl_cleanup(adapter); | |
3976 | ||
d6b6d987 SP |
3977 | pci_disable_pcie_error_reporting(pdev); |
3978 | ||
6b7c5b94 SP |
3979 | pci_set_drvdata(pdev, NULL); |
3980 | pci_release_regions(pdev); | |
3981 | pci_disable_device(pdev); | |
3982 | ||
3983 | free_netdev(adapter->netdev); | |
3984 | } | |
3985 | ||
4762f6ce AK |
3986 | bool be_is_wol_supported(struct be_adapter *adapter) |
3987 | { | |
3988 | return ((adapter->wol_cap & BE_WOL_CAP) && | |
3989 | !be_is_wol_excluded(adapter)) ? true : false; | |
3990 | } | |
3991 | ||
941a77d5 SK |
3992 | u32 be_get_fw_log_level(struct be_adapter *adapter) |
3993 | { | |
3994 | struct be_dma_mem extfat_cmd; | |
3995 | struct be_fat_conf_params *cfgs; | |
3996 | int status; | |
3997 | u32 level = 0; | |
3998 | int j; | |
3999 | ||
f25b119c PR |
4000 | if (lancer_chip(adapter)) |
4001 | return 0; | |
4002 | ||
941a77d5 SK |
4003 | memset(&extfat_cmd, 0, sizeof(struct be_dma_mem)); |
4004 | extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps); | |
4005 | extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size, | |
4006 | &extfat_cmd.dma); | |
4007 | ||
4008 | if (!extfat_cmd.va) { | |
4009 | dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n", | |
4010 | __func__); | |
4011 | goto err; | |
4012 | } | |
4013 | ||
4014 | status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd); | |
4015 | if (!status) { | |
4016 | cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + | |
4017 | sizeof(struct be_cmd_resp_hdr)); | |
ac46a462 | 4018 | for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { |
941a77d5 SK |
4019 | if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) |
4020 | level = cfgs->module[0].trace_lvl[j].dbg_lvl; | |
4021 | } | |
4022 | } | |
4023 | pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va, | |
4024 | extfat_cmd.dma); | |
4025 | err: | |
4026 | return level; | |
4027 | } | |
abb93951 | 4028 | |
39f1d94d | 4029 | static int be_get_initial_config(struct be_adapter *adapter) |
6b7c5b94 | 4030 | { |
6b7c5b94 | 4031 | int status; |
941a77d5 | 4032 | u32 level; |
6b7c5b94 | 4033 | |
9e1453c5 AK |
4034 | status = be_cmd_get_cntl_attributes(adapter); |
4035 | if (status) | |
4036 | return status; | |
4037 | ||
4762f6ce AK |
4038 | status = be_cmd_get_acpi_wol_cap(adapter); |
4039 | if (status) { | |
4040 | /* in case of a failure to get wol capabillities | |
4041 | * check the exclusion list to determine WOL capability */ | |
4042 | if (!be_is_wol_excluded(adapter)) | |
4043 | adapter->wol_cap |= BE_WOL_CAP; | |
4044 | } | |
4045 | ||
4046 | if (be_is_wol_supported(adapter)) | |
4047 | adapter->wol = true; | |
4048 | ||
7aeb2156 PR |
4049 | /* Must be a power of 2 or else MODULO will BUG_ON */ |
4050 | adapter->be_get_temp_freq = 64; | |
4051 | ||
941a77d5 SK |
4052 | level = be_get_fw_log_level(adapter); |
4053 | adapter->msg_enable = level <= FW_LOG_LEVEL_DEFAULT ? NETIF_MSG_HW : 0; | |
4054 | ||
2243e2e9 | 4055 | return 0; |
6b7c5b94 SP |
4056 | } |
4057 | ||
f67ef7ba | 4058 | static int lancer_recover_func(struct be_adapter *adapter) |
d8110f62 | 4059 | { |
01e5b2c4 | 4060 | struct device *dev = &adapter->pdev->dev; |
d8110f62 | 4061 | int status; |
d8110f62 | 4062 | |
f67ef7ba PR |
4063 | status = lancer_test_and_set_rdy_state(adapter); |
4064 | if (status) | |
4065 | goto err; | |
d8110f62 | 4066 | |
f67ef7ba PR |
4067 | if (netif_running(adapter->netdev)) |
4068 | be_close(adapter->netdev); | |
d8110f62 | 4069 | |
f67ef7ba PR |
4070 | be_clear(adapter); |
4071 | ||
01e5b2c4 | 4072 | be_clear_all_error(adapter); |
f67ef7ba PR |
4073 | |
4074 | status = be_setup(adapter); | |
4075 | if (status) | |
4076 | goto err; | |
d8110f62 | 4077 | |
f67ef7ba PR |
4078 | if (netif_running(adapter->netdev)) { |
4079 | status = be_open(adapter->netdev); | |
d8110f62 PR |
4080 | if (status) |
4081 | goto err; | |
f67ef7ba | 4082 | } |
d8110f62 | 4083 | |
01e5b2c4 | 4084 | dev_err(dev, "Error recovery successful\n"); |
f67ef7ba PR |
4085 | return 0; |
4086 | err: | |
01e5b2c4 SK |
4087 | if (status == -EAGAIN) |
4088 | dev_err(dev, "Waiting for resource provisioning\n"); | |
4089 | else | |
4090 | dev_err(dev, "Error recovery failed\n"); | |
d8110f62 | 4091 | |
f67ef7ba PR |
4092 | return status; |
4093 | } | |
4094 | ||
4095 | static void be_func_recovery_task(struct work_struct *work) | |
4096 | { | |
4097 | struct be_adapter *adapter = | |
4098 | container_of(work, struct be_adapter, func_recovery_work.work); | |
01e5b2c4 | 4099 | int status = 0; |
d8110f62 | 4100 | |
f67ef7ba | 4101 | be_detect_error(adapter); |
d8110f62 | 4102 | |
f67ef7ba | 4103 | if (adapter->hw_error && lancer_chip(adapter)) { |
d8110f62 | 4104 | |
f67ef7ba PR |
4105 | rtnl_lock(); |
4106 | netif_device_detach(adapter->netdev); | |
4107 | rtnl_unlock(); | |
d8110f62 | 4108 | |
f67ef7ba | 4109 | status = lancer_recover_func(adapter); |
f67ef7ba PR |
4110 | if (!status) |
4111 | netif_device_attach(adapter->netdev); | |
d8110f62 | 4112 | } |
f67ef7ba | 4113 | |
01e5b2c4 SK |
4114 | /* In Lancer, for all errors other than provisioning error (-EAGAIN), |
4115 | * no need to attempt further recovery. | |
4116 | */ | |
4117 | if (!status || status == -EAGAIN) | |
4118 | schedule_delayed_work(&adapter->func_recovery_work, | |
4119 | msecs_to_jiffies(1000)); | |
d8110f62 PR |
4120 | } |
4121 | ||
4122 | static void be_worker(struct work_struct *work) | |
4123 | { | |
4124 | struct be_adapter *adapter = | |
4125 | container_of(work, struct be_adapter, work.work); | |
4126 | struct be_rx_obj *rxo; | |
10ef9ab4 | 4127 | struct be_eq_obj *eqo; |
d8110f62 PR |
4128 | int i; |
4129 | ||
d8110f62 PR |
4130 | /* when interrupts are not yet enabled, just reap any pending |
4131 | * mcc completions */ | |
4132 | if (!netif_running(adapter->netdev)) { | |
072a9c48 | 4133 | local_bh_disable(); |
10ef9ab4 | 4134 | be_process_mcc(adapter); |
072a9c48 | 4135 | local_bh_enable(); |
d8110f62 PR |
4136 | goto reschedule; |
4137 | } | |
4138 | ||
4139 | if (!adapter->stats_cmd_sent) { | |
4140 | if (lancer_chip(adapter)) | |
4141 | lancer_cmd_get_pport_stats(adapter, | |
4142 | &adapter->stats_cmd); | |
4143 | else | |
4144 | be_cmd_get_stats(adapter, &adapter->stats_cmd); | |
4145 | } | |
4146 | ||
7aeb2156 PR |
4147 | if (MODULO(adapter->work_counter, adapter->be_get_temp_freq) == 0) |
4148 | be_cmd_get_die_temperature(adapter); | |
4149 | ||
d8110f62 | 4150 | for_all_rx_queues(adapter, rxo, i) { |
d8110f62 PR |
4151 | if (rxo->rx_post_starved) { |
4152 | rxo->rx_post_starved = false; | |
4153 | be_post_rx_frags(rxo, GFP_KERNEL); | |
4154 | } | |
4155 | } | |
4156 | ||
10ef9ab4 SP |
4157 | for_all_evt_queues(adapter, eqo, i) |
4158 | be_eqd_update(adapter, eqo); | |
4159 | ||
d8110f62 PR |
4160 | reschedule: |
4161 | adapter->work_counter++; | |
4162 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000)); | |
4163 | } | |
4164 | ||
257a3feb | 4165 | /* If any VFs are already enabled don't FLR the PF */ |
39f1d94d SP |
4166 | static bool be_reset_required(struct be_adapter *adapter) |
4167 | { | |
257a3feb | 4168 | return pci_num_vf(adapter->pdev) ? false : true; |
39f1d94d SP |
4169 | } |
4170 | ||
d379142b SP |
4171 | static char *mc_name(struct be_adapter *adapter) |
4172 | { | |
4173 | if (adapter->function_mode & FLEX10_MODE) | |
4174 | return "FLEX10"; | |
4175 | else if (adapter->function_mode & VNIC_MODE) | |
4176 | return "vNIC"; | |
4177 | else if (adapter->function_mode & UMC_ENABLED) | |
4178 | return "UMC"; | |
4179 | else | |
4180 | return ""; | |
4181 | } | |
4182 | ||
4183 | static inline char *func_name(struct be_adapter *adapter) | |
4184 | { | |
4185 | return be_physfn(adapter) ? "PF" : "VF"; | |
4186 | } | |
4187 | ||
1dd06ae8 | 4188 | static int be_probe(struct pci_dev *pdev, const struct pci_device_id *pdev_id) |
6b7c5b94 SP |
4189 | { |
4190 | int status = 0; | |
4191 | struct be_adapter *adapter; | |
4192 | struct net_device *netdev; | |
b4e32a71 | 4193 | char port_name; |
6b7c5b94 SP |
4194 | |
4195 | status = pci_enable_device(pdev); | |
4196 | if (status) | |
4197 | goto do_none; | |
4198 | ||
4199 | status = pci_request_regions(pdev, DRV_NAME); | |
4200 | if (status) | |
4201 | goto disable_dev; | |
4202 | pci_set_master(pdev); | |
4203 | ||
7f640062 | 4204 | netdev = alloc_etherdev_mqs(sizeof(*adapter), MAX_TX_QS, MAX_RX_QS); |
6b7c5b94 SP |
4205 | if (netdev == NULL) { |
4206 | status = -ENOMEM; | |
4207 | goto rel_reg; | |
4208 | } | |
4209 | adapter = netdev_priv(netdev); | |
4210 | adapter->pdev = pdev; | |
4211 | pci_set_drvdata(pdev, adapter); | |
4212 | adapter->netdev = netdev; | |
2243e2e9 | 4213 | SET_NETDEV_DEV(netdev, &pdev->dev); |
6b7c5b94 | 4214 | |
2b7bcebf | 4215 | status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); |
6b7c5b94 | 4216 | if (!status) { |
2bd92cd2 CH |
4217 | status = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); |
4218 | if (status < 0) { | |
4219 | dev_err(&pdev->dev, "dma_set_coherent_mask failed\n"); | |
4220 | goto free_netdev; | |
4221 | } | |
6b7c5b94 SP |
4222 | netdev->features |= NETIF_F_HIGHDMA; |
4223 | } else { | |
2b7bcebf | 4224 | status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); |
0c5fed09 SK |
4225 | if (!status) |
4226 | status = dma_set_coherent_mask(&pdev->dev, | |
4227 | DMA_BIT_MASK(32)); | |
6b7c5b94 SP |
4228 | if (status) { |
4229 | dev_err(&pdev->dev, "Could not set PCI DMA Mask\n"); | |
4230 | goto free_netdev; | |
4231 | } | |
4232 | } | |
4233 | ||
d6b6d987 SP |
4234 | status = pci_enable_pcie_error_reporting(pdev); |
4235 | if (status) | |
4ce1fd61 | 4236 | dev_info(&pdev->dev, "Could not use PCIe error reporting\n"); |
d6b6d987 | 4237 | |
6b7c5b94 SP |
4238 | status = be_ctrl_init(adapter); |
4239 | if (status) | |
39f1d94d | 4240 | goto free_netdev; |
6b7c5b94 | 4241 | |
2243e2e9 | 4242 | /* sync up with fw's ready state */ |
ba343c77 | 4243 | if (be_physfn(adapter)) { |
bf99e50d | 4244 | status = be_fw_wait_ready(adapter); |
ba343c77 SB |
4245 | if (status) |
4246 | goto ctrl_clean; | |
ba343c77 | 4247 | } |
6b7c5b94 | 4248 | |
39f1d94d SP |
4249 | if (be_reset_required(adapter)) { |
4250 | status = be_cmd_reset_function(adapter); | |
4251 | if (status) | |
4252 | goto ctrl_clean; | |
556ae191 | 4253 | |
2d177be8 KA |
4254 | /* Wait for interrupts to quiesce after an FLR */ |
4255 | msleep(100); | |
4256 | } | |
8cef7a78 SK |
4257 | |
4258 | /* Allow interrupts for other ULPs running on NIC function */ | |
4259 | be_intr_set(adapter, true); | |
10ef9ab4 | 4260 | |
2d177be8 KA |
4261 | /* tell fw we're ready to fire cmds */ |
4262 | status = be_cmd_fw_init(adapter); | |
4263 | if (status) | |
4264 | goto ctrl_clean; | |
4265 | ||
2243e2e9 SP |
4266 | status = be_stats_init(adapter); |
4267 | if (status) | |
4268 | goto ctrl_clean; | |
4269 | ||
39f1d94d | 4270 | status = be_get_initial_config(adapter); |
6b7c5b94 SP |
4271 | if (status) |
4272 | goto stats_clean; | |
6b7c5b94 SP |
4273 | |
4274 | INIT_DELAYED_WORK(&adapter->work, be_worker); | |
f67ef7ba | 4275 | INIT_DELAYED_WORK(&adapter->func_recovery_work, be_func_recovery_task); |
a54769f5 | 4276 | adapter->rx_fc = adapter->tx_fc = true; |
6b7c5b94 | 4277 | |
5fb379ee SP |
4278 | status = be_setup(adapter); |
4279 | if (status) | |
55f5c3c5 | 4280 | goto stats_clean; |
2243e2e9 | 4281 | |
3abcdeda | 4282 | be_netdev_init(netdev); |
6b7c5b94 SP |
4283 | status = register_netdev(netdev); |
4284 | if (status != 0) | |
5fb379ee | 4285 | goto unsetup; |
6b7c5b94 | 4286 | |
045508a8 PP |
4287 | be_roce_dev_add(adapter); |
4288 | ||
f67ef7ba PR |
4289 | schedule_delayed_work(&adapter->func_recovery_work, |
4290 | msecs_to_jiffies(1000)); | |
b4e32a71 PR |
4291 | |
4292 | be_cmd_query_port_name(adapter, &port_name); | |
4293 | ||
d379142b SP |
4294 | dev_info(&pdev->dev, "%s: %s %s port %c\n", nic_name(pdev), |
4295 | func_name(adapter), mc_name(adapter), port_name); | |
34b1ef04 | 4296 | |
6b7c5b94 SP |
4297 | return 0; |
4298 | ||
5fb379ee SP |
4299 | unsetup: |
4300 | be_clear(adapter); | |
6b7c5b94 SP |
4301 | stats_clean: |
4302 | be_stats_cleanup(adapter); | |
4303 | ctrl_clean: | |
4304 | be_ctrl_cleanup(adapter); | |
f9449ab7 | 4305 | free_netdev: |
fe6d2a38 | 4306 | free_netdev(netdev); |
8d56ff11 | 4307 | pci_set_drvdata(pdev, NULL); |
6b7c5b94 SP |
4308 | rel_reg: |
4309 | pci_release_regions(pdev); | |
4310 | disable_dev: | |
4311 | pci_disable_device(pdev); | |
4312 | do_none: | |
c4ca2374 | 4313 | dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev)); |
6b7c5b94 SP |
4314 | return status; |
4315 | } | |
4316 | ||
4317 | static int be_suspend(struct pci_dev *pdev, pm_message_t state) | |
4318 | { | |
4319 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
4320 | struct net_device *netdev = adapter->netdev; | |
4321 | ||
71d8d1b5 AK |
4322 | if (adapter->wol) |
4323 | be_setup_wol(adapter, true); | |
4324 | ||
f67ef7ba PR |
4325 | cancel_delayed_work_sync(&adapter->func_recovery_work); |
4326 | ||
6b7c5b94 SP |
4327 | netif_device_detach(netdev); |
4328 | if (netif_running(netdev)) { | |
4329 | rtnl_lock(); | |
4330 | be_close(netdev); | |
4331 | rtnl_unlock(); | |
4332 | } | |
9b0365f1 | 4333 | be_clear(adapter); |
6b7c5b94 SP |
4334 | |
4335 | pci_save_state(pdev); | |
4336 | pci_disable_device(pdev); | |
4337 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
4338 | return 0; | |
4339 | } | |
4340 | ||
4341 | static int be_resume(struct pci_dev *pdev) | |
4342 | { | |
4343 | int status = 0; | |
4344 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
4345 | struct net_device *netdev = adapter->netdev; | |
4346 | ||
4347 | netif_device_detach(netdev); | |
4348 | ||
4349 | status = pci_enable_device(pdev); | |
4350 | if (status) | |
4351 | return status; | |
4352 | ||
1ca01512 | 4353 | pci_set_power_state(pdev, PCI_D0); |
6b7c5b94 SP |
4354 | pci_restore_state(pdev); |
4355 | ||
2243e2e9 SP |
4356 | /* tell fw we're ready to fire cmds */ |
4357 | status = be_cmd_fw_init(adapter); | |
4358 | if (status) | |
4359 | return status; | |
4360 | ||
9b0365f1 | 4361 | be_setup(adapter); |
6b7c5b94 SP |
4362 | if (netif_running(netdev)) { |
4363 | rtnl_lock(); | |
4364 | be_open(netdev); | |
4365 | rtnl_unlock(); | |
4366 | } | |
f67ef7ba PR |
4367 | |
4368 | schedule_delayed_work(&adapter->func_recovery_work, | |
4369 | msecs_to_jiffies(1000)); | |
6b7c5b94 | 4370 | netif_device_attach(netdev); |
71d8d1b5 AK |
4371 | |
4372 | if (adapter->wol) | |
4373 | be_setup_wol(adapter, false); | |
a4ca055f | 4374 | |
6b7c5b94 SP |
4375 | return 0; |
4376 | } | |
4377 | ||
82456b03 SP |
4378 | /* |
4379 | * An FLR will stop BE from DMAing any data. | |
4380 | */ | |
4381 | static void be_shutdown(struct pci_dev *pdev) | |
4382 | { | |
4383 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
82456b03 | 4384 | |
2d5d4154 AK |
4385 | if (!adapter) |
4386 | return; | |
82456b03 | 4387 | |
0f4a6828 | 4388 | cancel_delayed_work_sync(&adapter->work); |
f67ef7ba | 4389 | cancel_delayed_work_sync(&adapter->func_recovery_work); |
a4ca055f | 4390 | |
2d5d4154 | 4391 | netif_device_detach(adapter->netdev); |
82456b03 | 4392 | |
57841869 AK |
4393 | be_cmd_reset_function(adapter); |
4394 | ||
82456b03 | 4395 | pci_disable_device(pdev); |
82456b03 SP |
4396 | } |
4397 | ||
cf588477 SP |
4398 | static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev, |
4399 | pci_channel_state_t state) | |
4400 | { | |
4401 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
4402 | struct net_device *netdev = adapter->netdev; | |
4403 | ||
4404 | dev_err(&adapter->pdev->dev, "EEH error detected\n"); | |
4405 | ||
01e5b2c4 SK |
4406 | if (!adapter->eeh_error) { |
4407 | adapter->eeh_error = true; | |
cf588477 | 4408 | |
01e5b2c4 | 4409 | cancel_delayed_work_sync(&adapter->func_recovery_work); |
cf588477 | 4410 | |
cf588477 | 4411 | rtnl_lock(); |
01e5b2c4 SK |
4412 | netif_device_detach(netdev); |
4413 | if (netif_running(netdev)) | |
4414 | be_close(netdev); | |
cf588477 | 4415 | rtnl_unlock(); |
01e5b2c4 SK |
4416 | |
4417 | be_clear(adapter); | |
cf588477 | 4418 | } |
cf588477 SP |
4419 | |
4420 | if (state == pci_channel_io_perm_failure) | |
4421 | return PCI_ERS_RESULT_DISCONNECT; | |
4422 | ||
4423 | pci_disable_device(pdev); | |
4424 | ||
eeb7fc7b SK |
4425 | /* The error could cause the FW to trigger a flash debug dump. |
4426 | * Resetting the card while flash dump is in progress | |
c8a54163 PR |
4427 | * can cause it not to recover; wait for it to finish. |
4428 | * Wait only for first function as it is needed only once per | |
4429 | * adapter. | |
eeb7fc7b | 4430 | */ |
c8a54163 PR |
4431 | if (pdev->devfn == 0) |
4432 | ssleep(30); | |
4433 | ||
cf588477 SP |
4434 | return PCI_ERS_RESULT_NEED_RESET; |
4435 | } | |
4436 | ||
4437 | static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev) | |
4438 | { | |
4439 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
4440 | int status; | |
4441 | ||
4442 | dev_info(&adapter->pdev->dev, "EEH reset\n"); | |
cf588477 SP |
4443 | |
4444 | status = pci_enable_device(pdev); | |
4445 | if (status) | |
4446 | return PCI_ERS_RESULT_DISCONNECT; | |
4447 | ||
4448 | pci_set_master(pdev); | |
1ca01512 | 4449 | pci_set_power_state(pdev, PCI_D0); |
cf588477 SP |
4450 | pci_restore_state(pdev); |
4451 | ||
4452 | /* Check if card is ok and fw is ready */ | |
c5b3ad4c SP |
4453 | dev_info(&adapter->pdev->dev, |
4454 | "Waiting for FW to be ready after EEH reset\n"); | |
bf99e50d | 4455 | status = be_fw_wait_ready(adapter); |
cf588477 SP |
4456 | if (status) |
4457 | return PCI_ERS_RESULT_DISCONNECT; | |
4458 | ||
d6b6d987 | 4459 | pci_cleanup_aer_uncorrect_error_status(pdev); |
01e5b2c4 | 4460 | be_clear_all_error(adapter); |
cf588477 SP |
4461 | return PCI_ERS_RESULT_RECOVERED; |
4462 | } | |
4463 | ||
4464 | static void be_eeh_resume(struct pci_dev *pdev) | |
4465 | { | |
4466 | int status = 0; | |
4467 | struct be_adapter *adapter = pci_get_drvdata(pdev); | |
4468 | struct net_device *netdev = adapter->netdev; | |
4469 | ||
4470 | dev_info(&adapter->pdev->dev, "EEH resume\n"); | |
4471 | ||
4472 | pci_save_state(pdev); | |
4473 | ||
2d177be8 | 4474 | status = be_cmd_reset_function(adapter); |
cf588477 SP |
4475 | if (status) |
4476 | goto err; | |
4477 | ||
2d177be8 KA |
4478 | /* tell fw we're ready to fire cmds */ |
4479 | status = be_cmd_fw_init(adapter); | |
bf99e50d PR |
4480 | if (status) |
4481 | goto err; | |
4482 | ||
cf588477 SP |
4483 | status = be_setup(adapter); |
4484 | if (status) | |
4485 | goto err; | |
4486 | ||
4487 | if (netif_running(netdev)) { | |
4488 | status = be_open(netdev); | |
4489 | if (status) | |
4490 | goto err; | |
4491 | } | |
f67ef7ba PR |
4492 | |
4493 | schedule_delayed_work(&adapter->func_recovery_work, | |
4494 | msecs_to_jiffies(1000)); | |
cf588477 SP |
4495 | netif_device_attach(netdev); |
4496 | return; | |
4497 | err: | |
4498 | dev_err(&adapter->pdev->dev, "EEH resume failed\n"); | |
cf588477 SP |
4499 | } |
4500 | ||
3646f0e5 | 4501 | static const struct pci_error_handlers be_eeh_handlers = { |
cf588477 SP |
4502 | .error_detected = be_eeh_err_detected, |
4503 | .slot_reset = be_eeh_reset, | |
4504 | .resume = be_eeh_resume, | |
4505 | }; | |
4506 | ||
6b7c5b94 SP |
4507 | static struct pci_driver be_driver = { |
4508 | .name = DRV_NAME, | |
4509 | .id_table = be_dev_ids, | |
4510 | .probe = be_probe, | |
4511 | .remove = be_remove, | |
4512 | .suspend = be_suspend, | |
cf588477 | 4513 | .resume = be_resume, |
82456b03 | 4514 | .shutdown = be_shutdown, |
cf588477 | 4515 | .err_handler = &be_eeh_handlers |
6b7c5b94 SP |
4516 | }; |
4517 | ||
4518 | static int __init be_init_module(void) | |
4519 | { | |
8e95a202 JP |
4520 | if (rx_frag_size != 8192 && rx_frag_size != 4096 && |
4521 | rx_frag_size != 2048) { | |
6b7c5b94 SP |
4522 | printk(KERN_WARNING DRV_NAME |
4523 | " : Module param rx_frag_size must be 2048/4096/8192." | |
4524 | " Using 2048\n"); | |
4525 | rx_frag_size = 2048; | |
4526 | } | |
6b7c5b94 SP |
4527 | |
4528 | return pci_register_driver(&be_driver); | |
4529 | } | |
4530 | module_init(be_init_module); | |
4531 | ||
4532 | static void __exit be_exit_module(void) | |
4533 | { | |
4534 | pci_unregister_driver(&be_driver); | |
4535 | } | |
4536 | module_exit(be_exit_module); |