Commit | Line | Data |
---|---|---|
5d031e9e DP |
1 | /* |
2 | * Driver for the MPC5200 Fast Ethernet Controller | |
3 | * | |
4 | * Originally written by Dale Farnsworth <dfarnsworth@mvista.com> and | |
5 | * now maintained by Sylvain Munaut <tnt@246tNt.com> | |
6 | * | |
7 | * Copyright (C) 2007 Domen Puncer, Telargo, Inc. | |
8 | * Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com> | |
9 | * Copyright (C) 2003-2004 MontaVista, Software, Inc. | |
10 | * | |
11 | * This file is licensed under the terms of the GNU General Public License | |
12 | * version 2. This program is licensed "as is" without any warranty of any | |
13 | * kind, whether express or implied. | |
14 | * | |
15 | */ | |
16 | ||
31b7720c JP |
17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
18 | ||
b7f080cf | 19 | #include <linux/dma-mapping.h> |
5d031e9e DP |
20 | #include <linux/module.h> |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/types.h> | |
24 | #include <linux/spinlock.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
5d031e9e DP |
26 | #include <linux/errno.h> |
27 | #include <linux/init.h> | |
a6b7a407 | 28 | #include <linux/interrupt.h> |
5d031e9e DP |
29 | #include <linux/crc32.h> |
30 | #include <linux/hardirq.h> | |
31 | #include <linux/delay.h> | |
32 | #include <linux/of_device.h> | |
ca816d98 | 33 | #include <linux/of_mdio.h> |
db98f081 | 34 | #include <linux/of_net.h> |
5d031e9e DP |
35 | #include <linux/of_platform.h> |
36 | ||
37 | #include <linux/netdevice.h> | |
38 | #include <linux/etherdevice.h> | |
39 | #include <linux/ethtool.h> | |
40 | #include <linux/skbuff.h> | |
41 | ||
42 | #include <asm/io.h> | |
43 | #include <asm/delay.h> | |
44 | #include <asm/mpc52xx.h> | |
45 | ||
9a322993 PDM |
46 | #include <linux/fsl/bestcomm/bestcomm.h> |
47 | #include <linux/fsl/bestcomm/fec.h> | |
5d031e9e DP |
48 | |
49 | #include "fec_mpc52xx.h" | |
50 | ||
51 | #define DRIVER_NAME "mpc52xx-fec" | |
52 | ||
80791be1 GL |
53 | /* Private driver data structure */ |
54 | struct mpc52xx_fec_priv { | |
ca816d98 | 55 | struct net_device *ndev; |
80791be1 GL |
56 | int duplex; |
57 | int speed; | |
58 | int r_irq; | |
59 | int t_irq; | |
60 | struct mpc52xx_fec __iomem *fec; | |
61 | struct bcom_task *rx_dmatsk; | |
62 | struct bcom_task *tx_dmatsk; | |
63 | spinlock_t lock; | |
64 | int msg_enable; | |
65 | ||
66 | /* MDIO link details */ | |
ca816d98 GL |
67 | unsigned int mdio_speed; |
68 | struct device_node *phy_node; | |
80791be1 GL |
69 | struct phy_device *phydev; |
70 | enum phy_state link; | |
ca816d98 | 71 | int seven_wire_mode; |
80791be1 GL |
72 | }; |
73 | ||
74 | ||
5d031e9e DP |
75 | static irqreturn_t mpc52xx_fec_interrupt(int, void *); |
76 | static irqreturn_t mpc52xx_fec_rx_interrupt(int, void *); | |
77 | static irqreturn_t mpc52xx_fec_tx_interrupt(int, void *); | |
78 | static void mpc52xx_fec_stop(struct net_device *dev); | |
79 | static void mpc52xx_fec_start(struct net_device *dev); | |
80 | static void mpc52xx_fec_reset(struct net_device *dev); | |
81 | ||
5d031e9e | 82 | #define MPC52xx_MESSAGES_DEFAULT ( NETIF_MSG_DRV | NETIF_MSG_PROBE | \ |
8b983510 | 83 | NETIF_MSG_LINK | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP) |
5d031e9e DP |
84 | static int debug = -1; /* the above default */ |
85 | module_param(debug, int, 0); | |
86 | MODULE_PARM_DESC(debug, "debugging messages level"); | |
87 | ||
88 | static void mpc52xx_fec_tx_timeout(struct net_device *dev) | |
89 | { | |
1e4e0767 AL |
90 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); |
91 | unsigned long flags; | |
92 | ||
5d031e9e DP |
93 | dev_warn(&dev->dev, "transmit timed out\n"); |
94 | ||
1e4e0767 | 95 | spin_lock_irqsave(&priv->lock, flags); |
5d031e9e | 96 | mpc52xx_fec_reset(dev); |
5d031e9e | 97 | dev->stats.tx_errors++; |
1e4e0767 | 98 | spin_unlock_irqrestore(&priv->lock, flags); |
5d031e9e DP |
99 | |
100 | netif_wake_queue(dev); | |
101 | } | |
102 | ||
103 | static void mpc52xx_fec_set_paddr(struct net_device *dev, u8 *mac) | |
104 | { | |
105 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
106 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
107 | ||
108 | out_be32(&fec->paddr1, *(u32 *)(&mac[0])); | |
109 | out_be32(&fec->paddr2, (*(u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE); | |
110 | } | |
111 | ||
5d031e9e DP |
112 | static int mpc52xx_fec_set_mac_address(struct net_device *dev, void *addr) |
113 | { | |
114 | struct sockaddr *sock = addr; | |
115 | ||
116 | memcpy(dev->dev_addr, sock->sa_data, dev->addr_len); | |
117 | ||
118 | mpc52xx_fec_set_paddr(dev, sock->sa_data); | |
119 | return 0; | |
120 | } | |
121 | ||
122 | static void mpc52xx_fec_free_rx_buffers(struct net_device *dev, struct bcom_task *s) | |
123 | { | |
124 | while (!bcom_queue_empty(s)) { | |
125 | struct bcom_fec_bd *bd; | |
126 | struct sk_buff *skb; | |
127 | ||
128 | skb = bcom_retrieve_buffer(s, NULL, (struct bcom_bd **)&bd); | |
461cadbc GL |
129 | dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len, |
130 | DMA_FROM_DEVICE); | |
5d031e9e DP |
131 | kfree_skb(skb); |
132 | } | |
133 | } | |
134 | ||
1e4e0767 AL |
135 | static void |
136 | mpc52xx_fec_rx_submit(struct net_device *dev, struct sk_buff *rskb) | |
137 | { | |
138 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
139 | struct bcom_fec_bd *bd; | |
140 | ||
141 | bd = (struct bcom_fec_bd *) bcom_prepare_next_buffer(priv->rx_dmatsk); | |
142 | bd->status = FEC_RX_BUFFER_SIZE; | |
143 | bd->skb_pa = dma_map_single(dev->dev.parent, rskb->data, | |
144 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); | |
145 | bcom_submit_next_buffer(priv->rx_dmatsk, rskb); | |
146 | } | |
147 | ||
5d031e9e DP |
148 | static int mpc52xx_fec_alloc_rx_buffers(struct net_device *dev, struct bcom_task *rxtsk) |
149 | { | |
1e4e0767 | 150 | struct sk_buff *skb; |
5d031e9e | 151 | |
1e4e0767 | 152 | while (!bcom_queue_full(rxtsk)) { |
21a4e469 | 153 | skb = netdev_alloc_skb(dev, FEC_RX_BUFFER_SIZE); |
1e4e0767 | 154 | if (!skb) |
5d031e9e DP |
155 | return -EAGAIN; |
156 | ||
157 | /* zero out the initial receive buffers to aid debugging */ | |
158 | memset(skb->data, 0, FEC_RX_BUFFER_SIZE); | |
1e4e0767 | 159 | mpc52xx_fec_rx_submit(dev, skb); |
5d031e9e | 160 | } |
5d031e9e DP |
161 | return 0; |
162 | } | |
163 | ||
164 | /* based on generic_adjust_link from fs_enet-main.c */ | |
165 | static void mpc52xx_fec_adjust_link(struct net_device *dev) | |
166 | { | |
167 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
168 | struct phy_device *phydev = priv->phydev; | |
169 | int new_state = 0; | |
170 | ||
171 | if (phydev->link != PHY_DOWN) { | |
172 | if (phydev->duplex != priv->duplex) { | |
173 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
174 | u32 rcntrl; | |
175 | u32 tcntrl; | |
176 | ||
177 | new_state = 1; | |
178 | priv->duplex = phydev->duplex; | |
179 | ||
180 | rcntrl = in_be32(&fec->r_cntrl); | |
181 | tcntrl = in_be32(&fec->x_cntrl); | |
182 | ||
183 | rcntrl &= ~FEC_RCNTRL_DRT; | |
184 | tcntrl &= ~FEC_TCNTRL_FDEN; | |
185 | if (phydev->duplex == DUPLEX_FULL) | |
186 | tcntrl |= FEC_TCNTRL_FDEN; /* FD enable */ | |
187 | else | |
188 | rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */ | |
189 | ||
190 | out_be32(&fec->r_cntrl, rcntrl); | |
191 | out_be32(&fec->x_cntrl, tcntrl); | |
192 | } | |
193 | ||
194 | if (phydev->speed != priv->speed) { | |
195 | new_state = 1; | |
196 | priv->speed = phydev->speed; | |
197 | } | |
198 | ||
199 | if (priv->link == PHY_DOWN) { | |
200 | new_state = 1; | |
201 | priv->link = phydev->link; | |
5d031e9e DP |
202 | } |
203 | ||
204 | } else if (priv->link) { | |
205 | new_state = 1; | |
206 | priv->link = PHY_DOWN; | |
207 | priv->speed = 0; | |
208 | priv->duplex = -1; | |
5d031e9e DP |
209 | } |
210 | ||
211 | if (new_state && netif_msg_link(priv)) | |
212 | phy_print_status(phydev); | |
213 | } | |
214 | ||
5d031e9e DP |
215 | static int mpc52xx_fec_open(struct net_device *dev) |
216 | { | |
217 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
218 | int err = -EBUSY; | |
219 | ||
ca816d98 GL |
220 | if (priv->phy_node) { |
221 | priv->phydev = of_phy_connect(priv->ndev, priv->phy_node, | |
222 | mpc52xx_fec_adjust_link, 0, 0); | |
223 | if (!priv->phydev) { | |
224 | dev_err(&dev->dev, "of_phy_connect failed\n"); | |
225 | return -ENODEV; | |
226 | } | |
227 | phy_start(priv->phydev); | |
228 | } | |
229 | ||
a0607fd3 | 230 | if (request_irq(dev->irq, mpc52xx_fec_interrupt, IRQF_SHARED, |
5d031e9e DP |
231 | DRIVER_NAME "_ctrl", dev)) { |
232 | dev_err(&dev->dev, "ctrl interrupt request failed\n"); | |
ca816d98 | 233 | goto free_phy; |
5d031e9e | 234 | } |
a0607fd3 | 235 | if (request_irq(priv->r_irq, mpc52xx_fec_rx_interrupt, 0, |
5d031e9e DP |
236 | DRIVER_NAME "_rx", dev)) { |
237 | dev_err(&dev->dev, "rx interrupt request failed\n"); | |
238 | goto free_ctrl_irq; | |
239 | } | |
a0607fd3 | 240 | if (request_irq(priv->t_irq, mpc52xx_fec_tx_interrupt, 0, |
5d031e9e DP |
241 | DRIVER_NAME "_tx", dev)) { |
242 | dev_err(&dev->dev, "tx interrupt request failed\n"); | |
243 | goto free_2irqs; | |
244 | } | |
245 | ||
246 | bcom_fec_rx_reset(priv->rx_dmatsk); | |
247 | bcom_fec_tx_reset(priv->tx_dmatsk); | |
248 | ||
249 | err = mpc52xx_fec_alloc_rx_buffers(dev, priv->rx_dmatsk); | |
250 | if (err) { | |
251 | dev_err(&dev->dev, "mpc52xx_fec_alloc_rx_buffers failed\n"); | |
252 | goto free_irqs; | |
253 | } | |
254 | ||
5d031e9e DP |
255 | bcom_enable(priv->rx_dmatsk); |
256 | bcom_enable(priv->tx_dmatsk); | |
257 | ||
258 | mpc52xx_fec_start(dev); | |
259 | ||
260 | netif_start_queue(dev); | |
261 | ||
262 | return 0; | |
263 | ||
5d031e9e DP |
264 | free_irqs: |
265 | free_irq(priv->t_irq, dev); | |
266 | free_2irqs: | |
267 | free_irq(priv->r_irq, dev); | |
268 | free_ctrl_irq: | |
269 | free_irq(dev->irq, dev); | |
ca816d98 GL |
270 | free_phy: |
271 | if (priv->phydev) { | |
272 | phy_stop(priv->phydev); | |
273 | phy_disconnect(priv->phydev); | |
274 | priv->phydev = NULL; | |
275 | } | |
5d031e9e DP |
276 | |
277 | return err; | |
278 | } | |
279 | ||
280 | static int mpc52xx_fec_close(struct net_device *dev) | |
281 | { | |
282 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
283 | ||
284 | netif_stop_queue(dev); | |
285 | ||
286 | mpc52xx_fec_stop(dev); | |
287 | ||
288 | mpc52xx_fec_free_rx_buffers(dev, priv->rx_dmatsk); | |
289 | ||
290 | free_irq(dev->irq, dev); | |
291 | free_irq(priv->r_irq, dev); | |
292 | free_irq(priv->t_irq, dev); | |
293 | ||
ca816d98 GL |
294 | if (priv->phydev) { |
295 | /* power down phy */ | |
296 | phy_stop(priv->phydev); | |
297 | phy_disconnect(priv->phydev); | |
298 | priv->phydev = NULL; | |
299 | } | |
5d031e9e DP |
300 | |
301 | return 0; | |
302 | } | |
303 | ||
304 | /* This will only be invoked if your driver is _not_ in XOFF state. | |
305 | * What this means is that you need not check it, and that this | |
306 | * invariant will hold if you make sure that the netif_*_queue() | |
307 | * calls are done at the proper times. | |
308 | */ | |
d360009c | 309 | static int mpc52xx_fec_start_xmit(struct sk_buff *skb, struct net_device *dev) |
5d031e9e DP |
310 | { |
311 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
312 | struct bcom_fec_bd *bd; | |
4871953c | 313 | unsigned long flags; |
5d031e9e DP |
314 | |
315 | if (bcom_queue_full(priv->tx_dmatsk)) { | |
316 | if (net_ratelimit()) | |
317 | dev_err(&dev->dev, "transmit queue overrun\n"); | |
d360009c | 318 | return NETDEV_TX_BUSY; |
5d031e9e DP |
319 | } |
320 | ||
4871953c | 321 | spin_lock_irqsave(&priv->lock, flags); |
5d031e9e DP |
322 | |
323 | bd = (struct bcom_fec_bd *) | |
324 | bcom_prepare_next_buffer(priv->tx_dmatsk); | |
325 | ||
326 | bd->status = skb->len | BCOM_FEC_TX_BD_TFD | BCOM_FEC_TX_BD_TC; | |
461cadbc GL |
327 | bd->skb_pa = dma_map_single(dev->dev.parent, skb->data, skb->len, |
328 | DMA_TO_DEVICE); | |
5d031e9e | 329 | |
d6cf0732 | 330 | skb_tx_timestamp(skb); |
5d031e9e | 331 | bcom_submit_next_buffer(priv->tx_dmatsk, skb); |
1e4e0767 | 332 | spin_unlock_irqrestore(&priv->lock, flags); |
5d031e9e DP |
333 | |
334 | if (bcom_queue_full(priv->tx_dmatsk)) { | |
335 | netif_stop_queue(dev); | |
336 | } | |
337 | ||
d360009c | 338 | return NETDEV_TX_OK; |
5d031e9e DP |
339 | } |
340 | ||
bd28bdb1 JS |
341 | #ifdef CONFIG_NET_POLL_CONTROLLER |
342 | static void mpc52xx_fec_poll_controller(struct net_device *dev) | |
343 | { | |
344 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
345 | ||
346 | disable_irq(priv->t_irq); | |
347 | mpc52xx_fec_tx_interrupt(priv->t_irq, dev); | |
348 | enable_irq(priv->t_irq); | |
349 | disable_irq(priv->r_irq); | |
350 | mpc52xx_fec_rx_interrupt(priv->r_irq, dev); | |
351 | enable_irq(priv->r_irq); | |
352 | } | |
353 | #endif | |
354 | ||
355 | ||
5d031e9e DP |
356 | /* This handles BestComm transmit task interrupts |
357 | */ | |
358 | static irqreturn_t mpc52xx_fec_tx_interrupt(int irq, void *dev_id) | |
359 | { | |
360 | struct net_device *dev = dev_id; | |
361 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
362 | ||
9d1e5e40 | 363 | spin_lock(&priv->lock); |
5d031e9e DP |
364 | while (bcom_buffer_done(priv->tx_dmatsk)) { |
365 | struct sk_buff *skb; | |
366 | struct bcom_fec_bd *bd; | |
367 | skb = bcom_retrieve_buffer(priv->tx_dmatsk, NULL, | |
368 | (struct bcom_bd **)&bd); | |
461cadbc GL |
369 | dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len, |
370 | DMA_TO_DEVICE); | |
5d031e9e DP |
371 | |
372 | dev_kfree_skb_irq(skb); | |
373 | } | |
9d1e5e40 | 374 | spin_unlock(&priv->lock); |
5d031e9e DP |
375 | |
376 | netif_wake_queue(dev); | |
377 | ||
5d031e9e DP |
378 | return IRQ_HANDLED; |
379 | } | |
380 | ||
381 | static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id) | |
382 | { | |
383 | struct net_device *dev = dev_id; | |
384 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
1e4e0767 AL |
385 | struct sk_buff *rskb; /* received sk_buff */ |
386 | struct sk_buff *skb; /* new sk_buff to enqueue in its place */ | |
387 | struct bcom_fec_bd *bd; | |
388 | u32 status, physaddr; | |
389 | int length; | |
1e4e0767 | 390 | |
9d1e5e40 | 391 | spin_lock(&priv->lock); |
5d031e9e DP |
392 | |
393 | while (bcom_buffer_done(priv->rx_dmatsk)) { | |
5d031e9e DP |
394 | |
395 | rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status, | |
1e4e0767 AL |
396 | (struct bcom_bd **)&bd); |
397 | physaddr = bd->skb_pa; | |
5d031e9e DP |
398 | |
399 | /* Test for errors in received frame */ | |
400 | if (status & BCOM_FEC_RX_BD_ERRORS) { | |
401 | /* Drop packet and reuse the buffer */ | |
1e4e0767 | 402 | mpc52xx_fec_rx_submit(dev, rskb); |
5d031e9e | 403 | dev->stats.rx_dropped++; |
5d031e9e DP |
404 | continue; |
405 | } | |
406 | ||
407 | /* skbs are allocated on open, so now we allocate a new one, | |
408 | * and remove the old (with the packet) */ | |
21a4e469 | 409 | skb = netdev_alloc_skb(dev, FEC_RX_BUFFER_SIZE); |
1e4e0767 | 410 | if (!skb) { |
5d031e9e | 411 | /* Can't get a new one : reuse the same & drop pkt */ |
1e4e0767 AL |
412 | dev_notice(&dev->dev, "Low memory - dropped packet.\n"); |
413 | mpc52xx_fec_rx_submit(dev, rskb); | |
5d031e9e | 414 | dev->stats.rx_dropped++; |
1e4e0767 | 415 | continue; |
5d031e9e DP |
416 | } |
417 | ||
1e4e0767 AL |
418 | /* Enqueue the new sk_buff back on the hardware */ |
419 | mpc52xx_fec_rx_submit(dev, skb); | |
5d031e9e | 420 | |
1e4e0767 AL |
421 | /* Process the received skb - Drop the spin lock while |
422 | * calling into the network stack */ | |
9d1e5e40 | 423 | spin_unlock(&priv->lock); |
5d031e9e | 424 | |
1e4e0767 AL |
425 | dma_unmap_single(dev->dev.parent, physaddr, rskb->len, |
426 | DMA_FROM_DEVICE); | |
427 | length = status & BCOM_FEC_RX_BD_LEN_MASK; | |
428 | skb_put(rskb, length - 4); /* length without CRC32 */ | |
1e4e0767 | 429 | rskb->protocol = eth_type_trans(rskb, dev); |
9ca3cc6f | 430 | if (!skb_defer_rx_timestamp(rskb)) |
d6cf0732 | 431 | netif_rx(rskb); |
1e4e0767 | 432 | |
9d1e5e40 | 433 | spin_lock(&priv->lock); |
5d031e9e DP |
434 | } |
435 | ||
9d1e5e40 | 436 | spin_unlock(&priv->lock); |
1e4e0767 | 437 | |
5d031e9e DP |
438 | return IRQ_HANDLED; |
439 | } | |
440 | ||
441 | static irqreturn_t mpc52xx_fec_interrupt(int irq, void *dev_id) | |
442 | { | |
443 | struct net_device *dev = dev_id; | |
444 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
445 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
446 | u32 ievent; | |
447 | ||
448 | ievent = in_be32(&fec->ievent); | |
449 | ||
450 | ievent &= ~FEC_IEVENT_MII; /* mii is handled separately */ | |
451 | if (!ievent) | |
452 | return IRQ_NONE; | |
453 | ||
454 | out_be32(&fec->ievent, ievent); /* clear pending events */ | |
455 | ||
8f3ba2dc SH |
456 | /* on fifo error, soft-reset fec */ |
457 | if (ievent & (FEC_IEVENT_RFIFO_ERROR | FEC_IEVENT_XFIFO_ERROR)) { | |
458 | ||
459 | if (net_ratelimit() && (ievent & FEC_IEVENT_RFIFO_ERROR)) | |
460 | dev_warn(&dev->dev, "FEC_IEVENT_RFIFO_ERROR\n"); | |
461 | if (net_ratelimit() && (ievent & FEC_IEVENT_XFIFO_ERROR)) | |
462 | dev_warn(&dev->dev, "FEC_IEVENT_XFIFO_ERROR\n"); | |
463 | ||
9d1e5e40 | 464 | spin_lock(&priv->lock); |
8f3ba2dc | 465 | mpc52xx_fec_reset(dev); |
9d1e5e40 | 466 | spin_unlock(&priv->lock); |
8f3ba2dc | 467 | |
5d031e9e DP |
468 | return IRQ_HANDLED; |
469 | } | |
470 | ||
8f3ba2dc SH |
471 | if (ievent & ~FEC_IEVENT_TFINT) |
472 | dev_dbg(&dev->dev, "ievent: %08x\n", ievent); | |
5d031e9e | 473 | |
5d031e9e DP |
474 | return IRQ_HANDLED; |
475 | } | |
476 | ||
477 | /* | |
478 | * Get the current statistics. | |
479 | * This may be called with the card open or closed. | |
480 | */ | |
481 | static struct net_device_stats *mpc52xx_fec_get_stats(struct net_device *dev) | |
482 | { | |
483 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
484 | struct net_device_stats *stats = &dev->stats; | |
485 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
486 | ||
487 | stats->rx_bytes = in_be32(&fec->rmon_r_octets); | |
488 | stats->rx_packets = in_be32(&fec->rmon_r_packets); | |
489 | stats->rx_errors = in_be32(&fec->rmon_r_crc_align) + | |
490 | in_be32(&fec->rmon_r_undersize) + | |
491 | in_be32(&fec->rmon_r_oversize) + | |
492 | in_be32(&fec->rmon_r_frag) + | |
493 | in_be32(&fec->rmon_r_jab); | |
494 | ||
495 | stats->tx_bytes = in_be32(&fec->rmon_t_octets); | |
496 | stats->tx_packets = in_be32(&fec->rmon_t_packets); | |
497 | stats->tx_errors = in_be32(&fec->rmon_t_crc_align) + | |
498 | in_be32(&fec->rmon_t_undersize) + | |
499 | in_be32(&fec->rmon_t_oversize) + | |
500 | in_be32(&fec->rmon_t_frag) + | |
501 | in_be32(&fec->rmon_t_jab); | |
502 | ||
503 | stats->multicast = in_be32(&fec->rmon_r_mc_pkt); | |
504 | stats->collisions = in_be32(&fec->rmon_t_col); | |
505 | ||
506 | /* detailed rx_errors: */ | |
507 | stats->rx_length_errors = in_be32(&fec->rmon_r_undersize) | |
508 | + in_be32(&fec->rmon_r_oversize) | |
509 | + in_be32(&fec->rmon_r_frag) | |
510 | + in_be32(&fec->rmon_r_jab); | |
511 | stats->rx_over_errors = in_be32(&fec->r_macerr); | |
512 | stats->rx_crc_errors = in_be32(&fec->ieee_r_crc); | |
513 | stats->rx_frame_errors = in_be32(&fec->ieee_r_align); | |
514 | stats->rx_fifo_errors = in_be32(&fec->rmon_r_drop); | |
515 | stats->rx_missed_errors = in_be32(&fec->rmon_r_drop); | |
516 | ||
517 | /* detailed tx_errors: */ | |
518 | stats->tx_aborted_errors = 0; | |
519 | stats->tx_carrier_errors = in_be32(&fec->ieee_t_cserr); | |
520 | stats->tx_fifo_errors = in_be32(&fec->rmon_t_drop); | |
521 | stats->tx_heartbeat_errors = in_be32(&fec->ieee_t_sqe); | |
522 | stats->tx_window_errors = in_be32(&fec->ieee_t_lcol); | |
523 | ||
524 | return stats; | |
525 | } | |
526 | ||
527 | /* | |
528 | * Read MIB counters in order to reset them, | |
529 | * then zero all the stats fields in memory | |
530 | */ | |
531 | static void mpc52xx_fec_reset_stats(struct net_device *dev) | |
532 | { | |
533 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
534 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
535 | ||
536 | out_be32(&fec->mib_control, FEC_MIB_DISABLE); | |
cc154ac6 AV |
537 | memset_io(&fec->rmon_t_drop, 0, |
538 | offsetof(struct mpc52xx_fec, reserved10) - | |
539 | offsetof(struct mpc52xx_fec, rmon_t_drop)); | |
5d031e9e DP |
540 | out_be32(&fec->mib_control, 0); |
541 | ||
542 | memset(&dev->stats, 0, sizeof(dev->stats)); | |
543 | } | |
544 | ||
545 | /* | |
546 | * Set or clear the multicast filter for this adaptor. | |
547 | */ | |
548 | static void mpc52xx_fec_set_multicast_list(struct net_device *dev) | |
549 | { | |
550 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
551 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
552 | u32 rx_control; | |
553 | ||
554 | rx_control = in_be32(&fec->r_cntrl); | |
555 | ||
556 | if (dev->flags & IFF_PROMISC) { | |
557 | rx_control |= FEC_RCNTRL_PROM; | |
558 | out_be32(&fec->r_cntrl, rx_control); | |
559 | } else { | |
560 | rx_control &= ~FEC_RCNTRL_PROM; | |
561 | out_be32(&fec->r_cntrl, rx_control); | |
562 | ||
563 | if (dev->flags & IFF_ALLMULTI) { | |
564 | out_be32(&fec->gaddr1, 0xffffffff); | |
565 | out_be32(&fec->gaddr2, 0xffffffff); | |
566 | } else { | |
567 | u32 crc; | |
22bedad3 | 568 | struct netdev_hw_addr *ha; |
5d031e9e DP |
569 | u32 gaddr1 = 0x00000000; |
570 | u32 gaddr2 = 0x00000000; | |
571 | ||
22bedad3 JP |
572 | netdev_for_each_mc_addr(ha, dev) { |
573 | crc = ether_crc_le(6, ha->addr) >> 26; | |
5d031e9e DP |
574 | if (crc >= 32) |
575 | gaddr1 |= 1 << (crc-32); | |
576 | else | |
577 | gaddr2 |= 1 << crc; | |
5d031e9e DP |
578 | } |
579 | out_be32(&fec->gaddr1, gaddr1); | |
580 | out_be32(&fec->gaddr2, gaddr2); | |
581 | } | |
582 | } | |
583 | } | |
584 | ||
585 | /** | |
586 | * mpc52xx_fec_hw_init | |
587 | * @dev: network device | |
588 | * | |
589 | * Setup various hardware setting, only needed once on start | |
590 | */ | |
591 | static void mpc52xx_fec_hw_init(struct net_device *dev) | |
592 | { | |
593 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
594 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
595 | int i; | |
596 | ||
597 | /* Whack a reset. We should wait for this. */ | |
598 | out_be32(&fec->ecntrl, FEC_ECNTRL_RESET); | |
599 | for (i = 0; i < FEC_RESET_DELAY; ++i) { | |
600 | if ((in_be32(&fec->ecntrl) & FEC_ECNTRL_RESET) == 0) | |
601 | break; | |
602 | udelay(1); | |
603 | } | |
604 | if (i == FEC_RESET_DELAY) | |
605 | dev_err(&dev->dev, "FEC Reset timeout!\n"); | |
606 | ||
607 | /* set pause to 0x20 frames */ | |
608 | out_be32(&fec->op_pause, FEC_OP_PAUSE_OPCODE | 0x20); | |
609 | ||
610 | /* high service request will be deasserted when there's < 7 bytes in fifo | |
611 | * low service request will be deasserted when there's < 4*7 bytes in fifo | |
612 | */ | |
613 | out_be32(&fec->rfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); | |
614 | out_be32(&fec->tfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); | |
615 | ||
616 | /* alarm when <= x bytes in FIFO */ | |
617 | out_be32(&fec->rfifo_alarm, 0x0000030c); | |
618 | out_be32(&fec->tfifo_alarm, 0x00000100); | |
619 | ||
620 | /* begin transmittion when 256 bytes are in FIFO (or EOF or FIFO full) */ | |
621 | out_be32(&fec->x_wmrk, FEC_FIFO_WMRK_256B); | |
622 | ||
623 | /* enable crc generation */ | |
624 | out_be32(&fec->xmit_fsm, FEC_XMIT_FSM_APPEND_CRC | FEC_XMIT_FSM_ENABLE_CRC); | |
625 | out_be32(&fec->iaddr1, 0x00000000); /* No individual filter */ | |
626 | out_be32(&fec->iaddr2, 0x00000000); /* No individual filter */ | |
627 | ||
628 | /* set phy speed. | |
629 | * this can't be done in phy driver, since it needs to be called | |
630 | * before fec stuff (even on resume) */ | |
ca816d98 | 631 | out_be32(&fec->mii_speed, priv->mdio_speed); |
5d031e9e DP |
632 | } |
633 | ||
634 | /** | |
635 | * mpc52xx_fec_start | |
636 | * @dev: network device | |
637 | * | |
638 | * This function is called to start or restart the FEC during a link | |
639 | * change. This happens on fifo errors or when switching between half | |
640 | * and full duplex. | |
641 | */ | |
642 | static void mpc52xx_fec_start(struct net_device *dev) | |
643 | { | |
644 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
645 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
646 | u32 rcntrl; | |
647 | u32 tcntrl; | |
648 | u32 tmp; | |
649 | ||
650 | /* clear sticky error bits */ | |
651 | tmp = FEC_FIFO_STATUS_ERR | FEC_FIFO_STATUS_UF | FEC_FIFO_STATUS_OF; | |
652 | out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status) & tmp); | |
653 | out_be32(&fec->tfifo_status, in_be32(&fec->tfifo_status) & tmp); | |
654 | ||
655 | /* FIFOs will reset on mpc52xx_fec_enable */ | |
656 | out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_ENABLE_IS_RESET); | |
657 | ||
658 | /* Set station address. */ | |
659 | mpc52xx_fec_set_paddr(dev, dev->dev_addr); | |
660 | ||
661 | mpc52xx_fec_set_multicast_list(dev); | |
662 | ||
663 | /* set max frame len, enable flow control, select mii mode */ | |
664 | rcntrl = FEC_RX_BUFFER_SIZE << 16; /* max frame length */ | |
665 | rcntrl |= FEC_RCNTRL_FCE; | |
666 | ||
ca816d98 | 667 | if (!priv->seven_wire_mode) |
5d031e9e DP |
668 | rcntrl |= FEC_RCNTRL_MII_MODE; |
669 | ||
670 | if (priv->duplex == DUPLEX_FULL) | |
671 | tcntrl = FEC_TCNTRL_FDEN; /* FD enable */ | |
672 | else { | |
673 | rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */ | |
674 | tcntrl = 0; | |
675 | } | |
676 | out_be32(&fec->r_cntrl, rcntrl); | |
677 | out_be32(&fec->x_cntrl, tcntrl); | |
678 | ||
679 | /* Clear any outstanding interrupt. */ | |
680 | out_be32(&fec->ievent, 0xffffffff); | |
681 | ||
682 | /* Enable interrupts we wish to service. */ | |
683 | out_be32(&fec->imask, FEC_IMASK_ENABLE); | |
684 | ||
685 | /* And last, enable the transmit and receive processing. */ | |
686 | out_be32(&fec->ecntrl, FEC_ECNTRL_ETHER_EN); | |
687 | out_be32(&fec->r_des_active, 0x01000000); | |
688 | } | |
689 | ||
690 | /** | |
691 | * mpc52xx_fec_stop | |
692 | * @dev: network device | |
693 | * | |
694 | * stop all activity on fec and empty dma buffers | |
695 | */ | |
696 | static void mpc52xx_fec_stop(struct net_device *dev) | |
697 | { | |
698 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
699 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
700 | unsigned long timeout; | |
701 | ||
702 | /* disable all interrupts */ | |
703 | out_be32(&fec->imask, 0); | |
704 | ||
705 | /* Disable the rx task. */ | |
706 | bcom_disable(priv->rx_dmatsk); | |
707 | ||
708 | /* Wait for tx queue to drain, but only if we're in process context */ | |
709 | if (!in_interrupt()) { | |
710 | timeout = jiffies + msecs_to_jiffies(2000); | |
711 | while (time_before(jiffies, timeout) && | |
712 | !bcom_queue_empty(priv->tx_dmatsk)) | |
713 | msleep(100); | |
714 | ||
715 | if (time_after_eq(jiffies, timeout)) | |
716 | dev_err(&dev->dev, "queues didn't drain\n"); | |
717 | #if 1 | |
718 | if (time_after_eq(jiffies, timeout)) { | |
719 | dev_err(&dev->dev, " tx: index: %i, outdex: %i\n", | |
720 | priv->tx_dmatsk->index, | |
721 | priv->tx_dmatsk->outdex); | |
722 | dev_err(&dev->dev, " rx: index: %i, outdex: %i\n", | |
723 | priv->rx_dmatsk->index, | |
724 | priv->rx_dmatsk->outdex); | |
725 | } | |
726 | #endif | |
727 | } | |
728 | ||
729 | bcom_disable(priv->tx_dmatsk); | |
730 | ||
731 | /* Stop FEC */ | |
732 | out_be32(&fec->ecntrl, in_be32(&fec->ecntrl) & ~FEC_ECNTRL_ETHER_EN); | |
5d031e9e DP |
733 | } |
734 | ||
735 | /* reset fec and bestcomm tasks */ | |
736 | static void mpc52xx_fec_reset(struct net_device *dev) | |
737 | { | |
738 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
739 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
740 | ||
741 | mpc52xx_fec_stop(dev); | |
742 | ||
743 | out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status)); | |
744 | out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_RESET_FIFO); | |
745 | ||
746 | mpc52xx_fec_free_rx_buffers(dev, priv->rx_dmatsk); | |
747 | ||
748 | mpc52xx_fec_hw_init(dev); | |
749 | ||
5d031e9e DP |
750 | bcom_fec_rx_reset(priv->rx_dmatsk); |
751 | bcom_fec_tx_reset(priv->tx_dmatsk); | |
752 | ||
753 | mpc52xx_fec_alloc_rx_buffers(dev, priv->rx_dmatsk); | |
754 | ||
755 | bcom_enable(priv->rx_dmatsk); | |
756 | bcom_enable(priv->tx_dmatsk); | |
757 | ||
758 | mpc52xx_fec_start(dev); | |
1e4e0767 AL |
759 | |
760 | netif_wake_queue(dev); | |
5d031e9e DP |
761 | } |
762 | ||
763 | ||
764 | /* ethtool interface */ | |
5d031e9e DP |
765 | |
766 | static int mpc52xx_fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
767 | { | |
768 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
9404c82b GL |
769 | |
770 | if (!priv->phydev) | |
771 | return -ENODEV; | |
772 | ||
5d031e9e DP |
773 | return phy_ethtool_gset(priv->phydev, cmd); |
774 | } | |
775 | ||
776 | static int mpc52xx_fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
777 | { | |
778 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
9404c82b GL |
779 | |
780 | if (!priv->phydev) | |
781 | return -ENODEV; | |
782 | ||
5d031e9e DP |
783 | return phy_ethtool_sset(priv->phydev, cmd); |
784 | } | |
785 | ||
786 | static u32 mpc52xx_fec_get_msglevel(struct net_device *dev) | |
787 | { | |
788 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
789 | return priv->msg_enable; | |
790 | } | |
791 | ||
792 | static void mpc52xx_fec_set_msglevel(struct net_device *dev, u32 level) | |
793 | { | |
794 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
795 | priv->msg_enable = level; | |
796 | } | |
797 | ||
798 | static const struct ethtool_ops mpc52xx_fec_ethtool_ops = { | |
5d031e9e DP |
799 | .get_settings = mpc52xx_fec_get_settings, |
800 | .set_settings = mpc52xx_fec_set_settings, | |
801 | .get_link = ethtool_op_get_link, | |
802 | .get_msglevel = mpc52xx_fec_get_msglevel, | |
803 | .set_msglevel = mpc52xx_fec_set_msglevel, | |
0a4f2823 | 804 | .get_ts_info = ethtool_op_get_ts_info, |
5d031e9e DP |
805 | }; |
806 | ||
807 | ||
808 | static int mpc52xx_fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
809 | { | |
810 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
811 | ||
9404c82b GL |
812 | if (!priv->phydev) |
813 | return -ENOTSUPP; | |
814 | ||
28b04113 | 815 | return phy_mii_ioctl(priv->phydev, rq, cmd); |
5d031e9e DP |
816 | } |
817 | ||
d360009c HS |
818 | static const struct net_device_ops mpc52xx_fec_netdev_ops = { |
819 | .ndo_open = mpc52xx_fec_open, | |
820 | .ndo_stop = mpc52xx_fec_close, | |
821 | .ndo_start_xmit = mpc52xx_fec_start_xmit, | |
afc4b13d | 822 | .ndo_set_rx_mode = mpc52xx_fec_set_multicast_list, |
d360009c HS |
823 | .ndo_set_mac_address = mpc52xx_fec_set_mac_address, |
824 | .ndo_validate_addr = eth_validate_addr, | |
825 | .ndo_do_ioctl = mpc52xx_fec_ioctl, | |
826 | .ndo_change_mtu = eth_change_mtu, | |
827 | .ndo_tx_timeout = mpc52xx_fec_tx_timeout, | |
828 | .ndo_get_stats = mpc52xx_fec_get_stats, | |
829 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
830 | .ndo_poll_controller = mpc52xx_fec_poll_controller, | |
831 | #endif | |
832 | }; | |
833 | ||
5d031e9e DP |
834 | /* ======================================================================== */ |
835 | /* OF Driver */ | |
836 | /* ======================================================================== */ | |
837 | ||
33897cc8 | 838 | static int mpc52xx_fec_probe(struct platform_device *op) |
5d031e9e DP |
839 | { |
840 | int rv; | |
841 | struct net_device *ndev; | |
842 | struct mpc52xx_fec_priv *priv = NULL; | |
843 | struct resource mem; | |
80791be1 GL |
844 | const u32 *prop; |
845 | int prop_size; | |
db98f081 SR |
846 | struct device_node *np = op->dev.of_node; |
847 | const char *mac_addr; | |
5d031e9e DP |
848 | |
849 | phys_addr_t rx_fifo; | |
850 | phys_addr_t tx_fifo; | |
851 | ||
852 | /* Get the ether ndev & it's private zone */ | |
853 | ndev = alloc_etherdev(sizeof(struct mpc52xx_fec_priv)); | |
854 | if (!ndev) | |
855 | return -ENOMEM; | |
856 | ||
857 | priv = netdev_priv(ndev); | |
ca816d98 | 858 | priv->ndev = ndev; |
5d031e9e DP |
859 | |
860 | /* Reserve FEC control zone */ | |
db98f081 | 861 | rv = of_address_to_resource(np, 0, &mem); |
5d031e9e | 862 | if (rv) { |
31b7720c | 863 | pr_err("Error while parsing device node resource\n"); |
fabc51a6 | 864 | goto err_netdev; |
5d031e9e | 865 | } |
28f65c11 | 866 | if (resource_size(&mem) < sizeof(struct mpc52xx_fec)) { |
31b7720c | 867 | pr_err("invalid resource size (%lx < %x), check mpc52xx_devices.c\n", |
28f65c11 JP |
868 | (unsigned long)resource_size(&mem), |
869 | sizeof(struct mpc52xx_fec)); | |
fabc51a6 KV |
870 | rv = -EINVAL; |
871 | goto err_netdev; | |
5d031e9e DP |
872 | } |
873 | ||
fabc51a6 KV |
874 | if (!request_mem_region(mem.start, sizeof(struct mpc52xx_fec), |
875 | DRIVER_NAME)) { | |
876 | rv = -EBUSY; | |
877 | goto err_netdev; | |
878 | } | |
5d031e9e DP |
879 | |
880 | /* Init ether ndev with what we have */ | |
d360009c | 881 | ndev->netdev_ops = &mpc52xx_fec_netdev_ops; |
5d031e9e | 882 | ndev->ethtool_ops = &mpc52xx_fec_ethtool_ops; |
5d031e9e DP |
883 | ndev->watchdog_timeo = FEC_WATCHDOG_TIMEOUT; |
884 | ndev->base_addr = mem.start; | |
ca816d98 | 885 | SET_NETDEV_DEV(ndev, &op->dev); |
5d031e9e DP |
886 | |
887 | spin_lock_init(&priv->lock); | |
888 | ||
889 | /* ioremap the zones */ | |
890 | priv->fec = ioremap(mem.start, sizeof(struct mpc52xx_fec)); | |
891 | ||
892 | if (!priv->fec) { | |
893 | rv = -ENOMEM; | |
fabc51a6 | 894 | goto err_mem_region; |
5d031e9e DP |
895 | } |
896 | ||
897 | /* Bestcomm init */ | |
898 | rx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, rfifo_data); | |
899 | tx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, tfifo_data); | |
900 | ||
901 | priv->rx_dmatsk = bcom_fec_rx_init(FEC_RX_NUM_BD, rx_fifo, FEC_RX_BUFFER_SIZE); | |
902 | priv->tx_dmatsk = bcom_fec_tx_init(FEC_TX_NUM_BD, tx_fifo); | |
903 | ||
904 | if (!priv->rx_dmatsk || !priv->tx_dmatsk) { | |
31b7720c | 905 | pr_err("Can not init SDMA tasks\n"); |
5d031e9e | 906 | rv = -ENOMEM; |
fabc51a6 | 907 | goto err_rx_tx_dmatsk; |
5d031e9e DP |
908 | } |
909 | ||
910 | /* Get the IRQ we need one by one */ | |
911 | /* Control */ | |
db98f081 | 912 | ndev->irq = irq_of_parse_and_map(np, 0); |
5d031e9e DP |
913 | |
914 | /* RX */ | |
915 | priv->r_irq = bcom_get_task_irq(priv->rx_dmatsk); | |
916 | ||
917 | /* TX */ | |
918 | priv->t_irq = bcom_get_task_irq(priv->tx_dmatsk); | |
919 | ||
db98f081 SR |
920 | /* |
921 | * MAC address init: | |
922 | * | |
923 | * First try to read MAC address from DT | |
924 | */ | |
925 | mac_addr = of_get_mac_address(np); | |
926 | if (mac_addr) { | |
927 | memcpy(ndev->dev_addr, mac_addr, ETH_ALEN); | |
928 | } else { | |
929 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
930 | ||
931 | /* | |
932 | * If the MAC addresse is not provided via DT then read | |
933 | * it back from the controller regs | |
934 | */ | |
935 | *(u32 *)(&ndev->dev_addr[0]) = in_be32(&fec->paddr1); | |
936 | *(u16 *)(&ndev->dev_addr[4]) = in_be32(&fec->paddr2) >> 16; | |
937 | } | |
938 | ||
939 | /* | |
940 | * Check if the MAC address is valid, if not get a random one | |
941 | */ | |
942 | if (!is_valid_ether_addr(ndev->dev_addr)) { | |
943 | eth_hw_addr_random(ndev); | |
944 | dev_warn(&ndev->dev, "using random MAC address %pM\n", | |
945 | ndev->dev_addr); | |
946 | } | |
5d031e9e DP |
947 | |
948 | priv->msg_enable = netif_msg_init(debug, MPC52xx_MESSAGES_DEFAULT); | |
5d031e9e | 949 | |
80791be1 GL |
950 | /* |
951 | * Link mode configuration | |
952 | */ | |
5d031e9e | 953 | |
80791be1 | 954 | /* Start with safe defaults for link connection */ |
80791be1 GL |
955 | priv->speed = 100; |
956 | priv->duplex = DUPLEX_HALF; | |
db98f081 | 957 | priv->mdio_speed = ((mpc5xxx_get_bus_frequency(np) >> 20) / 5) << 1; |
80791be1 GL |
958 | |
959 | /* The current speed preconfigures the speed of the MII link */ | |
db98f081 | 960 | prop = of_get_property(np, "current-speed", &prop_size); |
80791be1 GL |
961 | if (prop && (prop_size >= sizeof(u32) * 2)) { |
962 | priv->speed = prop[0]; | |
963 | priv->duplex = prop[1] ? DUPLEX_FULL : DUPLEX_HALF; | |
964 | } | |
5d031e9e | 965 | |
ca816d98 | 966 | /* If there is a phy handle, then get the PHY node */ |
db98f081 | 967 | priv->phy_node = of_parse_phandle(np, "phy-handle", 0); |
ca816d98 GL |
968 | |
969 | /* the 7-wire property means don't use MII mode */ | |
db98f081 | 970 | if (of_find_property(np, "fsl,7-wire-mode", NULL)) { |
ca816d98 GL |
971 | priv->seven_wire_mode = 1; |
972 | dev_info(&ndev->dev, "using 7-wire PHY mode\n"); | |
5d031e9e DP |
973 | } |
974 | ||
975 | /* Hardware init */ | |
976 | mpc52xx_fec_hw_init(ndev); | |
5d031e9e DP |
977 | mpc52xx_fec_reset_stats(ndev); |
978 | ||
5d031e9e DP |
979 | rv = register_netdev(ndev); |
980 | if (rv < 0) | |
fabc51a6 | 981 | goto err_node; |
5d031e9e DP |
982 | |
983 | /* We're done ! */ | |
8513fbd8 | 984 | platform_set_drvdata(op, ndev); |
31b7720c JP |
985 | netdev_info(ndev, "%s MAC %pM\n", |
986 | op->dev.of_node->full_name, ndev->dev_addr); | |
5d031e9e DP |
987 | |
988 | return 0; | |
989 | ||
fabc51a6 KV |
990 | err_node: |
991 | of_node_put(priv->phy_node); | |
5d031e9e | 992 | irq_dispose_mapping(ndev->irq); |
fabc51a6 | 993 | err_rx_tx_dmatsk: |
5d031e9e DP |
994 | if (priv->rx_dmatsk) |
995 | bcom_fec_rx_release(priv->rx_dmatsk); | |
996 | if (priv->tx_dmatsk) | |
997 | bcom_fec_tx_release(priv->tx_dmatsk); | |
fabc51a6 KV |
998 | iounmap(priv->fec); |
999 | err_mem_region: | |
5d031e9e | 1000 | release_mem_region(mem.start, sizeof(struct mpc52xx_fec)); |
fabc51a6 | 1001 | err_netdev: |
5d031e9e DP |
1002 | free_netdev(ndev); |
1003 | ||
1004 | return rv; | |
1005 | } | |
1006 | ||
1007 | static int | |
2dc11581 | 1008 | mpc52xx_fec_remove(struct platform_device *op) |
5d031e9e DP |
1009 | { |
1010 | struct net_device *ndev; | |
1011 | struct mpc52xx_fec_priv *priv; | |
1012 | ||
8513fbd8 | 1013 | ndev = platform_get_drvdata(op); |
5d031e9e DP |
1014 | priv = netdev_priv(ndev); |
1015 | ||
1016 | unregister_netdev(ndev); | |
1017 | ||
f8e8be1c | 1018 | of_node_put(priv->phy_node); |
ca816d98 GL |
1019 | priv->phy_node = NULL; |
1020 | ||
5d031e9e DP |
1021 | irq_dispose_mapping(ndev->irq); |
1022 | ||
1023 | bcom_fec_rx_release(priv->rx_dmatsk); | |
1024 | bcom_fec_tx_release(priv->tx_dmatsk); | |
1025 | ||
1026 | iounmap(priv->fec); | |
1027 | ||
1028 | release_mem_region(ndev->base_addr, sizeof(struct mpc52xx_fec)); | |
1029 | ||
1030 | free_netdev(ndev); | |
1031 | ||
5d031e9e DP |
1032 | return 0; |
1033 | } | |
1034 | ||
1035 | #ifdef CONFIG_PM | |
2dc11581 | 1036 | static int mpc52xx_fec_of_suspend(struct platform_device *op, pm_message_t state) |
5d031e9e | 1037 | { |
8513fbd8 | 1038 | struct net_device *dev = platform_get_drvdata(op); |
5d031e9e DP |
1039 | |
1040 | if (netif_running(dev)) | |
1041 | mpc52xx_fec_close(dev); | |
1042 | ||
1043 | return 0; | |
1044 | } | |
1045 | ||
2dc11581 | 1046 | static int mpc52xx_fec_of_resume(struct platform_device *op) |
5d031e9e | 1047 | { |
8513fbd8 | 1048 | struct net_device *dev = platform_get_drvdata(op); |
5d031e9e DP |
1049 | |
1050 | mpc52xx_fec_hw_init(dev); | |
1051 | mpc52xx_fec_reset_stats(dev); | |
1052 | ||
1053 | if (netif_running(dev)) | |
1054 | mpc52xx_fec_open(dev); | |
1055 | ||
1056 | return 0; | |
1057 | } | |
1058 | #endif | |
1059 | ||
94e5a2a8 | 1060 | static const struct of_device_id mpc52xx_fec_match[] = { |
3b5ebf8e GL |
1061 | { .compatible = "fsl,mpc5200b-fec", }, |
1062 | { .compatible = "fsl,mpc5200-fec", }, | |
1063 | { .compatible = "mpc5200-fec", }, | |
5d031e9e DP |
1064 | { } |
1065 | }; | |
1066 | ||
1067 | MODULE_DEVICE_TABLE(of, mpc52xx_fec_match); | |
1068 | ||
74888760 | 1069 | static struct platform_driver mpc52xx_fec_driver = { |
4018294b GL |
1070 | .driver = { |
1071 | .name = DRIVER_NAME, | |
4018294b GL |
1072 | .of_match_table = mpc52xx_fec_match, |
1073 | }, | |
5d031e9e DP |
1074 | .probe = mpc52xx_fec_probe, |
1075 | .remove = mpc52xx_fec_remove, | |
1076 | #ifdef CONFIG_PM | |
1077 | .suspend = mpc52xx_fec_of_suspend, | |
1078 | .resume = mpc52xx_fec_of_resume, | |
1079 | #endif | |
1080 | }; | |
1081 | ||
1082 | ||
1083 | /* ======================================================================== */ | |
1084 | /* Module */ | |
1085 | /* ======================================================================== */ | |
1086 | ||
1087 | static int __init | |
1088 | mpc52xx_fec_init(void) | |
1089 | { | |
1090 | #ifdef CONFIG_FEC_MPC52xx_MDIO | |
1091 | int ret; | |
74888760 | 1092 | ret = platform_driver_register(&mpc52xx_fec_mdio_driver); |
5d031e9e | 1093 | if (ret) { |
31b7720c | 1094 | pr_err("failed to register mdio driver\n"); |
5d031e9e DP |
1095 | return ret; |
1096 | } | |
1097 | #endif | |
74888760 | 1098 | return platform_driver_register(&mpc52xx_fec_driver); |
5d031e9e DP |
1099 | } |
1100 | ||
1101 | static void __exit | |
1102 | mpc52xx_fec_exit(void) | |
1103 | { | |
74888760 | 1104 | platform_driver_unregister(&mpc52xx_fec_driver); |
5d031e9e | 1105 | #ifdef CONFIG_FEC_MPC52xx_MDIO |
74888760 | 1106 | platform_driver_unregister(&mpc52xx_fec_mdio_driver); |
5d031e9e DP |
1107 | #endif |
1108 | } | |
1109 | ||
1110 | ||
1111 | module_init(mpc52xx_fec_init); | |
1112 | module_exit(mpc52xx_fec_exit); | |
1113 | ||
1114 | MODULE_LICENSE("GPL"); | |
1115 | MODULE_AUTHOR("Dale Farnsworth"); | |
1116 | MODULE_DESCRIPTION("Ethernet driver for the Freescale MPC52xx FEC"); |